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| author | Narumol Prangnawarat <narumol.prangnawarat@arm.com> | 2019-01-31 15:31:54 +0000 |
|---|---|---|
| committer | Narumol Prangnawarat <narumol.prangnawarat@arm.com> | 2019-02-04 10:57:48 +0000 |
| commit | bc67cef3e3dc9e7fe9c4331495009eda48c89527 (patch) | |
| tree | 6a15af84fbc5989d25213790554acbb46cda5165 /include | |
| parent | c981df3bb24df1f98c233d885e73a2ea5c6d3449 (diff) | |
| download | armnn-bc67cef3e3dc9e7fe9c4331495009eda48c89527.tar.gz | |
IVGCVSW-2557 Ref Workload Implementation for Detection PostProcess
* implementation of DetectionPostProcessQueueDescriptor validate
* add Uint8ToFloat32Workload
* add implementation of Detection PostProcess functionalities
* add ref workload implemenentation for float and uint8
* add layer support for Detection PostProcess in ref
* unit tests
Change-Id: I650461f49edbb3c533d68ef8700377af51bc3592
Diffstat (limited to 'include')
| -rw-r--r-- | include/armnn/Descriptors.hpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/include/armnn/Descriptors.hpp b/include/armnn/Descriptors.hpp index 29d294e69f..b14ed0b1ab 100644 --- a/include/armnn/Descriptors.hpp +++ b/include/armnn/Descriptors.hpp @@ -354,7 +354,7 @@ struct DetectionPostProcessDescriptor /// Intersection over union threshold. float m_NmsIouThreshold; /// Number of classes. - int32_t m_NumClasses; + uint32_t m_NumClasses; /// Use Regular NMS. bool m_UseRegularNms; /// Center size encoding scale x. |