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author | Colm Donelan <colm.donelan@arm.com> | 2023-11-28 15:46:09 +0000 |
---|---|---|
committer | Colm Donelan <colm.donelan@arm.com> | 2023-12-18 10:27:21 +0000 |
commit | eff204aa3ae75277b0cf689eed0e2073ff644ef8 (patch) | |
tree | cc222af9c397947f240a1554414fd2ac4c5cf636 /delegate/test/Convolution3dTest.cpp | |
parent | 7790dc6531034778d92ba264fd61174bcff7051e (diff) | |
download | armnn-eff204aa3ae75277b0cf689eed0e2073ff644ef8.tar.gz |
IVGCVSW-7675 Rework DelegateUnitTests so backends are subcases.
The intent of this change is to remove the per backend test cases in
the delegate unit tests. They will be replaced by using DocTest
SUBCASES. The sub cases are paramaterized by the available backends.
The list of available backends are determined by the compilation flags.
Signed-off-by: Colm Donelan <colm.donelan@arm.com>
Change-Id: Ia377c7a7399d0e30dc287d7217b3e3b52e1ea074
Diffstat (limited to 'delegate/test/Convolution3dTest.cpp')
-rw-r--r-- | delegate/test/Convolution3dTest.cpp | 87 |
1 files changed, 23 insertions, 64 deletions
diff --git a/delegate/test/Convolution3dTest.cpp b/delegate/test/Convolution3dTest.cpp index e1a0a94507..e1189367f0 100644 --- a/delegate/test/Convolution3dTest.cpp +++ b/delegate/test/Convolution3dTest.cpp @@ -34,7 +34,7 @@ std::vector<T> CreateFloatData(int32_t size, float divisor) return data; } -void Conv3DWithBiasesSimpleWithPaddingFp32Test(std::vector<armnn::BackendId>& backends) +void Conv3DWithBiasesSimpleWithPaddingFp32Test() { // Set input data std::vector<int32_t> inputShape { 1, 2, 2, 2, 1 }; @@ -65,7 +65,6 @@ void Conv3DWithBiasesSimpleWithPaddingFp32Test(std::vector<armnn::BackendId>& ba { 1, 1, 1 }, // dilationX, dilationY, dilationZ tflite::Padding_SAME, tflite::ActivationFunctionType_NONE, - backends, inputShape, filterShape, outputShape, @@ -76,7 +75,7 @@ void Conv3DWithBiasesSimpleWithPaddingFp32Test(std::vector<armnn::BackendId>& ba biasValues); } -void Conv3DWithBiasesStridesFp32Test(std::vector<armnn::BackendId>& backends) +void Conv3DWithBiasesStridesFp32Test() { std::vector<int32_t> inputShape { 1, 3, 10, 10, 1 }; std::vector<int32_t> filterShape { 3, 5, 5, 1, 1 }; @@ -123,7 +122,6 @@ void Conv3DWithBiasesStridesFp32Test(std::vector<armnn::BackendId>& backends) { 1, 1, 1 }, // dilationX, dilationY, dilationZ tflite::Padding_VALID, tflite::ActivationFunctionType_NONE, - backends, inputShape, filterShape, outputShape, @@ -175,7 +173,6 @@ void Conv3DWithBiasesDilationFp32Test(std::vector<armnn::BackendId>& backends) { 3, 3, 3 }, // dilationX, dilationY, dilationZ tflite::Padding_VALID, tflite::ActivationFunctionType_NONE, - backends, inputShape, filterShape, outputShape, @@ -183,10 +180,21 @@ void Conv3DWithBiasesDilationFp32Test(std::vector<armnn::BackendId>& backends) filterValues, expectedOutputValues, biasShape, - biasValues); + biasValues, + {1.0f}, + {0}, + {1.0f}, + {0}, + 2.0f, + 0, + 1.0f, + 0, + 1, + 3, + backends); } -void Conv3DFp32SmallTest(std::vector<armnn::BackendId>& backends) +void Conv3DFp32SmallTest() { std::vector<int32_t> inputShape { 1, 3, 10, 10, 1 }; std::vector<int32_t> filterShape { 3, 3, 3, 1, 1 }; @@ -226,7 +234,6 @@ void Conv3DFp32SmallTest(std::vector<armnn::BackendId>& backends) { 1, 1, 1 }, // dilationX, dilationY, dilationZ tflite::Padding_VALID, tflite::ActivationFunctionType_NONE, - backends, inputShape, filterShape, outputShape, @@ -240,77 +247,29 @@ void Conv3DFp32SmallTest(std::vector<armnn::BackendId>& backends) TEST_SUITE("Convolution3dTest_CpuRefTests") { -TEST_CASE ("Conv3DWithBiasesSimpleWithPadding_Fp32_CpuRef_Test") +TEST_CASE ("Conv3DWithBiasesSimpleWithPadding_Fp32_Test") { - std::vector <armnn::BackendId> backends = {armnn::Compute::CpuRef}; - Conv3DWithBiasesSimpleWithPaddingFp32Test(backends); + Conv3DWithBiasesSimpleWithPaddingFp32Test(); } -TEST_CASE ("Conv3DWithBiasesStrides_Fp32_CpuRef_Test") +TEST_CASE ("Conv3DWithBiasesStrides_Fp32_Test") { - std::vector <armnn::BackendId> backends = {armnn::Compute::CpuRef}; - Conv3DWithBiasesStridesFp32Test(backends); + Conv3DWithBiasesStridesFp32Test(); } TEST_CASE ("Conv3DWithBiasesDilation_Fp32_CpuRef_Test") { + // Known to only work on CpuRef. std::vector <armnn::BackendId> backends = {armnn::Compute::CpuRef}; Conv3DWithBiasesDilationFp32Test(backends); } -TEST_CASE ("Conv3DFp32Small_Fp32_CpuRef_Test") -{ - std::vector <armnn::BackendId> backends = {armnn::Compute::CpuRef}; - Conv3DFp32SmallTest(backends); -} - -} //End of TEST_SUITE("Convolution3dTest_CpuRefTests") - -TEST_SUITE("Convolution3dTest_CpuAccTests") -{ - -TEST_CASE ("Conv3DWithBiasesSimpleWithPadding_Fp32_CpuAcc_Test") -{ - std::vector <armnn::BackendId> backends = {armnn::Compute::CpuAcc}; - Conv3DWithBiasesSimpleWithPaddingFp32Test(backends); -} - -TEST_CASE ("Conv3DWithBiasesStrides_Fp32_CpuAcc_Test") -{ - std::vector <armnn::BackendId> backends = {armnn::Compute::CpuAcc}; - Conv3DWithBiasesStridesFp32Test(backends); -} - -TEST_CASE ("Conv3DFp32Small_Fp32_CpuAcc_Test") -{ - std::vector <armnn::BackendId> backends = {armnn::Compute::CpuAcc}; - Conv3DFp32SmallTest(backends); -} - -} //End of TEST_SUITE("Convolution3dTest_CpuAccTests") - -TEST_SUITE("Convolution3dTest_GpuAccTests") -{ - -TEST_CASE ("Conv3DWithBiasesSimpleWithPadding_Fp32_GpuAcc_Test") -{ - std::vector <armnn::BackendId> backends = {armnn::Compute::GpuAcc}; - Conv3DWithBiasesSimpleWithPaddingFp32Test(backends); -} - -TEST_CASE ("Conv3DWithBiasesStrides_Fp32_GpuAcc_Test") -{ - std::vector <armnn::BackendId> backends = {armnn::Compute::GpuAcc}; - Conv3DWithBiasesStridesFp32Test(backends); -} - -TEST_CASE ("Conv3DFp32Small_Fp32_GpuAcc_Test") +TEST_CASE ("Conv3DFp32Small_Fp32_Test") { - std::vector <armnn::BackendId> backends = {armnn::Compute::GpuAcc}; - Conv3DFp32SmallTest(backends); + Conv3DFp32SmallTest(); } -} //End of TEST_SUITE("Convolution3dTest_GpuAccTests") +} //End of TEST_SUITE("Convolution3dTest_Tests") #endif |