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author | Teresa Charlin <teresa.charlinreyes@arm.com> | 2023-03-14 12:10:28 +0000 |
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committer | Teresa Charlin <teresa.charlinreyes@arm.com> | 2023-03-28 11:41:55 +0100 |
commit | ad1b3d7518429e2d16a2695d9b0bbf81b6565ac9 (patch) | |
tree | a5b8e1ad68a2437f007338f0b6195ca5ed2bddc3 /delegate/test/ArgMinMaxTest.cpp | |
parent | 9cb3466b677a1048b8abb24661e92c4c83fdda04 (diff) | |
download | armnn-ad1b3d7518429e2d16a2695d9b0bbf81b6565ac9.tar.gz |
IVGCVSW-7555 Restructure Delegate
* New folders created:
* common is for common code where TfLite API is not used
* classic is for existing delegate implementations
* opaque is for new opaque delegate implementation,
* tests is for shared between existing Delegate and Opaque Delegate which have test utils to work which delegate to use.
* Existing delegate is built to libarmnnDelegate.so and opaque delegate is built as libarmnnOpaqueDelegate.so
* Opaque structure is introduced but no API is added yet.
* CmakeList.txt and delegate/CMakeList.txt have been modified and 2 new CmakeList.txt added
* Rename BUILD_ARMNN_TFLITE_DELEGATE as BUILD_CLASSIC_DELEGATE
* Rename BUILD_ARMNN_TFLITE_OPAQUE_DELEGATE as BUILD_OPAQUE_DELEGATE
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: Ib682b9ad0ac8d8acdc4ec6d9099bb0008a9fe8ed
Diffstat (limited to 'delegate/test/ArgMinMaxTest.cpp')
-rw-r--r-- | delegate/test/ArgMinMaxTest.cpp | 174 |
1 files changed, 174 insertions, 0 deletions
diff --git a/delegate/test/ArgMinMaxTest.cpp b/delegate/test/ArgMinMaxTest.cpp new file mode 100644 index 0000000000..1c0550313f --- /dev/null +++ b/delegate/test/ArgMinMaxTest.cpp @@ -0,0 +1,174 @@ +// +// Copyright © 2021, 2023 Arm Ltd and Contributors. All rights reserved. +// SPDX-License-Identifier: MIT +// + +#include "ArgMinMaxTestHelper.hpp" + +#include <armnn_delegate.hpp> + +#include <flatbuffers/flatbuffers.h> +#include <schema_generated.h> + +#include <doctest/doctest.h> + +namespace armnnDelegate +{ + +void ArgMaxFP32Test(std::vector<armnn::BackendId>& backends, int axisValue) +{ + // Set input data + std::vector<int32_t> inputShape { 1, 3, 2, 4 }; + std::vector<int32_t> outputShape { 1, 3, 4 }; + std::vector<int32_t> axisShape { 1 }; + + std::vector<float> inputValues = { 1.0f, 2.0f, 3.0f, 4.0f, + 5.0f, 6.0f, 7.0f, 8.0f, + + 10.0f, 20.0f, 30.0f, 40.0f, + 50.0f, 60.0f, 70.0f, 80.0f, + + 100.0f, 200.0f, 300.0f, 400.0f, + 500.0f, 600.0f, 700.0f, 800.0f }; + + std::vector<int32_t> expectedOutputValues = { 1, 1, 1, 1, + 1, 1, 1, 1, + 1, 1, 1, 1 }; + + ArgMinMaxTest<float, int32_t>(tflite::BuiltinOperator_ARG_MAX, + ::tflite::TensorType_FLOAT32, + backends, + inputShape, + axisShape, + outputShape, + inputValues, + expectedOutputValues, + axisValue, + ::tflite::TensorType_INT32); +} + +void ArgMinFP32Test(std::vector<armnn::BackendId>& backends, int axisValue) +{ + // Set input data + std::vector<int32_t> inputShape { 1, 3, 2, 4 }; + std::vector<int32_t> outputShape { 1, 3, 2 }; + std::vector<int32_t> axisShape { 1 }; + + std::vector<float> inputValues = { 1.0f, 2.0f, 3.0f, 4.0f, + 5.0f, 6.0f, 7.0f, 8.0f, + + 10.0f, 20.0f, 30.0f, 40.0f, + 50.0f, 60.0f, 70.0f, 80.0f, + + 100.0f, 200.0f, 300.0f, 400.0f, + 500.0f, 600.0f, 700.0f, 800.0f }; + + std::vector<int32_t> expectedOutputValues = { 0, 0, + 0, 0, + 0, 0 }; + + ArgMinMaxTest<float, int32_t>(tflite::BuiltinOperator_ARG_MIN, + ::tflite::TensorType_FLOAT32, + backends, + inputShape, + axisShape, + outputShape, + inputValues, + expectedOutputValues, + axisValue, + ::tflite::TensorType_INT32); +} + +void ArgMaxUint8Test(std::vector<armnn::BackendId>& backends, int axisValue) +{ + // Set input data + std::vector<int32_t> inputShape { 1, 1, 1, 5 }; + std::vector<int32_t> outputShape { 1, 1, 1 }; + std::vector<int32_t> axisShape { 1 }; + + std::vector<uint8_t> inputValues = { 5, 2, 8, 10, 9 }; + + std::vector<int32_t> expectedOutputValues = { 3 }; + + ArgMinMaxTest<uint8_t, int32_t>(tflite::BuiltinOperator_ARG_MAX, + ::tflite::TensorType_UINT8, + backends, + inputShape, + axisShape, + outputShape, + inputValues, + expectedOutputValues, + axisValue, + ::tflite::TensorType_INT32); +} + +TEST_SUITE("ArgMinMax_CpuRefTests") +{ + +TEST_CASE ("ArgMaxFP32Test_CpuRef_Test") +{ + std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef }; + ArgMaxFP32Test(backends, 2); +} + +TEST_CASE ("ArgMinFP32Test_CpuRef_Test") +{ + std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef }; + ArgMinFP32Test(backends, 3); +} + +TEST_CASE ("ArgMaxUint8Test_CpuRef_Test") +{ + std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef }; + ArgMaxUint8Test(backends, -1); +} + +} // TEST_SUITE("ArgMinMax_CpuRefTests") + +TEST_SUITE("ArgMinMax_CpuAccTests") +{ + +TEST_CASE ("ArgMaxFP32Test_CpuAcc_Test") +{ + std::vector<armnn::BackendId> backends = { armnn::Compute::CpuAcc }; + ArgMaxFP32Test(backends, 2); +} + +TEST_CASE ("ArgMinFP32Test_CpuAcc_Test") +{ + std::vector<armnn::BackendId> backends = { armnn::Compute::CpuAcc }; + ArgMinFP32Test(backends, 3); +} + +TEST_CASE ("ArgMaxUint8Test_CpuAcc_Test") +{ + std::vector<armnn::BackendId> backends = { armnn::Compute::CpuAcc }; + ArgMaxUint8Test(backends, -1); +} + +} // TEST_SUITE("ArgMinMax_CpuAccTests") + +TEST_SUITE("ArgMinMax_GpuAccTests") +{ + +TEST_CASE ("ArgMaxFP32Test_GpuAcc_Test") +{ + std::vector<armnn::BackendId> backends = { armnn::Compute::GpuAcc }; + ArgMaxFP32Test(backends, 2); +} + +TEST_CASE ("ArgMinFP32Test_GpuAcc_Test") +{ + std::vector<armnn::BackendId> backends = { armnn::Compute::GpuAcc }; + ArgMinFP32Test(backends, 3); +} + +TEST_CASE ("ArgMaxUint8Test_GpuAcc_Test") +{ + std::vector<armnn::BackendId> backends = { armnn::Compute::GpuAcc }; + ArgMaxUint8Test(backends, -1); +} + +} // TEST_SUITE("ArgMinMax_GpuAccTests") + +} // namespace armnnDelegate
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