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| author | Narumol Prangnawarat <narumol.prangnawarat@arm.com> | 2020-11-09 18:42:11 +0000 |
|---|---|---|
| committer | Narumol Prangnawarat <narumol.prangnawarat@arm.com> | 2020-11-10 17:00:23 +0000 |
| commit | 50c87d39173cb48fc216ccb585714b669b095611 (patch) | |
| tree | b819c3cd7bae2d4f408f7e354370d7c5199b6429 /delegate/src/DelegateUtils.hpp | |
| parent | 0d35a93d68e321e8c4b16baa8b9754b98cc9faf3 (diff) | |
| download | armnn-50c87d39173cb48fc216ccb585714b669b095611.tar.gz | |
IVGCVSW-5387 TfLiteDelegate: Implement the Pooling operators
* Implement MaxPool2d operators
* Add QAsymmS8 to armnn delegate
* Unit tests
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com>
Change-Id: I1815ade6ccda3e9331bd3a68e164be0f6947e9df
Diffstat (limited to 'delegate/src/DelegateUtils.hpp')
| -rw-r--r-- | delegate/src/DelegateUtils.hpp | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/delegate/src/DelegateUtils.hpp b/delegate/src/DelegateUtils.hpp index f12aee9d2b..729a8b4e98 100644 --- a/delegate/src/DelegateUtils.hpp +++ b/delegate/src/DelegateUtils.hpp @@ -317,7 +317,14 @@ armnn::TensorInfo GetTensorInfoForTfLiteTensor(const TfLiteTensor& tfLiteTensor) type = armnn::DataType::QAsymmU8; break; case kTfLiteInt8: - type = armnn::DataType::QSymmS8; + if (tfLiteTensor.params.zero_point == 0) + { + type = armnn::DataType::QSymmS8; + } + else + { + type = armnn::DataType::QAsymmS8; + } break; case kTfLiteInt16: type = armnn::DataType::QSymmS16; |