From 58bce688746f15e6365714e214dda45cc7706a41 Mon Sep 17 00:00:00 2001 From: Georgios Pinitas Date: Fri, 13 Nov 2020 11:38:58 +0000 Subject: COMPMID-3962: Add Logical And, Or, Not support on NEON Signed-off-by: Georgios Pinitas Change-Id: Iabcd94d1ed6fe8bb27ce93924c35e25f48f39cf1 Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4438 Reviewed-by: James Conroy Reviewed-by: Sang-Hoon Park Reviewed-by: Michalis Spyrou Comments-Addressed: Arm Jenkins Tested-by: Arm Jenkins --- tests/validation/reference/Logical.cpp | 136 +++++++++++++++++++++++++++++++++ 1 file changed, 136 insertions(+) create mode 100644 tests/validation/reference/Logical.cpp (limited to 'tests/validation/reference/Logical.cpp') diff --git a/tests/validation/reference/Logical.cpp b/tests/validation/reference/Logical.cpp new file mode 100644 index 0000000000..394525c392 --- /dev/null +++ b/tests/validation/reference/Logical.cpp @@ -0,0 +1,136 @@ +/* + * Copyright (c) 2020 Arm Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#include "tests/validation/reference/Logical.h" + +namespace arm_compute +{ +namespace test +{ +namespace validation +{ +namespace reference +{ +template +T logical_op(LogicalBinaryOperation op, T src1, T src2) +{ + switch(op) + { + case LogicalBinaryOperation::AND: + return src1 && src2; + case LogicalBinaryOperation::OR: + return src1 || src2; + case LogicalBinaryOperation::UNKNOWN: + default: + ARM_COMPUTE_ERROR_ON_MSG(true, "unknown logical binary operation is given"); + } + return false; +} + +template +struct BroadcastUnroll +{ + template + static void unroll(LogicalBinaryOperation op, + const SimpleTensor &src1, const SimpleTensor &src2, SimpleTensor &dst, + Coordinates &id_src1, Coordinates &id_src2, Coordinates &id_dst) + { + const bool src1_is_broadcast = (src1.shape()[dim - 1] != dst.shape()[dim - 1]); + const bool src2_is_broadcast = (src2.shape()[dim - 1] != dst.shape()[dim - 1]); + + id_src1.set(dim - 1, 0); + id_src2.set(dim - 1, 0); + id_dst.set(dim - 1, 0); +#if defined(_OPENMP) + #pragma omp parallel for +#endif /* _OPENMP */ + for(size_t i = 0; i < dst.shape()[dim - 1]; ++i) + { + BroadcastUnroll < dim - 1 >::unroll(op, src1, src2, dst, id_src1, id_src2, id_dst); + + id_src1[dim - 1] += !src1_is_broadcast; + id_src2[dim - 1] += !src2_is_broadcast; + ++id_dst[dim - 1]; + } + } +}; + +template <> +struct BroadcastUnroll<0> +{ + template + static void unroll(LogicalBinaryOperation op, const SimpleTensor &src1, const SimpleTensor &src2, SimpleTensor &dst, + Coordinates &id_src1, Coordinates &id_src2, Coordinates &id_dst) + { + dst[coord2index(dst.shape(), id_dst)] = logical_op(op, src1[coord2index(src1.shape(), id_src1)], src2[coord2index(src2.shape(), id_src2)]); + } +}; + +template +SimpleTensor logical_or(const SimpleTensor &src1, const SimpleTensor &src2) +{ + Coordinates id_src1{}; + Coordinates id_src2{}; + Coordinates id_dst{}; + SimpleTensor dst{ TensorShape::broadcast_shape(src1.shape(), src2.shape()), src1.data_type() }; + + BroadcastUnroll::unroll(LogicalBinaryOperation::OR, src1, src2, dst, id_src1, id_src2, id_dst); + + return dst; +} + +template +SimpleTensor logical_and(const SimpleTensor &src1, const SimpleTensor &src2) +{ + Coordinates id_src1{}; + Coordinates id_src2{}; + Coordinates id_dst{}; + SimpleTensor dst{ TensorShape::broadcast_shape(src1.shape(), src2.shape()), src1.data_type() }; + + BroadcastUnroll::unroll(LogicalBinaryOperation::AND, src1, src2, dst, id_src1, id_src2, id_dst); + + return dst; +} + +template +SimpleTensor logical_not(const SimpleTensor &src) +{ + SimpleTensor dst(src.shape(), src.data_type()); +#if defined(_OPENMP) + #pragma omp parallel for +#endif /* _OPENMP */ + for(int i = 0; i < src.num_elements(); ++i) + { + dst[i] = !src[i]; + } + + return dst; +} + +template SimpleTensor logical_or(const SimpleTensor &src1, const SimpleTensor &src2); +template SimpleTensor logical_and(const SimpleTensor &src1, const SimpleTensor &src2); +template SimpleTensor logical_not(const SimpleTensor &src1); +} // namespace reference +} // namespace validation +} // namespace test +} // namespace arm_compute \ No newline at end of file -- cgit v1.2.1