From 9285adb5ac8e28a9cc82ce708bb2975dc5a074dd Mon Sep 17 00:00:00 2001 From: Gian Marco Iodice Date: Thu, 5 Sep 2019 16:10:27 +0100 Subject: COMPMID-2599: Implement a new and generic depthwise convolution on OpenCL (Fp32/FP16-NHWC) Part 1 Change-Id: I5e1d27a7006199e9229e455a1df9bfc2ed4e8341 Signed-off-by: Gian Marco Iodice Reviewed-on: https://review.mlplatform.org/c/1898 Comments-Addressed: Arm Jenkins Reviewed-by: Giorgio Arena Tested-by: Arm Jenkins --- .../fixtures/DepthwiseConvolutionLayerFixture.h | 121 +++++++++++++++++++++ 1 file changed, 121 insertions(+) (limited to 'tests/validation/fixtures/DepthwiseConvolutionLayerFixture.h') diff --git a/tests/validation/fixtures/DepthwiseConvolutionLayerFixture.h b/tests/validation/fixtures/DepthwiseConvolutionLayerFixture.h index a3ac49eef1..2c9b31866b 100644 --- a/tests/validation/fixtures/DepthwiseConvolutionLayerFixture.h +++ b/tests/validation/fixtures/DepthwiseConvolutionLayerFixture.h @@ -301,6 +301,127 @@ protected: SimpleTensor _reference{}; }; +template +class DepthwiseConvolutionLayerNativeConfigurableValidationFixture : public DepthwiseConvolutionLayerValidationGenericFixture +{ +public: + template + void setup(size_t width, size_t height, size_t channel, size_t batch, Size2D kernel_size, size_t depth_multiplier, Size2D dilation, Size2D stride, bool padding_valid, DataType data_type, + DataLayout data_layout, const ActivationLayerInfo &act_info, unsigned int n0) + { + const TensorShape src_shape(width, height, channel, batch); + const TensorShape weights_shape(kernel_size.width, kernel_size.height, channel * depth_multiplier); + const TensorShape biases_shape(weights_shape.z()); + + PadStrideInfo conv_info; + if(padding_valid) + { + conv_info = PadStrideInfo(); + } + else + { + conv_info = calculate_same_pad(src_shape, weights_shape, PadStrideInfo(stride.width, stride.height), DataLayout::NCHW, dilation); + } + + _target = compute_target(src_shape, weights_shape, biases_shape, conv_info, dilation, depth_multiplier, data_type, data_layout, act_info, n0); + _reference = compute_reference(src_shape, weights_shape, biases_shape, conv_info, dilation, depth_multiplier, data_type, act_info); + } + +protected: + template + void fill(U &&tensor, int i) + { + switch(tensor.data_type()) + { + case DataType::F32: + { + std::uniform_real_distribution<> distribution(-1.0f, 1.0f); + library->fill(tensor, distribution, i); + break; + } + case DataType::F16: + { + std::uniform_real_distribution<> distribution(-1.0f, 1.0f); + library->fill(tensor, distribution, i); + break; + } + default: + library->fill_tensor_uniform(tensor, i); + } + } + + TensorType compute_target(TensorShape input_shape, TensorShape weights_shape, TensorShape biases_shape, PadStrideInfo &conv_info, Size2D dilation, + unsigned int depth_multiplier, const DataType data_type, const DataLayout data_layout, const ActivationLayerInfo &act_info, unsigned int n0) + { + if(data_layout == DataLayout::NHWC) + { + permute(input_shape, PermutationVector(2U, 0U, 1U)); + permute(weights_shape, PermutationVector(2U, 0U, 1U)); + } + + // Create tensors + TensorType src = create_tensor(input_shape, data_type, 1, QuantizationInfo(), data_layout); + TensorType weights = create_tensor(weights_shape, data_type, 1, QuantizationInfo(), data_layout); + TensorType biases = create_tensor(biases_shape, data_type, 1, QuantizationInfo(), data_layout); + TensorType dst = create_tensor(TensorShape(), data_type, 1, QuantizationInfo(), data_layout); + + DWCWeightsKernelInfo dwc_weights_info; + dwc_weights_info.n0 = n0; + + DWCKernelInfo dwc_info; + dwc_info.activation_info = act_info; + + // Create Depthwise Convolution configure function + FunctionType dwc; + dwc.configure(&src, &weights, &biases, &dst, dwc_weights_info, dwc_info, conv_info, depth_multiplier, dilation); + + ARM_COMPUTE_EXPECT(src.info()->is_resizable(), framework::LogLevel::ERRORS); + ARM_COMPUTE_EXPECT(weights.info()->is_resizable(), framework::LogLevel::ERRORS); + ARM_COMPUTE_EXPECT(biases.info()->is_resizable(), framework::LogLevel::ERRORS); + ARM_COMPUTE_EXPECT(dst.info()->is_resizable(), framework::LogLevel::ERRORS); + + // Allocate tensors + src.allocator()->allocate(); + weights.allocator()->allocate(); + biases.allocator()->allocate(); + dst.allocator()->allocate(); + + ARM_COMPUTE_EXPECT(!src.info()->is_resizable(), framework::LogLevel::ERRORS); + ARM_COMPUTE_EXPECT(!weights.info()->is_resizable(), framework::LogLevel::ERRORS); + ARM_COMPUTE_EXPECT(!biases.info()->is_resizable(), framework::LogLevel::ERRORS); + ARM_COMPUTE_EXPECT(!dst.info()->is_resizable(), framework::LogLevel::ERRORS); + + // Fill tensors + fill(AccessorType(src), 0); + fill(AccessorType(weights), 1); + fill(AccessorType(biases), 2); + + // Compute function + dwc.run(); + + return dst; + } + + SimpleTensor compute_reference(const TensorShape &input_shape, const TensorShape &weights_shape, const TensorShape &biases_shape, const PadStrideInfo &conv_info, + const Size2D &dilation, unsigned int depth_multiplier, const DataType data_type, const ActivationLayerInfo &act_info) + { + SimpleTensor src{ input_shape, data_type }; + SimpleTensor weights{ weights_shape, data_type }; + SimpleTensor biases{ biases_shape, data_type }; + + fill(src, 0); + fill(weights, 1); + fill(biases, 2); + + const TensorShape dst_shape = compute_depthwise_convolution_shape(TensorInfo(input_shape, 1, data_type), TensorInfo(weights_shape, 1, data_type), conv_info, + depth_multiplier, dilation); + return reference::activation_layer(reference::depthwise_convolution(src, weights, biases, dst_shape, conv_info, depth_multiplier, dilation), act_info); + } + + TensorType _target{}; + SimpleTensor _reference{}; +}; + template class DepthwiseConvolutionLayerValidationQuantizedFixture : public DepthwiseConvolutionLayerValidationGenericFixture { -- cgit v1.2.1