From cfa2bba98169cb5ab1945462514be1b6badf7d98 Mon Sep 17 00:00:00 2001 From: Georgios Pinitas Date: Thu, 27 Jun 2019 17:00:52 +0100 Subject: COMPMID-2178: Update GEMM assembly code. Perform offset reduction and requantization within the assembly wrapper. Change-Id: I5d5b3e1f6f9ef4c71805362c57f88ff199c027a3 Signed-off-by: Georgios Pinitas Reviewed-on: https://review.mlplatform.org/c/1541 Comments-Addressed: Pablo Marquez Reviewed-by: Gian Marco Iodice Comments-Addressed: Arm Jenkins Tested-by: Arm Jenkins --- src/core/NEON/kernels/arm_gemm/barrier.hpp | 83 + src/core/NEON/kernels/arm_gemm/gemm_fp16.cpp | 7 +- src/core/NEON/kernels/arm_gemm/gemm_fp32.cpp | 13 +- src/core/NEON/kernels/arm_gemm/gemm_hybrid.hpp | 14 +- .../kernels/arm_gemm/gemm_hybrid_quantized.hpp | 305 + .../NEON/kernels/arm_gemm/gemm_implementation.hpp | 123 +- src/core/NEON/kernels/arm_gemm/gemm_int16.cpp | 9 +- src/core/NEON/kernels/arm_gemm/gemm_int8.cpp | 39 +- .../NEON/kernels/arm_gemm/gemm_interleaved.hpp | 10 +- src/core/NEON/kernels/arm_gemm/gemm_native.hpp | 12 +- src/core/NEON/kernels/arm_gemm/gemm_quint8.cpp | 101 + src/core/NEON/kernels/arm_gemm/gemm_uint16.cpp | 9 +- src/core/NEON/kernels/arm_gemm/gemm_uint8.cpp | 37 +- src/core/NEON/kernels/arm_gemm/gemv_batched.hpp | 3 +- .../kernels/arm_gemm/gemv_native_transposed.hpp | 2 +- .../NEON/kernels/arm_gemm/gemv_pretransposed.hpp | 4 +- .../arm_gemm/kernels/a64_gemm_u16_12x8/generic.cpp | 6 +- .../kernels/a64_hybrid_s8s32_dot_16x4/a55.cpp | 4726 ++++++------ .../kernels/a64_hybrid_s8s32_dot_16x4/generic.cpp | 3474 ++++----- .../arm_gemm/kernels/a64_hybrid_u8u32_dot_16x4.hpp | 2 +- .../kernels/a64_hybrid_u8u32_dot_16x4/a55.cpp | 4726 ++++++------ .../kernels/a64_hybrid_u8u32_dot_16x4/generic.cpp | 3474 ++++----- .../arm_gemm/kernels/a64_sgemm_12x8/generic.cpp | 18 +- .../generic.cpp | 1674 ++--- .../arm_gemm/kernels/a64_sgemv_trans/generic.cpp | 151 +- .../kernels/a64_smallK_hybrid_s8s32_dot_4x6.hpp | 76 + .../a64_smallK_hybrid_s8s32_dot_4x6/a55.cpp | 3978 +++++++++++ .../a64_smallK_hybrid_s8s32_dot_4x6/generic.cpp | 3682 ++++++++++ .../kernels/a64_smallK_hybrid_s8s32_dot_4x8.hpp | 76 + .../a64_smallK_hybrid_s8s32_dot_4x8/a55.cpp | 2894 ++++++++ .../a64_smallK_hybrid_s8s32_dot_4x8/generic.cpp | 2686 +++++++ .../kernels/a64_smallK_hybrid_u8u32_dot_4x6.hpp | 76 + .../a64_smallK_hybrid_u8u32_dot_4x6/a55.cpp | 4122 +++++++++++ .../a64_smallK_hybrid_u8u32_dot_4x6/generic.cpp | 3826 ++++++++++ .../kernels/a64_smallK_hybrid_u8u32_dot_4x8.hpp | 76 + .../a64_smallK_hybrid_u8u32_dot_4x8/a55.cpp | 3086 ++++++++ .../a64_smallK_hybrid_u8u32_dot_4x8/generic.cpp | 2878 ++++++++ .../kernels/sve_hybrid_fp32_mla_4VLx4/generic.cpp | 2 +- .../kernels/sve_hybrid_u8u32_dot_4VLx4.hpp | 2 +- .../kernels/sve_smallK_hybrid_s8s32_dot_1VLx8.hpp | 73 + .../sve_smallK_hybrid_s8s32_dot_1VLx8/generic.cpp | 7501 ++++++++++++++++++++ .../kernels/sve_smallK_hybrid_u8u32_dot_1VLx8.hpp | 73 + .../sve_smallK_hybrid_u8u32_dot_1VLx8/generic.cpp | 7501 ++++++++++++++++++++ src/core/NEON/kernels/arm_gemm/merges/list.hpp | 5 +- .../arm_gemm/merges/sve_merge_fp32_3VLx8.hpp | 38 +- .../arm_gemm/merges/sve_merge_s32_3VLx8.hpp | 1348 ++++ .../arm_gemm/merges/sve_merge_u32_3VLx8.hpp | 1348 ++++ src/core/NEON/kernels/arm_gemm/misc.cpp | 34 + .../NEON/kernels/arm_gemm/quantize_wrapper.hpp | 240 + src/core/NEON/kernels/arm_gemm/quantized.cpp | 769 ++ src/core/NEON/kernels/arm_gemm/quantized.hpp | 42 + .../NEON/kernels/arm_gemm/std_transforms_fixed.hpp | 5 +- src/core/NEON/kernels/arm_gemm/transform.hpp | 7 + ...64_transpose_interleave_12way_half_to_float.hpp | 4 +- .../a64_transpose_interleave_24way_16bit.hpp | 6 +- src/core/NEON/kernels/arm_gemm/transforms/list.hpp | 2 - .../transforms/sve_interleave_8way_32bit.hpp | 458 +- .../transforms/sve_interleave_8way_block4_8bit.hpp | 204 +- src/core/NEON/kernels/arm_gemm/utils.hpp | 2 +- src/runtime/NEON/functions/NEGEMM.cpp | 8 +- .../NEON/functions/NEGEMMAssemblyDispatch.cpp | 129 +- .../NEON/functions/NEGEMMConvolutionLayer.cpp | 4 +- .../NEGEMMLowpAssemblyMatrixMultiplyCore.cpp | 4 +- .../functions/NEGEMMLowpMatrixMultiplyCore.cpp | 251 +- 64 files changed, 56845 insertions(+), 9693 deletions(-) create mode 100644 src/core/NEON/kernels/arm_gemm/barrier.hpp create mode 100644 src/core/NEON/kernels/arm_gemm/gemm_hybrid_quantized.hpp create mode 100644 src/core/NEON/kernels/arm_gemm/gemm_quint8.cpp create mode 100644 src/core/NEON/kernels/arm_gemm/kernels/a64_smallK_hybrid_s8s32_dot_4x6.hpp create mode 100644 src/core/NEON/kernels/arm_gemm/kernels/a64_smallK_hybrid_s8s32_dot_4x6/a55.cpp create mode 100644 src/core/NEON/kernels/arm_gemm/kernels/a64_smallK_hybrid_s8s32_dot_4x6/generic.cpp create mode 100644 src/core/NEON/kernels/arm_gemm/kernels/a64_smallK_hybrid_s8s32_dot_4x8.hpp create mode 100644 src/core/NEON/kernels/arm_gemm/kernels/a64_smallK_hybrid_s8s32_dot_4x8/a55.cpp create mode 100644 src/core/NEON/kernels/arm_gemm/kernels/a64_smallK_hybrid_s8s32_dot_4x8/generic.cpp create mode 100644 src/core/NEON/kernels/arm_gemm/kernels/a64_smallK_hybrid_u8u32_dot_4x6.hpp create mode 100644 src/core/NEON/kernels/arm_gemm/kernels/a64_smallK_hybrid_u8u32_dot_4x6/a55.cpp create mode 100644 src/core/NEON/kernels/arm_gemm/kernels/a64_smallK_hybrid_u8u32_dot_4x6/generic.cpp create mode 100644 src/core/NEON/kernels/arm_gemm/kernels/a64_smallK_hybrid_u8u32_dot_4x8.hpp create mode 100644 src/core/NEON/kernels/arm_gemm/kernels/a64_smallK_hybrid_u8u32_dot_4x8/a55.cpp create mode 100644 src/core/NEON/kernels/arm_gemm/kernels/a64_smallK_hybrid_u8u32_dot_4x8/generic.cpp create mode 100644 src/core/NEON/kernels/arm_gemm/kernels/sve_smallK_hybrid_s8s32_dot_1VLx8.hpp create mode 100644 src/core/NEON/kernels/arm_gemm/kernels/sve_smallK_hybrid_s8s32_dot_1VLx8/generic.cpp create mode 100644 src/core/NEON/kernels/arm_gemm/kernels/sve_smallK_hybrid_u8u32_dot_1VLx8.hpp create mode 100644 src/core/NEON/kernels/arm_gemm/kernels/sve_smallK_hybrid_u8u32_dot_1VLx8/generic.cpp create mode 100644 src/core/NEON/kernels/arm_gemm/merges/sve_merge_s32_3VLx8.hpp create mode 100644 src/core/NEON/kernels/arm_gemm/merges/sve_merge_u32_3VLx8.hpp create mode 100644 src/core/NEON/kernels/arm_gemm/misc.cpp create mode 100644 src/core/NEON/kernels/arm_gemm/quantize_wrapper.hpp create mode 100644 src/core/NEON/kernels/arm_gemm/quantized.cpp create mode 100644 src/core/NEON/kernels/arm_gemm/quantized.hpp (limited to 'src') diff --git a/src/core/NEON/kernels/arm_gemm/barrier.hpp b/src/core/NEON/kernels/arm_gemm/barrier.hpp new file mode 100644 index 0000000000..cfd1079f74 --- /dev/null +++ b/src/core/NEON/kernels/arm_gemm/barrier.hpp @@ -0,0 +1,83 @@ +/* + * Copyright (c) 2019 ARM Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#pragma once + +#ifndef NO_MULTI_THREADING + +#include + +namespace arm_gemm { + +class barrier { +private: + unsigned int m_threads; + + std::atomic m_waiters; + std::atomic m_leavers; + +public: + barrier(unsigned int threads) : m_threads(threads), m_waiters(0), m_leavers(0) { } + + /* This isn't safe if any thread is waiting... */ + void set_nthreads(unsigned int nthreads) { + m_threads = nthreads; + } + + void arrive_and_wait() { + m_waiters++; + + while (m_waiters != m_threads) { + ; /* spin */ + } + + unsigned int v = m_leavers.fetch_add(1); + + if (v == (m_threads - 1)) { + m_waiters -= m_threads; + m_leavers = 0; + } else { + while (m_leavers > 0) { + ; /* spin */ + } + } + } +}; + +} // namespace arm_gemm + +#else + +namespace arm_gemm { + +class barrier { +public: + barrier(unsigned int) { } + + void arrive_and_wait() { } + void set_nthreads(unsigned int ) { } +}; + +} // namespace arm_gemm + +#endif diff --git a/src/core/NEON/kernels/arm_gemm/gemm_fp16.cpp b/src/core/NEON/kernels/arm_gemm/gemm_fp16.cpp index 0927123f7c..8541d34de5 100644 --- a/src/core/NEON/kernels/arm_gemm/gemm_fp16.cpp +++ b/src/core/NEON/kernels/arm_gemm/gemm_fp16.cpp @@ -114,10 +114,9 @@ const GemmImplementation<__fp16, __fp16> *gemm_implementation_list<__fp16, __fp1 } /* Explicitly instantiate the external functions for these types. */ -template UniqueGemmCommon<__fp16, __fp16> gemm<__fp16, __fp16>(const GemmArgs<__fp16> &args); -template KernelDescription get_gemm_method<__fp16, __fp16>(const GemmArgs<__fp16> &args); -template bool method_is_compatible<__fp16, __fp16>(GemmMethod method, const GemmArgs<__fp16> &args); -template std::vector get_compatible_kernels<__fp16, __fp16> (const GemmArgs<__fp16> &args); +template UniqueGemmCommon<__fp16, __fp16> gemm<__fp16, __fp16, Nothing>(const GemmArgs<__fp16> &args, const Nothing &); +template KernelDescription get_gemm_method<__fp16, __fp16, Nothing>(const GemmArgs<__fp16> &args, const Nothing &); +template std::vector get_compatible_kernels<__fp16, __fp16, Nothing>(const GemmArgs<__fp16> &args, const Nothing &); } // namespace arm_gemm diff --git a/src/core/NEON/kernels/arm_gemm/gemm_fp32.cpp b/src/core/NEON/kernels/arm_gemm/gemm_fp32.cpp index 6869279bb9..dedcdb7655 100644 --- a/src/core/NEON/kernels/arm_gemm/gemm_fp32.cpp +++ b/src/core/NEON/kernels/arm_gemm/gemm_fp32.cpp @@ -73,7 +73,7 @@ static const GemmImplementation gemm_fp32_methods[] = }, #ifdef __ARM_FEATURE_SVE - // SVE smallk / native / hybrid methods +// SVE smallk / native / hybrid methods { GemmMethod::GEMM_HYBRID, "smallK_hybrid_fp32_mla_1VLx4", @@ -128,7 +128,7 @@ static const GemmImplementation gemm_fp32_methods[] = }, #ifdef __ARM_FEATURE_SVE - { +{ GemmMethod::GEMM_INTERLEAVED, "interleaved_fp32_mla_3VLx8", [](const GemmArgs &args) { return (args._Ksize>4); }, @@ -146,7 +146,7 @@ static const GemmImplementation gemm_fp32_methods[] = #endif // __aarch64__ #ifdef __arm__ - { +{ GemmMethod::GEMM_INTERLEAVED, "sgemm_8x6", nullptr, @@ -170,9 +170,8 @@ const GemmImplementation *gemm_implementation_list() } /* Explicitly instantiate the external functions for these types. */ -template UniqueGemmCommon gemm(const GemmArgs &args); -template KernelDescription get_gemm_method(const GemmArgs &args); -template bool method_is_compatible(GemmMethod method, const GemmArgs &args); -template std::vector get_compatible_kernels (const GemmArgs &args); +template UniqueGemmCommon gemm(const GemmArgs &args, const Nothing &); +template KernelDescription get_gemm_method(const GemmArgs &args, const Nothing &); +template std::vector get_compatible_kernels (const GemmArgs &args, const Nothing &); } // namespace arm_gemm diff --git a/src/core/NEON/kernels/arm_gemm/gemm_hybrid.hpp b/src/core/NEON/kernels/arm_gemm/gemm_hybrid.hpp index 82e0625b68..a744376393 100644 --- a/src/core/NEON/kernels/arm_gemm/gemm_hybrid.hpp +++ b/src/core/NEON/kernels/arm_gemm/gemm_hybrid.hpp @@ -108,7 +108,7 @@ class GemmHybrid : public GemmCommon { // n_block: Work out how many rows (of length k_block) will fit in the L2 // Don't allocate more than 90% of the L2 to allow for overheads, and subtract off the L1 contents. unsigned int n_block = (((L2_size * 9) / 10) - (k_block * sizeof(Toi) * (strategy::out_width() + strategy::out_height()))) / - (sizeof(Toi) * k_block); + (sizeof(Toi) * k_block); // Needs to be (at least a single) multiple of the kernel output width. n_block /= strategy::out_width(); @@ -128,11 +128,11 @@ public: /* Constructor */ GemmHybrid(const GemmArgs &args) - : _ci(args._ci), _Msize(args._Msize), _Nsize(args._Nsize), _Ksize(args._Ksize), - _nbatches(args._nbatches), _nmulti(args._nmulti), _trB(args._trB), _beta(args._beta), - _k_block(compute_k_block(args)), _n_block(compute_n_block(args)), - _Mround(roundup(args._Msize, strategy::out_height())), - _window_range(iceildiv(args._Msize, strategy::out_height()), _nbatches, iceildiv(_Nsize, _n_block), _nmulti) { } + : _ci(args._ci), _Msize(args._Msize), _Nsize(args._Nsize), _Ksize(args._Ksize), + _nbatches(args._nbatches), _nmulti(args._nmulti), _trB(args._trB), _beta(args._beta), + _k_block(compute_k_block(args)), _n_block(compute_n_block(args)), + _Mround(roundup(args._Msize, strategy::out_height())), + _window_range(iceildiv(args._Msize, strategy::out_height()), _nbatches, iceildiv(_Nsize, _n_block), _nmulti) { } // Interface implementation - Compulsory functions unsigned int get_window_size() const override { @@ -190,7 +190,7 @@ public: b_panel, this->_Cptr + (multi * this->_C_multi_stride) + (batch * this->_C_batch_stride) + (m_start * this->_ldc) + n0, this->_ldc, (k0 == 0) ? _beta : static_cast(1), - (m_end - m_start), (nmax - n0), kern_k); + (m_end - m_start), (nmax - n0), kmax-k0); } while (p.next_dim1()); } } diff --git a/src/core/NEON/kernels/arm_gemm/gemm_hybrid_quantized.hpp b/src/core/NEON/kernels/arm_gemm/gemm_hybrid_quantized.hpp new file mode 100644 index 0000000000..ab419e2216 --- /dev/null +++ b/src/core/NEON/kernels/arm_gemm/gemm_hybrid_quantized.hpp @@ -0,0 +1,305 @@ +/* + * Copyright (c) 2017-2019 ARM Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#pragma once + +#include + +#include + +#include "arm_gemm.hpp" +#include "ndrange.hpp" +#include "utils.hpp" + +#include "mergeresults.hpp" +#include "transform.hpp" + +#ifdef CYCLE_PROFILING +#include "profiler.hpp" +#endif + +namespace arm_gemm { + +// Implementation of the GemmCommon abstract class. +template +class GemmHybridQuantized : public GemmCommon { + typedef typename strategy::operand_type Toi; + typedef typename strategy::result_type Tri; + + /* const properties set by constructor */ + const CPUInfo * const _ci; + + const unsigned int _Msize; + const unsigned int _Nsize; + const unsigned int _Ksize; + + const unsigned int _nbatches; + const unsigned int _nmulti; + + const bool _trB; + + const Tr _beta; + + /* Blocking info */ + const unsigned int _k_block; + const unsigned int _n_block; + const unsigned int _Mround; + + /* Pretransposed buffer. */ + const Toi *_B_transposed=nullptr; + + const NDRange<4> _window_range; + + ARequantizeLayer32 _qp; + int32_t *row_bias = nullptr; + int32_t *col_bias = nullptr; + + void *working_space = nullptr; + + unsigned int _nthreads; + + unsigned int get_col_sum_size() const { + return _Nsize * _nmulti * sizeof(int32_t); + } + + static unsigned int compute_k_block(const GemmArgs &args) { + // We don't support K blocks as we only temporarily store 32 bit results. + return args._Ksize; + + if (args._cfg && args._cfg->inner_block_size) { + return args._cfg->inner_block_size; + } + + const unsigned int L1_size = args._ci->get_L1_cache_size(); + + // k_block: Find out how much of the larger array can be loaded into half the cache. + // This should account for associative caches. + unsigned int k_block = (L1_size / 2) / (sizeof(Toi) * (std::max(strategy::out_width(), strategy::out_height()))); + + // Needs to be (at least a single) multiple of the K unroll level. + k_block /= strategy::k_unroll(); + k_block = std::max(k_block, 1U) * strategy::k_unroll(); + + // Now tune to presented problem size; this is how many blocks we need. + unsigned int numk_blocks = iceildiv(args._Ksize, k_block); + + // So divide the space equally into that many blocks. + k_block = iceildiv(args._Ksize, numk_blocks); + + // And round UP to the K unroll level required. + k_block = roundup(k_block, strategy::k_unroll()); + + return k_block; + } + + static unsigned int compute_n_block(const GemmArgs &args) { + if (args._cfg && args._cfg->outer_block_size) { + return args._cfg->outer_block_size; + } + + const unsigned int k_block = compute_k_block(args); + const unsigned int L2_size = args._ci->get_L2_cache_size(); + + // n_block: Work out how many rows (of length k_block) will fit in the L2 + // Don't allocate more than 90% of the L2 to allow for overheads, and subtract off the L1 contents. + unsigned int n_block = (((L2_size * 9) / 10) - (k_block * sizeof(Toi) * (strategy::out_width() + strategy::out_height()))) / + (sizeof(Toi) * k_block); + + // Needs to be (at least a single) multiple of the kernel output width. + n_block /= strategy::out_width(); + n_block = std::max(n_block, 1U) * strategy::out_width(); + + // And tune to the presented problem size. + unsigned int numblocks = iceildiv(args._Nsize, n_block); + n_block = iceildiv(args._Nsize, numblocks); + n_block = roundup(n_block, strategy::out_width()); + + return n_block; + } + +public: + GemmHybridQuantized(GemmHybridQuantized &) = delete; + GemmHybridQuantized & operator= (GemmHybridQuantized &) = delete; + + /* Constructor */ + GemmHybridQuantized(const GemmArgs &args, const ARequantizeLayer32 &qp) + : _ci(args._ci), _Msize(args._Msize), _Nsize(args._Nsize), _Ksize(args._Ksize), + _nbatches(args._nbatches), _nmulti(args._nmulti), _trB(args._trB), _beta(args._beta), + _k_block(compute_k_block(args)), _n_block(compute_n_block(args)), + _Mround(roundup(args._Msize, strategy::out_height())), + _window_range(iceildiv(args._Msize, strategy::out_height()), _nbatches, iceildiv(_Nsize, _n_block), _nmulti), + _qp (qp), _nthreads(args._maxthreads) { } + + // Interface implementation - Compulsory functions + unsigned int get_window_size() const override { + return _window_range.total_size(); + } + + // This kernel can always be dynamically scheduled. + bool supports_dynamic_scheduling() const override { + return true; + } + + // Execute + void execute(unsigned int start, unsigned int end, int threadid) override { +#ifdef CYCLE_PROFILING + profiler prof; +#endif + strategy strat(_ci); + + uintptr_t working_int = reinterpret_cast(working_space); + + Tri *result_buffer = reinterpret_cast(working_int + (threadid * strategy::out_height() * _Nsize * sizeof(Tri))); + + /* Make sure we've been set up correctly. */ + assert(_B_transposed); + static_assert(std::is_same::value, "gemm_native: Operand types must be the same."); + + /* For now, each work item implies all the K for a given output + * pixel (so we don't need to synchronize access to the output + * array). So separate the loop over K blocks here. */ + for (unsigned int k0=0; k0<_Ksize; k0+=_k_block) { + unsigned int kmax = std::min(k0 + _k_block, _Ksize); + unsigned int kern_k = roundup(kmax-k0, strategy::k_unroll()); + + auto p = _window_range.iterator(start, end); + + if (p.done()) { + return; + } + + do { + const unsigned int m_start = p.dim(0) * strategy::out_height(); + const unsigned int m_end = std::min((p.dim(0) + 1) * strategy::out_height(), _Msize); + const unsigned int batch = p.dim(1); + const unsigned int n0 = p.dim(2) * _n_block; + const unsigned int nmax = std::min(n0 + _n_block, _Nsize); + const unsigned int multi = p.dim(3); + + int32_t local_row_sums[strategy::out_height()]; + + const Toi *b_panel = _B_transposed + + (multi * roundup(_Nsize, strategy::out_width()) * roundup(_Ksize, strategy::k_unroll())) + + (k0 * roundup(_Nsize, strategy::out_width())) + + (n0 * kern_k); + + { +#ifdef CYCLE_PROFILING + auto p = prof.ScopedProfiler(PROFILE_KERNEL, (m_end - m_start) * kern_k * roundup(nmax-n0, strategy::out_width())); +#endif + strat.kernel(this->_Aptr + (multi * this->_A_multi_stride) + (batch * this->_A_batch_stride) + (m_start * this->_lda) + k0, this->_lda, + b_panel, + result_buffer, this->_Nsize, + (k0 == 0) ? _beta : static_cast(1), + (m_end - m_start), (nmax - n0), kern_k); + } + + { +#ifdef CYCLE_PROFILING + auto p = prof.ScopedProfiler(PROFILE_ROWSUMS, (m_end - m_start) * _Ksize); +#endif + compute_row_sums(_qp, _Ksize, (m_end - m_start), + this->_Aptr + (multi * this->_A_multi_stride) + (batch * this->_A_batch_stride) + (m_start * this->_lda), this->_lda, + local_row_sums); +// row_bias + (multi * _nbatches * _Msize) + (batch * _Msize) + m_start); + } + + { +#ifdef CYCLE_PROFILING + auto p = prof.ScopedProfiler(PROFILE_QUANTIZE, (m_end - m_start) * _Nsize); +#endif + + requantize_block_32(_qp, (nmax - n0), (m_end - m_start), result_buffer, (nmax - n0), + this->_Cptr + (multi * this->_C_multi_stride) + (batch * this->_C_batch_stride) + (m_start * this->_ldc) + n0, this->_ldc, +// row_bias + (multi * _nbatches * _Msize) + (batch * _Msize) + m_start, col_bias); + local_row_sums, col_bias + (multi * _Nsize) + n0); + } + } while (p.next_dim0()); + } + } + + // Working space needed for intermediate result buffers. + size_t get_working_size() const override { + return (_nthreads * strategy::out_height() * _Nsize * sizeof(Tri)); + } + + void set_working_space(void *buffer) override { + working_space = buffer; + } + + // Interface implementation - pretransposed + bool B_is_pretransposed() const override { + return true; + } + + bool B_pretranspose_required() const override { + return (_B_transposed==nullptr); + } + + size_t get_B_pretransposed_array_size() const override { + return get_col_sum_size() + (roundup(_Nsize, strategy::out_width()) * roundup(_Ksize, strategy::k_unroll()) * _nmulti * sizeof(Toi)); + } + + void pretranspose_B_array(void *in_buffer, const To *B, const int ldb, const int B_multi_stride) override { + col_bias = reinterpret_cast(in_buffer); + + for (unsigned int i=0; i<_nmulti; i++) { + compute_col_sums(_qp, _Nsize, _Ksize, B + (i * B_multi_stride), ldb, col_bias + (i * _Nsize), _Ksize, 0); + } + + uintptr_t buffer_int = reinterpret_cast(in_buffer); + Toi *buffer = reinterpret_cast(buffer_int + get_col_sum_size()); + _B_transposed = buffer; + strategy strat(_ci); + + for (unsigned int multi=0; multi<_nmulti; multi++) { + for (unsigned int k0=0; k0<_Ksize; k0+=_k_block) { + const unsigned int kmax = std::min(k0 + _k_block, _Ksize); + const unsigned int k_size = roundup(kmax-k0, strategy::k_unroll()); + + for (unsigned int x0=0; x0<_Nsize; x0+=_n_block) { + const unsigned int xmax = std::min(x0+_n_block, _Nsize); + + const unsigned int size = roundup(xmax-x0, strategy::out_width()) * k_size; + + strat.transforms.PrepareB( buffer, B + (multi * B_multi_stride), ldb, + x0, xmax, k0, kmax, _trB); + + buffer += size; + } + } + } + } + + void set_pretransposed_B_data(void *in_buffer) override { + uintptr_t buffer_int = reinterpret_cast(in_buffer); + _B_transposed = reinterpret_cast(buffer_int + get_col_sum_size()); + col_bias = reinterpret_cast(in_buffer); + } + + void set_quantized_bias(const int32_t *bias) override { + _qp.bias = bias; + } +}; + +} // namespace arm_gemm diff --git a/src/core/NEON/kernels/arm_gemm/gemm_implementation.hpp b/src/core/NEON/kernels/arm_gemm/gemm_implementation.hpp index d952140959..55d72f88cb 100644 --- a/src/core/NEON/kernels/arm_gemm/gemm_implementation.hpp +++ b/src/core/NEON/kernels/arm_gemm/gemm_implementation.hpp @@ -28,21 +28,77 @@ namespace arm_gemm { -template +/* Structure describing an implementation. For each supported combination + * of types, a static list of these structures is built up to describe the + * implementations available. + */ +template struct GemmImplementation { + const GemmMethod method; + const char * name; + std::function &, const OutputStage &)> is_supported; + std::function &, const OutputStage &)> is_recommended; + std::function *(const GemmArgs &, const OutputStage &)> instantiate; + + bool do_is_supported(const GemmArgs &args, const OutputStage &os) const { + if (is_supported != nullptr) { + return is_supported(args, os); + } else { + return true; + } + } + + bool do_is_recommended(const GemmArgs &args, const OutputStage &os) const { + if (is_recommended != nullptr) { + return is_recommended(args, os); + } else { + return true; + } + } + + GemmCommon *do_instantiate(const GemmArgs &args, const OutputStage &os) const { + return instantiate(args, os); + } +}; + +/* Slightly different version of above for straightforward GEMMs with no + * output stage, so the std::functions there don't have to deal with the + * unnecessary second argument. */ +template +struct GemmImplementation { const GemmMethod method; const char * name; std::function &)> is_supported; std::function &)> is_recommended; std::function *(const GemmArgs &)> instantiate; + + bool do_is_supported(const GemmArgs &args, const Nothing &) const { + if (is_supported != nullptr) { + return is_supported(args); + } else { + return true; + } + } + + bool do_is_recommended(const GemmArgs &args, const Nothing &) const { + if (is_recommended != nullptr) { + return is_recommended(args); + } else { + return true; + } + } + + GemmCommon *do_instantiate(const GemmArgs &args, const Nothing &) const { + return instantiate(args); + } }; /* "Master" function implemented for each valid combination of types. * Returns a list of GEMM implementation descriptors for processing by the * other functions, terminated by an implementation with * method==GemmMethod::DEFAULT. */ -template -const GemmImplementation *gemm_implementation_list(); +template +const GemmImplementation *gemm_implementation_list(); /* * Select a GEMM implementation for the given arguments. @@ -59,16 +115,16 @@ const GemmImplementation *gemm_implementation_list(); * this function returns false and doesn't touch the provided pointer * reference. */ -template -bool find_implementation(const GemmArgs &args, const GemmImplementation * &impl) { - auto gemms = gemm_implementation_list(); +template +bool find_implementation(const GemmArgs &args, const OutputStage &os, const GemmImplementation * &impl) { + auto gemms = gemm_implementation_list(); const GemmConfig *cfg = args._cfg; - const GemmImplementation *saved_impl = nullptr; + const GemmImplementation *saved_impl = nullptr; - for (auto i = gemms; i->method != GemmMethod::DEFAULT; i++) { + for (const GemmImplementation *i = gemms; i->method != GemmMethod::DEFAULT; i++) { /* Skip if this implementation doesn't support these args. */ - if (i->is_supported != nullptr && !i->is_supported(args)) { + if (!i->do_is_supported(args, os)) { continue; } @@ -91,7 +147,7 @@ bool find_implementation(const GemmArgs &args, const GemmImplementationis_recommended != nullptr && !i->is_recommended(args)) { + if (!i->do_is_recommended(args, os)) { continue; } @@ -111,19 +167,19 @@ bool find_implementation(const GemmArgs &args, const GemmImplementation -std::vector get_compatible_kernels(const GemmArgs &args) { +template +std::vector get_compatible_kernels(const GemmArgs &args, const OutputStage &os) { std::vector res; /* Find out what the default implementation in so we can set the flag accordingly later. */ - const GemmImplementation *default_impl; - find_implementation(args, default_impl); + const GemmImplementation *default_impl; + find_implementation(args, os, default_impl); - auto gemms = gemm_implementation_list(); + auto gemms = gemm_implementation_list(); - for (auto i = gemms; i->method != GemmMethod::DEFAULT; i++) { + for (const GemmImplementation *i = gemms; i->method != GemmMethod::DEFAULT; i++) { /* Check that this implementation supports the presented problem. */ - if (i->is_supported != nullptr && !i->is_supported(args)) { + if (!i->do_is_supported(args, os)) { continue; } @@ -133,22 +189,22 @@ std::vector get_compatible_kernels(const GemmArgs &args return res; } -template -UniqueGemmCommon gemm(const GemmArgs &args) { - const GemmImplementation *impl; +template +UniqueGemmCommon gemm(const GemmArgs &args, const OutputStage &os) { + const GemmImplementation *impl; - if (find_implementation(args, impl)) { - return UniqueGemmCommon(impl->instantiate(args)); + if (find_implementation(args, os, impl)) { + return UniqueGemmCommon(impl->do_instantiate(args, os)); } return UniqueGemmCommon(nullptr); } -template -KernelDescription get_gemm_method(const GemmArgs &args) { - const GemmImplementation *impl; +template +KernelDescription get_gemm_method(const GemmArgs &args, const OutputStage &os) { + const GemmImplementation *impl; - if (find_implementation(args, impl)) { + if (find_implementation(args, os, impl)) { return KernelDescription(impl->method, impl->name); } @@ -156,17 +212,4 @@ KernelDescription get_gemm_method(const GemmArgs &args) { return KernelDescription(); } -template -bool method_is_compatible(GemmMethod method, const GemmArgs &args) { - /* Determine if the method is valid by attempting to obtain an implementation specifying this method. */ - GemmConfig cfg(method); - GemmArgs myargs = args; - - myargs._cfg = &cfg; - - const GemmImplementation *impl; - - return find_implementation(myargs, impl); -} - -} // namespace arm_gemm \ No newline at end of file +} // namespace arm_gemm diff --git a/src/core/NEON/kernels/arm_gemm/gemm_int16.cpp b/src/core/NEON/kernels/arm_gemm/gemm_int16.cpp index 0db0654f81..8062c3092a 100644 --- a/src/core/NEON/kernels/arm_gemm/gemm_int16.cpp +++ b/src/core/NEON/kernels/arm_gemm/gemm_int16.cpp @@ -55,11 +55,10 @@ const GemmImplementation *gemm_implementation_list gemm(const GemmArgs &args); -template KernelDescription get_gemm_method(const GemmArgs &args); -template bool method_is_compatible(GemmMethod method, const GemmArgs &args); -template std::vector get_compatible_kernels (const GemmArgs &args); +template UniqueGemmCommon gemm(const GemmArgs &args, const Nothing &); +template KernelDescription get_gemm_method(const GemmArgs &args, const Nothing &); +template std::vector get_compatible_kernels (const GemmArgs &args, const Nothing &); } // namespace arm_gemm -#endif // __aarch64__ \ No newline at end of file +#endif // __aarch64__ diff --git a/src/core/NEON/kernels/arm_gemm/gemm_int8.cpp b/src/core/NEON/kernels/arm_gemm/gemm_int8.cpp index 9e49df1c28..53749fd4f6 100644 --- a/src/core/NEON/kernels/arm_gemm/gemm_int8.cpp +++ b/src/core/NEON/kernels/arm_gemm/gemm_int8.cpp @@ -34,18 +34,28 @@ #include "kernels/a64_gemm_s8_12x8.hpp" #include "kernels/a64_gemm_s8_4x4.hpp" #include "kernels/a64_hybrid_s8s32_dot_16x4.hpp" +#include "kernels/a64_smallK_hybrid_s8s32_dot_4x6.hpp" +#include "kernels/a64_smallK_hybrid_s8s32_dot_4x8.hpp" #include "kernels/sve_hybrid_s8s32_dot_4VLx4.hpp" #include "kernels/sve_interleaved_s8s32_dot_3VLx8.hpp" #include "kernels/sve_native_s8s32_dot_4VLx4.hpp" +#include "kernels/sve_smallK_hybrid_s8s32_dot_1VLx8.hpp" namespace arm_gemm { static const GemmImplementation gemm_s8_methods[] = { #ifdef __ARM_FEATURE_SVE +{ + GemmMethod::GEMM_HYBRID, + "smallK_hybrid_s8s32_dot_1VLx8", + [](const GemmArgs &args) { return args._Ksize<=64 && args._alpha==1 && args._beta==0 && !args._trA && args._pretransposed_hint; }, + nullptr, + [](const GemmArgs &args) { return new GemmHybrid(args); } +}, { GemmMethod::GEMM_HYBRID, "hybrid_s8s32_dot_4VLx4", - [](const GemmArgs &args) { return args._Ksize>=16 && args._alpha==1 && !args._trA && !args._trB && args._pretransposed_hint; }, + [](const GemmArgs &args) { return args._Ksize>=16 && args._alpha==1 && !args._trA && args._pretransposed_hint; }, [](const GemmArgs &args) { return ((args._Ksize <= 128) && (args._Nsize <= 128)) || ((args._nmulti > 1) && ((args._Msize / args._maxthreads) < 8)); }, [](const GemmArgs &args) { return new GemmHybrid(args); } }, @@ -59,15 +69,29 @@ static const GemmImplementation gemm_s8_methods[] = { { GemmMethod::GEMM_INTERLEAVED, "interleaved_s8s32_dot_3VLx8", - [](const GemmArgs &args) { return (args._Ksize>4); }, + [](const GemmArgs &args) { return (args._Ksize>4) && args._alpha==1 && (args._beta == 0 || args._beta==1); }, nullptr, [](const GemmArgs &args) { return new GemmInterleaved(args); } }, #endif +{ + GemmMethod::GEMM_HYBRID, + "smallK_hybrid_s8s32_dot_4x8", + [](const GemmArgs &args) { return args._ci->has_dotprod() && (args._Nsize % 4 == 0) && (args._Ksize<=32) && args._alpha==1 && args._beta==0 && !args._trA && args._pretransposed_hint; }, + nullptr, + [](const GemmArgs &args) { return new GemmHybrid(args); } +}, +{ + GemmMethod::GEMM_HYBRID, + "smallK_hybrid_s8s32_dot_4x6", + [](const GemmArgs &args) { return args._ci->has_dotprod() && (args._Nsize % 4 == 0) && (args._Ksize>32) && (args._Ksize<=64) && args._alpha==1 && args._beta==0 && !args._trA && args._pretransposed_hint; }, + nullptr, + [](const GemmArgs &args) { return new GemmHybrid(args); } +}, { GemmMethod::GEMM_HYBRID, "hybrid_s8s32_dot_16x4", - [](const GemmArgs &args) { return args._ci->has_dotprod() && args._Ksize>=16 && !args._trA && !args._trB && args._pretransposed_hint; }, + [](const GemmArgs &args) { return args._ci->has_dotprod() && args._Ksize>=16 && args._alpha==1 && !args._trA && !args._trB && args._pretransposed_hint; }, [](const GemmArgs &args) { return args._Nsize<=256 && args._Ksize>128; }, [](const GemmArgs &args) { return new GemmHybrid(args); } }, @@ -100,11 +124,10 @@ const GemmImplementation *gemm_implementation_list gemm(const GemmArgs &args); -template KernelDescription get_gemm_method(const GemmArgs &args); -template bool method_is_compatible(GemmMethod method, const GemmArgs &args); -template std::vector get_compatible_kernels (const GemmArgs &args); +template UniqueGemmCommon gemm(const GemmArgs &args, const Nothing &); +template KernelDescription get_gemm_method(const GemmArgs &args, const Nothing &); +template std::vector get_compatible_kernels (const GemmArgs &args, const Nothing &); } // namespace arm_gemm -#endif // __aarch64__ \ No newline at end of file +#endif // __aarch64__ diff --git a/src/core/NEON/kernels/arm_gemm/gemm_interleaved.hpp b/src/core/NEON/kernels/arm_gemm/gemm_interleaved.hpp index a7731666ec..faff9acd2e 100644 --- a/src/core/NEON/kernels/arm_gemm/gemm_interleaved.hpp +++ b/src/core/NEON/kernels/arm_gemm/gemm_interleaved.hpp @@ -318,10 +318,10 @@ public: /* Constructor */ GemmInterleaved(const GemmArgs &args) - : _ci(args._ci), _Msize(args._Msize), _Nsize(args._Nsize), _Ksize(args._Ksize), - _nbatches(args._nbatches), _nmulti(args._nmulti), _trA(args._trA), _trB(args._trB), - _alpha(args._alpha), _beta(args._beta), _maxthreads(args._maxthreads), _nthreads(args._maxthreads), - _pretransposed(args._pretransposed_hint) { + : _ci(args._ci), _Msize(args._Msize), _Nsize(args._Nsize), _Ksize(args._Ksize), + _nbatches(args._nbatches), _nmulti(args._nmulti), _trA(args._trA), _trB(args._trB), + _alpha(args._alpha), _beta(args._beta), _maxthreads(args._maxthreads), _nthreads(args._maxthreads), + _pretransposed(args._pretransposed_hint) { const unsigned int L1_size = _ci->get_L1_cache_size(); const unsigned int L2_size = _ci->get_L2_cache_size(); @@ -356,7 +356,7 @@ public: // x_block: Work out how many rows (of length k_block) will fit in the L2 // Don't allocate more than 90% of the L2 to allow for overheads, and subtract off the L1 contents. _x_block = (((L2_size * 9) / 10) - (_k_block * sizeof(Toi) * (strategy::out_width() + strategy::out_height()))) / - (sizeof(Toi) * _k_block); + (sizeof(Toi) * _k_block); // Needs to be (at least a single) multiple of the kernel output width. _x_block /= strategy::out_width(); diff --git a/src/core/NEON/kernels/arm_gemm/gemm_native.hpp b/src/core/NEON/kernels/arm_gemm/gemm_native.hpp index 98516b1ca6..ba9163b29b 100644 --- a/src/core/NEON/kernels/arm_gemm/gemm_native.hpp +++ b/src/core/NEON/kernels/arm_gemm/gemm_native.hpp @@ -80,11 +80,11 @@ public: GemmNative & operator= (GemmNative &) = delete; GemmNative(const GemmArgs &args) - : _Msize(args._Msize), _Nsize(args._Nsize), _Ksize(args._Ksize), - _nbatches(args._nbatches), _nmultis(args._nmulti), - _beta(args._beta), _ci(args._ci), - _k_block(compute_k_block(args)), _n_block(compute_n_block(args)), - _window_range(iceildiv(_Msize, strategy::out_height()), _nbatches, iceildiv(_Nsize, _n_block), _nmultis) { } + : _Msize(args._Msize), _Nsize(args._Nsize), _Ksize(args._Ksize), + _nbatches(args._nbatches), _nmultis(args._nmulti), + _beta(args._beta), _ci(args._ci), + _k_block(compute_k_block(args)), _n_block(compute_n_block(args)), + _window_range(iceildiv(_Msize, strategy::out_height()), _nbatches, iceildiv(_Nsize, _n_block), _nmultis) { } // Window is amount per multi multiplied by total number of multis. unsigned int get_window_size() const override { @@ -132,4 +132,4 @@ public: } }; -} // namespace arm_gemm \ No newline at end of file +} // namespace arm_gemm diff --git a/src/core/NEON/kernels/arm_gemm/gemm_quint8.cpp b/src/core/NEON/kernels/arm_gemm/gemm_quint8.cpp new file mode 100644 index 0000000000..2c4af7a2b3 --- /dev/null +++ b/src/core/NEON/kernels/arm_gemm/gemm_quint8.cpp @@ -0,0 +1,101 @@ +/* + * Copyright (c) 2019 Arm Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#include "arm_gemm.hpp" + +#include "kernels/a64_hybrid_u8u32_dot_16x4.hpp" +#include "kernels/a64_smallK_hybrid_u8u32_dot_4x6.hpp" +#include "kernels/a64_smallK_hybrid_u8u32_dot_4x8.hpp" +#include "kernels/sve_hybrid_u8u32_dot_4VLx4.hpp" +#include "kernels/sve_smallK_hybrid_u8u32_dot_1VLx8.hpp" + +#include "gemm_hybrid_quantized.hpp" +#include "quantize_wrapper.hpp" + +namespace arm_gemm { + +static const GemmImplementation gemm_quint8_methods[] = +{ +#ifdef __ARM_FEATURE_SVE +{ + GemmMethod::GEMM_HYBRID_QUANTIZED, + "smallK_hybrid_u8u32_dot_1VLx8", + [](const GemmArgs &args, const ARequantizeLayer32 &) { return args._Ksize<=64 && args._alpha==1 && args._beta==0 && !args._trA && args._pretransposed_hint; }, + nullptr, + [](const GemmArgs &args, const ARequantizeLayer32 &qp) { return new GemmHybridQuantized(args, qp); } +}, +{ + GemmMethod::GEMM_HYBRID_QUANTIZED, + "hybrid_u8u32_dot_4VLx4", + [](const GemmArgs &args, const ARequantizeLayer32 &) { return args._Ksize>=16 && args._alpha==1 && !args._trA && !args._trB && args._pretransposed_hint; }, + [](const GemmArgs &args, const ARequantizeLayer32 &) { return ((args._Ksize <= 128) && (args._Nsize <= 128)) || ((args._nmulti > 1) && ((args._Msize / args._maxthreads) < 8)); }, + [](const GemmArgs &args, const ARequantizeLayer32 &qp) { return new GemmHybridQuantized(args, qp); } +}, +#endif +{ + GemmMethod::GEMM_HYBRID_QUANTIZED, + "smallK_hybrid_u8u32_dot_4x8", + [](const GemmArgs &args, const ARequantizeLayer32 &) { return args._ci->has_dotprod() && (args._Nsize % 4 == 0) && (args._Ksize<=32) && args._alpha==1 && args._beta==0 && !args._trA && args._pretransposed_hint; }, + nullptr, + [](const GemmArgs &args, const ARequantizeLayer32 &qp) { return new GemmHybridQuantized(args, qp); } +}, +{ + GemmMethod::GEMM_HYBRID_QUANTIZED, + "smallK_hybrid_u8u32_dot_4x6", + [](const GemmArgs &args, const ARequantizeLayer32 &) { return args._ci->has_dotprod() && (args._Nsize % 4 == 0) && (args._Ksize>32) && (args._Ksize<=64) && args._alpha==1 && args._beta==0 && !args._trA && args._pretransposed_hint; }, + nullptr, + [](const GemmArgs &args, const ARequantizeLayer32 &qp) { return new GemmHybridQuantized(args, qp); } +}, +{ + GemmMethod::GEMM_HYBRID_QUANTIZED, + "hybrid_u8u32_dot_16x4", + [](const GemmArgs &args, const ARequantizeLayer32 &) { return args._ci->has_dotprod() && args._Ksize>=16 && !args._trA && !args._trB && args._pretransposed_hint; }, + [](const GemmArgs &args, const ARequantizeLayer32 &) { return args._Nsize<=256 && args._Ksize>128; }, + [](const GemmArgs &args, const ARequantizeLayer32 &qp) { return new GemmHybridQuantized(args, qp); } +}, +{ + GemmMethod::QUANTIZE_WRAPPER, + "quantized_wrapper", + nullptr, + nullptr, + [](const GemmArgs &args, const ARequantizeLayer32 &qp) { return new QuantizeWrapper(args, qp); } +}, +{ + GemmMethod::DEFAULT, + "", + nullptr, + nullptr, + nullptr +} +}; + +template<> +const GemmImplementation *gemm_implementation_list() { + return gemm_quint8_methods; +} + +template UniqueGemmCommon gemm(const GemmArgs &args, const ARequantizeLayer32 &os); +template KernelDescription get_gemm_method(const GemmArgs &args, const ARequantizeLayer32 &os); +template std::vector get_compatible_kernels(const GemmArgs &args, const ARequantizeLayer32 &os); + +} // namespace arm_gemm diff --git a/src/core/NEON/kernels/arm_gemm/gemm_uint16.cpp b/src/core/NEON/kernels/arm_gemm/gemm_uint16.cpp index 9e3e4e43b3..408911b6d5 100644 --- a/src/core/NEON/kernels/arm_gemm/gemm_uint16.cpp +++ b/src/core/NEON/kernels/arm_gemm/gemm_uint16.cpp @@ -55,11 +55,10 @@ const GemmImplementation *gemm_implementation_list gemm(const GemmArgs &args); -template KernelDescription get_gemm_method(const GemmArgs &args); -template bool method_is_compatible(GemmMethod method, const GemmArgs &args); -template std::vector get_compatible_kernels (const GemmArgs &args); +template UniqueGemmCommon gemm(const GemmArgs &args, const Nothing &); +template KernelDescription get_gemm_method(const GemmArgs &args, const Nothing &); +template std::vector get_compatible_kernels(const GemmArgs &args, const Nothing &); } // namespace arm_gemm -#endif // __aarch64__ \ No newline at end of file +#endif // __aarch64__ diff --git a/src/core/NEON/kernels/arm_gemm/gemm_uint8.cpp b/src/core/NEON/kernels/arm_gemm/gemm_uint8.cpp index 9321bfccfd..84a45f700e 100644 --- a/src/core/NEON/kernels/arm_gemm/gemm_uint8.cpp +++ b/src/core/NEON/kernels/arm_gemm/gemm_uint8.cpp @@ -34,18 +34,28 @@ #include "kernels/a64_gemm_u8_12x8.hpp" #include "kernels/a64_gemm_u8_4x4.hpp" #include "kernels/a64_hybrid_u8u32_dot_16x4.hpp" +#include "kernels/a64_smallK_hybrid_u8u32_dot_4x6.hpp" +#include "kernels/a64_smallK_hybrid_u8u32_dot_4x8.hpp" #include "kernels/sve_hybrid_u8u32_dot_4VLx4.hpp" #include "kernels/sve_interleaved_u8u32_dot_3VLx8.hpp" #include "kernels/sve_native_u8u32_dot_4VLx4.hpp" +#include "kernels/sve_smallK_hybrid_u8u32_dot_1VLx8.hpp" namespace arm_gemm { static const GemmImplementation gemm_u8_methods[] = { #ifdef __ARM_FEATURE_SVE +{ + GemmMethod::GEMM_HYBRID, + "smallK_hybrid_u8u32_dot_1VLx8", + [](const GemmArgs &args) { return args._Ksize<=64 && args._alpha==1 && args._beta==0 && !args._trA && args._pretransposed_hint; }, + nullptr, + [](const GemmArgs &args) { return new GemmHybrid(args); } +}, { GemmMethod::GEMM_HYBRID, "hybrid_u8u32_dot_4VLx4", - [](const GemmArgs &args) { return args._Ksize>=16 && args._alpha==1 && !args._trA && !args._trB && args._pretransposed_hint; }, + [](const GemmArgs &args) { return args._Ksize>=16 && args._alpha==1 && !args._trA && args._pretransposed_hint; }, [](const GemmArgs &args) { return ((args._Ksize <= 128) && (args._Nsize <= 128)) || ((args._nmulti > 1) && ((args._Msize / args._maxthreads) < 8)); }, [](const GemmArgs &args) { return new GemmHybrid(args); } }, @@ -59,15 +69,29 @@ static const GemmImplementation gemm_u8_methods[] = { { GemmMethod::GEMM_INTERLEAVED, "interleaved_u8u32_dot_3VLx8", - [](const GemmArgs &args) { return (args._Ksize>4); }, + [](const GemmArgs &args) { return (args._Ksize>4) && args._alpha==1 && (args._beta==0 || args._beta==1); }, nullptr, [](const GemmArgs &args) { return new GemmInterleaved(args); } }, #endif +{ + GemmMethod::GEMM_HYBRID, + "smallK_hybrid_u8u32_dot_4x8", + [](const GemmArgs &args) { return args._ci->has_dotprod() && (args._Nsize % 4 == 0) && (args._Ksize<=32) && args._alpha==1 && args._beta==0 && !args._trA && args._pretransposed_hint; }, + nullptr, + [](const GemmArgs &args) { return new GemmHybrid(args); } +}, +{ + GemmMethod::GEMM_HYBRID, + "smallK_hybrid_u8u32_dot_4x6", + [](const GemmArgs &args) { return args._ci->has_dotprod() && (args._Nsize % 4 == 0) && (args._Ksize>32) && (args._Ksize<=64) && args._alpha==1 && args._beta==0 && !args._trA && args._pretransposed_hint; }, + nullptr, + [](const GemmArgs &args) { return new GemmHybrid(args); } +}, { GemmMethod::GEMM_HYBRID, "hybrid_u8u32_dot_16x4", - [](const GemmArgs &args) { return args._ci->has_dotprod() && args._Ksize>=16 && !args._trA && !args._trB && args._pretransposed_hint; }, + [](const GemmArgs &args) { return args._ci->has_dotprod() && args._Ksize>=16 && args._alpha==1 && !args._trA && !args._trB && args._pretransposed_hint; }, [](const GemmArgs &args) { return args._Nsize<=256 && args._Ksize>128; }, [](const GemmArgs &args) { return new GemmHybrid(args); } }, @@ -100,10 +124,9 @@ const GemmImplementation *gemm_implementation_list gemm(const GemmArgs &args); -template KernelDescription get_gemm_method(const GemmArgs &args); -template bool method_is_compatible(GemmMethod method, const GemmArgs &args); -template std::vector get_compatible_kernels (const GemmArgs &args); +template UniqueGemmCommon gemm(const GemmArgs &args, const Nothing &); +template KernelDescription get_gemm_method(const GemmArgs &args, const Nothing &); +template std::vector get_compatible_kernels (const GemmArgs &args, const Nothing &); } // namespace arm_gemm diff --git a/src/core/NEON/kernels/arm_gemm/gemv_batched.hpp b/src/core/NEON/kernels/arm_gemm/gemv_batched.hpp index b7f9de85c4..8dae7c3098 100644 --- a/src/core/NEON/kernels/arm_gemm/gemv_batched.hpp +++ b/src/core/NEON/kernels/arm_gemm/gemv_batched.hpp @@ -41,12 +41,13 @@ public: GemmArgs newargs = args; newargs._Msize = args._nbatches; newargs._nbatches = 1; + newargs._cfg = nullptr; _subgemm = gemm(newargs); } void set_arrays(const To *A, const int lda, const int A_batch_stride, const int A_multi_stride, const To *B, const int ldb, const int B_multi_stride, - Tr *C, const int ldc, const int C_batch_stride, const int C_multi_stride) override { + Tr *C, const int ldc, const int C_batch_stride, const int C_multi_stride) override { /* A and C's batch stride becomes their new row stride. New batch stride is 0 as nbatches for subgemm is always 1. */ _subgemm->set_arrays(A, A_batch_stride, 0, A_multi_stride, B, ldb, B_multi_stride, diff --git a/src/core/NEON/kernels/arm_gemm/gemv_native_transposed.hpp b/src/core/NEON/kernels/arm_gemm/gemv_native_transposed.hpp index 5ebc6342d7..55b1f9bbe6 100644 --- a/src/core/NEON/kernels/arm_gemm/gemv_native_transposed.hpp +++ b/src/core/NEON/kernels/arm_gemm/gemv_native_transposed.hpp @@ -65,7 +65,7 @@ public: GemvNativeTransposed & operator= (GemvNativeTransposed &) = delete; GemvNativeTransposed(const GemmArgs &args) - : _Nsize(args._Nsize), _Ksize(args._Ksize), _nmultis(args._nmulti), _beta(args._beta), _ci(args._ci) { + : _Nsize(args._Nsize), _Ksize(args._Ksize), _nmultis(args._nmulti), _beta(args._beta), _ci(args._ci) { /* For now don't do any blocking. TODO: figure out if we should. */ m_block = _Ksize; n_block = _Nsize; diff --git a/src/core/NEON/kernels/arm_gemm/gemv_pretransposed.hpp b/src/core/NEON/kernels/arm_gemm/gemv_pretransposed.hpp index 21f8278529..92064180a2 100644 --- a/src/core/NEON/kernels/arm_gemm/gemv_pretransposed.hpp +++ b/src/core/NEON/kernels/arm_gemm/gemv_pretransposed.hpp @@ -69,8 +69,8 @@ public: GemvPretransposed & operator= (GemvPretransposed &) = delete; GemvPretransposed(const GemmArgs &args) - : _Nsize(args._Nsize), _Ksize(args._Ksize), _nmultis(args._nmulti), _trB(args._trB), _beta(args._beta), _ci(args._ci), - _buffer_per_multi(_Ksize * iceildiv(_Nsize, strategy::A_interleave()) * strategy::A_interleave()) { + : _Nsize(args._Nsize), _Ksize(args._Ksize), _nmultis(args._nmulti), _trB(args._trB), _beta(args._beta), _ci(args._ci), + _buffer_per_multi(_Ksize * iceildiv(_Nsize, strategy::A_interleave()) * strategy::A_interleave()) { /* For now don't do any blocking. TODO: figure out if we should. */ if (args._cfg && args._cfg->inner_block_size) { m_block = args._cfg->inner_block_size; diff --git a/src/core/NEON/kernels/arm_gemm/kernels/a64_gemm_u16_12x8/generic.cpp b/src/core/NEON/kernels/arm_gemm/kernels/a64_gemm_u16_12x8/generic.cpp index 4c21620218..83f9028065 100644 --- a/src/core/NEON/kernels/arm_gemm/kernels/a64_gemm_u16_12x8/generic.cpp +++ b/src/core/NEON/kernels/arm_gemm/kernels/a64_gemm_u16_12x8/generic.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017-2018 ARM Limited. + * Copyright (c) 2017-2019 ARM Limited. * * SPDX-License-Identifier: MIT * @@ -100,7 +100,7 @@ void a64_gemm_u16_asimd_12x8(const uint16_t *Apanel, const uint16_t *Bpanel, uin "1:\n" // Main loop // First unroll - "smlal v5.4s, %[b0].4h, %[aa].h[0]\n" + "umlal v5.4s, %[b0].4h, %[aa].h[0]\n" "ldr x20, [%x[b_ptr]]\n" // Load B[1].upper "umlal v6.4s, %[b0].4h, %[aa].h[1]\n" "umlal v7.4s, %[b0].4h, %[aa].h[2]\n" @@ -312,7 +312,7 @@ void a64_gemm_u16_asimd_12x8(const uint16_t *Apanel, const uint16_t *Bpanel, uin : [a_ptr] "+r" (a_ptr), [b_ptr] "+r" (b_ptr), [c_ptr] "+r" (c_ptr), [k] "+r" (k), [aa] "+w" (aa), [ab] "+w" (ab), [b0] "+w" (b0), [b1] "+w" (b1), [b2] "+w" (b2) : [odd_k] "r" (odd_k) - : "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "x20", "cc" + : "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "x20", "cc", "memory" ); } } diff --git a/src/core/NEON/kernels/arm_gemm/kernels/a64_hybrid_s8s32_dot_16x4/a55.cpp b/src/core/NEON/kernels/arm_gemm/kernels/a64_hybrid_s8s32_dot_16x4/a55.cpp index 17f6e578f9..3f72e4bea1 100644 --- a/src/core/NEON/kernels/arm_gemm/kernels/a64_hybrid_s8s32_dot_16x4/a55.cpp +++ b/src/core/NEON/kernels/arm_gemm/kernels/a64_hybrid_s8s32_dot_16x4/a55.cpp @@ -74,2381 +74,2381 @@ void a64_hybrid_s8s32_dot_16x4_a55(const int8_t *A, int lda, const int8_t *B, in switch(M-y) { case 1: __asm __volatile ( - "temploadreg0 .req X0\n" - "temploadreg1 .req X1\n" - "temploadreg2 .req X2\n" - "temploadreg3 .req X3\n" - "cbz %[beta0], 1f\n" - "movi v16.4s, #0\n" - "ldr q0, [%[a_ptr0]]\n" - "movi v17.4s, #0\n" - "ldr q8, [%[b_ptr0]]\n" - "movi v18.4s, #0\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - "movi v19.4s, #0\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - "add %[a_ptr0], %[a_ptr0], #0x10\n" - "ldr q12, [%[b_ptr0], #0x40]\n" - "ldr q13, [%[b_ptr0], #0x50]\n" - "ldr d14, [%[b_ptr0], #0x60]\n" - "ldr temploadreg2, [%[b_ptr0], #0x68]\n" - "add %[b_ptr0], %[b_ptr0], #0x80\n" - "cbz %[loops], 2f\n" - "b 3f\n" - "1:\n" - "ld1r {v15.4s}, [%[betaptr]]\n" - "ldr q16, [%[c_ptr0]]\n" - "ldr q17, [%[c_ptr0], #0x10]\n" - "ldr q18, [%[c_ptr0], #0x20]\n" - "ldr q19, [%[c_ptr0], #0x30]\n" - "mul v16.4s, v16.4s, v15.4s\n" - "ldr q0, [%[a_ptr0]]\n" - "mul v17.4s, v17.4s, v15.4s\n" - "ldr q8, [%[b_ptr0]]\n" - "mul v18.4s, v18.4s, v15.4s\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - "mul v19.4s, v19.4s, v15.4s\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - "add %[a_ptr0], %[a_ptr0], #0x10\n" - "ldr q12, [%[b_ptr0], #0x40]\n" - "ldr q13, [%[b_ptr0], #0x50]\n" - "ldr d14, [%[b_ptr0], #0x60]\n" - "ldr temploadreg2, [%[b_ptr0], #0x68]\n" - "add %[b_ptr0], %[b_ptr0], #0x80\n" - "cbz %[loops], 2f\n" - "3:\n" - ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" - "ins v14.d[1], temploadreg2\n" - ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" - "ldr d15, [%[b_ptr0], #-0x10]\n" - ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" - "ldr temploadreg3, [%[b_ptr0], #-0x8]\n" - ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" - "ldr d4, [%[a_ptr0]]\n" - ".word 0x4fa0e190 // sdot v16.4s, v12.16b, v0.4b[1]\n" - "ldr temploadreg0, [%[a_ptr0], #0x8]\n" - ".word 0x4fa0e1b1 // sdot v17.4s, v13.16b, v0.4b[1]\n" - "ldr d8, [%[b_ptr0]]\n" - ".word 0x4fa0e1d2 // sdot v18.4s, v14.16b, v0.4b[1]\n" - "ldr d9, [%[b_ptr0], #0x10]\n" - "ldr temploadreg1, [%[b_ptr0], #0x18]\n" - "subs %[loops], %[loops], #0x1\n" - "ins v4.d[1], temploadreg0\n" - "prfm PLDL1KEEP, [%[a_ptr0], #0x40]\n" - "ldr temploadreg0, [%[b_ptr0], #0x8]\n" - "add %[a_ptr0], %[a_ptr0], #0x20\n" - "ldr d10, [%[b_ptr0], #0x20]\n" - "ldr temploadreg2, [%[b_ptr0], #0x28]\n" - "ldr d11, [%[b_ptr0], #0x30]\n" - "ins v15.d[1], temploadreg3\n" - "ldr temploadreg3, [%[b_ptr0], #0x38]\n" - "ldr d12, [%[b_ptr0], #0x40]\n" - "ins v8.d[1], temploadreg0\n" - ".word 0x4fa0e1f3 // sdot v19.4s, v15.16b, v0.4b[1]\n" - "ldr temploadreg0, [%[b_ptr0], #0x48]\n" - "ldr d13, [%[b_ptr0], #0x50]\n" - "ins v9.d[1], temploadreg1\n" - ".word 0x4f80e910 // sdot v16.4s, v8.16b, v0.4b[2]\n" - "ldr temploadreg1, [%[b_ptr0], #0x58]\n" - "ldr d14, [%[b_ptr0], #0x60]\n" - "ins v10.d[1], temploadreg2\n" - ".word 0x4f80e931 // sdot v17.4s, v9.16b, v0.4b[2]\n" - "ldr temploadreg2, [%[b_ptr0], #0x68]\n" - "ldr d15, [%[b_ptr0], #0x70]\n" - "ins v11.d[1], temploadreg3\n" - ".word 0x4f80e952 // sdot v18.4s, v10.16b, v0.4b[2]\n" - "ldr temploadreg3, [%[b_ptr0], #0x78]\n" - "ins v12.d[1], temploadreg0\n" - "add %[b_ptr0], %[b_ptr0], #0x100\n" - ".word 0x4f80e973 // sdot v19.4s, v11.16b, v0.4b[2]\n" - "ldr d8, [%[b_ptr0], #-0x80]\n" - "ldr temploadreg0, [%[b_ptr0], #-0x78]\n" - ".word 0x4fa0e990 // sdot v16.4s, v12.16b, v0.4b[3]\n" - "ldr d9, [%[b_ptr0], #-0x70]\n" - "ins v13.d[1], temploadreg1\n" - "ldr temploadreg1, [%[b_ptr0], #-0x68]\n" - "ldr d10, [%[b_ptr0], #-0x60]\n" - "ins v14.d[1], temploadreg2\n" - ".word 0x4fa0e9b1 // sdot v17.4s, v13.16b, v0.4b[3]\n" - "ldr temploadreg2, [%[b_ptr0], #-0x58]\n" - "ldr d11, [%[b_ptr0], #-0x50]\n" - "ins v15.d[1], temploadreg3\n" - ".word 0x4fa0e9d2 // sdot v18.4s, v14.16b, v0.4b[3]\n" - "ldr temploadreg3, [%[b_ptr0], #-0x48]\n" - "ldr d12, [%[b_ptr0], #-0x40]\n" - "ins v8.d[1], temploadreg0\n" - ".word 0x4fa0e9f3 // sdot v19.4s, v15.16b, v0.4b[3]\n" - "ldr temploadreg0, [%[b_ptr0], #-0x38]\n" - "ldr d13, [%[b_ptr0], #-0x30]\n" - "ins v9.d[1], temploadreg1\n" - ".word 0x4f84e110 // sdot v16.4s, v8.16b, v4.4b[0]\n" - "ldr temploadreg1, [%[b_ptr0], #-0x28]\n" - "ldr d14, [%[b_ptr0], #-0x20]\n" - "ins v10.d[1], temploadreg2\n" - ".word 0x4f84e131 // sdot v17.4s, v9.16b, v4.4b[0]\n" - "ldr temploadreg2, [%[b_ptr0], #-0x18]\n" - "ldr d15, [%[b_ptr0], #-0x10]\n" - "ins v11.d[1], temploadreg3\n" - ".word 0x4f84e152 // sdot v18.4s, v10.16b, v4.4b[0]\n" - "ldr temploadreg3, [%[b_ptr0], #-0x8]\n" - "ldr d0, [%[a_ptr0], #-0x10]\n" - "ins v12.d[1], temploadreg0\n" - ".word 0x4f84e173 // sdot v19.4s, v11.16b, v4.4b[0]\n" - "ldr temploadreg0, [%[a_ptr0], #-0x8]\n" - "ldr d8, [%[b_ptr0]]\n" - "ldr d9, [%[b_ptr0], #0x10]\n" - ".word 0x4fa4e190 // sdot v16.4s, v12.16b, v4.4b[1]\n" - "ins v0.d[1], temploadreg0\n" - "ldr temploadreg0, [%[b_ptr0], #0x8]\n" - "ins v13.d[1], temploadreg1\n" - "ldr temploadreg1, [%[b_ptr0], #0x18]\n" - "ldr d10, [%[b_ptr0], #0x20]\n" - "ins v14.d[1], temploadreg2\n" - ".word 0x4fa4e1b1 // sdot v17.4s, v13.16b, v4.4b[1]\n" - "ldr temploadreg2, [%[b_ptr0], #0x28]\n" - "ldr d11, [%[b_ptr0], #0x30]\n" - "ins v15.d[1], temploadreg3\n" - ".word 0x4fa4e1d2 // sdot v18.4s, v14.16b, v4.4b[1]\n" - "ldr temploadreg3, [%[b_ptr0], #0x38]\n" - "ldr d12, [%[b_ptr0], #0x40]\n" - "ins v8.d[1], temploadreg0\n" - ".word 0x4fa4e1f3 // sdot v19.4s, v15.16b, v4.4b[1]\n" - "ldr temploadreg0, [%[b_ptr0], #0x48]\n" - "ldr d13, [%[b_ptr0], #0x50]\n" - "ins v9.d[1], temploadreg1\n" - ".word 0x4f84e910 // sdot v16.4s, v8.16b, v4.4b[2]\n" - "ldr temploadreg1, [%[b_ptr0], #0x58]\n" - "ldr d14, [%[b_ptr0], #0x60]\n" - "ins v10.d[1], temploadreg2\n" - ".word 0x4f84e931 // sdot v17.4s, v9.16b, v4.4b[2]\n" - "ldr temploadreg2, [%[b_ptr0], #0x68]\n" - "ldr d15, [%[b_ptr0], #0x70]\n" - "ins v11.d[1], temploadreg3\n" - ".word 0x4f84e952 // sdot v18.4s, v10.16b, v4.4b[2]\n" - "ldr temploadreg3, [%[b_ptr0], #0x78]\n" - "ins v12.d[1], temploadreg0\n" - "add %[b_ptr0], %[b_ptr0], #0x100\n" - ".word 0x4f84e973 // sdot v19.4s, v11.16b, v4.4b[2]\n" - "ldr d8, [%[b_ptr0], #-0x80]\n" - "ldr temploadreg0, [%[b_ptr0], #-0x78]\n" - ".word 0x4fa4e990 // sdot v16.4s, v12.16b, v4.4b[3]\n" - "ldr d9, [%[b_ptr0], #-0x70]\n" - "ins v13.d[1], temploadreg1\n" - "ldr temploadreg1, [%[b_ptr0], #-0x68]\n" - "ldr d10, [%[b_ptr0], #-0x60]\n" - "ins v14.d[1], temploadreg2\n" - ".word 0x4fa4e9b1 // sdot v17.4s, v13.16b, v4.4b[3]\n" - "ldr temploadreg2, [%[b_ptr0], #-0x58]\n" - "ldr d11, [%[b_ptr0], #-0x50]\n" - "ins v15.d[1], temploadreg3\n" - ".word 0x4fa4e9d2 // sdot v18.4s, v14.16b, v4.4b[3]\n" - "ldr temploadreg3, [%[b_ptr0], #-0x48]\n" - "ldr d12, [%[b_ptr0], #-0x40]\n" - "ins v8.d[1], temploadreg0\n" - ".word 0x4fa4e9f3 // sdot v19.4s, v15.16b, v4.4b[3]\n" - "ldr temploadreg0, [%[b_ptr0], #-0x38]\n" - "ldr d13, [%[b_ptr0], #-0x30]\n" - "ins v9.d[1], temploadreg1\n" - "ldr temploadreg1, [%[b_ptr0], #-0x28]\n" - "ldr d14, [%[b_ptr0], #-0x20]\n" - "ins v10.d[1], temploadreg2\n" - "ldr temploadreg2, [%[b_ptr0], #-0x18]\n" - "ins v11.d[1], temploadreg3\n" - "ins v12.d[1], temploadreg0\n" - "ins v13.d[1], temploadreg1\n" - "b.ne 3b\n" - "2:\n" - "ins v14.d[1], temploadreg2\n" - "prfm PSTL1KEEP, [%[c_ptr0]]\n" - "ldr d15, [%[b_ptr0], #-0x10]\n" - "ldr temploadreg3, [%[b_ptr0], #-0x8]\n" - "ins v15.d[1], temploadreg3\n" - "cbz %[regs], 4f\n" - ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" - "ldr d4, [%[a_ptr0]]\n" - ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" - "ldr temploadreg0, [%[a_ptr0], #0x8]\n" - ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" - "ldr d8, [%[b_ptr0]]\n" - ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" - "ldr d9, [%[b_ptr0], #0x10]\n" - ".word 0x4fa0e190 // sdot v16.4s, v12.16b, v0.4b[1]\n" - "ins v4.d[1], temploadreg0\n" - ".word 0x4fa0e1b1 // sdot v17.4s, v13.16b, v0.4b[1]\n" - "ldr temploadreg0, [%[b_ptr0], #0x8]\n" - ".word 0x4fa0e1d2 // sdot v18.4s, v14.16b, v0.4b[1]\n" - "ldr temploadreg1, [%[b_ptr0], #0x18]\n" - ".word 0x4fa0e1f3 // sdot v19.4s, v15.16b, v0.4b[1]\n" - "ldr d10, [%[b_ptr0], #0x20]\n" - "ldr temploadreg2, [%[b_ptr0], #0x28]\n" - "add %[a_ptr0], %[a_ptr0], #0x10\n" - "ldr d11, [%[b_ptr0], #0x30]\n" - "ldr temploadreg3, [%[b_ptr0], #0x38]\n" - "ldr d12, [%[b_ptr0], #0x40]\n" - "ins v8.d[1], temploadreg0\n" - "ldr temploadreg0, [%[b_ptr0], #0x48]\n" - "ldr d13, [%[b_ptr0], #0x50]\n" - "ins v9.d[1], temploadreg1\n" - ".word 0x4f80e910 // sdot v16.4s, v8.16b, v0.4b[2]\n" - "ldr temploadreg1, [%[b_ptr0], #0x58]\n" - "ldr d14, [%[b_ptr0], #0x60]\n" - "ins v10.d[1], temploadreg2\n" - ".word 0x4f80e931 // sdot v17.4s, v9.16b, v0.4b[2]\n" - "ldr temploadreg2, [%[b_ptr0], #0x68]\n" - "ldr d15, [%[b_ptr0], #0x70]\n" - "ins v11.d[1], temploadreg3\n" - ".word 0x4f80e952 // sdot v18.4s, v10.16b, v0.4b[2]\n" - "ldr temploadreg3, [%[b_ptr0], #0x78]\n" - "ins v12.d[1], temploadreg0\n" - "add %[b_ptr0], %[b_ptr0], #0x100\n" - ".word 0x4f80e973 // sdot v19.4s, v11.16b, v0.4b[2]\n" - "ldr d8, [%[b_ptr0], #-0x80]\n" - "ldr temploadreg0, [%[b_ptr0], #-0x78]\n" - ".word 0x4fa0e990 // sdot v16.4s, v12.16b, v0.4b[3]\n" - "ldr d9, [%[b_ptr0], #-0x70]\n" - "ins v13.d[1], temploadreg1\n" - "ldr temploadreg1, [%[b_ptr0], #-0x68]\n" - "ldr d10, [%[b_ptr0], #-0x60]\n" - "ins v14.d[1], temploadreg2\n" - ".word 0x4fa0e9b1 // sdot v17.4s, v13.16b, v0.4b[3]\n" - "ldr temploadreg2, [%[b_ptr0], #-0x58]\n" - "ldr d11, [%[b_ptr0], #-0x50]\n" - "ins v15.d[1], temploadreg3\n" - ".word 0x4fa0e9d2 // sdot v18.4s, v14.16b, v0.4b[3]\n" - "ldr temploadreg3, [%[b_ptr0], #-0x48]\n" - "ldr d12, [%[b_ptr0], #-0x40]\n" - "ins v8.d[1], temploadreg0\n" - ".word 0x4fa0e9f3 // sdot v19.4s, v15.16b, v0.4b[3]\n" - "ldr temploadreg0, [%[b_ptr0], #-0x38]\n" - "ldr d13, [%[b_ptr0], #-0x30]\n" - "ins v9.d[1], temploadreg1\n" - ".word 0x4f84e110 // sdot v16.4s, v8.16b, v4.4b[0]\n" - "ldr temploadreg1, [%[b_ptr0], #-0x28]\n" - "ldr d14, [%[b_ptr0], #-0x20]\n" - "ins v10.d[1], temploadreg2\n" - ".word 0x4f84e131 // sdot v17.4s, v9.16b, v4.4b[0]\n" - "ldr temploadreg2, [%[b_ptr0], #-0x18]\n" - "ldr d15, [%[b_ptr0], #-0x10]\n" - "ins v11.d[1], temploadreg3\n" - ".word 0x4f84e152 // sdot v18.4s, v10.16b, v4.4b[0]\n" - "ldr temploadreg3, [%[b_ptr0], #-0x8]\n" - "ldr d8, [%[b_ptr0]]\n" - "ins v12.d[1], temploadreg0\n" - ".word 0x4f84e173 // sdot v19.4s, v11.16b, v4.4b[0]\n" - "ldr temploadreg0, [%[b_ptr0], #0x8]\n" - "ldr d9, [%[b_ptr0], #0x10]\n" - "ins v13.d[1], temploadreg1\n" - ".word 0x4fa4e190 // sdot v16.4s, v12.16b, v4.4b[1]\n" - "ldr temploadreg1, [%[b_ptr0], #0x18]\n" - "ldr d10, [%[b_ptr0], #0x20]\n" - "ins v14.d[1], temploadreg2\n" - ".word 0x4fa4e1b1 // sdot v17.4s, v13.16b, v4.4b[1]\n" - "ldr temploadreg2, [%[b_ptr0], #0x28]\n" - "ldr d11, [%[b_ptr0], #0x30]\n" - "ins v15.d[1], temploadreg3\n" - ".word 0x4fa4e1d2 // sdot v18.4s, v14.16b, v4.4b[1]\n" - "ldr temploadreg3, [%[b_ptr0], #0x38]\n" - "ldr d12, [%[b_ptr0], #0x40]\n" - "ins v8.d[1], temploadreg0\n" - ".word 0x4fa4e1f3 // sdot v19.4s, v15.16b, v4.4b[1]\n" - "ldr temploadreg0, [%[b_ptr0], #0x48]\n" - "ldr d13, [%[b_ptr0], #0x50]\n" - "ins v9.d[1], temploadreg1\n" - ".word 0x4f84e910 // sdot v16.4s, v8.16b, v4.4b[2]\n" - "ldr temploadreg1, [%[b_ptr0], #0x58]\n" - "ldr d14, [%[b_ptr0], #0x60]\n" - "ins v10.d[1], temploadreg2\n" - ".word 0x4f84e931 // sdot v17.4s, v9.16b, v4.4b[2]\n" - "ldr temploadreg2, [%[b_ptr0], #0x68]\n" - "ldr d15, [%[b_ptr0], #0x70]\n" - "ins v11.d[1], temploadreg3\n" - ".word 0x4f84e952 // sdot v18.4s, v10.16b, v4.4b[2]\n" - "ldr temploadreg3, [%[b_ptr0], #0x78]\n" - "ins v12.d[1], temploadreg0\n" - "add %[b_ptr0], %[b_ptr0], #0x80\n" - ".word 0x4f84e973 // sdot v19.4s, v11.16b, v4.4b[2]\n" - "ins v13.d[1], temploadreg1\n" - "ins v14.d[1], temploadreg2\n" - ".word 0x4fa4e990 // sdot v16.4s, v12.16b, v4.4b[3]\n" - "ins v15.d[1], temploadreg3\n" - ".word 0x4fa4e9b1 // sdot v17.4s, v13.16b, v4.4b[3]\n" - ".word 0x4fa4e9d2 // sdot v18.4s, v14.16b, v4.4b[3]\n" - ".word 0x4fa4e9f3 // sdot v19.4s, v15.16b, v4.4b[3]\n" - "b 5f\n" - "4:\n" - ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" - "ldr d8, [%[b_ptr0]]\n" - ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" - "ldr temploadreg0, [%[b_ptr0], #0x8]\n" - ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" - "ldr d9, [%[b_ptr0], #0x10]\n" - ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" - "ldr temploadreg1, [%[b_ptr0], #0x18]\n" - ".word 0x4fa0e190 // sdot v16.4s, v12.16b, v0.4b[1]\n" - "ldr d10, [%[b_ptr0], #0x20]\n" - ".word 0x4fa0e1b1 // sdot v17.4s, v13.16b, v0.4b[1]\n" - "ldr temploadreg2, [%[b_ptr0], #0x28]\n" - ".word 0x4fa0e1d2 // sdot v18.4s, v14.16b, v0.4b[1]\n" - "ldr d11, [%[b_ptr0], #0x30]\n" - ".word 0x4fa0e1f3 // sdot v19.4s, v15.16b, v0.4b[1]\n" - "ldr temploadreg3, [%[b_ptr0], #0x38]\n" - "ldr d12, [%[b_ptr0], #0x40]\n" - "ins v8.d[1], temploadreg0\n" - "ldr temploadreg0, [%[b_ptr0], #0x48]\n" - "ldr d13, [%[b_ptr0], #0x50]\n" - "ins v9.d[1], temploadreg1\n" - ".word 0x4f80e910 // sdot v16.4s, v8.16b, v0.4b[2]\n" - "ldr temploadreg1, [%[b_ptr0], #0x58]\n" - "ldr d14, [%[b_ptr0], #0x60]\n" - "ins v10.d[1], temploadreg2\n" - ".word 0x4f80e931 // sdot v17.4s, v9.16b, v0.4b[2]\n" - "ldr temploadreg2, [%[b_ptr0], #0x68]\n" - "ldr d15, [%[b_ptr0], #0x70]\n" - "ins v11.d[1], temploadreg3\n" - ".word 0x4f80e952 // sdot v18.4s, v10.16b, v0.4b[2]\n" - "ldr temploadreg3, [%[b_ptr0], #0x78]\n" - "ins v12.d[1], temploadreg0\n" - "add %[b_ptr0], %[b_ptr0], #0x80\n" - ".word 0x4f80e973 // sdot v19.4s, v11.16b, v0.4b[2]\n" - "ins v13.d[1], temploadreg1\n" - "ins v14.d[1], temploadreg2\n" - ".word 0x4fa0e990 // sdot v16.4s, v12.16b, v0.4b[3]\n" - "ins v15.d[1], temploadreg3\n" - ".word 0x4fa0e9b1 // sdot v17.4s, v13.16b, v0.4b[3]\n" - ".word 0x4fa0e9d2 // sdot v18.4s, v14.16b, v0.4b[3]\n" - ".word 0x4fa0e9f3 // sdot v19.4s, v15.16b, v0.4b[3]\n" - "5:\n" - "cbz %[blocks], 6f\n" - "7:\n" - "ldr q8, [%[b_ptr0]]\n" - "subs %[blocks], %[blocks], #0x1\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - "ldr s0, [%[a_ptr0]]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - "add %[a_ptr0], %[a_ptr0], #0x4\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - "add %[b_ptr0], %[b_ptr0], #0x40\n" - ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" - ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" - ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" - ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" - "b.ne 7b\n" - "6:\n" - "cbz %[odds], 8f\n" - "ld1 {v0.b}[0], [%[a_ptr0]], #1\n" - "subs %[odds], %[odds], #0x1\n" - "b.eq 9f\n" - "ld1 {v0.b}[1], [%[a_ptr0]], #1\n" - "subs %[odds], %[odds], #0x1\n" - "b.eq 9f\n" - "ld1 {v0.b}[2], [%[a_ptr0]]\n" - "9:\n" - "ldr q8, [%[b_ptr0]]\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" - ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" - ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" - ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" - "8:\n" - "str q16, [%[c_ptr0]]\n" - "str q17, [%[c_ptr0], #0x10]\n" - "str q18, [%[c_ptr0], #0x20]\n" - "str q19, [%[c_ptr0], #0x30]\n" - "add %[c_ptr0], %[c_ptr0], #0x40\n" - ".unreq temploadreg0\n" - ".unreq temploadreg1\n" - ".unreq temploadreg2\n" - ".unreq temploadreg3\n" - : [a_ptr0] "+r" (a_ptr0), [b_ptr0] "+r" (b_ptr0), [c_ptr0] "+r" (c_ptr0), [loops] "+r" (loops), [regs] "+r" (regs), [blocks] "+r" (blocks), [odds] "+r" (odds) - : [betaptr] "r" (betaptr), [width] "r" (width), [beta0] "r" (beta0), [lda] "r" (ldab), [ldc] "r" (ldcb) - : "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x0", "x1", "x2", "x3", "cc", "memory" + "temploadreg0 .req X0\n" + "temploadreg1 .req X1\n" + "temploadreg2 .req X2\n" + "temploadreg3 .req X3\n" + "cbz %[beta0], 1f\n" + "movi v16.4s, #0\n" + "ldr q0, [%[a_ptr0]]\n" + "movi v17.4s, #0\n" + "ldr q8, [%[b_ptr0]]\n" + "movi v18.4s, #0\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + "movi v19.4s, #0\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + "add %[a_ptr0], %[a_ptr0], #0x10\n" + "ldr q12, [%[b_ptr0], #0x40]\n" + "ldr q13, [%[b_ptr0], #0x50]\n" + "ldr d14, [%[b_ptr0], #0x60]\n" + "ldr temploadreg2, [%[b_ptr0], #0x68]\n" + "add %[b_ptr0], %[b_ptr0], #0x80\n" + "cbz %[loops], 2f\n" + "b 3f\n" + "1:\n" + "ld1r {v15.4s}, [%[betaptr]]\n" + "ldr q16, [%[c_ptr0]]\n" + "ldr q17, [%[c_ptr0], #0x10]\n" + "ldr q18, [%[c_ptr0], #0x20]\n" + "ldr q19, [%[c_ptr0], #0x30]\n" + "mul v16.4s, v16.4s, v15.4s\n" + "ldr q0, [%[a_ptr0]]\n" + "mul v17.4s, v17.4s, v15.4s\n" + "ldr q8, [%[b_ptr0]]\n" + "mul v18.4s, v18.4s, v15.4s\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + "mul v19.4s, v19.4s, v15.4s\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + "add %[a_ptr0], %[a_ptr0], #0x10\n" + "ldr q12, [%[b_ptr0], #0x40]\n" + "ldr q13, [%[b_ptr0], #0x50]\n" + "ldr d14, [%[b_ptr0], #0x60]\n" + "ldr temploadreg2, [%[b_ptr0], #0x68]\n" + "add %[b_ptr0], %[b_ptr0], #0x80\n" + "cbz %[loops], 2f\n" + "3:\n" + ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" + "ins v14.d[1], temploadreg2\n" + ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" + "ldr d15, [%[b_ptr0], #-0x10]\n" + ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" + "ldr temploadreg3, [%[b_ptr0], #-0x8]\n" + ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" + "ldr d4, [%[a_ptr0]]\n" + ".word 0x4fa0e190 // sdot v16.4s, v12.16b, v0.4b[1]\n" + "ldr temploadreg0, [%[a_ptr0], #0x8]\n" + ".word 0x4fa0e1b1 // sdot v17.4s, v13.16b, v0.4b[1]\n" + "ldr d8, [%[b_ptr0]]\n" + ".word 0x4fa0e1d2 // sdot v18.4s, v14.16b, v0.4b[1]\n" + "ldr d9, [%[b_ptr0], #0x10]\n" + "ldr temploadreg1, [%[b_ptr0], #0x18]\n" + "subs %[loops], %[loops], #0x1\n" + "ins v4.d[1], temploadreg0\n" + "prfm PLDL1KEEP, [%[a_ptr0], #0x40]\n" + "ldr temploadreg0, [%[b_ptr0], #0x8]\n" + "add %[a_ptr0], %[a_ptr0], #0x20\n" + "ldr d10, [%[b_ptr0], #0x20]\n" + "ldr temploadreg2, [%[b_ptr0], #0x28]\n" + "ldr d11, [%[b_ptr0], #0x30]\n" + "ins v15.d[1], temploadreg3\n" + "ldr temploadreg3, [%[b_ptr0], #0x38]\n" + "ldr d12, [%[b_ptr0], #0x40]\n" + "ins v8.d[1], temploadreg0\n" + ".word 0x4fa0e1f3 // sdot v19.4s, v15.16b, v0.4b[1]\n" + "ldr temploadreg0, [%[b_ptr0], #0x48]\n" + "ldr d13, [%[b_ptr0], #0x50]\n" + "ins v9.d[1], temploadreg1\n" + ".word 0x4f80e910 // sdot v16.4s, v8.16b, v0.4b[2]\n" + "ldr temploadreg1, [%[b_ptr0], #0x58]\n" + "ldr d14, [%[b_ptr0], #0x60]\n" + "ins v10.d[1], temploadreg2\n" + ".word 0x4f80e931 // sdot v17.4s, v9.16b, v0.4b[2]\n" + "ldr temploadreg2, [%[b_ptr0], #0x68]\n" + "ldr d15, [%[b_ptr0], #0x70]\n" + "ins v11.d[1], temploadreg3\n" + ".word 0x4f80e952 // sdot v18.4s, v10.16b, v0.4b[2]\n" + "ldr temploadreg3, [%[b_ptr0], #0x78]\n" + "ins v12.d[1], temploadreg0\n" + "add %[b_ptr0], %[b_ptr0], #0x100\n" + ".word 0x4f80e973 // sdot v19.4s, v11.16b, v0.4b[2]\n" + "ldr d8, [%[b_ptr0], #-0x80]\n" + "ldr temploadreg0, [%[b_ptr0], #-0x78]\n" + ".word 0x4fa0e990 // sdot v16.4s, v12.16b, v0.4b[3]\n" + "ldr d9, [%[b_ptr0], #-0x70]\n" + "ins v13.d[1], temploadreg1\n" + "ldr temploadreg1, [%[b_ptr0], #-0x68]\n" + "ldr d10, [%[b_ptr0], #-0x60]\n" + "ins v14.d[1], temploadreg2\n" + ".word 0x4fa0e9b1 // sdot v17.4s, v13.16b, v0.4b[3]\n" + "ldr temploadreg2, [%[b_ptr0], #-0x58]\n" + "ldr d11, [%[b_ptr0], #-0x50]\n" + "ins v15.d[1], temploadreg3\n" + ".word 0x4fa0e9d2 // sdot v18.4s, v14.16b, v0.4b[3]\n" + "ldr temploadreg3, [%[b_ptr0], #-0x48]\n" + "ldr d12, [%[b_ptr0], #-0x40]\n" + "ins v8.d[1], temploadreg0\n" + ".word 0x4fa0e9f3 // sdot v19.4s, v15.16b, v0.4b[3]\n" + "ldr temploadreg0, [%[b_ptr0], #-0x38]\n" + "ldr d13, [%[b_ptr0], #-0x30]\n" + "ins v9.d[1], temploadreg1\n" + ".word 0x4f84e110 // sdot v16.4s, v8.16b, v4.4b[0]\n" + "ldr temploadreg1, [%[b_ptr0], #-0x28]\n" + "ldr d14, [%[b_ptr0], #-0x20]\n" + "ins v10.d[1], temploadreg2\n" + ".word 0x4f84e131 // sdot v17.4s, v9.16b, v4.4b[0]\n" + "ldr temploadreg2, [%[b_ptr0], #-0x18]\n" + "ldr d15, [%[b_ptr0], #-0x10]\n" + "ins v11.d[1], temploadreg3\n" + ".word 0x4f84e152 // sdot v18.4s, v10.16b, v4.4b[0]\n" + "ldr temploadreg3, [%[b_ptr0], #-0x8]\n" + "ldr d0, [%[a_ptr0], #-0x10]\n" + "ins v12.d[1], temploadreg0\n" + ".word 0x4f84e173 // sdot v19.4s, v11.16b, v4.4b[0]\n" + "ldr temploadreg0, [%[a_ptr0], #-0x8]\n" + "ldr d8, [%[b_ptr0]]\n" + "ldr d9, [%[b_ptr0], #0x10]\n" + ".word 0x4fa4e190 // sdot v16.4s, v12.16b, v4.4b[1]\n" + "ins v0.d[1], temploadreg0\n" + "ldr temploadreg0, [%[b_ptr0], #0x8]\n" + "ins v13.d[1], temploadreg1\n" + "ldr temploadreg1, [%[b_ptr0], #0x18]\n" + "ldr d10, [%[b_ptr0], #0x20]\n" + "ins v14.d[1], temploadreg2\n" + ".word 0x4fa4e1b1 // sdot v17.4s, v13.16b, v4.4b[1]\n" + "ldr temploadreg2, [%[b_ptr0], #0x28]\n" + "ldr d11, [%[b_ptr0], #0x30]\n" + "ins v15.d[1], temploadreg3\n" + ".word 0x4fa4e1d2 // sdot v18.4s, v14.16b, v4.4b[1]\n" + "ldr temploadreg3, [%[b_ptr0], #0x38]\n" + "ldr d12, [%[b_ptr0], #0x40]\n" + "ins v8.d[1], temploadreg0\n" + ".word 0x4fa4e1f3 // sdot v19.4s, v15.16b, v4.4b[1]\n" + "ldr temploadreg0, [%[b_ptr0], #0x48]\n" + "ldr d13, [%[b_ptr0], #0x50]\n" + "ins v9.d[1], temploadreg1\n" + ".word 0x4f84e910 // sdot v16.4s, v8.16b, v4.4b[2]\n" + "ldr temploadreg1, [%[b_ptr0], #0x58]\n" + "ldr d14, [%[b_ptr0], #0x60]\n" + "ins v10.d[1], temploadreg2\n" + ".word 0x4f84e931 // sdot v17.4s, v9.16b, v4.4b[2]\n" + "ldr temploadreg2, [%[b_ptr0], #0x68]\n" + "ldr d15, [%[b_ptr0], #0x70]\n" + "ins v11.d[1], temploadreg3\n" + ".word 0x4f84e952 // sdot v18.4s, v10.16b, v4.4b[2]\n" + "ldr temploadreg3, [%[b_ptr0], #0x78]\n" + "ins v12.d[1], temploadreg0\n" + "add %[b_ptr0], %[b_ptr0], #0x100\n" + ".word 0x4f84e973 // sdot v19.4s, v11.16b, v4.4b[2]\n" + "ldr d8, [%[b_ptr0], #-0x80]\n" + "ldr temploadreg0, [%[b_ptr0], #-0x78]\n" + ".word 0x4fa4e990 // sdot v16.4s, v12.16b, v4.4b[3]\n" + "ldr d9, [%[b_ptr0], #-0x70]\n" + "ins v13.d[1], temploadreg1\n" + "ldr temploadreg1, [%[b_ptr0], #-0x68]\n" + "ldr d10, [%[b_ptr0], #-0x60]\n" + "ins v14.d[1], temploadreg2\n" + ".word 0x4fa4e9b1 // sdot v17.4s, v13.16b, v4.4b[3]\n" + "ldr temploadreg2, [%[b_ptr0], #-0x58]\n" + "ldr d11, [%[b_ptr0], #-0x50]\n" + "ins v15.d[1], temploadreg3\n" + ".word 0x4fa4e9d2 // sdot v18.4s, v14.16b, v4.4b[3]\n" + "ldr temploadreg3, [%[b_ptr0], #-0x48]\n" + "ldr d12, [%[b_ptr0], #-0x40]\n" + "ins v8.d[1], temploadreg0\n" + ".word 0x4fa4e9f3 // sdot v19.4s, v15.16b, v4.4b[3]\n" + "ldr temploadreg0, [%[b_ptr0], #-0x38]\n" + "ldr d13, [%[b_ptr0], #-0x30]\n" + "ins v9.d[1], temploadreg1\n" + "ldr temploadreg1, [%[b_ptr0], #-0x28]\n" + "ldr d14, [%[b_ptr0], #-0x20]\n" + "ins v10.d[1], temploadreg2\n" + "ldr temploadreg2, [%[b_ptr0], #-0x18]\n" + "ins v11.d[1], temploadreg3\n" + "ins v12.d[1], temploadreg0\n" + "ins v13.d[1], temploadreg1\n" + "b.ne 3b\n" + "2:\n" + "ins v14.d[1], temploadreg2\n" + "prfm PSTL1KEEP, [%[c_ptr0]]\n" + "ldr d15, [%[b_ptr0], #-0x10]\n" + "ldr temploadreg3, [%[b_ptr0], #-0x8]\n" + "ins v15.d[1], temploadreg3\n" + "cbz %[regs], 4f\n" + ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" + "ldr d4, [%[a_ptr0]]\n" + ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" + "ldr temploadreg0, [%[a_ptr0], #0x8]\n" + ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" + "ldr d8, [%[b_ptr0]]\n" + ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" + "ldr d9, [%[b_ptr0], #0x10]\n" + ".word 0x4fa0e190 // sdot v16.4s, v12.16b, v0.4b[1]\n" + "ins v4.d[1], temploadreg0\n" + ".word 0x4fa0e1b1 // sdot v17.4s, v13.16b, v0.4b[1]\n" + "ldr temploadreg0, [%[b_ptr0], #0x8]\n" + ".word 0x4fa0e1d2 // sdot v18.4s, v14.16b, v0.4b[1]\n" + "ldr temploadreg1, [%[b_ptr0], #0x18]\n" + ".word 0x4fa0e1f3 // sdot v19.4s, v15.16b, v0.4b[1]\n" + "ldr d10, [%[b_ptr0], #0x20]\n" + "ldr temploadreg2, [%[b_ptr0], #0x28]\n" + "add %[a_ptr0], %[a_ptr0], #0x10\n" + "ldr d11, [%[b_ptr0], #0x30]\n" + "ldr temploadreg3, [%[b_ptr0], #0x38]\n" + "ldr d12, [%[b_ptr0], #0x40]\n" + "ins v8.d[1], temploadreg0\n" + "ldr temploadreg0, [%[b_ptr0], #0x48]\n" + "ldr d13, [%[b_ptr0], #0x50]\n" + "ins v9.d[1], temploadreg1\n" + ".word 0x4f80e910 // sdot v16.4s, v8.16b, v0.4b[2]\n" + "ldr temploadreg1, [%[b_ptr0], #0x58]\n" + "ldr d14, [%[b_ptr0], #0x60]\n" + "ins v10.d[1], temploadreg2\n" + ".word 0x4f80e931 // sdot v17.4s, v9.16b, v0.4b[2]\n" + "ldr temploadreg2, [%[b_ptr0], #0x68]\n" + "ldr d15, [%[b_ptr0], #0x70]\n" + "ins v11.d[1], temploadreg3\n" + ".word 0x4f80e952 // sdot v18.4s, v10.16b, v0.4b[2]\n" + "ldr temploadreg3, [%[b_ptr0], #0x78]\n" + "ins v12.d[1], temploadreg0\n" + "add %[b_ptr0], %[b_ptr0], #0x100\n" + ".word 0x4f80e973 // sdot v19.4s, v11.16b, v0.4b[2]\n" + "ldr d8, [%[b_ptr0], #-0x80]\n" + "ldr temploadreg0, [%[b_ptr0], #-0x78]\n" + ".word 0x4fa0e990 // sdot v16.4s, v12.16b, v0.4b[3]\n" + "ldr d9, [%[b_ptr0], #-0x70]\n" + "ins v13.d[1], temploadreg1\n" + "ldr temploadreg1, [%[b_ptr0], #-0x68]\n" + "ldr d10, [%[b_ptr0], #-0x60]\n" + "ins v14.d[1], temploadreg2\n" + ".word 0x4fa0e9b1 // sdot v17.4s, v13.16b, v0.4b[3]\n" + "ldr temploadreg2, [%[b_ptr0], #-0x58]\n" + "ldr d11, [%[b_ptr0], #-0x50]\n" + "ins v15.d[1], temploadreg3\n" + ".word 0x4fa0e9d2 // sdot v18.4s, v14.16b, v0.4b[3]\n" + "ldr temploadreg3, [%[b_ptr0], #-0x48]\n" + "ldr d12, [%[b_ptr0], #-0x40]\n" + "ins v8.d[1], temploadreg0\n" + ".word 0x4fa0e9f3 // sdot v19.4s, v15.16b, v0.4b[3]\n" + "ldr temploadreg0, [%[b_ptr0], #-0x38]\n" + "ldr d13, [%[b_ptr0], #-0x30]\n" + "ins v9.d[1], temploadreg1\n" + ".word 0x4f84e110 // sdot v16.4s, v8.16b, v4.4b[0]\n" + "ldr temploadreg1, [%[b_ptr0], #-0x28]\n" + "ldr d14, [%[b_ptr0], #-0x20]\n" + "ins v10.d[1], temploadreg2\n" + ".word 0x4f84e131 // sdot v17.4s, v9.16b, v4.4b[0]\n" + "ldr temploadreg2, [%[b_ptr0], #-0x18]\n" + "ldr d15, [%[b_ptr0], #-0x10]\n" + "ins v11.d[1], temploadreg3\n" + ".word 0x4f84e152 // sdot v18.4s, v10.16b, v4.4b[0]\n" + "ldr temploadreg3, [%[b_ptr0], #-0x8]\n" + "ldr d8, [%[b_ptr0]]\n" + "ins v12.d[1], temploadreg0\n" + ".word 0x4f84e173 // sdot v19.4s, v11.16b, v4.4b[0]\n" + "ldr temploadreg0, [%[b_ptr0], #0x8]\n" + "ldr d9, [%[b_ptr0], #0x10]\n" + "ins v13.d[1], temploadreg1\n" + ".word 0x4fa4e190 // sdot v16.4s, v12.16b, v4.4b[1]\n" + "ldr temploadreg1, [%[b_ptr0], #0x18]\n" + "ldr d10, [%[b_ptr0], #0x20]\n" + "ins v14.d[1], temploadreg2\n" + ".word 0x4fa4e1b1 // sdot v17.4s, v13.16b, v4.4b[1]\n" + "ldr temploadreg2, [%[b_ptr0], #0x28]\n" + "ldr d11, [%[b_ptr0], #0x30]\n" + "ins v15.d[1], temploadreg3\n" + ".word 0x4fa4e1d2 // sdot v18.4s, v14.16b, v4.4b[1]\n" + "ldr temploadreg3, [%[b_ptr0], #0x38]\n" + "ldr d12, [%[b_ptr0], #0x40]\n" + "ins v8.d[1], temploadreg0\n" + ".word 0x4fa4e1f3 // sdot v19.4s, v15.16b, v4.4b[1]\n" + "ldr temploadreg0, [%[b_ptr0], #0x48]\n" + "ldr d13, [%[b_ptr0], #0x50]\n" + "ins v9.d[1], temploadreg1\n" + ".word 0x4f84e910 // sdot v16.4s, v8.16b, v4.4b[2]\n" + "ldr temploadreg1, [%[b_ptr0], #0x58]\n" + "ldr d14, [%[b_ptr0], #0x60]\n" + "ins v10.d[1], temploadreg2\n" + ".word 0x4f84e931 // sdot v17.4s, v9.16b, v4.4b[2]\n" + "ldr temploadreg2, [%[b_ptr0], #0x68]\n" + "ldr d15, [%[b_ptr0], #0x70]\n" + "ins v11.d[1], temploadreg3\n" + ".word 0x4f84e952 // sdot v18.4s, v10.16b, v4.4b[2]\n" + "ldr temploadreg3, [%[b_ptr0], #0x78]\n" + "ins v12.d[1], temploadreg0\n" + "add %[b_ptr0], %[b_ptr0], #0x80\n" + ".word 0x4f84e973 // sdot v19.4s, v11.16b, v4.4b[2]\n" + "ins v13.d[1], temploadreg1\n" + "ins v14.d[1], temploadreg2\n" + ".word 0x4fa4e990 // sdot v16.4s, v12.16b, v4.4b[3]\n" + "ins v15.d[1], temploadreg3\n" + ".word 0x4fa4e9b1 // sdot v17.4s, v13.16b, v4.4b[3]\n" + ".word 0x4fa4e9d2 // sdot v18.4s, v14.16b, v4.4b[3]\n" + ".word 0x4fa4e9f3 // sdot v19.4s, v15.16b, v4.4b[3]\n" + "b 5f\n" + "4:\n" + ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" + "ldr d8, [%[b_ptr0]]\n" + ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" + "ldr temploadreg0, [%[b_ptr0], #0x8]\n" + ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" + "ldr d9, [%[b_ptr0], #0x10]\n" + ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" + "ldr temploadreg1, [%[b_ptr0], #0x18]\n" + ".word 0x4fa0e190 // sdot v16.4s, v12.16b, v0.4b[1]\n" + "ldr d10, [%[b_ptr0], #0x20]\n" + ".word 0x4fa0e1b1 // sdot v17.4s, v13.16b, v0.4b[1]\n" + "ldr temploadreg2, [%[b_ptr0], #0x28]\n" + ".word 0x4fa0e1d2 // sdot v18.4s, v14.16b, v0.4b[1]\n" + "ldr d11, [%[b_ptr0], #0x30]\n" + ".word 0x4fa0e1f3 // sdot v19.4s, v15.16b, v0.4b[1]\n" + "ldr temploadreg3, [%[b_ptr0], #0x38]\n" + "ldr d12, [%[b_ptr0], #0x40]\n" + "ins v8.d[1], temploadreg0\n" + "ldr temploadreg0, [%[b_ptr0], #0x48]\n" + "ldr d13, [%[b_ptr0], #0x50]\n" + "ins v9.d[1], temploadreg1\n" + ".word 0x4f80e910 // sdot v16.4s, v8.16b, v0.4b[2]\n" + "ldr temploadreg1, [%[b_ptr0], #0x58]\n" + "ldr d14, [%[b_ptr0], #0x60]\n" + "ins v10.d[1], temploadreg2\n" + ".word 0x4f80e931 // sdot v17.4s, v9.16b, v0.4b[2]\n" + "ldr temploadreg2, [%[b_ptr0], #0x68]\n" + "ldr d15, [%[b_ptr0], #0x70]\n" + "ins v11.d[1], temploadreg3\n" + ".word 0x4f80e952 // sdot v18.4s, v10.16b, v0.4b[2]\n" + "ldr temploadreg3, [%[b_ptr0], #0x78]\n" + "ins v12.d[1], temploadreg0\n" + "add %[b_ptr0], %[b_ptr0], #0x80\n" + ".word 0x4f80e973 // sdot v19.4s, v11.16b, v0.4b[2]\n" + "ins v13.d[1], temploadreg1\n" + "ins v14.d[1], temploadreg2\n" + ".word 0x4fa0e990 // sdot v16.4s, v12.16b, v0.4b[3]\n" + "ins v15.d[1], temploadreg3\n" + ".word 0x4fa0e9b1 // sdot v17.4s, v13.16b, v0.4b[3]\n" + ".word 0x4fa0e9d2 // sdot v18.4s, v14.16b, v0.4b[3]\n" + ".word 0x4fa0e9f3 // sdot v19.4s, v15.16b, v0.4b[3]\n" + "5:\n" + "cbz %[blocks], 6f\n" + "7:\n" + "ldr q8, [%[b_ptr0]]\n" + "subs %[blocks], %[blocks], #0x1\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + "ldr s0, [%[a_ptr0]]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + "add %[a_ptr0], %[a_ptr0], #0x4\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + "add %[b_ptr0], %[b_ptr0], #0x40\n" + ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" + ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" + ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" + ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" + "b.ne 7b\n" + "6:\n" + "cbz %[odds], 8f\n" + "ld1 {v0.b}[0], [%[a_ptr0]], #1\n" + "subs %[odds], %[odds], #0x1\n" + "b.eq 9f\n" + "ld1 {v0.b}[1], [%[a_ptr0]], #1\n" + "subs %[odds], %[odds], #0x1\n" + "b.eq 9f\n" + "ld1 {v0.b}[2], [%[a_ptr0]]\n" + "9:\n" + "ldr q8, [%[b_ptr0]]\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" + ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" + ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" + ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" + "8:\n" + "str q16, [%[c_ptr0]]\n" + "str q17, [%[c_ptr0], #0x10]\n" + "str q18, [%[c_ptr0], #0x20]\n" + "str q19, [%[c_ptr0], #0x30]\n" + "add %[c_ptr0], %[c_ptr0], #0x40\n" + ".unreq temploadreg0\n" + ".unreq temploadreg1\n" + ".unreq temploadreg2\n" + ".unreq temploadreg3\n" + : [a_ptr0] "+r" (a_ptr0), [b_ptr0] "+r" (b_ptr0), [c_ptr0] "+r" (c_ptr0), [loops] "+r" (loops), [regs] "+r" (regs), [blocks] "+r" (blocks), [odds] "+r" (odds) + : [betaptr] "r" (betaptr), [width] "r" (width), [beta0] "r" (beta0), [lda] "r" (ldab), [ldc] "r" (ldcb) + : "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x0", "x1", "x2", "x3", "cc", "memory" ); break; case 2: __asm __volatile ( - "a_ptr1 .req X0\n" - "c_ptr1 .req X1\n" - "temploadreg0 .req X2\n" - "temploadreg1 .req X3\n" - "temploadreg2 .req X4\n" - "temploadreg3 .req X5\n" - "add a_ptr1, %[a_ptr0], %[lda]\n" - "add c_ptr1, %[c_ptr0], %[ldc]\n" - "cbz %[beta0], 1f\n" - "movi v16.4s, #0\n" - "ldr q0, [%[a_ptr0]]\n" - "movi v17.4s, #0\n" - "ldr q1, [a_ptr1]\n" - "movi v18.4s, #0\n" - "ldr q8, [%[b_ptr0]]\n" - "movi v19.4s, #0\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - "movi v20.4s, #0\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - "movi v21.4s, #0\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - "movi v22.4s, #0\n" - "ldr q12, [%[b_ptr0], #0x40]\n" - "movi v23.4s, #0\n" - "ldr q13, [%[b_ptr0], #0x50]\n" - "ldr d14, [%[b_ptr0], #0x60]\n" - "add %[a_ptr0], %[a_ptr0], #0x10\n" - "ldr temploadreg2, [%[b_ptr0], #0x68]\n" - "add a_ptr1, a_ptr1, #0x10\n" - "add %[b_ptr0], %[b_ptr0], #0x80\n" - "cbz %[loops], 2f\n" - "b 3f\n" - "1:\n" - "ld1r {v15.4s}, [%[betaptr]]\n" - "ldr q16, [%[c_ptr0]]\n" - "ldr q17, [%[c_ptr0], #0x10]\n" - "ldr q18, [%[c_ptr0], #0x20]\n" - "ldr q19, [%[c_ptr0], #0x30]\n" - "mul v16.4s, v16.4s, v15.4s\n" - "ldr q20, [c_ptr1]\n" - "mul v17.4s, v17.4s, v15.4s\n" - "ldr q21, [c_ptr1, #0x10]\n" - "mul v18.4s, v18.4s, v15.4s\n" - "ldr q22, [c_ptr1, #0x20]\n" - "mul v19.4s, v19.4s, v15.4s\n" - "ldr q23, [c_ptr1, #0x30]\n" - "mul v20.4s, v20.4s, v15.4s\n" - "ldr q0, [%[a_ptr0]]\n" - "mul v21.4s, v21.4s, v15.4s\n" - "ldr q1, [a_ptr1]\n" - "mul v22.4s, v22.4s, v15.4s\n" - "ldr q8, [%[b_ptr0]]\n" - "mul v23.4s, v23.4s, v15.4s\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - "add %[a_ptr0], %[a_ptr0], #0x10\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - "add a_ptr1, a_ptr1, #0x10\n" - "ldr q12, [%[b_ptr0], #0x40]\n" - "ldr q13, [%[b_ptr0], #0x50]\n" - "ldr d14, [%[b_ptr0], #0x60]\n" - "ldr temploadreg2, [%[b_ptr0], #0x68]\n" - "add %[b_ptr0], %[b_ptr0], #0x80\n" - "cbz %[loops], 2f\n" - "3:\n" - ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" - "ins v14.d[1], temploadreg2\n" - ".word 0x4f81e114 // sdot v20.4s, v8.16b, v1.4b[0]\n" - "ldr d15, [%[b_ptr0], #-0x10]\n" - ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" - "ldr temploadreg3, [%[b_ptr0], #-0x8]\n" - ".word 0x4f81e135 // sdot v21.4s, v9.16b, v1.4b[0]\n" - "ldr d4, [%[a_ptr0]]\n" - ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" - "ldr temploadreg0, [%[a_ptr0], #0x8]\n" - ".word 0x4f81e156 // sdot v22.4s, v10.16b, v1.4b[0]\n" - "ldr d5, [a_ptr1]\n" - ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" - "ldr temploadreg1, [a_ptr1, #0x8]\n" - ".word 0x4f81e177 // sdot v23.4s, v11.16b, v1.4b[0]\n" - "ldr d8, [%[b_ptr0]]\n" - ".word 0x4fa0e190 // sdot v16.4s, v12.16b, v0.4b[1]\n" - "ins v4.d[1], temploadreg0\n" - ".word 0x4fa1e194 // sdot v20.4s, v12.16b, v1.4b[1]\n" - "ldr temploadreg0, [%[b_ptr0], #0x8]\n" - ".word 0x4fa0e1b1 // sdot v17.4s, v13.16b, v0.4b[1]\n" - "ldr d9, [%[b_ptr0], #0x10]\n" - ".word 0x4fa1e1b5 // sdot v21.4s, v13.16b, v1.4b[1]\n" - "ins v5.d[1], temploadreg1\n" - ".word 0x4fa0e1d2 // sdot v18.4s, v14.16b, v0.4b[1]\n" - "ldr temploadreg1, [%[b_ptr0], #0x18]\n" - ".word 0x4fa1e1d6 // sdot v22.4s, v14.16b, v1.4b[1]\n" - "ldr d10, [%[b_ptr0], #0x20]\n" - "ldr temploadreg2, [%[b_ptr0], #0x28]\n" - "subs %[loops], %[loops], #0x1\n" - "ldr d11, [%[b_ptr0], #0x30]\n" - "prfm PLDL1KEEP, [%[a_ptr0], #0x40]\n" - "ins v15.d[1], temploadreg3\n" - "add %[a_ptr0], %[a_ptr0], #0x20\n" - "ldr temploadreg3, [%[b_ptr0], #0x38]\n" - "add a_ptr1, a_ptr1, #0x20\n" - ".word 0x4fa0e1f3 // sdot v19.4s, v15.16b, v0.4b[1]\n" - "ldr d12, [%[b_ptr0], #0x40]\n" - ".word 0x4fa1e1f7 // sdot v23.4s, v15.16b, v1.4b[1]\n" - "ins v8.d[1], temploadreg0\n" - "ldr temploadreg0, [%[b_ptr0], #0x48]\n" - "prfm PLDL1KEEP, [a_ptr1, #0x40]\n" - "ldr d13, [%[b_ptr0], #0x50]\n" - ".word 0x4f80e910 // sdot v16.4s, v8.16b, v0.4b[2]\n" - "ins v9.d[1], temploadreg1\n" - ".word 0x4f81e914 // sdot v20.4s, v8.16b, v1.4b[2]\n" - "ldr temploadreg1, [%[b_ptr0], #0x58]\n" - "ldr d14, [%[b_ptr0], #0x60]\n" - "ins v10.d[1], temploadreg2\n" - ".word 0x4f80e931 // sdot v17.4s, v9.16b, v0.4b[2]\n" - "ldr temploadreg2, [%[b_ptr0], #0x68]\n" - ".word 0x4f81e935 // sdot v21.4s, v9.16b, v1.4b[2]\n" - "ldr d15, [%[b_ptr0], #0x70]\n" - "ins v11.d[1], temploadreg3\n" - ".word 0x4f80e952 // sdot v18.4s, v10.16b, v0.4b[2]\n" - "ldr temploadreg3, [%[b_ptr0], #0x78]\n" - ".word 0x4f81e956 // sdot v22.4s, v10.16b, v1.4b[2]\n" - "ins v12.d[1], temploadreg0\n" - "ins v13.d[1], temploadreg1\n" - "add %[b_ptr0], %[b_ptr0], #0x100\n" - ".word 0x4f80e973 // sdot v19.4s, v11.16b, v0.4b[2]\n" - "ldr d8, [%[b_ptr0], #-0x80]\n" - ".word 0x4f81e977 // sdot v23.4s, v11.16b, v1.4b[2]\n" - "ldr temploadreg0, [%[b_ptr0], #-0x78]\n" - ".word 0x4fa0e990 // sdot v16.4s, v12.16b, v0.4b[3]\n" - "ldr d9, [%[b_ptr0], #-0x70]\n" - ".word 0x4fa1e994 // sdot v20.4s, v12.16b, v1.4b[3]\n" - "ldr temploadreg1, [%[b_ptr0], #-0x68]\n" - ".word 0x4fa0e9b1 // sdot v17.4s, v13.16b, v0.4b[3]\n" - "ldr d10, [%[b_ptr0], #-0x60]\n" - ".word 0x4fa1e9b5 // sdot v21.4s, v13.16b, v1.4b[3]\n" - "ins v14.d[1], temploadreg2\n" - "ldr temploadreg2, [%[b_ptr0], #-0x58]\n" - "ldr d11, [%[b_ptr0], #-0x50]\n" - "ins v15.d[1], temploadreg3\n" - ".word 0x4fa0e9d2 // sdot v18.4s, v14.16b, v0.4b[3]\n" - "ldr temploadreg3, [%[b_ptr0], #-0x48]\n" - ".word 0x4fa1e9d6 // sdot v22.4s, v14.16b, v1.4b[3]\n" - "ldr d12, [%[b_ptr0], #-0x40]\n" - "ins v8.d[1], temploadreg0\n" - ".word 0x4fa0e9f3 // sdot v19.4s, v15.16b, v0.4b[3]\n" - "ldr temploadreg0, [%[b_ptr0], #-0x38]\n" - ".word 0x4fa1e9f7 // sdot v23.4s, v15.16b, v1.4b[3]\n" - "ldr d13, [%[b_ptr0], #-0x30]\n" - "ins v9.d[1], temploadreg1\n" - ".word 0x4f84e110 // sdot v16.4s, v8.16b, v4.4b[0]\n" - "ldr temploadreg1, [%[b_ptr0], #-0x28]\n" - ".word 0x4f85e114 // sdot v20.4s, v8.16b, v5.4b[0]\n" - "ldr d14, [%[b_ptr0], #-0x20]\n" - "ins v10.d[1], temploadreg2\n" - ".word 0x4f84e131 // sdot v17.4s, v9.16b, v4.4b[0]\n" - "ldr temploadreg2, [%[b_ptr0], #-0x18]\n" - ".word 0x4f85e135 // sdot v21.4s, v9.16b, v5.4b[0]\n" - "ldr d15, [%[b_ptr0], #-0x10]\n" - "ins v11.d[1], temploadreg3\n" - ".word 0x4f84e152 // sdot v18.4s, v10.16b, v4.4b[0]\n" - "ldr temploadreg3, [%[b_ptr0], #-0x8]\n" - ".word 0x4f85e156 // sdot v22.4s, v10.16b, v5.4b[0]\n" - "ldr d0, [%[a_ptr0], #-0x10]\n" - "ins v12.d[1], temploadreg0\n" - ".word 0x4f84e173 // sdot v19.4s, v11.16b, v4.4b[0]\n" - "ldr temploadreg0, [%[a_ptr0], #-0x8]\n" - ".word 0x4f85e177 // sdot v23.4s, v11.16b, v5.4b[0]\n" - "ldr d1, [a_ptr1, #-0x10]\n" - "ins v13.d[1], temploadreg1\n" - ".word 0x4fa4e190 // sdot v16.4s, v12.16b, v4.4b[1]\n" - "ldr temploadreg1, [a_ptr1, #-0x8]\n" - ".word 0x4fa5e194 // sdot v20.4s, v12.16b, v5.4b[1]\n" - "ldr d8, [%[b_ptr0]]\n" - "ins v0.d[1], temploadreg0\n" - ".word 0x4fa4e1b1 // sdot v17.4s, v13.16b, v4.4b[1]\n" - "ldr temploadreg0, [%[b_ptr0], #0x8]\n" - ".word 0x4fa5e1b5 // sdot v21.4s, v13.16b, v5.4b[1]\n" - "ldr d9, [%[b_ptr0], #0x10]\n" - "ins v1.d[1], temploadreg1\n" - "ldr temploadreg1, [%[b_ptr0], #0x18]\n" - "ldr d10, [%[b_ptr0], #0x20]\n" - "ins v14.d[1], temploadreg2\n" - "ldr temploadreg2, [%[b_ptr0], #0x28]\n" - "ldr d11, [%[b_ptr0], #0x30]\n" - "ins v15.d[1], temploadreg3\n" - ".word 0x4fa4e1d2 // sdot v18.4s, v14.16b, v4.4b[1]\n" - "ldr temploadreg3, [%[b_ptr0], #0x38]\n" - ".word 0x4fa5e1d6 // sdot v22.4s, v14.16b, v5.4b[1]\n" - "ldr d12, [%[b_ptr0], #0x40]\n" - "ins v8.d[1], temploadreg0\n" - ".word 0x4fa4e1f3 // sdot v19.4s, v15.16b, v4.4b[1]\n" - "ldr temploadreg0, [%[b_ptr0], #0x48]\n" - ".word 0x4fa5e1f7 // sdot v23.4s, v15.16b, v5.4b[1]\n" - "ldr d13, [%[b_ptr0], #0x50]\n" - "ins v9.d[1], temploadreg1\n" - ".word 0x4f84e910 // sdot v16.4s, v8.16b, v4.4b[2]\n" - "ldr temploadreg1, [%[b_ptr0], #0x58]\n" - ".word 0x4f85e914 // sdot v20.4s, v8.16b, v5.4b[2]\n" - "ldr d14, [%[b_ptr0], #0x60]\n" - "ins v10.d[1], temploadreg2\n" - ".word 0x4f84e931 // sdot v17.4s, v9.16b, v4.4b[2]\n" - "ldr temploadreg2, [%[b_ptr0], #0x68]\n" - ".word 0x4f85e935 // sdot v21.4s, v9.16b, v5.4b[2]\n" - "ldr d15, [%[b_ptr0], #0x70]\n" - "ins v11.d[1], temploadreg3\n" - ".word 0x4f84e952 // sdot v18.4s, v10.16b, v4.4b[2]\n" - "ldr temploadreg3, [%[b_ptr0], #0x78]\n" - ".word 0x4f85e956 // sdot v22.4s, v10.16b, v5.4b[2]\n" - "ins v12.d[1], temploadreg0\n" - "ins v13.d[1], temploadreg1\n" - "add %[b_ptr0], %[b_ptr0], #0x100\n" - ".word 0x4f84e973 // sdot v19.4s, v11.16b, v4.4b[2]\n" - "ldr d8, [%[b_ptr0], #-0x80]\n" - ".word 0x4f85e977 // sdot v23.4s, v11.16b, v5.4b[2]\n" - "ldr temploadreg0, [%[b_ptr0], #-0x78]\n" - ".word 0x4fa4e990 // sdot v16.4s, v12.16b, v4.4b[3]\n" - "ldr d9, [%[b_ptr0], #-0x70]\n" - ".word 0x4fa5e994 // sdot v20.4s, v12.16b, v5.4b[3]\n" - "ldr temploadreg1, [%[b_ptr0], #-0x68]\n" - ".word 0x4fa4e9b1 // sdot v17.4s, v13.16b, v4.4b[3]\n" - "ldr d10, [%[b_ptr0], #-0x60]\n" - ".word 0x4fa5e9b5 // sdot v21.4s, v13.16b, v5.4b[3]\n" - "ins v14.d[1], temploadreg2\n" - "ldr temploadreg2, [%[b_ptr0], #-0x58]\n" - "ldr d11, [%[b_ptr0], #-0x50]\n" - "ins v15.d[1], temploadreg3\n" - ".word 0x4fa4e9d2 // sdot v18.4s, v14.16b, v4.4b[3]\n" - "ldr temploadreg3, [%[b_ptr0], #-0x48]\n" - ".word 0x4fa5e9d6 // sdot v22.4s, v14.16b, v5.4b[3]\n" - "ldr d12, [%[b_ptr0], #-0x40]\n" - "ins v8.d[1], temploadreg0\n" - ".word 0x4fa4e9f3 // sdot v19.4s, v15.16b, v4.4b[3]\n" - "ldr temploadreg0, [%[b_ptr0], #-0x38]\n" - ".word 0x4fa5e9f7 // sdot v23.4s, v15.16b, v5.4b[3]\n" - "ldr d13, [%[b_ptr0], #-0x30]\n" - "ins v9.d[1], temploadreg1\n" - "ldr temploadreg1, [%[b_ptr0], #-0x28]\n" - "ldr d14, [%[b_ptr0], #-0x20]\n" - "ins v10.d[1], temploadreg2\n" - "ldr temploadreg2, [%[b_ptr0], #-0x18]\n" - "ins v11.d[1], temploadreg3\n" - "ins v12.d[1], temploadreg0\n" - "ins v13.d[1], temploadreg1\n" - "b.ne 3b\n" - "2:\n" - "ins v14.d[1], temploadreg2\n" - "prfm PSTL1KEEP, [%[c_ptr0]]\n" - "ldr d15, [%[b_ptr0], #-0x10]\n" - "prfm PSTL1KEEP, [c_ptr1]\n" - "ldr temploadreg3, [%[b_ptr0], #-0x8]\n" - "ins v15.d[1], temploadreg3\n" - "cbz %[regs], 4f\n" - ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" - "ldr d4, [%[a_ptr0]]\n" - ".word 0x4f81e114 // sdot v20.4s, v8.16b, v1.4b[0]\n" - "ldr temploadreg0, [%[a_ptr0], #0x8]\n" - ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" - "ldr d5, [a_ptr1]\n" - ".word 0x4f81e135 // sdot v21.4s, v9.16b, v1.4b[0]\n" - "ldr temploadreg1, [a_ptr1, #0x8]\n" - ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" - "ldr d8, [%[b_ptr0]]\n" - ".word 0x4f81e156 // sdot v22.4s, v10.16b, v1.4b[0]\n" - "ins v4.d[1], temploadreg0\n" - ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" - "ldr temploadreg0, [%[b_ptr0], #0x8]\n" - ".word 0x4f81e177 // sdot v23.4s, v11.16b, v1.4b[0]\n" - "ldr d9, [%[b_ptr0], #0x10]\n" - ".word 0x4fa0e190 // sdot v16.4s, v12.16b, v0.4b[1]\n" - "ins v5.d[1], temploadreg1\n" - ".word 0x4fa1e194 // sdot v20.4s, v12.16b, v1.4b[1]\n" - "ldr temploadreg1, [%[b_ptr0], #0x18]\n" - ".word 0x4fa0e1b1 // sdot v17.4s, v13.16b, v0.4b[1]\n" - "ldr d10, [%[b_ptr0], #0x20]\n" - ".word 0x4fa1e1b5 // sdot v21.4s, v13.16b, v1.4b[1]\n" - "ldr temploadreg2, [%[b_ptr0], #0x28]\n" - ".word 0x4fa0e1d2 // sdot v18.4s, v14.16b, v0.4b[1]\n" - "ldr d11, [%[b_ptr0], #0x30]\n" - ".word 0x4fa1e1d6 // sdot v22.4s, v14.16b, v1.4b[1]\n" - "ldr temploadreg3, [%[b_ptr0], #0x38]\n" - ".word 0x4fa0e1f3 // sdot v19.4s, v15.16b, v0.4b[1]\n" - "ldr d12, [%[b_ptr0], #0x40]\n" - ".word 0x4fa1e1f7 // sdot v23.4s, v15.16b, v1.4b[1]\n" - "ins v8.d[1], temploadreg0\n" - "ldr temploadreg0, [%[b_ptr0], #0x48]\n" - "add %[a_ptr0], %[a_ptr0], #0x10\n" - "ldr d13, [%[b_ptr0], #0x50]\n" - "add a_ptr1, a_ptr1, #0x10\n" - ".word 0x4f80e910 // sdot v16.4s, v8.16b, v0.4b[2]\n" - "ins v9.d[1], temploadreg1\n" - ".word 0x4f81e914 // sdot v20.4s, v8.16b, v1.4b[2]\n" - "ldr temploadreg1, [%[b_ptr0], #0x58]\n" - "ldr d14, [%[b_ptr0], #0x60]\n" - "ins v10.d[1], temploadreg2\n" - ".word 0x4f80e931 // sdot v17.4s, v9.16b, v0.4b[2]\n" - "ldr temploadreg2, [%[b_ptr0], #0x68]\n" - ".word 0x4f81e935 // sdot v21.4s, v9.16b, v1.4b[2]\n" - "ldr d15, [%[b_ptr0], #0x70]\n" - "ins v11.d[1], temploadreg3\n" - ".word 0x4f80e952 // sdot v18.4s, v10.16b, v0.4b[2]\n" - "ldr temploadreg3, [%[b_ptr0], #0x78]\n" - ".word 0x4f81e956 // sdot v22.4s, v10.16b, v1.4b[2]\n" - "ins v12.d[1], temploadreg0\n" - "ins v13.d[1], temploadreg1\n" - "add %[b_ptr0], %[b_ptr0], #0x100\n" - ".word 0x4f80e973 // sdot v19.4s, v11.16b, v0.4b[2]\n" - "ldr d8, [%[b_ptr0], #-0x80]\n" - ".word 0x4f81e977 // sdot v23.4s, v11.16b, v1.4b[2]\n" - "ldr temploadreg0, [%[b_ptr0], #-0x78]\n" - ".word 0x4fa0e990 // sdot v16.4s, v12.16b, v0.4b[3]\n" - "ldr d9, [%[b_ptr0], #-0x70]\n" - ".word 0x4fa1e994 // sdot v20.4s, v12.16b, v1.4b[3]\n" - "ldr temploadreg1, [%[b_ptr0], #-0x68]\n" - ".word 0x4fa0e9b1 // sdot v17.4s, v13.16b, v0.4b[3]\n" - "ldr d10, [%[b_ptr0], #-0x60]\n" - ".word 0x4fa1e9b5 // sdot v21.4s, v13.16b, v1.4b[3]\n" - "ins v14.d[1], temploadreg2\n" - "ldr temploadreg2, [%[b_ptr0], #-0x58]\n" - "ldr d11, [%[b_ptr0], #-0x50]\n" - "ins v15.d[1], temploadreg3\n" - ".word 0x4fa0e9d2 // sdot v18.4s, v14.16b, v0.4b[3]\n" - "ldr temploadreg3, [%[b_ptr0], #-0x48]\n" - ".word 0x4fa1e9d6 // sdot v22.4s, v14.16b, v1.4b[3]\n" - "ldr d12, [%[b_ptr0], #-0x40]\n" - "ins v8.d[1], temploadreg0\n" - ".word 0x4fa0e9f3 // sdot v19.4s, v15.16b, v0.4b[3]\n" - "ldr temploadreg0, [%[b_ptr0], #-0x38]\n" - ".word 0x4fa1e9f7 // sdot v23.4s, v15.16b, v1.4b[3]\n" - "ldr d13, [%[b_ptr0], #-0x30]\n" - "ins v9.d[1], temploadreg1\n" - ".word 0x4f84e110 // sdot v16.4s, v8.16b, v4.4b[0]\n" - "ldr temploadreg1, [%[b_ptr0], #-0x28]\n" - ".word 0x4f85e114 // sdot v20.4s, v8.16b, v5.4b[0]\n" - "ldr d14, [%[b_ptr0], #-0x20]\n" - "ins v10.d[1], temploadreg2\n" - ".word 0x4f84e131 // sdot v17.4s, v9.16b, v4.4b[0]\n" - "ldr temploadreg2, [%[b_ptr0], #-0x18]\n" - ".word 0x4f85e135 // sdot v21.4s, v9.16b, v5.4b[0]\n" - "ldr d15, [%[b_ptr0], #-0x10]\n" - "ins v11.d[1], temploadreg3\n" - ".word 0x4f84e152 // sdot v18.4s, v10.16b, v4.4b[0]\n" - "ldr temploadreg3, [%[b_ptr0], #-0x8]\n" - ".word 0x4f85e156 // sdot v22.4s, v10.16b, v5.4b[0]\n" - "ldr d8, [%[b_ptr0]]\n" - "ins v12.d[1], temploadreg0\n" - ".word 0x4f84e173 // sdot v19.4s, v11.16b, v4.4b[0]\n" - "ldr temploadreg0, [%[b_ptr0], #0x8]\n" - ".word 0x4f85e177 // sdot v23.4s, v11.16b, v5.4b[0]\n" - "ldr d9, [%[b_ptr0], #0x10]\n" - "ins v13.d[1], temploadreg1\n" - ".word 0x4fa4e190 // sdot v16.4s, v12.16b, v4.4b[1]\n" - "ldr temploadreg1, [%[b_ptr0], #0x18]\n" - ".word 0x4fa5e194 // sdot v20.4s, v12.16b, v5.4b[1]\n" - "ldr d10, [%[b_ptr0], #0x20]\n" - "ins v14.d[1], temploadreg2\n" - ".word 0x4fa4e1b1 // sdot v17.4s, v13.16b, v4.4b[1]\n" - "ldr temploadreg2, [%[b_ptr0], #0x28]\n" - ".word 0x4fa5e1b5 // sdot v21.4s, v13.16b, v5.4b[1]\n" - "ldr d11, [%[b_ptr0], #0x30]\n" - "ins v15.d[1], temploadreg3\n" - ".word 0x4fa4e1d2 // sdot v18.4s, v14.16b, v4.4b[1]\n" - "ldr temploadreg3, [%[b_ptr0], #0x38]\n" - ".word 0x4fa5e1d6 // sdot v22.4s, v14.16b, v5.4b[1]\n" - "ldr d12, [%[b_ptr0], #0x40]\n" - "ins v8.d[1], temploadreg0\n" - ".word 0x4fa4e1f3 // sdot v19.4s, v15.16b, v4.4b[1]\n" - "ldr temploadreg0, [%[b_ptr0], #0x48]\n" - ".word 0x4fa5e1f7 // sdot v23.4s, v15.16b, v5.4b[1]\n" - "ldr d13, [%[b_ptr0], #0x50]\n" - "ins v9.d[1], temploadreg1\n" - ".word 0x4f84e910 // sdot v16.4s, v8.16b, v4.4b[2]\n" - "ldr temploadreg1, [%[b_ptr0], #0x58]\n" - ".word 0x4f85e914 // sdot v20.4s, v8.16b, v5.4b[2]\n" - "ldr d14, [%[b_ptr0], #0x60]\n" - "ins v10.d[1], temploadreg2\n" - ".word 0x4f84e931 // sdot v17.4s, v9.16b, v4.4b[2]\n" - "ldr temploadreg2, [%[b_ptr0], #0x68]\n" - ".word 0x4f85e935 // sdot v21.4s, v9.16b, v5.4b[2]\n" - "ldr d15, [%[b_ptr0], #0x70]\n" - "ins v11.d[1], temploadreg3\n" - ".word 0x4f84e952 // sdot v18.4s, v10.16b, v4.4b[2]\n" - "ldr temploadreg3, [%[b_ptr0], #0x78]\n" - ".word 0x4f85e956 // sdot v22.4s, v10.16b, v5.4b[2]\n" - "ins v12.d[1], temploadreg0\n" - "ins v13.d[1], temploadreg1\n" - "add %[b_ptr0], %[b_ptr0], #0x80\n" - ".word 0x4f84e973 // sdot v19.4s, v11.16b, v4.4b[2]\n" - "ins v14.d[1], temploadreg2\n" - ".word 0x4f85e977 // sdot v23.4s, v11.16b, v5.4b[2]\n" - "ins v15.d[1], temploadreg3\n" - ".word 0x4fa4e990 // sdot v16.4s, v12.16b, v4.4b[3]\n" - ".word 0x4fa5e994 // sdot v20.4s, v12.16b, v5.4b[3]\n" - ".word 0x4fa4e9b1 // sdot v17.4s, v13.16b, v4.4b[3]\n" - ".word 0x4fa5e9b5 // sdot v21.4s, v13.16b, v5.4b[3]\n" - ".word 0x4fa4e9d2 // sdot v18.4s, v14.16b, v4.4b[3]\n" - ".word 0x4fa5e9d6 // sdot v22.4s, v14.16b, v5.4b[3]\n" - ".word 0x4fa4e9f3 // sdot v19.4s, v15.16b, v4.4b[3]\n" - ".word 0x4fa5e9f7 // sdot v23.4s, v15.16b, v5.4b[3]\n" - "b 5f\n" - "4:\n" - ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" - "ldr temploadreg0, [%[b_ptr0], #0x8]\n" - ".word 0x4f81e114 // sdot v20.4s, v8.16b, v1.4b[0]\n" - "ldr d8, [%[b_ptr0]]\n" - ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" - "ldr temploadreg1, [%[b_ptr0], #0x18]\n" - ".word 0x4f81e135 // sdot v21.4s, v9.16b, v1.4b[0]\n" - "ldr d9, [%[b_ptr0], #0x10]\n" - ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" - "ldr temploadreg2, [%[b_ptr0], #0x28]\n" - ".word 0x4f81e156 // sdot v22.4s, v10.16b, v1.4b[0]\n" - "ldr d10, [%[b_ptr0], #0x20]\n" - ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" - "ldr temploadreg3, [%[b_ptr0], #0x38]\n" - ".word 0x4f81e177 // sdot v23.4s, v11.16b, v1.4b[0]\n" - "ldr d11, [%[b_ptr0], #0x30]\n" - ".word 0x4fa0e190 // sdot v16.4s, v12.16b, v0.4b[1]\n" - "ins v8.d[1], temploadreg0\n" - ".word 0x4fa1e194 // sdot v20.4s, v12.16b, v1.4b[1]\n" - "ldr d12, [%[b_ptr0], #0x40]\n" - ".word 0x4fa0e1b1 // sdot v17.4s, v13.16b, v0.4b[1]\n" - "ldr temploadreg0, [%[b_ptr0], #0x48]\n" - ".word 0x4fa1e1b5 // sdot v21.4s, v13.16b, v1.4b[1]\n" - "ldr d13, [%[b_ptr0], #0x50]\n" - ".word 0x4fa0e1d2 // sdot v18.4s, v14.16b, v0.4b[1]\n" - "ins v9.d[1], temploadreg1\n" - ".word 0x4fa1e1d6 // sdot v22.4s, v14.16b, v1.4b[1]\n" - "ldr temploadreg1, [%[b_ptr0], #0x58]\n" - ".word 0x4fa0e1f3 // sdot v19.4s, v15.16b, v0.4b[1]\n" - "ldr d14, [%[b_ptr0], #0x60]\n" - ".word 0x4fa1e1f7 // sdot v23.4s, v15.16b, v1.4b[1]\n" - "ins v10.d[1], temploadreg2\n" - ".word 0x4f80e910 // sdot v16.4s, v8.16b, v0.4b[2]\n" - "ldr temploadreg2, [%[b_ptr0], #0x68]\n" - ".word 0x4f81e914 // sdot v20.4s, v8.16b, v1.4b[2]\n" - "ldr d15, [%[b_ptr0], #0x70]\n" - ".word 0x4f80e931 // sdot v17.4s, v9.16b, v0.4b[2]\n" - "ins v11.d[1], temploadreg3\n" - ".word 0x4f81e935 // sdot v21.4s, v9.16b, v1.4b[2]\n" - "ldr temploadreg3, [%[b_ptr0], #0x78]\n" - ".word 0x4f80e952 // sdot v18.4s, v10.16b, v0.4b[2]\n" - "ins v12.d[1], temploadreg0\n" - ".word 0x4f81e956 // sdot v22.4s, v10.16b, v1.4b[2]\n" - "ins v13.d[1], temploadreg1\n" - ".word 0x4f80e973 // sdot v19.4s, v11.16b, v0.4b[2]\n" - "ins v14.d[1], temploadreg2\n" - ".word 0x4f81e977 // sdot v23.4s, v11.16b, v1.4b[2]\n" - "ins v15.d[1], temploadreg3\n" - ".word 0x4fa0e990 // sdot v16.4s, v12.16b, v0.4b[3]\n" - "add %[b_ptr0], %[b_ptr0], #0x80\n" - ".word 0x4fa1e994 // sdot v20.4s, v12.16b, v1.4b[3]\n" - ".word 0x4fa0e9b1 // sdot v17.4s, v13.16b, v0.4b[3]\n" - ".word 0x4fa1e9b5 // sdot v21.4s, v13.16b, v1.4b[3]\n" - ".word 0x4fa0e9d2 // sdot v18.4s, v14.16b, v0.4b[3]\n" - ".word 0x4fa1e9d6 // sdot v22.4s, v14.16b, v1.4b[3]\n" - ".word 0x4fa0e9f3 // sdot v19.4s, v15.16b, v0.4b[3]\n" - ".word 0x4fa1e9f7 // sdot v23.4s, v15.16b, v1.4b[3]\n" - "5:\n" - "cbz %[blocks], 6f\n" - "7:\n" - "ldr q8, [%[b_ptr0]]\n" - "subs %[blocks], %[blocks], #0x1\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - "ldr s0, [%[a_ptr0]]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - "add %[a_ptr0], %[a_ptr0], #0x4\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - "add %[b_ptr0], %[b_ptr0], #0x40\n" - ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" - "ldr s1, [a_ptr1]\n" - ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" - "add a_ptr1, a_ptr1, #0x4\n" - ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" - ".word 0x4f81e114 // sdot v20.4s, v8.16b, v1.4b[0]\n" - ".word 0x4f81e135 // sdot v21.4s, v9.16b, v1.4b[0]\n" - ".word 0x4f81e156 // sdot v22.4s, v10.16b, v1.4b[0]\n" - ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" - ".word 0x4f81e177 // sdot v23.4s, v11.16b, v1.4b[0]\n" - "b.ne 7b\n" - "6:\n" - "cbz %[odds], 8f\n" - "ld1 {v0.b}[0], [%[a_ptr0]], #1\n" - "ld1 {v1.b}[0], [a_ptr1], #1\n" - "subs %[odds], %[odds], #0x1\n" - "b.eq 9f\n" - "ld1 {v0.b}[1], [%[a_ptr0]], #1\n" - "ld1 {v1.b}[1], [a_ptr1], #1\n" - "subs %[odds], %[odds], #0x1\n" - "b.eq 9f\n" - "ld1 {v0.b}[2], [%[a_ptr0]]\n" - "ld1 {v1.b}[2], [a_ptr1]\n" - "9:\n" - "ldr q8, [%[b_ptr0]]\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" - ".word 0x4f81e114 // sdot v20.4s, v8.16b, v1.4b[0]\n" - ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" - ".word 0x4f81e135 // sdot v21.4s, v9.16b, v1.4b[0]\n" - ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" - ".word 0x4f81e156 // sdot v22.4s, v10.16b, v1.4b[0]\n" - ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" - ".word 0x4f81e177 // sdot v23.4s, v11.16b, v1.4b[0]\n" - "8:\n" - "str q16, [%[c_ptr0]]\n" - "str q17, [%[c_ptr0], #0x10]\n" - "str q18, [%[c_ptr0], #0x20]\n" - "str q19, [%[c_ptr0], #0x30]\n" - "add %[c_ptr0], %[c_ptr0], #0x40\n" - "str q20, [c_ptr1]\n" - "str q21, [c_ptr1, #0x10]\n" - "str q22, [c_ptr1, #0x20]\n" - "str q23, [c_ptr1, #0x30]\n" - ".unreq a_ptr1\n" - ".unreq c_ptr1\n" - ".unreq temploadreg0\n" - ".unreq temploadreg1\n" - ".unreq temploadreg2\n" - ".unreq temploadreg3\n" - : [a_ptr0] "+r" (a_ptr0), [b_ptr0] "+r" (b_ptr0), [c_ptr0] "+r" (c_ptr0), [loops] "+r" (loops), [regs] "+r" (regs), [blocks] "+r" (blocks), [odds] "+r" (odds) - : [betaptr] "r" (betaptr), [width] "r" (width), [beta0] "r" (beta0), [lda] "r" (ldab), [ldc] "r" (ldcb) - : "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x0", "x1", "x2", "x3", "x4", "x5", "cc", "memory" + "a_ptr1 .req X0\n" + "c_ptr1 .req X1\n" + "temploadreg0 .req X2\n" + "temploadreg1 .req X3\n" + "temploadreg2 .req X4\n" + "temploadreg3 .req X5\n" + "add a_ptr1, %[a_ptr0], %[lda]\n" + "add c_ptr1, %[c_ptr0], %[ldc]\n" + "cbz %[beta0], 1f\n" + "movi v16.4s, #0\n" + "ldr q0, [%[a_ptr0]]\n" + "movi v17.4s, #0\n" + "ldr q1, [a_ptr1]\n" + "movi v18.4s, #0\n" + "ldr q8, [%[b_ptr0]]\n" + "movi v19.4s, #0\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + "movi v20.4s, #0\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + "movi v21.4s, #0\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + "movi v22.4s, #0\n" + "ldr q12, [%[b_ptr0], #0x40]\n" + "movi v23.4s, #0\n" + "ldr q13, [%[b_ptr0], #0x50]\n" + "ldr d14, [%[b_ptr0], #0x60]\n" + "add %[a_ptr0], %[a_ptr0], #0x10\n" + "ldr temploadreg2, [%[b_ptr0], #0x68]\n" + "add a_ptr1, a_ptr1, #0x10\n" + "add %[b_ptr0], %[b_ptr0], #0x80\n" + "cbz %[loops], 2f\n" + "b 3f\n" + "1:\n" + "ld1r {v15.4s}, [%[betaptr]]\n" + "ldr q16, [%[c_ptr0]]\n" + "ldr q17, [%[c_ptr0], #0x10]\n" + "ldr q18, [%[c_ptr0], #0x20]\n" + "ldr q19, [%[c_ptr0], #0x30]\n" + "mul v16.4s, v16.4s, v15.4s\n" + "ldr q20, [c_ptr1]\n" + "mul v17.4s, v17.4s, v15.4s\n" + "ldr q21, [c_ptr1, #0x10]\n" + "mul v18.4s, v18.4s, v15.4s\n" + "ldr q22, [c_ptr1, #0x20]\n" + "mul v19.4s, v19.4s, v15.4s\n" + "ldr q23, [c_ptr1, #0x30]\n" + "mul v20.4s, v20.4s, v15.4s\n" + "ldr q0, [%[a_ptr0]]\n" + "mul v21.4s, v21.4s, v15.4s\n" + "ldr q1, [a_ptr1]\n" + "mul v22.4s, v22.4s, v15.4s\n" + "ldr q8, [%[b_ptr0]]\n" + "mul v23.4s, v23.4s, v15.4s\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + "add %[a_ptr0], %[a_ptr0], #0x10\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + "add a_ptr1, a_ptr1, #0x10\n" + "ldr q12, [%[b_ptr0], #0x40]\n" + "ldr q13, [%[b_ptr0], #0x50]\n" + "ldr d14, [%[b_ptr0], #0x60]\n" + "ldr temploadreg2, [%[b_ptr0], #0x68]\n" + "add %[b_ptr0], %[b_ptr0], #0x80\n" + "cbz %[loops], 2f\n" + "3:\n" + ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" + "ins v14.d[1], temploadreg2\n" + ".word 0x4f81e114 // sdot v20.4s, v8.16b, v1.4b[0]\n" + "ldr d15, [%[b_ptr0], #-0x10]\n" + ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" + "ldr temploadreg3, [%[b_ptr0], #-0x8]\n" + ".word 0x4f81e135 // sdot v21.4s, v9.16b, v1.4b[0]\n" + "ldr d4, [%[a_ptr0]]\n" + ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" + "ldr temploadreg0, [%[a_ptr0], #0x8]\n" + ".word 0x4f81e156 // sdot v22.4s, v10.16b, v1.4b[0]\n" + "ldr d5, [a_ptr1]\n" + ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" + "ldr temploadreg1, [a_ptr1, #0x8]\n" + ".word 0x4f81e177 // sdot v23.4s, v11.16b, v1.4b[0]\n" + "ldr d8, [%[b_ptr0]]\n" + ".word 0x4fa0e190 // sdot v16.4s, v12.16b, v0.4b[1]\n" + "ins v4.d[1], temploadreg0\n" + ".word 0x4fa1e194 // sdot v20.4s, v12.16b, v1.4b[1]\n" + "ldr temploadreg0, [%[b_ptr0], #0x8]\n" + ".word 0x4fa0e1b1 // sdot v17.4s, v13.16b, v0.4b[1]\n" + "ldr d9, [%[b_ptr0], #0x10]\n" + ".word 0x4fa1e1b5 // sdot v21.4s, v13.16b, v1.4b[1]\n" + "ins v5.d[1], temploadreg1\n" + ".word 0x4fa0e1d2 // sdot v18.4s, v14.16b, v0.4b[1]\n" + "ldr temploadreg1, [%[b_ptr0], #0x18]\n" + ".word 0x4fa1e1d6 // sdot v22.4s, v14.16b, v1.4b[1]\n" + "ldr d10, [%[b_ptr0], #0x20]\n" + "ldr temploadreg2, [%[b_ptr0], #0x28]\n" + "subs %[loops], %[loops], #0x1\n" + "ldr d11, [%[b_ptr0], #0x30]\n" + "prfm PLDL1KEEP, [%[a_ptr0], #0x40]\n" + "ins v15.d[1], temploadreg3\n" + "add %[a_ptr0], %[a_ptr0], #0x20\n" + "ldr temploadreg3, [%[b_ptr0], #0x38]\n" + "add a_ptr1, a_ptr1, #0x20\n" + ".word 0x4fa0e1f3 // sdot v19.4s, v15.16b, v0.4b[1]\n" + "ldr d12, [%[b_ptr0], #0x40]\n" + ".word 0x4fa1e1f7 // sdot v23.4s, v15.16b, v1.4b[1]\n" + "ins v8.d[1], temploadreg0\n" + "ldr temploadreg0, [%[b_ptr0], #0x48]\n" + "prfm PLDL1KEEP, [a_ptr1, #0x40]\n" + "ldr d13, [%[b_ptr0], #0x50]\n" + ".word 0x4f80e910 // sdot v16.4s, v8.16b, v0.4b[2]\n" + "ins v9.d[1], temploadreg1\n" + ".word 0x4f81e914 // sdot v20.4s, v8.16b, v1.4b[2]\n" + "ldr temploadreg1, [%[b_ptr0], #0x58]\n" + "ldr d14, [%[b_ptr0], #0x60]\n" + "ins v10.d[1], temploadreg2\n" + ".word 0x4f80e931 // sdot v17.4s, v9.16b, v0.4b[2]\n" + "ldr temploadreg2, [%[b_ptr0], #0x68]\n" + ".word 0x4f81e935 // sdot v21.4s, v9.16b, v1.4b[2]\n" + "ldr d15, [%[b_ptr0], #0x70]\n" + "ins v11.d[1], temploadreg3\n" + ".word 0x4f80e952 // sdot v18.4s, v10.16b, v0.4b[2]\n" + "ldr temploadreg3, [%[b_ptr0], #0x78]\n" + ".word 0x4f81e956 // sdot v22.4s, v10.16b, v1.4b[2]\n" + "ins v12.d[1], temploadreg0\n" + "ins v13.d[1], temploadreg1\n" + "add %[b_ptr0], %[b_ptr0], #0x100\n" + ".word 0x4f80e973 // sdot v19.4s, v11.16b, v0.4b[2]\n" + "ldr d8, [%[b_ptr0], #-0x80]\n" + ".word 0x4f81e977 // sdot v23.4s, v11.16b, v1.4b[2]\n" + "ldr temploadreg0, [%[b_ptr0], #-0x78]\n" + ".word 0x4fa0e990 // sdot v16.4s, v12.16b, v0.4b[3]\n" + "ldr d9, [%[b_ptr0], #-0x70]\n" + ".word 0x4fa1e994 // sdot v20.4s, v12.16b, v1.4b[3]\n" + "ldr temploadreg1, [%[b_ptr0], #-0x68]\n" + ".word 0x4fa0e9b1 // sdot v17.4s, v13.16b, v0.4b[3]\n" + "ldr d10, [%[b_ptr0], #-0x60]\n" + ".word 0x4fa1e9b5 // sdot v21.4s, v13.16b, v1.4b[3]\n" + "ins v14.d[1], temploadreg2\n" + "ldr temploadreg2, [%[b_ptr0], #-0x58]\n" + "ldr d11, [%[b_ptr0], #-0x50]\n" + "ins v15.d[1], temploadreg3\n" + ".word 0x4fa0e9d2 // sdot v18.4s, v14.16b, v0.4b[3]\n" + "ldr temploadreg3, [%[b_ptr0], #-0x48]\n" + ".word 0x4fa1e9d6 // sdot v22.4s, v14.16b, v1.4b[3]\n" + "ldr d12, [%[b_ptr0], #-0x40]\n" + "ins v8.d[1], temploadreg0\n" + ".word 0x4fa0e9f3 // sdot v19.4s, v15.16b, v0.4b[3]\n" + "ldr temploadreg0, [%[b_ptr0], #-0x38]\n" + ".word 0x4fa1e9f7 // sdot v23.4s, v15.16b, v1.4b[3]\n" + "ldr d13, [%[b_ptr0], #-0x30]\n" + "ins v9.d[1], temploadreg1\n" + ".word 0x4f84e110 // sdot v16.4s, v8.16b, v4.4b[0]\n" + "ldr temploadreg1, [%[b_ptr0], #-0x28]\n" + ".word 0x4f85e114 // sdot v20.4s, v8.16b, v5.4b[0]\n" + "ldr d14, [%[b_ptr0], #-0x20]\n" + "ins v10.d[1], temploadreg2\n" + ".word 0x4f84e131 // sdot v17.4s, v9.16b, v4.4b[0]\n" + "ldr temploadreg2, [%[b_ptr0], #-0x18]\n" + ".word 0x4f85e135 // sdot v21.4s, v9.16b, v5.4b[0]\n" + "ldr d15, [%[b_ptr0], #-0x10]\n" + "ins v11.d[1], temploadreg3\n" + ".word 0x4f84e152 // sdot v18.4s, v10.16b, v4.4b[0]\n" + "ldr temploadreg3, [%[b_ptr0], #-0x8]\n" + ".word 0x4f85e156 // sdot v22.4s, v10.16b, v5.4b[0]\n" + "ldr d0, [%[a_ptr0], #-0x10]\n" + "ins v12.d[1], temploadreg0\n" + ".word 0x4f84e173 // sdot v19.4s, v11.16b, v4.4b[0]\n" + "ldr temploadreg0, [%[a_ptr0], #-0x8]\n" + ".word 0x4f85e177 // sdot v23.4s, v11.16b, v5.4b[0]\n" + "ldr d1, [a_ptr1, #-0x10]\n" + "ins v13.d[1], temploadreg1\n" + ".word 0x4fa4e190 // sdot v16.4s, v12.16b, v4.4b[1]\n" + "ldr temploadreg1, [a_ptr1, #-0x8]\n" + ".word 0x4fa5e194 // sdot v20.4s, v12.16b, v5.4b[1]\n" + "ldr d8, [%[b_ptr0]]\n" + "ins v0.d[1], temploadreg0\n" + ".word 0x4fa4e1b1 // sdot v17.4s, v13.16b, v4.4b[1]\n" + "ldr temploadreg0, [%[b_ptr0], #0x8]\n" + ".word 0x4fa5e1b5 // sdot v21.4s, v13.16b, v5.4b[1]\n" + "ldr d9, [%[b_ptr0], #0x10]\n" + "ins v1.d[1], temploadreg1\n" + "ldr temploadreg1, [%[b_ptr0], #0x18]\n" + "ldr d10, [%[b_ptr0], #0x20]\n" + "ins v14.d[1], temploadreg2\n" + "ldr temploadreg2, [%[b_ptr0], #0x28]\n" + "ldr d11, [%[b_ptr0], #0x30]\n" + "ins v15.d[1], temploadreg3\n" + ".word 0x4fa4e1d2 // sdot v18.4s, v14.16b, v4.4b[1]\n" + "ldr temploadreg3, [%[b_ptr0], #0x38]\n" + ".word 0x4fa5e1d6 // sdot v22.4s, v14.16b, v5.4b[1]\n" + "ldr d12, [%[b_ptr0], #0x40]\n" + "ins v8.d[1], temploadreg0\n" + ".word 0x4fa4e1f3 // sdot v19.4s, v15.16b, v4.4b[1]\n" + "ldr temploadreg0, [%[b_ptr0], #0x48]\n" + ".word 0x4fa5e1f7 // sdot v23.4s, v15.16b, v5.4b[1]\n" + "ldr d13, [%[b_ptr0], #0x50]\n" + "ins v9.d[1], temploadreg1\n" + ".word 0x4f84e910 // sdot v16.4s, v8.16b, v4.4b[2]\n" + "ldr temploadreg1, [%[b_ptr0], #0x58]\n" + ".word 0x4f85e914 // sdot v20.4s, v8.16b, v5.4b[2]\n" + "ldr d14, [%[b_ptr0], #0x60]\n" + "ins v10.d[1], temploadreg2\n" + ".word 0x4f84e931 // sdot v17.4s, v9.16b, v4.4b[2]\n" + "ldr temploadreg2, [%[b_ptr0], #0x68]\n" + ".word 0x4f85e935 // sdot v21.4s, v9.16b, v5.4b[2]\n" + "ldr d15, [%[b_ptr0], #0x70]\n" + "ins v11.d[1], temploadreg3\n" + ".word 0x4f84e952 // sdot v18.4s, v10.16b, v4.4b[2]\n" + "ldr temploadreg3, [%[b_ptr0], #0x78]\n" + ".word 0x4f85e956 // sdot v22.4s, v10.16b, v5.4b[2]\n" + "ins v12.d[1], temploadreg0\n" + "ins v13.d[1], temploadreg1\n" + "add %[b_ptr0], %[b_ptr0], #0x100\n" + ".word 0x4f84e973 // sdot v19.4s, v11.16b, v4.4b[2]\n" + "ldr d8, [%[b_ptr0], #-0x80]\n" + ".word 0x4f85e977 // sdot v23.4s, v11.16b, v5.4b[2]\n" + "ldr temploadreg0, [%[b_ptr0], #-0x78]\n" + ".word 0x4fa4e990 // sdot v16.4s, v12.16b, v4.4b[3]\n" + "ldr d9, [%[b_ptr0], #-0x70]\n" + ".word 0x4fa5e994 // sdot v20.4s, v12.16b, v5.4b[3]\n" + "ldr temploadreg1, [%[b_ptr0], #-0x68]\n" + ".word 0x4fa4e9b1 // sdot v17.4s, v13.16b, v4.4b[3]\n" + "ldr d10, [%[b_ptr0], #-0x60]\n" + ".word 0x4fa5e9b5 // sdot v21.4s, v13.16b, v5.4b[3]\n" + "ins v14.d[1], temploadreg2\n" + "ldr temploadreg2, [%[b_ptr0], #-0x58]\n" + "ldr d11, [%[b_ptr0], #-0x50]\n" + "ins v15.d[1], temploadreg3\n" + ".word 0x4fa4e9d2 // sdot v18.4s, v14.16b, v4.4b[3]\n" + "ldr temploadreg3, [%[b_ptr0], #-0x48]\n" + ".word 0x4fa5e9d6 // sdot v22.4s, v14.16b, v5.4b[3]\n" + "ldr d12, [%[b_ptr0], #-0x40]\n" + "ins v8.d[1], temploadreg0\n" + ".word 0x4fa4e9f3 // sdot v19.4s, v15.16b, v4.4b[3]\n" + "ldr temploadreg0, [%[b_ptr0], #-0x38]\n" + ".word 0x4fa5e9f7 // sdot v23.4s, v15.16b, v5.4b[3]\n" + "ldr d13, [%[b_ptr0], #-0x30]\n" + "ins v9.d[1], temploadreg1\n" + "ldr temploadreg1, [%[b_ptr0], #-0x28]\n" + "ldr d14, [%[b_ptr0], #-0x20]\n" + "ins v10.d[1], temploadreg2\n" + "ldr temploadreg2, [%[b_ptr0], #-0x18]\n" + "ins v11.d[1], temploadreg3\n" + "ins v12.d[1], temploadreg0\n" + "ins v13.d[1], temploadreg1\n" + "b.ne 3b\n" + "2:\n" + "ins v14.d[1], temploadreg2\n" + "prfm PSTL1KEEP, [%[c_ptr0]]\n" + "ldr d15, [%[b_ptr0], #-0x10]\n" + "prfm PSTL1KEEP, [c_ptr1]\n" + "ldr temploadreg3, [%[b_ptr0], #-0x8]\n" + "ins v15.d[1], temploadreg3\n" + "cbz %[regs], 4f\n" + ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" + "ldr d4, [%[a_ptr0]]\n" + ".word 0x4f81e114 // sdot v20.4s, v8.16b, v1.4b[0]\n" + "ldr temploadreg0, [%[a_ptr0], #0x8]\n" + ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" + "ldr d5, [a_ptr1]\n" + ".word 0x4f81e135 // sdot v21.4s, v9.16b, v1.4b[0]\n" + "ldr temploadreg1, [a_ptr1, #0x8]\n" + ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" + "ldr d8, [%[b_ptr0]]\n" + ".word 0x4f81e156 // sdot v22.4s, v10.16b, v1.4b[0]\n" + "ins v4.d[1], temploadreg0\n" + ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" + "ldr temploadreg0, [%[b_ptr0], #0x8]\n" + ".word 0x4f81e177 // sdot v23.4s, v11.16b, v1.4b[0]\n" + "ldr d9, [%[b_ptr0], #0x10]\n" + ".word 0x4fa0e190 // sdot v16.4s, v12.16b, v0.4b[1]\n" + "ins v5.d[1], temploadreg1\n" + ".word 0x4fa1e194 // sdot v20.4s, v12.16b, v1.4b[1]\n" + "ldr temploadreg1, [%[b_ptr0], #0x18]\n" + ".word 0x4fa0e1b1 // sdot v17.4s, v13.16b, v0.4b[1]\n" + "ldr d10, [%[b_ptr0], #0x20]\n" + ".word 0x4fa1e1b5 // sdot v21.4s, v13.16b, v1.4b[1]\n" + "ldr temploadreg2, [%[b_ptr0], #0x28]\n" + ".word 0x4fa0e1d2 // sdot v18.4s, v14.16b, v0.4b[1]\n" + "ldr d11, [%[b_ptr0], #0x30]\n" + ".word 0x4fa1e1d6 // sdot v22.4s, v14.16b, v1.4b[1]\n" + "ldr temploadreg3, [%[b_ptr0], #0x38]\n" + ".word 0x4fa0e1f3 // sdot v19.4s, v15.16b, v0.4b[1]\n" + "ldr d12, [%[b_ptr0], #0x40]\n" + ".word 0x4fa1e1f7 // sdot v23.4s, v15.16b, v1.4b[1]\n" + "ins v8.d[1], temploadreg0\n" + "ldr temploadreg0, [%[b_ptr0], #0x48]\n" + "add %[a_ptr0], %[a_ptr0], #0x10\n" + "ldr d13, [%[b_ptr0], #0x50]\n" + "add a_ptr1, a_ptr1, #0x10\n" + ".word 0x4f80e910 // sdot v16.4s, v8.16b, v0.4b[2]\n" + "ins v9.d[1], temploadreg1\n" + ".word 0x4f81e914 // sdot v20.4s, v8.16b, v1.4b[2]\n" + "ldr temploadreg1, [%[b_ptr0], #0x58]\n" + "ldr d14, [%[b_ptr0], #0x60]\n" + "ins v10.d[1], temploadreg2\n" + ".word 0x4f80e931 // sdot v17.4s, v9.16b, v0.4b[2]\n" + "ldr temploadreg2, [%[b_ptr0], #0x68]\n" + ".word 0x4f81e935 // sdot v21.4s, v9.16b, v1.4b[2]\n" + "ldr d15, [%[b_ptr0], #0x70]\n" + "ins v11.d[1], temploadreg3\n" + ".word 0x4f80e952 // sdot v18.4s, v10.16b, v0.4b[2]\n" + "ldr temploadreg3, [%[b_ptr0], #0x78]\n" + ".word 0x4f81e956 // sdot v22.4s, v10.16b, v1.4b[2]\n" + "ins v12.d[1], temploadreg0\n" + "ins v13.d[1], temploadreg1\n" + "add %[b_ptr0], %[b_ptr0], #0x100\n" + ".word 0x4f80e973 // sdot v19.4s, v11.16b, v0.4b[2]\n" + "ldr d8, [%[b_ptr0], #-0x80]\n" + ".word 0x4f81e977 // sdot v23.4s, v11.16b, v1.4b[2]\n" + "ldr temploadreg0, [%[b_ptr0], #-0x78]\n" + ".word 0x4fa0e990 // sdot v16.4s, v12.16b, v0.4b[3]\n" + "ldr d9, [%[b_ptr0], #-0x70]\n" + ".word 0x4fa1e994 // sdot v20.4s, v12.16b, v1.4b[3]\n" + "ldr temploadreg1, [%[b_ptr0], #-0x68]\n" + ".word 0x4fa0e9b1 // sdot v17.4s, v13.16b, v0.4b[3]\n" + "ldr d10, [%[b_ptr0], #-0x60]\n" + ".word 0x4fa1e9b5 // sdot v21.4s, v13.16b, v1.4b[3]\n" + "ins v14.d[1], temploadreg2\n" + "ldr temploadreg2, [%[b_ptr0], #-0x58]\n" + "ldr d11, [%[b_ptr0], #-0x50]\n" + "ins v15.d[1], temploadreg3\n" + ".word 0x4fa0e9d2 // sdot v18.4s, v14.16b, v0.4b[3]\n" + "ldr temploadreg3, [%[b_ptr0], #-0x48]\n" + ".word 0x4fa1e9d6 // sdot v22.4s, v14.16b, v1.4b[3]\n" + "ldr d12, [%[b_ptr0], #-0x40]\n" + "ins v8.d[1], temploadreg0\n" + ".word 0x4fa0e9f3 // sdot v19.4s, v15.16b, v0.4b[3]\n" + "ldr temploadreg0, [%[b_ptr0], #-0x38]\n" + ".word 0x4fa1e9f7 // sdot v23.4s, v15.16b, v1.4b[3]\n" + "ldr d13, [%[b_ptr0], #-0x30]\n" + "ins v9.d[1], temploadreg1\n" + ".word 0x4f84e110 // sdot v16.4s, v8.16b, v4.4b[0]\n" + "ldr temploadreg1, [%[b_ptr0], #-0x28]\n" + ".word 0x4f85e114 // sdot v20.4s, v8.16b, v5.4b[0]\n" + "ldr d14, [%[b_ptr0], #-0x20]\n" + "ins v10.d[1], temploadreg2\n" + ".word 0x4f84e131 // sdot v17.4s, v9.16b, v4.4b[0]\n" + "ldr temploadreg2, [%[b_ptr0], #-0x18]\n" + ".word 0x4f85e135 // sdot v21.4s, v9.16b, v5.4b[0]\n" + "ldr d15, [%[b_ptr0], #-0x10]\n" + "ins v11.d[1], temploadreg3\n" + ".word 0x4f84e152 // sdot v18.4s, v10.16b, v4.4b[0]\n" + "ldr temploadreg3, [%[b_ptr0], #-0x8]\n" + ".word 0x4f85e156 // sdot v22.4s, v10.16b, v5.4b[0]\n" + "ldr d8, [%[b_ptr0]]\n" + "ins v12.d[1], temploadreg0\n" + ".word 0x4f84e173 // sdot v19.4s, v11.16b, v4.4b[0]\n" + "ldr temploadreg0, [%[b_ptr0], #0x8]\n" + ".word 0x4f85e177 // sdot v23.4s, v11.16b, v5.4b[0]\n" + "ldr d9, [%[b_ptr0], #0x10]\n" + "ins v13.d[1], temploadreg1\n" + ".word 0x4fa4e190 // sdot v16.4s, v12.16b, v4.4b[1]\n" + "ldr temploadreg1, [%[b_ptr0], #0x18]\n" + ".word 0x4fa5e194 // sdot v20.4s, v12.16b, v5.4b[1]\n" + "ldr d10, [%[b_ptr0], #0x20]\n" + "ins v14.d[1], temploadreg2\n" + ".word 0x4fa4e1b1 // sdot v17.4s, v13.16b, v4.4b[1]\n" + "ldr temploadreg2, [%[b_ptr0], #0x28]\n" + ".word 0x4fa5e1b5 // sdot v21.4s, v13.16b, v5.4b[1]\n" + "ldr d11, [%[b_ptr0], #0x30]\n" + "ins v15.d[1], temploadreg3\n" + ".word 0x4fa4e1d2 // sdot v18.4s, v14.16b, v4.4b[1]\n" + "ldr temploadreg3, [%[b_ptr0], #0x38]\n" + ".word 0x4fa5e1d6 // sdot v22.4s, v14.16b, v5.4b[1]\n" + "ldr d12, [%[b_ptr0], #0x40]\n" + "ins v8.d[1], temploadreg0\n" + ".word 0x4fa4e1f3 // sdot v19.4s, v15.16b, v4.4b[1]\n" + "ldr temploadreg0, [%[b_ptr0], #0x48]\n" + ".word 0x4fa5e1f7 // sdot v23.4s, v15.16b, v5.4b[1]\n" + "ldr d13, [%[b_ptr0], #0x50]\n" + "ins v9.d[1], temploadreg1\n" + ".word 0x4f84e910 // sdot v16.4s, v8.16b, v4.4b[2]\n" + "ldr temploadreg1, [%[b_ptr0], #0x58]\n" + ".word 0x4f85e914 // sdot v20.4s, v8.16b, v5.4b[2]\n" + "ldr d14, [%[b_ptr0], #0x60]\n" + "ins v10.d[1], temploadreg2\n" + ".word 0x4f84e931 // sdot v17.4s, v9.16b, v4.4b[2]\n" + "ldr temploadreg2, [%[b_ptr0], #0x68]\n" + ".word 0x4f85e935 // sdot v21.4s, v9.16b, v5.4b[2]\n" + "ldr d15, [%[b_ptr0], #0x70]\n" + "ins v11.d[1], temploadreg3\n" + ".word 0x4f84e952 // sdot v18.4s, v10.16b, v4.4b[2]\n" + "ldr temploadreg3, [%[b_ptr0], #0x78]\n" + ".word 0x4f85e956 // sdot v22.4s, v10.16b, v5.4b[2]\n" + "ins v12.d[1], temploadreg0\n" + "ins v13.d[1], temploadreg1\n" + "add %[b_ptr0], %[b_ptr0], #0x80\n" + ".word 0x4f84e973 // sdot v19.4s, v11.16b, v4.4b[2]\n" + "ins v14.d[1], temploadreg2\n" + ".word 0x4f85e977 // sdot v23.4s, v11.16b, v5.4b[2]\n" + "ins v15.d[1], temploadreg3\n" + ".word 0x4fa4e990 // sdot v16.4s, v12.16b, v4.4b[3]\n" + ".word 0x4fa5e994 // sdot v20.4s, v12.16b, v5.4b[3]\n" + ".word 0x4fa4e9b1 // sdot v17.4s, v13.16b, v4.4b[3]\n" + ".word 0x4fa5e9b5 // sdot v21.4s, v13.16b, v5.4b[3]\n" + ".word 0x4fa4e9d2 // sdot v18.4s, v14.16b, v4.4b[3]\n" + ".word 0x4fa5e9d6 // sdot v22.4s, v14.16b, v5.4b[3]\n" + ".word 0x4fa4e9f3 // sdot v19.4s, v15.16b, v4.4b[3]\n" + ".word 0x4fa5e9f7 // sdot v23.4s, v15.16b, v5.4b[3]\n" + "b 5f\n" + "4:\n" + ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" + "ldr temploadreg0, [%[b_ptr0], #0x8]\n" + ".word 0x4f81e114 // sdot v20.4s, v8.16b, v1.4b[0]\n" + "ldr d8, [%[b_ptr0]]\n" + ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" + "ldr temploadreg1, [%[b_ptr0], #0x18]\n" + ".word 0x4f81e135 // sdot v21.4s, v9.16b, v1.4b[0]\n" + "ldr d9, [%[b_ptr0], #0x10]\n" + ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" + "ldr temploadreg2, [%[b_ptr0], #0x28]\n" + ".word 0x4f81e156 // sdot v22.4s, v10.16b, v1.4b[0]\n" + "ldr d10, [%[b_ptr0], #0x20]\n" + ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" + "ldr temploadreg3, [%[b_ptr0], #0x38]\n" + ".word 0x4f81e177 // sdot v23.4s, v11.16b, v1.4b[0]\n" + "ldr d11, [%[b_ptr0], #0x30]\n" + ".word 0x4fa0e190 // sdot v16.4s, v12.16b, v0.4b[1]\n" + "ins v8.d[1], temploadreg0\n" + ".word 0x4fa1e194 // sdot v20.4s, v12.16b, v1.4b[1]\n" + "ldr d12, [%[b_ptr0], #0x40]\n" + ".word 0x4fa0e1b1 // sdot v17.4s, v13.16b, v0.4b[1]\n" + "ldr temploadreg0, [%[b_ptr0], #0x48]\n" + ".word 0x4fa1e1b5 // sdot v21.4s, v13.16b, v1.4b[1]\n" + "ldr d13, [%[b_ptr0], #0x50]\n" + ".word 0x4fa0e1d2 // sdot v18.4s, v14.16b, v0.4b[1]\n" + "ins v9.d[1], temploadreg1\n" + ".word 0x4fa1e1d6 // sdot v22.4s, v14.16b, v1.4b[1]\n" + "ldr temploadreg1, [%[b_ptr0], #0x58]\n" + ".word 0x4fa0e1f3 // sdot v19.4s, v15.16b, v0.4b[1]\n" + "ldr d14, [%[b_ptr0], #0x60]\n" + ".word 0x4fa1e1f7 // sdot v23.4s, v15.16b, v1.4b[1]\n" + "ins v10.d[1], temploadreg2\n" + ".word 0x4f80e910 // sdot v16.4s, v8.16b, v0.4b[2]\n" + "ldr temploadreg2, [%[b_ptr0], #0x68]\n" + ".word 0x4f81e914 // sdot v20.4s, v8.16b, v1.4b[2]\n" + "ldr d15, [%[b_ptr0], #0x70]\n" + ".word 0x4f80e931 // sdot v17.4s, v9.16b, v0.4b[2]\n" + "ins v11.d[1], temploadreg3\n" + ".word 0x4f81e935 // sdot v21.4s, v9.16b, v1.4b[2]\n" + "ldr temploadreg3, [%[b_ptr0], #0x78]\n" + ".word 0x4f80e952 // sdot v18.4s, v10.16b, v0.4b[2]\n" + "ins v12.d[1], temploadreg0\n" + ".word 0x4f81e956 // sdot v22.4s, v10.16b, v1.4b[2]\n" + "ins v13.d[1], temploadreg1\n" + ".word 0x4f80e973 // sdot v19.4s, v11.16b, v0.4b[2]\n" + "ins v14.d[1], temploadreg2\n" + ".word 0x4f81e977 // sdot v23.4s, v11.16b, v1.4b[2]\n" + "ins v15.d[1], temploadreg3\n" + ".word 0x4fa0e990 // sdot v16.4s, v12.16b, v0.4b[3]\n" + "add %[b_ptr0], %[b_ptr0], #0x80\n" + ".word 0x4fa1e994 // sdot v20.4s, v12.16b, v1.4b[3]\n" + ".word 0x4fa0e9b1 // sdot v17.4s, v13.16b, v0.4b[3]\n" + ".word 0x4fa1e9b5 // sdot v21.4s, v13.16b, v1.4b[3]\n" + ".word 0x4fa0e9d2 // sdot v18.4s, v14.16b, v0.4b[3]\n" + ".word 0x4fa1e9d6 // sdot v22.4s, v14.16b, v1.4b[3]\n" + ".word 0x4fa0e9f3 // sdot v19.4s, v15.16b, v0.4b[3]\n" + ".word 0x4fa1e9f7 // sdot v23.4s, v15.16b, v1.4b[3]\n" + "5:\n" + "cbz %[blocks], 6f\n" + "7:\n" + "ldr q8, [%[b_ptr0]]\n" + "subs %[blocks], %[blocks], #0x1\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + "ldr s0, [%[a_ptr0]]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + "add %[a_ptr0], %[a_ptr0], #0x4\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + "add %[b_ptr0], %[b_ptr0], #0x40\n" + ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" + "ldr s1, [a_ptr1]\n" + ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" + "add a_ptr1, a_ptr1, #0x4\n" + ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" + ".word 0x4f81e114 // sdot v20.4s, v8.16b, v1.4b[0]\n" + ".word 0x4f81e135 // sdot v21.4s, v9.16b, v1.4b[0]\n" + ".word 0x4f81e156 // sdot v22.4s, v10.16b, v1.4b[0]\n" + ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" + ".word 0x4f81e177 // sdot v23.4s, v11.16b, v1.4b[0]\n" + "b.ne 7b\n" + "6:\n" + "cbz %[odds], 8f\n" + "ld1 {v0.b}[0], [%[a_ptr0]], #1\n" + "ld1 {v1.b}[0], [a_ptr1], #1\n" + "subs %[odds], %[odds], #0x1\n" + "b.eq 9f\n" + "ld1 {v0.b}[1], [%[a_ptr0]], #1\n" + "ld1 {v1.b}[1], [a_ptr1], #1\n" + "subs %[odds], %[odds], #0x1\n" + "b.eq 9f\n" + "ld1 {v0.b}[2], [%[a_ptr0]]\n" + "ld1 {v1.b}[2], [a_ptr1]\n" + "9:\n" + "ldr q8, [%[b_ptr0]]\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" + ".word 0x4f81e114 // sdot v20.4s, v8.16b, v1.4b[0]\n" + ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" + ".word 0x4f81e135 // sdot v21.4s, v9.16b, v1.4b[0]\n" + ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" + ".word 0x4f81e156 // sdot v22.4s, v10.16b, v1.4b[0]\n" + ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" + ".word 0x4f81e177 // sdot v23.4s, v11.16b, v1.4b[0]\n" + "8:\n" + "str q16, [%[c_ptr0]]\n" + "str q17, [%[c_ptr0], #0x10]\n" + "str q18, [%[c_ptr0], #0x20]\n" + "str q19, [%[c_ptr0], #0x30]\n" + "add %[c_ptr0], %[c_ptr0], #0x40\n" + "str q20, [c_ptr1]\n" + "str q21, [c_ptr1, #0x10]\n" + "str q22, [c_ptr1, #0x20]\n" + "str q23, [c_ptr1, #0x30]\n" + ".unreq a_ptr1\n" + ".unreq c_ptr1\n" + ".unreq temploadreg0\n" + ".unreq temploadreg1\n" + ".unreq temploadreg2\n" + ".unreq temploadreg3\n" + : [a_ptr0] "+r" (a_ptr0), [b_ptr0] "+r" (b_ptr0), [c_ptr0] "+r" (c_ptr0), [loops] "+r" (loops), [regs] "+r" (regs), [blocks] "+r" (blocks), [odds] "+r" (odds) + : [betaptr] "r" (betaptr), [width] "r" (width), [beta0] "r" (beta0), [lda] "r" (ldab), [ldc] "r" (ldcb) + : "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x0", "x1", "x2", "x3", "x4", "x5", "cc", "memory" ); break; case 3: __asm __volatile ( - "a_ptr1 .req X0\n" - "a_ptr2 .req X1\n" - "c_ptr1 .req X2\n" - "c_ptr2 .req X3\n" - "temploadreg0 .req X4\n" - "temploadreg1 .req X5\n" - "temploadreg2 .req X6\n" - "temploadreg3 .req X7\n" - "add a_ptr1, %[a_ptr0], %[lda]\n" - "add c_ptr1, %[c_ptr0], %[ldc]\n" - "add a_ptr2, a_ptr1, %[lda]\n" - "add c_ptr2, c_ptr1, %[ldc]\n" - "cbz %[beta0], 1f\n" - "movi v16.4s, #0\n" - "ldr q0, [%[a_ptr0]]\n" - "movi v17.4s, #0\n" - "ldr q1, [a_ptr1]\n" - "movi v18.4s, #0\n" - "ldr q2, [a_ptr2]\n" - "movi v19.4s, #0\n" - "ldr q8, [%[b_ptr0]]\n" - "movi v20.4s, #0\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - "movi v21.4s, #0\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - "movi v22.4s, #0\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - "movi v23.4s, #0\n" - "ldr q12, [%[b_ptr0], #0x40]\n" - "movi v24.4s, #0\n" - "ldr q13, [%[b_ptr0], #0x50]\n" - "movi v25.4s, #0\n" - "ldr d14, [%[b_ptr0], #0x60]\n" - "movi v26.4s, #0\n" - "ldr temploadreg2, [%[b_ptr0], #0x68]\n" - "movi v27.4s, #0\n" - "add %[a_ptr0], %[a_ptr0], #0x10\n" - "add a_ptr1, a_ptr1, #0x10\n" - "ins v14.d[1], temploadreg2\n" - "add a_ptr2, a_ptr2, #0x10\n" - "add %[b_ptr0], %[b_ptr0], #0x80\n" - "cbz %[loops], 2f\n" - "b 3f\n" - "1:\n" - "ld1r {v15.4s}, [%[betaptr]]\n" - "ldr q16, [%[c_ptr0]]\n" - "ldr q17, [%[c_ptr0], #0x10]\n" - "ldr q18, [%[c_ptr0], #0x20]\n" - "ldr q19, [%[c_ptr0], #0x30]\n" - "mul v16.4s, v16.4s, v15.4s\n" - "ldr q20, [c_ptr1]\n" - "mul v17.4s, v17.4s, v15.4s\n" - "ldr q21, [c_ptr1, #0x10]\n" - "mul v18.4s, v18.4s, v15.4s\n" - "ldr q22, [c_ptr1, #0x20]\n" - "mul v19.4s, v19.4s, v15.4s\n" - "ldr q23, [c_ptr1, #0x30]\n" - "mul v20.4s, v20.4s, v15.4s\n" - "ldr q24, [c_ptr2]\n" - "mul v21.4s, v21.4s, v15.4s\n" - "ldr q25, [c_ptr2, #0x10]\n" - "mul v22.4s, v22.4s, v15.4s\n" - "ldr q26, [c_ptr2, #0x20]\n" - "mul v23.4s, v23.4s, v15.4s\n" - "ldr q27, [c_ptr2, #0x30]\n" - "mul v24.4s, v24.4s, v15.4s\n" - "ldr q0, [%[a_ptr0]]\n" - "mul v25.4s, v25.4s, v15.4s\n" - "ldr q1, [a_ptr1]\n" - "mul v26.4s, v26.4s, v15.4s\n" - "ldr q2, [a_ptr2]\n" - "mul v27.4s, v27.4s, v15.4s\n" - "ldr q8, [%[b_ptr0]]\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - "add %[a_ptr0], %[a_ptr0], #0x10\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - "add a_ptr1, a_ptr1, #0x10\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - "add a_ptr2, a_ptr2, #0x10\n" - "ldr q12, [%[b_ptr0], #0x40]\n" - "ldr q13, [%[b_ptr0], #0x50]\n" - "ldr d14, [%[b_ptr0], #0x60]\n" - "ldr temploadreg2, [%[b_ptr0], #0x68]\n" - "add %[b_ptr0], %[b_ptr0], #0x80\n" - "ins v14.d[1], temploadreg2\n" - "cbz %[loops], 2f\n" - "3:\n" - ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" - "ldr d15, [%[b_ptr0], #-0x10]\n" - ".word 0x4f81e114 // sdot v20.4s, v8.16b, v1.4b[0]\n" - "ldr temploadreg3, [%[b_ptr0], #-0x8]\n" - ".word 0x4f82e118 // sdot v24.4s, v8.16b, v2.4b[0]\n" - "ldr d4, [%[a_ptr0]]\n" - ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" - "ldr temploadreg0, [%[a_ptr0], #0x8]\n" - ".word 0x4f81e135 // sdot v21.4s, v9.16b, v1.4b[0]\n" - "ldr d5, [a_ptr1]\n" - ".word 0x4f82e139 // sdot v25.4s, v9.16b, v2.4b[0]\n" - "ldr temploadreg1, [a_ptr1, #0x8]\n" - ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" - "ldr d6, [a_ptr2]\n" - ".word 0x4f81e156 // sdot v22.4s, v10.16b, v1.4b[0]\n" - "ldr temploadreg2, [a_ptr2, #0x8]\n" - ".word 0x4f82e15a // sdot v26.4s, v10.16b, v2.4b[0]\n" - "ldr d8, [%[b_ptr0]]\n" - ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" - "ins v4.d[1], temploadreg0\n" - ".word 0x4f81e177 // sdot v23.4s, v11.16b, v1.4b[0]\n" - "ldr temploadreg0, [%[b_ptr0], #0x8]\n" - ".word 0x4f82e17b // sdot v27.4s, v11.16b, v2.4b[0]\n" - "ldr d9, [%[b_ptr0], #0x10]\n" - ".word 0x4fa0e190 // sdot v16.4s, v12.16b, v0.4b[1]\n" - "ins v5.d[1], temploadreg1\n" - ".word 0x4fa1e194 // sdot v20.4s, v12.16b, v1.4b[1]\n" - "ldr temploadreg1, [%[b_ptr0], #0x18]\n" - ".word 0x4fa2e198 // sdot v24.4s, v12.16b, v2.4b[1]\n" - "ldr d10, [%[b_ptr0], #0x20]\n" - ".word 0x4fa0e1b1 // sdot v17.4s, v13.16b, v0.4b[1]\n" - "ins v6.d[1], temploadreg2\n" - ".word 0x4fa1e1b5 // sdot v21.4s, v13.16b, v1.4b[1]\n" - "ldr temploadreg2, [%[b_ptr0], #0x28]\n" - ".word 0x4fa2e1b9 // sdot v25.4s, v13.16b, v2.4b[1]\n" - "ldr d11, [%[b_ptr0], #0x30]\n" - ".word 0x4fa0e1d2 // sdot v18.4s, v14.16b, v0.4b[1]\n" - "ins v15.d[1], temploadreg3\n" - ".word 0x4fa1e1d6 // sdot v22.4s, v14.16b, v1.4b[1]\n" - "ldr temploadreg3, [%[b_ptr0], #0x38]\n" - ".word 0x4fa2e1da // sdot v26.4s, v14.16b, v2.4b[1]\n" - "ldr d12, [%[b_ptr0], #0x40]\n" - "ins v8.d[1], temploadreg0\n" - "subs %[loops], %[loops], #0x1\n" - ".word 0x4fa0e1f3 // sdot v19.4s, v15.16b, v0.4b[1]\n" - "ldr temploadreg0, [%[b_ptr0], #0x48]\n" - ".word 0x4fa1e1f7 // sdot v23.4s, v15.16b, v1.4b[1]\n" - "ldr d13, [%[b_ptr0], #0x50]\n" - ".word 0x4fa2e1fb // sdot v27.4s, v15.16b, v2.4b[1]\n" - "ins v9.d[1], temploadreg1\n" - ".word 0x4f80e910 // sdot v16.4s, v8.16b, v0.4b[2]\n" - "ldr temploadreg1, [%[b_ptr0], #0x58]\n" - ".word 0x4f81e914 // sdot v20.4s, v8.16b, v1.4b[2]\n" - "ldr d14, [%[b_ptr0], #0x60]\n" - ".word 0x4f82e918 // sdot v24.4s, v8.16b, v2.4b[2]\n" - "ins v10.d[1], temploadreg2\n" - ".word 0x4f80e931 // sdot v17.4s, v9.16b, v0.4b[2]\n" - "ldr temploadreg2, [%[b_ptr0], #0x68]\n" - ".word 0x4f81e935 // sdot v21.4s, v9.16b, v1.4b[2]\n" - "ldr d15, [%[b_ptr0], #0x70]\n" - ".word 0x4f82e939 // sdot v25.4s, v9.16b, v2.4b[2]\n" - "ins v11.d[1], temploadreg3\n" - ".word 0x4f80e952 // sdot v18.4s, v10.16b, v0.4b[2]\n" - "ldr temploadreg3, [%[b_ptr0], #0x78]\n" - ".word 0x4f81e956 // sdot v22.4s, v10.16b, v1.4b[2]\n" - "ins v12.d[1], temploadreg0\n" - ".word 0x4f82e95a // sdot v26.4s, v10.16b, v2.4b[2]\n" - "ins v13.d[1], temploadreg1\n" - ".word 0x4f80e973 // sdot v19.4s, v11.16b, v0.4b[2]\n" - "ins v14.d[1], temploadreg2\n" - ".word 0x4f81e977 // sdot v23.4s, v11.16b, v1.4b[2]\n" - "ins v15.d[1], temploadreg3\n" - ".word 0x4f82e97b // sdot v27.4s, v11.16b, v2.4b[2]\n" - "prfm PLDL1KEEP, [%[a_ptr0], #0x40]\n" - ".word 0x4fa0e990 // sdot v16.4s, v12.16b, v0.4b[3]\n" - "add %[b_ptr0], %[b_ptr0], #0x100\n" - ".word 0x4fa1e994 // sdot v20.4s, v12.16b, v1.4b[3]\n" - "ldr d8, [%[b_ptr0], #-0x80]\n" - ".word 0x4fa2e998 // sdot v24.4s, v12.16b, v2.4b[3]\n" - "ldr temploadreg0, [%[b_ptr0], #-0x78]\n" - ".word 0x4fa0e9b1 // sdot v17.4s, v13.16b, v0.4b[3]\n" - "ldr d9, [%[b_ptr0], #-0x70]\n" - ".word 0x4fa1e9b5 // sdot v21.4s, v13.16b, v1.4b[3]\n" - "ldr temploadreg1, [%[b_ptr0], #-0x68]\n" - ".word 0x4fa2e9b9 // sdot v25.4s, v13.16b, v2.4b[3]\n" - "ldr d10, [%[b_ptr0], #-0x60]\n" - ".word 0x4fa0e9d2 // sdot v18.4s, v14.16b, v0.4b[3]\n" - "ldr temploadreg2, [%[b_ptr0], #-0x58]\n" - ".word 0x4fa1e9d6 // sdot v22.4s, v14.16b, v1.4b[3]\n" - "ldr d11, [%[b_ptr0], #-0x50]\n" - ".word 0x4fa2e9da // sdot v26.4s, v14.16b, v2.4b[3]\n" - "ldr temploadreg3, [%[b_ptr0], #-0x48]\n" - ".word 0x4fa0e9f3 // sdot v19.4s, v15.16b, v0.4b[3]\n" - "ldr d12, [%[b_ptr0], #-0x40]\n" - ".word 0x4fa1e9f7 // sdot v23.4s, v15.16b, v1.4b[3]\n" - "ins v8.d[1], temploadreg0\n" - ".word 0x4fa2e9fb // sdot v27.4s, v15.16b, v2.4b[3]\n" - "ldr temploadreg0, [%[b_ptr0], #-0x38]\n" - "ldr d13, [%[b_ptr0], #-0x30]\n" - "add %[a_ptr0], %[a_ptr0], #0x20\n" - ".word 0x4f84e110 // sdot v16.4s, v8.16b, v4.4b[0]\n" - "ins v9.d[1], temploadreg1\n" - ".word 0x4f85e114 // sdot v20.4s, v8.16b, v5.4b[0]\n" - "ldr temploadreg1, [%[b_ptr0], #-0x28]\n" - ".word 0x4f86e118 // sdot v24.4s, v8.16b, v6.4b[0]\n" - "ldr d14, [%[b_ptr0], #-0x20]\n" - "ins v10.d[1], temploadreg2\n" - "add a_ptr1, a_ptr1, #0x20\n" - ".word 0x4f84e131 // sdot v17.4s, v9.16b, v4.4b[0]\n" - "ldr temploadreg2, [%[b_ptr0], #-0x18]\n" - ".word 0x4f85e135 // sdot v21.4s, v9.16b, v5.4b[0]\n" - "ldr d15, [%[b_ptr0], #-0x10]\n" - ".word 0x4f86e139 // sdot v25.4s, v9.16b, v6.4b[0]\n" - "ins v11.d[1], temploadreg3\n" - ".word 0x4f84e152 // sdot v18.4s, v10.16b, v4.4b[0]\n" - "ldr temploadreg3, [%[b_ptr0], #-0x8]\n" - ".word 0x4f85e156 // sdot v22.4s, v10.16b, v5.4b[0]\n" - "ldr d0, [%[a_ptr0], #-0x10]\n" - ".word 0x4f86e15a // sdot v26.4s, v10.16b, v6.4b[0]\n" - "ins v12.d[1], temploadreg0\n" - ".word 0x4f84e173 // sdot v19.4s, v11.16b, v4.4b[0]\n" - "ldr temploadreg0, [%[a_ptr0], #-0x8]\n" - ".word 0x4f85e177 // sdot v23.4s, v11.16b, v5.4b[0]\n" - "ldr d1, [a_ptr1, #-0x10]\n" - ".word 0x4f86e17b // sdot v27.4s, v11.16b, v6.4b[0]\n" - "ins v13.d[1], temploadreg1\n" - ".word 0x4fa4e190 // sdot v16.4s, v12.16b, v4.4b[1]\n" - "ldr temploadreg1, [a_ptr1, #-0x8]\n" - ".word 0x4fa5e194 // sdot v20.4s, v12.16b, v5.4b[1]\n" - "ins v14.d[1], temploadreg2\n" - ".word 0x4fa6e198 // sdot v24.4s, v12.16b, v6.4b[1]\n" - "ldr d8, [%[b_ptr0]]\n" - ".word 0x4fa4e1b1 // sdot v17.4s, v13.16b, v4.4b[1]\n" - "ins v0.d[1], temploadreg0\n" - ".word 0x4fa5e1b5 // sdot v21.4s, v13.16b, v5.4b[1]\n" - "ldr temploadreg0, [%[b_ptr0], #0x8]\n" - ".word 0x4fa6e1b9 // sdot v25.4s, v13.16b, v6.4b[1]\n" - "ldr d9, [%[b_ptr0], #0x10]\n" - ".word 0x4fa4e1d2 // sdot v18.4s, v14.16b, v4.4b[1]\n" - "ins v1.d[1], temploadreg1\n" - ".word 0x4fa5e1d6 // sdot v22.4s, v14.16b, v5.4b[1]\n" - "ldr temploadreg1, [%[b_ptr0], #0x18]\n" - ".word 0x4fa6e1da // sdot v26.4s, v14.16b, v6.4b[1]\n" - "ldr d10, [%[b_ptr0], #0x20]\n" - "ldr d11, [%[b_ptr0], #0x30]\n" - "add a_ptr2, a_ptr2, #0x20\n" - "ins v15.d[1], temploadreg3\n" - "prfm PLDL1KEEP, [a_ptr1, #0x40]\n" - "ldr d2, [a_ptr2, #-0x10]\n" - "prfm PLDL1KEEP, [a_ptr2, #0x40]\n" - ".word 0x4fa4e1f3 // sdot v19.4s, v15.16b, v4.4b[1]\n" - "ldr temploadreg2, [a_ptr2, #-0x8]\n" - ".word 0x4fa5e1f7 // sdot v23.4s, v15.16b, v5.4b[1]\n" - "ldr temploadreg3, [%[b_ptr0], #0x38]\n" - ".word 0x4fa6e1fb // sdot v27.4s, v15.16b, v6.4b[1]\n" - "ldr d12, [%[b_ptr0], #0x40]\n" - "ins v8.d[1], temploadreg0\n" - "ins v2.d[1], temploadreg2\n" - "ldr temploadreg2, [%[b_ptr0], #0x28]\n" - "ldr temploadreg0, [%[b_ptr0], #0x48]\n" - ".word 0x4f84e910 // sdot v16.4s, v8.16b, v4.4b[2]\n" - "ldr d13, [%[b_ptr0], #0x50]\n" - ".word 0x4f85e914 // sdot v20.4s, v8.16b, v5.4b[2]\n" - "ins v9.d[1], temploadreg1\n" - ".word 0x4f86e918 // sdot v24.4s, v8.16b, v6.4b[2]\n" - "ldr temploadreg1, [%[b_ptr0], #0x58]\n" - "ldr d14, [%[b_ptr0], #0x60]\n" - "ins v10.d[1], temploadreg2\n" - ".word 0x4f84e931 // sdot v17.4s, v9.16b, v4.4b[2]\n" - "ldr temploadreg2, [%[b_ptr0], #0x68]\n" - ".word 0x4f85e935 // sdot v21.4s, v9.16b, v5.4b[2]\n" - "ldr d15, [%[b_ptr0], #0x70]\n" - ".word 0x4f86e939 // sdot v25.4s, v9.16b, v6.4b[2]\n" - "ins v11.d[1], temploadreg3\n" - ".word 0x4f84e952 // sdot v18.4s, v10.16b, v4.4b[2]\n" - "ldr temploadreg3, [%[b_ptr0], #0x78]\n" - ".word 0x4f85e956 // sdot v22.4s, v10.16b, v5.4b[2]\n" - "ins v12.d[1], temploadreg0\n" - ".word 0x4f86e95a // sdot v26.4s, v10.16b, v6.4b[2]\n" - "ins v13.d[1], temploadreg1\n" - ".word 0x4f84e973 // sdot v19.4s, v11.16b, v4.4b[2]\n" - "ins v14.d[1], temploadreg2\n" - ".word 0x4f85e977 // sdot v23.4s, v11.16b, v5.4b[2]\n" - "ins v15.d[1], temploadreg3\n" - ".word 0x4f86e97b // sdot v27.4s, v11.16b, v6.4b[2]\n" - "add %[b_ptr0], %[b_ptr0], #0x100\n" - ".word 0x4fa4e990 // sdot v16.4s, v12.16b, v4.4b[3]\n" - "ldr d8, [%[b_ptr0], #-0x80]\n" - ".word 0x4fa5e994 // sdot v20.4s, v12.16b, v5.4b[3]\n" - "ldr temploadreg0, [%[b_ptr0], #-0x78]\n" - ".word 0x4fa6e998 // sdot v24.4s, v12.16b, v6.4b[3]\n" - "ldr d9, [%[b_ptr0], #-0x70]\n" - ".word 0x4fa4e9b1 // sdot v17.4s, v13.16b, v4.4b[3]\n" - "ldr temploadreg1, [%[b_ptr0], #-0x68]\n" - ".word 0x4fa5e9b5 // sdot v21.4s, v13.16b, v5.4b[3]\n" - "ldr d10, [%[b_ptr0], #-0x60]\n" - ".word 0x4fa6e9b9 // sdot v25.4s, v13.16b, v6.4b[3]\n" - "ldr temploadreg2, [%[b_ptr0], #-0x58]\n" - ".word 0x4fa4e9d2 // sdot v18.4s, v14.16b, v4.4b[3]\n" - "ldr d11, [%[b_ptr0], #-0x50]\n" - ".word 0x4fa5e9d6 // sdot v22.4s, v14.16b, v5.4b[3]\n" - "ldr temploadreg3, [%[b_ptr0], #-0x48]\n" - ".word 0x4fa6e9da // sdot v26.4s, v14.16b, v6.4b[3]\n" - "ldr d12, [%[b_ptr0], #-0x40]\n" - ".word 0x4fa4e9f3 // sdot v19.4s, v15.16b, v4.4b[3]\n" - "ins v8.d[1], temploadreg0\n" - ".word 0x4fa5e9f7 // sdot v23.4s, v15.16b, v5.4b[3]\n" - "ldr temploadreg0, [%[b_ptr0], #-0x38]\n" - ".word 0x4fa6e9fb // sdot v27.4s, v15.16b, v6.4b[3]\n" - "ldr d13, [%[b_ptr0], #-0x30]\n" - "ins v9.d[1], temploadreg1\n" - "ldr temploadreg1, [%[b_ptr0], #-0x28]\n" - "ldr d14, [%[b_ptr0], #-0x20]\n" - "ins v10.d[1], temploadreg2\n" - "ldr temploadreg2, [%[b_ptr0], #-0x18]\n" - "ins v11.d[1], temploadreg3\n" - "ins v12.d[1], temploadreg0\n" - "ins v13.d[1], temploadreg1\n" - "ins v14.d[1], temploadreg2\n" - "b.ne 3b\n" - "2:\n" - "ldr d15, [%[b_ptr0], #-0x10]\n" - "prfm PSTL1KEEP, [%[c_ptr0]]\n" - "ldr temploadreg3, [%[b_ptr0], #-0x8]\n" - "prfm PSTL1KEEP, [c_ptr1]\n" - "prfm PSTL1KEEP, [c_ptr2]\n" - "ins v15.d[1], temploadreg3\n" - "cbz %[regs], 4f\n" - ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" - "ldr d4, [%[a_ptr0]]\n" - ".word 0x4f81e114 // sdot v20.4s, v8.16b, v1.4b[0]\n" - "ldr temploadreg0, [%[a_ptr0], #0x8]\n" - ".word 0x4f82e118 // sdot v24.4s, v8.16b, v2.4b[0]\n" - "ldr d5, [a_ptr1]\n" - ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" - "ldr temploadreg1, [a_ptr1, #0x8]\n" - ".word 0x4f81e135 // sdot v21.4s, v9.16b, v1.4b[0]\n" - "ldr d6, [a_ptr2]\n" - ".word 0x4f82e139 // sdot v25.4s, v9.16b, v2.4b[0]\n" - "ldr temploadreg2, [a_ptr2, #0x8]\n" - ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" - "ldr d8, [%[b_ptr0]]\n" - ".word 0x4f81e156 // sdot v22.4s, v10.16b, v1.4b[0]\n" - "ins v4.d[1], temploadreg0\n" - ".word 0x4f82e15a // sdot v26.4s, v10.16b, v2.4b[0]\n" - "ldr temploadreg0, [%[b_ptr0], #0x8]\n" - ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" - "ldr d9, [%[b_ptr0], #0x10]\n" - ".word 0x4f81e177 // sdot v23.4s, v11.16b, v1.4b[0]\n" - "ins v5.d[1], temploadreg1\n" - ".word 0x4f82e17b // sdot v27.4s, v11.16b, v2.4b[0]\n" - "ldr temploadreg1, [%[b_ptr0], #0x18]\n" - ".word 0x4fa0e190 // sdot v16.4s, v12.16b, v0.4b[1]\n" - "ldr d10, [%[b_ptr0], #0x20]\n" - ".word 0x4fa1e194 // sdot v20.4s, v12.16b, v1.4b[1]\n" - "ins v6.d[1], temploadreg2\n" - ".word 0x4fa2e198 // sdot v24.4s, v12.16b, v2.4b[1]\n" - "ldr temploadreg2, [%[b_ptr0], #0x28]\n" - ".word 0x4fa0e1b1 // sdot v17.4s, v13.16b, v0.4b[1]\n" - "ldr d11, [%[b_ptr0], #0x30]\n" - ".word 0x4fa1e1b5 // sdot v21.4s, v13.16b, v1.4b[1]\n" - "ldr temploadreg3, [%[b_ptr0], #0x38]\n" - ".word 0x4fa2e1b9 // sdot v25.4s, v13.16b, v2.4b[1]\n" - "ldr d12, [%[b_ptr0], #0x40]\n" - ".word 0x4fa0e1d2 // sdot v18.4s, v14.16b, v0.4b[1]\n" - "ins v8.d[1], temploadreg0\n" - ".word 0x4fa1e1d6 // sdot v22.4s, v14.16b, v1.4b[1]\n" - "ldr temploadreg0, [%[b_ptr0], #0x48]\n" - ".word 0x4fa2e1da // sdot v26.4s, v14.16b, v2.4b[1]\n" - "ldr d13, [%[b_ptr0], #0x50]\n" - ".word 0x4fa0e1f3 // sdot v19.4s, v15.16b, v0.4b[1]\n" - "ins v9.d[1], temploadreg1\n" - ".word 0x4fa1e1f7 // sdot v23.4s, v15.16b, v1.4b[1]\n" - "ldr temploadreg1, [%[b_ptr0], #0x58]\n" - ".word 0x4fa2e1fb // sdot v27.4s, v15.16b, v2.4b[1]\n" - "ldr d14, [%[b_ptr0], #0x60]\n" - ".word 0x4f80e910 // sdot v16.4s, v8.16b, v0.4b[2]\n" - "ins v10.d[1], temploadreg2\n" - ".word 0x4f81e914 // sdot v20.4s, v8.16b, v1.4b[2]\n" - "ldr temploadreg2, [%[b_ptr0], #0x68]\n" - ".word 0x4f82e918 // sdot v24.4s, v8.16b, v2.4b[2]\n" - "ldr d15, [%[b_ptr0], #0x70]\n" - ".word 0x4f80e931 // sdot v17.4s, v9.16b, v0.4b[2]\n" - "ins v11.d[1], temploadreg3\n" - ".word 0x4f81e935 // sdot v21.4s, v9.16b, v1.4b[2]\n" - "ldr temploadreg3, [%[b_ptr0], #0x78]\n" - ".word 0x4f82e939 // sdot v25.4s, v9.16b, v2.4b[2]\n" - "ins v12.d[1], temploadreg0\n" - ".word 0x4f80e952 // sdot v18.4s, v10.16b, v0.4b[2]\n" - "ins v13.d[1], temploadreg1\n" - ".word 0x4f81e956 // sdot v22.4s, v10.16b, v1.4b[2]\n" - "ins v14.d[1], temploadreg2\n" - ".word 0x4f82e95a // sdot v26.4s, v10.16b, v2.4b[2]\n" - "ins v15.d[1], temploadreg3\n" - ".word 0x4f80e973 // sdot v19.4s, v11.16b, v0.4b[2]\n" - "add %[b_ptr0], %[b_ptr0], #0x100\n" - ".word 0x4f81e977 // sdot v23.4s, v11.16b, v1.4b[2]\n" - "ldr d8, [%[b_ptr0], #-0x80]\n" - ".word 0x4f82e97b // sdot v27.4s, v11.16b, v2.4b[2]\n" - "ldr temploadreg0, [%[b_ptr0], #-0x78]\n" - ".word 0x4fa0e990 // sdot v16.4s, v12.16b, v0.4b[3]\n" - "ldr d9, [%[b_ptr0], #-0x70]\n" - ".word 0x4fa1e994 // sdot v20.4s, v12.16b, v1.4b[3]\n" - "ldr temploadreg1, [%[b_ptr0], #-0x68]\n" - ".word 0x4fa2e998 // sdot v24.4s, v12.16b, v2.4b[3]\n" - "ldr d10, [%[b_ptr0], #-0x60]\n" - ".word 0x4fa0e9b1 // sdot v17.4s, v13.16b, v0.4b[3]\n" - "ldr temploadreg2, [%[b_ptr0], #-0x58]\n" - ".word 0x4fa1e9b5 // sdot v21.4s, v13.16b, v1.4b[3]\n" - "ldr d11, [%[b_ptr0], #-0x50]\n" - ".word 0x4fa2e9b9 // sdot v25.4s, v13.16b, v2.4b[3]\n" - "ldr temploadreg3, [%[b_ptr0], #-0x48]\n" - ".word 0x4fa0e9d2 // sdot v18.4s, v14.16b, v0.4b[3]\n" - "ldr d12, [%[b_ptr0], #-0x40]\n" - ".word 0x4fa1e9d6 // sdot v22.4s, v14.16b, v1.4b[3]\n" - "ins v8.d[1], temploadreg0\n" - ".word 0x4fa2e9da // sdot v26.4s, v14.16b, v2.4b[3]\n" - "ldr temploadreg0, [%[b_ptr0], #-0x38]\n" - ".word 0x4fa0e9f3 // sdot v19.4s, v15.16b, v0.4b[3]\n" - "ldr d13, [%[b_ptr0], #-0x30]\n" - ".word 0x4fa1e9f7 // sdot v23.4s, v15.16b, v1.4b[3]\n" - "ins v9.d[1], temploadreg1\n" - ".word 0x4fa2e9fb // sdot v27.4s, v15.16b, v2.4b[3]\n" - "ldr temploadreg1, [%[b_ptr0], #-0x28]\n" - ".word 0x4f84e110 // sdot v16.4s, v8.16b, v4.4b[0]\n" - "ldr d14, [%[b_ptr0], #-0x20]\n" - ".word 0x4f85e114 // sdot v20.4s, v8.16b, v5.4b[0]\n" - "ins v10.d[1], temploadreg2\n" - ".word 0x4f86e118 // sdot v24.4s, v8.16b, v6.4b[0]\n" - "ldr temploadreg2, [%[b_ptr0], #-0x18]\n" - ".word 0x4f84e131 // sdot v17.4s, v9.16b, v4.4b[0]\n" - "ldr d15, [%[b_ptr0], #-0x10]\n" - ".word 0x4f85e135 // sdot v21.4s, v9.16b, v5.4b[0]\n" - "ins v11.d[1], temploadreg3\n" - ".word 0x4f86e139 // sdot v25.4s, v9.16b, v6.4b[0]\n" - "ldr temploadreg3, [%[b_ptr0], #-0x8]\n" - ".word 0x4f84e152 // sdot v18.4s, v10.16b, v4.4b[0]\n" - "ldr d8, [%[b_ptr0]]\n" - ".word 0x4f85e156 // sdot v22.4s, v10.16b, v5.4b[0]\n" - "ins v12.d[1], temploadreg0\n" - ".word 0x4f86e15a // sdot v26.4s, v10.16b, v6.4b[0]\n" - "ldr temploadreg0, [%[b_ptr0], #0x8]\n" - ".word 0x4f84e173 // sdot v19.4s, v11.16b, v4.4b[0]\n" - "ldr d9, [%[b_ptr0], #0x10]\n" - ".word 0x4f85e177 // sdot v23.4s, v11.16b, v5.4b[0]\n" - "ins v13.d[1], temploadreg1\n" - ".word 0x4f86e17b // sdot v27.4s, v11.16b, v6.4b[0]\n" - "ldr temploadreg1, [%[b_ptr0], #0x18]\n" - ".word 0x4fa4e190 // sdot v16.4s, v12.16b, v4.4b[1]\n" - "ldr d10, [%[b_ptr0], #0x20]\n" - ".word 0x4fa5e194 // sdot v20.4s, v12.16b, v5.4b[1]\n" - "ins v14.d[1], temploadreg2\n" - ".word 0x4fa6e198 // sdot v24.4s, v12.16b, v6.4b[1]\n" - "ldr temploadreg2, [%[b_ptr0], #0x28]\n" - ".word 0x4fa4e1b1 // sdot v17.4s, v13.16b, v4.4b[1]\n" - "ldr d11, [%[b_ptr0], #0x30]\n" - ".word 0x4fa5e1b5 // sdot v21.4s, v13.16b, v5.4b[1]\n" - "ins v15.d[1], temploadreg3\n" - ".word 0x4fa6e1b9 // sdot v25.4s, v13.16b, v6.4b[1]\n" - "ldr temploadreg3, [%[b_ptr0], #0x38]\n" - ".word 0x4fa4e1d2 // sdot v18.4s, v14.16b, v4.4b[1]\n" - "ldr d12, [%[b_ptr0], #0x40]\n" - ".word 0x4fa5e1d6 // sdot v22.4s, v14.16b, v5.4b[1]\n" - "ins v8.d[1], temploadreg0\n" - ".word 0x4fa6e1da // sdot v26.4s, v14.16b, v6.4b[1]\n" - "ldr temploadreg0, [%[b_ptr0], #0x48]\n" - ".word 0x4fa4e1f3 // sdot v19.4s, v15.16b, v4.4b[1]\n" - "ldr d13, [%[b_ptr0], #0x50]\n" - ".word 0x4fa5e1f7 // sdot v23.4s, v15.16b, v5.4b[1]\n" - "ins v9.d[1], temploadreg1\n" - ".word 0x4fa6e1fb // sdot v27.4s, v15.16b, v6.4b[1]\n" - "ldr temploadreg1, [%[b_ptr0], #0x58]\n" - ".word 0x4f84e910 // sdot v16.4s, v8.16b, v4.4b[2]\n" - "ldr d14, [%[b_ptr0], #0x60]\n" - ".word 0x4f85e914 // sdot v20.4s, v8.16b, v5.4b[2]\n" - "ins v10.d[1], temploadreg2\n" - ".word 0x4f86e918 // sdot v24.4s, v8.16b, v6.4b[2]\n" - "ldr temploadreg2, [%[b_ptr0], #0x68]\n" - ".word 0x4f84e931 // sdot v17.4s, v9.16b, v4.4b[2]\n" - "ldr d15, [%[b_ptr0], #0x70]\n" - ".word 0x4f85e935 // sdot v21.4s, v9.16b, v5.4b[2]\n" - "ins v11.d[1], temploadreg3\n" - ".word 0x4f86e939 // sdot v25.4s, v9.16b, v6.4b[2]\n" - "ldr temploadreg3, [%[b_ptr0], #0x78]\n" - ".word 0x4f84e952 // sdot v18.4s, v10.16b, v4.4b[2]\n" - "ins v12.d[1], temploadreg0\n" - ".word 0x4f85e956 // sdot v22.4s, v10.16b, v5.4b[2]\n" - "ins v13.d[1], temploadreg1\n" - ".word 0x4f86e95a // sdot v26.4s, v10.16b, v6.4b[2]\n" - "ins v14.d[1], temploadreg2\n" - ".word 0x4f84e973 // sdot v19.4s, v11.16b, v4.4b[2]\n" - "ins v15.d[1], temploadreg3\n" - ".word 0x4f85e977 // sdot v23.4s, v11.16b, v5.4b[2]\n" - "add %[b_ptr0], %[b_ptr0], #0x80\n" - ".word 0x4f86e97b // sdot v27.4s, v11.16b, v6.4b[2]\n" - "add %[a_ptr0], %[a_ptr0], #0x10\n" - ".word 0x4fa4e990 // sdot v16.4s, v12.16b, v4.4b[3]\n" - "add a_ptr1, a_ptr1, #0x10\n" - ".word 0x4fa5e994 // sdot v20.4s, v12.16b, v5.4b[3]\n" - "add a_ptr2, a_ptr2, #0x10\n" - ".word 0x4fa6e998 // sdot v24.4s, v12.16b, v6.4b[3]\n" - ".word 0x4fa4e9b1 // sdot v17.4s, v13.16b, v4.4b[3]\n" - ".word 0x4fa5e9b5 // sdot v21.4s, v13.16b, v5.4b[3]\n" - ".word 0x4fa6e9b9 // sdot v25.4s, v13.16b, v6.4b[3]\n" - ".word 0x4fa4e9d2 // sdot v18.4s, v14.16b, v4.4b[3]\n" - ".word 0x4fa5e9d6 // sdot v22.4s, v14.16b, v5.4b[3]\n" - ".word 0x4fa6e9da // sdot v26.4s, v14.16b, v6.4b[3]\n" - ".word 0x4fa4e9f3 // sdot v19.4s, v15.16b, v4.4b[3]\n" - ".word 0x4fa5e9f7 // sdot v23.4s, v15.16b, v5.4b[3]\n" - ".word 0x4fa6e9fb // sdot v27.4s, v15.16b, v6.4b[3]\n" - "b 5f\n" - "4:\n" - ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" - "ldr temploadreg0, [%[b_ptr0], #0x8]\n" - ".word 0x4f81e114 // sdot v20.4s, v8.16b, v1.4b[0]\n" - "ldr temploadreg1, [%[b_ptr0], #0x18]\n" - ".word 0x4f82e118 // sdot v24.4s, v8.16b, v2.4b[0]\n" - "ldr d8, [%[b_ptr0]]\n" - ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" - "ldr temploadreg2, [%[b_ptr0], #0x28]\n" - ".word 0x4f81e135 // sdot v21.4s, v9.16b, v1.4b[0]\n" - "ldr temploadreg3, [%[b_ptr0], #0x38]\n" - ".word 0x4f82e139 // sdot v25.4s, v9.16b, v2.4b[0]\n" - "ldr d9, [%[b_ptr0], #0x10]\n" - ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" - "ins v8.d[1], temploadreg0\n" - ".word 0x4f81e156 // sdot v22.4s, v10.16b, v1.4b[0]\n" - "ldr temploadreg0, [%[b_ptr0], #0x48]\n" - ".word 0x4f82e15a // sdot v26.4s, v10.16b, v2.4b[0]\n" - "ldr d10, [%[b_ptr0], #0x20]\n" - ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" - "ins v9.d[1], temploadreg1\n" - ".word 0x4f81e177 // sdot v23.4s, v11.16b, v1.4b[0]\n" - "ldr temploadreg1, [%[b_ptr0], #0x58]\n" - ".word 0x4f82e17b // sdot v27.4s, v11.16b, v2.4b[0]\n" - "ldr d11, [%[b_ptr0], #0x30]\n" - ".word 0x4fa0e190 // sdot v16.4s, v12.16b, v0.4b[1]\n" - "ins v10.d[1], temploadreg2\n" - ".word 0x4fa1e194 // sdot v20.4s, v12.16b, v1.4b[1]\n" - "ldr temploadreg2, [%[b_ptr0], #0x68]\n" - ".word 0x4fa2e198 // sdot v24.4s, v12.16b, v2.4b[1]\n" - "ldr d12, [%[b_ptr0], #0x40]\n" - ".word 0x4fa0e1b1 // sdot v17.4s, v13.16b, v0.4b[1]\n" - "ins v11.d[1], temploadreg3\n" - ".word 0x4fa1e1b5 // sdot v21.4s, v13.16b, v1.4b[1]\n" - "ldr temploadreg3, [%[b_ptr0], #0x78]\n" - ".word 0x4fa2e1b9 // sdot v25.4s, v13.16b, v2.4b[1]\n" - "ldr d13, [%[b_ptr0], #0x50]\n" - ".word 0x4fa0e1d2 // sdot v18.4s, v14.16b, v0.4b[1]\n" - "ins v12.d[1], temploadreg0\n" - ".word 0x4fa1e1d6 // sdot v22.4s, v14.16b, v1.4b[1]\n" - ".word 0x4fa2e1da // sdot v26.4s, v14.16b, v2.4b[1]\n" - "ldr d14, [%[b_ptr0], #0x60]\n" - ".word 0x4fa0e1f3 // sdot v19.4s, v15.16b, v0.4b[1]\n" - "ins v13.d[1], temploadreg1\n" - ".word 0x4fa1e1f7 // sdot v23.4s, v15.16b, v1.4b[1]\n" - ".word 0x4fa2e1fb // sdot v27.4s, v15.16b, v2.4b[1]\n" - "ldr d15, [%[b_ptr0], #0x70]\n" - ".word 0x4f80e910 // sdot v16.4s, v8.16b, v0.4b[2]\n" - "ins v14.d[1], temploadreg2\n" - ".word 0x4f81e914 // sdot v20.4s, v8.16b, v1.4b[2]\n" - "add %[b_ptr0], %[b_ptr0], #0x80\n" - ".word 0x4f82e918 // sdot v24.4s, v8.16b, v2.4b[2]\n" - "ins v15.d[1], temploadreg3\n" - ".word 0x4f80e931 // sdot v17.4s, v9.16b, v0.4b[2]\n" - ".word 0x4f81e935 // sdot v21.4s, v9.16b, v1.4b[2]\n" - ".word 0x4f82e939 // sdot v25.4s, v9.16b, v2.4b[2]\n" - ".word 0x4f80e952 // sdot v18.4s, v10.16b, v0.4b[2]\n" - ".word 0x4f81e956 // sdot v22.4s, v10.16b, v1.4b[2]\n" - ".word 0x4f82e95a // sdot v26.4s, v10.16b, v2.4b[2]\n" - ".word 0x4f80e973 // sdot v19.4s, v11.16b, v0.4b[2]\n" - ".word 0x4f81e977 // sdot v23.4s, v11.16b, v1.4b[2]\n" - ".word 0x4f82e97b // sdot v27.4s, v11.16b, v2.4b[2]\n" - ".word 0x4fa0e990 // sdot v16.4s, v12.16b, v0.4b[3]\n" - ".word 0x4fa1e994 // sdot v20.4s, v12.16b, v1.4b[3]\n" - ".word 0x4fa2e998 // sdot v24.4s, v12.16b, v2.4b[3]\n" - ".word 0x4fa0e9b1 // sdot v17.4s, v13.16b, v0.4b[3]\n" - ".word 0x4fa1e9b5 // sdot v21.4s, v13.16b, v1.4b[3]\n" - ".word 0x4fa2e9b9 // sdot v25.4s, v13.16b, v2.4b[3]\n" - ".word 0x4fa0e9d2 // sdot v18.4s, v14.16b, v0.4b[3]\n" - ".word 0x4fa1e9d6 // sdot v22.4s, v14.16b, v1.4b[3]\n" - ".word 0x4fa2e9da // sdot v26.4s, v14.16b, v2.4b[3]\n" - ".word 0x4fa0e9f3 // sdot v19.4s, v15.16b, v0.4b[3]\n" - ".word 0x4fa1e9f7 // sdot v23.4s, v15.16b, v1.4b[3]\n" - ".word 0x4fa2e9fb // sdot v27.4s, v15.16b, v2.4b[3]\n" - "5:\n" - "cbz %[blocks], 6f\n" - "7:\n" - "ldr q8, [%[b_ptr0]]\n" - "subs %[blocks], %[blocks], #0x1\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - "ldr s0, [%[a_ptr0]]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - "add %[a_ptr0], %[a_ptr0], #0x4\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - "add %[b_ptr0], %[b_ptr0], #0x40\n" - ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" - "ldr s1, [a_ptr1]\n" - ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" - "add a_ptr1, a_ptr1, #0x4\n" - ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" - "ldr s2, [a_ptr2]\n" - ".word 0x4f81e114 // sdot v20.4s, v8.16b, v1.4b[0]\n" - "add a_ptr2, a_ptr2, #0x4\n" - ".word 0x4f81e135 // sdot v21.4s, v9.16b, v1.4b[0]\n" - ".word 0x4f82e118 // sdot v24.4s, v8.16b, v2.4b[0]\n" - ".word 0x4f82e139 // sdot v25.4s, v9.16b, v2.4b[0]\n" - ".word 0x4f81e156 // sdot v22.4s, v10.16b, v1.4b[0]\n" - ".word 0x4f82e15a // sdot v26.4s, v10.16b, v2.4b[0]\n" - ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" - ".word 0x4f81e177 // sdot v23.4s, v11.16b, v1.4b[0]\n" - ".word 0x4f82e17b // sdot v27.4s, v11.16b, v2.4b[0]\n" - "b.ne 7b\n" - "6:\n" - "cbz %[odds], 8f\n" - "ld1 {v0.b}[0], [%[a_ptr0]], #1\n" - "ld1 {v1.b}[0], [a_ptr1], #1\n" - "ld1 {v2.b}[0], [a_ptr2], #1\n" - "subs %[odds], %[odds], #0x1\n" - "b.eq 9f\n" - "ld1 {v0.b}[1], [%[a_ptr0]], #1\n" - "ld1 {v1.b}[1], [a_ptr1], #1\n" - "ld1 {v2.b}[1], [a_ptr2], #1\n" - "subs %[odds], %[odds], #0x1\n" - "b.eq 9f\n" - "ld1 {v0.b}[2], [%[a_ptr0]]\n" - "ld1 {v1.b}[2], [a_ptr1]\n" - "ld1 {v2.b}[2], [a_ptr2]\n" - "9:\n" - "ldr q8, [%[b_ptr0]]\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" - ".word 0x4f81e114 // sdot v20.4s, v8.16b, v1.4b[0]\n" - ".word 0x4f82e118 // sdot v24.4s, v8.16b, v2.4b[0]\n" - ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" - ".word 0x4f81e135 // sdot v21.4s, v9.16b, v1.4b[0]\n" - ".word 0x4f82e139 // sdot v25.4s, v9.16b, v2.4b[0]\n" - ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" - ".word 0x4f81e156 // sdot v22.4s, v10.16b, v1.4b[0]\n" - ".word 0x4f82e15a // sdot v26.4s, v10.16b, v2.4b[0]\n" - ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" - ".word 0x4f81e177 // sdot v23.4s, v11.16b, v1.4b[0]\n" - ".word 0x4f82e17b // sdot v27.4s, v11.16b, v2.4b[0]\n" - "8:\n" - "str q16, [%[c_ptr0]]\n" - "str q17, [%[c_ptr0], #0x10]\n" - "str q18, [%[c_ptr0], #0x20]\n" - "str q19, [%[c_ptr0], #0x30]\n" - "add %[c_ptr0], %[c_ptr0], #0x40\n" - "str q20, [c_ptr1]\n" - "str q21, [c_ptr1, #0x10]\n" - "str q22, [c_ptr1, #0x20]\n" - "str q23, [c_ptr1, #0x30]\n" - "str q24, [c_ptr2]\n" - "str q25, [c_ptr2, #0x10]\n" - "str q26, [c_ptr2, #0x20]\n" - "str q27, [c_ptr2, #0x30]\n" - ".unreq a_ptr1\n" - ".unreq a_ptr2\n" - ".unreq c_ptr1\n" - ".unreq c_ptr2\n" - ".unreq temploadreg0\n" - ".unreq temploadreg1\n" - ".unreq temploadreg2\n" - ".unreq temploadreg3\n" - : [a_ptr0] "+r" (a_ptr0), [b_ptr0] "+r" (b_ptr0), [c_ptr0] "+r" (c_ptr0), [loops] "+r" (loops), [regs] "+r" (regs), [blocks] "+r" (blocks), [odds] "+r" (odds) - : [betaptr] "r" (betaptr), [width] "r" (width), [beta0] "r" (beta0), [lda] "r" (ldab), [ldc] "r" (ldcb) - : "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x0", "x1", "x2", "x3", "x4", "x5", "x6", "x7", "cc", "memory" + "a_ptr1 .req X0\n" + "a_ptr2 .req X1\n" + "c_ptr1 .req X2\n" + "c_ptr2 .req X3\n" + "temploadreg0 .req X4\n" + "temploadreg1 .req X5\n" + "temploadreg2 .req X6\n" + "temploadreg3 .req X7\n" + "add a_ptr1, %[a_ptr0], %[lda]\n" + "add c_ptr1, %[c_ptr0], %[ldc]\n" + "add a_ptr2, a_ptr1, %[lda]\n" + "add c_ptr2, c_ptr1, %[ldc]\n" + "cbz %[beta0], 1f\n" + "movi v16.4s, #0\n" + "ldr q0, [%[a_ptr0]]\n" + "movi v17.4s, #0\n" + "ldr q1, [a_ptr1]\n" + "movi v18.4s, #0\n" + "ldr q2, [a_ptr2]\n" + "movi v19.4s, #0\n" + "ldr q8, [%[b_ptr0]]\n" + "movi v20.4s, #0\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + "movi v21.4s, #0\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + "movi v22.4s, #0\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + "movi v23.4s, #0\n" + "ldr q12, [%[b_ptr0], #0x40]\n" + "movi v24.4s, #0\n" + "ldr q13, [%[b_ptr0], #0x50]\n" + "movi v25.4s, #0\n" + "ldr d14, [%[b_ptr0], #0x60]\n" + "movi v26.4s, #0\n" + "ldr temploadreg2, [%[b_ptr0], #0x68]\n" + "movi v27.4s, #0\n" + "add %[a_ptr0], %[a_ptr0], #0x10\n" + "add a_ptr1, a_ptr1, #0x10\n" + "ins v14.d[1], temploadreg2\n" + "add a_ptr2, a_ptr2, #0x10\n" + "add %[b_ptr0], %[b_ptr0], #0x80\n" + "cbz %[loops], 2f\n" + "b 3f\n" + "1:\n" + "ld1r {v15.4s}, [%[betaptr]]\n" + "ldr q16, [%[c_ptr0]]\n" + "ldr q17, [%[c_ptr0], #0x10]\n" + "ldr q18, [%[c_ptr0], #0x20]\n" + "ldr q19, [%[c_ptr0], #0x30]\n" + "mul v16.4s, v16.4s, v15.4s\n" + "ldr q20, [c_ptr1]\n" + "mul v17.4s, v17.4s, v15.4s\n" + "ldr q21, [c_ptr1, #0x10]\n" + "mul v18.4s, v18.4s, v15.4s\n" + "ldr q22, [c_ptr1, #0x20]\n" + "mul v19.4s, v19.4s, v15.4s\n" + "ldr q23, [c_ptr1, #0x30]\n" + "mul v20.4s, v20.4s, v15.4s\n" + "ldr q24, [c_ptr2]\n" + "mul v21.4s, v21.4s, v15.4s\n" + "ldr q25, [c_ptr2, #0x10]\n" + "mul v22.4s, v22.4s, v15.4s\n" + "ldr q26, [c_ptr2, #0x20]\n" + "mul v23.4s, v23.4s, v15.4s\n" + "ldr q27, [c_ptr2, #0x30]\n" + "mul v24.4s, v24.4s, v15.4s\n" + "ldr q0, [%[a_ptr0]]\n" + "mul v25.4s, v25.4s, v15.4s\n" + "ldr q1, [a_ptr1]\n" + "mul v26.4s, v26.4s, v15.4s\n" + "ldr q2, [a_ptr2]\n" + "mul v27.4s, v27.4s, v15.4s\n" + "ldr q8, [%[b_ptr0]]\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + "add %[a_ptr0], %[a_ptr0], #0x10\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + "add a_ptr1, a_ptr1, #0x10\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + "add a_ptr2, a_ptr2, #0x10\n" + "ldr q12, [%[b_ptr0], #0x40]\n" + "ldr q13, [%[b_ptr0], #0x50]\n" + "ldr d14, [%[b_ptr0], #0x60]\n" + "ldr temploadreg2, [%[b_ptr0], #0x68]\n" + "add %[b_ptr0], %[b_ptr0], #0x80\n" + "ins v14.d[1], temploadreg2\n" + "cbz %[loops], 2f\n" + "3:\n" + ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" + "ldr d15, [%[b_ptr0], #-0x10]\n" + ".word 0x4f81e114 // sdot v20.4s, v8.16b, v1.4b[0]\n" + "ldr temploadreg3, [%[b_ptr0], #-0x8]\n" + ".word 0x4f82e118 // sdot v24.4s, v8.16b, v2.4b[0]\n" + "ldr d4, [%[a_ptr0]]\n" + ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" + "ldr temploadreg0, [%[a_ptr0], #0x8]\n" + ".word 0x4f81e135 // sdot v21.4s, v9.16b, v1.4b[0]\n" + "ldr d5, [a_ptr1]\n" + ".word 0x4f82e139 // sdot v25.4s, v9.16b, v2.4b[0]\n" + "ldr temploadreg1, [a_ptr1, #0x8]\n" + ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" + "ldr d6, [a_ptr2]\n" + ".word 0x4f81e156 // sdot v22.4s, v10.16b, v1.4b[0]\n" + "ldr temploadreg2, [a_ptr2, #0x8]\n" + ".word 0x4f82e15a // sdot v26.4s, v10.16b, v2.4b[0]\n" + "ldr d8, [%[b_ptr0]]\n" + ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" + "ins v4.d[1], temploadreg0\n" + ".word 0x4f81e177 // sdot v23.4s, v11.16b, v1.4b[0]\n" + "ldr temploadreg0, [%[b_ptr0], #0x8]\n" + ".word 0x4f82e17b // sdot v27.4s, v11.16b, v2.4b[0]\n" + "ldr d9, [%[b_ptr0], #0x10]\n" + ".word 0x4fa0e190 // sdot v16.4s, v12.16b, v0.4b[1]\n" + "ins v5.d[1], temploadreg1\n" + ".word 0x4fa1e194 // sdot v20.4s, v12.16b, v1.4b[1]\n" + "ldr temploadreg1, [%[b_ptr0], #0x18]\n" + ".word 0x4fa2e198 // sdot v24.4s, v12.16b, v2.4b[1]\n" + "ldr d10, [%[b_ptr0], #0x20]\n" + ".word 0x4fa0e1b1 // sdot v17.4s, v13.16b, v0.4b[1]\n" + "ins v6.d[1], temploadreg2\n" + ".word 0x4fa1e1b5 // sdot v21.4s, v13.16b, v1.4b[1]\n" + "ldr temploadreg2, [%[b_ptr0], #0x28]\n" + ".word 0x4fa2e1b9 // sdot v25.4s, v13.16b, v2.4b[1]\n" + "ldr d11, [%[b_ptr0], #0x30]\n" + ".word 0x4fa0e1d2 // sdot v18.4s, v14.16b, v0.4b[1]\n" + "ins v15.d[1], temploadreg3\n" + ".word 0x4fa1e1d6 // sdot v22.4s, v14.16b, v1.4b[1]\n" + "ldr temploadreg3, [%[b_ptr0], #0x38]\n" + ".word 0x4fa2e1da // sdot v26.4s, v14.16b, v2.4b[1]\n" + "ldr d12, [%[b_ptr0], #0x40]\n" + "ins v8.d[1], temploadreg0\n" + "subs %[loops], %[loops], #0x1\n" + ".word 0x4fa0e1f3 // sdot v19.4s, v15.16b, v0.4b[1]\n" + "ldr temploadreg0, [%[b_ptr0], #0x48]\n" + ".word 0x4fa1e1f7 // sdot v23.4s, v15.16b, v1.4b[1]\n" + "ldr d13, [%[b_ptr0], #0x50]\n" + ".word 0x4fa2e1fb // sdot v27.4s, v15.16b, v2.4b[1]\n" + "ins v9.d[1], temploadreg1\n" + ".word 0x4f80e910 // sdot v16.4s, v8.16b, v0.4b[2]\n" + "ldr temploadreg1, [%[b_ptr0], #0x58]\n" + ".word 0x4f81e914 // sdot v20.4s, v8.16b, v1.4b[2]\n" + "ldr d14, [%[b_ptr0], #0x60]\n" + ".word 0x4f82e918 // sdot v24.4s, v8.16b, v2.4b[2]\n" + "ins v10.d[1], temploadreg2\n" + ".word 0x4f80e931 // sdot v17.4s, v9.16b, v0.4b[2]\n" + "ldr temploadreg2, [%[b_ptr0], #0x68]\n" + ".word 0x4f81e935 // sdot v21.4s, v9.16b, v1.4b[2]\n" + "ldr d15, [%[b_ptr0], #0x70]\n" + ".word 0x4f82e939 // sdot v25.4s, v9.16b, v2.4b[2]\n" + "ins v11.d[1], temploadreg3\n" + ".word 0x4f80e952 // sdot v18.4s, v10.16b, v0.4b[2]\n" + "ldr temploadreg3, [%[b_ptr0], #0x78]\n" + ".word 0x4f81e956 // sdot v22.4s, v10.16b, v1.4b[2]\n" + "ins v12.d[1], temploadreg0\n" + ".word 0x4f82e95a // sdot v26.4s, v10.16b, v2.4b[2]\n" + "ins v13.d[1], temploadreg1\n" + ".word 0x4f80e973 // sdot v19.4s, v11.16b, v0.4b[2]\n" + "ins v14.d[1], temploadreg2\n" + ".word 0x4f81e977 // sdot v23.4s, v11.16b, v1.4b[2]\n" + "ins v15.d[1], temploadreg3\n" + ".word 0x4f82e97b // sdot v27.4s, v11.16b, v2.4b[2]\n" + "prfm PLDL1KEEP, [%[a_ptr0], #0x40]\n" + ".word 0x4fa0e990 // sdot v16.4s, v12.16b, v0.4b[3]\n" + "add %[b_ptr0], %[b_ptr0], #0x100\n" + ".word 0x4fa1e994 // sdot v20.4s, v12.16b, v1.4b[3]\n" + "ldr d8, [%[b_ptr0], #-0x80]\n" + ".word 0x4fa2e998 // sdot v24.4s, v12.16b, v2.4b[3]\n" + "ldr temploadreg0, [%[b_ptr0], #-0x78]\n" + ".word 0x4fa0e9b1 // sdot v17.4s, v13.16b, v0.4b[3]\n" + "ldr d9, [%[b_ptr0], #-0x70]\n" + ".word 0x4fa1e9b5 // sdot v21.4s, v13.16b, v1.4b[3]\n" + "ldr temploadreg1, [%[b_ptr0], #-0x68]\n" + ".word 0x4fa2e9b9 // sdot v25.4s, v13.16b, v2.4b[3]\n" + "ldr d10, [%[b_ptr0], #-0x60]\n" + ".word 0x4fa0e9d2 // sdot v18.4s, v14.16b, v0.4b[3]\n" + "ldr temploadreg2, [%[b_ptr0], #-0x58]\n" + ".word 0x4fa1e9d6 // sdot v22.4s, v14.16b, v1.4b[3]\n" + "ldr d11, [%[b_ptr0], #-0x50]\n" + ".word 0x4fa2e9da // sdot v26.4s, v14.16b, v2.4b[3]\n" + "ldr temploadreg3, [%[b_ptr0], #-0x48]\n" + ".word 0x4fa0e9f3 // sdot v19.4s, v15.16b, v0.4b[3]\n" + "ldr d12, [%[b_ptr0], #-0x40]\n" + ".word 0x4fa1e9f7 // sdot v23.4s, v15.16b, v1.4b[3]\n" + "ins v8.d[1], temploadreg0\n" + ".word 0x4fa2e9fb // sdot v27.4s, v15.16b, v2.4b[3]\n" + "ldr temploadreg0, [%[b_ptr0], #-0x38]\n" + "ldr d13, [%[b_ptr0], #-0x30]\n" + "add %[a_ptr0], %[a_ptr0], #0x20\n" + ".word 0x4f84e110 // sdot v16.4s, v8.16b, v4.4b[0]\n" + "ins v9.d[1], temploadreg1\n" + ".word 0x4f85e114 // sdot v20.4s, v8.16b, v5.4b[0]\n" + "ldr temploadreg1, [%[b_ptr0], #-0x28]\n" + ".word 0x4f86e118 // sdot v24.4s, v8.16b, v6.4b[0]\n" + "ldr d14, [%[b_ptr0], #-0x20]\n" + "ins v10.d[1], temploadreg2\n" + "add a_ptr1, a_ptr1, #0x20\n" + ".word 0x4f84e131 // sdot v17.4s, v9.16b, v4.4b[0]\n" + "ldr temploadreg2, [%[b_ptr0], #-0x18]\n" + ".word 0x4f85e135 // sdot v21.4s, v9.16b, v5.4b[0]\n" + "ldr d15, [%[b_ptr0], #-0x10]\n" + ".word 0x4f86e139 // sdot v25.4s, v9.16b, v6.4b[0]\n" + "ins v11.d[1], temploadreg3\n" + ".word 0x4f84e152 // sdot v18.4s, v10.16b, v4.4b[0]\n" + "ldr temploadreg3, [%[b_ptr0], #-0x8]\n" + ".word 0x4f85e156 // sdot v22.4s, v10.16b, v5.4b[0]\n" + "ldr d0, [%[a_ptr0], #-0x10]\n" + ".word 0x4f86e15a // sdot v26.4s, v10.16b, v6.4b[0]\n" + "ins v12.d[1], temploadreg0\n" + ".word 0x4f84e173 // sdot v19.4s, v11.16b, v4.4b[0]\n" + "ldr temploadreg0, [%[a_ptr0], #-0x8]\n" + ".word 0x4f85e177 // sdot v23.4s, v11.16b, v5.4b[0]\n" + "ldr d1, [a_ptr1, #-0x10]\n" + ".word 0x4f86e17b // sdot v27.4s, v11.16b, v6.4b[0]\n" + "ins v13.d[1], temploadreg1\n" + ".word 0x4fa4e190 // sdot v16.4s, v12.16b, v4.4b[1]\n" + "ldr temploadreg1, [a_ptr1, #-0x8]\n" + ".word 0x4fa5e194 // sdot v20.4s, v12.16b, v5.4b[1]\n" + "ins v14.d[1], temploadreg2\n" + ".word 0x4fa6e198 // sdot v24.4s, v12.16b, v6.4b[1]\n" + "ldr d8, [%[b_ptr0]]\n" + ".word 0x4fa4e1b1 // sdot v17.4s, v13.16b, v4.4b[1]\n" + "ins v0.d[1], temploadreg0\n" + ".word 0x4fa5e1b5 // sdot v21.4s, v13.16b, v5.4b[1]\n" + "ldr temploadreg0, [%[b_ptr0], #0x8]\n" + ".word 0x4fa6e1b9 // sdot v25.4s, v13.16b, v6.4b[1]\n" + "ldr d9, [%[b_ptr0], #0x10]\n" + ".word 0x4fa4e1d2 // sdot v18.4s, v14.16b, v4.4b[1]\n" + "ins v1.d[1], temploadreg1\n" + ".word 0x4fa5e1d6 // sdot v22.4s, v14.16b, v5.4b[1]\n" + "ldr temploadreg1, [%[b_ptr0], #0x18]\n" + ".word 0x4fa6e1da // sdot v26.4s, v14.16b, v6.4b[1]\n" + "ldr d10, [%[b_ptr0], #0x20]\n" + "ldr d11, [%[b_ptr0], #0x30]\n" + "add a_ptr2, a_ptr2, #0x20\n" + "ins v15.d[1], temploadreg3\n" + "prfm PLDL1KEEP, [a_ptr1, #0x40]\n" + "ldr d2, [a_ptr2, #-0x10]\n" + "prfm PLDL1KEEP, [a_ptr2, #0x40]\n" + ".word 0x4fa4e1f3 // sdot v19.4s, v15.16b, v4.4b[1]\n" + "ldr temploadreg2, [a_ptr2, #-0x8]\n" + ".word 0x4fa5e1f7 // sdot v23.4s, v15.16b, v5.4b[1]\n" + "ldr temploadreg3, [%[b_ptr0], #0x38]\n" + ".word 0x4fa6e1fb // sdot v27.4s, v15.16b, v6.4b[1]\n" + "ldr d12, [%[b_ptr0], #0x40]\n" + "ins v8.d[1], temploadreg0\n" + "ins v2.d[1], temploadreg2\n" + "ldr temploadreg2, [%[b_ptr0], #0x28]\n" + "ldr temploadreg0, [%[b_ptr0], #0x48]\n" + ".word 0x4f84e910 // sdot v16.4s, v8.16b, v4.4b[2]\n" + "ldr d13, [%[b_ptr0], #0x50]\n" + ".word 0x4f85e914 // sdot v20.4s, v8.16b, v5.4b[2]\n" + "ins v9.d[1], temploadreg1\n" + ".word 0x4f86e918 // sdot v24.4s, v8.16b, v6.4b[2]\n" + "ldr temploadreg1, [%[b_ptr0], #0x58]\n" + "ldr d14, [%[b_ptr0], #0x60]\n" + "ins v10.d[1], temploadreg2\n" + ".word 0x4f84e931 // sdot v17.4s, v9.16b, v4.4b[2]\n" + "ldr temploadreg2, [%[b_ptr0], #0x68]\n" + ".word 0x4f85e935 // sdot v21.4s, v9.16b, v5.4b[2]\n" + "ldr d15, [%[b_ptr0], #0x70]\n" + ".word 0x4f86e939 // sdot v25.4s, v9.16b, v6.4b[2]\n" + "ins v11.d[1], temploadreg3\n" + ".word 0x4f84e952 // sdot v18.4s, v10.16b, v4.4b[2]\n" + "ldr temploadreg3, [%[b_ptr0], #0x78]\n" + ".word 0x4f85e956 // sdot v22.4s, v10.16b, v5.4b[2]\n" + "ins v12.d[1], temploadreg0\n" + ".word 0x4f86e95a // sdot v26.4s, v10.16b, v6.4b[2]\n" + "ins v13.d[1], temploadreg1\n" + ".word 0x4f84e973 // sdot v19.4s, v11.16b, v4.4b[2]\n" + "ins v14.d[1], temploadreg2\n" + ".word 0x4f85e977 // sdot v23.4s, v11.16b, v5.4b[2]\n" + "ins v15.d[1], temploadreg3\n" + ".word 0x4f86e97b // sdot v27.4s, v11.16b, v6.4b[2]\n" + "add %[b_ptr0], %[b_ptr0], #0x100\n" + ".word 0x4fa4e990 // sdot v16.4s, v12.16b, v4.4b[3]\n" + "ldr d8, [%[b_ptr0], #-0x80]\n" + ".word 0x4fa5e994 // sdot v20.4s, v12.16b, v5.4b[3]\n" + "ldr temploadreg0, [%[b_ptr0], #-0x78]\n" + ".word 0x4fa6e998 // sdot v24.4s, v12.16b, v6.4b[3]\n" + "ldr d9, [%[b_ptr0], #-0x70]\n" + ".word 0x4fa4e9b1 // sdot v17.4s, v13.16b, v4.4b[3]\n" + "ldr temploadreg1, [%[b_ptr0], #-0x68]\n" + ".word 0x4fa5e9b5 // sdot v21.4s, v13.16b, v5.4b[3]\n" + "ldr d10, [%[b_ptr0], #-0x60]\n" + ".word 0x4fa6e9b9 // sdot v25.4s, v13.16b, v6.4b[3]\n" + "ldr temploadreg2, [%[b_ptr0], #-0x58]\n" + ".word 0x4fa4e9d2 // sdot v18.4s, v14.16b, v4.4b[3]\n" + "ldr d11, [%[b_ptr0], #-0x50]\n" + ".word 0x4fa5e9d6 // sdot v22.4s, v14.16b, v5.4b[3]\n" + "ldr temploadreg3, [%[b_ptr0], #-0x48]\n" + ".word 0x4fa6e9da // sdot v26.4s, v14.16b, v6.4b[3]\n" + "ldr d12, [%[b_ptr0], #-0x40]\n" + ".word 0x4fa4e9f3 // sdot v19.4s, v15.16b, v4.4b[3]\n" + "ins v8.d[1], temploadreg0\n" + ".word 0x4fa5e9f7 // sdot v23.4s, v15.16b, v5.4b[3]\n" + "ldr temploadreg0, [%[b_ptr0], #-0x38]\n" + ".word 0x4fa6e9fb // sdot v27.4s, v15.16b, v6.4b[3]\n" + "ldr d13, [%[b_ptr0], #-0x30]\n" + "ins v9.d[1], temploadreg1\n" + "ldr temploadreg1, [%[b_ptr0], #-0x28]\n" + "ldr d14, [%[b_ptr0], #-0x20]\n" + "ins v10.d[1], temploadreg2\n" + "ldr temploadreg2, [%[b_ptr0], #-0x18]\n" + "ins v11.d[1], temploadreg3\n" + "ins v12.d[1], temploadreg0\n" + "ins v13.d[1], temploadreg1\n" + "ins v14.d[1], temploadreg2\n" + "b.ne 3b\n" + "2:\n" + "ldr d15, [%[b_ptr0], #-0x10]\n" + "prfm PSTL1KEEP, [%[c_ptr0]]\n" + "ldr temploadreg3, [%[b_ptr0], #-0x8]\n" + "prfm PSTL1KEEP, [c_ptr1]\n" + "prfm PSTL1KEEP, [c_ptr2]\n" + "ins v15.d[1], temploadreg3\n" + "cbz %[regs], 4f\n" + ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" + "ldr d4, [%[a_ptr0]]\n" + ".word 0x4f81e114 // sdot v20.4s, v8.16b, v1.4b[0]\n" + "ldr temploadreg0, [%[a_ptr0], #0x8]\n" + ".word 0x4f82e118 // sdot v24.4s, v8.16b, v2.4b[0]\n" + "ldr d5, [a_ptr1]\n" + ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" + "ldr temploadreg1, [a_ptr1, #0x8]\n" + ".word 0x4f81e135 // sdot v21.4s, v9.16b, v1.4b[0]\n" + "ldr d6, [a_ptr2]\n" + ".word 0x4f82e139 // sdot v25.4s, v9.16b, v2.4b[0]\n" + "ldr temploadreg2, [a_ptr2, #0x8]\n" + ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" + "ldr d8, [%[b_ptr0]]\n" + ".word 0x4f81e156 // sdot v22.4s, v10.16b, v1.4b[0]\n" + "ins v4.d[1], temploadreg0\n" + ".word 0x4f82e15a // sdot v26.4s, v10.16b, v2.4b[0]\n" + "ldr temploadreg0, [%[b_ptr0], #0x8]\n" + ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" + "ldr d9, [%[b_ptr0], #0x10]\n" + ".word 0x4f81e177 // sdot v23.4s, v11.16b, v1.4b[0]\n" + "ins v5.d[1], temploadreg1\n" + ".word 0x4f82e17b // sdot v27.4s, v11.16b, v2.4b[0]\n" + "ldr temploadreg1, [%[b_ptr0], #0x18]\n" + ".word 0x4fa0e190 // sdot v16.4s, v12.16b, v0.4b[1]\n" + "ldr d10, [%[b_ptr0], #0x20]\n" + ".word 0x4fa1e194 // sdot v20.4s, v12.16b, v1.4b[1]\n" + "ins v6.d[1], temploadreg2\n" + ".word 0x4fa2e198 // sdot v24.4s, v12.16b, v2.4b[1]\n" + "ldr temploadreg2, [%[b_ptr0], #0x28]\n" + ".word 0x4fa0e1b1 // sdot v17.4s, v13.16b, v0.4b[1]\n" + "ldr d11, [%[b_ptr0], #0x30]\n" + ".word 0x4fa1e1b5 // sdot v21.4s, v13.16b, v1.4b[1]\n" + "ldr temploadreg3, [%[b_ptr0], #0x38]\n" + ".word 0x4fa2e1b9 // sdot v25.4s, v13.16b, v2.4b[1]\n" + "ldr d12, [%[b_ptr0], #0x40]\n" + ".word 0x4fa0e1d2 // sdot v18.4s, v14.16b, v0.4b[1]\n" + "ins v8.d[1], temploadreg0\n" + ".word 0x4fa1e1d6 // sdot v22.4s, v14.16b, v1.4b[1]\n" + "ldr temploadreg0, [%[b_ptr0], #0x48]\n" + ".word 0x4fa2e1da // sdot v26.4s, v14.16b, v2.4b[1]\n" + "ldr d13, [%[b_ptr0], #0x50]\n" + ".word 0x4fa0e1f3 // sdot v19.4s, v15.16b, v0.4b[1]\n" + "ins v9.d[1], temploadreg1\n" + ".word 0x4fa1e1f7 // sdot v23.4s, v15.16b, v1.4b[1]\n" + "ldr temploadreg1, [%[b_ptr0], #0x58]\n" + ".word 0x4fa2e1fb // sdot v27.4s, v15.16b, v2.4b[1]\n" + "ldr d14, [%[b_ptr0], #0x60]\n" + ".word 0x4f80e910 // sdot v16.4s, v8.16b, v0.4b[2]\n" + "ins v10.d[1], temploadreg2\n" + ".word 0x4f81e914 // sdot v20.4s, v8.16b, v1.4b[2]\n" + "ldr temploadreg2, [%[b_ptr0], #0x68]\n" + ".word 0x4f82e918 // sdot v24.4s, v8.16b, v2.4b[2]\n" + "ldr d15, [%[b_ptr0], #0x70]\n" + ".word 0x4f80e931 // sdot v17.4s, v9.16b, v0.4b[2]\n" + "ins v11.d[1], temploadreg3\n" + ".word 0x4f81e935 // sdot v21.4s, v9.16b, v1.4b[2]\n" + "ldr temploadreg3, [%[b_ptr0], #0x78]\n" + ".word 0x4f82e939 // sdot v25.4s, v9.16b, v2.4b[2]\n" + "ins v12.d[1], temploadreg0\n" + ".word 0x4f80e952 // sdot v18.4s, v10.16b, v0.4b[2]\n" + "ins v13.d[1], temploadreg1\n" + ".word 0x4f81e956 // sdot v22.4s, v10.16b, v1.4b[2]\n" + "ins v14.d[1], temploadreg2\n" + ".word 0x4f82e95a // sdot v26.4s, v10.16b, v2.4b[2]\n" + "ins v15.d[1], temploadreg3\n" + ".word 0x4f80e973 // sdot v19.4s, v11.16b, v0.4b[2]\n" + "add %[b_ptr0], %[b_ptr0], #0x100\n" + ".word 0x4f81e977 // sdot v23.4s, v11.16b, v1.4b[2]\n" + "ldr d8, [%[b_ptr0], #-0x80]\n" + ".word 0x4f82e97b // sdot v27.4s, v11.16b, v2.4b[2]\n" + "ldr temploadreg0, [%[b_ptr0], #-0x78]\n" + ".word 0x4fa0e990 // sdot v16.4s, v12.16b, v0.4b[3]\n" + "ldr d9, [%[b_ptr0], #-0x70]\n" + ".word 0x4fa1e994 // sdot v20.4s, v12.16b, v1.4b[3]\n" + "ldr temploadreg1, [%[b_ptr0], #-0x68]\n" + ".word 0x4fa2e998 // sdot v24.4s, v12.16b, v2.4b[3]\n" + "ldr d10, [%[b_ptr0], #-0x60]\n" + ".word 0x4fa0e9b1 // sdot v17.4s, v13.16b, v0.4b[3]\n" + "ldr temploadreg2, [%[b_ptr0], #-0x58]\n" + ".word 0x4fa1e9b5 // sdot v21.4s, v13.16b, v1.4b[3]\n" + "ldr d11, [%[b_ptr0], #-0x50]\n" + ".word 0x4fa2e9b9 // sdot v25.4s, v13.16b, v2.4b[3]\n" + "ldr temploadreg3, [%[b_ptr0], #-0x48]\n" + ".word 0x4fa0e9d2 // sdot v18.4s, v14.16b, v0.4b[3]\n" + "ldr d12, [%[b_ptr0], #-0x40]\n" + ".word 0x4fa1e9d6 // sdot v22.4s, v14.16b, v1.4b[3]\n" + "ins v8.d[1], temploadreg0\n" + ".word 0x4fa2e9da // sdot v26.4s, v14.16b, v2.4b[3]\n" + "ldr temploadreg0, [%[b_ptr0], #-0x38]\n" + ".word 0x4fa0e9f3 // sdot v19.4s, v15.16b, v0.4b[3]\n" + "ldr d13, [%[b_ptr0], #-0x30]\n" + ".word 0x4fa1e9f7 // sdot v23.4s, v15.16b, v1.4b[3]\n" + "ins v9.d[1], temploadreg1\n" + ".word 0x4fa2e9fb // sdot v27.4s, v15.16b, v2.4b[3]\n" + "ldr temploadreg1, [%[b_ptr0], #-0x28]\n" + ".word 0x4f84e110 // sdot v16.4s, v8.16b, v4.4b[0]\n" + "ldr d14, [%[b_ptr0], #-0x20]\n" + ".word 0x4f85e114 // sdot v20.4s, v8.16b, v5.4b[0]\n" + "ins v10.d[1], temploadreg2\n" + ".word 0x4f86e118 // sdot v24.4s, v8.16b, v6.4b[0]\n" + "ldr temploadreg2, [%[b_ptr0], #-0x18]\n" + ".word 0x4f84e131 // sdot v17.4s, v9.16b, v4.4b[0]\n" + "ldr d15, [%[b_ptr0], #-0x10]\n" + ".word 0x4f85e135 // sdot v21.4s, v9.16b, v5.4b[0]\n" + "ins v11.d[1], temploadreg3\n" + ".word 0x4f86e139 // sdot v25.4s, v9.16b, v6.4b[0]\n" + "ldr temploadreg3, [%[b_ptr0], #-0x8]\n" + ".word 0x4f84e152 // sdot v18.4s, v10.16b, v4.4b[0]\n" + "ldr d8, [%[b_ptr0]]\n" + ".word 0x4f85e156 // sdot v22.4s, v10.16b, v5.4b[0]\n" + "ins v12.d[1], temploadreg0\n" + ".word 0x4f86e15a // sdot v26.4s, v10.16b, v6.4b[0]\n" + "ldr temploadreg0, [%[b_ptr0], #0x8]\n" + ".word 0x4f84e173 // sdot v19.4s, v11.16b, v4.4b[0]\n" + "ldr d9, [%[b_ptr0], #0x10]\n" + ".word 0x4f85e177 // sdot v23.4s, v11.16b, v5.4b[0]\n" + "ins v13.d[1], temploadreg1\n" + ".word 0x4f86e17b // sdot v27.4s, v11.16b, v6.4b[0]\n" + "ldr temploadreg1, [%[b_ptr0], #0x18]\n" + ".word 0x4fa4e190 // sdot v16.4s, v12.16b, v4.4b[1]\n" + "ldr d10, [%[b_ptr0], #0x20]\n" + ".word 0x4fa5e194 // sdot v20.4s, v12.16b, v5.4b[1]\n" + "ins v14.d[1], temploadreg2\n" + ".word 0x4fa6e198 // sdot v24.4s, v12.16b, v6.4b[1]\n" + "ldr temploadreg2, [%[b_ptr0], #0x28]\n" + ".word 0x4fa4e1b1 // sdot v17.4s, v13.16b, v4.4b[1]\n" + "ldr d11, [%[b_ptr0], #0x30]\n" + ".word 0x4fa5e1b5 // sdot v21.4s, v13.16b, v5.4b[1]\n" + "ins v15.d[1], temploadreg3\n" + ".word 0x4fa6e1b9 // sdot v25.4s, v13.16b, v6.4b[1]\n" + "ldr temploadreg3, [%[b_ptr0], #0x38]\n" + ".word 0x4fa4e1d2 // sdot v18.4s, v14.16b, v4.4b[1]\n" + "ldr d12, [%[b_ptr0], #0x40]\n" + ".word 0x4fa5e1d6 // sdot v22.4s, v14.16b, v5.4b[1]\n" + "ins v8.d[1], temploadreg0\n" + ".word 0x4fa6e1da // sdot v26.4s, v14.16b, v6.4b[1]\n" + "ldr temploadreg0, [%[b_ptr0], #0x48]\n" + ".word 0x4fa4e1f3 // sdot v19.4s, v15.16b, v4.4b[1]\n" + "ldr d13, [%[b_ptr0], #0x50]\n" + ".word 0x4fa5e1f7 // sdot v23.4s, v15.16b, v5.4b[1]\n" + "ins v9.d[1], temploadreg1\n" + ".word 0x4fa6e1fb // sdot v27.4s, v15.16b, v6.4b[1]\n" + "ldr temploadreg1, [%[b_ptr0], #0x58]\n" + ".word 0x4f84e910 // sdot v16.4s, v8.16b, v4.4b[2]\n" + "ldr d14, [%[b_ptr0], #0x60]\n" + ".word 0x4f85e914 // sdot v20.4s, v8.16b, v5.4b[2]\n" + "ins v10.d[1], temploadreg2\n" + ".word 0x4f86e918 // sdot v24.4s, v8.16b, v6.4b[2]\n" + "ldr temploadreg2, [%[b_ptr0], #0x68]\n" + ".word 0x4f84e931 // sdot v17.4s, v9.16b, v4.4b[2]\n" + "ldr d15, [%[b_ptr0], #0x70]\n" + ".word 0x4f85e935 // sdot v21.4s, v9.16b, v5.4b[2]\n" + "ins v11.d[1], temploadreg3\n" + ".word 0x4f86e939 // sdot v25.4s, v9.16b, v6.4b[2]\n" + "ldr temploadreg3, [%[b_ptr0], #0x78]\n" + ".word 0x4f84e952 // sdot v18.4s, v10.16b, v4.4b[2]\n" + "ins v12.d[1], temploadreg0\n" + ".word 0x4f85e956 // sdot v22.4s, v10.16b, v5.4b[2]\n" + "ins v13.d[1], temploadreg1\n" + ".word 0x4f86e95a // sdot v26.4s, v10.16b, v6.4b[2]\n" + "ins v14.d[1], temploadreg2\n" + ".word 0x4f84e973 // sdot v19.4s, v11.16b, v4.4b[2]\n" + "ins v15.d[1], temploadreg3\n" + ".word 0x4f85e977 // sdot v23.4s, v11.16b, v5.4b[2]\n" + "add %[b_ptr0], %[b_ptr0], #0x80\n" + ".word 0x4f86e97b // sdot v27.4s, v11.16b, v6.4b[2]\n" + "add %[a_ptr0], %[a_ptr0], #0x10\n" + ".word 0x4fa4e990 // sdot v16.4s, v12.16b, v4.4b[3]\n" + "add a_ptr1, a_ptr1, #0x10\n" + ".word 0x4fa5e994 // sdot v20.4s, v12.16b, v5.4b[3]\n" + "add a_ptr2, a_ptr2, #0x10\n" + ".word 0x4fa6e998 // sdot v24.4s, v12.16b, v6.4b[3]\n" + ".word 0x4fa4e9b1 // sdot v17.4s, v13.16b, v4.4b[3]\n" + ".word 0x4fa5e9b5 // sdot v21.4s, v13.16b, v5.4b[3]\n" + ".word 0x4fa6e9b9 // sdot v25.4s, v13.16b, v6.4b[3]\n" + ".word 0x4fa4e9d2 // sdot v18.4s, v14.16b, v4.4b[3]\n" + ".word 0x4fa5e9d6 // sdot v22.4s, v14.16b, v5.4b[3]\n" + ".word 0x4fa6e9da // sdot v26.4s, v14.16b, v6.4b[3]\n" + ".word 0x4fa4e9f3 // sdot v19.4s, v15.16b, v4.4b[3]\n" + ".word 0x4fa5e9f7 // sdot v23.4s, v15.16b, v5.4b[3]\n" + ".word 0x4fa6e9fb // sdot v27.4s, v15.16b, v6.4b[3]\n" + "b 5f\n" + "4:\n" + ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" + "ldr temploadreg0, [%[b_ptr0], #0x8]\n" + ".word 0x4f81e114 // sdot v20.4s, v8.16b, v1.4b[0]\n" + "ldr temploadreg1, [%[b_ptr0], #0x18]\n" + ".word 0x4f82e118 // sdot v24.4s, v8.16b, v2.4b[0]\n" + "ldr d8, [%[b_ptr0]]\n" + ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" + "ldr temploadreg2, [%[b_ptr0], #0x28]\n" + ".word 0x4f81e135 // sdot v21.4s, v9.16b, v1.4b[0]\n" + "ldr temploadreg3, [%[b_ptr0], #0x38]\n" + ".word 0x4f82e139 // sdot v25.4s, v9.16b, v2.4b[0]\n" + "ldr d9, [%[b_ptr0], #0x10]\n" + ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" + "ins v8.d[1], temploadreg0\n" + ".word 0x4f81e156 // sdot v22.4s, v10.16b, v1.4b[0]\n" + "ldr temploadreg0, [%[b_ptr0], #0x48]\n" + ".word 0x4f82e15a // sdot v26.4s, v10.16b, v2.4b[0]\n" + "ldr d10, [%[b_ptr0], #0x20]\n" + ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" + "ins v9.d[1], temploadreg1\n" + ".word 0x4f81e177 // sdot v23.4s, v11.16b, v1.4b[0]\n" + "ldr temploadreg1, [%[b_ptr0], #0x58]\n" + ".word 0x4f82e17b // sdot v27.4s, v11.16b, v2.4b[0]\n" + "ldr d11, [%[b_ptr0], #0x30]\n" + ".word 0x4fa0e190 // sdot v16.4s, v12.16b, v0.4b[1]\n" + "ins v10.d[1], temploadreg2\n" + ".word 0x4fa1e194 // sdot v20.4s, v12.16b, v1.4b[1]\n" + "ldr temploadreg2, [%[b_ptr0], #0x68]\n" + ".word 0x4fa2e198 // sdot v24.4s, v12.16b, v2.4b[1]\n" + "ldr d12, [%[b_ptr0], #0x40]\n" + ".word 0x4fa0e1b1 // sdot v17.4s, v13.16b, v0.4b[1]\n" + "ins v11.d[1], temploadreg3\n" + ".word 0x4fa1e1b5 // sdot v21.4s, v13.16b, v1.4b[1]\n" + "ldr temploadreg3, [%[b_ptr0], #0x78]\n" + ".word 0x4fa2e1b9 // sdot v25.4s, v13.16b, v2.4b[1]\n" + "ldr d13, [%[b_ptr0], #0x50]\n" + ".word 0x4fa0e1d2 // sdot v18.4s, v14.16b, v0.4b[1]\n" + "ins v12.d[1], temploadreg0\n" + ".word 0x4fa1e1d6 // sdot v22.4s, v14.16b, v1.4b[1]\n" + ".word 0x4fa2e1da // sdot v26.4s, v14.16b, v2.4b[1]\n" + "ldr d14, [%[b_ptr0], #0x60]\n" + ".word 0x4fa0e1f3 // sdot v19.4s, v15.16b, v0.4b[1]\n" + "ins v13.d[1], temploadreg1\n" + ".word 0x4fa1e1f7 // sdot v23.4s, v15.16b, v1.4b[1]\n" + ".word 0x4fa2e1fb // sdot v27.4s, v15.16b, v2.4b[1]\n" + "ldr d15, [%[b_ptr0], #0x70]\n" + ".word 0x4f80e910 // sdot v16.4s, v8.16b, v0.4b[2]\n" + "ins v14.d[1], temploadreg2\n" + ".word 0x4f81e914 // sdot v20.4s, v8.16b, v1.4b[2]\n" + "add %[b_ptr0], %[b_ptr0], #0x80\n" + ".word 0x4f82e918 // sdot v24.4s, v8.16b, v2.4b[2]\n" + "ins v15.d[1], temploadreg3\n" + ".word 0x4f80e931 // sdot v17.4s, v9.16b, v0.4b[2]\n" + ".word 0x4f81e935 // sdot v21.4s, v9.16b, v1.4b[2]\n" + ".word 0x4f82e939 // sdot v25.4s, v9.16b, v2.4b[2]\n" + ".word 0x4f80e952 // sdot v18.4s, v10.16b, v0.4b[2]\n" + ".word 0x4f81e956 // sdot v22.4s, v10.16b, v1.4b[2]\n" + ".word 0x4f82e95a // sdot v26.4s, v10.16b, v2.4b[2]\n" + ".word 0x4f80e973 // sdot v19.4s, v11.16b, v0.4b[2]\n" + ".word 0x4f81e977 // sdot v23.4s, v11.16b, v1.4b[2]\n" + ".word 0x4f82e97b // sdot v27.4s, v11.16b, v2.4b[2]\n" + ".word 0x4fa0e990 // sdot v16.4s, v12.16b, v0.4b[3]\n" + ".word 0x4fa1e994 // sdot v20.4s, v12.16b, v1.4b[3]\n" + ".word 0x4fa2e998 // sdot v24.4s, v12.16b, v2.4b[3]\n" + ".word 0x4fa0e9b1 // sdot v17.4s, v13.16b, v0.4b[3]\n" + ".word 0x4fa1e9b5 // sdot v21.4s, v13.16b, v1.4b[3]\n" + ".word 0x4fa2e9b9 // sdot v25.4s, v13.16b, v2.4b[3]\n" + ".word 0x4fa0e9d2 // sdot v18.4s, v14.16b, v0.4b[3]\n" + ".word 0x4fa1e9d6 // sdot v22.4s, v14.16b, v1.4b[3]\n" + ".word 0x4fa2e9da // sdot v26.4s, v14.16b, v2.4b[3]\n" + ".word 0x4fa0e9f3 // sdot v19.4s, v15.16b, v0.4b[3]\n" + ".word 0x4fa1e9f7 // sdot v23.4s, v15.16b, v1.4b[3]\n" + ".word 0x4fa2e9fb // sdot v27.4s, v15.16b, v2.4b[3]\n" + "5:\n" + "cbz %[blocks], 6f\n" + "7:\n" + "ldr q8, [%[b_ptr0]]\n" + "subs %[blocks], %[blocks], #0x1\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + "ldr s0, [%[a_ptr0]]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + "add %[a_ptr0], %[a_ptr0], #0x4\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + "add %[b_ptr0], %[b_ptr0], #0x40\n" + ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" + "ldr s1, [a_ptr1]\n" + ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" + "add a_ptr1, a_ptr1, #0x4\n" + ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" + "ldr s2, [a_ptr2]\n" + ".word 0x4f81e114 // sdot v20.4s, v8.16b, v1.4b[0]\n" + "add a_ptr2, a_ptr2, #0x4\n" + ".word 0x4f81e135 // sdot v21.4s, v9.16b, v1.4b[0]\n" + ".word 0x4f82e118 // sdot v24.4s, v8.16b, v2.4b[0]\n" + ".word 0x4f82e139 // sdot v25.4s, v9.16b, v2.4b[0]\n" + ".word 0x4f81e156 // sdot v22.4s, v10.16b, v1.4b[0]\n" + ".word 0x4f82e15a // sdot v26.4s, v10.16b, v2.4b[0]\n" + ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" + ".word 0x4f81e177 // sdot v23.4s, v11.16b, v1.4b[0]\n" + ".word 0x4f82e17b // sdot v27.4s, v11.16b, v2.4b[0]\n" + "b.ne 7b\n" + "6:\n" + "cbz %[odds], 8f\n" + "ld1 {v0.b}[0], [%[a_ptr0]], #1\n" + "ld1 {v1.b}[0], [a_ptr1], #1\n" + "ld1 {v2.b}[0], [a_ptr2], #1\n" + "subs %[odds], %[odds], #0x1\n" + "b.eq 9f\n" + "ld1 {v0.b}[1], [%[a_ptr0]], #1\n" + "ld1 {v1.b}[1], [a_ptr1], #1\n" + "ld1 {v2.b}[1], [a_ptr2], #1\n" + "subs %[odds], %[odds], #0x1\n" + "b.eq 9f\n" + "ld1 {v0.b}[2], [%[a_ptr0]]\n" + "ld1 {v1.b}[2], [a_ptr1]\n" + "ld1 {v2.b}[2], [a_ptr2]\n" + "9:\n" + "ldr q8, [%[b_ptr0]]\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" + ".word 0x4f81e114 // sdot v20.4s, v8.16b, v1.4b[0]\n" + ".word 0x4f82e118 // sdot v24.4s, v8.16b, v2.4b[0]\n" + ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" + ".word 0x4f81e135 // sdot v21.4s, v9.16b, v1.4b[0]\n" + ".word 0x4f82e139 // sdot v25.4s, v9.16b, v2.4b[0]\n" + ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" + ".word 0x4f81e156 // sdot v22.4s, v10.16b, v1.4b[0]\n" + ".word 0x4f82e15a // sdot v26.4s, v10.16b, v2.4b[0]\n" + ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" + ".word 0x4f81e177 // sdot v23.4s, v11.16b, v1.4b[0]\n" + ".word 0x4f82e17b // sdot v27.4s, v11.16b, v2.4b[0]\n" + "8:\n" + "str q16, [%[c_ptr0]]\n" + "str q17, [%[c_ptr0], #0x10]\n" + "str q18, [%[c_ptr0], #0x20]\n" + "str q19, [%[c_ptr0], #0x30]\n" + "add %[c_ptr0], %[c_ptr0], #0x40\n" + "str q20, [c_ptr1]\n" + "str q21, [c_ptr1, #0x10]\n" + "str q22, [c_ptr1, #0x20]\n" + "str q23, [c_ptr1, #0x30]\n" + "str q24, [c_ptr2]\n" + "str q25, [c_ptr2, #0x10]\n" + "str q26, [c_ptr2, #0x20]\n" + "str q27, [c_ptr2, #0x30]\n" + ".unreq a_ptr1\n" + ".unreq a_ptr2\n" + ".unreq c_ptr1\n" + ".unreq c_ptr2\n" + ".unreq temploadreg0\n" + ".unreq temploadreg1\n" + ".unreq temploadreg2\n" + ".unreq temploadreg3\n" + : [a_ptr0] "+r" (a_ptr0), [b_ptr0] "+r" (b_ptr0), [c_ptr0] "+r" (c_ptr0), [loops] "+r" (loops), [regs] "+r" (regs), [blocks] "+r" (blocks), [odds] "+r" (odds) + : [betaptr] "r" (betaptr), [width] "r" (width), [beta0] "r" (beta0), [lda] "r" (ldab), [ldc] "r" (ldcb) + : "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x0", "x1", "x2", "x3", "x4", "x5", "x6", "x7", "cc", "memory" ); break; default: case 4: __asm __volatile ( - "a_ptr1 .req X0\n" - "a_ptr2 .req X1\n" - "a_ptr3 .req X2\n" - "c_ptr1 .req X3\n" - "c_ptr2 .req X4\n" - "c_ptr3 .req X5\n" - "temploadreg0 .req X6\n" - "temploadreg1 .req X7\n" - "temploadreg2 .req X8\n" - "temploadreg3 .req X9\n" - "add a_ptr1, %[a_ptr0], %[lda]\n" - "add c_ptr1, %[c_ptr0], %[ldc]\n" - "add a_ptr2, a_ptr1, %[lda]\n" - "add c_ptr2, c_ptr1, %[ldc]\n" - "add a_ptr3, a_ptr2, %[lda]\n" - "add c_ptr3, c_ptr2, %[ldc]\n" - "cbz %[beta0], 1f\n" - "movi v16.4s, #0\n" - "ldr q0, [%[a_ptr0]]\n" - "movi v17.4s, #0\n" - "ldr q1, [a_ptr1]\n" - "movi v18.4s, #0\n" - "ldr q2, [a_ptr2]\n" - "movi v19.4s, #0\n" - "ldr q3, [a_ptr3]\n" - "movi v20.4s, #0\n" - "ldr q8, [%[b_ptr0]]\n" - "movi v21.4s, #0\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - "movi v22.4s, #0\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - "movi v23.4s, #0\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - "movi v24.4s, #0\n" - "ldr q12, [%[b_ptr0], #0x40]\n" - "movi v25.4s, #0\n" - "ldr q13, [%[b_ptr0], #0x50]\n" - "movi v26.4s, #0\n" - "ldr d14, [%[b_ptr0], #0x60]\n" - "movi v27.4s, #0\n" - "ldr temploadreg2, [%[b_ptr0], #0x68]\n" - "movi v28.4s, #0\n" - "add %[a_ptr0], %[a_ptr0], #0x10\n" - "movi v29.4s, #0\n" - "ins v14.d[1], temploadreg2\n" - "movi v30.4s, #0\n" - "add a_ptr1, a_ptr1, #0x10\n" - "movi v31.4s, #0\n" - "add a_ptr2, a_ptr2, #0x10\n" - "add a_ptr3, a_ptr3, #0x10\n" - "add %[b_ptr0], %[b_ptr0], #0x80\n" - "cbz %[loops], 2f\n" - "b 3f\n" - "1:\n" - "ld1r {v15.4s}, [%[betaptr]]\n" - "ldr q16, [%[c_ptr0]]\n" - "ldr q17, [%[c_ptr0], #0x10]\n" - "ldr q18, [%[c_ptr0], #0x20]\n" - "ldr q19, [%[c_ptr0], #0x30]\n" - "mul v16.4s, v16.4s, v15.4s\n" - "ldr q20, [c_ptr1]\n" - "mul v17.4s, v17.4s, v15.4s\n" - "ldr q21, [c_ptr1, #0x10]\n" - "mul v18.4s, v18.4s, v15.4s\n" - "ldr q22, [c_ptr1, #0x20]\n" - "mul v19.4s, v19.4s, v15.4s\n" - "ldr q23, [c_ptr1, #0x30]\n" - "mul v20.4s, v20.4s, v15.4s\n" - "ldr q24, [c_ptr2]\n" - "mul v21.4s, v21.4s, v15.4s\n" - "ldr q25, [c_ptr2, #0x10]\n" - "mul v22.4s, v22.4s, v15.4s\n" - "ldr q26, [c_ptr2, #0x20]\n" - "mul v23.4s, v23.4s, v15.4s\n" - "ldr q27, [c_ptr2, #0x30]\n" - "mul v24.4s, v24.4s, v15.4s\n" - "ldr q28, [c_ptr3]\n" - "mul v25.4s, v25.4s, v15.4s\n" - "ldr q29, [c_ptr3, #0x10]\n" - "mul v26.4s, v26.4s, v15.4s\n" - "ldr q30, [c_ptr3, #0x20]\n" - "mul v27.4s, v27.4s, v15.4s\n" - "ldr q31, [c_ptr3, #0x30]\n" - "mul v28.4s, v28.4s, v15.4s\n" - "ldr q0, [%[a_ptr0]]\n" - "mul v29.4s, v29.4s, v15.4s\n" - "ldr q1, [a_ptr1]\n" - "mul v30.4s, v30.4s, v15.4s\n" - "ldr q2, [a_ptr2]\n" - "mul v31.4s, v31.4s, v15.4s\n" - "ldr q3, [a_ptr3]\n" - "ldr q8, [%[b_ptr0]]\n" - "add %[a_ptr0], %[a_ptr0], #0x10\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - "add a_ptr1, a_ptr1, #0x10\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - "add a_ptr2, a_ptr2, #0x10\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - "add a_ptr3, a_ptr3, #0x10\n" - "ldr q12, [%[b_ptr0], #0x40]\n" - "ldr q13, [%[b_ptr0], #0x50]\n" - "ldr d14, [%[b_ptr0], #0x60]\n" - "ldr temploadreg2, [%[b_ptr0], #0x68]\n" - "add %[b_ptr0], %[b_ptr0], #0x80\n" - "ins v14.d[1], temploadreg2\n" - "cbz %[loops], 2f\n" - "3:\n" - ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" - "ldr d15, [%[b_ptr0], #-0x10]\n" - ".word 0x4f81e114 // sdot v20.4s, v8.16b, v1.4b[0]\n" - "ldr temploadreg3, [%[b_ptr0], #-0x8]\n" - ".word 0x4f82e118 // sdot v24.4s, v8.16b, v2.4b[0]\n" - "ldr d4, [%[a_ptr0]]\n" - ".word 0x4f83e11c // sdot v28.4s, v8.16b, v3.4b[0]\n" - "ldr temploadreg0, [%[a_ptr0], #0x8]\n" - ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" - "ldr d5, [a_ptr1]\n" - ".word 0x4f81e135 // sdot v21.4s, v9.16b, v1.4b[0]\n" - "ldr temploadreg1, [a_ptr1, #0x8]\n" - ".word 0x4f82e139 // sdot v25.4s, v9.16b, v2.4b[0]\n" - "ldr d6, [a_ptr2]\n" - ".word 0x4f83e13d // sdot v29.4s, v9.16b, v3.4b[0]\n" - "ldr temploadreg2, [a_ptr2, #0x8]\n" - ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" - "ldr d7, [a_ptr3]\n" - ".word 0x4f81e156 // sdot v22.4s, v10.16b, v1.4b[0]\n" - "ins v15.d[1], temploadreg3\n" - ".word 0x4f82e15a // sdot v26.4s, v10.16b, v2.4b[0]\n" - "ldr temploadreg3, [a_ptr3, #0x8]\n" - ".word 0x4f83e15e // sdot v30.4s, v10.16b, v3.4b[0]\n" - "ldr d8, [%[b_ptr0]]\n" - ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" - "ins v4.d[1], temploadreg0\n" - ".word 0x4f81e177 // sdot v23.4s, v11.16b, v1.4b[0]\n" - "ldr temploadreg0, [%[b_ptr0], #0x8]\n" - ".word 0x4f82e17b // sdot v27.4s, v11.16b, v2.4b[0]\n" - "ldr d9, [%[b_ptr0], #0x10]\n" - ".word 0x4f83e17f // sdot v31.4s, v11.16b, v3.4b[0]\n" - "ins v5.d[1], temploadreg1\n" - ".word 0x4fa0e190 // sdot v16.4s, v12.16b, v0.4b[1]\n" - "ldr temploadreg1, [%[b_ptr0], #0x18]\n" - ".word 0x4fa1e194 // sdot v20.4s, v12.16b, v1.4b[1]\n" - "ldr d10, [%[b_ptr0], #0x20]\n" - ".word 0x4fa2e198 // sdot v24.4s, v12.16b, v2.4b[1]\n" - "ins v6.d[1], temploadreg2\n" - ".word 0x4fa3e19c // sdot v28.4s, v12.16b, v3.4b[1]\n" - "ldr temploadreg2, [%[b_ptr0], #0x28]\n" - ".word 0x4fa0e1b1 // sdot v17.4s, v13.16b, v0.4b[1]\n" - "ldr d11, [%[b_ptr0], #0x30]\n" - ".word 0x4fa1e1b5 // sdot v21.4s, v13.16b, v1.4b[1]\n" - "ins v7.d[1], temploadreg3\n" - ".word 0x4fa2e1b9 // sdot v25.4s, v13.16b, v2.4b[1]\n" - "ldr temploadreg3, [%[b_ptr0], #0x38]\n" - ".word 0x4fa3e1bd // sdot v29.4s, v13.16b, v3.4b[1]\n" - "ldr d12, [%[b_ptr0], #0x40]\n" - ".word 0x4fa0e1d2 // sdot v18.4s, v14.16b, v0.4b[1]\n" - "ins v8.d[1], temploadreg0\n" - ".word 0x4fa1e1d6 // sdot v22.4s, v14.16b, v1.4b[1]\n" - "ldr temploadreg0, [%[b_ptr0], #0x48]\n" - ".word 0x4fa2e1da // sdot v26.4s, v14.16b, v2.4b[1]\n" - "ldr d13, [%[b_ptr0], #0x50]\n" - ".word 0x4fa3e1de // sdot v30.4s, v14.16b, v3.4b[1]\n" - "ins v9.d[1], temploadreg1\n" - ".word 0x4fa0e1f3 // sdot v19.4s, v15.16b, v0.4b[1]\n" - "ldr temploadreg1, [%[b_ptr0], #0x58]\n" - ".word 0x4fa1e1f7 // sdot v23.4s, v15.16b, v1.4b[1]\n" - "ldr d14, [%[b_ptr0], #0x60]\n" - ".word 0x4fa2e1fb // sdot v27.4s, v15.16b, v2.4b[1]\n" - "ins v10.d[1], temploadreg2\n" - ".word 0x4fa3e1ff // sdot v31.4s, v15.16b, v3.4b[1]\n" - "ldr temploadreg2, [%[b_ptr0], #0x68]\n" - ".word 0x4f80e910 // sdot v16.4s, v8.16b, v0.4b[2]\n" - "ldr d15, [%[b_ptr0], #0x70]\n" - ".word 0x4f81e914 // sdot v20.4s, v8.16b, v1.4b[2]\n" - "ins v11.d[1], temploadreg3\n" - ".word 0x4f82e918 // sdot v24.4s, v8.16b, v2.4b[2]\n" - "ldr temploadreg3, [%[b_ptr0], #0x78]\n" - ".word 0x4f83e91c // sdot v28.4s, v8.16b, v3.4b[2]\n" - "ins v12.d[1], temploadreg0\n" - ".word 0x4f80e931 // sdot v17.4s, v9.16b, v0.4b[2]\n" - "ins v13.d[1], temploadreg1\n" - ".word 0x4f81e935 // sdot v21.4s, v9.16b, v1.4b[2]\n" - "ins v14.d[1], temploadreg2\n" - ".word 0x4f82e939 // sdot v25.4s, v9.16b, v2.4b[2]\n" - "ins v15.d[1], temploadreg3\n" - ".word 0x4f83e93d // sdot v29.4s, v9.16b, v3.4b[2]\n" - "subs %[loops], %[loops], #0x1\n" - ".word 0x4f80e952 // sdot v18.4s, v10.16b, v0.4b[2]\n" - "prfm PLDL1KEEP, [%[a_ptr0], #0x40]\n" - ".word 0x4f81e956 // sdot v22.4s, v10.16b, v1.4b[2]\n" - "add %[b_ptr0], %[b_ptr0], #0x100\n" - ".word 0x4f82e95a // sdot v26.4s, v10.16b, v2.4b[2]\n" - "ldr d8, [%[b_ptr0], #-0x80]\n" - ".word 0x4f83e95e // sdot v30.4s, v10.16b, v3.4b[2]\n" - "ldr temploadreg0, [%[b_ptr0], #-0x78]\n" - ".word 0x4f80e973 // sdot v19.4s, v11.16b, v0.4b[2]\n" - "ldr d9, [%[b_ptr0], #-0x70]\n" - ".word 0x4f81e977 // sdot v23.4s, v11.16b, v1.4b[2]\n" - "ldr temploadreg1, [%[b_ptr0], #-0x68]\n" - ".word 0x4f82e97b // sdot v27.4s, v11.16b, v2.4b[2]\n" - "ldr d10, [%[b_ptr0], #-0x60]\n" - ".word 0x4f83e97f // sdot v31.4s, v11.16b, v3.4b[2]\n" - "ldr temploadreg2, [%[b_ptr0], #-0x58]\n" - ".word 0x4fa0e990 // sdot v16.4s, v12.16b, v0.4b[3]\n" - "ldr d11, [%[b_ptr0], #-0x50]\n" - ".word 0x4fa1e994 // sdot v20.4s, v12.16b, v1.4b[3]\n" - "ldr temploadreg3, [%[b_ptr0], #-0x48]\n" - ".word 0x4fa2e998 // sdot v24.4s, v12.16b, v2.4b[3]\n" - "ins v8.d[1], temploadreg0\n" - ".word 0x4fa3e99c // sdot v28.4s, v12.16b, v3.4b[3]\n" - "ldr d12, [%[b_ptr0], #-0x40]\n" - ".word 0x4fa0e9b1 // sdot v17.4s, v13.16b, v0.4b[3]\n" - "ldr temploadreg0, [%[b_ptr0], #-0x38]\n" - ".word 0x4fa1e9b5 // sdot v21.4s, v13.16b, v1.4b[3]\n" - "ins v9.d[1], temploadreg1\n" - ".word 0x4fa2e9b9 // sdot v25.4s, v13.16b, v2.4b[3]\n" - "ldr temploadreg1, [%[b_ptr0], #-0x28]\n" - ".word 0x4fa3e9bd // sdot v29.4s, v13.16b, v3.4b[3]\n" - "ldr d13, [%[b_ptr0], #-0x30]\n" - ".word 0x4fa0e9d2 // sdot v18.4s, v14.16b, v0.4b[3]\n" - "ins v10.d[1], temploadreg2\n" - ".word 0x4fa1e9d6 // sdot v22.4s, v14.16b, v1.4b[3]\n" - "ldr temploadreg2, [%[b_ptr0], #-0x18]\n" - ".word 0x4fa2e9da // sdot v26.4s, v14.16b, v2.4b[3]\n" - "ins v11.d[1], temploadreg3\n" - ".word 0x4fa3e9de // sdot v30.4s, v14.16b, v3.4b[3]\n" - "ldr d14, [%[b_ptr0], #-0x20]\n" - ".word 0x4fa0e9f3 // sdot v19.4s, v15.16b, v0.4b[3]\n" - "ldr temploadreg3, [%[b_ptr0], #-0x8]\n" - ".word 0x4fa1e9f7 // sdot v23.4s, v15.16b, v1.4b[3]\n" - "ins v12.d[1], temploadreg0\n" - ".word 0x4fa2e9fb // sdot v27.4s, v15.16b, v2.4b[3]\n" - "ins v13.d[1], temploadreg1\n" - ".word 0x4fa3e9ff // sdot v31.4s, v15.16b, v3.4b[3]\n" - "ldr d15, [%[b_ptr0], #-0x10]\n" - ".word 0x4f84e110 // sdot v16.4s, v8.16b, v4.4b[0]\n" - "ins v14.d[1], temploadreg2\n" - ".word 0x4f85e114 // sdot v20.4s, v8.16b, v5.4b[0]\n" - "add %[a_ptr0], %[a_ptr0], #0x20\n" - ".word 0x4f86e118 // sdot v24.4s, v8.16b, v6.4b[0]\n" - "ldr d0, [%[a_ptr0], #-0x10]\n" - ".word 0x4f87e11c // sdot v28.4s, v8.16b, v7.4b[0]\n" - "ldr temploadreg0, [%[a_ptr0], #-0x8]\n" - ".word 0x4f84e131 // sdot v17.4s, v9.16b, v4.4b[0]\n" - "ins v15.d[1], temploadreg3\n" - ".word 0x4f85e135 // sdot v21.4s, v9.16b, v5.4b[0]\n" - "ldr d8, [%[b_ptr0]]\n" - ".word 0x4f86e139 // sdot v25.4s, v9.16b, v6.4b[0]\n" - "ins v0.d[1], temploadreg0\n" - ".word 0x4f87e13d // sdot v29.4s, v9.16b, v7.4b[0]\n" - "ldr temploadreg0, [%[b_ptr0], #0x8]\n" - ".word 0x4f84e152 // sdot v18.4s, v10.16b, v4.4b[0]\n" - "ldr d9, [%[b_ptr0], #0x10]\n" - ".word 0x4f85e156 // sdot v22.4s, v10.16b, v5.4b[0]\n" - "add a_ptr1, a_ptr1, #0x20\n" - ".word 0x4f86e15a // sdot v26.4s, v10.16b, v6.4b[0]\n" - "ldr d1, [a_ptr1, #-0x10]\n" - ".word 0x4f87e15e // sdot v30.4s, v10.16b, v7.4b[0]\n" - "ldr temploadreg1, [a_ptr1, #-0x8]\n" - ".word 0x4f84e173 // sdot v19.4s, v11.16b, v4.4b[0]\n" - "ldr d10, [%[b_ptr0], #0x20]\n" - ".word 0x4f85e177 // sdot v23.4s, v11.16b, v5.4b[0]\n" - "ins v8.d[1], temploadreg0\n" - ".word 0x4f86e17b // sdot v27.4s, v11.16b, v6.4b[0]\n" - "ins v1.d[1], temploadreg1\n" - ".word 0x4f87e17f // sdot v31.4s, v11.16b, v7.4b[0]\n" - "ldr temploadreg1, [%[b_ptr0], #0x18]\n" - ".word 0x4fa4e190 // sdot v16.4s, v12.16b, v4.4b[1]\n" - "ldr d11, [%[b_ptr0], #0x30]\n" - ".word 0x4fa5e194 // sdot v20.4s, v12.16b, v5.4b[1]\n" - "ldr temploadreg0, [%[b_ptr0], #0x48]\n" - ".word 0x4fa6e198 // sdot v24.4s, v12.16b, v6.4b[1]\n" - "ins v9.d[1], temploadreg1\n" - ".word 0x4fa7e19c // sdot v28.4s, v12.16b, v7.4b[1]\n" - "ldr d12, [%[b_ptr0], #0x40]\n" - ".word 0x4fa4e1b1 // sdot v17.4s, v13.16b, v4.4b[1]\n" - "ldr temploadreg1, [%[b_ptr0], #0x58]\n" - ".word 0x4fa5e1b5 // sdot v21.4s, v13.16b, v5.4b[1]\n" - "add a_ptr2, a_ptr2, #0x20\n" - ".word 0x4fa6e1b9 // sdot v25.4s, v13.16b, v6.4b[1]\n" - "ldr d2, [a_ptr2, #-0x10]\n" - ".word 0x4fa7e1bd // sdot v29.4s, v13.16b, v7.4b[1]\n" - "ldr temploadreg2, [a_ptr2, #-0x8]\n" - ".word 0x4fa4e1d2 // sdot v18.4s, v14.16b, v4.4b[1]\n" - "ldr d13, [%[b_ptr0], #0x50]\n" - ".word 0x4fa5e1d6 // sdot v22.4s, v14.16b, v5.4b[1]\n" - "ins v12.d[1], temploadreg0\n" - ".word 0x4fa6e1da // sdot v26.4s, v14.16b, v6.4b[1]\n" - "ins v2.d[1], temploadreg2\n" - ".word 0x4fa7e1de // sdot v30.4s, v14.16b, v7.4b[1]\n" - "ldr temploadreg2, [%[b_ptr0], #0x28]\n" - ".word 0x4fa4e1f3 // sdot v19.4s, v15.16b, v4.4b[1]\n" - "ldr d14, [%[b_ptr0], #0x60]\n" - ".word 0x4fa5e1f7 // sdot v23.4s, v15.16b, v5.4b[1]\n" - "ins v13.d[1], temploadreg1\n" - ".word 0x4fa6e1fb // sdot v27.4s, v15.16b, v6.4b[1]\n" - "ins v10.d[1], temploadreg2\n" - ".word 0x4fa7e1ff // sdot v31.4s, v15.16b, v7.4b[1]\n" - "ldr temploadreg2, [%[b_ptr0], #0x68]\n" - ".word 0x4f84e910 // sdot v16.4s, v8.16b, v4.4b[2]\n" - "ldr d15, [%[b_ptr0], #0x70]\n" - ".word 0x4f85e914 // sdot v20.4s, v8.16b, v5.4b[2]\n" - "add a_ptr3, a_ptr3, #0x20\n" - ".word 0x4f86e918 // sdot v24.4s, v8.16b, v6.4b[2]\n" - "ldr d3, [a_ptr3, #-0x10]\n" - ".word 0x4f87e91c // sdot v28.4s, v8.16b, v7.4b[2]\n" - "ldr temploadreg3, [a_ptr3, #-0x8]\n" - ".word 0x4f84e931 // sdot v17.4s, v9.16b, v4.4b[2]\n" - "ins v14.d[1], temploadreg2\n" - ".word 0x4f85e935 // sdot v21.4s, v9.16b, v5.4b[2]\n" - "prfm PLDL1KEEP, [a_ptr1, #0x40]\n" - ".word 0x4f86e939 // sdot v25.4s, v9.16b, v6.4b[2]\n" - "ins v3.d[1], temploadreg3\n" - ".word 0x4f87e93d // sdot v29.4s, v9.16b, v7.4b[2]\n" - "ldr temploadreg3, [%[b_ptr0], #0x38]\n" - ".word 0x4f84e952 // sdot v18.4s, v10.16b, v4.4b[2]\n" - "prfm PLDL1KEEP, [a_ptr2, #0x40]\n" - ".word 0x4f85e956 // sdot v22.4s, v10.16b, v5.4b[2]\n" - "ins v11.d[1], temploadreg3\n" - ".word 0x4f86e95a // sdot v26.4s, v10.16b, v6.4b[2]\n" - "ldr temploadreg3, [%[b_ptr0], #0x78]\n" - ".word 0x4f87e95e // sdot v30.4s, v10.16b, v7.4b[2]\n" - "add %[b_ptr0], %[b_ptr0], #0x100\n" - ".word 0x4f84e973 // sdot v19.4s, v11.16b, v4.4b[2]\n" - "ldr d8, [%[b_ptr0], #-0x80]\n" - ".word 0x4f85e977 // sdot v23.4s, v11.16b, v5.4b[2]\n" - "ldr temploadreg0, [%[b_ptr0], #-0x78]\n" - ".word 0x4f86e97b // sdot v27.4s, v11.16b, v6.4b[2]\n" - "ldr d9, [%[b_ptr0], #-0x70]\n" - ".word 0x4f87e97f // sdot v31.4s, v11.16b, v7.4b[2]\n" - "ldr temploadreg1, [%[b_ptr0], #-0x68]\n" - ".word 0x4fa4e990 // sdot v16.4s, v12.16b, v4.4b[3]\n" - "ldr d10, [%[b_ptr0], #-0x60]\n" - ".word 0x4fa5e994 // sdot v20.4s, v12.16b, v5.4b[3]\n" - "ldr temploadreg2, [%[b_ptr0], #-0x58]\n" - ".word 0x4fa6e998 // sdot v24.4s, v12.16b, v6.4b[3]\n" - "ldr d11, [%[b_ptr0], #-0x50]\n" - ".word 0x4fa7e99c // sdot v28.4s, v12.16b, v7.4b[3]\n" - "ins v15.d[1], temploadreg3\n" - ".word 0x4fa4e9b1 // sdot v17.4s, v13.16b, v4.4b[3]\n" - "ldr temploadreg3, [%[b_ptr0], #-0x48]\n" - ".word 0x4fa5e9b5 // sdot v21.4s, v13.16b, v5.4b[3]\n" - "ldr d12, [%[b_ptr0], #-0x40]\n" - ".word 0x4fa6e9b9 // sdot v25.4s, v13.16b, v6.4b[3]\n" - "ins v8.d[1], temploadreg0\n" - ".word 0x4fa7e9bd // sdot v29.4s, v13.16b, v7.4b[3]\n" - "ldr temploadreg0, [%[b_ptr0], #-0x38]\n" - ".word 0x4fa4e9d2 // sdot v18.4s, v14.16b, v4.4b[3]\n" - "ldr d13, [%[b_ptr0], #-0x30]\n" - ".word 0x4fa5e9d6 // sdot v22.4s, v14.16b, v5.4b[3]\n" - "ins v9.d[1], temploadreg1\n" - ".word 0x4fa6e9da // sdot v26.4s, v14.16b, v6.4b[3]\n" - "ldr temploadreg1, [%[b_ptr0], #-0x28]\n" - ".word 0x4fa7e9de // sdot v30.4s, v14.16b, v7.4b[3]\n" - "ldr d14, [%[b_ptr0], #-0x20]\n" - ".word 0x4fa4e9f3 // sdot v19.4s, v15.16b, v4.4b[3]\n" - "ins v10.d[1], temploadreg2\n" - ".word 0x4fa5e9f7 // sdot v23.4s, v15.16b, v5.4b[3]\n" - "ldr temploadreg2, [%[b_ptr0], #-0x18]\n" - ".word 0x4fa6e9fb // sdot v27.4s, v15.16b, v6.4b[3]\n" - "ins v11.d[1], temploadreg3\n" - ".word 0x4fa7e9ff // sdot v31.4s, v15.16b, v7.4b[3]\n" - "ins v12.d[1], temploadreg0\n" - "ins v13.d[1], temploadreg1\n" - "prfm PLDL1KEEP, [a_ptr3, #0x40]\n" - "ins v14.d[1], temploadreg2\n" - "b.ne 3b\n" - "2:\n" - "ldr d15, [%[b_ptr0], #-0x10]\n" - "prfm PSTL1KEEP, [%[c_ptr0]]\n" - "ldr temploadreg3, [%[b_ptr0], #-0x8]\n" - "prfm PSTL1KEEP, [c_ptr1]\n" - "prfm PSTL1KEEP, [c_ptr2]\n" - "prfm PSTL1KEEP, [c_ptr3]\n" - "ins v15.d[1], temploadreg3\n" - "cbz %[regs], 4f\n" - ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" - "ldr d4, [%[a_ptr0]]\n" - ".word 0x4f81e114 // sdot v20.4s, v8.16b, v1.4b[0]\n" - "ldr temploadreg0, [%[a_ptr0], #0x8]\n" - ".word 0x4f82e118 // sdot v24.4s, v8.16b, v2.4b[0]\n" - "ldr d5, [a_ptr1]\n" - ".word 0x4f83e11c // sdot v28.4s, v8.16b, v3.4b[0]\n" - "ldr temploadreg1, [a_ptr1, #0x8]\n" - ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" - "ldr d6, [a_ptr2]\n" - ".word 0x4f81e135 // sdot v21.4s, v9.16b, v1.4b[0]\n" - "ldr temploadreg2, [a_ptr2, #0x8]\n" - ".word 0x4f82e139 // sdot v25.4s, v9.16b, v2.4b[0]\n" - "ldr d7, [a_ptr3]\n" - ".word 0x4f83e13d // sdot v29.4s, v9.16b, v3.4b[0]\n" - "ldr temploadreg3, [a_ptr3, #0x8]\n" - ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" - "ldr d8, [%[b_ptr0]]\n" - ".word 0x4f81e156 // sdot v22.4s, v10.16b, v1.4b[0]\n" - "ins v4.d[1], temploadreg0\n" - ".word 0x4f82e15a // sdot v26.4s, v10.16b, v2.4b[0]\n" - "ldr temploadreg0, [%[b_ptr0], #0x8]\n" - ".word 0x4f83e15e // sdot v30.4s, v10.16b, v3.4b[0]\n" - "ldr d9, [%[b_ptr0], #0x10]\n" - ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" - "ins v5.d[1], temploadreg1\n" - ".word 0x4f81e177 // sdot v23.4s, v11.16b, v1.4b[0]\n" - "ldr temploadreg1, [%[b_ptr0], #0x18]\n" - ".word 0x4f82e17b // sdot v27.4s, v11.16b, v2.4b[0]\n" - "ldr d10, [%[b_ptr0], #0x20]\n" - ".word 0x4f83e17f // sdot v31.4s, v11.16b, v3.4b[0]\n" - "ins v6.d[1], temploadreg2\n" - ".word 0x4fa0e190 // sdot v16.4s, v12.16b, v0.4b[1]\n" - "ldr temploadreg2, [%[b_ptr0], #0x28]\n" - ".word 0x4fa1e194 // sdot v20.4s, v12.16b, v1.4b[1]\n" - "ldr d11, [%[b_ptr0], #0x30]\n" - ".word 0x4fa2e198 // sdot v24.4s, v12.16b, v2.4b[1]\n" - "ins v7.d[1], temploadreg3\n" - ".word 0x4fa3e19c // sdot v28.4s, v12.16b, v3.4b[1]\n" - "ldr temploadreg3, [%[b_ptr0], #0x38]\n" - ".word 0x4fa0e1b1 // sdot v17.4s, v13.16b, v0.4b[1]\n" - "ldr d12, [%[b_ptr0], #0x40]\n" - ".word 0x4fa1e1b5 // sdot v21.4s, v13.16b, v1.4b[1]\n" - "ins v8.d[1], temploadreg0\n" - ".word 0x4fa2e1b9 // sdot v25.4s, v13.16b, v2.4b[1]\n" - "ldr temploadreg0, [%[b_ptr0], #0x48]\n" - ".word 0x4fa3e1bd // sdot v29.4s, v13.16b, v3.4b[1]\n" - "ldr d13, [%[b_ptr0], #0x50]\n" - ".word 0x4fa0e1d2 // sdot v18.4s, v14.16b, v0.4b[1]\n" - "ins v9.d[1], temploadreg1\n" - ".word 0x4fa1e1d6 // sdot v22.4s, v14.16b, v1.4b[1]\n" - "ldr temploadreg1, [%[b_ptr0], #0x58]\n" - ".word 0x4fa2e1da // sdot v26.4s, v14.16b, v2.4b[1]\n" - "ins v10.d[1], temploadreg2\n" - ".word 0x4fa3e1de // sdot v30.4s, v14.16b, v3.4b[1]\n" - "ldr d14, [%[b_ptr0], #0x60]\n" - ".word 0x4fa0e1f3 // sdot v19.4s, v15.16b, v0.4b[1]\n" - "ldr temploadreg2, [%[b_ptr0], #0x68]\n" - ".word 0x4fa1e1f7 // sdot v23.4s, v15.16b, v1.4b[1]\n" - "ins v11.d[1], temploadreg3\n" - ".word 0x4fa2e1fb // sdot v27.4s, v15.16b, v2.4b[1]\n" - "ldr temploadreg3, [%[b_ptr0], #0x78]\n" - ".word 0x4fa3e1ff // sdot v31.4s, v15.16b, v3.4b[1]\n" - "ldr d15, [%[b_ptr0], #0x70]\n" - ".word 0x4f80e910 // sdot v16.4s, v8.16b, v0.4b[2]\n" - "ins v12.d[1], temploadreg0\n" - ".word 0x4f81e914 // sdot v20.4s, v8.16b, v1.4b[2]\n" - "ins v13.d[1], temploadreg1\n" - ".word 0x4f82e918 // sdot v24.4s, v8.16b, v2.4b[2]\n" - "ins v14.d[1], temploadreg2\n" - ".word 0x4f83e91c // sdot v28.4s, v8.16b, v3.4b[2]\n" - "ins v15.d[1], temploadreg3\n" - ".word 0x4f80e931 // sdot v17.4s, v9.16b, v0.4b[2]\n" - "add %[b_ptr0], %[b_ptr0], #0x100\n" - ".word 0x4f81e935 // sdot v21.4s, v9.16b, v1.4b[2]\n" - "ldr d8, [%[b_ptr0], #-0x80]\n" - ".word 0x4f82e939 // sdot v25.4s, v9.16b, v2.4b[2]\n" - "ldr temploadreg0, [%[b_ptr0], #-0x78]\n" - ".word 0x4f83e93d // sdot v29.4s, v9.16b, v3.4b[2]\n" - "ldr d9, [%[b_ptr0], #-0x70]\n" - ".word 0x4f80e952 // sdot v18.4s, v10.16b, v0.4b[2]\n" - "ldr temploadreg1, [%[b_ptr0], #-0x68]\n" - ".word 0x4f81e956 // sdot v22.4s, v10.16b, v1.4b[2]\n" - "ldr temploadreg2, [%[b_ptr0], #-0x58]\n" - ".word 0x4f82e95a // sdot v26.4s, v10.16b, v2.4b[2]\n" - "ldr temploadreg3, [%[b_ptr0], #-0x48]\n" - ".word 0x4f83e95e // sdot v30.4s, v10.16b, v3.4b[2]\n" - "ldr d10, [%[b_ptr0], #-0x60]\n" - ".word 0x4f80e973 // sdot v19.4s, v11.16b, v0.4b[2]\n" - "ins v8.d[1], temploadreg0\n" - ".word 0x4f81e977 // sdot v23.4s, v11.16b, v1.4b[2]\n" - "ldr temploadreg0, [%[b_ptr0], #-0x38]\n" - ".word 0x4f82e97b // sdot v27.4s, v11.16b, v2.4b[2]\n" - "ins v9.d[1], temploadreg1\n" - ".word 0x4f83e97f // sdot v31.4s, v11.16b, v3.4b[2]\n" - "ldr d11, [%[b_ptr0], #-0x50]\n" - ".word 0x4fa0e990 // sdot v16.4s, v12.16b, v0.4b[3]\n" - "ldr temploadreg1, [%[b_ptr0], #-0x28]\n" - ".word 0x4fa1e994 // sdot v20.4s, v12.16b, v1.4b[3]\n" - "ins v10.d[1], temploadreg2\n" - ".word 0x4fa2e998 // sdot v24.4s, v12.16b, v2.4b[3]\n" - "ldr temploadreg2, [%[b_ptr0], #-0x18]\n" - ".word 0x4fa3e99c // sdot v28.4s, v12.16b, v3.4b[3]\n" - "ldr d12, [%[b_ptr0], #-0x40]\n" - ".word 0x4fa0e9b1 // sdot v17.4s, v13.16b, v0.4b[3]\n" - "ins v11.d[1], temploadreg3\n" - ".word 0x4fa1e9b5 // sdot v21.4s, v13.16b, v1.4b[3]\n" - "ldr temploadreg3, [%[b_ptr0], #-0x8]\n" - ".word 0x4fa2e9b9 // sdot v25.4s, v13.16b, v2.4b[3]\n" - "ins v12.d[1], temploadreg0\n" - ".word 0x4fa3e9bd // sdot v29.4s, v13.16b, v3.4b[3]\n" - "ldr d13, [%[b_ptr0], #-0x30]\n" - ".word 0x4fa0e9d2 // sdot v18.4s, v14.16b, v0.4b[3]\n" - "ldr temploadreg0, [%[b_ptr0], #0x8]\n" - ".word 0x4fa1e9d6 // sdot v22.4s, v14.16b, v1.4b[3]\n" - "add %[a_ptr0], %[a_ptr0], #0x10\n" - ".word 0x4fa2e9da // sdot v26.4s, v14.16b, v2.4b[3]\n" - "ins v13.d[1], temploadreg1\n" - ".word 0x4fa3e9de // sdot v30.4s, v14.16b, v3.4b[3]\n" - "ldr d14, [%[b_ptr0], #-0x20]\n" - ".word 0x4fa0e9f3 // sdot v19.4s, v15.16b, v0.4b[3]\n" - "ldr temploadreg1, [%[b_ptr0], #0x18]\n" - ".word 0x4fa1e9f7 // sdot v23.4s, v15.16b, v1.4b[3]\n" - "add a_ptr1, a_ptr1, #0x10\n" - ".word 0x4fa2e9fb // sdot v27.4s, v15.16b, v2.4b[3]\n" - "ins v14.d[1], temploadreg2\n" - ".word 0x4fa3e9ff // sdot v31.4s, v15.16b, v3.4b[3]\n" - "ldr d15, [%[b_ptr0], #-0x10]\n" - ".word 0x4f84e110 // sdot v16.4s, v8.16b, v4.4b[0]\n" - "ldr temploadreg2, [%[b_ptr0], #0x28]\n" - ".word 0x4f85e114 // sdot v20.4s, v8.16b, v5.4b[0]\n" - "add a_ptr2, a_ptr2, #0x10\n" - ".word 0x4f86e118 // sdot v24.4s, v8.16b, v6.4b[0]\n" - "ins v15.d[1], temploadreg3\n" - ".word 0x4f87e11c // sdot v28.4s, v8.16b, v7.4b[0]\n" - "ldr d8, [%[b_ptr0]]\n" - ".word 0x4f84e131 // sdot v17.4s, v9.16b, v4.4b[0]\n" - "ldr temploadreg3, [%[b_ptr0], #0x38]\n" - ".word 0x4f85e135 // sdot v21.4s, v9.16b, v5.4b[0]\n" - "add a_ptr3, a_ptr3, #0x10\n" - ".word 0x4f86e139 // sdot v25.4s, v9.16b, v6.4b[0]\n" - "ins v8.d[1], temploadreg0\n" - ".word 0x4f87e13d // sdot v29.4s, v9.16b, v7.4b[0]\n" - "ldr d9, [%[b_ptr0], #0x10]\n" - ".word 0x4f84e152 // sdot v18.4s, v10.16b, v4.4b[0]\n" - "ldr temploadreg0, [%[b_ptr0], #0x48]\n" - ".word 0x4f85e156 // sdot v22.4s, v10.16b, v5.4b[0]\n" - ".word 0x4f86e15a // sdot v26.4s, v10.16b, v6.4b[0]\n" - "ins v9.d[1], temploadreg1\n" - ".word 0x4f87e15e // sdot v30.4s, v10.16b, v7.4b[0]\n" - "ldr d10, [%[b_ptr0], #0x20]\n" - ".word 0x4f84e173 // sdot v19.4s, v11.16b, v4.4b[0]\n" - "ldr temploadreg1, [%[b_ptr0], #0x58]\n" - ".word 0x4f85e177 // sdot v23.4s, v11.16b, v5.4b[0]\n" - ".word 0x4f86e17b // sdot v27.4s, v11.16b, v6.4b[0]\n" - "ins v10.d[1], temploadreg2\n" - ".word 0x4f87e17f // sdot v31.4s, v11.16b, v7.4b[0]\n" - "ldr d11, [%[b_ptr0], #0x30]\n" - ".word 0x4fa4e190 // sdot v16.4s, v12.16b, v4.4b[1]\n" - "ldr temploadreg2, [%[b_ptr0], #0x68]\n" - ".word 0x4fa5e194 // sdot v20.4s, v12.16b, v5.4b[1]\n" - ".word 0x4fa6e198 // sdot v24.4s, v12.16b, v6.4b[1]\n" - "ins v11.d[1], temploadreg3\n" - ".word 0x4fa7e19c // sdot v28.4s, v12.16b, v7.4b[1]\n" - "ldr d12, [%[b_ptr0], #0x40]\n" - ".word 0x4fa4e1b1 // sdot v17.4s, v13.16b, v4.4b[1]\n" - "ldr temploadreg3, [%[b_ptr0], #0x78]\n" - ".word 0x4fa5e1b5 // sdot v21.4s, v13.16b, v5.4b[1]\n" - ".word 0x4fa6e1b9 // sdot v25.4s, v13.16b, v6.4b[1]\n" - "ins v12.d[1], temploadreg0\n" - ".word 0x4fa7e1bd // sdot v29.4s, v13.16b, v7.4b[1]\n" - "ldr d13, [%[b_ptr0], #0x50]\n" - ".word 0x4fa4e1d2 // sdot v18.4s, v14.16b, v4.4b[1]\n" - ".word 0x4fa5e1d6 // sdot v22.4s, v14.16b, v5.4b[1]\n" - ".word 0x4fa6e1da // sdot v26.4s, v14.16b, v6.4b[1]\n" - "ins v13.d[1], temploadreg1\n" - ".word 0x4fa7e1de // sdot v30.4s, v14.16b, v7.4b[1]\n" - "ldr d14, [%[b_ptr0], #0x60]\n" - ".word 0x4fa4e1f3 // sdot v19.4s, v15.16b, v4.4b[1]\n" - ".word 0x4fa5e1f7 // sdot v23.4s, v15.16b, v5.4b[1]\n" - ".word 0x4fa6e1fb // sdot v27.4s, v15.16b, v6.4b[1]\n" - "ins v14.d[1], temploadreg2\n" - ".word 0x4fa7e1ff // sdot v31.4s, v15.16b, v7.4b[1]\n" - "ldr d15, [%[b_ptr0], #0x70]\n" - ".word 0x4f84e910 // sdot v16.4s, v8.16b, v4.4b[2]\n" - "add %[b_ptr0], %[b_ptr0], #0x80\n" - ".word 0x4f85e914 // sdot v20.4s, v8.16b, v5.4b[2]\n" - "ins v15.d[1], temploadreg3\n" - ".word 0x4f86e918 // sdot v24.4s, v8.16b, v6.4b[2]\n" - ".word 0x4f87e91c // sdot v28.4s, v8.16b, v7.4b[2]\n" - ".word 0x4f84e931 // sdot v17.4s, v9.16b, v4.4b[2]\n" - ".word 0x4f85e935 // sdot v21.4s, v9.16b, v5.4b[2]\n" - ".word 0x4f86e939 // sdot v25.4s, v9.16b, v6.4b[2]\n" - ".word 0x4f87e93d // sdot v29.4s, v9.16b, v7.4b[2]\n" - ".word 0x4f84e952 // sdot v18.4s, v10.16b, v4.4b[2]\n" - ".word 0x4f85e956 // sdot v22.4s, v10.16b, v5.4b[2]\n" - ".word 0x4f86e95a // sdot v26.4s, v10.16b, v6.4b[2]\n" - ".word 0x4f87e95e // sdot v30.4s, v10.16b, v7.4b[2]\n" - ".word 0x4f84e973 // sdot v19.4s, v11.16b, v4.4b[2]\n" - ".word 0x4f85e977 // sdot v23.4s, v11.16b, v5.4b[2]\n" - ".word 0x4f86e97b // sdot v27.4s, v11.16b, v6.4b[2]\n" - ".word 0x4f87e97f // sdot v31.4s, v11.16b, v7.4b[2]\n" - ".word 0x4fa4e990 // sdot v16.4s, v12.16b, v4.4b[3]\n" - ".word 0x4fa5e994 // sdot v20.4s, v12.16b, v5.4b[3]\n" - ".word 0x4fa6e998 // sdot v24.4s, v12.16b, v6.4b[3]\n" - ".word 0x4fa7e99c // sdot v28.4s, v12.16b, v7.4b[3]\n" - ".word 0x4fa4e9b1 // sdot v17.4s, v13.16b, v4.4b[3]\n" - ".word 0x4fa5e9b5 // sdot v21.4s, v13.16b, v5.4b[3]\n" - ".word 0x4fa6e9b9 // sdot v25.4s, v13.16b, v6.4b[3]\n" - ".word 0x4fa7e9bd // sdot v29.4s, v13.16b, v7.4b[3]\n" - ".word 0x4fa4e9d2 // sdot v18.4s, v14.16b, v4.4b[3]\n" - ".word 0x4fa5e9d6 // sdot v22.4s, v14.16b, v5.4b[3]\n" - ".word 0x4fa6e9da // sdot v26.4s, v14.16b, v6.4b[3]\n" - ".word 0x4fa7e9de // sdot v30.4s, v14.16b, v7.4b[3]\n" - ".word 0x4fa4e9f3 // sdot v19.4s, v15.16b, v4.4b[3]\n" - ".word 0x4fa5e9f7 // sdot v23.4s, v15.16b, v5.4b[3]\n" - ".word 0x4fa6e9fb // sdot v27.4s, v15.16b, v6.4b[3]\n" - ".word 0x4fa7e9ff // sdot v31.4s, v15.16b, v7.4b[3]\n" - "b 5f\n" - "4:\n" - ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" - "ldr temploadreg0, [%[b_ptr0], #0x8]\n" - ".word 0x4f81e114 // sdot v20.4s, v8.16b, v1.4b[0]\n" - "ldr temploadreg1, [%[b_ptr0], #0x18]\n" - ".word 0x4f82e118 // sdot v24.4s, v8.16b, v2.4b[0]\n" - "ldr temploadreg2, [%[b_ptr0], #0x28]\n" - ".word 0x4f83e11c // sdot v28.4s, v8.16b, v3.4b[0]\n" - "ldr d8, [%[b_ptr0]]\n" - ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" - "ldr temploadreg3, [%[b_ptr0], #0x38]\n" - ".word 0x4f81e135 // sdot v21.4s, v9.16b, v1.4b[0]\n" - ".word 0x4f82e139 // sdot v25.4s, v9.16b, v2.4b[0]\n" - "ins v8.d[1], temploadreg0\n" - ".word 0x4f83e13d // sdot v29.4s, v9.16b, v3.4b[0]\n" - "ldr d9, [%[b_ptr0], #0x10]\n" - ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" - "ldr temploadreg0, [%[b_ptr0], #0x48]\n" - ".word 0x4f81e156 // sdot v22.4s, v10.16b, v1.4b[0]\n" - ".word 0x4f82e15a // sdot v26.4s, v10.16b, v2.4b[0]\n" - "ins v9.d[1], temploadreg1\n" - ".word 0x4f83e15e // sdot v30.4s, v10.16b, v3.4b[0]\n" - "ldr d10, [%[b_ptr0], #0x20]\n" - ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" - "ldr temploadreg1, [%[b_ptr0], #0x58]\n" - ".word 0x4f81e177 // sdot v23.4s, v11.16b, v1.4b[0]\n" - ".word 0x4f82e17b // sdot v27.4s, v11.16b, v2.4b[0]\n" - "ins v10.d[1], temploadreg2\n" - ".word 0x4f83e17f // sdot v31.4s, v11.16b, v3.4b[0]\n" - "ldr d11, [%[b_ptr0], #0x30]\n" - ".word 0x4fa0e190 // sdot v16.4s, v12.16b, v0.4b[1]\n" - "ldr temploadreg2, [%[b_ptr0], #0x68]\n" - ".word 0x4fa1e194 // sdot v20.4s, v12.16b, v1.4b[1]\n" - ".word 0x4fa2e198 // sdot v24.4s, v12.16b, v2.4b[1]\n" - "ins v11.d[1], temploadreg3\n" - ".word 0x4fa3e19c // sdot v28.4s, v12.16b, v3.4b[1]\n" - "ldr d12, [%[b_ptr0], #0x40]\n" - ".word 0x4fa0e1b1 // sdot v17.4s, v13.16b, v0.4b[1]\n" - "ldr temploadreg3, [%[b_ptr0], #0x78]\n" - ".word 0x4fa1e1b5 // sdot v21.4s, v13.16b, v1.4b[1]\n" - ".word 0x4fa2e1b9 // sdot v25.4s, v13.16b, v2.4b[1]\n" - "ins v12.d[1], temploadreg0\n" - ".word 0x4fa3e1bd // sdot v29.4s, v13.16b, v3.4b[1]\n" - "ldr d13, [%[b_ptr0], #0x50]\n" - ".word 0x4fa0e1d2 // sdot v18.4s, v14.16b, v0.4b[1]\n" - ".word 0x4fa1e1d6 // sdot v22.4s, v14.16b, v1.4b[1]\n" - ".word 0x4fa2e1da // sdot v26.4s, v14.16b, v2.4b[1]\n" - "ins v13.d[1], temploadreg1\n" - ".word 0x4fa3e1de // sdot v30.4s, v14.16b, v3.4b[1]\n" - "ldr d14, [%[b_ptr0], #0x60]\n" - ".word 0x4fa0e1f3 // sdot v19.4s, v15.16b, v0.4b[1]\n" - ".word 0x4fa1e1f7 // sdot v23.4s, v15.16b, v1.4b[1]\n" - ".word 0x4fa2e1fb // sdot v27.4s, v15.16b, v2.4b[1]\n" - "ins v14.d[1], temploadreg2\n" - ".word 0x4fa3e1ff // sdot v31.4s, v15.16b, v3.4b[1]\n" - "ldr d15, [%[b_ptr0], #0x70]\n" - ".word 0x4f80e910 // sdot v16.4s, v8.16b, v0.4b[2]\n" - "add %[b_ptr0], %[b_ptr0], #0x80\n" - ".word 0x4f81e914 // sdot v20.4s, v8.16b, v1.4b[2]\n" - "ins v15.d[1], temploadreg3\n" - ".word 0x4f82e918 // sdot v24.4s, v8.16b, v2.4b[2]\n" - ".word 0x4f83e91c // sdot v28.4s, v8.16b, v3.4b[2]\n" - ".word 0x4f80e931 // sdot v17.4s, v9.16b, v0.4b[2]\n" - ".word 0x4f81e935 // sdot v21.4s, v9.16b, v1.4b[2]\n" - ".word 0x4f82e939 // sdot v25.4s, v9.16b, v2.4b[2]\n" - ".word 0x4f83e93d // sdot v29.4s, v9.16b, v3.4b[2]\n" - ".word 0x4f80e952 // sdot v18.4s, v10.16b, v0.4b[2]\n" - ".word 0x4f81e956 // sdot v22.4s, v10.16b, v1.4b[2]\n" - ".word 0x4f82e95a // sdot v26.4s, v10.16b, v2.4b[2]\n" - ".word 0x4f83e95e // sdot v30.4s, v10.16b, v3.4b[2]\n" - ".word 0x4f80e973 // sdot v19.4s, v11.16b, v0.4b[2]\n" - ".word 0x4f81e977 // sdot v23.4s, v11.16b, v1.4b[2]\n" - ".word 0x4f82e97b // sdot v27.4s, v11.16b, v2.4b[2]\n" - ".word 0x4f83e97f // sdot v31.4s, v11.16b, v3.4b[2]\n" - ".word 0x4fa0e990 // sdot v16.4s, v12.16b, v0.4b[3]\n" - ".word 0x4fa1e994 // sdot v20.4s, v12.16b, v1.4b[3]\n" - ".word 0x4fa2e998 // sdot v24.4s, v12.16b, v2.4b[3]\n" - ".word 0x4fa3e99c // sdot v28.4s, v12.16b, v3.4b[3]\n" - ".word 0x4fa0e9b1 // sdot v17.4s, v13.16b, v0.4b[3]\n" - ".word 0x4fa1e9b5 // sdot v21.4s, v13.16b, v1.4b[3]\n" - ".word 0x4fa2e9b9 // sdot v25.4s, v13.16b, v2.4b[3]\n" - ".word 0x4fa3e9bd // sdot v29.4s, v13.16b, v3.4b[3]\n" - ".word 0x4fa0e9d2 // sdot v18.4s, v14.16b, v0.4b[3]\n" - ".word 0x4fa1e9d6 // sdot v22.4s, v14.16b, v1.4b[3]\n" - ".word 0x4fa2e9da // sdot v26.4s, v14.16b, v2.4b[3]\n" - ".word 0x4fa3e9de // sdot v30.4s, v14.16b, v3.4b[3]\n" - ".word 0x4fa0e9f3 // sdot v19.4s, v15.16b, v0.4b[3]\n" - ".word 0x4fa1e9f7 // sdot v23.4s, v15.16b, v1.4b[3]\n" - ".word 0x4fa2e9fb // sdot v27.4s, v15.16b, v2.4b[3]\n" - ".word 0x4fa3e9ff // sdot v31.4s, v15.16b, v3.4b[3]\n" - "5:\n" - "cbz %[blocks], 6f\n" - "7:\n" - "ldr q8, [%[b_ptr0]]\n" - "subs %[blocks], %[blocks], #0x1\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - "ldr s0, [%[a_ptr0]]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - "add %[a_ptr0], %[a_ptr0], #0x4\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - "add %[b_ptr0], %[b_ptr0], #0x40\n" - ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" - "ldr s1, [a_ptr1]\n" - ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" - "add a_ptr1, a_ptr1, #0x4\n" - ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" - "ldr s2, [a_ptr2]\n" - ".word 0x4f81e114 // sdot v20.4s, v8.16b, v1.4b[0]\n" - "add a_ptr2, a_ptr2, #0x4\n" - ".word 0x4f81e135 // sdot v21.4s, v9.16b, v1.4b[0]\n" - "ldr s3, [a_ptr3]\n" - ".word 0x4f82e118 // sdot v24.4s, v8.16b, v2.4b[0]\n" - "add a_ptr3, a_ptr3, #0x4\n" - ".word 0x4f82e139 // sdot v25.4s, v9.16b, v2.4b[0]\n" - ".word 0x4f83e11c // sdot v28.4s, v8.16b, v3.4b[0]\n" - ".word 0x4f83e13d // sdot v29.4s, v9.16b, v3.4b[0]\n" - ".word 0x4f81e156 // sdot v22.4s, v10.16b, v1.4b[0]\n" - ".word 0x4f82e15a // sdot v26.4s, v10.16b, v2.4b[0]\n" - ".word 0x4f83e15e // sdot v30.4s, v10.16b, v3.4b[0]\n" - ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" - ".word 0x4f81e177 // sdot v23.4s, v11.16b, v1.4b[0]\n" - ".word 0x4f82e17b // sdot v27.4s, v11.16b, v2.4b[0]\n" - ".word 0x4f83e17f // sdot v31.4s, v11.16b, v3.4b[0]\n" - "b.ne 7b\n" - "6:\n" - "cbz %[odds], 8f\n" - "ld1 {v0.b}[0], [%[a_ptr0]], #1\n" - "ld1 {v1.b}[0], [a_ptr1], #1\n" - "ld1 {v2.b}[0], [a_ptr2], #1\n" - "ld1 {v3.b}[0], [a_ptr3], #1\n" - "subs %[odds], %[odds], #0x1\n" - "b.eq 9f\n" - "ld1 {v0.b}[1], [%[a_ptr0]], #1\n" - "ld1 {v1.b}[1], [a_ptr1], #1\n" - "ld1 {v2.b}[1], [a_ptr2], #1\n" - "ld1 {v3.b}[1], [a_ptr3], #1\n" - "subs %[odds], %[odds], #0x1\n" - "b.eq 9f\n" - "ld1 {v0.b}[2], [%[a_ptr0]]\n" - "ld1 {v1.b}[2], [a_ptr1]\n" - "ld1 {v2.b}[2], [a_ptr2]\n" - "ld1 {v3.b}[2], [a_ptr3]\n" - "9:\n" - "ldr q8, [%[b_ptr0]]\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" - ".word 0x4f81e114 // sdot v20.4s, v8.16b, v1.4b[0]\n" - ".word 0x4f82e118 // sdot v24.4s, v8.16b, v2.4b[0]\n" - ".word 0x4f83e11c // sdot v28.4s, v8.16b, v3.4b[0]\n" - ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" - ".word 0x4f81e135 // sdot v21.4s, v9.16b, v1.4b[0]\n" - ".word 0x4f82e139 // sdot v25.4s, v9.16b, v2.4b[0]\n" - ".word 0x4f83e13d // sdot v29.4s, v9.16b, v3.4b[0]\n" - ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" - ".word 0x4f81e156 // sdot v22.4s, v10.16b, v1.4b[0]\n" - ".word 0x4f82e15a // sdot v26.4s, v10.16b, v2.4b[0]\n" - ".word 0x4f83e15e // sdot v30.4s, v10.16b, v3.4b[0]\n" - ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" - ".word 0x4f81e177 // sdot v23.4s, v11.16b, v1.4b[0]\n" - ".word 0x4f82e17b // sdot v27.4s, v11.16b, v2.4b[0]\n" - ".word 0x4f83e17f // sdot v31.4s, v11.16b, v3.4b[0]\n" - "8:\n" - "str q16, [%[c_ptr0]]\n" - "str q17, [%[c_ptr0], #0x10]\n" - "str q18, [%[c_ptr0], #0x20]\n" - "str q19, [%[c_ptr0], #0x30]\n" - "add %[c_ptr0], %[c_ptr0], #0x40\n" - "str q20, [c_ptr1]\n" - "str q21, [c_ptr1, #0x10]\n" - "str q22, [c_ptr1, #0x20]\n" - "str q23, [c_ptr1, #0x30]\n" - "str q24, [c_ptr2]\n" - "str q25, [c_ptr2, #0x10]\n" - "str q26, [c_ptr2, #0x20]\n" - "str q27, [c_ptr2, #0x30]\n" - "str q28, [c_ptr3]\n" - "str q29, [c_ptr3, #0x10]\n" - "str q30, [c_ptr3, #0x20]\n" - "str q31, [c_ptr3, #0x30]\n" - ".unreq a_ptr1\n" - ".unreq a_ptr2\n" - ".unreq a_ptr3\n" - ".unreq c_ptr1\n" - ".unreq c_ptr2\n" - ".unreq c_ptr3\n" - ".unreq temploadreg0\n" - ".unreq temploadreg1\n" - ".unreq temploadreg2\n" - ".unreq temploadreg3\n" - : [a_ptr0] "+r" (a_ptr0), [b_ptr0] "+r" (b_ptr0), [c_ptr0] "+r" (c_ptr0), [loops] "+r" (loops), [regs] "+r" (regs), [blocks] "+r" (blocks), [odds] "+r" (odds) - : [betaptr] "r" (betaptr), [width] "r" (width), [beta0] "r" (beta0), [lda] "r" (ldab), [ldc] "r" (ldcb) - : "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x0", "x1", "x2", "x3", "x4", "x5", "x6", "x7", "x8", "x9", "cc", "memory" + "a_ptr1 .req X0\n" + "a_ptr2 .req X1\n" + "a_ptr3 .req X2\n" + "c_ptr1 .req X3\n" + "c_ptr2 .req X4\n" + "c_ptr3 .req X5\n" + "temploadreg0 .req X6\n" + "temploadreg1 .req X7\n" + "temploadreg2 .req X8\n" + "temploadreg3 .req X9\n" + "add a_ptr1, %[a_ptr0], %[lda]\n" + "add c_ptr1, %[c_ptr0], %[ldc]\n" + "add a_ptr2, a_ptr1, %[lda]\n" + "add c_ptr2, c_ptr1, %[ldc]\n" + "add a_ptr3, a_ptr2, %[lda]\n" + "add c_ptr3, c_ptr2, %[ldc]\n" + "cbz %[beta0], 1f\n" + "movi v16.4s, #0\n" + "ldr q0, [%[a_ptr0]]\n" + "movi v17.4s, #0\n" + "ldr q1, [a_ptr1]\n" + "movi v18.4s, #0\n" + "ldr q2, [a_ptr2]\n" + "movi v19.4s, #0\n" + "ldr q3, [a_ptr3]\n" + "movi v20.4s, #0\n" + "ldr q8, [%[b_ptr0]]\n" + "movi v21.4s, #0\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + "movi v22.4s, #0\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + "movi v23.4s, #0\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + "movi v24.4s, #0\n" + "ldr q12, [%[b_ptr0], #0x40]\n" + "movi v25.4s, #0\n" + "ldr q13, [%[b_ptr0], #0x50]\n" + "movi v26.4s, #0\n" + "ldr d14, [%[b_ptr0], #0x60]\n" + "movi v27.4s, #0\n" + "ldr temploadreg2, [%[b_ptr0], #0x68]\n" + "movi v28.4s, #0\n" + "add %[a_ptr0], %[a_ptr0], #0x10\n" + "movi v29.4s, #0\n" + "ins v14.d[1], temploadreg2\n" + "movi v30.4s, #0\n" + "add a_ptr1, a_ptr1, #0x10\n" + "movi v31.4s, #0\n" + "add a_ptr2, a_ptr2, #0x10\n" + "add a_ptr3, a_ptr3, #0x10\n" + "add %[b_ptr0], %[b_ptr0], #0x80\n" + "cbz %[loops], 2f\n" + "b 3f\n" + "1:\n" + "ld1r {v15.4s}, [%[betaptr]]\n" + "ldr q16, [%[c_ptr0]]\n" + "ldr q17, [%[c_ptr0], #0x10]\n" + "ldr q18, [%[c_ptr0], #0x20]\n" + "ldr q19, [%[c_ptr0], #0x30]\n" + "mul v16.4s, v16.4s, v15.4s\n" + "ldr q20, [c_ptr1]\n" + "mul v17.4s, v17.4s, v15.4s\n" + "ldr q21, [c_ptr1, #0x10]\n" + "mul v18.4s, v18.4s, v15.4s\n" + "ldr q22, [c_ptr1, #0x20]\n" + "mul v19.4s, v19.4s, v15.4s\n" + "ldr q23, [c_ptr1, #0x30]\n" + "mul v20.4s, v20.4s, v15.4s\n" + "ldr q24, [c_ptr2]\n" + "mul v21.4s, v21.4s, v15.4s\n" + "ldr q25, [c_ptr2, #0x10]\n" + "mul v22.4s, v22.4s, v15.4s\n" + "ldr q26, [c_ptr2, #0x20]\n" + "mul v23.4s, v23.4s, v15.4s\n" + "ldr q27, [c_ptr2, #0x30]\n" + "mul v24.4s, v24.4s, v15.4s\n" + "ldr q28, [c_ptr3]\n" + "mul v25.4s, v25.4s, v15.4s\n" + "ldr q29, [c_ptr3, #0x10]\n" + "mul v26.4s, v26.4s, v15.4s\n" + "ldr q30, [c_ptr3, #0x20]\n" + "mul v27.4s, v27.4s, v15.4s\n" + "ldr q31, [c_ptr3, #0x30]\n" + "mul v28.4s, v28.4s, v15.4s\n" + "ldr q0, [%[a_ptr0]]\n" + "mul v29.4s, v29.4s, v15.4s\n" + "ldr q1, [a_ptr1]\n" + "mul v30.4s, v30.4s, v15.4s\n" + "ldr q2, [a_ptr2]\n" + "mul v31.4s, v31.4s, v15.4s\n" + "ldr q3, [a_ptr3]\n" + "ldr q8, [%[b_ptr0]]\n" + "add %[a_ptr0], %[a_ptr0], #0x10\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + "add a_ptr1, a_ptr1, #0x10\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + "add a_ptr2, a_ptr2, #0x10\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + "add a_ptr3, a_ptr3, #0x10\n" + "ldr q12, [%[b_ptr0], #0x40]\n" + "ldr q13, [%[b_ptr0], #0x50]\n" + "ldr d14, [%[b_ptr0], #0x60]\n" + "ldr temploadreg2, [%[b_ptr0], #0x68]\n" + "add %[b_ptr0], %[b_ptr0], #0x80\n" + "ins v14.d[1], temploadreg2\n" + "cbz %[loops], 2f\n" + "3:\n" + ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" + "ldr d15, [%[b_ptr0], #-0x10]\n" + ".word 0x4f81e114 // sdot v20.4s, v8.16b, v1.4b[0]\n" + "ldr temploadreg3, [%[b_ptr0], #-0x8]\n" + ".word 0x4f82e118 // sdot v24.4s, v8.16b, v2.4b[0]\n" + "ldr d4, [%[a_ptr0]]\n" + ".word 0x4f83e11c // sdot v28.4s, v8.16b, v3.4b[0]\n" + "ldr temploadreg0, [%[a_ptr0], #0x8]\n" + ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" + "ldr d5, [a_ptr1]\n" + ".word 0x4f81e135 // sdot v21.4s, v9.16b, v1.4b[0]\n" + "ldr temploadreg1, [a_ptr1, #0x8]\n" + ".word 0x4f82e139 // sdot v25.4s, v9.16b, v2.4b[0]\n" + "ldr d6, [a_ptr2]\n" + ".word 0x4f83e13d // sdot v29.4s, v9.16b, v3.4b[0]\n" + "ldr temploadreg2, [a_ptr2, #0x8]\n" + ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" + "ldr d7, [a_ptr3]\n" + ".word 0x4f81e156 // sdot v22.4s, v10.16b, v1.4b[0]\n" + "ins v15.d[1], temploadreg3\n" + ".word 0x4f82e15a // sdot v26.4s, v10.16b, v2.4b[0]\n" + "ldr temploadreg3, [a_ptr3, #0x8]\n" + ".word 0x4f83e15e // sdot v30.4s, v10.16b, v3.4b[0]\n" + "ldr d8, [%[b_ptr0]]\n" + ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" + "ins v4.d[1], temploadreg0\n" + ".word 0x4f81e177 // sdot v23.4s, v11.16b, v1.4b[0]\n" + "ldr temploadreg0, [%[b_ptr0], #0x8]\n" + ".word 0x4f82e17b // sdot v27.4s, v11.16b, v2.4b[0]\n" + "ldr d9, [%[b_ptr0], #0x10]\n" + ".word 0x4f83e17f // sdot v31.4s, v11.16b, v3.4b[0]\n" + "ins v5.d[1], temploadreg1\n" + ".word 0x4fa0e190 // sdot v16.4s, v12.16b, v0.4b[1]\n" + "ldr temploadreg1, [%[b_ptr0], #0x18]\n" + ".word 0x4fa1e194 // sdot v20.4s, v12.16b, v1.4b[1]\n" + "ldr d10, [%[b_ptr0], #0x20]\n" + ".word 0x4fa2e198 // sdot v24.4s, v12.16b, v2.4b[1]\n" + "ins v6.d[1], temploadreg2\n" + ".word 0x4fa3e19c // sdot v28.4s, v12.16b, v3.4b[1]\n" + "ldr temploadreg2, [%[b_ptr0], #0x28]\n" + ".word 0x4fa0e1b1 // sdot v17.4s, v13.16b, v0.4b[1]\n" + "ldr d11, [%[b_ptr0], #0x30]\n" + ".word 0x4fa1e1b5 // sdot v21.4s, v13.16b, v1.4b[1]\n" + "ins v7.d[1], temploadreg3\n" + ".word 0x4fa2e1b9 // sdot v25.4s, v13.16b, v2.4b[1]\n" + "ldr temploadreg3, [%[b_ptr0], #0x38]\n" + ".word 0x4fa3e1bd // sdot v29.4s, v13.16b, v3.4b[1]\n" + "ldr d12, [%[b_ptr0], #0x40]\n" + ".word 0x4fa0e1d2 // sdot v18.4s, v14.16b, v0.4b[1]\n" + "ins v8.d[1], temploadreg0\n" + ".word 0x4fa1e1d6 // sdot v22.4s, v14.16b, v1.4b[1]\n" + "ldr temploadreg0, [%[b_ptr0], #0x48]\n" + ".word 0x4fa2e1da // sdot v26.4s, v14.16b, v2.4b[1]\n" + "ldr d13, [%[b_ptr0], #0x50]\n" + ".word 0x4fa3e1de // sdot v30.4s, v14.16b, v3.4b[1]\n" + "ins v9.d[1], temploadreg1\n" + ".word 0x4fa0e1f3 // sdot v19.4s, v15.16b, v0.4b[1]\n" + "ldr temploadreg1, [%[b_ptr0], #0x58]\n" + ".word 0x4fa1e1f7 // sdot v23.4s, v15.16b, v1.4b[1]\n" + "ldr d14, [%[b_ptr0], #0x60]\n" + ".word 0x4fa2e1fb // sdot v27.4s, v15.16b, v2.4b[1]\n" + "ins v10.d[1], temploadreg2\n" + ".word 0x4fa3e1ff // sdot v31.4s, v15.16b, v3.4b[1]\n" + "ldr temploadreg2, [%[b_ptr0], #0x68]\n" + ".word 0x4f80e910 // sdot v16.4s, v8.16b, v0.4b[2]\n" + "ldr d15, [%[b_ptr0], #0x70]\n" + ".word 0x4f81e914 // sdot v20.4s, v8.16b, v1.4b[2]\n" + "ins v11.d[1], temploadreg3\n" + ".word 0x4f82e918 // sdot v24.4s, v8.16b, v2.4b[2]\n" + "ldr temploadreg3, [%[b_ptr0], #0x78]\n" + ".word 0x4f83e91c // sdot v28.4s, v8.16b, v3.4b[2]\n" + "ins v12.d[1], temploadreg0\n" + ".word 0x4f80e931 // sdot v17.4s, v9.16b, v0.4b[2]\n" + "ins v13.d[1], temploadreg1\n" + ".word 0x4f81e935 // sdot v21.4s, v9.16b, v1.4b[2]\n" + "ins v14.d[1], temploadreg2\n" + ".word 0x4f82e939 // sdot v25.4s, v9.16b, v2.4b[2]\n" + "ins v15.d[1], temploadreg3\n" + ".word 0x4f83e93d // sdot v29.4s, v9.16b, v3.4b[2]\n" + "subs %[loops], %[loops], #0x1\n" + ".word 0x4f80e952 // sdot v18.4s, v10.16b, v0.4b[2]\n" + "prfm PLDL1KEEP, [%[a_ptr0], #0x40]\n" + ".word 0x4f81e956 // sdot v22.4s, v10.16b, v1.4b[2]\n" + "add %[b_ptr0], %[b_ptr0], #0x100\n" + ".word 0x4f82e95a // sdot v26.4s, v10.16b, v2.4b[2]\n" + "ldr d8, [%[b_ptr0], #-0x80]\n" + ".word 0x4f83e95e // sdot v30.4s, v10.16b, v3.4b[2]\n" + "ldr temploadreg0, [%[b_ptr0], #-0x78]\n" + ".word 0x4f80e973 // sdot v19.4s, v11.16b, v0.4b[2]\n" + "ldr d9, [%[b_ptr0], #-0x70]\n" + ".word 0x4f81e977 // sdot v23.4s, v11.16b, v1.4b[2]\n" + "ldr temploadreg1, [%[b_ptr0], #-0x68]\n" + ".word 0x4f82e97b // sdot v27.4s, v11.16b, v2.4b[2]\n" + "ldr d10, [%[b_ptr0], #-0x60]\n" + ".word 0x4f83e97f // sdot v31.4s, v11.16b, v3.4b[2]\n" + "ldr temploadreg2, [%[b_ptr0], #-0x58]\n" + ".word 0x4fa0e990 // sdot v16.4s, v12.16b, v0.4b[3]\n" + "ldr d11, [%[b_ptr0], #-0x50]\n" + ".word 0x4fa1e994 // sdot v20.4s, v12.16b, v1.4b[3]\n" + "ldr temploadreg3, [%[b_ptr0], #-0x48]\n" + ".word 0x4fa2e998 // sdot v24.4s, v12.16b, v2.4b[3]\n" + "ins v8.d[1], temploadreg0\n" + ".word 0x4fa3e99c // sdot v28.4s, v12.16b, v3.4b[3]\n" + "ldr d12, [%[b_ptr0], #-0x40]\n" + ".word 0x4fa0e9b1 // sdot v17.4s, v13.16b, v0.4b[3]\n" + "ldr temploadreg0, [%[b_ptr0], #-0x38]\n" + ".word 0x4fa1e9b5 // sdot v21.4s, v13.16b, v1.4b[3]\n" + "ins v9.d[1], temploadreg1\n" + ".word 0x4fa2e9b9 // sdot v25.4s, v13.16b, v2.4b[3]\n" + "ldr temploadreg1, [%[b_ptr0], #-0x28]\n" + ".word 0x4fa3e9bd // sdot v29.4s, v13.16b, v3.4b[3]\n" + "ldr d13, [%[b_ptr0], #-0x30]\n" + ".word 0x4fa0e9d2 // sdot v18.4s, v14.16b, v0.4b[3]\n" + "ins v10.d[1], temploadreg2\n" + ".word 0x4fa1e9d6 // sdot v22.4s, v14.16b, v1.4b[3]\n" + "ldr temploadreg2, [%[b_ptr0], #-0x18]\n" + ".word 0x4fa2e9da // sdot v26.4s, v14.16b, v2.4b[3]\n" + "ins v11.d[1], temploadreg3\n" + ".word 0x4fa3e9de // sdot v30.4s, v14.16b, v3.4b[3]\n" + "ldr d14, [%[b_ptr0], #-0x20]\n" + ".word 0x4fa0e9f3 // sdot v19.4s, v15.16b, v0.4b[3]\n" + "ldr temploadreg3, [%[b_ptr0], #-0x8]\n" + ".word 0x4fa1e9f7 // sdot v23.4s, v15.16b, v1.4b[3]\n" + "ins v12.d[1], temploadreg0\n" + ".word 0x4fa2e9fb // sdot v27.4s, v15.16b, v2.4b[3]\n" + "ins v13.d[1], temploadreg1\n" + ".word 0x4fa3e9ff // sdot v31.4s, v15.16b, v3.4b[3]\n" + "ldr d15, [%[b_ptr0], #-0x10]\n" + ".word 0x4f84e110 // sdot v16.4s, v8.16b, v4.4b[0]\n" + "ins v14.d[1], temploadreg2\n" + ".word 0x4f85e114 // sdot v20.4s, v8.16b, v5.4b[0]\n" + "add %[a_ptr0], %[a_ptr0], #0x20\n" + ".word 0x4f86e118 // sdot v24.4s, v8.16b, v6.4b[0]\n" + "ldr d0, [%[a_ptr0], #-0x10]\n" + ".word 0x4f87e11c // sdot v28.4s, v8.16b, v7.4b[0]\n" + "ldr temploadreg0, [%[a_ptr0], #-0x8]\n" + ".word 0x4f84e131 // sdot v17.4s, v9.16b, v4.4b[0]\n" + "ins v15.d[1], temploadreg3\n" + ".word 0x4f85e135 // sdot v21.4s, v9.16b, v5.4b[0]\n" + "ldr d8, [%[b_ptr0]]\n" + ".word 0x4f86e139 // sdot v25.4s, v9.16b, v6.4b[0]\n" + "ins v0.d[1], temploadreg0\n" + ".word 0x4f87e13d // sdot v29.4s, v9.16b, v7.4b[0]\n" + "ldr temploadreg0, [%[b_ptr0], #0x8]\n" + ".word 0x4f84e152 // sdot v18.4s, v10.16b, v4.4b[0]\n" + "ldr d9, [%[b_ptr0], #0x10]\n" + ".word 0x4f85e156 // sdot v22.4s, v10.16b, v5.4b[0]\n" + "add a_ptr1, a_ptr1, #0x20\n" + ".word 0x4f86e15a // sdot v26.4s, v10.16b, v6.4b[0]\n" + "ldr d1, [a_ptr1, #-0x10]\n" + ".word 0x4f87e15e // sdot v30.4s, v10.16b, v7.4b[0]\n" + "ldr temploadreg1, [a_ptr1, #-0x8]\n" + ".word 0x4f84e173 // sdot v19.4s, v11.16b, v4.4b[0]\n" + "ldr d10, [%[b_ptr0], #0x20]\n" + ".word 0x4f85e177 // sdot v23.4s, v11.16b, v5.4b[0]\n" + "ins v8.d[1], temploadreg0\n" + ".word 0x4f86e17b // sdot v27.4s, v11.16b, v6.4b[0]\n" + "ins v1.d[1], temploadreg1\n" + ".word 0x4f87e17f // sdot v31.4s, v11.16b, v7.4b[0]\n" + "ldr temploadreg1, [%[b_ptr0], #0x18]\n" + ".word 0x4fa4e190 // sdot v16.4s, v12.16b, v4.4b[1]\n" + "ldr d11, [%[b_ptr0], #0x30]\n" + ".word 0x4fa5e194 // sdot v20.4s, v12.16b, v5.4b[1]\n" + "ldr temploadreg0, [%[b_ptr0], #0x48]\n" + ".word 0x4fa6e198 // sdot v24.4s, v12.16b, v6.4b[1]\n" + "ins v9.d[1], temploadreg1\n" + ".word 0x4fa7e19c // sdot v28.4s, v12.16b, v7.4b[1]\n" + "ldr d12, [%[b_ptr0], #0x40]\n" + ".word 0x4fa4e1b1 // sdot v17.4s, v13.16b, v4.4b[1]\n" + "ldr temploadreg1, [%[b_ptr0], #0x58]\n" + ".word 0x4fa5e1b5 // sdot v21.4s, v13.16b, v5.4b[1]\n" + "add a_ptr2, a_ptr2, #0x20\n" + ".word 0x4fa6e1b9 // sdot v25.4s, v13.16b, v6.4b[1]\n" + "ldr d2, [a_ptr2, #-0x10]\n" + ".word 0x4fa7e1bd // sdot v29.4s, v13.16b, v7.4b[1]\n" + "ldr temploadreg2, [a_ptr2, #-0x8]\n" + ".word 0x4fa4e1d2 // sdot v18.4s, v14.16b, v4.4b[1]\n" + "ldr d13, [%[b_ptr0], #0x50]\n" + ".word 0x4fa5e1d6 // sdot v22.4s, v14.16b, v5.4b[1]\n" + "ins v12.d[1], temploadreg0\n" + ".word 0x4fa6e1da // sdot v26.4s, v14.16b, v6.4b[1]\n" + "ins v2.d[1], temploadreg2\n" + ".word 0x4fa7e1de // sdot v30.4s, v14.16b, v7.4b[1]\n" + "ldr temploadreg2, [%[b_ptr0], #0x28]\n" + ".word 0x4fa4e1f3 // sdot v19.4s, v15.16b, v4.4b[1]\n" + "ldr d14, [%[b_ptr0], #0x60]\n" + ".word 0x4fa5e1f7 // sdot v23.4s, v15.16b, v5.4b[1]\n" + "ins v13.d[1], temploadreg1\n" + ".word 0x4fa6e1fb // sdot v27.4s, v15.16b, v6.4b[1]\n" + "ins v10.d[1], temploadreg2\n" + ".word 0x4fa7e1ff // sdot v31.4s, v15.16b, v7.4b[1]\n" + "ldr temploadreg2, [%[b_ptr0], #0x68]\n" + ".word 0x4f84e910 // sdot v16.4s, v8.16b, v4.4b[2]\n" + "ldr d15, [%[b_ptr0], #0x70]\n" + ".word 0x4f85e914 // sdot v20.4s, v8.16b, v5.4b[2]\n" + "add a_ptr3, a_ptr3, #0x20\n" + ".word 0x4f86e918 // sdot v24.4s, v8.16b, v6.4b[2]\n" + "ldr d3, [a_ptr3, #-0x10]\n" + ".word 0x4f87e91c // sdot v28.4s, v8.16b, v7.4b[2]\n" + "ldr temploadreg3, [a_ptr3, #-0x8]\n" + ".word 0x4f84e931 // sdot v17.4s, v9.16b, v4.4b[2]\n" + "ins v14.d[1], temploadreg2\n" + ".word 0x4f85e935 // sdot v21.4s, v9.16b, v5.4b[2]\n" + "prfm PLDL1KEEP, [a_ptr1, #0x40]\n" + ".word 0x4f86e939 // sdot v25.4s, v9.16b, v6.4b[2]\n" + "ins v3.d[1], temploadreg3\n" + ".word 0x4f87e93d // sdot v29.4s, v9.16b, v7.4b[2]\n" + "ldr temploadreg3, [%[b_ptr0], #0x38]\n" + ".word 0x4f84e952 // sdot v18.4s, v10.16b, v4.4b[2]\n" + "prfm PLDL1KEEP, [a_ptr2, #0x40]\n" + ".word 0x4f85e956 // sdot v22.4s, v10.16b, v5.4b[2]\n" + "ins v11.d[1], temploadreg3\n" + ".word 0x4f86e95a // sdot v26.4s, v10.16b, v6.4b[2]\n" + "ldr temploadreg3, [%[b_ptr0], #0x78]\n" + ".word 0x4f87e95e // sdot v30.4s, v10.16b, v7.4b[2]\n" + "add %[b_ptr0], %[b_ptr0], #0x100\n" + ".word 0x4f84e973 // sdot v19.4s, v11.16b, v4.4b[2]\n" + "ldr d8, [%[b_ptr0], #-0x80]\n" + ".word 0x4f85e977 // sdot v23.4s, v11.16b, v5.4b[2]\n" + "ldr temploadreg0, [%[b_ptr0], #-0x78]\n" + ".word 0x4f86e97b // sdot v27.4s, v11.16b, v6.4b[2]\n" + "ldr d9, [%[b_ptr0], #-0x70]\n" + ".word 0x4f87e97f // sdot v31.4s, v11.16b, v7.4b[2]\n" + "ldr temploadreg1, [%[b_ptr0], #-0x68]\n" + ".word 0x4fa4e990 // sdot v16.4s, v12.16b, v4.4b[3]\n" + "ldr d10, [%[b_ptr0], #-0x60]\n" + ".word 0x4fa5e994 // sdot v20.4s, v12.16b, v5.4b[3]\n" + "ldr temploadreg2, [%[b_ptr0], #-0x58]\n" + ".word 0x4fa6e998 // sdot v24.4s, v12.16b, v6.4b[3]\n" + "ldr d11, [%[b_ptr0], #-0x50]\n" + ".word 0x4fa7e99c // sdot v28.4s, v12.16b, v7.4b[3]\n" + "ins v15.d[1], temploadreg3\n" + ".word 0x4fa4e9b1 // sdot v17.4s, v13.16b, v4.4b[3]\n" + "ldr temploadreg3, [%[b_ptr0], #-0x48]\n" + ".word 0x4fa5e9b5 // sdot v21.4s, v13.16b, v5.4b[3]\n" + "ldr d12, [%[b_ptr0], #-0x40]\n" + ".word 0x4fa6e9b9 // sdot v25.4s, v13.16b, v6.4b[3]\n" + "ins v8.d[1], temploadreg0\n" + ".word 0x4fa7e9bd // sdot v29.4s, v13.16b, v7.4b[3]\n" + "ldr temploadreg0, [%[b_ptr0], #-0x38]\n" + ".word 0x4fa4e9d2 // sdot v18.4s, v14.16b, v4.4b[3]\n" + "ldr d13, [%[b_ptr0], #-0x30]\n" + ".word 0x4fa5e9d6 // sdot v22.4s, v14.16b, v5.4b[3]\n" + "ins v9.d[1], temploadreg1\n" + ".word 0x4fa6e9da // sdot v26.4s, v14.16b, v6.4b[3]\n" + "ldr temploadreg1, [%[b_ptr0], #-0x28]\n" + ".word 0x4fa7e9de // sdot v30.4s, v14.16b, v7.4b[3]\n" + "ldr d14, [%[b_ptr0], #-0x20]\n" + ".word 0x4fa4e9f3 // sdot v19.4s, v15.16b, v4.4b[3]\n" + "ins v10.d[1], temploadreg2\n" + ".word 0x4fa5e9f7 // sdot v23.4s, v15.16b, v5.4b[3]\n" + "ldr temploadreg2, [%[b_ptr0], #-0x18]\n" + ".word 0x4fa6e9fb // sdot v27.4s, v15.16b, v6.4b[3]\n" + "ins v11.d[1], temploadreg3\n" + ".word 0x4fa7e9ff // sdot v31.4s, v15.16b, v7.4b[3]\n" + "ins v12.d[1], temploadreg0\n" + "ins v13.d[1], temploadreg1\n" + "prfm PLDL1KEEP, [a_ptr3, #0x40]\n" + "ins v14.d[1], temploadreg2\n" + "b.ne 3b\n" + "2:\n" + "ldr d15, [%[b_ptr0], #-0x10]\n" + "prfm PSTL1KEEP, [%[c_ptr0]]\n" + "ldr temploadreg3, [%[b_ptr0], #-0x8]\n" + "prfm PSTL1KEEP, [c_ptr1]\n" + "prfm PSTL1KEEP, [c_ptr2]\n" + "prfm PSTL1KEEP, [c_ptr3]\n" + "ins v15.d[1], temploadreg3\n" + "cbz %[regs], 4f\n" + ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" + "ldr d4, [%[a_ptr0]]\n" + ".word 0x4f81e114 // sdot v20.4s, v8.16b, v1.4b[0]\n" + "ldr temploadreg0, [%[a_ptr0], #0x8]\n" + ".word 0x4f82e118 // sdot v24.4s, v8.16b, v2.4b[0]\n" + "ldr d5, [a_ptr1]\n" + ".word 0x4f83e11c // sdot v28.4s, v8.16b, v3.4b[0]\n" + "ldr temploadreg1, [a_ptr1, #0x8]\n" + ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" + "ldr d6, [a_ptr2]\n" + ".word 0x4f81e135 // sdot v21.4s, v9.16b, v1.4b[0]\n" + "ldr temploadreg2, [a_ptr2, #0x8]\n" + ".word 0x4f82e139 // sdot v25.4s, v9.16b, v2.4b[0]\n" + "ldr d7, [a_ptr3]\n" + ".word 0x4f83e13d // sdot v29.4s, v9.16b, v3.4b[0]\n" + "ldr temploadreg3, [a_ptr3, #0x8]\n" + ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" + "ldr d8, [%[b_ptr0]]\n" + ".word 0x4f81e156 // sdot v22.4s, v10.16b, v1.4b[0]\n" + "ins v4.d[1], temploadreg0\n" + ".word 0x4f82e15a // sdot v26.4s, v10.16b, v2.4b[0]\n" + "ldr temploadreg0, [%[b_ptr0], #0x8]\n" + ".word 0x4f83e15e // sdot v30.4s, v10.16b, v3.4b[0]\n" + "ldr d9, [%[b_ptr0], #0x10]\n" + ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" + "ins v5.d[1], temploadreg1\n" + ".word 0x4f81e177 // sdot v23.4s, v11.16b, v1.4b[0]\n" + "ldr temploadreg1, [%[b_ptr0], #0x18]\n" + ".word 0x4f82e17b // sdot v27.4s, v11.16b, v2.4b[0]\n" + "ldr d10, [%[b_ptr0], #0x20]\n" + ".word 0x4f83e17f // sdot v31.4s, v11.16b, v3.4b[0]\n" + "ins v6.d[1], temploadreg2\n" + ".word 0x4fa0e190 // sdot v16.4s, v12.16b, v0.4b[1]\n" + "ldr temploadreg2, [%[b_ptr0], #0x28]\n" + ".word 0x4fa1e194 // sdot v20.4s, v12.16b, v1.4b[1]\n" + "ldr d11, [%[b_ptr0], #0x30]\n" + ".word 0x4fa2e198 // sdot v24.4s, v12.16b, v2.4b[1]\n" + "ins v7.d[1], temploadreg3\n" + ".word 0x4fa3e19c // sdot v28.4s, v12.16b, v3.4b[1]\n" + "ldr temploadreg3, [%[b_ptr0], #0x38]\n" + ".word 0x4fa0e1b1 // sdot v17.4s, v13.16b, v0.4b[1]\n" + "ldr d12, [%[b_ptr0], #0x40]\n" + ".word 0x4fa1e1b5 // sdot v21.4s, v13.16b, v1.4b[1]\n" + "ins v8.d[1], temploadreg0\n" + ".word 0x4fa2e1b9 // sdot v25.4s, v13.16b, v2.4b[1]\n" + "ldr temploadreg0, [%[b_ptr0], #0x48]\n" + ".word 0x4fa3e1bd // sdot v29.4s, v13.16b, v3.4b[1]\n" + "ldr d13, [%[b_ptr0], #0x50]\n" + ".word 0x4fa0e1d2 // sdot v18.4s, v14.16b, v0.4b[1]\n" + "ins v9.d[1], temploadreg1\n" + ".word 0x4fa1e1d6 // sdot v22.4s, v14.16b, v1.4b[1]\n" + "ldr temploadreg1, [%[b_ptr0], #0x58]\n" + ".word 0x4fa2e1da // sdot v26.4s, v14.16b, v2.4b[1]\n" + "ins v10.d[1], temploadreg2\n" + ".word 0x4fa3e1de // sdot v30.4s, v14.16b, v3.4b[1]\n" + "ldr d14, [%[b_ptr0], #0x60]\n" + ".word 0x4fa0e1f3 // sdot v19.4s, v15.16b, v0.4b[1]\n" + "ldr temploadreg2, [%[b_ptr0], #0x68]\n" + ".word 0x4fa1e1f7 // sdot v23.4s, v15.16b, v1.4b[1]\n" + "ins v11.d[1], temploadreg3\n" + ".word 0x4fa2e1fb // sdot v27.4s, v15.16b, v2.4b[1]\n" + "ldr temploadreg3, [%[b_ptr0], #0x78]\n" + ".word 0x4fa3e1ff // sdot v31.4s, v15.16b, v3.4b[1]\n" + "ldr d15, [%[b_ptr0], #0x70]\n" + ".word 0x4f80e910 // sdot v16.4s, v8.16b, v0.4b[2]\n" + "ins v12.d[1], temploadreg0\n" + ".word 0x4f81e914 // sdot v20.4s, v8.16b, v1.4b[2]\n" + "ins v13.d[1], temploadreg1\n" + ".word 0x4f82e918 // sdot v24.4s, v8.16b, v2.4b[2]\n" + "ins v14.d[1], temploadreg2\n" + ".word 0x4f83e91c // sdot v28.4s, v8.16b, v3.4b[2]\n" + "ins v15.d[1], temploadreg3\n" + ".word 0x4f80e931 // sdot v17.4s, v9.16b, v0.4b[2]\n" + "add %[b_ptr0], %[b_ptr0], #0x100\n" + ".word 0x4f81e935 // sdot v21.4s, v9.16b, v1.4b[2]\n" + "ldr d8, [%[b_ptr0], #-0x80]\n" + ".word 0x4f82e939 // sdot v25.4s, v9.16b, v2.4b[2]\n" + "ldr temploadreg0, [%[b_ptr0], #-0x78]\n" + ".word 0x4f83e93d // sdot v29.4s, v9.16b, v3.4b[2]\n" + "ldr d9, [%[b_ptr0], #-0x70]\n" + ".word 0x4f80e952 // sdot v18.4s, v10.16b, v0.4b[2]\n" + "ldr temploadreg1, [%[b_ptr0], #-0x68]\n" + ".word 0x4f81e956 // sdot v22.4s, v10.16b, v1.4b[2]\n" + "ldr temploadreg2, [%[b_ptr0], #-0x58]\n" + ".word 0x4f82e95a // sdot v26.4s, v10.16b, v2.4b[2]\n" + "ldr temploadreg3, [%[b_ptr0], #-0x48]\n" + ".word 0x4f83e95e // sdot v30.4s, v10.16b, v3.4b[2]\n" + "ldr d10, [%[b_ptr0], #-0x60]\n" + ".word 0x4f80e973 // sdot v19.4s, v11.16b, v0.4b[2]\n" + "ins v8.d[1], temploadreg0\n" + ".word 0x4f81e977 // sdot v23.4s, v11.16b, v1.4b[2]\n" + "ldr temploadreg0, [%[b_ptr0], #-0x38]\n" + ".word 0x4f82e97b // sdot v27.4s, v11.16b, v2.4b[2]\n" + "ins v9.d[1], temploadreg1\n" + ".word 0x4f83e97f // sdot v31.4s, v11.16b, v3.4b[2]\n" + "ldr d11, [%[b_ptr0], #-0x50]\n" + ".word 0x4fa0e990 // sdot v16.4s, v12.16b, v0.4b[3]\n" + "ldr temploadreg1, [%[b_ptr0], #-0x28]\n" + ".word 0x4fa1e994 // sdot v20.4s, v12.16b, v1.4b[3]\n" + "ins v10.d[1], temploadreg2\n" + ".word 0x4fa2e998 // sdot v24.4s, v12.16b, v2.4b[3]\n" + "ldr temploadreg2, [%[b_ptr0], #-0x18]\n" + ".word 0x4fa3e99c // sdot v28.4s, v12.16b, v3.4b[3]\n" + "ldr d12, [%[b_ptr0], #-0x40]\n" + ".word 0x4fa0e9b1 // sdot v17.4s, v13.16b, v0.4b[3]\n" + "ins v11.d[1], temploadreg3\n" + ".word 0x4fa1e9b5 // sdot v21.4s, v13.16b, v1.4b[3]\n" + "ldr temploadreg3, [%[b_ptr0], #-0x8]\n" + ".word 0x4fa2e9b9 // sdot v25.4s, v13.16b, v2.4b[3]\n" + "ins v12.d[1], temploadreg0\n" + ".word 0x4fa3e9bd // sdot v29.4s, v13.16b, v3.4b[3]\n" + "ldr d13, [%[b_ptr0], #-0x30]\n" + ".word 0x4fa0e9d2 // sdot v18.4s, v14.16b, v0.4b[3]\n" + "ldr temploadreg0, [%[b_ptr0], #0x8]\n" + ".word 0x4fa1e9d6 // sdot v22.4s, v14.16b, v1.4b[3]\n" + "add %[a_ptr0], %[a_ptr0], #0x10\n" + ".word 0x4fa2e9da // sdot v26.4s, v14.16b, v2.4b[3]\n" + "ins v13.d[1], temploadreg1\n" + ".word 0x4fa3e9de // sdot v30.4s, v14.16b, v3.4b[3]\n" + "ldr d14, [%[b_ptr0], #-0x20]\n" + ".word 0x4fa0e9f3 // sdot v19.4s, v15.16b, v0.4b[3]\n" + "ldr temploadreg1, [%[b_ptr0], #0x18]\n" + ".word 0x4fa1e9f7 // sdot v23.4s, v15.16b, v1.4b[3]\n" + "add a_ptr1, a_ptr1, #0x10\n" + ".word 0x4fa2e9fb // sdot v27.4s, v15.16b, v2.4b[3]\n" + "ins v14.d[1], temploadreg2\n" + ".word 0x4fa3e9ff // sdot v31.4s, v15.16b, v3.4b[3]\n" + "ldr d15, [%[b_ptr0], #-0x10]\n" + ".word 0x4f84e110 // sdot v16.4s, v8.16b, v4.4b[0]\n" + "ldr temploadreg2, [%[b_ptr0], #0x28]\n" + ".word 0x4f85e114 // sdot v20.4s, v8.16b, v5.4b[0]\n" + "add a_ptr2, a_ptr2, #0x10\n" + ".word 0x4f86e118 // sdot v24.4s, v8.16b, v6.4b[0]\n" + "ins v15.d[1], temploadreg3\n" + ".word 0x4f87e11c // sdot v28.4s, v8.16b, v7.4b[0]\n" + "ldr d8, [%[b_ptr0]]\n" + ".word 0x4f84e131 // sdot v17.4s, v9.16b, v4.4b[0]\n" + "ldr temploadreg3, [%[b_ptr0], #0x38]\n" + ".word 0x4f85e135 // sdot v21.4s, v9.16b, v5.4b[0]\n" + "add a_ptr3, a_ptr3, #0x10\n" + ".word 0x4f86e139 // sdot v25.4s, v9.16b, v6.4b[0]\n" + "ins v8.d[1], temploadreg0\n" + ".word 0x4f87e13d // sdot v29.4s, v9.16b, v7.4b[0]\n" + "ldr d9, [%[b_ptr0], #0x10]\n" + ".word 0x4f84e152 // sdot v18.4s, v10.16b, v4.4b[0]\n" + "ldr temploadreg0, [%[b_ptr0], #0x48]\n" + ".word 0x4f85e156 // sdot v22.4s, v10.16b, v5.4b[0]\n" + ".word 0x4f86e15a // sdot v26.4s, v10.16b, v6.4b[0]\n" + "ins v9.d[1], temploadreg1\n" + ".word 0x4f87e15e // sdot v30.4s, v10.16b, v7.4b[0]\n" + "ldr d10, [%[b_ptr0], #0x20]\n" + ".word 0x4f84e173 // sdot v19.4s, v11.16b, v4.4b[0]\n" + "ldr temploadreg1, [%[b_ptr0], #0x58]\n" + ".word 0x4f85e177 // sdot v23.4s, v11.16b, v5.4b[0]\n" + ".word 0x4f86e17b // sdot v27.4s, v11.16b, v6.4b[0]\n" + "ins v10.d[1], temploadreg2\n" + ".word 0x4f87e17f // sdot v31.4s, v11.16b, v7.4b[0]\n" + "ldr d11, [%[b_ptr0], #0x30]\n" + ".word 0x4fa4e190 // sdot v16.4s, v12.16b, v4.4b[1]\n" + "ldr temploadreg2, [%[b_ptr0], #0x68]\n" + ".word 0x4fa5e194 // sdot v20.4s, v12.16b, v5.4b[1]\n" + ".word 0x4fa6e198 // sdot v24.4s, v12.16b, v6.4b[1]\n" + "ins v11.d[1], temploadreg3\n" + ".word 0x4fa7e19c // sdot v28.4s, v12.16b, v7.4b[1]\n" + "ldr d12, [%[b_ptr0], #0x40]\n" + ".word 0x4fa4e1b1 // sdot v17.4s, v13.16b, v4.4b[1]\n" + "ldr temploadreg3, [%[b_ptr0], #0x78]\n" + ".word 0x4fa5e1b5 // sdot v21.4s, v13.16b, v5.4b[1]\n" + ".word 0x4fa6e1b9 // sdot v25.4s, v13.16b, v6.4b[1]\n" + "ins v12.d[1], temploadreg0\n" + ".word 0x4fa7e1bd // sdot v29.4s, v13.16b, v7.4b[1]\n" + "ldr d13, [%[b_ptr0], #0x50]\n" + ".word 0x4fa4e1d2 // sdot v18.4s, v14.16b, v4.4b[1]\n" + ".word 0x4fa5e1d6 // sdot v22.4s, v14.16b, v5.4b[1]\n" + ".word 0x4fa6e1da // sdot v26.4s, v14.16b, v6.4b[1]\n" + "ins v13.d[1], temploadreg1\n" + ".word 0x4fa7e1de // sdot v30.4s, v14.16b, v7.4b[1]\n" + "ldr d14, [%[b_ptr0], #0x60]\n" + ".word 0x4fa4e1f3 // sdot v19.4s, v15.16b, v4.4b[1]\n" + ".word 0x4fa5e1f7 // sdot v23.4s, v15.16b, v5.4b[1]\n" + ".word 0x4fa6e1fb // sdot v27.4s, v15.16b, v6.4b[1]\n" + "ins v14.d[1], temploadreg2\n" + ".word 0x4fa7e1ff // sdot v31.4s, v15.16b, v7.4b[1]\n" + "ldr d15, [%[b_ptr0], #0x70]\n" + ".word 0x4f84e910 // sdot v16.4s, v8.16b, v4.4b[2]\n" + "add %[b_ptr0], %[b_ptr0], #0x80\n" + ".word 0x4f85e914 // sdot v20.4s, v8.16b, v5.4b[2]\n" + "ins v15.d[1], temploadreg3\n" + ".word 0x4f86e918 // sdot v24.4s, v8.16b, v6.4b[2]\n" + ".word 0x4f87e91c // sdot v28.4s, v8.16b, v7.4b[2]\n" + ".word 0x4f84e931 // sdot v17.4s, v9.16b, v4.4b[2]\n" + ".word 0x4f85e935 // sdot v21.4s, v9.16b, v5.4b[2]\n" + ".word 0x4f86e939 // sdot v25.4s, v9.16b, v6.4b[2]\n" + ".word 0x4f87e93d // sdot v29.4s, v9.16b, v7.4b[2]\n" + ".word 0x4f84e952 // sdot v18.4s, v10.16b, v4.4b[2]\n" + ".word 0x4f85e956 // sdot v22.4s, v10.16b, v5.4b[2]\n" + ".word 0x4f86e95a // sdot v26.4s, v10.16b, v6.4b[2]\n" + ".word 0x4f87e95e // sdot v30.4s, v10.16b, v7.4b[2]\n" + ".word 0x4f84e973 // sdot v19.4s, v11.16b, v4.4b[2]\n" + ".word 0x4f85e977 // sdot v23.4s, v11.16b, v5.4b[2]\n" + ".word 0x4f86e97b // sdot v27.4s, v11.16b, v6.4b[2]\n" + ".word 0x4f87e97f // sdot v31.4s, v11.16b, v7.4b[2]\n" + ".word 0x4fa4e990 // sdot v16.4s, v12.16b, v4.4b[3]\n" + ".word 0x4fa5e994 // sdot v20.4s, v12.16b, v5.4b[3]\n" + ".word 0x4fa6e998 // sdot v24.4s, v12.16b, v6.4b[3]\n" + ".word 0x4fa7e99c // sdot v28.4s, v12.16b, v7.4b[3]\n" + ".word 0x4fa4e9b1 // sdot v17.4s, v13.16b, v4.4b[3]\n" + ".word 0x4fa5e9b5 // sdot v21.4s, v13.16b, v5.4b[3]\n" + ".word 0x4fa6e9b9 // sdot v25.4s, v13.16b, v6.4b[3]\n" + ".word 0x4fa7e9bd // sdot v29.4s, v13.16b, v7.4b[3]\n" + ".word 0x4fa4e9d2 // sdot v18.4s, v14.16b, v4.4b[3]\n" + ".word 0x4fa5e9d6 // sdot v22.4s, v14.16b, v5.4b[3]\n" + ".word 0x4fa6e9da // sdot v26.4s, v14.16b, v6.4b[3]\n" + ".word 0x4fa7e9de // sdot v30.4s, v14.16b, v7.4b[3]\n" + ".word 0x4fa4e9f3 // sdot v19.4s, v15.16b, v4.4b[3]\n" + ".word 0x4fa5e9f7 // sdot v23.4s, v15.16b, v5.4b[3]\n" + ".word 0x4fa6e9fb // sdot v27.4s, v15.16b, v6.4b[3]\n" + ".word 0x4fa7e9ff // sdot v31.4s, v15.16b, v7.4b[3]\n" + "b 5f\n" + "4:\n" + ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" + "ldr temploadreg0, [%[b_ptr0], #0x8]\n" + ".word 0x4f81e114 // sdot v20.4s, v8.16b, v1.4b[0]\n" + "ldr temploadreg1, [%[b_ptr0], #0x18]\n" + ".word 0x4f82e118 // sdot v24.4s, v8.16b, v2.4b[0]\n" + "ldr temploadreg2, [%[b_ptr0], #0x28]\n" + ".word 0x4f83e11c // sdot v28.4s, v8.16b, v3.4b[0]\n" + "ldr d8, [%[b_ptr0]]\n" + ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" + "ldr temploadreg3, [%[b_ptr0], #0x38]\n" + ".word 0x4f81e135 // sdot v21.4s, v9.16b, v1.4b[0]\n" + ".word 0x4f82e139 // sdot v25.4s, v9.16b, v2.4b[0]\n" + "ins v8.d[1], temploadreg0\n" + ".word 0x4f83e13d // sdot v29.4s, v9.16b, v3.4b[0]\n" + "ldr d9, [%[b_ptr0], #0x10]\n" + ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" + "ldr temploadreg0, [%[b_ptr0], #0x48]\n" + ".word 0x4f81e156 // sdot v22.4s, v10.16b, v1.4b[0]\n" + ".word 0x4f82e15a // sdot v26.4s, v10.16b, v2.4b[0]\n" + "ins v9.d[1], temploadreg1\n" + ".word 0x4f83e15e // sdot v30.4s, v10.16b, v3.4b[0]\n" + "ldr d10, [%[b_ptr0], #0x20]\n" + ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" + "ldr temploadreg1, [%[b_ptr0], #0x58]\n" + ".word 0x4f81e177 // sdot v23.4s, v11.16b, v1.4b[0]\n" + ".word 0x4f82e17b // sdot v27.4s, v11.16b, v2.4b[0]\n" + "ins v10.d[1], temploadreg2\n" + ".word 0x4f83e17f // sdot v31.4s, v11.16b, v3.4b[0]\n" + "ldr d11, [%[b_ptr0], #0x30]\n" + ".word 0x4fa0e190 // sdot v16.4s, v12.16b, v0.4b[1]\n" + "ldr temploadreg2, [%[b_ptr0], #0x68]\n" + ".word 0x4fa1e194 // sdot v20.4s, v12.16b, v1.4b[1]\n" + ".word 0x4fa2e198 // sdot v24.4s, v12.16b, v2.4b[1]\n" + "ins v11.d[1], temploadreg3\n" + ".word 0x4fa3e19c // sdot v28.4s, v12.16b, v3.4b[1]\n" + "ldr d12, [%[b_ptr0], #0x40]\n" + ".word 0x4fa0e1b1 // sdot v17.4s, v13.16b, v0.4b[1]\n" + "ldr temploadreg3, [%[b_ptr0], #0x78]\n" + ".word 0x4fa1e1b5 // sdot v21.4s, v13.16b, v1.4b[1]\n" + ".word 0x4fa2e1b9 // sdot v25.4s, v13.16b, v2.4b[1]\n" + "ins v12.d[1], temploadreg0\n" + ".word 0x4fa3e1bd // sdot v29.4s, v13.16b, v3.4b[1]\n" + "ldr d13, [%[b_ptr0], #0x50]\n" + ".word 0x4fa0e1d2 // sdot v18.4s, v14.16b, v0.4b[1]\n" + ".word 0x4fa1e1d6 // sdot v22.4s, v14.16b, v1.4b[1]\n" + ".word 0x4fa2e1da // sdot v26.4s, v14.16b, v2.4b[1]\n" + "ins v13.d[1], temploadreg1\n" + ".word 0x4fa3e1de // sdot v30.4s, v14.16b, v3.4b[1]\n" + "ldr d14, [%[b_ptr0], #0x60]\n" + ".word 0x4fa0e1f3 // sdot v19.4s, v15.16b, v0.4b[1]\n" + ".word 0x4fa1e1f7 // sdot v23.4s, v15.16b, v1.4b[1]\n" + ".word 0x4fa2e1fb // sdot v27.4s, v15.16b, v2.4b[1]\n" + "ins v14.d[1], temploadreg2\n" + ".word 0x4fa3e1ff // sdot v31.4s, v15.16b, v3.4b[1]\n" + "ldr d15, [%[b_ptr0], #0x70]\n" + ".word 0x4f80e910 // sdot v16.4s, v8.16b, v0.4b[2]\n" + "add %[b_ptr0], %[b_ptr0], #0x80\n" + ".word 0x4f81e914 // sdot v20.4s, v8.16b, v1.4b[2]\n" + "ins v15.d[1], temploadreg3\n" + ".word 0x4f82e918 // sdot v24.4s, v8.16b, v2.4b[2]\n" + ".word 0x4f83e91c // sdot v28.4s, v8.16b, v3.4b[2]\n" + ".word 0x4f80e931 // sdot v17.4s, v9.16b, v0.4b[2]\n" + ".word 0x4f81e935 // sdot v21.4s, v9.16b, v1.4b[2]\n" + ".word 0x4f82e939 // sdot v25.4s, v9.16b, v2.4b[2]\n" + ".word 0x4f83e93d // sdot v29.4s, v9.16b, v3.4b[2]\n" + ".word 0x4f80e952 // sdot v18.4s, v10.16b, v0.4b[2]\n" + ".word 0x4f81e956 // sdot v22.4s, v10.16b, v1.4b[2]\n" + ".word 0x4f82e95a // sdot v26.4s, v10.16b, v2.4b[2]\n" + ".word 0x4f83e95e // sdot v30.4s, v10.16b, v3.4b[2]\n" + ".word 0x4f80e973 // sdot v19.4s, v11.16b, v0.4b[2]\n" + ".word 0x4f81e977 // sdot v23.4s, v11.16b, v1.4b[2]\n" + ".word 0x4f82e97b // sdot v27.4s, v11.16b, v2.4b[2]\n" + ".word 0x4f83e97f // sdot v31.4s, v11.16b, v3.4b[2]\n" + ".word 0x4fa0e990 // sdot v16.4s, v12.16b, v0.4b[3]\n" + ".word 0x4fa1e994 // sdot v20.4s, v12.16b, v1.4b[3]\n" + ".word 0x4fa2e998 // sdot v24.4s, v12.16b, v2.4b[3]\n" + ".word 0x4fa3e99c // sdot v28.4s, v12.16b, v3.4b[3]\n" + ".word 0x4fa0e9b1 // sdot v17.4s, v13.16b, v0.4b[3]\n" + ".word 0x4fa1e9b5 // sdot v21.4s, v13.16b, v1.4b[3]\n" + ".word 0x4fa2e9b9 // sdot v25.4s, v13.16b, v2.4b[3]\n" + ".word 0x4fa3e9bd // sdot v29.4s, v13.16b, v3.4b[3]\n" + ".word 0x4fa0e9d2 // sdot v18.4s, v14.16b, v0.4b[3]\n" + ".word 0x4fa1e9d6 // sdot v22.4s, v14.16b, v1.4b[3]\n" + ".word 0x4fa2e9da // sdot v26.4s, v14.16b, v2.4b[3]\n" + ".word 0x4fa3e9de // sdot v30.4s, v14.16b, v3.4b[3]\n" + ".word 0x4fa0e9f3 // sdot v19.4s, v15.16b, v0.4b[3]\n" + ".word 0x4fa1e9f7 // sdot v23.4s, v15.16b, v1.4b[3]\n" + ".word 0x4fa2e9fb // sdot v27.4s, v15.16b, v2.4b[3]\n" + ".word 0x4fa3e9ff // sdot v31.4s, v15.16b, v3.4b[3]\n" + "5:\n" + "cbz %[blocks], 6f\n" + "7:\n" + "ldr q8, [%[b_ptr0]]\n" + "subs %[blocks], %[blocks], #0x1\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + "ldr s0, [%[a_ptr0]]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + "add %[a_ptr0], %[a_ptr0], #0x4\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + "add %[b_ptr0], %[b_ptr0], #0x40\n" + ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" + "ldr s1, [a_ptr1]\n" + ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" + "add a_ptr1, a_ptr1, #0x4\n" + ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" + "ldr s2, [a_ptr2]\n" + ".word 0x4f81e114 // sdot v20.4s, v8.16b, v1.4b[0]\n" + "add a_ptr2, a_ptr2, #0x4\n" + ".word 0x4f81e135 // sdot v21.4s, v9.16b, v1.4b[0]\n" + "ldr s3, [a_ptr3]\n" + ".word 0x4f82e118 // sdot v24.4s, v8.16b, v2.4b[0]\n" + "add a_ptr3, a_ptr3, #0x4\n" + ".word 0x4f82e139 // sdot v25.4s, v9.16b, v2.4b[0]\n" + ".word 0x4f83e11c // sdot v28.4s, v8.16b, v3.4b[0]\n" + ".word 0x4f83e13d // sdot v29.4s, v9.16b, v3.4b[0]\n" + ".word 0x4f81e156 // sdot v22.4s, v10.16b, v1.4b[0]\n" + ".word 0x4f82e15a // sdot v26.4s, v10.16b, v2.4b[0]\n" + ".word 0x4f83e15e // sdot v30.4s, v10.16b, v3.4b[0]\n" + ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" + ".word 0x4f81e177 // sdot v23.4s, v11.16b, v1.4b[0]\n" + ".word 0x4f82e17b // sdot v27.4s, v11.16b, v2.4b[0]\n" + ".word 0x4f83e17f // sdot v31.4s, v11.16b, v3.4b[0]\n" + "b.ne 7b\n" + "6:\n" + "cbz %[odds], 8f\n" + "ld1 {v0.b}[0], [%[a_ptr0]], #1\n" + "ld1 {v1.b}[0], [a_ptr1], #1\n" + "ld1 {v2.b}[0], [a_ptr2], #1\n" + "ld1 {v3.b}[0], [a_ptr3], #1\n" + "subs %[odds], %[odds], #0x1\n" + "b.eq 9f\n" + "ld1 {v0.b}[1], [%[a_ptr0]], #1\n" + "ld1 {v1.b}[1], [a_ptr1], #1\n" + "ld1 {v2.b}[1], [a_ptr2], #1\n" + "ld1 {v3.b}[1], [a_ptr3], #1\n" + "subs %[odds], %[odds], #0x1\n" + "b.eq 9f\n" + "ld1 {v0.b}[2], [%[a_ptr0]]\n" + "ld1 {v1.b}[2], [a_ptr1]\n" + "ld1 {v2.b}[2], [a_ptr2]\n" + "ld1 {v3.b}[2], [a_ptr3]\n" + "9:\n" + "ldr q8, [%[b_ptr0]]\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" + ".word 0x4f81e114 // sdot v20.4s, v8.16b, v1.4b[0]\n" + ".word 0x4f82e118 // sdot v24.4s, v8.16b, v2.4b[0]\n" + ".word 0x4f83e11c // sdot v28.4s, v8.16b, v3.4b[0]\n" + ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" + ".word 0x4f81e135 // sdot v21.4s, v9.16b, v1.4b[0]\n" + ".word 0x4f82e139 // sdot v25.4s, v9.16b, v2.4b[0]\n" + ".word 0x4f83e13d // sdot v29.4s, v9.16b, v3.4b[0]\n" + ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" + ".word 0x4f81e156 // sdot v22.4s, v10.16b, v1.4b[0]\n" + ".word 0x4f82e15a // sdot v26.4s, v10.16b, v2.4b[0]\n" + ".word 0x4f83e15e // sdot v30.4s, v10.16b, v3.4b[0]\n" + ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" + ".word 0x4f81e177 // sdot v23.4s, v11.16b, v1.4b[0]\n" + ".word 0x4f82e17b // sdot v27.4s, v11.16b, v2.4b[0]\n" + ".word 0x4f83e17f // sdot v31.4s, v11.16b, v3.4b[0]\n" + "8:\n" + "str q16, [%[c_ptr0]]\n" + "str q17, [%[c_ptr0], #0x10]\n" + "str q18, [%[c_ptr0], #0x20]\n" + "str q19, [%[c_ptr0], #0x30]\n" + "add %[c_ptr0], %[c_ptr0], #0x40\n" + "str q20, [c_ptr1]\n" + "str q21, [c_ptr1, #0x10]\n" + "str q22, [c_ptr1, #0x20]\n" + "str q23, [c_ptr1, #0x30]\n" + "str q24, [c_ptr2]\n" + "str q25, [c_ptr2, #0x10]\n" + "str q26, [c_ptr2, #0x20]\n" + "str q27, [c_ptr2, #0x30]\n" + "str q28, [c_ptr3]\n" + "str q29, [c_ptr3, #0x10]\n" + "str q30, [c_ptr3, #0x20]\n" + "str q31, [c_ptr3, #0x30]\n" + ".unreq a_ptr1\n" + ".unreq a_ptr2\n" + ".unreq a_ptr3\n" + ".unreq c_ptr1\n" + ".unreq c_ptr2\n" + ".unreq c_ptr3\n" + ".unreq temploadreg0\n" + ".unreq temploadreg1\n" + ".unreq temploadreg2\n" + ".unreq temploadreg3\n" + : [a_ptr0] "+r" (a_ptr0), [b_ptr0] "+r" (b_ptr0), [c_ptr0] "+r" (c_ptr0), [loops] "+r" (loops), [regs] "+r" (regs), [blocks] "+r" (blocks), [odds] "+r" (odds) + : [betaptr] "r" (betaptr), [width] "r" (width), [beta0] "r" (beta0), [lda] "r" (ldab), [ldc] "r" (ldcb) + : "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x0", "x1", "x2", "x3", "x4", "x5", "x6", "x7", "x8", "x9", "cc", "memory" ); break; } @@ -2465,4 +2465,4 @@ void a64_hybrid_s8s32_dot_16x4_a55(const int8_t *A, int lda, const int8_t *B, in } // namespace arm_gemm -#endif // __aarch64__ \ No newline at end of file +#endif // __aarch64__ diff --git a/src/core/NEON/kernels/arm_gemm/kernels/a64_hybrid_s8s32_dot_16x4/generic.cpp b/src/core/NEON/kernels/arm_gemm/kernels/a64_hybrid_s8s32_dot_16x4/generic.cpp index fdd45a03cf..1ad924612e 100644 --- a/src/core/NEON/kernels/arm_gemm/kernels/a64_hybrid_s8s32_dot_16x4/generic.cpp +++ b/src/core/NEON/kernels/arm_gemm/kernels/a64_hybrid_s8s32_dot_16x4/generic.cpp @@ -74,1755 +74,1755 @@ void a64_hybrid_s8s32_dot_16x4(const int8_t *A, int lda, const int8_t *B, int32_ switch(M-y) { case 1: __asm __volatile ( - "cbz %[beta0], 1f\n" - "movi v16.4s, #0\n" - "ldr q0, [%[a_ptr0]]\n" - "movi v17.4s, #0\n" - "ldr q8, [%[b_ptr0]]\n" - "movi v18.4s, #0\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - "movi v19.4s, #0\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - "add %[a_ptr0], %[a_ptr0], #0x10\n" - "ldr q12, [%[b_ptr0], #0x40]\n" - "ldr q13, [%[b_ptr0], #0x50]\n" - "ldr q14, [%[b_ptr0], #0x60]\n" - "add %[b_ptr0], %[b_ptr0], #0x80\n" - "cbz %[loops], 2f\n" - "b 3f\n" - "1:\n" - "ld1r {v15.4s}, [%[betaptr]]\n" - "ldr q16, [%[c_ptr0]]\n" - "ldr q17, [%[c_ptr0], #0x10]\n" - "ldr q18, [%[c_ptr0], #0x20]\n" - "ldr q19, [%[c_ptr0], #0x30]\n" - "mul v16.4s, v16.4s, v15.4s\n" - "ldr q0, [%[a_ptr0]]\n" - "mul v17.4s, v17.4s, v15.4s\n" - "ldr q8, [%[b_ptr0]]\n" - "mul v18.4s, v18.4s, v15.4s\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - "mul v19.4s, v19.4s, v15.4s\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - "add %[a_ptr0], %[a_ptr0], #0x10\n" - "ldr q12, [%[b_ptr0], #0x40]\n" - "ldr q13, [%[b_ptr0], #0x50]\n" - "ldr q14, [%[b_ptr0], #0x60]\n" - "add %[b_ptr0], %[b_ptr0], #0x80\n" - "cbz %[loops], 2f\n" - "3:\n" - ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" - "ldr q15, [%[b_ptr0], #-0x10]\n" - ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" - "ldr q4, [%[a_ptr0]]\n" - ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" - "ldr q8, [%[b_ptr0]]\n" - ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - ".word 0x4fa0e190 // sdot v16.4s, v12.16b, v0.4b[1]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - ".word 0x4fa0e1b1 // sdot v17.4s, v13.16b, v0.4b[1]\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - ".word 0x4fa0e1d2 // sdot v18.4s, v14.16b, v0.4b[1]\n" - "ldr q12, [%[b_ptr0], #0x40]\n" - ".word 0x4fa0e1f3 // sdot v19.4s, v15.16b, v0.4b[1]\n" - "ldr q13, [%[b_ptr0], #0x50]\n" - ".word 0x4f80e910 // sdot v16.4s, v8.16b, v0.4b[2]\n" - "ldr q14, [%[b_ptr0], #0x60]\n" - ".word 0x4f80e931 // sdot v17.4s, v9.16b, v0.4b[2]\n" - "ldr q15, [%[b_ptr0], #0x70]\n" - ".word 0x4f80e952 // sdot v18.4s, v10.16b, v0.4b[2]\n" - "subs %[loops], %[loops], #0x1\n" - ".word 0x4f80e973 // sdot v19.4s, v11.16b, v0.4b[2]\n" - "prfm PLDL1KEEP, [%[a_ptr0], #0x40]\n" - ".word 0x4fa0e990 // sdot v16.4s, v12.16b, v0.4b[3]\n" - "add %[b_ptr0], %[b_ptr0], #0x100\n" - ".word 0x4fa0e9b1 // sdot v17.4s, v13.16b, v0.4b[3]\n" - "ldr q8, [%[b_ptr0], #-0x80]\n" - ".word 0x4fa0e9d2 // sdot v18.4s, v14.16b, v0.4b[3]\n" - "ldr q9, [%[b_ptr0], #-0x70]\n" - ".word 0x4fa0e9f3 // sdot v19.4s, v15.16b, v0.4b[3]\n" - "ldr q10, [%[b_ptr0], #-0x60]\n" - "ldr q11, [%[b_ptr0], #-0x50]\n" - "add %[a_ptr0], %[a_ptr0], #0x20\n" - ".word 0x4f84e110 // sdot v16.4s, v8.16b, v4.4b[0]\n" - "ldr q12, [%[b_ptr0], #-0x40]\n" - ".word 0x4f84e131 // sdot v17.4s, v9.16b, v4.4b[0]\n" - "ldr q13, [%[b_ptr0], #-0x30]\n" - ".word 0x4f84e152 // sdot v18.4s, v10.16b, v4.4b[0]\n" - "ldr q14, [%[b_ptr0], #-0x20]\n" - ".word 0x4f84e173 // sdot v19.4s, v11.16b, v4.4b[0]\n" - "ldr q15, [%[b_ptr0], #-0x10]\n" - ".word 0x4fa4e190 // sdot v16.4s, v12.16b, v4.4b[1]\n" - "ldr q0, [%[a_ptr0], #-0x10]\n" - ".word 0x4fa4e1b1 // sdot v17.4s, v13.16b, v4.4b[1]\n" - "ldr q8, [%[b_ptr0]]\n" - ".word 0x4fa4e1d2 // sdot v18.4s, v14.16b, v4.4b[1]\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - ".word 0x4fa4e1f3 // sdot v19.4s, v15.16b, v4.4b[1]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - ".word 0x4f84e910 // sdot v16.4s, v8.16b, v4.4b[2]\n" - "ldr q12, [%[b_ptr0], #0x40]\n" - ".word 0x4f84e931 // sdot v17.4s, v9.16b, v4.4b[2]\n" - "ldr q13, [%[b_ptr0], #0x50]\n" - ".word 0x4f84e952 // sdot v18.4s, v10.16b, v4.4b[2]\n" - "ldr q14, [%[b_ptr0], #0x60]\n" - ".word 0x4f84e973 // sdot v19.4s, v11.16b, v4.4b[2]\n" - "ldr q15, [%[b_ptr0], #0x70]\n" - ".word 0x4fa4e990 // sdot v16.4s, v12.16b, v4.4b[3]\n" - "add %[b_ptr0], %[b_ptr0], #0x100\n" - ".word 0x4fa4e9b1 // sdot v17.4s, v13.16b, v4.4b[3]\n" - "ldr q8, [%[b_ptr0], #-0x80]\n" - ".word 0x4fa4e9d2 // sdot v18.4s, v14.16b, v4.4b[3]\n" - "ldr q9, [%[b_ptr0], #-0x70]\n" - ".word 0x4fa4e9f3 // sdot v19.4s, v15.16b, v4.4b[3]\n" - "ldr q10, [%[b_ptr0], #-0x60]\n" - "ldr q11, [%[b_ptr0], #-0x50]\n" - "ldr q12, [%[b_ptr0], #-0x40]\n" - "ldr q13, [%[b_ptr0], #-0x30]\n" - "ldr q14, [%[b_ptr0], #-0x20]\n" - "b.ne 3b\n" - "2:\n" - "ldr q15, [%[b_ptr0], #-0x10]\n" - "prfm PSTL1KEEP, [%[c_ptr0]]\n" - "cbz %[regs], 4f\n" - ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" - "ldr q4, [%[a_ptr0]]\n" - ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" - "ldr q8, [%[b_ptr0]]\n" - ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - ".word 0x4fa0e190 // sdot v16.4s, v12.16b, v0.4b[1]\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - ".word 0x4fa0e1b1 // sdot v17.4s, v13.16b, v0.4b[1]\n" - "ldr q12, [%[b_ptr0], #0x40]\n" - ".word 0x4fa0e1d2 // sdot v18.4s, v14.16b, v0.4b[1]\n" - "ldr q13, [%[b_ptr0], #0x50]\n" - ".word 0x4fa0e1f3 // sdot v19.4s, v15.16b, v0.4b[1]\n" - "ldr q14, [%[b_ptr0], #0x60]\n" - ".word 0x4f80e910 // sdot v16.4s, v8.16b, v0.4b[2]\n" - "ldr q15, [%[b_ptr0], #0x70]\n" - ".word 0x4f80e931 // sdot v17.4s, v9.16b, v0.4b[2]\n" - "add %[b_ptr0], %[b_ptr0], #0x100\n" - ".word 0x4f80e952 // sdot v18.4s, v10.16b, v0.4b[2]\n" - "ldr q8, [%[b_ptr0], #-0x80]\n" - ".word 0x4f80e973 // sdot v19.4s, v11.16b, v0.4b[2]\n" - "ldr q9, [%[b_ptr0], #-0x70]\n" - ".word 0x4fa0e990 // sdot v16.4s, v12.16b, v0.4b[3]\n" - "ldr q10, [%[b_ptr0], #-0x60]\n" - ".word 0x4fa0e9b1 // sdot v17.4s, v13.16b, v0.4b[3]\n" - "ldr q11, [%[b_ptr0], #-0x50]\n" - ".word 0x4fa0e9d2 // sdot v18.4s, v14.16b, v0.4b[3]\n" - "ldr q12, [%[b_ptr0], #-0x40]\n" - ".word 0x4fa0e9f3 // sdot v19.4s, v15.16b, v0.4b[3]\n" - "ldr q13, [%[b_ptr0], #-0x30]\n" - ".word 0x4f84e110 // sdot v16.4s, v8.16b, v4.4b[0]\n" - "ldr q14, [%[b_ptr0], #-0x20]\n" - ".word 0x4f84e131 // sdot v17.4s, v9.16b, v4.4b[0]\n" - "ldr q15, [%[b_ptr0], #-0x10]\n" - ".word 0x4f84e152 // sdot v18.4s, v10.16b, v4.4b[0]\n" - "ldr q8, [%[b_ptr0]]\n" - ".word 0x4f84e173 // sdot v19.4s, v11.16b, v4.4b[0]\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - ".word 0x4fa4e190 // sdot v16.4s, v12.16b, v4.4b[1]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - ".word 0x4fa4e1b1 // sdot v17.4s, v13.16b, v4.4b[1]\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - ".word 0x4fa4e1d2 // sdot v18.4s, v14.16b, v4.4b[1]\n" - "ldr q12, [%[b_ptr0], #0x40]\n" - ".word 0x4fa4e1f3 // sdot v19.4s, v15.16b, v4.4b[1]\n" - "ldr q13, [%[b_ptr0], #0x50]\n" - ".word 0x4f84e910 // sdot v16.4s, v8.16b, v4.4b[2]\n" - "ldr q14, [%[b_ptr0], #0x60]\n" - ".word 0x4f84e931 // sdot v17.4s, v9.16b, v4.4b[2]\n" - "ldr q15, [%[b_ptr0], #0x70]\n" - ".word 0x4f84e952 // sdot v18.4s, v10.16b, v4.4b[2]\n" - "add %[b_ptr0], %[b_ptr0], #0x80\n" - ".word 0x4f84e973 // sdot v19.4s, v11.16b, v4.4b[2]\n" - "add %[a_ptr0], %[a_ptr0], #0x10\n" - ".word 0x4fa4e990 // sdot v16.4s, v12.16b, v4.4b[3]\n" - ".word 0x4fa4e9b1 // sdot v17.4s, v13.16b, v4.4b[3]\n" - ".word 0x4fa4e9d2 // sdot v18.4s, v14.16b, v4.4b[3]\n" - ".word 0x4fa4e9f3 // sdot v19.4s, v15.16b, v4.4b[3]\n" - "b 5f\n" - "4:\n" - ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" - "ldr q8, [%[b_ptr0]]\n" - ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - ".word 0x4fa0e190 // sdot v16.4s, v12.16b, v0.4b[1]\n" - "ldr q12, [%[b_ptr0], #0x40]\n" - ".word 0x4fa0e1b1 // sdot v17.4s, v13.16b, v0.4b[1]\n" - "ldr q13, [%[b_ptr0], #0x50]\n" - ".word 0x4fa0e1d2 // sdot v18.4s, v14.16b, v0.4b[1]\n" - "ldr q14, [%[b_ptr0], #0x60]\n" - ".word 0x4fa0e1f3 // sdot v19.4s, v15.16b, v0.4b[1]\n" - "ldr q15, [%[b_ptr0], #0x70]\n" - ".word 0x4f80e910 // sdot v16.4s, v8.16b, v0.4b[2]\n" - "add %[b_ptr0], %[b_ptr0], #0x80\n" - ".word 0x4f80e931 // sdot v17.4s, v9.16b, v0.4b[2]\n" - ".word 0x4f80e952 // sdot v18.4s, v10.16b, v0.4b[2]\n" - ".word 0x4f80e973 // sdot v19.4s, v11.16b, v0.4b[2]\n" - ".word 0x4fa0e990 // sdot v16.4s, v12.16b, v0.4b[3]\n" - ".word 0x4fa0e9b1 // sdot v17.4s, v13.16b, v0.4b[3]\n" - ".word 0x4fa0e9d2 // sdot v18.4s, v14.16b, v0.4b[3]\n" - ".word 0x4fa0e9f3 // sdot v19.4s, v15.16b, v0.4b[3]\n" - "5:\n" - "cbz %[blocks], 6f\n" - "7:\n" - "ldr q8, [%[b_ptr0]]\n" - "subs %[blocks], %[blocks], #0x1\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - "ldr s0, [%[a_ptr0]]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - "add %[a_ptr0], %[a_ptr0], #0x4\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - "add %[b_ptr0], %[b_ptr0], #0x40\n" - ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" - ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" - ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" - ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" - "b.ne 7b\n" - "6:\n" - "cbz %[odds], 8f\n" - "ld1 {v0.b}[0], [%[a_ptr0]], #1\n" - "subs %[odds], %[odds], #0x1\n" - "b.eq 9f\n" - "ld1 {v0.b}[1], [%[a_ptr0]], #1\n" - "subs %[odds], %[odds], #0x1\n" - "b.eq 9f\n" - "ld1 {v0.b}[2], [%[a_ptr0]]\n" - "9:\n" - "ldr q8, [%[b_ptr0]]\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" - ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" - ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" - ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" - "8:\n" - "str q16, [%[c_ptr0]]\n" - "str q17, [%[c_ptr0], #0x10]\n" - "str q18, [%[c_ptr0], #0x20]\n" - "str q19, [%[c_ptr0], #0x30]\n" - "add %[c_ptr0], %[c_ptr0], #0x40\n" - : [a_ptr0] "+r" (a_ptr0), [b_ptr0] "+r" (b_ptr0), [c_ptr0] "+r" (c_ptr0), [loops] "+r" (loops), [regs] "+r" (regs), [blocks] "+r" (blocks), [odds] "+r" (odds) - : [betaptr] "r" (betaptr), [width] "r" (width), [beta0] "r" (beta0), [lda] "r" (ldab), [ldc] "r" (ldcb) - : "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "cc", "memory" + "cbz %[beta0], 1f\n" + "movi v16.4s, #0\n" + "ldr q0, [%[a_ptr0]]\n" + "movi v17.4s, #0\n" + "ldr q8, [%[b_ptr0]]\n" + "movi v18.4s, #0\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + "movi v19.4s, #0\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + "add %[a_ptr0], %[a_ptr0], #0x10\n" + "ldr q12, [%[b_ptr0], #0x40]\n" + "ldr q13, [%[b_ptr0], #0x50]\n" + "ldr q14, [%[b_ptr0], #0x60]\n" + "add %[b_ptr0], %[b_ptr0], #0x80\n" + "cbz %[loops], 2f\n" + "b 3f\n" + "1:\n" + "ld1r {v15.4s}, [%[betaptr]]\n" + "ldr q16, [%[c_ptr0]]\n" + "ldr q17, [%[c_ptr0], #0x10]\n" + "ldr q18, [%[c_ptr0], #0x20]\n" + "ldr q19, [%[c_ptr0], #0x30]\n" + "mul v16.4s, v16.4s, v15.4s\n" + "ldr q0, [%[a_ptr0]]\n" + "mul v17.4s, v17.4s, v15.4s\n" + "ldr q8, [%[b_ptr0]]\n" + "mul v18.4s, v18.4s, v15.4s\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + "mul v19.4s, v19.4s, v15.4s\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + "add %[a_ptr0], %[a_ptr0], #0x10\n" + "ldr q12, [%[b_ptr0], #0x40]\n" + "ldr q13, [%[b_ptr0], #0x50]\n" + "ldr q14, [%[b_ptr0], #0x60]\n" + "add %[b_ptr0], %[b_ptr0], #0x80\n" + "cbz %[loops], 2f\n" + "3:\n" + ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" + "ldr q15, [%[b_ptr0], #-0x10]\n" + ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" + "ldr q4, [%[a_ptr0]]\n" + ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" + "ldr q8, [%[b_ptr0]]\n" + ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + ".word 0x4fa0e190 // sdot v16.4s, v12.16b, v0.4b[1]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + ".word 0x4fa0e1b1 // sdot v17.4s, v13.16b, v0.4b[1]\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + ".word 0x4fa0e1d2 // sdot v18.4s, v14.16b, v0.4b[1]\n" + "ldr q12, [%[b_ptr0], #0x40]\n" + ".word 0x4fa0e1f3 // sdot v19.4s, v15.16b, v0.4b[1]\n" + "ldr q13, [%[b_ptr0], #0x50]\n" + ".word 0x4f80e910 // sdot v16.4s, v8.16b, v0.4b[2]\n" + "ldr q14, [%[b_ptr0], #0x60]\n" + ".word 0x4f80e931 // sdot v17.4s, v9.16b, v0.4b[2]\n" + "ldr q15, [%[b_ptr0], #0x70]\n" + ".word 0x4f80e952 // sdot v18.4s, v10.16b, v0.4b[2]\n" + "subs %[loops], %[loops], #0x1\n" + ".word 0x4f80e973 // sdot v19.4s, v11.16b, v0.4b[2]\n" + "prfm PLDL1KEEP, [%[a_ptr0], #0x40]\n" + ".word 0x4fa0e990 // sdot v16.4s, v12.16b, v0.4b[3]\n" + "add %[b_ptr0], %[b_ptr0], #0x100\n" + ".word 0x4fa0e9b1 // sdot v17.4s, v13.16b, v0.4b[3]\n" + "ldr q8, [%[b_ptr0], #-0x80]\n" + ".word 0x4fa0e9d2 // sdot v18.4s, v14.16b, v0.4b[3]\n" + "ldr q9, [%[b_ptr0], #-0x70]\n" + ".word 0x4fa0e9f3 // sdot v19.4s, v15.16b, v0.4b[3]\n" + "ldr q10, [%[b_ptr0], #-0x60]\n" + "ldr q11, [%[b_ptr0], #-0x50]\n" + "add %[a_ptr0], %[a_ptr0], #0x20\n" + ".word 0x4f84e110 // sdot v16.4s, v8.16b, v4.4b[0]\n" + "ldr q12, [%[b_ptr0], #-0x40]\n" + ".word 0x4f84e131 // sdot v17.4s, v9.16b, v4.4b[0]\n" + "ldr q13, [%[b_ptr0], #-0x30]\n" + ".word 0x4f84e152 // sdot v18.4s, v10.16b, v4.4b[0]\n" + "ldr q14, [%[b_ptr0], #-0x20]\n" + ".word 0x4f84e173 // sdot v19.4s, v11.16b, v4.4b[0]\n" + "ldr q15, [%[b_ptr0], #-0x10]\n" + ".word 0x4fa4e190 // sdot v16.4s, v12.16b, v4.4b[1]\n" + "ldr q0, [%[a_ptr0], #-0x10]\n" + ".word 0x4fa4e1b1 // sdot v17.4s, v13.16b, v4.4b[1]\n" + "ldr q8, [%[b_ptr0]]\n" + ".word 0x4fa4e1d2 // sdot v18.4s, v14.16b, v4.4b[1]\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + ".word 0x4fa4e1f3 // sdot v19.4s, v15.16b, v4.4b[1]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + ".word 0x4f84e910 // sdot v16.4s, v8.16b, v4.4b[2]\n" + "ldr q12, [%[b_ptr0], #0x40]\n" + ".word 0x4f84e931 // sdot v17.4s, v9.16b, v4.4b[2]\n" + "ldr q13, [%[b_ptr0], #0x50]\n" + ".word 0x4f84e952 // sdot v18.4s, v10.16b, v4.4b[2]\n" + "ldr q14, [%[b_ptr0], #0x60]\n" + ".word 0x4f84e973 // sdot v19.4s, v11.16b, v4.4b[2]\n" + "ldr q15, [%[b_ptr0], #0x70]\n" + ".word 0x4fa4e990 // sdot v16.4s, v12.16b, v4.4b[3]\n" + "add %[b_ptr0], %[b_ptr0], #0x100\n" + ".word 0x4fa4e9b1 // sdot v17.4s, v13.16b, v4.4b[3]\n" + "ldr q8, [%[b_ptr0], #-0x80]\n" + ".word 0x4fa4e9d2 // sdot v18.4s, v14.16b, v4.4b[3]\n" + "ldr q9, [%[b_ptr0], #-0x70]\n" + ".word 0x4fa4e9f3 // sdot v19.4s, v15.16b, v4.4b[3]\n" + "ldr q10, [%[b_ptr0], #-0x60]\n" + "ldr q11, [%[b_ptr0], #-0x50]\n" + "ldr q12, [%[b_ptr0], #-0x40]\n" + "ldr q13, [%[b_ptr0], #-0x30]\n" + "ldr q14, [%[b_ptr0], #-0x20]\n" + "b.ne 3b\n" + "2:\n" + "ldr q15, [%[b_ptr0], #-0x10]\n" + "prfm PSTL1KEEP, [%[c_ptr0]]\n" + "cbz %[regs], 4f\n" + ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" + "ldr q4, [%[a_ptr0]]\n" + ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" + "ldr q8, [%[b_ptr0]]\n" + ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + ".word 0x4fa0e190 // sdot v16.4s, v12.16b, v0.4b[1]\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + ".word 0x4fa0e1b1 // sdot v17.4s, v13.16b, v0.4b[1]\n" + "ldr q12, [%[b_ptr0], #0x40]\n" + ".word 0x4fa0e1d2 // sdot v18.4s, v14.16b, v0.4b[1]\n" + "ldr q13, [%[b_ptr0], #0x50]\n" + ".word 0x4fa0e1f3 // sdot v19.4s, v15.16b, v0.4b[1]\n" + "ldr q14, [%[b_ptr0], #0x60]\n" + ".word 0x4f80e910 // sdot v16.4s, v8.16b, v0.4b[2]\n" + "ldr q15, [%[b_ptr0], #0x70]\n" + ".word 0x4f80e931 // sdot v17.4s, v9.16b, v0.4b[2]\n" + "add %[b_ptr0], %[b_ptr0], #0x100\n" + ".word 0x4f80e952 // sdot v18.4s, v10.16b, v0.4b[2]\n" + "ldr q8, [%[b_ptr0], #-0x80]\n" + ".word 0x4f80e973 // sdot v19.4s, v11.16b, v0.4b[2]\n" + "ldr q9, [%[b_ptr0], #-0x70]\n" + ".word 0x4fa0e990 // sdot v16.4s, v12.16b, v0.4b[3]\n" + "ldr q10, [%[b_ptr0], #-0x60]\n" + ".word 0x4fa0e9b1 // sdot v17.4s, v13.16b, v0.4b[3]\n" + "ldr q11, [%[b_ptr0], #-0x50]\n" + ".word 0x4fa0e9d2 // sdot v18.4s, v14.16b, v0.4b[3]\n" + "ldr q12, [%[b_ptr0], #-0x40]\n" + ".word 0x4fa0e9f3 // sdot v19.4s, v15.16b, v0.4b[3]\n" + "ldr q13, [%[b_ptr0], #-0x30]\n" + ".word 0x4f84e110 // sdot v16.4s, v8.16b, v4.4b[0]\n" + "ldr q14, [%[b_ptr0], #-0x20]\n" + ".word 0x4f84e131 // sdot v17.4s, v9.16b, v4.4b[0]\n" + "ldr q15, [%[b_ptr0], #-0x10]\n" + ".word 0x4f84e152 // sdot v18.4s, v10.16b, v4.4b[0]\n" + "ldr q8, [%[b_ptr0]]\n" + ".word 0x4f84e173 // sdot v19.4s, v11.16b, v4.4b[0]\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + ".word 0x4fa4e190 // sdot v16.4s, v12.16b, v4.4b[1]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + ".word 0x4fa4e1b1 // sdot v17.4s, v13.16b, v4.4b[1]\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + ".word 0x4fa4e1d2 // sdot v18.4s, v14.16b, v4.4b[1]\n" + "ldr q12, [%[b_ptr0], #0x40]\n" + ".word 0x4fa4e1f3 // sdot v19.4s, v15.16b, v4.4b[1]\n" + "ldr q13, [%[b_ptr0], #0x50]\n" + ".word 0x4f84e910 // sdot v16.4s, v8.16b, v4.4b[2]\n" + "ldr q14, [%[b_ptr0], #0x60]\n" + ".word 0x4f84e931 // sdot v17.4s, v9.16b, v4.4b[2]\n" + "ldr q15, [%[b_ptr0], #0x70]\n" + ".word 0x4f84e952 // sdot v18.4s, v10.16b, v4.4b[2]\n" + "add %[b_ptr0], %[b_ptr0], #0x80\n" + ".word 0x4f84e973 // sdot v19.4s, v11.16b, v4.4b[2]\n" + "add %[a_ptr0], %[a_ptr0], #0x10\n" + ".word 0x4fa4e990 // sdot v16.4s, v12.16b, v4.4b[3]\n" + ".word 0x4fa4e9b1 // sdot v17.4s, v13.16b, v4.4b[3]\n" + ".word 0x4fa4e9d2 // sdot v18.4s, v14.16b, v4.4b[3]\n" + ".word 0x4fa4e9f3 // sdot v19.4s, v15.16b, v4.4b[3]\n" + "b 5f\n" + "4:\n" + ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" + "ldr q8, [%[b_ptr0]]\n" + ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + ".word 0x4fa0e190 // sdot v16.4s, v12.16b, v0.4b[1]\n" + "ldr q12, [%[b_ptr0], #0x40]\n" + ".word 0x4fa0e1b1 // sdot v17.4s, v13.16b, v0.4b[1]\n" + "ldr q13, [%[b_ptr0], #0x50]\n" + ".word 0x4fa0e1d2 // sdot v18.4s, v14.16b, v0.4b[1]\n" + "ldr q14, [%[b_ptr0], #0x60]\n" + ".word 0x4fa0e1f3 // sdot v19.4s, v15.16b, v0.4b[1]\n" + "ldr q15, [%[b_ptr0], #0x70]\n" + ".word 0x4f80e910 // sdot v16.4s, v8.16b, v0.4b[2]\n" + "add %[b_ptr0], %[b_ptr0], #0x80\n" + ".word 0x4f80e931 // sdot v17.4s, v9.16b, v0.4b[2]\n" + ".word 0x4f80e952 // sdot v18.4s, v10.16b, v0.4b[2]\n" + ".word 0x4f80e973 // sdot v19.4s, v11.16b, v0.4b[2]\n" + ".word 0x4fa0e990 // sdot v16.4s, v12.16b, v0.4b[3]\n" + ".word 0x4fa0e9b1 // sdot v17.4s, v13.16b, v0.4b[3]\n" + ".word 0x4fa0e9d2 // sdot v18.4s, v14.16b, v0.4b[3]\n" + ".word 0x4fa0e9f3 // sdot v19.4s, v15.16b, v0.4b[3]\n" + "5:\n" + "cbz %[blocks], 6f\n" + "7:\n" + "ldr q8, [%[b_ptr0]]\n" + "subs %[blocks], %[blocks], #0x1\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + "ldr s0, [%[a_ptr0]]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + "add %[a_ptr0], %[a_ptr0], #0x4\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + "add %[b_ptr0], %[b_ptr0], #0x40\n" + ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" + ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" + ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" + ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" + "b.ne 7b\n" + "6:\n" + "cbz %[odds], 8f\n" + "ld1 {v0.b}[0], [%[a_ptr0]], #1\n" + "subs %[odds], %[odds], #0x1\n" + "b.eq 9f\n" + "ld1 {v0.b}[1], [%[a_ptr0]], #1\n" + "subs %[odds], %[odds], #0x1\n" + "b.eq 9f\n" + "ld1 {v0.b}[2], [%[a_ptr0]]\n" + "9:\n" + "ldr q8, [%[b_ptr0]]\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" + ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" + ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" + ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" + "8:\n" + "str q16, [%[c_ptr0]]\n" + "str q17, [%[c_ptr0], #0x10]\n" + "str q18, [%[c_ptr0], #0x20]\n" + "str q19, [%[c_ptr0], #0x30]\n" + "add %[c_ptr0], %[c_ptr0], #0x40\n" + : [a_ptr0] "+r" (a_ptr0), [b_ptr0] "+r" (b_ptr0), [c_ptr0] "+r" (c_ptr0), [loops] "+r" (loops), [regs] "+r" (regs), [blocks] "+r" (blocks), [odds] "+r" (odds) + : [betaptr] "r" (betaptr), [width] "r" (width), [beta0] "r" (beta0), [lda] "r" (ldab), [ldc] "r" (ldcb) + : "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "cc", "memory" ); break; case 2: __asm __volatile ( - "a_ptr1 .req X0\n" - "c_ptr1 .req X1\n" - "add a_ptr1, %[a_ptr0], %[lda]\n" - "add c_ptr1, %[c_ptr0], %[ldc]\n" - "cbz %[beta0], 1f\n" - "movi v16.4s, #0\n" - "ldr q0, [%[a_ptr0]]\n" - "movi v17.4s, #0\n" - "ldr q1, [a_ptr1]\n" - "movi v18.4s, #0\n" - "ldr q8, [%[b_ptr0]]\n" - "movi v19.4s, #0\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - "movi v20.4s, #0\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - "movi v21.4s, #0\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - "movi v22.4s, #0\n" - "ldr q12, [%[b_ptr0], #0x40]\n" - "movi v23.4s, #0\n" - "ldr q13, [%[b_ptr0], #0x50]\n" - "ldr q14, [%[b_ptr0], #0x60]\n" - "add %[a_ptr0], %[a_ptr0], #0x10\n" - "add a_ptr1, a_ptr1, #0x10\n" - "add %[b_ptr0], %[b_ptr0], #0x80\n" - "cbz %[loops], 2f\n" - "b 3f\n" - "1:\n" - "ld1r {v15.4s}, [%[betaptr]]\n" - "ldr q16, [%[c_ptr0]]\n" - "ldr q17, [%[c_ptr0], #0x10]\n" - "ldr q18, [%[c_ptr0], #0x20]\n" - "ldr q19, [%[c_ptr0], #0x30]\n" - "mul v16.4s, v16.4s, v15.4s\n" - "ldr q20, [c_ptr1]\n" - "mul v17.4s, v17.4s, v15.4s\n" - "ldr q21, [c_ptr1, #0x10]\n" - "mul v18.4s, v18.4s, v15.4s\n" - "ldr q22, [c_ptr1, #0x20]\n" - "mul v19.4s, v19.4s, v15.4s\n" - "ldr q23, [c_ptr1, #0x30]\n" - "mul v20.4s, v20.4s, v15.4s\n" - "ldr q0, [%[a_ptr0]]\n" - "mul v21.4s, v21.4s, v15.4s\n" - "ldr q1, [a_ptr1]\n" - "mul v22.4s, v22.4s, v15.4s\n" - "ldr q8, [%[b_ptr0]]\n" - "mul v23.4s, v23.4s, v15.4s\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - "add %[a_ptr0], %[a_ptr0], #0x10\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - "add a_ptr1, a_ptr1, #0x10\n" - "ldr q12, [%[b_ptr0], #0x40]\n" - "ldr q13, [%[b_ptr0], #0x50]\n" - "ldr q14, [%[b_ptr0], #0x60]\n" - "add %[b_ptr0], %[b_ptr0], #0x80\n" - "cbz %[loops], 2f\n" - "3:\n" - ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" - "ldr q15, [%[b_ptr0], #-0x10]\n" - ".word 0x4f81e114 // sdot v20.4s, v8.16b, v1.4b[0]\n" - "ldr q4, [%[a_ptr0]]\n" - ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" - "ldr q5, [a_ptr1]\n" - ".word 0x4f81e135 // sdot v21.4s, v9.16b, v1.4b[0]\n" - "ldr q8, [%[b_ptr0]]\n" - ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - ".word 0x4f81e156 // sdot v22.4s, v10.16b, v1.4b[0]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" - "subs %[loops], %[loops], #0x1\n" - ".word 0x4f81e177 // sdot v23.4s, v11.16b, v1.4b[0]\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - ".word 0x4fa0e190 // sdot v16.4s, v12.16b, v0.4b[1]\n" - "prfm PLDL1KEEP, [%[a_ptr0], #0x40]\n" - ".word 0x4fa1e194 // sdot v20.4s, v12.16b, v1.4b[1]\n" - "ldr q12, [%[b_ptr0], #0x40]\n" - ".word 0x4fa0e1b1 // sdot v17.4s, v13.16b, v0.4b[1]\n" - "add %[a_ptr0], %[a_ptr0], #0x20\n" - ".word 0x4fa1e1b5 // sdot v21.4s, v13.16b, v1.4b[1]\n" - "ldr q13, [%[b_ptr0], #0x50]\n" - ".word 0x4fa0e1d2 // sdot v18.4s, v14.16b, v0.4b[1]\n" - "add a_ptr1, a_ptr1, #0x20\n" - ".word 0x4fa1e1d6 // sdot v22.4s, v14.16b, v1.4b[1]\n" - "ldr q14, [%[b_ptr0], #0x60]\n" - ".word 0x4fa0e1f3 // sdot v19.4s, v15.16b, v0.4b[1]\n" - "prfm PLDL1KEEP, [a_ptr1, #0x40]\n" - ".word 0x4fa1e1f7 // sdot v23.4s, v15.16b, v1.4b[1]\n" - "ldr q15, [%[b_ptr0], #0x70]\n" - ".word 0x4f80e910 // sdot v16.4s, v8.16b, v0.4b[2]\n" - "add %[b_ptr0], %[b_ptr0], #0x100\n" - ".word 0x4f81e914 // sdot v20.4s, v8.16b, v1.4b[2]\n" - "ldr q8, [%[b_ptr0], #-0x80]\n" - ".word 0x4f80e931 // sdot v17.4s, v9.16b, v0.4b[2]\n" - ".word 0x4f81e935 // sdot v21.4s, v9.16b, v1.4b[2]\n" - "ldr q9, [%[b_ptr0], #-0x70]\n" - ".word 0x4f80e952 // sdot v18.4s, v10.16b, v0.4b[2]\n" - ".word 0x4f81e956 // sdot v22.4s, v10.16b, v1.4b[2]\n" - "ldr q10, [%[b_ptr0], #-0x60]\n" - ".word 0x4f80e973 // sdot v19.4s, v11.16b, v0.4b[2]\n" - ".word 0x4f81e977 // sdot v23.4s, v11.16b, v1.4b[2]\n" - "ldr q11, [%[b_ptr0], #-0x50]\n" - ".word 0x4fa0e990 // sdot v16.4s, v12.16b, v0.4b[3]\n" - ".word 0x4fa1e994 // sdot v20.4s, v12.16b, v1.4b[3]\n" - "ldr q12, [%[b_ptr0], #-0x40]\n" - ".word 0x4fa0e9b1 // sdot v17.4s, v13.16b, v0.4b[3]\n" - ".word 0x4fa1e9b5 // sdot v21.4s, v13.16b, v1.4b[3]\n" - "ldr q13, [%[b_ptr0], #-0x30]\n" - ".word 0x4fa0e9d2 // sdot v18.4s, v14.16b, v0.4b[3]\n" - ".word 0x4fa1e9d6 // sdot v22.4s, v14.16b, v1.4b[3]\n" - "ldr q14, [%[b_ptr0], #-0x20]\n" - ".word 0x4fa0e9f3 // sdot v19.4s, v15.16b, v0.4b[3]\n" - "ldr q0, [%[a_ptr0], #-0x10]\n" - ".word 0x4fa1e9f7 // sdot v23.4s, v15.16b, v1.4b[3]\n" - "ldr q15, [%[b_ptr0], #-0x10]\n" - ".word 0x4f84e110 // sdot v16.4s, v8.16b, v4.4b[0]\n" - "ldr q1, [a_ptr1, #-0x10]\n" - ".word 0x4f85e114 // sdot v20.4s, v8.16b, v5.4b[0]\n" - "ldr q8, [%[b_ptr0]]\n" - ".word 0x4f84e131 // sdot v17.4s, v9.16b, v4.4b[0]\n" - ".word 0x4f85e135 // sdot v21.4s, v9.16b, v5.4b[0]\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - ".word 0x4f84e152 // sdot v18.4s, v10.16b, v4.4b[0]\n" - ".word 0x4f85e156 // sdot v22.4s, v10.16b, v5.4b[0]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - ".word 0x4f84e173 // sdot v19.4s, v11.16b, v4.4b[0]\n" - ".word 0x4f85e177 // sdot v23.4s, v11.16b, v5.4b[0]\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - ".word 0x4fa4e190 // sdot v16.4s, v12.16b, v4.4b[1]\n" - ".word 0x4fa5e194 // sdot v20.4s, v12.16b, v5.4b[1]\n" - "ldr q12, [%[b_ptr0], #0x40]\n" - ".word 0x4fa4e1b1 // sdot v17.4s, v13.16b, v4.4b[1]\n" - ".word 0x4fa5e1b5 // sdot v21.4s, v13.16b, v5.4b[1]\n" - "ldr q13, [%[b_ptr0], #0x50]\n" - ".word 0x4fa4e1d2 // sdot v18.4s, v14.16b, v4.4b[1]\n" - ".word 0x4fa5e1d6 // sdot v22.4s, v14.16b, v5.4b[1]\n" - "ldr q14, [%[b_ptr0], #0x60]\n" - ".word 0x4fa4e1f3 // sdot v19.4s, v15.16b, v4.4b[1]\n" - ".word 0x4fa5e1f7 // sdot v23.4s, v15.16b, v5.4b[1]\n" - "ldr q15, [%[b_ptr0], #0x70]\n" - ".word 0x4f84e910 // sdot v16.4s, v8.16b, v4.4b[2]\n" - "add %[b_ptr0], %[b_ptr0], #0x100\n" - ".word 0x4f85e914 // sdot v20.4s, v8.16b, v5.4b[2]\n" - "ldr q8, [%[b_ptr0], #-0x80]\n" - ".word 0x4f84e931 // sdot v17.4s, v9.16b, v4.4b[2]\n" - ".word 0x4f85e935 // sdot v21.4s, v9.16b, v5.4b[2]\n" - "ldr q9, [%[b_ptr0], #-0x70]\n" - ".word 0x4f84e952 // sdot v18.4s, v10.16b, v4.4b[2]\n" - ".word 0x4f85e956 // sdot v22.4s, v10.16b, v5.4b[2]\n" - "ldr q10, [%[b_ptr0], #-0x60]\n" - ".word 0x4f84e973 // sdot v19.4s, v11.16b, v4.4b[2]\n" - ".word 0x4f85e977 // sdot v23.4s, v11.16b, v5.4b[2]\n" - "ldr q11, [%[b_ptr0], #-0x50]\n" - ".word 0x4fa4e990 // sdot v16.4s, v12.16b, v4.4b[3]\n" - ".word 0x4fa5e994 // sdot v20.4s, v12.16b, v5.4b[3]\n" - "ldr q12, [%[b_ptr0], #-0x40]\n" - ".word 0x4fa4e9b1 // sdot v17.4s, v13.16b, v4.4b[3]\n" - ".word 0x4fa5e9b5 // sdot v21.4s, v13.16b, v5.4b[3]\n" - "ldr q13, [%[b_ptr0], #-0x30]\n" - ".word 0x4fa4e9d2 // sdot v18.4s, v14.16b, v4.4b[3]\n" - ".word 0x4fa5e9d6 // sdot v22.4s, v14.16b, v5.4b[3]\n" - "ldr q14, [%[b_ptr0], #-0x20]\n" - ".word 0x4fa4e9f3 // sdot v19.4s, v15.16b, v4.4b[3]\n" - ".word 0x4fa5e9f7 // sdot v23.4s, v15.16b, v5.4b[3]\n" - "b.ne 3b\n" - "2:\n" - "ldr q15, [%[b_ptr0], #-0x10]\n" - "prfm PSTL1KEEP, [%[c_ptr0]]\n" - "prfm PSTL1KEEP, [c_ptr1]\n" - "cbz %[regs], 4f\n" - ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" - "ldr q4, [%[a_ptr0]]\n" - ".word 0x4f81e114 // sdot v20.4s, v8.16b, v1.4b[0]\n" - "ldr q5, [a_ptr1]\n" - ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" - "ldr q8, [%[b_ptr0]]\n" - ".word 0x4f81e135 // sdot v21.4s, v9.16b, v1.4b[0]\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" - "add %[a_ptr0], %[a_ptr0], #0x10\n" - ".word 0x4f81e156 // sdot v22.4s, v10.16b, v1.4b[0]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" - "add a_ptr1, a_ptr1, #0x10\n" - ".word 0x4f81e177 // sdot v23.4s, v11.16b, v1.4b[0]\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - ".word 0x4fa0e190 // sdot v16.4s, v12.16b, v0.4b[1]\n" - ".word 0x4fa1e194 // sdot v20.4s, v12.16b, v1.4b[1]\n" - "ldr q12, [%[b_ptr0], #0x40]\n" - ".word 0x4fa0e1b1 // sdot v17.4s, v13.16b, v0.4b[1]\n" - ".word 0x4fa1e1b5 // sdot v21.4s, v13.16b, v1.4b[1]\n" - "ldr q13, [%[b_ptr0], #0x50]\n" - ".word 0x4fa0e1d2 // sdot v18.4s, v14.16b, v0.4b[1]\n" - ".word 0x4fa1e1d6 // sdot v22.4s, v14.16b, v1.4b[1]\n" - "ldr q14, [%[b_ptr0], #0x60]\n" - ".word 0x4fa0e1f3 // sdot v19.4s, v15.16b, v0.4b[1]\n" - ".word 0x4fa1e1f7 // sdot v23.4s, v15.16b, v1.4b[1]\n" - "ldr q15, [%[b_ptr0], #0x70]\n" - ".word 0x4f80e910 // sdot v16.4s, v8.16b, v0.4b[2]\n" - "add %[b_ptr0], %[b_ptr0], #0x100\n" - ".word 0x4f81e914 // sdot v20.4s, v8.16b, v1.4b[2]\n" - "ldr q8, [%[b_ptr0], #-0x80]\n" - ".word 0x4f80e931 // sdot v17.4s, v9.16b, v0.4b[2]\n" - ".word 0x4f81e935 // sdot v21.4s, v9.16b, v1.4b[2]\n" - "ldr q9, [%[b_ptr0], #-0x70]\n" - ".word 0x4f80e952 // sdot v18.4s, v10.16b, v0.4b[2]\n" - ".word 0x4f81e956 // sdot v22.4s, v10.16b, v1.4b[2]\n" - "ldr q10, [%[b_ptr0], #-0x60]\n" - ".word 0x4f80e973 // sdot v19.4s, v11.16b, v0.4b[2]\n" - ".word 0x4f81e977 // sdot v23.4s, v11.16b, v1.4b[2]\n" - "ldr q11, [%[b_ptr0], #-0x50]\n" - ".word 0x4fa0e990 // sdot v16.4s, v12.16b, v0.4b[3]\n" - ".word 0x4fa1e994 // sdot v20.4s, v12.16b, v1.4b[3]\n" - "ldr q12, [%[b_ptr0], #-0x40]\n" - ".word 0x4fa0e9b1 // sdot v17.4s, v13.16b, v0.4b[3]\n" - ".word 0x4fa1e9b5 // sdot v21.4s, v13.16b, v1.4b[3]\n" - "ldr q13, [%[b_ptr0], #-0x30]\n" - ".word 0x4fa0e9d2 // sdot v18.4s, v14.16b, v0.4b[3]\n" - ".word 0x4fa1e9d6 // sdot v22.4s, v14.16b, v1.4b[3]\n" - "ldr q14, [%[b_ptr0], #-0x20]\n" - ".word 0x4fa0e9f3 // sdot v19.4s, v15.16b, v0.4b[3]\n" - ".word 0x4fa1e9f7 // sdot v23.4s, v15.16b, v1.4b[3]\n" - "ldr q15, [%[b_ptr0], #-0x10]\n" - ".word 0x4f84e110 // sdot v16.4s, v8.16b, v4.4b[0]\n" - ".word 0x4f85e114 // sdot v20.4s, v8.16b, v5.4b[0]\n" - "ldr q8, [%[b_ptr0]]\n" - ".word 0x4f84e131 // sdot v17.4s, v9.16b, v4.4b[0]\n" - ".word 0x4f85e135 // sdot v21.4s, v9.16b, v5.4b[0]\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - ".word 0x4f84e152 // sdot v18.4s, v10.16b, v4.4b[0]\n" - ".word 0x4f85e156 // sdot v22.4s, v10.16b, v5.4b[0]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - ".word 0x4f84e173 // sdot v19.4s, v11.16b, v4.4b[0]\n" - ".word 0x4f85e177 // sdot v23.4s, v11.16b, v5.4b[0]\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - ".word 0x4fa4e190 // sdot v16.4s, v12.16b, v4.4b[1]\n" - ".word 0x4fa5e194 // sdot v20.4s, v12.16b, v5.4b[1]\n" - "ldr q12, [%[b_ptr0], #0x40]\n" - ".word 0x4fa4e1b1 // sdot v17.4s, v13.16b, v4.4b[1]\n" - ".word 0x4fa5e1b5 // sdot v21.4s, v13.16b, v5.4b[1]\n" - "ldr q13, [%[b_ptr0], #0x50]\n" - ".word 0x4fa4e1d2 // sdot v18.4s, v14.16b, v4.4b[1]\n" - ".word 0x4fa5e1d6 // sdot v22.4s, v14.16b, v5.4b[1]\n" - "ldr q14, [%[b_ptr0], #0x60]\n" - ".word 0x4fa4e1f3 // sdot v19.4s, v15.16b, v4.4b[1]\n" - ".word 0x4fa5e1f7 // sdot v23.4s, v15.16b, v5.4b[1]\n" - "ldr q15, [%[b_ptr0], #0x70]\n" - ".word 0x4f84e910 // sdot v16.4s, v8.16b, v4.4b[2]\n" - "add %[b_ptr0], %[b_ptr0], #0x80\n" - ".word 0x4f85e914 // sdot v20.4s, v8.16b, v5.4b[2]\n" - ".word 0x4f84e931 // sdot v17.4s, v9.16b, v4.4b[2]\n" - ".word 0x4f85e935 // sdot v21.4s, v9.16b, v5.4b[2]\n" - ".word 0x4f84e952 // sdot v18.4s, v10.16b, v4.4b[2]\n" - ".word 0x4f85e956 // sdot v22.4s, v10.16b, v5.4b[2]\n" - ".word 0x4f84e973 // sdot v19.4s, v11.16b, v4.4b[2]\n" - ".word 0x4f85e977 // sdot v23.4s, v11.16b, v5.4b[2]\n" - ".word 0x4fa4e990 // sdot v16.4s, v12.16b, v4.4b[3]\n" - ".word 0x4fa5e994 // sdot v20.4s, v12.16b, v5.4b[3]\n" - ".word 0x4fa4e9b1 // sdot v17.4s, v13.16b, v4.4b[3]\n" - ".word 0x4fa5e9b5 // sdot v21.4s, v13.16b, v5.4b[3]\n" - ".word 0x4fa4e9d2 // sdot v18.4s, v14.16b, v4.4b[3]\n" - ".word 0x4fa5e9d6 // sdot v22.4s, v14.16b, v5.4b[3]\n" - ".word 0x4fa4e9f3 // sdot v19.4s, v15.16b, v4.4b[3]\n" - ".word 0x4fa5e9f7 // sdot v23.4s, v15.16b, v5.4b[3]\n" - "b 5f\n" - "4:\n" - ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" - ".word 0x4f81e114 // sdot v20.4s, v8.16b, v1.4b[0]\n" - "ldr q8, [%[b_ptr0]]\n" - ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" - ".word 0x4f81e135 // sdot v21.4s, v9.16b, v1.4b[0]\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" - ".word 0x4f81e156 // sdot v22.4s, v10.16b, v1.4b[0]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" - ".word 0x4f81e177 // sdot v23.4s, v11.16b, v1.4b[0]\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - ".word 0x4fa0e190 // sdot v16.4s, v12.16b, v0.4b[1]\n" - ".word 0x4fa1e194 // sdot v20.4s, v12.16b, v1.4b[1]\n" - "ldr q12, [%[b_ptr0], #0x40]\n" - ".word 0x4fa0e1b1 // sdot v17.4s, v13.16b, v0.4b[1]\n" - ".word 0x4fa1e1b5 // sdot v21.4s, v13.16b, v1.4b[1]\n" - "ldr q13, [%[b_ptr0], #0x50]\n" - ".word 0x4fa0e1d2 // sdot v18.4s, v14.16b, v0.4b[1]\n" - ".word 0x4fa1e1d6 // sdot v22.4s, v14.16b, v1.4b[1]\n" - "ldr q14, [%[b_ptr0], #0x60]\n" - ".word 0x4fa0e1f3 // sdot v19.4s, v15.16b, v0.4b[1]\n" - ".word 0x4fa1e1f7 // sdot v23.4s, v15.16b, v1.4b[1]\n" - "ldr q15, [%[b_ptr0], #0x70]\n" - ".word 0x4f80e910 // sdot v16.4s, v8.16b, v0.4b[2]\n" - "add %[b_ptr0], %[b_ptr0], #0x80\n" - ".word 0x4f81e914 // sdot v20.4s, v8.16b, v1.4b[2]\n" - ".word 0x4f80e931 // sdot v17.4s, v9.16b, v0.4b[2]\n" - ".word 0x4f81e935 // sdot v21.4s, v9.16b, v1.4b[2]\n" - ".word 0x4f80e952 // sdot v18.4s, v10.16b, v0.4b[2]\n" - ".word 0x4f81e956 // sdot v22.4s, v10.16b, v1.4b[2]\n" - ".word 0x4f80e973 // sdot v19.4s, v11.16b, v0.4b[2]\n" - ".word 0x4f81e977 // sdot v23.4s, v11.16b, v1.4b[2]\n" - ".word 0x4fa0e990 // sdot v16.4s, v12.16b, v0.4b[3]\n" - ".word 0x4fa1e994 // sdot v20.4s, v12.16b, v1.4b[3]\n" - ".word 0x4fa0e9b1 // sdot v17.4s, v13.16b, v0.4b[3]\n" - ".word 0x4fa1e9b5 // sdot v21.4s, v13.16b, v1.4b[3]\n" - ".word 0x4fa0e9d2 // sdot v18.4s, v14.16b, v0.4b[3]\n" - ".word 0x4fa1e9d6 // sdot v22.4s, v14.16b, v1.4b[3]\n" - ".word 0x4fa0e9f3 // sdot v19.4s, v15.16b, v0.4b[3]\n" - ".word 0x4fa1e9f7 // sdot v23.4s, v15.16b, v1.4b[3]\n" - "5:\n" - "cbz %[blocks], 6f\n" - "7:\n" - "ldr q8, [%[b_ptr0]]\n" - "subs %[blocks], %[blocks], #0x1\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - "ldr s0, [%[a_ptr0]]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - "add %[a_ptr0], %[a_ptr0], #0x4\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - "add %[b_ptr0], %[b_ptr0], #0x40\n" - ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" - "ldr s1, [a_ptr1]\n" - ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" - "add a_ptr1, a_ptr1, #0x4\n" - ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" - ".word 0x4f81e114 // sdot v20.4s, v8.16b, v1.4b[0]\n" - ".word 0x4f81e135 // sdot v21.4s, v9.16b, v1.4b[0]\n" - ".word 0x4f81e156 // sdot v22.4s, v10.16b, v1.4b[0]\n" - ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" - ".word 0x4f81e177 // sdot v23.4s, v11.16b, v1.4b[0]\n" - "b.ne 7b\n" - "6:\n" - "cbz %[odds], 8f\n" - "ld1 {v0.b}[0], [%[a_ptr0]], #1\n" - "ld1 {v1.b}[0], [a_ptr1], #1\n" - "subs %[odds], %[odds], #0x1\n" - "b.eq 9f\n" - "ld1 {v0.b}[1], [%[a_ptr0]], #1\n" - "ld1 {v1.b}[1], [a_ptr1], #1\n" - "subs %[odds], %[odds], #0x1\n" - "b.eq 9f\n" - "ld1 {v0.b}[2], [%[a_ptr0]]\n" - "ld1 {v1.b}[2], [a_ptr1]\n" - "9:\n" - "ldr q8, [%[b_ptr0]]\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" - ".word 0x4f81e114 // sdot v20.4s, v8.16b, v1.4b[0]\n" - ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" - ".word 0x4f81e135 // sdot v21.4s, v9.16b, v1.4b[0]\n" - ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" - ".word 0x4f81e156 // sdot v22.4s, v10.16b, v1.4b[0]\n" - ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" - ".word 0x4f81e177 // sdot v23.4s, v11.16b, v1.4b[0]\n" - "8:\n" - "str q16, [%[c_ptr0]]\n" - "str q17, [%[c_ptr0], #0x10]\n" - "str q18, [%[c_ptr0], #0x20]\n" - "str q19, [%[c_ptr0], #0x30]\n" - "add %[c_ptr0], %[c_ptr0], #0x40\n" - "str q20, [c_ptr1]\n" - "str q21, [c_ptr1, #0x10]\n" - "str q22, [c_ptr1, #0x20]\n" - "str q23, [c_ptr1, #0x30]\n" - ".unreq a_ptr1\n" - ".unreq c_ptr1\n" - : [a_ptr0] "+r" (a_ptr0), [b_ptr0] "+r" (b_ptr0), [c_ptr0] "+r" (c_ptr0), [loops] "+r" (loops), [regs] "+r" (regs), [blocks] "+r" (blocks), [odds] "+r" (odds) - : [betaptr] "r" (betaptr), [width] "r" (width), [beta0] "r" (beta0), [lda] "r" (ldab), [ldc] "r" (ldcb) - : "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x0", "x1", "cc", "memory" + "a_ptr1 .req X0\n" + "c_ptr1 .req X1\n" + "add a_ptr1, %[a_ptr0], %[lda]\n" + "add c_ptr1, %[c_ptr0], %[ldc]\n" + "cbz %[beta0], 1f\n" + "movi v16.4s, #0\n" + "ldr q0, [%[a_ptr0]]\n" + "movi v17.4s, #0\n" + "ldr q1, [a_ptr1]\n" + "movi v18.4s, #0\n" + "ldr q8, [%[b_ptr0]]\n" + "movi v19.4s, #0\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + "movi v20.4s, #0\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + "movi v21.4s, #0\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + "movi v22.4s, #0\n" + "ldr q12, [%[b_ptr0], #0x40]\n" + "movi v23.4s, #0\n" + "ldr q13, [%[b_ptr0], #0x50]\n" + "ldr q14, [%[b_ptr0], #0x60]\n" + "add %[a_ptr0], %[a_ptr0], #0x10\n" + "add a_ptr1, a_ptr1, #0x10\n" + "add %[b_ptr0], %[b_ptr0], #0x80\n" + "cbz %[loops], 2f\n" + "b 3f\n" + "1:\n" + "ld1r {v15.4s}, [%[betaptr]]\n" + "ldr q16, [%[c_ptr0]]\n" + "ldr q17, [%[c_ptr0], #0x10]\n" + "ldr q18, [%[c_ptr0], #0x20]\n" + "ldr q19, [%[c_ptr0], #0x30]\n" + "mul v16.4s, v16.4s, v15.4s\n" + "ldr q20, [c_ptr1]\n" + "mul v17.4s, v17.4s, v15.4s\n" + "ldr q21, [c_ptr1, #0x10]\n" + "mul v18.4s, v18.4s, v15.4s\n" + "ldr q22, [c_ptr1, #0x20]\n" + "mul v19.4s, v19.4s, v15.4s\n" + "ldr q23, [c_ptr1, #0x30]\n" + "mul v20.4s, v20.4s, v15.4s\n" + "ldr q0, [%[a_ptr0]]\n" + "mul v21.4s, v21.4s, v15.4s\n" + "ldr q1, [a_ptr1]\n" + "mul v22.4s, v22.4s, v15.4s\n" + "ldr q8, [%[b_ptr0]]\n" + "mul v23.4s, v23.4s, v15.4s\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + "add %[a_ptr0], %[a_ptr0], #0x10\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + "add a_ptr1, a_ptr1, #0x10\n" + "ldr q12, [%[b_ptr0], #0x40]\n" + "ldr q13, [%[b_ptr0], #0x50]\n" + "ldr q14, [%[b_ptr0], #0x60]\n" + "add %[b_ptr0], %[b_ptr0], #0x80\n" + "cbz %[loops], 2f\n" + "3:\n" + ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" + "ldr q15, [%[b_ptr0], #-0x10]\n" + ".word 0x4f81e114 // sdot v20.4s, v8.16b, v1.4b[0]\n" + "ldr q4, [%[a_ptr0]]\n" + ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" + "ldr q5, [a_ptr1]\n" + ".word 0x4f81e135 // sdot v21.4s, v9.16b, v1.4b[0]\n" + "ldr q8, [%[b_ptr0]]\n" + ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + ".word 0x4f81e156 // sdot v22.4s, v10.16b, v1.4b[0]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" + "subs %[loops], %[loops], #0x1\n" + ".word 0x4f81e177 // sdot v23.4s, v11.16b, v1.4b[0]\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + ".word 0x4fa0e190 // sdot v16.4s, v12.16b, v0.4b[1]\n" + "prfm PLDL1KEEP, [%[a_ptr0], #0x40]\n" + ".word 0x4fa1e194 // sdot v20.4s, v12.16b, v1.4b[1]\n" + "ldr q12, [%[b_ptr0], #0x40]\n" + ".word 0x4fa0e1b1 // sdot v17.4s, v13.16b, v0.4b[1]\n" + "add %[a_ptr0], %[a_ptr0], #0x20\n" + ".word 0x4fa1e1b5 // sdot v21.4s, v13.16b, v1.4b[1]\n" + "ldr q13, [%[b_ptr0], #0x50]\n" + ".word 0x4fa0e1d2 // sdot v18.4s, v14.16b, v0.4b[1]\n" + "add a_ptr1, a_ptr1, #0x20\n" + ".word 0x4fa1e1d6 // sdot v22.4s, v14.16b, v1.4b[1]\n" + "ldr q14, [%[b_ptr0], #0x60]\n" + ".word 0x4fa0e1f3 // sdot v19.4s, v15.16b, v0.4b[1]\n" + "prfm PLDL1KEEP, [a_ptr1, #0x40]\n" + ".word 0x4fa1e1f7 // sdot v23.4s, v15.16b, v1.4b[1]\n" + "ldr q15, [%[b_ptr0], #0x70]\n" + ".word 0x4f80e910 // sdot v16.4s, v8.16b, v0.4b[2]\n" + "add %[b_ptr0], %[b_ptr0], #0x100\n" + ".word 0x4f81e914 // sdot v20.4s, v8.16b, v1.4b[2]\n" + "ldr q8, [%[b_ptr0], #-0x80]\n" + ".word 0x4f80e931 // sdot v17.4s, v9.16b, v0.4b[2]\n" + ".word 0x4f81e935 // sdot v21.4s, v9.16b, v1.4b[2]\n" + "ldr q9, [%[b_ptr0], #-0x70]\n" + ".word 0x4f80e952 // sdot v18.4s, v10.16b, v0.4b[2]\n" + ".word 0x4f81e956 // sdot v22.4s, v10.16b, v1.4b[2]\n" + "ldr q10, [%[b_ptr0], #-0x60]\n" + ".word 0x4f80e973 // sdot v19.4s, v11.16b, v0.4b[2]\n" + ".word 0x4f81e977 // sdot v23.4s, v11.16b, v1.4b[2]\n" + "ldr q11, [%[b_ptr0], #-0x50]\n" + ".word 0x4fa0e990 // sdot v16.4s, v12.16b, v0.4b[3]\n" + ".word 0x4fa1e994 // sdot v20.4s, v12.16b, v1.4b[3]\n" + "ldr q12, [%[b_ptr0], #-0x40]\n" + ".word 0x4fa0e9b1 // sdot v17.4s, v13.16b, v0.4b[3]\n" + ".word 0x4fa1e9b5 // sdot v21.4s, v13.16b, v1.4b[3]\n" + "ldr q13, [%[b_ptr0], #-0x30]\n" + ".word 0x4fa0e9d2 // sdot v18.4s, v14.16b, v0.4b[3]\n" + ".word 0x4fa1e9d6 // sdot v22.4s, v14.16b, v1.4b[3]\n" + "ldr q14, [%[b_ptr0], #-0x20]\n" + ".word 0x4fa0e9f3 // sdot v19.4s, v15.16b, v0.4b[3]\n" + "ldr q0, [%[a_ptr0], #-0x10]\n" + ".word 0x4fa1e9f7 // sdot v23.4s, v15.16b, v1.4b[3]\n" + "ldr q15, [%[b_ptr0], #-0x10]\n" + ".word 0x4f84e110 // sdot v16.4s, v8.16b, v4.4b[0]\n" + "ldr q1, [a_ptr1, #-0x10]\n" + ".word 0x4f85e114 // sdot v20.4s, v8.16b, v5.4b[0]\n" + "ldr q8, [%[b_ptr0]]\n" + ".word 0x4f84e131 // sdot v17.4s, v9.16b, v4.4b[0]\n" + ".word 0x4f85e135 // sdot v21.4s, v9.16b, v5.4b[0]\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + ".word 0x4f84e152 // sdot v18.4s, v10.16b, v4.4b[0]\n" + ".word 0x4f85e156 // sdot v22.4s, v10.16b, v5.4b[0]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + ".word 0x4f84e173 // sdot v19.4s, v11.16b, v4.4b[0]\n" + ".word 0x4f85e177 // sdot v23.4s, v11.16b, v5.4b[0]\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + ".word 0x4fa4e190 // sdot v16.4s, v12.16b, v4.4b[1]\n" + ".word 0x4fa5e194 // sdot v20.4s, v12.16b, v5.4b[1]\n" + "ldr q12, [%[b_ptr0], #0x40]\n" + ".word 0x4fa4e1b1 // sdot v17.4s, v13.16b, v4.4b[1]\n" + ".word 0x4fa5e1b5 // sdot v21.4s, v13.16b, v5.4b[1]\n" + "ldr q13, [%[b_ptr0], #0x50]\n" + ".word 0x4fa4e1d2 // sdot v18.4s, v14.16b, v4.4b[1]\n" + ".word 0x4fa5e1d6 // sdot v22.4s, v14.16b, v5.4b[1]\n" + "ldr q14, [%[b_ptr0], #0x60]\n" + ".word 0x4fa4e1f3 // sdot v19.4s, v15.16b, v4.4b[1]\n" + ".word 0x4fa5e1f7 // sdot v23.4s, v15.16b, v5.4b[1]\n" + "ldr q15, [%[b_ptr0], #0x70]\n" + ".word 0x4f84e910 // sdot v16.4s, v8.16b, v4.4b[2]\n" + "add %[b_ptr0], %[b_ptr0], #0x100\n" + ".word 0x4f85e914 // sdot v20.4s, v8.16b, v5.4b[2]\n" + "ldr q8, [%[b_ptr0], #-0x80]\n" + ".word 0x4f84e931 // sdot v17.4s, v9.16b, v4.4b[2]\n" + ".word 0x4f85e935 // sdot v21.4s, v9.16b, v5.4b[2]\n" + "ldr q9, [%[b_ptr0], #-0x70]\n" + ".word 0x4f84e952 // sdot v18.4s, v10.16b, v4.4b[2]\n" + ".word 0x4f85e956 // sdot v22.4s, v10.16b, v5.4b[2]\n" + "ldr q10, [%[b_ptr0], #-0x60]\n" + ".word 0x4f84e973 // sdot v19.4s, v11.16b, v4.4b[2]\n" + ".word 0x4f85e977 // sdot v23.4s, v11.16b, v5.4b[2]\n" + "ldr q11, [%[b_ptr0], #-0x50]\n" + ".word 0x4fa4e990 // sdot v16.4s, v12.16b, v4.4b[3]\n" + ".word 0x4fa5e994 // sdot v20.4s, v12.16b, v5.4b[3]\n" + "ldr q12, [%[b_ptr0], #-0x40]\n" + ".word 0x4fa4e9b1 // sdot v17.4s, v13.16b, v4.4b[3]\n" + ".word 0x4fa5e9b5 // sdot v21.4s, v13.16b, v5.4b[3]\n" + "ldr q13, [%[b_ptr0], #-0x30]\n" + ".word 0x4fa4e9d2 // sdot v18.4s, v14.16b, v4.4b[3]\n" + ".word 0x4fa5e9d6 // sdot v22.4s, v14.16b, v5.4b[3]\n" + "ldr q14, [%[b_ptr0], #-0x20]\n" + ".word 0x4fa4e9f3 // sdot v19.4s, v15.16b, v4.4b[3]\n" + ".word 0x4fa5e9f7 // sdot v23.4s, v15.16b, v5.4b[3]\n" + "b.ne 3b\n" + "2:\n" + "ldr q15, [%[b_ptr0], #-0x10]\n" + "prfm PSTL1KEEP, [%[c_ptr0]]\n" + "prfm PSTL1KEEP, [c_ptr1]\n" + "cbz %[regs], 4f\n" + ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" + "ldr q4, [%[a_ptr0]]\n" + ".word 0x4f81e114 // sdot v20.4s, v8.16b, v1.4b[0]\n" + "ldr q5, [a_ptr1]\n" + ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" + "ldr q8, [%[b_ptr0]]\n" + ".word 0x4f81e135 // sdot v21.4s, v9.16b, v1.4b[0]\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" + "add %[a_ptr0], %[a_ptr0], #0x10\n" + ".word 0x4f81e156 // sdot v22.4s, v10.16b, v1.4b[0]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" + "add a_ptr1, a_ptr1, #0x10\n" + ".word 0x4f81e177 // sdot v23.4s, v11.16b, v1.4b[0]\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + ".word 0x4fa0e190 // sdot v16.4s, v12.16b, v0.4b[1]\n" + ".word 0x4fa1e194 // sdot v20.4s, v12.16b, v1.4b[1]\n" + "ldr q12, [%[b_ptr0], #0x40]\n" + ".word 0x4fa0e1b1 // sdot v17.4s, v13.16b, v0.4b[1]\n" + ".word 0x4fa1e1b5 // sdot v21.4s, v13.16b, v1.4b[1]\n" + "ldr q13, [%[b_ptr0], #0x50]\n" + ".word 0x4fa0e1d2 // sdot v18.4s, v14.16b, v0.4b[1]\n" + ".word 0x4fa1e1d6 // sdot v22.4s, v14.16b, v1.4b[1]\n" + "ldr q14, [%[b_ptr0], #0x60]\n" + ".word 0x4fa0e1f3 // sdot v19.4s, v15.16b, v0.4b[1]\n" + ".word 0x4fa1e1f7 // sdot v23.4s, v15.16b, v1.4b[1]\n" + "ldr q15, [%[b_ptr0], #0x70]\n" + ".word 0x4f80e910 // sdot v16.4s, v8.16b, v0.4b[2]\n" + "add %[b_ptr0], %[b_ptr0], #0x100\n" + ".word 0x4f81e914 // sdot v20.4s, v8.16b, v1.4b[2]\n" + "ldr q8, [%[b_ptr0], #-0x80]\n" + ".word 0x4f80e931 // sdot v17.4s, v9.16b, v0.4b[2]\n" + ".word 0x4f81e935 // sdot v21.4s, v9.16b, v1.4b[2]\n" + "ldr q9, [%[b_ptr0], #-0x70]\n" + ".word 0x4f80e952 // sdot v18.4s, v10.16b, v0.4b[2]\n" + ".word 0x4f81e956 // sdot v22.4s, v10.16b, v1.4b[2]\n" + "ldr q10, [%[b_ptr0], #-0x60]\n" + ".word 0x4f80e973 // sdot v19.4s, v11.16b, v0.4b[2]\n" + ".word 0x4f81e977 // sdot v23.4s, v11.16b, v1.4b[2]\n" + "ldr q11, [%[b_ptr0], #-0x50]\n" + ".word 0x4fa0e990 // sdot v16.4s, v12.16b, v0.4b[3]\n" + ".word 0x4fa1e994 // sdot v20.4s, v12.16b, v1.4b[3]\n" + "ldr q12, [%[b_ptr0], #-0x40]\n" + ".word 0x4fa0e9b1 // sdot v17.4s, v13.16b, v0.4b[3]\n" + ".word 0x4fa1e9b5 // sdot v21.4s, v13.16b, v1.4b[3]\n" + "ldr q13, [%[b_ptr0], #-0x30]\n" + ".word 0x4fa0e9d2 // sdot v18.4s, v14.16b, v0.4b[3]\n" + ".word 0x4fa1e9d6 // sdot v22.4s, v14.16b, v1.4b[3]\n" + "ldr q14, [%[b_ptr0], #-0x20]\n" + ".word 0x4fa0e9f3 // sdot v19.4s, v15.16b, v0.4b[3]\n" + ".word 0x4fa1e9f7 // sdot v23.4s, v15.16b, v1.4b[3]\n" + "ldr q15, [%[b_ptr0], #-0x10]\n" + ".word 0x4f84e110 // sdot v16.4s, v8.16b, v4.4b[0]\n" + ".word 0x4f85e114 // sdot v20.4s, v8.16b, v5.4b[0]\n" + "ldr q8, [%[b_ptr0]]\n" + ".word 0x4f84e131 // sdot v17.4s, v9.16b, v4.4b[0]\n" + ".word 0x4f85e135 // sdot v21.4s, v9.16b, v5.4b[0]\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + ".word 0x4f84e152 // sdot v18.4s, v10.16b, v4.4b[0]\n" + ".word 0x4f85e156 // sdot v22.4s, v10.16b, v5.4b[0]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + ".word 0x4f84e173 // sdot v19.4s, v11.16b, v4.4b[0]\n" + ".word 0x4f85e177 // sdot v23.4s, v11.16b, v5.4b[0]\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + ".word 0x4fa4e190 // sdot v16.4s, v12.16b, v4.4b[1]\n" + ".word 0x4fa5e194 // sdot v20.4s, v12.16b, v5.4b[1]\n" + "ldr q12, [%[b_ptr0], #0x40]\n" + ".word 0x4fa4e1b1 // sdot v17.4s, v13.16b, v4.4b[1]\n" + ".word 0x4fa5e1b5 // sdot v21.4s, v13.16b, v5.4b[1]\n" + "ldr q13, [%[b_ptr0], #0x50]\n" + ".word 0x4fa4e1d2 // sdot v18.4s, v14.16b, v4.4b[1]\n" + ".word 0x4fa5e1d6 // sdot v22.4s, v14.16b, v5.4b[1]\n" + "ldr q14, [%[b_ptr0], #0x60]\n" + ".word 0x4fa4e1f3 // sdot v19.4s, v15.16b, v4.4b[1]\n" + ".word 0x4fa5e1f7 // sdot v23.4s, v15.16b, v5.4b[1]\n" + "ldr q15, [%[b_ptr0], #0x70]\n" + ".word 0x4f84e910 // sdot v16.4s, v8.16b, v4.4b[2]\n" + "add %[b_ptr0], %[b_ptr0], #0x80\n" + ".word 0x4f85e914 // sdot v20.4s, v8.16b, v5.4b[2]\n" + ".word 0x4f84e931 // sdot v17.4s, v9.16b, v4.4b[2]\n" + ".word 0x4f85e935 // sdot v21.4s, v9.16b, v5.4b[2]\n" + ".word 0x4f84e952 // sdot v18.4s, v10.16b, v4.4b[2]\n" + ".word 0x4f85e956 // sdot v22.4s, v10.16b, v5.4b[2]\n" + ".word 0x4f84e973 // sdot v19.4s, v11.16b, v4.4b[2]\n" + ".word 0x4f85e977 // sdot v23.4s, v11.16b, v5.4b[2]\n" + ".word 0x4fa4e990 // sdot v16.4s, v12.16b, v4.4b[3]\n" + ".word 0x4fa5e994 // sdot v20.4s, v12.16b, v5.4b[3]\n" + ".word 0x4fa4e9b1 // sdot v17.4s, v13.16b, v4.4b[3]\n" + ".word 0x4fa5e9b5 // sdot v21.4s, v13.16b, v5.4b[3]\n" + ".word 0x4fa4e9d2 // sdot v18.4s, v14.16b, v4.4b[3]\n" + ".word 0x4fa5e9d6 // sdot v22.4s, v14.16b, v5.4b[3]\n" + ".word 0x4fa4e9f3 // sdot v19.4s, v15.16b, v4.4b[3]\n" + ".word 0x4fa5e9f7 // sdot v23.4s, v15.16b, v5.4b[3]\n" + "b 5f\n" + "4:\n" + ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" + ".word 0x4f81e114 // sdot v20.4s, v8.16b, v1.4b[0]\n" + "ldr q8, [%[b_ptr0]]\n" + ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" + ".word 0x4f81e135 // sdot v21.4s, v9.16b, v1.4b[0]\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" + ".word 0x4f81e156 // sdot v22.4s, v10.16b, v1.4b[0]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" + ".word 0x4f81e177 // sdot v23.4s, v11.16b, v1.4b[0]\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + ".word 0x4fa0e190 // sdot v16.4s, v12.16b, v0.4b[1]\n" + ".word 0x4fa1e194 // sdot v20.4s, v12.16b, v1.4b[1]\n" + "ldr q12, [%[b_ptr0], #0x40]\n" + ".word 0x4fa0e1b1 // sdot v17.4s, v13.16b, v0.4b[1]\n" + ".word 0x4fa1e1b5 // sdot v21.4s, v13.16b, v1.4b[1]\n" + "ldr q13, [%[b_ptr0], #0x50]\n" + ".word 0x4fa0e1d2 // sdot v18.4s, v14.16b, v0.4b[1]\n" + ".word 0x4fa1e1d6 // sdot v22.4s, v14.16b, v1.4b[1]\n" + "ldr q14, [%[b_ptr0], #0x60]\n" + ".word 0x4fa0e1f3 // sdot v19.4s, v15.16b, v0.4b[1]\n" + ".word 0x4fa1e1f7 // sdot v23.4s, v15.16b, v1.4b[1]\n" + "ldr q15, [%[b_ptr0], #0x70]\n" + ".word 0x4f80e910 // sdot v16.4s, v8.16b, v0.4b[2]\n" + "add %[b_ptr0], %[b_ptr0], #0x80\n" + ".word 0x4f81e914 // sdot v20.4s, v8.16b, v1.4b[2]\n" + ".word 0x4f80e931 // sdot v17.4s, v9.16b, v0.4b[2]\n" + ".word 0x4f81e935 // sdot v21.4s, v9.16b, v1.4b[2]\n" + ".word 0x4f80e952 // sdot v18.4s, v10.16b, v0.4b[2]\n" + ".word 0x4f81e956 // sdot v22.4s, v10.16b, v1.4b[2]\n" + ".word 0x4f80e973 // sdot v19.4s, v11.16b, v0.4b[2]\n" + ".word 0x4f81e977 // sdot v23.4s, v11.16b, v1.4b[2]\n" + ".word 0x4fa0e990 // sdot v16.4s, v12.16b, v0.4b[3]\n" + ".word 0x4fa1e994 // sdot v20.4s, v12.16b, v1.4b[3]\n" + ".word 0x4fa0e9b1 // sdot v17.4s, v13.16b, v0.4b[3]\n" + ".word 0x4fa1e9b5 // sdot v21.4s, v13.16b, v1.4b[3]\n" + ".word 0x4fa0e9d2 // sdot v18.4s, v14.16b, v0.4b[3]\n" + ".word 0x4fa1e9d6 // sdot v22.4s, v14.16b, v1.4b[3]\n" + ".word 0x4fa0e9f3 // sdot v19.4s, v15.16b, v0.4b[3]\n" + ".word 0x4fa1e9f7 // sdot v23.4s, v15.16b, v1.4b[3]\n" + "5:\n" + "cbz %[blocks], 6f\n" + "7:\n" + "ldr q8, [%[b_ptr0]]\n" + "subs %[blocks], %[blocks], #0x1\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + "ldr s0, [%[a_ptr0]]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + "add %[a_ptr0], %[a_ptr0], #0x4\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + "add %[b_ptr0], %[b_ptr0], #0x40\n" + ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" + "ldr s1, [a_ptr1]\n" + ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" + "add a_ptr1, a_ptr1, #0x4\n" + ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" + ".word 0x4f81e114 // sdot v20.4s, v8.16b, v1.4b[0]\n" + ".word 0x4f81e135 // sdot v21.4s, v9.16b, v1.4b[0]\n" + ".word 0x4f81e156 // sdot v22.4s, v10.16b, v1.4b[0]\n" + ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" + ".word 0x4f81e177 // sdot v23.4s, v11.16b, v1.4b[0]\n" + "b.ne 7b\n" + "6:\n" + "cbz %[odds], 8f\n" + "ld1 {v0.b}[0], [%[a_ptr0]], #1\n" + "ld1 {v1.b}[0], [a_ptr1], #1\n" + "subs %[odds], %[odds], #0x1\n" + "b.eq 9f\n" + "ld1 {v0.b}[1], [%[a_ptr0]], #1\n" + "ld1 {v1.b}[1], [a_ptr1], #1\n" + "subs %[odds], %[odds], #0x1\n" + "b.eq 9f\n" + "ld1 {v0.b}[2], [%[a_ptr0]]\n" + "ld1 {v1.b}[2], [a_ptr1]\n" + "9:\n" + "ldr q8, [%[b_ptr0]]\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" + ".word 0x4f81e114 // sdot v20.4s, v8.16b, v1.4b[0]\n" + ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" + ".word 0x4f81e135 // sdot v21.4s, v9.16b, v1.4b[0]\n" + ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" + ".word 0x4f81e156 // sdot v22.4s, v10.16b, v1.4b[0]\n" + ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" + ".word 0x4f81e177 // sdot v23.4s, v11.16b, v1.4b[0]\n" + "8:\n" + "str q16, [%[c_ptr0]]\n" + "str q17, [%[c_ptr0], #0x10]\n" + "str q18, [%[c_ptr0], #0x20]\n" + "str q19, [%[c_ptr0], #0x30]\n" + "add %[c_ptr0], %[c_ptr0], #0x40\n" + "str q20, [c_ptr1]\n" + "str q21, [c_ptr1, #0x10]\n" + "str q22, [c_ptr1, #0x20]\n" + "str q23, [c_ptr1, #0x30]\n" + ".unreq a_ptr1\n" + ".unreq c_ptr1\n" + : [a_ptr0] "+r" (a_ptr0), [b_ptr0] "+r" (b_ptr0), [c_ptr0] "+r" (c_ptr0), [loops] "+r" (loops), [regs] "+r" (regs), [blocks] "+r" (blocks), [odds] "+r" (odds) + : [betaptr] "r" (betaptr), [width] "r" (width), [beta0] "r" (beta0), [lda] "r" (ldab), [ldc] "r" (ldcb) + : "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x0", "x1", "cc", "memory" ); break; case 3: __asm __volatile ( - "a_ptr1 .req X0\n" - "a_ptr2 .req X1\n" - "c_ptr1 .req X2\n" - "c_ptr2 .req X3\n" - "add a_ptr1, %[a_ptr0], %[lda]\n" - "add c_ptr1, %[c_ptr0], %[ldc]\n" - "add a_ptr2, a_ptr1, %[lda]\n" - "add c_ptr2, c_ptr1, %[ldc]\n" - "cbz %[beta0], 1f\n" - "movi v16.4s, #0\n" - "ldr q0, [%[a_ptr0]]\n" - "movi v17.4s, #0\n" - "ldr q1, [a_ptr1]\n" - "movi v18.4s, #0\n" - "ldr q2, [a_ptr2]\n" - "movi v19.4s, #0\n" - "ldr q8, [%[b_ptr0]]\n" - "movi v20.4s, #0\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - "movi v21.4s, #0\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - "movi v22.4s, #0\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - "movi v23.4s, #0\n" - "ldr q12, [%[b_ptr0], #0x40]\n" - "movi v24.4s, #0\n" - "ldr q13, [%[b_ptr0], #0x50]\n" - "movi v25.4s, #0\n" - "ldr q14, [%[b_ptr0], #0x60]\n" - "movi v26.4s, #0\n" - "add %[a_ptr0], %[a_ptr0], #0x10\n" - "movi v27.4s, #0\n" - "add a_ptr1, a_ptr1, #0x10\n" - "add a_ptr2, a_ptr2, #0x10\n" - "add %[b_ptr0], %[b_ptr0], #0x80\n" - "cbz %[loops], 2f\n" - "b 3f\n" - "1:\n" - "ld1r {v15.4s}, [%[betaptr]]\n" - "ldr q16, [%[c_ptr0]]\n" - "ldr q17, [%[c_ptr0], #0x10]\n" - "ldr q18, [%[c_ptr0], #0x20]\n" - "ldr q19, [%[c_ptr0], #0x30]\n" - "mul v16.4s, v16.4s, v15.4s\n" - "ldr q20, [c_ptr1]\n" - "mul v17.4s, v17.4s, v15.4s\n" - "ldr q21, [c_ptr1, #0x10]\n" - "mul v18.4s, v18.4s, v15.4s\n" - "ldr q22, [c_ptr1, #0x20]\n" - "mul v19.4s, v19.4s, v15.4s\n" - "ldr q23, [c_ptr1, #0x30]\n" - "mul v20.4s, v20.4s, v15.4s\n" - "ldr q24, [c_ptr2]\n" - "mul v21.4s, v21.4s, v15.4s\n" - "ldr q25, [c_ptr2, #0x10]\n" - "mul v22.4s, v22.4s, v15.4s\n" - "ldr q26, [c_ptr2, #0x20]\n" - "mul v23.4s, v23.4s, v15.4s\n" - "ldr q27, [c_ptr2, #0x30]\n" - "mul v24.4s, v24.4s, v15.4s\n" - "ldr q0, [%[a_ptr0]]\n" - "mul v25.4s, v25.4s, v15.4s\n" - "ldr q1, [a_ptr1]\n" - "mul v26.4s, v26.4s, v15.4s\n" - "ldr q2, [a_ptr2]\n" - "mul v27.4s, v27.4s, v15.4s\n" - "ldr q8, [%[b_ptr0]]\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - "add %[a_ptr0], %[a_ptr0], #0x10\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - "add a_ptr1, a_ptr1, #0x10\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - "add a_ptr2, a_ptr2, #0x10\n" - "ldr q12, [%[b_ptr0], #0x40]\n" - "ldr q13, [%[b_ptr0], #0x50]\n" - "ldr q14, [%[b_ptr0], #0x60]\n" - "add %[b_ptr0], %[b_ptr0], #0x80\n" - "cbz %[loops], 2f\n" - "3:\n" - ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" - "ldr q15, [%[b_ptr0], #-0x10]\n" - ".word 0x4f81e114 // sdot v20.4s, v8.16b, v1.4b[0]\n" - "ldr q4, [%[a_ptr0]]\n" - ".word 0x4f82e118 // sdot v24.4s, v8.16b, v2.4b[0]\n" - "ldr q5, [a_ptr1]\n" - ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" - "ldr q6, [a_ptr2]\n" - ".word 0x4f81e135 // sdot v21.4s, v9.16b, v1.4b[0]\n" - "ldr q8, [%[b_ptr0]]\n" - ".word 0x4f82e139 // sdot v25.4s, v9.16b, v2.4b[0]\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" - "subs %[loops], %[loops], #0x1\n" - ".word 0x4f81e156 // sdot v22.4s, v10.16b, v1.4b[0]\n" - "prfm PLDL1KEEP, [%[a_ptr0], #0x40]\n" - ".word 0x4f82e15a // sdot v26.4s, v10.16b, v2.4b[0]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" - "add %[a_ptr0], %[a_ptr0], #0x20\n" - ".word 0x4f81e177 // sdot v23.4s, v11.16b, v1.4b[0]\n" - "add a_ptr1, a_ptr1, #0x20\n" - ".word 0x4f82e17b // sdot v27.4s, v11.16b, v2.4b[0]\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - ".word 0x4fa0e190 // sdot v16.4s, v12.16b, v0.4b[1]\n" - "add a_ptr2, a_ptr2, #0x20\n" - ".word 0x4fa1e194 // sdot v20.4s, v12.16b, v1.4b[1]\n" - "prfm PLDL1KEEP, [a_ptr1, #0x40]\n" - ".word 0x4fa2e198 // sdot v24.4s, v12.16b, v2.4b[1]\n" - "ldr q12, [%[b_ptr0], #0x40]\n" - ".word 0x4fa0e1b1 // sdot v17.4s, v13.16b, v0.4b[1]\n" - "prfm PLDL1KEEP, [a_ptr2, #0x40]\n" - ".word 0x4fa1e1b5 // sdot v21.4s, v13.16b, v1.4b[1]\n" - ".word 0x4fa2e1b9 // sdot v25.4s, v13.16b, v2.4b[1]\n" - "ldr q13, [%[b_ptr0], #0x50]\n" - ".word 0x4fa0e1d2 // sdot v18.4s, v14.16b, v0.4b[1]\n" - ".word 0x4fa1e1d6 // sdot v22.4s, v14.16b, v1.4b[1]\n" - ".word 0x4fa2e1da // sdot v26.4s, v14.16b, v2.4b[1]\n" - "ldr q14, [%[b_ptr0], #0x60]\n" - ".word 0x4fa0e1f3 // sdot v19.4s, v15.16b, v0.4b[1]\n" - ".word 0x4fa1e1f7 // sdot v23.4s, v15.16b, v1.4b[1]\n" - ".word 0x4fa2e1fb // sdot v27.4s, v15.16b, v2.4b[1]\n" - "ldr q15, [%[b_ptr0], #0x70]\n" - ".word 0x4f80e910 // sdot v16.4s, v8.16b, v0.4b[2]\n" - "add %[b_ptr0], %[b_ptr0], #0x100\n" - ".word 0x4f81e914 // sdot v20.4s, v8.16b, v1.4b[2]\n" - ".word 0x4f82e918 // sdot v24.4s, v8.16b, v2.4b[2]\n" - "ldr q8, [%[b_ptr0], #-0x80]\n" - ".word 0x4f80e931 // sdot v17.4s, v9.16b, v0.4b[2]\n" - ".word 0x4f81e935 // sdot v21.4s, v9.16b, v1.4b[2]\n" - ".word 0x4f82e939 // sdot v25.4s, v9.16b, v2.4b[2]\n" - "ldr q9, [%[b_ptr0], #-0x70]\n" - ".word 0x4f80e952 // sdot v18.4s, v10.16b, v0.4b[2]\n" - ".word 0x4f81e956 // sdot v22.4s, v10.16b, v1.4b[2]\n" - ".word 0x4f82e95a // sdot v26.4s, v10.16b, v2.4b[2]\n" - "ldr q10, [%[b_ptr0], #-0x60]\n" - ".word 0x4f80e973 // sdot v19.4s, v11.16b, v0.4b[2]\n" - ".word 0x4f81e977 // sdot v23.4s, v11.16b, v1.4b[2]\n" - ".word 0x4f82e97b // sdot v27.4s, v11.16b, v2.4b[2]\n" - "ldr q11, [%[b_ptr0], #-0x50]\n" - ".word 0x4fa0e990 // sdot v16.4s, v12.16b, v0.4b[3]\n" - ".word 0x4fa1e994 // sdot v20.4s, v12.16b, v1.4b[3]\n" - ".word 0x4fa2e998 // sdot v24.4s, v12.16b, v2.4b[3]\n" - "ldr q12, [%[b_ptr0], #-0x40]\n" - ".word 0x4fa0e9b1 // sdot v17.4s, v13.16b, v0.4b[3]\n" - ".word 0x4fa1e9b5 // sdot v21.4s, v13.16b, v1.4b[3]\n" - ".word 0x4fa2e9b9 // sdot v25.4s, v13.16b, v2.4b[3]\n" - "ldr q13, [%[b_ptr0], #-0x30]\n" - ".word 0x4fa0e9d2 // sdot v18.4s, v14.16b, v0.4b[3]\n" - ".word 0x4fa1e9d6 // sdot v22.4s, v14.16b, v1.4b[3]\n" - ".word 0x4fa2e9da // sdot v26.4s, v14.16b, v2.4b[3]\n" - "ldr q14, [%[b_ptr0], #-0x20]\n" - ".word 0x4fa0e9f3 // sdot v19.4s, v15.16b, v0.4b[3]\n" - "ldr q0, [%[a_ptr0], #-0x10]\n" - ".word 0x4fa1e9f7 // sdot v23.4s, v15.16b, v1.4b[3]\n" - "ldr q1, [a_ptr1, #-0x10]\n" - ".word 0x4fa2e9fb // sdot v27.4s, v15.16b, v2.4b[3]\n" - "ldr q15, [%[b_ptr0], #-0x10]\n" - ".word 0x4f84e110 // sdot v16.4s, v8.16b, v4.4b[0]\n" - "ldr q2, [a_ptr2, #-0x10]\n" - ".word 0x4f85e114 // sdot v20.4s, v8.16b, v5.4b[0]\n" - ".word 0x4f86e118 // sdot v24.4s, v8.16b, v6.4b[0]\n" - "ldr q8, [%[b_ptr0]]\n" - ".word 0x4f84e131 // sdot v17.4s, v9.16b, v4.4b[0]\n" - ".word 0x4f85e135 // sdot v21.4s, v9.16b, v5.4b[0]\n" - ".word 0x4f86e139 // sdot v25.4s, v9.16b, v6.4b[0]\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - ".word 0x4f84e152 // sdot v18.4s, v10.16b, v4.4b[0]\n" - ".word 0x4f85e156 // sdot v22.4s, v10.16b, v5.4b[0]\n" - ".word 0x4f86e15a // sdot v26.4s, v10.16b, v6.4b[0]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - ".word 0x4f84e173 // sdot v19.4s, v11.16b, v4.4b[0]\n" - ".word 0x4f85e177 // sdot v23.4s, v11.16b, v5.4b[0]\n" - ".word 0x4f86e17b // sdot v27.4s, v11.16b, v6.4b[0]\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - ".word 0x4fa4e190 // sdot v16.4s, v12.16b, v4.4b[1]\n" - ".word 0x4fa5e194 // sdot v20.4s, v12.16b, v5.4b[1]\n" - ".word 0x4fa6e198 // sdot v24.4s, v12.16b, v6.4b[1]\n" - "ldr q12, [%[b_ptr0], #0x40]\n" - ".word 0x4fa4e1b1 // sdot v17.4s, v13.16b, v4.4b[1]\n" - ".word 0x4fa5e1b5 // sdot v21.4s, v13.16b, v5.4b[1]\n" - ".word 0x4fa6e1b9 // sdot v25.4s, v13.16b, v6.4b[1]\n" - "ldr q13, [%[b_ptr0], #0x50]\n" - ".word 0x4fa4e1d2 // sdot v18.4s, v14.16b, v4.4b[1]\n" - ".word 0x4fa5e1d6 // sdot v22.4s, v14.16b, v5.4b[1]\n" - ".word 0x4fa6e1da // sdot v26.4s, v14.16b, v6.4b[1]\n" - "ldr q14, [%[b_ptr0], #0x60]\n" - ".word 0x4fa4e1f3 // sdot v19.4s, v15.16b, v4.4b[1]\n" - ".word 0x4fa5e1f7 // sdot v23.4s, v15.16b, v5.4b[1]\n" - ".word 0x4fa6e1fb // sdot v27.4s, v15.16b, v6.4b[1]\n" - "ldr q15, [%[b_ptr0], #0x70]\n" - ".word 0x4f84e910 // sdot v16.4s, v8.16b, v4.4b[2]\n" - "add %[b_ptr0], %[b_ptr0], #0x100\n" - ".word 0x4f85e914 // sdot v20.4s, v8.16b, v5.4b[2]\n" - ".word 0x4f86e918 // sdot v24.4s, v8.16b, v6.4b[2]\n" - "ldr q8, [%[b_ptr0], #-0x80]\n" - ".word 0x4f84e931 // sdot v17.4s, v9.16b, v4.4b[2]\n" - ".word 0x4f85e935 // sdot v21.4s, v9.16b, v5.4b[2]\n" - ".word 0x4f86e939 // sdot v25.4s, v9.16b, v6.4b[2]\n" - "ldr q9, [%[b_ptr0], #-0x70]\n" - ".word 0x4f84e952 // sdot v18.4s, v10.16b, v4.4b[2]\n" - ".word 0x4f85e956 // sdot v22.4s, v10.16b, v5.4b[2]\n" - ".word 0x4f86e95a // sdot v26.4s, v10.16b, v6.4b[2]\n" - "ldr q10, [%[b_ptr0], #-0x60]\n" - ".word 0x4f84e973 // sdot v19.4s, v11.16b, v4.4b[2]\n" - ".word 0x4f85e977 // sdot v23.4s, v11.16b, v5.4b[2]\n" - ".word 0x4f86e97b // sdot v27.4s, v11.16b, v6.4b[2]\n" - "ldr q11, [%[b_ptr0], #-0x50]\n" - ".word 0x4fa4e990 // sdot v16.4s, v12.16b, v4.4b[3]\n" - ".word 0x4fa5e994 // sdot v20.4s, v12.16b, v5.4b[3]\n" - ".word 0x4fa6e998 // sdot v24.4s, v12.16b, v6.4b[3]\n" - "ldr q12, [%[b_ptr0], #-0x40]\n" - ".word 0x4fa4e9b1 // sdot v17.4s, v13.16b, v4.4b[3]\n" - ".word 0x4fa5e9b5 // sdot v21.4s, v13.16b, v5.4b[3]\n" - ".word 0x4fa6e9b9 // sdot v25.4s, v13.16b, v6.4b[3]\n" - "ldr q13, [%[b_ptr0], #-0x30]\n" - ".word 0x4fa4e9d2 // sdot v18.4s, v14.16b, v4.4b[3]\n" - ".word 0x4fa5e9d6 // sdot v22.4s, v14.16b, v5.4b[3]\n" - ".word 0x4fa6e9da // sdot v26.4s, v14.16b, v6.4b[3]\n" - "ldr q14, [%[b_ptr0], #-0x20]\n" - ".word 0x4fa4e9f3 // sdot v19.4s, v15.16b, v4.4b[3]\n" - ".word 0x4fa5e9f7 // sdot v23.4s, v15.16b, v5.4b[3]\n" - ".word 0x4fa6e9fb // sdot v27.4s, v15.16b, v6.4b[3]\n" - "b.ne 3b\n" - "2:\n" - "ldr q15, [%[b_ptr0], #-0x10]\n" - "prfm PSTL1KEEP, [%[c_ptr0]]\n" - "prfm PSTL1KEEP, [c_ptr1]\n" - "prfm PSTL1KEEP, [c_ptr2]\n" - "cbz %[regs], 4f\n" - ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" - "ldr q4, [%[a_ptr0]]\n" - ".word 0x4f81e114 // sdot v20.4s, v8.16b, v1.4b[0]\n" - "ldr q5, [a_ptr1]\n" - ".word 0x4f82e118 // sdot v24.4s, v8.16b, v2.4b[0]\n" - "ldr q6, [a_ptr2]\n" - ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" - "ldr q8, [%[b_ptr0]]\n" - ".word 0x4f81e135 // sdot v21.4s, v9.16b, v1.4b[0]\n" - "add %[a_ptr0], %[a_ptr0], #0x10\n" - ".word 0x4f82e139 // sdot v25.4s, v9.16b, v2.4b[0]\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" - "add a_ptr1, a_ptr1, #0x10\n" - ".word 0x4f81e156 // sdot v22.4s, v10.16b, v1.4b[0]\n" - "add a_ptr2, a_ptr2, #0x10\n" - ".word 0x4f82e15a // sdot v26.4s, v10.16b, v2.4b[0]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" - ".word 0x4f81e177 // sdot v23.4s, v11.16b, v1.4b[0]\n" - ".word 0x4f82e17b // sdot v27.4s, v11.16b, v2.4b[0]\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - ".word 0x4fa0e190 // sdot v16.4s, v12.16b, v0.4b[1]\n" - ".word 0x4fa1e194 // sdot v20.4s, v12.16b, v1.4b[1]\n" - ".word 0x4fa2e198 // sdot v24.4s, v12.16b, v2.4b[1]\n" - "ldr q12, [%[b_ptr0], #0x40]\n" - ".word 0x4fa0e1b1 // sdot v17.4s, v13.16b, v0.4b[1]\n" - ".word 0x4fa1e1b5 // sdot v21.4s, v13.16b, v1.4b[1]\n" - ".word 0x4fa2e1b9 // sdot v25.4s, v13.16b, v2.4b[1]\n" - "ldr q13, [%[b_ptr0], #0x50]\n" - ".word 0x4fa0e1d2 // sdot v18.4s, v14.16b, v0.4b[1]\n" - ".word 0x4fa1e1d6 // sdot v22.4s, v14.16b, v1.4b[1]\n" - ".word 0x4fa2e1da // sdot v26.4s, v14.16b, v2.4b[1]\n" - "ldr q14, [%[b_ptr0], #0x60]\n" - ".word 0x4fa0e1f3 // sdot v19.4s, v15.16b, v0.4b[1]\n" - ".word 0x4fa1e1f7 // sdot v23.4s, v15.16b, v1.4b[1]\n" - ".word 0x4fa2e1fb // sdot v27.4s, v15.16b, v2.4b[1]\n" - "ldr q15, [%[b_ptr0], #0x70]\n" - ".word 0x4f80e910 // sdot v16.4s, v8.16b, v0.4b[2]\n" - "add %[b_ptr0], %[b_ptr0], #0x100\n" - ".word 0x4f81e914 // sdot v20.4s, v8.16b, v1.4b[2]\n" - ".word 0x4f82e918 // sdot v24.4s, v8.16b, v2.4b[2]\n" - "ldr q8, [%[b_ptr0], #-0x80]\n" - ".word 0x4f80e931 // sdot v17.4s, v9.16b, v0.4b[2]\n" - ".word 0x4f81e935 // sdot v21.4s, v9.16b, v1.4b[2]\n" - ".word 0x4f82e939 // sdot v25.4s, v9.16b, v2.4b[2]\n" - "ldr q9, [%[b_ptr0], #-0x70]\n" - ".word 0x4f80e952 // sdot v18.4s, v10.16b, v0.4b[2]\n" - ".word 0x4f81e956 // sdot v22.4s, v10.16b, v1.4b[2]\n" - ".word 0x4f82e95a // sdot v26.4s, v10.16b, v2.4b[2]\n" - "ldr q10, [%[b_ptr0], #-0x60]\n" - ".word 0x4f80e973 // sdot v19.4s, v11.16b, v0.4b[2]\n" - ".word 0x4f81e977 // sdot v23.4s, v11.16b, v1.4b[2]\n" - ".word 0x4f82e97b // sdot v27.4s, v11.16b, v2.4b[2]\n" - "ldr q11, [%[b_ptr0], #-0x50]\n" - ".word 0x4fa0e990 // sdot v16.4s, v12.16b, v0.4b[3]\n" - ".word 0x4fa1e994 // sdot v20.4s, v12.16b, v1.4b[3]\n" - ".word 0x4fa2e998 // sdot v24.4s, v12.16b, v2.4b[3]\n" - "ldr q12, [%[b_ptr0], #-0x40]\n" - ".word 0x4fa0e9b1 // sdot v17.4s, v13.16b, v0.4b[3]\n" - ".word 0x4fa1e9b5 // sdot v21.4s, v13.16b, v1.4b[3]\n" - ".word 0x4fa2e9b9 // sdot v25.4s, v13.16b, v2.4b[3]\n" - "ldr q13, [%[b_ptr0], #-0x30]\n" - ".word 0x4fa0e9d2 // sdot v18.4s, v14.16b, v0.4b[3]\n" - ".word 0x4fa1e9d6 // sdot v22.4s, v14.16b, v1.4b[3]\n" - ".word 0x4fa2e9da // sdot v26.4s, v14.16b, v2.4b[3]\n" - "ldr q14, [%[b_ptr0], #-0x20]\n" - ".word 0x4fa0e9f3 // sdot v19.4s, v15.16b, v0.4b[3]\n" - ".word 0x4fa1e9f7 // sdot v23.4s, v15.16b, v1.4b[3]\n" - ".word 0x4fa2e9fb // sdot v27.4s, v15.16b, v2.4b[3]\n" - "ldr q15, [%[b_ptr0], #-0x10]\n" - ".word 0x4f84e110 // sdot v16.4s, v8.16b, v4.4b[0]\n" - ".word 0x4f85e114 // sdot v20.4s, v8.16b, v5.4b[0]\n" - ".word 0x4f86e118 // sdot v24.4s, v8.16b, v6.4b[0]\n" - "ldr q8, [%[b_ptr0]]\n" - ".word 0x4f84e131 // sdot v17.4s, v9.16b, v4.4b[0]\n" - ".word 0x4f85e135 // sdot v21.4s, v9.16b, v5.4b[0]\n" - ".word 0x4f86e139 // sdot v25.4s, v9.16b, v6.4b[0]\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - ".word 0x4f84e152 // sdot v18.4s, v10.16b, v4.4b[0]\n" - ".word 0x4f85e156 // sdot v22.4s, v10.16b, v5.4b[0]\n" - ".word 0x4f86e15a // sdot v26.4s, v10.16b, v6.4b[0]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - ".word 0x4f84e173 // sdot v19.4s, v11.16b, v4.4b[0]\n" - ".word 0x4f85e177 // sdot v23.4s, v11.16b, v5.4b[0]\n" - ".word 0x4f86e17b // sdot v27.4s, v11.16b, v6.4b[0]\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - ".word 0x4fa4e190 // sdot v16.4s, v12.16b, v4.4b[1]\n" - ".word 0x4fa5e194 // sdot v20.4s, v12.16b, v5.4b[1]\n" - ".word 0x4fa6e198 // sdot v24.4s, v12.16b, v6.4b[1]\n" - "ldr q12, [%[b_ptr0], #0x40]\n" - ".word 0x4fa4e1b1 // sdot v17.4s, v13.16b, v4.4b[1]\n" - ".word 0x4fa5e1b5 // sdot v21.4s, v13.16b, v5.4b[1]\n" - ".word 0x4fa6e1b9 // sdot v25.4s, v13.16b, v6.4b[1]\n" - "ldr q13, [%[b_ptr0], #0x50]\n" - ".word 0x4fa4e1d2 // sdot v18.4s, v14.16b, v4.4b[1]\n" - ".word 0x4fa5e1d6 // sdot v22.4s, v14.16b, v5.4b[1]\n" - ".word 0x4fa6e1da // sdot v26.4s, v14.16b, v6.4b[1]\n" - "ldr q14, [%[b_ptr0], #0x60]\n" - ".word 0x4fa4e1f3 // sdot v19.4s, v15.16b, v4.4b[1]\n" - ".word 0x4fa5e1f7 // sdot v23.4s, v15.16b, v5.4b[1]\n" - ".word 0x4fa6e1fb // sdot v27.4s, v15.16b, v6.4b[1]\n" - "ldr q15, [%[b_ptr0], #0x70]\n" - ".word 0x4f84e910 // sdot v16.4s, v8.16b, v4.4b[2]\n" - "add %[b_ptr0], %[b_ptr0], #0x80\n" - ".word 0x4f85e914 // sdot v20.4s, v8.16b, v5.4b[2]\n" - ".word 0x4f86e918 // sdot v24.4s, v8.16b, v6.4b[2]\n" - ".word 0x4f84e931 // sdot v17.4s, v9.16b, v4.4b[2]\n" - ".word 0x4f85e935 // sdot v21.4s, v9.16b, v5.4b[2]\n" - ".word 0x4f86e939 // sdot v25.4s, v9.16b, v6.4b[2]\n" - ".word 0x4f84e952 // sdot v18.4s, v10.16b, v4.4b[2]\n" - ".word 0x4f85e956 // sdot v22.4s, v10.16b, v5.4b[2]\n" - ".word 0x4f86e95a // sdot v26.4s, v10.16b, v6.4b[2]\n" - ".word 0x4f84e973 // sdot v19.4s, v11.16b, v4.4b[2]\n" - ".word 0x4f85e977 // sdot v23.4s, v11.16b, v5.4b[2]\n" - ".word 0x4f86e97b // sdot v27.4s, v11.16b, v6.4b[2]\n" - ".word 0x4fa4e990 // sdot v16.4s, v12.16b, v4.4b[3]\n" - ".word 0x4fa5e994 // sdot v20.4s, v12.16b, v5.4b[3]\n" - ".word 0x4fa6e998 // sdot v24.4s, v12.16b, v6.4b[3]\n" - ".word 0x4fa4e9b1 // sdot v17.4s, v13.16b, v4.4b[3]\n" - ".word 0x4fa5e9b5 // sdot v21.4s, v13.16b, v5.4b[3]\n" - ".word 0x4fa6e9b9 // sdot v25.4s, v13.16b, v6.4b[3]\n" - ".word 0x4fa4e9d2 // sdot v18.4s, v14.16b, v4.4b[3]\n" - ".word 0x4fa5e9d6 // sdot v22.4s, v14.16b, v5.4b[3]\n" - ".word 0x4fa6e9da // sdot v26.4s, v14.16b, v6.4b[3]\n" - ".word 0x4fa4e9f3 // sdot v19.4s, v15.16b, v4.4b[3]\n" - ".word 0x4fa5e9f7 // sdot v23.4s, v15.16b, v5.4b[3]\n" - ".word 0x4fa6e9fb // sdot v27.4s, v15.16b, v6.4b[3]\n" - "b 5f\n" - "4:\n" - ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" - ".word 0x4f81e114 // sdot v20.4s, v8.16b, v1.4b[0]\n" - ".word 0x4f82e118 // sdot v24.4s, v8.16b, v2.4b[0]\n" - "ldr q8, [%[b_ptr0]]\n" - ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" - ".word 0x4f81e135 // sdot v21.4s, v9.16b, v1.4b[0]\n" - ".word 0x4f82e139 // sdot v25.4s, v9.16b, v2.4b[0]\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" - ".word 0x4f81e156 // sdot v22.4s, v10.16b, v1.4b[0]\n" - ".word 0x4f82e15a // sdot v26.4s, v10.16b, v2.4b[0]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" - ".word 0x4f81e177 // sdot v23.4s, v11.16b, v1.4b[0]\n" - ".word 0x4f82e17b // sdot v27.4s, v11.16b, v2.4b[0]\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - ".word 0x4fa0e190 // sdot v16.4s, v12.16b, v0.4b[1]\n" - ".word 0x4fa1e194 // sdot v20.4s, v12.16b, v1.4b[1]\n" - ".word 0x4fa2e198 // sdot v24.4s, v12.16b, v2.4b[1]\n" - "ldr q12, [%[b_ptr0], #0x40]\n" - ".word 0x4fa0e1b1 // sdot v17.4s, v13.16b, v0.4b[1]\n" - ".word 0x4fa1e1b5 // sdot v21.4s, v13.16b, v1.4b[1]\n" - ".word 0x4fa2e1b9 // sdot v25.4s, v13.16b, v2.4b[1]\n" - "ldr q13, [%[b_ptr0], #0x50]\n" - ".word 0x4fa0e1d2 // sdot v18.4s, v14.16b, v0.4b[1]\n" - ".word 0x4fa1e1d6 // sdot v22.4s, v14.16b, v1.4b[1]\n" - ".word 0x4fa2e1da // sdot v26.4s, v14.16b, v2.4b[1]\n" - "ldr q14, [%[b_ptr0], #0x60]\n" - ".word 0x4fa0e1f3 // sdot v19.4s, v15.16b, v0.4b[1]\n" - ".word 0x4fa1e1f7 // sdot v23.4s, v15.16b, v1.4b[1]\n" - ".word 0x4fa2e1fb // sdot v27.4s, v15.16b, v2.4b[1]\n" - "ldr q15, [%[b_ptr0], #0x70]\n" - ".word 0x4f80e910 // sdot v16.4s, v8.16b, v0.4b[2]\n" - "add %[b_ptr0], %[b_ptr0], #0x80\n" - ".word 0x4f81e914 // sdot v20.4s, v8.16b, v1.4b[2]\n" - ".word 0x4f82e918 // sdot v24.4s, v8.16b, v2.4b[2]\n" - ".word 0x4f80e931 // sdot v17.4s, v9.16b, v0.4b[2]\n" - ".word 0x4f81e935 // sdot v21.4s, v9.16b, v1.4b[2]\n" - ".word 0x4f82e939 // sdot v25.4s, v9.16b, v2.4b[2]\n" - ".word 0x4f80e952 // sdot v18.4s, v10.16b, v0.4b[2]\n" - ".word 0x4f81e956 // sdot v22.4s, v10.16b, v1.4b[2]\n" - ".word 0x4f82e95a // sdot v26.4s, v10.16b, v2.4b[2]\n" - ".word 0x4f80e973 // sdot v19.4s, v11.16b, v0.4b[2]\n" - ".word 0x4f81e977 // sdot v23.4s, v11.16b, v1.4b[2]\n" - ".word 0x4f82e97b // sdot v27.4s, v11.16b, v2.4b[2]\n" - ".word 0x4fa0e990 // sdot v16.4s, v12.16b, v0.4b[3]\n" - ".word 0x4fa1e994 // sdot v20.4s, v12.16b, v1.4b[3]\n" - ".word 0x4fa2e998 // sdot v24.4s, v12.16b, v2.4b[3]\n" - ".word 0x4fa0e9b1 // sdot v17.4s, v13.16b, v0.4b[3]\n" - ".word 0x4fa1e9b5 // sdot v21.4s, v13.16b, v1.4b[3]\n" - ".word 0x4fa2e9b9 // sdot v25.4s, v13.16b, v2.4b[3]\n" - ".word 0x4fa0e9d2 // sdot v18.4s, v14.16b, v0.4b[3]\n" - ".word 0x4fa1e9d6 // sdot v22.4s, v14.16b, v1.4b[3]\n" - ".word 0x4fa2e9da // sdot v26.4s, v14.16b, v2.4b[3]\n" - ".word 0x4fa0e9f3 // sdot v19.4s, v15.16b, v0.4b[3]\n" - ".word 0x4fa1e9f7 // sdot v23.4s, v15.16b, v1.4b[3]\n" - ".word 0x4fa2e9fb // sdot v27.4s, v15.16b, v2.4b[3]\n" - "5:\n" - "cbz %[blocks], 6f\n" - "7:\n" - "ldr q8, [%[b_ptr0]]\n" - "subs %[blocks], %[blocks], #0x1\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - "ldr s0, [%[a_ptr0]]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - "add %[a_ptr0], %[a_ptr0], #0x4\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - "add %[b_ptr0], %[b_ptr0], #0x40\n" - ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" - "ldr s1, [a_ptr1]\n" - ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" - "add a_ptr1, a_ptr1, #0x4\n" - ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" - "ldr s2, [a_ptr2]\n" - ".word 0x4f81e114 // sdot v20.4s, v8.16b, v1.4b[0]\n" - "add a_ptr2, a_ptr2, #0x4\n" - ".word 0x4f81e135 // sdot v21.4s, v9.16b, v1.4b[0]\n" - ".word 0x4f82e118 // sdot v24.4s, v8.16b, v2.4b[0]\n" - ".word 0x4f82e139 // sdot v25.4s, v9.16b, v2.4b[0]\n" - ".word 0x4f81e156 // sdot v22.4s, v10.16b, v1.4b[0]\n" - ".word 0x4f82e15a // sdot v26.4s, v10.16b, v2.4b[0]\n" - ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" - ".word 0x4f81e177 // sdot v23.4s, v11.16b, v1.4b[0]\n" - ".word 0x4f82e17b // sdot v27.4s, v11.16b, v2.4b[0]\n" - "b.ne 7b\n" - "6:\n" - "cbz %[odds], 8f\n" - "ld1 {v0.b}[0], [%[a_ptr0]], #1\n" - "ld1 {v1.b}[0], [a_ptr1], #1\n" - "ld1 {v2.b}[0], [a_ptr2], #1\n" - "subs %[odds], %[odds], #0x1\n" - "b.eq 9f\n" - "ld1 {v0.b}[1], [%[a_ptr0]], #1\n" - "ld1 {v1.b}[1], [a_ptr1], #1\n" - "ld1 {v2.b}[1], [a_ptr2], #1\n" - "subs %[odds], %[odds], #0x1\n" - "b.eq 9f\n" - "ld1 {v0.b}[2], [%[a_ptr0]]\n" - "ld1 {v1.b}[2], [a_ptr1]\n" - "ld1 {v2.b}[2], [a_ptr2]\n" - "9:\n" - "ldr q8, [%[b_ptr0]]\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" - ".word 0x4f81e114 // sdot v20.4s, v8.16b, v1.4b[0]\n" - ".word 0x4f82e118 // sdot v24.4s, v8.16b, v2.4b[0]\n" - ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" - ".word 0x4f81e135 // sdot v21.4s, v9.16b, v1.4b[0]\n" - ".word 0x4f82e139 // sdot v25.4s, v9.16b, v2.4b[0]\n" - ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" - ".word 0x4f81e156 // sdot v22.4s, v10.16b, v1.4b[0]\n" - ".word 0x4f82e15a // sdot v26.4s, v10.16b, v2.4b[0]\n" - ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" - ".word 0x4f81e177 // sdot v23.4s, v11.16b, v1.4b[0]\n" - ".word 0x4f82e17b // sdot v27.4s, v11.16b, v2.4b[0]\n" - "8:\n" - "str q16, [%[c_ptr0]]\n" - "str q17, [%[c_ptr0], #0x10]\n" - "str q18, [%[c_ptr0], #0x20]\n" - "str q19, [%[c_ptr0], #0x30]\n" - "add %[c_ptr0], %[c_ptr0], #0x40\n" - "str q20, [c_ptr1]\n" - "str q21, [c_ptr1, #0x10]\n" - "str q22, [c_ptr1, #0x20]\n" - "str q23, [c_ptr1, #0x30]\n" - "str q24, [c_ptr2]\n" - "str q25, [c_ptr2, #0x10]\n" - "str q26, [c_ptr2, #0x20]\n" - "str q27, [c_ptr2, #0x30]\n" - ".unreq a_ptr1\n" - ".unreq a_ptr2\n" - ".unreq c_ptr1\n" - ".unreq c_ptr2\n" - : [a_ptr0] "+r" (a_ptr0), [b_ptr0] "+r" (b_ptr0), [c_ptr0] "+r" (c_ptr0), [loops] "+r" (loops), [regs] "+r" (regs), [blocks] "+r" (blocks), [odds] "+r" (odds) - : [betaptr] "r" (betaptr), [width] "r" (width), [beta0] "r" (beta0), [lda] "r" (ldab), [ldc] "r" (ldcb) - : "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x0", "x1", "x2", "x3", "cc", "memory" + "a_ptr1 .req X0\n" + "a_ptr2 .req X1\n" + "c_ptr1 .req X2\n" + "c_ptr2 .req X3\n" + "add a_ptr1, %[a_ptr0], %[lda]\n" + "add c_ptr1, %[c_ptr0], %[ldc]\n" + "add a_ptr2, a_ptr1, %[lda]\n" + "add c_ptr2, c_ptr1, %[ldc]\n" + "cbz %[beta0], 1f\n" + "movi v16.4s, #0\n" + "ldr q0, [%[a_ptr0]]\n" + "movi v17.4s, #0\n" + "ldr q1, [a_ptr1]\n" + "movi v18.4s, #0\n" + "ldr q2, [a_ptr2]\n" + "movi v19.4s, #0\n" + "ldr q8, [%[b_ptr0]]\n" + "movi v20.4s, #0\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + "movi v21.4s, #0\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + "movi v22.4s, #0\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + "movi v23.4s, #0\n" + "ldr q12, [%[b_ptr0], #0x40]\n" + "movi v24.4s, #0\n" + "ldr q13, [%[b_ptr0], #0x50]\n" + "movi v25.4s, #0\n" + "ldr q14, [%[b_ptr0], #0x60]\n" + "movi v26.4s, #0\n" + "add %[a_ptr0], %[a_ptr0], #0x10\n" + "movi v27.4s, #0\n" + "add a_ptr1, a_ptr1, #0x10\n" + "add a_ptr2, a_ptr2, #0x10\n" + "add %[b_ptr0], %[b_ptr0], #0x80\n" + "cbz %[loops], 2f\n" + "b 3f\n" + "1:\n" + "ld1r {v15.4s}, [%[betaptr]]\n" + "ldr q16, [%[c_ptr0]]\n" + "ldr q17, [%[c_ptr0], #0x10]\n" + "ldr q18, [%[c_ptr0], #0x20]\n" + "ldr q19, [%[c_ptr0], #0x30]\n" + "mul v16.4s, v16.4s, v15.4s\n" + "ldr q20, [c_ptr1]\n" + "mul v17.4s, v17.4s, v15.4s\n" + "ldr q21, [c_ptr1, #0x10]\n" + "mul v18.4s, v18.4s, v15.4s\n" + "ldr q22, [c_ptr1, #0x20]\n" + "mul v19.4s, v19.4s, v15.4s\n" + "ldr q23, [c_ptr1, #0x30]\n" + "mul v20.4s, v20.4s, v15.4s\n" + "ldr q24, [c_ptr2]\n" + "mul v21.4s, v21.4s, v15.4s\n" + "ldr q25, [c_ptr2, #0x10]\n" + "mul v22.4s, v22.4s, v15.4s\n" + "ldr q26, [c_ptr2, #0x20]\n" + "mul v23.4s, v23.4s, v15.4s\n" + "ldr q27, [c_ptr2, #0x30]\n" + "mul v24.4s, v24.4s, v15.4s\n" + "ldr q0, [%[a_ptr0]]\n" + "mul v25.4s, v25.4s, v15.4s\n" + "ldr q1, [a_ptr1]\n" + "mul v26.4s, v26.4s, v15.4s\n" + "ldr q2, [a_ptr2]\n" + "mul v27.4s, v27.4s, v15.4s\n" + "ldr q8, [%[b_ptr0]]\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + "add %[a_ptr0], %[a_ptr0], #0x10\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + "add a_ptr1, a_ptr1, #0x10\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + "add a_ptr2, a_ptr2, #0x10\n" + "ldr q12, [%[b_ptr0], #0x40]\n" + "ldr q13, [%[b_ptr0], #0x50]\n" + "ldr q14, [%[b_ptr0], #0x60]\n" + "add %[b_ptr0], %[b_ptr0], #0x80\n" + "cbz %[loops], 2f\n" + "3:\n" + ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" + "ldr q15, [%[b_ptr0], #-0x10]\n" + ".word 0x4f81e114 // sdot v20.4s, v8.16b, v1.4b[0]\n" + "ldr q4, [%[a_ptr0]]\n" + ".word 0x4f82e118 // sdot v24.4s, v8.16b, v2.4b[0]\n" + "ldr q5, [a_ptr1]\n" + ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" + "ldr q6, [a_ptr2]\n" + ".word 0x4f81e135 // sdot v21.4s, v9.16b, v1.4b[0]\n" + "ldr q8, [%[b_ptr0]]\n" + ".word 0x4f82e139 // sdot v25.4s, v9.16b, v2.4b[0]\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" + "subs %[loops], %[loops], #0x1\n" + ".word 0x4f81e156 // sdot v22.4s, v10.16b, v1.4b[0]\n" + "prfm PLDL1KEEP, [%[a_ptr0], #0x40]\n" + ".word 0x4f82e15a // sdot v26.4s, v10.16b, v2.4b[0]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" + "add %[a_ptr0], %[a_ptr0], #0x20\n" + ".word 0x4f81e177 // sdot v23.4s, v11.16b, v1.4b[0]\n" + "add a_ptr1, a_ptr1, #0x20\n" + ".word 0x4f82e17b // sdot v27.4s, v11.16b, v2.4b[0]\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + ".word 0x4fa0e190 // sdot v16.4s, v12.16b, v0.4b[1]\n" + "add a_ptr2, a_ptr2, #0x20\n" + ".word 0x4fa1e194 // sdot v20.4s, v12.16b, v1.4b[1]\n" + "prfm PLDL1KEEP, [a_ptr1, #0x40]\n" + ".word 0x4fa2e198 // sdot v24.4s, v12.16b, v2.4b[1]\n" + "ldr q12, [%[b_ptr0], #0x40]\n" + ".word 0x4fa0e1b1 // sdot v17.4s, v13.16b, v0.4b[1]\n" + "prfm PLDL1KEEP, [a_ptr2, #0x40]\n" + ".word 0x4fa1e1b5 // sdot v21.4s, v13.16b, v1.4b[1]\n" + ".word 0x4fa2e1b9 // sdot v25.4s, v13.16b, v2.4b[1]\n" + "ldr q13, [%[b_ptr0], #0x50]\n" + ".word 0x4fa0e1d2 // sdot v18.4s, v14.16b, v0.4b[1]\n" + ".word 0x4fa1e1d6 // sdot v22.4s, v14.16b, v1.4b[1]\n" + ".word 0x4fa2e1da // sdot v26.4s, v14.16b, v2.4b[1]\n" + "ldr q14, [%[b_ptr0], #0x60]\n" + ".word 0x4fa0e1f3 // sdot v19.4s, v15.16b, v0.4b[1]\n" + ".word 0x4fa1e1f7 // sdot v23.4s, v15.16b, v1.4b[1]\n" + ".word 0x4fa2e1fb // sdot v27.4s, v15.16b, v2.4b[1]\n" + "ldr q15, [%[b_ptr0], #0x70]\n" + ".word 0x4f80e910 // sdot v16.4s, v8.16b, v0.4b[2]\n" + "add %[b_ptr0], %[b_ptr0], #0x100\n" + ".word 0x4f81e914 // sdot v20.4s, v8.16b, v1.4b[2]\n" + ".word 0x4f82e918 // sdot v24.4s, v8.16b, v2.4b[2]\n" + "ldr q8, [%[b_ptr0], #-0x80]\n" + ".word 0x4f80e931 // sdot v17.4s, v9.16b, v0.4b[2]\n" + ".word 0x4f81e935 // sdot v21.4s, v9.16b, v1.4b[2]\n" + ".word 0x4f82e939 // sdot v25.4s, v9.16b, v2.4b[2]\n" + "ldr q9, [%[b_ptr0], #-0x70]\n" + ".word 0x4f80e952 // sdot v18.4s, v10.16b, v0.4b[2]\n" + ".word 0x4f81e956 // sdot v22.4s, v10.16b, v1.4b[2]\n" + ".word 0x4f82e95a // sdot v26.4s, v10.16b, v2.4b[2]\n" + "ldr q10, [%[b_ptr0], #-0x60]\n" + ".word 0x4f80e973 // sdot v19.4s, v11.16b, v0.4b[2]\n" + ".word 0x4f81e977 // sdot v23.4s, v11.16b, v1.4b[2]\n" + ".word 0x4f82e97b // sdot v27.4s, v11.16b, v2.4b[2]\n" + "ldr q11, [%[b_ptr0], #-0x50]\n" + ".word 0x4fa0e990 // sdot v16.4s, v12.16b, v0.4b[3]\n" + ".word 0x4fa1e994 // sdot v20.4s, v12.16b, v1.4b[3]\n" + ".word 0x4fa2e998 // sdot v24.4s, v12.16b, v2.4b[3]\n" + "ldr q12, [%[b_ptr0], #-0x40]\n" + ".word 0x4fa0e9b1 // sdot v17.4s, v13.16b, v0.4b[3]\n" + ".word 0x4fa1e9b5 // sdot v21.4s, v13.16b, v1.4b[3]\n" + ".word 0x4fa2e9b9 // sdot v25.4s, v13.16b, v2.4b[3]\n" + "ldr q13, [%[b_ptr0], #-0x30]\n" + ".word 0x4fa0e9d2 // sdot v18.4s, v14.16b, v0.4b[3]\n" + ".word 0x4fa1e9d6 // sdot v22.4s, v14.16b, v1.4b[3]\n" + ".word 0x4fa2e9da // sdot v26.4s, v14.16b, v2.4b[3]\n" + "ldr q14, [%[b_ptr0], #-0x20]\n" + ".word 0x4fa0e9f3 // sdot v19.4s, v15.16b, v0.4b[3]\n" + "ldr q0, [%[a_ptr0], #-0x10]\n" + ".word 0x4fa1e9f7 // sdot v23.4s, v15.16b, v1.4b[3]\n" + "ldr q1, [a_ptr1, #-0x10]\n" + ".word 0x4fa2e9fb // sdot v27.4s, v15.16b, v2.4b[3]\n" + "ldr q15, [%[b_ptr0], #-0x10]\n" + ".word 0x4f84e110 // sdot v16.4s, v8.16b, v4.4b[0]\n" + "ldr q2, [a_ptr2, #-0x10]\n" + ".word 0x4f85e114 // sdot v20.4s, v8.16b, v5.4b[0]\n" + ".word 0x4f86e118 // sdot v24.4s, v8.16b, v6.4b[0]\n" + "ldr q8, [%[b_ptr0]]\n" + ".word 0x4f84e131 // sdot v17.4s, v9.16b, v4.4b[0]\n" + ".word 0x4f85e135 // sdot v21.4s, v9.16b, v5.4b[0]\n" + ".word 0x4f86e139 // sdot v25.4s, v9.16b, v6.4b[0]\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + ".word 0x4f84e152 // sdot v18.4s, v10.16b, v4.4b[0]\n" + ".word 0x4f85e156 // sdot v22.4s, v10.16b, v5.4b[0]\n" + ".word 0x4f86e15a // sdot v26.4s, v10.16b, v6.4b[0]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + ".word 0x4f84e173 // sdot v19.4s, v11.16b, v4.4b[0]\n" + ".word 0x4f85e177 // sdot v23.4s, v11.16b, v5.4b[0]\n" + ".word 0x4f86e17b // sdot v27.4s, v11.16b, v6.4b[0]\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + ".word 0x4fa4e190 // sdot v16.4s, v12.16b, v4.4b[1]\n" + ".word 0x4fa5e194 // sdot v20.4s, v12.16b, v5.4b[1]\n" + ".word 0x4fa6e198 // sdot v24.4s, v12.16b, v6.4b[1]\n" + "ldr q12, [%[b_ptr0], #0x40]\n" + ".word 0x4fa4e1b1 // sdot v17.4s, v13.16b, v4.4b[1]\n" + ".word 0x4fa5e1b5 // sdot v21.4s, v13.16b, v5.4b[1]\n" + ".word 0x4fa6e1b9 // sdot v25.4s, v13.16b, v6.4b[1]\n" + "ldr q13, [%[b_ptr0], #0x50]\n" + ".word 0x4fa4e1d2 // sdot v18.4s, v14.16b, v4.4b[1]\n" + ".word 0x4fa5e1d6 // sdot v22.4s, v14.16b, v5.4b[1]\n" + ".word 0x4fa6e1da // sdot v26.4s, v14.16b, v6.4b[1]\n" + "ldr q14, [%[b_ptr0], #0x60]\n" + ".word 0x4fa4e1f3 // sdot v19.4s, v15.16b, v4.4b[1]\n" + ".word 0x4fa5e1f7 // sdot v23.4s, v15.16b, v5.4b[1]\n" + ".word 0x4fa6e1fb // sdot v27.4s, v15.16b, v6.4b[1]\n" + "ldr q15, [%[b_ptr0], #0x70]\n" + ".word 0x4f84e910 // sdot v16.4s, v8.16b, v4.4b[2]\n" + "add %[b_ptr0], %[b_ptr0], #0x100\n" + ".word 0x4f85e914 // sdot v20.4s, v8.16b, v5.4b[2]\n" + ".word 0x4f86e918 // sdot v24.4s, v8.16b, v6.4b[2]\n" + "ldr q8, [%[b_ptr0], #-0x80]\n" + ".word 0x4f84e931 // sdot v17.4s, v9.16b, v4.4b[2]\n" + ".word 0x4f85e935 // sdot v21.4s, v9.16b, v5.4b[2]\n" + ".word 0x4f86e939 // sdot v25.4s, v9.16b, v6.4b[2]\n" + "ldr q9, [%[b_ptr0], #-0x70]\n" + ".word 0x4f84e952 // sdot v18.4s, v10.16b, v4.4b[2]\n" + ".word 0x4f85e956 // sdot v22.4s, v10.16b, v5.4b[2]\n" + ".word 0x4f86e95a // sdot v26.4s, v10.16b, v6.4b[2]\n" + "ldr q10, [%[b_ptr0], #-0x60]\n" + ".word 0x4f84e973 // sdot v19.4s, v11.16b, v4.4b[2]\n" + ".word 0x4f85e977 // sdot v23.4s, v11.16b, v5.4b[2]\n" + ".word 0x4f86e97b // sdot v27.4s, v11.16b, v6.4b[2]\n" + "ldr q11, [%[b_ptr0], #-0x50]\n" + ".word 0x4fa4e990 // sdot v16.4s, v12.16b, v4.4b[3]\n" + ".word 0x4fa5e994 // sdot v20.4s, v12.16b, v5.4b[3]\n" + ".word 0x4fa6e998 // sdot v24.4s, v12.16b, v6.4b[3]\n" + "ldr q12, [%[b_ptr0], #-0x40]\n" + ".word 0x4fa4e9b1 // sdot v17.4s, v13.16b, v4.4b[3]\n" + ".word 0x4fa5e9b5 // sdot v21.4s, v13.16b, v5.4b[3]\n" + ".word 0x4fa6e9b9 // sdot v25.4s, v13.16b, v6.4b[3]\n" + "ldr q13, [%[b_ptr0], #-0x30]\n" + ".word 0x4fa4e9d2 // sdot v18.4s, v14.16b, v4.4b[3]\n" + ".word 0x4fa5e9d6 // sdot v22.4s, v14.16b, v5.4b[3]\n" + ".word 0x4fa6e9da // sdot v26.4s, v14.16b, v6.4b[3]\n" + "ldr q14, [%[b_ptr0], #-0x20]\n" + ".word 0x4fa4e9f3 // sdot v19.4s, v15.16b, v4.4b[3]\n" + ".word 0x4fa5e9f7 // sdot v23.4s, v15.16b, v5.4b[3]\n" + ".word 0x4fa6e9fb // sdot v27.4s, v15.16b, v6.4b[3]\n" + "b.ne 3b\n" + "2:\n" + "ldr q15, [%[b_ptr0], #-0x10]\n" + "prfm PSTL1KEEP, [%[c_ptr0]]\n" + "prfm PSTL1KEEP, [c_ptr1]\n" + "prfm PSTL1KEEP, [c_ptr2]\n" + "cbz %[regs], 4f\n" + ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" + "ldr q4, [%[a_ptr0]]\n" + ".word 0x4f81e114 // sdot v20.4s, v8.16b, v1.4b[0]\n" + "ldr q5, [a_ptr1]\n" + ".word 0x4f82e118 // sdot v24.4s, v8.16b, v2.4b[0]\n" + "ldr q6, [a_ptr2]\n" + ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" + "ldr q8, [%[b_ptr0]]\n" + ".word 0x4f81e135 // sdot v21.4s, v9.16b, v1.4b[0]\n" + "add %[a_ptr0], %[a_ptr0], #0x10\n" + ".word 0x4f82e139 // sdot v25.4s, v9.16b, v2.4b[0]\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" + "add a_ptr1, a_ptr1, #0x10\n" + ".word 0x4f81e156 // sdot v22.4s, v10.16b, v1.4b[0]\n" + "add a_ptr2, a_ptr2, #0x10\n" + ".word 0x4f82e15a // sdot v26.4s, v10.16b, v2.4b[0]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" + ".word 0x4f81e177 // sdot v23.4s, v11.16b, v1.4b[0]\n" + ".word 0x4f82e17b // sdot v27.4s, v11.16b, v2.4b[0]\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + ".word 0x4fa0e190 // sdot v16.4s, v12.16b, v0.4b[1]\n" + ".word 0x4fa1e194 // sdot v20.4s, v12.16b, v1.4b[1]\n" + ".word 0x4fa2e198 // sdot v24.4s, v12.16b, v2.4b[1]\n" + "ldr q12, [%[b_ptr0], #0x40]\n" + ".word 0x4fa0e1b1 // sdot v17.4s, v13.16b, v0.4b[1]\n" + ".word 0x4fa1e1b5 // sdot v21.4s, v13.16b, v1.4b[1]\n" + ".word 0x4fa2e1b9 // sdot v25.4s, v13.16b, v2.4b[1]\n" + "ldr q13, [%[b_ptr0], #0x50]\n" + ".word 0x4fa0e1d2 // sdot v18.4s, v14.16b, v0.4b[1]\n" + ".word 0x4fa1e1d6 // sdot v22.4s, v14.16b, v1.4b[1]\n" + ".word 0x4fa2e1da // sdot v26.4s, v14.16b, v2.4b[1]\n" + "ldr q14, [%[b_ptr0], #0x60]\n" + ".word 0x4fa0e1f3 // sdot v19.4s, v15.16b, v0.4b[1]\n" + ".word 0x4fa1e1f7 // sdot v23.4s, v15.16b, v1.4b[1]\n" + ".word 0x4fa2e1fb // sdot v27.4s, v15.16b, v2.4b[1]\n" + "ldr q15, [%[b_ptr0], #0x70]\n" + ".word 0x4f80e910 // sdot v16.4s, v8.16b, v0.4b[2]\n" + "add %[b_ptr0], %[b_ptr0], #0x100\n" + ".word 0x4f81e914 // sdot v20.4s, v8.16b, v1.4b[2]\n" + ".word 0x4f82e918 // sdot v24.4s, v8.16b, v2.4b[2]\n" + "ldr q8, [%[b_ptr0], #-0x80]\n" + ".word 0x4f80e931 // sdot v17.4s, v9.16b, v0.4b[2]\n" + ".word 0x4f81e935 // sdot v21.4s, v9.16b, v1.4b[2]\n" + ".word 0x4f82e939 // sdot v25.4s, v9.16b, v2.4b[2]\n" + "ldr q9, [%[b_ptr0], #-0x70]\n" + ".word 0x4f80e952 // sdot v18.4s, v10.16b, v0.4b[2]\n" + ".word 0x4f81e956 // sdot v22.4s, v10.16b, v1.4b[2]\n" + ".word 0x4f82e95a // sdot v26.4s, v10.16b, v2.4b[2]\n" + "ldr q10, [%[b_ptr0], #-0x60]\n" + ".word 0x4f80e973 // sdot v19.4s, v11.16b, v0.4b[2]\n" + ".word 0x4f81e977 // sdot v23.4s, v11.16b, v1.4b[2]\n" + ".word 0x4f82e97b // sdot v27.4s, v11.16b, v2.4b[2]\n" + "ldr q11, [%[b_ptr0], #-0x50]\n" + ".word 0x4fa0e990 // sdot v16.4s, v12.16b, v0.4b[3]\n" + ".word 0x4fa1e994 // sdot v20.4s, v12.16b, v1.4b[3]\n" + ".word 0x4fa2e998 // sdot v24.4s, v12.16b, v2.4b[3]\n" + "ldr q12, [%[b_ptr0], #-0x40]\n" + ".word 0x4fa0e9b1 // sdot v17.4s, v13.16b, v0.4b[3]\n" + ".word 0x4fa1e9b5 // sdot v21.4s, v13.16b, v1.4b[3]\n" + ".word 0x4fa2e9b9 // sdot v25.4s, v13.16b, v2.4b[3]\n" + "ldr q13, [%[b_ptr0], #-0x30]\n" + ".word 0x4fa0e9d2 // sdot v18.4s, v14.16b, v0.4b[3]\n" + ".word 0x4fa1e9d6 // sdot v22.4s, v14.16b, v1.4b[3]\n" + ".word 0x4fa2e9da // sdot v26.4s, v14.16b, v2.4b[3]\n" + "ldr q14, [%[b_ptr0], #-0x20]\n" + ".word 0x4fa0e9f3 // sdot v19.4s, v15.16b, v0.4b[3]\n" + ".word 0x4fa1e9f7 // sdot v23.4s, v15.16b, v1.4b[3]\n" + ".word 0x4fa2e9fb // sdot v27.4s, v15.16b, v2.4b[3]\n" + "ldr q15, [%[b_ptr0], #-0x10]\n" + ".word 0x4f84e110 // sdot v16.4s, v8.16b, v4.4b[0]\n" + ".word 0x4f85e114 // sdot v20.4s, v8.16b, v5.4b[0]\n" + ".word 0x4f86e118 // sdot v24.4s, v8.16b, v6.4b[0]\n" + "ldr q8, [%[b_ptr0]]\n" + ".word 0x4f84e131 // sdot v17.4s, v9.16b, v4.4b[0]\n" + ".word 0x4f85e135 // sdot v21.4s, v9.16b, v5.4b[0]\n" + ".word 0x4f86e139 // sdot v25.4s, v9.16b, v6.4b[0]\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + ".word 0x4f84e152 // sdot v18.4s, v10.16b, v4.4b[0]\n" + ".word 0x4f85e156 // sdot v22.4s, v10.16b, v5.4b[0]\n" + ".word 0x4f86e15a // sdot v26.4s, v10.16b, v6.4b[0]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + ".word 0x4f84e173 // sdot v19.4s, v11.16b, v4.4b[0]\n" + ".word 0x4f85e177 // sdot v23.4s, v11.16b, v5.4b[0]\n" + ".word 0x4f86e17b // sdot v27.4s, v11.16b, v6.4b[0]\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + ".word 0x4fa4e190 // sdot v16.4s, v12.16b, v4.4b[1]\n" + ".word 0x4fa5e194 // sdot v20.4s, v12.16b, v5.4b[1]\n" + ".word 0x4fa6e198 // sdot v24.4s, v12.16b, v6.4b[1]\n" + "ldr q12, [%[b_ptr0], #0x40]\n" + ".word 0x4fa4e1b1 // sdot v17.4s, v13.16b, v4.4b[1]\n" + ".word 0x4fa5e1b5 // sdot v21.4s, v13.16b, v5.4b[1]\n" + ".word 0x4fa6e1b9 // sdot v25.4s, v13.16b, v6.4b[1]\n" + "ldr q13, [%[b_ptr0], #0x50]\n" + ".word 0x4fa4e1d2 // sdot v18.4s, v14.16b, v4.4b[1]\n" + ".word 0x4fa5e1d6 // sdot v22.4s, v14.16b, v5.4b[1]\n" + ".word 0x4fa6e1da // sdot v26.4s, v14.16b, v6.4b[1]\n" + "ldr q14, [%[b_ptr0], #0x60]\n" + ".word 0x4fa4e1f3 // sdot v19.4s, v15.16b, v4.4b[1]\n" + ".word 0x4fa5e1f7 // sdot v23.4s, v15.16b, v5.4b[1]\n" + ".word 0x4fa6e1fb // sdot v27.4s, v15.16b, v6.4b[1]\n" + "ldr q15, [%[b_ptr0], #0x70]\n" + ".word 0x4f84e910 // sdot v16.4s, v8.16b, v4.4b[2]\n" + "add %[b_ptr0], %[b_ptr0], #0x80\n" + ".word 0x4f85e914 // sdot v20.4s, v8.16b, v5.4b[2]\n" + ".word 0x4f86e918 // sdot v24.4s, v8.16b, v6.4b[2]\n" + ".word 0x4f84e931 // sdot v17.4s, v9.16b, v4.4b[2]\n" + ".word 0x4f85e935 // sdot v21.4s, v9.16b, v5.4b[2]\n" + ".word 0x4f86e939 // sdot v25.4s, v9.16b, v6.4b[2]\n" + ".word 0x4f84e952 // sdot v18.4s, v10.16b, v4.4b[2]\n" + ".word 0x4f85e956 // sdot v22.4s, v10.16b, v5.4b[2]\n" + ".word 0x4f86e95a // sdot v26.4s, v10.16b, v6.4b[2]\n" + ".word 0x4f84e973 // sdot v19.4s, v11.16b, v4.4b[2]\n" + ".word 0x4f85e977 // sdot v23.4s, v11.16b, v5.4b[2]\n" + ".word 0x4f86e97b // sdot v27.4s, v11.16b, v6.4b[2]\n" + ".word 0x4fa4e990 // sdot v16.4s, v12.16b, v4.4b[3]\n" + ".word 0x4fa5e994 // sdot v20.4s, v12.16b, v5.4b[3]\n" + ".word 0x4fa6e998 // sdot v24.4s, v12.16b, v6.4b[3]\n" + ".word 0x4fa4e9b1 // sdot v17.4s, v13.16b, v4.4b[3]\n" + ".word 0x4fa5e9b5 // sdot v21.4s, v13.16b, v5.4b[3]\n" + ".word 0x4fa6e9b9 // sdot v25.4s, v13.16b, v6.4b[3]\n" + ".word 0x4fa4e9d2 // sdot v18.4s, v14.16b, v4.4b[3]\n" + ".word 0x4fa5e9d6 // sdot v22.4s, v14.16b, v5.4b[3]\n" + ".word 0x4fa6e9da // sdot v26.4s, v14.16b, v6.4b[3]\n" + ".word 0x4fa4e9f3 // sdot v19.4s, v15.16b, v4.4b[3]\n" + ".word 0x4fa5e9f7 // sdot v23.4s, v15.16b, v5.4b[3]\n" + ".word 0x4fa6e9fb // sdot v27.4s, v15.16b, v6.4b[3]\n" + "b 5f\n" + "4:\n" + ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" + ".word 0x4f81e114 // sdot v20.4s, v8.16b, v1.4b[0]\n" + ".word 0x4f82e118 // sdot v24.4s, v8.16b, v2.4b[0]\n" + "ldr q8, [%[b_ptr0]]\n" + ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" + ".word 0x4f81e135 // sdot v21.4s, v9.16b, v1.4b[0]\n" + ".word 0x4f82e139 // sdot v25.4s, v9.16b, v2.4b[0]\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" + ".word 0x4f81e156 // sdot v22.4s, v10.16b, v1.4b[0]\n" + ".word 0x4f82e15a // sdot v26.4s, v10.16b, v2.4b[0]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" + ".word 0x4f81e177 // sdot v23.4s, v11.16b, v1.4b[0]\n" + ".word 0x4f82e17b // sdot v27.4s, v11.16b, v2.4b[0]\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + ".word 0x4fa0e190 // sdot v16.4s, v12.16b, v0.4b[1]\n" + ".word 0x4fa1e194 // sdot v20.4s, v12.16b, v1.4b[1]\n" + ".word 0x4fa2e198 // sdot v24.4s, v12.16b, v2.4b[1]\n" + "ldr q12, [%[b_ptr0], #0x40]\n" + ".word 0x4fa0e1b1 // sdot v17.4s, v13.16b, v0.4b[1]\n" + ".word 0x4fa1e1b5 // sdot v21.4s, v13.16b, v1.4b[1]\n" + ".word 0x4fa2e1b9 // sdot v25.4s, v13.16b, v2.4b[1]\n" + "ldr q13, [%[b_ptr0], #0x50]\n" + ".word 0x4fa0e1d2 // sdot v18.4s, v14.16b, v0.4b[1]\n" + ".word 0x4fa1e1d6 // sdot v22.4s, v14.16b, v1.4b[1]\n" + ".word 0x4fa2e1da // sdot v26.4s, v14.16b, v2.4b[1]\n" + "ldr q14, [%[b_ptr0], #0x60]\n" + ".word 0x4fa0e1f3 // sdot v19.4s, v15.16b, v0.4b[1]\n" + ".word 0x4fa1e1f7 // sdot v23.4s, v15.16b, v1.4b[1]\n" + ".word 0x4fa2e1fb // sdot v27.4s, v15.16b, v2.4b[1]\n" + "ldr q15, [%[b_ptr0], #0x70]\n" + ".word 0x4f80e910 // sdot v16.4s, v8.16b, v0.4b[2]\n" + "add %[b_ptr0], %[b_ptr0], #0x80\n" + ".word 0x4f81e914 // sdot v20.4s, v8.16b, v1.4b[2]\n" + ".word 0x4f82e918 // sdot v24.4s, v8.16b, v2.4b[2]\n" + ".word 0x4f80e931 // sdot v17.4s, v9.16b, v0.4b[2]\n" + ".word 0x4f81e935 // sdot v21.4s, v9.16b, v1.4b[2]\n" + ".word 0x4f82e939 // sdot v25.4s, v9.16b, v2.4b[2]\n" + ".word 0x4f80e952 // sdot v18.4s, v10.16b, v0.4b[2]\n" + ".word 0x4f81e956 // sdot v22.4s, v10.16b, v1.4b[2]\n" + ".word 0x4f82e95a // sdot v26.4s, v10.16b, v2.4b[2]\n" + ".word 0x4f80e973 // sdot v19.4s, v11.16b, v0.4b[2]\n" + ".word 0x4f81e977 // sdot v23.4s, v11.16b, v1.4b[2]\n" + ".word 0x4f82e97b // sdot v27.4s, v11.16b, v2.4b[2]\n" + ".word 0x4fa0e990 // sdot v16.4s, v12.16b, v0.4b[3]\n" + ".word 0x4fa1e994 // sdot v20.4s, v12.16b, v1.4b[3]\n" + ".word 0x4fa2e998 // sdot v24.4s, v12.16b, v2.4b[3]\n" + ".word 0x4fa0e9b1 // sdot v17.4s, v13.16b, v0.4b[3]\n" + ".word 0x4fa1e9b5 // sdot v21.4s, v13.16b, v1.4b[3]\n" + ".word 0x4fa2e9b9 // sdot v25.4s, v13.16b, v2.4b[3]\n" + ".word 0x4fa0e9d2 // sdot v18.4s, v14.16b, v0.4b[3]\n" + ".word 0x4fa1e9d6 // sdot v22.4s, v14.16b, v1.4b[3]\n" + ".word 0x4fa2e9da // sdot v26.4s, v14.16b, v2.4b[3]\n" + ".word 0x4fa0e9f3 // sdot v19.4s, v15.16b, v0.4b[3]\n" + ".word 0x4fa1e9f7 // sdot v23.4s, v15.16b, v1.4b[3]\n" + ".word 0x4fa2e9fb // sdot v27.4s, v15.16b, v2.4b[3]\n" + "5:\n" + "cbz %[blocks], 6f\n" + "7:\n" + "ldr q8, [%[b_ptr0]]\n" + "subs %[blocks], %[blocks], #0x1\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + "ldr s0, [%[a_ptr0]]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + "add %[a_ptr0], %[a_ptr0], #0x4\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + "add %[b_ptr0], %[b_ptr0], #0x40\n" + ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" + "ldr s1, [a_ptr1]\n" + ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" + "add a_ptr1, a_ptr1, #0x4\n" + ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" + "ldr s2, [a_ptr2]\n" + ".word 0x4f81e114 // sdot v20.4s, v8.16b, v1.4b[0]\n" + "add a_ptr2, a_ptr2, #0x4\n" + ".word 0x4f81e135 // sdot v21.4s, v9.16b, v1.4b[0]\n" + ".word 0x4f82e118 // sdot v24.4s, v8.16b, v2.4b[0]\n" + ".word 0x4f82e139 // sdot v25.4s, v9.16b, v2.4b[0]\n" + ".word 0x4f81e156 // sdot v22.4s, v10.16b, v1.4b[0]\n" + ".word 0x4f82e15a // sdot v26.4s, v10.16b, v2.4b[0]\n" + ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" + ".word 0x4f81e177 // sdot v23.4s, v11.16b, v1.4b[0]\n" + ".word 0x4f82e17b // sdot v27.4s, v11.16b, v2.4b[0]\n" + "b.ne 7b\n" + "6:\n" + "cbz %[odds], 8f\n" + "ld1 {v0.b}[0], [%[a_ptr0]], #1\n" + "ld1 {v1.b}[0], [a_ptr1], #1\n" + "ld1 {v2.b}[0], [a_ptr2], #1\n" + "subs %[odds], %[odds], #0x1\n" + "b.eq 9f\n" + "ld1 {v0.b}[1], [%[a_ptr0]], #1\n" + "ld1 {v1.b}[1], [a_ptr1], #1\n" + "ld1 {v2.b}[1], [a_ptr2], #1\n" + "subs %[odds], %[odds], #0x1\n" + "b.eq 9f\n" + "ld1 {v0.b}[2], [%[a_ptr0]]\n" + "ld1 {v1.b}[2], [a_ptr1]\n" + "ld1 {v2.b}[2], [a_ptr2]\n" + "9:\n" + "ldr q8, [%[b_ptr0]]\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" + ".word 0x4f81e114 // sdot v20.4s, v8.16b, v1.4b[0]\n" + ".word 0x4f82e118 // sdot v24.4s, v8.16b, v2.4b[0]\n" + ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" + ".word 0x4f81e135 // sdot v21.4s, v9.16b, v1.4b[0]\n" + ".word 0x4f82e139 // sdot v25.4s, v9.16b, v2.4b[0]\n" + ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" + ".word 0x4f81e156 // sdot v22.4s, v10.16b, v1.4b[0]\n" + ".word 0x4f82e15a // sdot v26.4s, v10.16b, v2.4b[0]\n" + ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" + ".word 0x4f81e177 // sdot v23.4s, v11.16b, v1.4b[0]\n" + ".word 0x4f82e17b // sdot v27.4s, v11.16b, v2.4b[0]\n" + "8:\n" + "str q16, [%[c_ptr0]]\n" + "str q17, [%[c_ptr0], #0x10]\n" + "str q18, [%[c_ptr0], #0x20]\n" + "str q19, [%[c_ptr0], #0x30]\n" + "add %[c_ptr0], %[c_ptr0], #0x40\n" + "str q20, [c_ptr1]\n" + "str q21, [c_ptr1, #0x10]\n" + "str q22, [c_ptr1, #0x20]\n" + "str q23, [c_ptr1, #0x30]\n" + "str q24, [c_ptr2]\n" + "str q25, [c_ptr2, #0x10]\n" + "str q26, [c_ptr2, #0x20]\n" + "str q27, [c_ptr2, #0x30]\n" + ".unreq a_ptr1\n" + ".unreq a_ptr2\n" + ".unreq c_ptr1\n" + ".unreq c_ptr2\n" + : [a_ptr0] "+r" (a_ptr0), [b_ptr0] "+r" (b_ptr0), [c_ptr0] "+r" (c_ptr0), [loops] "+r" (loops), [regs] "+r" (regs), [blocks] "+r" (blocks), [odds] "+r" (odds) + : [betaptr] "r" (betaptr), [width] "r" (width), [beta0] "r" (beta0), [lda] "r" (ldab), [ldc] "r" (ldcb) + : "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x0", "x1", "x2", "x3", "cc", "memory" ); break; default: case 4: __asm __volatile ( - "a_ptr1 .req X0\n" - "a_ptr2 .req X1\n" - "a_ptr3 .req X2\n" - "c_ptr1 .req X3\n" - "c_ptr2 .req X4\n" - "c_ptr3 .req X5\n" - "add a_ptr1, %[a_ptr0], %[lda]\n" - "add c_ptr1, %[c_ptr0], %[ldc]\n" - "add a_ptr2, a_ptr1, %[lda]\n" - "add c_ptr2, c_ptr1, %[ldc]\n" - "add a_ptr3, a_ptr2, %[lda]\n" - "add c_ptr3, c_ptr2, %[ldc]\n" - "cbz %[beta0], 1f\n" - "movi v16.4s, #0\n" - "ldr q0, [%[a_ptr0]]\n" - "movi v17.4s, #0\n" - "ldr q1, [a_ptr1]\n" - "movi v18.4s, #0\n" - "ldr q2, [a_ptr2]\n" - "movi v19.4s, #0\n" - "ldr q3, [a_ptr3]\n" - "movi v20.4s, #0\n" - "ldr q8, [%[b_ptr0]]\n" - "movi v21.4s, #0\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - "movi v22.4s, #0\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - "movi v23.4s, #0\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - "movi v24.4s, #0\n" - "ldr q12, [%[b_ptr0], #0x40]\n" - "movi v25.4s, #0\n" - "ldr q13, [%[b_ptr0], #0x50]\n" - "movi v26.4s, #0\n" - "ldr q14, [%[b_ptr0], #0x60]\n" - "movi v27.4s, #0\n" - "add %[a_ptr0], %[a_ptr0], #0x10\n" - "movi v28.4s, #0\n" - "add a_ptr1, a_ptr1, #0x10\n" - "movi v29.4s, #0\n" - "add a_ptr2, a_ptr2, #0x10\n" - "movi v30.4s, #0\n" - "add a_ptr3, a_ptr3, #0x10\n" - "movi v31.4s, #0\n" - "add %[b_ptr0], %[b_ptr0], #0x80\n" - "cbz %[loops], 2f\n" - "b 3f\n" - "1:\n" - "ld1r {v15.4s}, [%[betaptr]]\n" - "ldr q16, [%[c_ptr0]]\n" - "ldr q17, [%[c_ptr0], #0x10]\n" - "ldr q18, [%[c_ptr0], #0x20]\n" - "ldr q19, [%[c_ptr0], #0x30]\n" - "mul v16.4s, v16.4s, v15.4s\n" - "ldr q20, [c_ptr1]\n" - "mul v17.4s, v17.4s, v15.4s\n" - "ldr q21, [c_ptr1, #0x10]\n" - "mul v18.4s, v18.4s, v15.4s\n" - "ldr q22, [c_ptr1, #0x20]\n" - "mul v19.4s, v19.4s, v15.4s\n" - "ldr q23, [c_ptr1, #0x30]\n" - "mul v20.4s, v20.4s, v15.4s\n" - "ldr q24, [c_ptr2]\n" - "mul v21.4s, v21.4s, v15.4s\n" - "ldr q25, [c_ptr2, #0x10]\n" - "mul v22.4s, v22.4s, v15.4s\n" - "ldr q26, [c_ptr2, #0x20]\n" - "mul v23.4s, v23.4s, v15.4s\n" - "ldr q27, [c_ptr2, #0x30]\n" - "mul v24.4s, v24.4s, v15.4s\n" - "ldr q28, [c_ptr3]\n" - "mul v25.4s, v25.4s, v15.4s\n" - "ldr q29, [c_ptr3, #0x10]\n" - "mul v26.4s, v26.4s, v15.4s\n" - "ldr q30, [c_ptr3, #0x20]\n" - "mul v27.4s, v27.4s, v15.4s\n" - "ldr q31, [c_ptr3, #0x30]\n" - "mul v28.4s, v28.4s, v15.4s\n" - "ldr q0, [%[a_ptr0]]\n" - "mul v29.4s, v29.4s, v15.4s\n" - "ldr q1, [a_ptr1]\n" - "mul v30.4s, v30.4s, v15.4s\n" - "ldr q2, [a_ptr2]\n" - "mul v31.4s, v31.4s, v15.4s\n" - "ldr q3, [a_ptr3]\n" - "ldr q8, [%[b_ptr0]]\n" - "add %[a_ptr0], %[a_ptr0], #0x10\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - "add a_ptr1, a_ptr1, #0x10\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - "add a_ptr2, a_ptr2, #0x10\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - "add a_ptr3, a_ptr3, #0x10\n" - "ldr q12, [%[b_ptr0], #0x40]\n" - "ldr q13, [%[b_ptr0], #0x50]\n" - "ldr q14, [%[b_ptr0], #0x60]\n" - "add %[b_ptr0], %[b_ptr0], #0x80\n" - "cbz %[loops], 2f\n" - "3:\n" - ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" - "ldr q15, [%[b_ptr0], #-0x10]\n" - ".word 0x4f81e114 // sdot v20.4s, v8.16b, v1.4b[0]\n" - "ldr q4, [%[a_ptr0]]\n" - ".word 0x4f82e118 // sdot v24.4s, v8.16b, v2.4b[0]\n" - "ldr q5, [a_ptr1]\n" - ".word 0x4f83e11c // sdot v28.4s, v8.16b, v3.4b[0]\n" - "ldr q6, [a_ptr2]\n" - ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" - "ldr q7, [a_ptr3]\n" - ".word 0x4f81e135 // sdot v21.4s, v9.16b, v1.4b[0]\n" - "ldr q8, [%[b_ptr0]]\n" - ".word 0x4f82e139 // sdot v25.4s, v9.16b, v2.4b[0]\n" - "subs %[loops], %[loops], #0x1\n" - ".word 0x4f83e13d // sdot v29.4s, v9.16b, v3.4b[0]\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" - "prfm PLDL1KEEP, [%[a_ptr0], #0x40]\n" - ".word 0x4f81e156 // sdot v22.4s, v10.16b, v1.4b[0]\n" - "add %[a_ptr0], %[a_ptr0], #0x20\n" - ".word 0x4f82e15a // sdot v26.4s, v10.16b, v2.4b[0]\n" - "add a_ptr1, a_ptr1, #0x20\n" - ".word 0x4f83e15e // sdot v30.4s, v10.16b, v3.4b[0]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" - "add a_ptr2, a_ptr2, #0x20\n" - ".word 0x4f81e177 // sdot v23.4s, v11.16b, v1.4b[0]\n" - "add a_ptr3, a_ptr3, #0x20\n" - ".word 0x4f82e17b // sdot v27.4s, v11.16b, v2.4b[0]\n" - "prfm PLDL1KEEP, [a_ptr1, #0x40]\n" - ".word 0x4f83e17f // sdot v31.4s, v11.16b, v3.4b[0]\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - ".word 0x4fa0e190 // sdot v16.4s, v12.16b, v0.4b[1]\n" - "prfm PLDL1KEEP, [a_ptr2, #0x40]\n" - ".word 0x4fa1e194 // sdot v20.4s, v12.16b, v1.4b[1]\n" - "prfm PLDL1KEEP, [a_ptr3, #0x40]\n" - ".word 0x4fa2e198 // sdot v24.4s, v12.16b, v2.4b[1]\n" - ".word 0x4fa3e19c // sdot v28.4s, v12.16b, v3.4b[1]\n" - "ldr q12, [%[b_ptr0], #0x40]\n" - ".word 0x4fa0e1b1 // sdot v17.4s, v13.16b, v0.4b[1]\n" - ".word 0x4fa1e1b5 // sdot v21.4s, v13.16b, v1.4b[1]\n" - ".word 0x4fa2e1b9 // sdot v25.4s, v13.16b, v2.4b[1]\n" - ".word 0x4fa3e1bd // sdot v29.4s, v13.16b, v3.4b[1]\n" - "ldr q13, [%[b_ptr0], #0x50]\n" - ".word 0x4fa0e1d2 // sdot v18.4s, v14.16b, v0.4b[1]\n" - ".word 0x4fa1e1d6 // sdot v22.4s, v14.16b, v1.4b[1]\n" - ".word 0x4fa2e1da // sdot v26.4s, v14.16b, v2.4b[1]\n" - ".word 0x4fa3e1de // sdot v30.4s, v14.16b, v3.4b[1]\n" - "ldr q14, [%[b_ptr0], #0x60]\n" - ".word 0x4fa0e1f3 // sdot v19.4s, v15.16b, v0.4b[1]\n" - ".word 0x4fa1e1f7 // sdot v23.4s, v15.16b, v1.4b[1]\n" - ".word 0x4fa2e1fb // sdot v27.4s, v15.16b, v2.4b[1]\n" - ".word 0x4fa3e1ff // sdot v31.4s, v15.16b, v3.4b[1]\n" - "ldr q15, [%[b_ptr0], #0x70]\n" - ".word 0x4f80e910 // sdot v16.4s, v8.16b, v0.4b[2]\n" - "add %[b_ptr0], %[b_ptr0], #0x100\n" - ".word 0x4f81e914 // sdot v20.4s, v8.16b, v1.4b[2]\n" - ".word 0x4f82e918 // sdot v24.4s, v8.16b, v2.4b[2]\n" - ".word 0x4f83e91c // sdot v28.4s, v8.16b, v3.4b[2]\n" - "ldr q8, [%[b_ptr0], #-0x80]\n" - ".word 0x4f80e931 // sdot v17.4s, v9.16b, v0.4b[2]\n" - ".word 0x4f81e935 // sdot v21.4s, v9.16b, v1.4b[2]\n" - ".word 0x4f82e939 // sdot v25.4s, v9.16b, v2.4b[2]\n" - ".word 0x4f83e93d // sdot v29.4s, v9.16b, v3.4b[2]\n" - "ldr q9, [%[b_ptr0], #-0x70]\n" - ".word 0x4f80e952 // sdot v18.4s, v10.16b, v0.4b[2]\n" - ".word 0x4f81e956 // sdot v22.4s, v10.16b, v1.4b[2]\n" - ".word 0x4f82e95a // sdot v26.4s, v10.16b, v2.4b[2]\n" - ".word 0x4f83e95e // sdot v30.4s, v10.16b, v3.4b[2]\n" - "ldr q10, [%[b_ptr0], #-0x60]\n" - ".word 0x4f80e973 // sdot v19.4s, v11.16b, v0.4b[2]\n" - ".word 0x4f81e977 // sdot v23.4s, v11.16b, v1.4b[2]\n" - ".word 0x4f82e97b // sdot v27.4s, v11.16b, v2.4b[2]\n" - ".word 0x4f83e97f // sdot v31.4s, v11.16b, v3.4b[2]\n" - "ldr q11, [%[b_ptr0], #-0x50]\n" - ".word 0x4fa0e990 // sdot v16.4s, v12.16b, v0.4b[3]\n" - ".word 0x4fa1e994 // sdot v20.4s, v12.16b, v1.4b[3]\n" - ".word 0x4fa2e998 // sdot v24.4s, v12.16b, v2.4b[3]\n" - ".word 0x4fa3e99c // sdot v28.4s, v12.16b, v3.4b[3]\n" - "ldr q12, [%[b_ptr0], #-0x40]\n" - ".word 0x4fa0e9b1 // sdot v17.4s, v13.16b, v0.4b[3]\n" - ".word 0x4fa1e9b5 // sdot v21.4s, v13.16b, v1.4b[3]\n" - ".word 0x4fa2e9b9 // sdot v25.4s, v13.16b, v2.4b[3]\n" - ".word 0x4fa3e9bd // sdot v29.4s, v13.16b, v3.4b[3]\n" - "ldr q13, [%[b_ptr0], #-0x30]\n" - ".word 0x4fa0e9d2 // sdot v18.4s, v14.16b, v0.4b[3]\n" - ".word 0x4fa1e9d6 // sdot v22.4s, v14.16b, v1.4b[3]\n" - ".word 0x4fa2e9da // sdot v26.4s, v14.16b, v2.4b[3]\n" - ".word 0x4fa3e9de // sdot v30.4s, v14.16b, v3.4b[3]\n" - "ldr q14, [%[b_ptr0], #-0x20]\n" - ".word 0x4fa0e9f3 // sdot v19.4s, v15.16b, v0.4b[3]\n" - "ldr q0, [%[a_ptr0], #-0x10]\n" - ".word 0x4fa1e9f7 // sdot v23.4s, v15.16b, v1.4b[3]\n" - "ldr q1, [a_ptr1, #-0x10]\n" - ".word 0x4fa2e9fb // sdot v27.4s, v15.16b, v2.4b[3]\n" - "ldr q2, [a_ptr2, #-0x10]\n" - ".word 0x4fa3e9ff // sdot v31.4s, v15.16b, v3.4b[3]\n" - "ldr q15, [%[b_ptr0], #-0x10]\n" - ".word 0x4f84e110 // sdot v16.4s, v8.16b, v4.4b[0]\n" - "ldr q3, [a_ptr3, #-0x10]\n" - ".word 0x4f85e114 // sdot v20.4s, v8.16b, v5.4b[0]\n" - ".word 0x4f86e118 // sdot v24.4s, v8.16b, v6.4b[0]\n" - ".word 0x4f87e11c // sdot v28.4s, v8.16b, v7.4b[0]\n" - "ldr q8, [%[b_ptr0]]\n" - ".word 0x4f84e131 // sdot v17.4s, v9.16b, v4.4b[0]\n" - ".word 0x4f85e135 // sdot v21.4s, v9.16b, v5.4b[0]\n" - ".word 0x4f86e139 // sdot v25.4s, v9.16b, v6.4b[0]\n" - ".word 0x4f87e13d // sdot v29.4s, v9.16b, v7.4b[0]\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - ".word 0x4f84e152 // sdot v18.4s, v10.16b, v4.4b[0]\n" - ".word 0x4f85e156 // sdot v22.4s, v10.16b, v5.4b[0]\n" - ".word 0x4f86e15a // sdot v26.4s, v10.16b, v6.4b[0]\n" - ".word 0x4f87e15e // sdot v30.4s, v10.16b, v7.4b[0]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - ".word 0x4f84e173 // sdot v19.4s, v11.16b, v4.4b[0]\n" - ".word 0x4f85e177 // sdot v23.4s, v11.16b, v5.4b[0]\n" - ".word 0x4f86e17b // sdot v27.4s, v11.16b, v6.4b[0]\n" - ".word 0x4f87e17f // sdot v31.4s, v11.16b, v7.4b[0]\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - ".word 0x4fa4e190 // sdot v16.4s, v12.16b, v4.4b[1]\n" - ".word 0x4fa5e194 // sdot v20.4s, v12.16b, v5.4b[1]\n" - ".word 0x4fa6e198 // sdot v24.4s, v12.16b, v6.4b[1]\n" - ".word 0x4fa7e19c // sdot v28.4s, v12.16b, v7.4b[1]\n" - "ldr q12, [%[b_ptr0], #0x40]\n" - ".word 0x4fa4e1b1 // sdot v17.4s, v13.16b, v4.4b[1]\n" - ".word 0x4fa5e1b5 // sdot v21.4s, v13.16b, v5.4b[1]\n" - ".word 0x4fa6e1b9 // sdot v25.4s, v13.16b, v6.4b[1]\n" - ".word 0x4fa7e1bd // sdot v29.4s, v13.16b, v7.4b[1]\n" - "ldr q13, [%[b_ptr0], #0x50]\n" - ".word 0x4fa4e1d2 // sdot v18.4s, v14.16b, v4.4b[1]\n" - ".word 0x4fa5e1d6 // sdot v22.4s, v14.16b, v5.4b[1]\n" - ".word 0x4fa6e1da // sdot v26.4s, v14.16b, v6.4b[1]\n" - ".word 0x4fa7e1de // sdot v30.4s, v14.16b, v7.4b[1]\n" - "ldr q14, [%[b_ptr0], #0x60]\n" - ".word 0x4fa4e1f3 // sdot v19.4s, v15.16b, v4.4b[1]\n" - ".word 0x4fa5e1f7 // sdot v23.4s, v15.16b, v5.4b[1]\n" - ".word 0x4fa6e1fb // sdot v27.4s, v15.16b, v6.4b[1]\n" - ".word 0x4fa7e1ff // sdot v31.4s, v15.16b, v7.4b[1]\n" - "ldr q15, [%[b_ptr0], #0x70]\n" - ".word 0x4f84e910 // sdot v16.4s, v8.16b, v4.4b[2]\n" - "add %[b_ptr0], %[b_ptr0], #0x100\n" - ".word 0x4f85e914 // sdot v20.4s, v8.16b, v5.4b[2]\n" - ".word 0x4f86e918 // sdot v24.4s, v8.16b, v6.4b[2]\n" - ".word 0x4f87e91c // sdot v28.4s, v8.16b, v7.4b[2]\n" - "ldr q8, [%[b_ptr0], #-0x80]\n" - ".word 0x4f84e931 // sdot v17.4s, v9.16b, v4.4b[2]\n" - ".word 0x4f85e935 // sdot v21.4s, v9.16b, v5.4b[2]\n" - ".word 0x4f86e939 // sdot v25.4s, v9.16b, v6.4b[2]\n" - ".word 0x4f87e93d // sdot v29.4s, v9.16b, v7.4b[2]\n" - "ldr q9, [%[b_ptr0], #-0x70]\n" - ".word 0x4f84e952 // sdot v18.4s, v10.16b, v4.4b[2]\n" - ".word 0x4f85e956 // sdot v22.4s, v10.16b, v5.4b[2]\n" - ".word 0x4f86e95a // sdot v26.4s, v10.16b, v6.4b[2]\n" - ".word 0x4f87e95e // sdot v30.4s, v10.16b, v7.4b[2]\n" - "ldr q10, [%[b_ptr0], #-0x60]\n" - ".word 0x4f84e973 // sdot v19.4s, v11.16b, v4.4b[2]\n" - ".word 0x4f85e977 // sdot v23.4s, v11.16b, v5.4b[2]\n" - ".word 0x4f86e97b // sdot v27.4s, v11.16b, v6.4b[2]\n" - ".word 0x4f87e97f // sdot v31.4s, v11.16b, v7.4b[2]\n" - "ldr q11, [%[b_ptr0], #-0x50]\n" - ".word 0x4fa4e990 // sdot v16.4s, v12.16b, v4.4b[3]\n" - ".word 0x4fa5e994 // sdot v20.4s, v12.16b, v5.4b[3]\n" - ".word 0x4fa6e998 // sdot v24.4s, v12.16b, v6.4b[3]\n" - ".word 0x4fa7e99c // sdot v28.4s, v12.16b, v7.4b[3]\n" - "ldr q12, [%[b_ptr0], #-0x40]\n" - ".word 0x4fa4e9b1 // sdot v17.4s, v13.16b, v4.4b[3]\n" - ".word 0x4fa5e9b5 // sdot v21.4s, v13.16b, v5.4b[3]\n" - ".word 0x4fa6e9b9 // sdot v25.4s, v13.16b, v6.4b[3]\n" - ".word 0x4fa7e9bd // sdot v29.4s, v13.16b, v7.4b[3]\n" - "ldr q13, [%[b_ptr0], #-0x30]\n" - ".word 0x4fa4e9d2 // sdot v18.4s, v14.16b, v4.4b[3]\n" - ".word 0x4fa5e9d6 // sdot v22.4s, v14.16b, v5.4b[3]\n" - ".word 0x4fa6e9da // sdot v26.4s, v14.16b, v6.4b[3]\n" - ".word 0x4fa7e9de // sdot v30.4s, v14.16b, v7.4b[3]\n" - "ldr q14, [%[b_ptr0], #-0x20]\n" - ".word 0x4fa4e9f3 // sdot v19.4s, v15.16b, v4.4b[3]\n" - ".word 0x4fa5e9f7 // sdot v23.4s, v15.16b, v5.4b[3]\n" - ".word 0x4fa6e9fb // sdot v27.4s, v15.16b, v6.4b[3]\n" - ".word 0x4fa7e9ff // sdot v31.4s, v15.16b, v7.4b[3]\n" - "b.ne 3b\n" - "2:\n" - "ldr q15, [%[b_ptr0], #-0x10]\n" - "prfm PSTL1KEEP, [%[c_ptr0]]\n" - "prfm PSTL1KEEP, [c_ptr1]\n" - "prfm PSTL1KEEP, [c_ptr2]\n" - "prfm PSTL1KEEP, [c_ptr3]\n" - "cbz %[regs], 4f\n" - ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" - "ldr q4, [%[a_ptr0]]\n" - ".word 0x4f81e114 // sdot v20.4s, v8.16b, v1.4b[0]\n" - "ldr q5, [a_ptr1]\n" - ".word 0x4f82e118 // sdot v24.4s, v8.16b, v2.4b[0]\n" - "ldr q6, [a_ptr2]\n" - ".word 0x4f83e11c // sdot v28.4s, v8.16b, v3.4b[0]\n" - "ldr q7, [a_ptr3]\n" - ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" - "ldr q8, [%[b_ptr0]]\n" - ".word 0x4f81e135 // sdot v21.4s, v9.16b, v1.4b[0]\n" - "add %[a_ptr0], %[a_ptr0], #0x10\n" - ".word 0x4f82e139 // sdot v25.4s, v9.16b, v2.4b[0]\n" - "add a_ptr1, a_ptr1, #0x10\n" - ".word 0x4f83e13d // sdot v29.4s, v9.16b, v3.4b[0]\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" - "add a_ptr2, a_ptr2, #0x10\n" - ".word 0x4f81e156 // sdot v22.4s, v10.16b, v1.4b[0]\n" - "add a_ptr3, a_ptr3, #0x10\n" - ".word 0x4f82e15a // sdot v26.4s, v10.16b, v2.4b[0]\n" - ".word 0x4f83e15e // sdot v30.4s, v10.16b, v3.4b[0]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" - ".word 0x4f81e177 // sdot v23.4s, v11.16b, v1.4b[0]\n" - ".word 0x4f82e17b // sdot v27.4s, v11.16b, v2.4b[0]\n" - ".word 0x4f83e17f // sdot v31.4s, v11.16b, v3.4b[0]\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - ".word 0x4fa0e190 // sdot v16.4s, v12.16b, v0.4b[1]\n" - ".word 0x4fa1e194 // sdot v20.4s, v12.16b, v1.4b[1]\n" - ".word 0x4fa2e198 // sdot v24.4s, v12.16b, v2.4b[1]\n" - ".word 0x4fa3e19c // sdot v28.4s, v12.16b, v3.4b[1]\n" - "ldr q12, [%[b_ptr0], #0x40]\n" - ".word 0x4fa0e1b1 // sdot v17.4s, v13.16b, v0.4b[1]\n" - ".word 0x4fa1e1b5 // sdot v21.4s, v13.16b, v1.4b[1]\n" - ".word 0x4fa2e1b9 // sdot v25.4s, v13.16b, v2.4b[1]\n" - ".word 0x4fa3e1bd // sdot v29.4s, v13.16b, v3.4b[1]\n" - "ldr q13, [%[b_ptr0], #0x50]\n" - ".word 0x4fa0e1d2 // sdot v18.4s, v14.16b, v0.4b[1]\n" - ".word 0x4fa1e1d6 // sdot v22.4s, v14.16b, v1.4b[1]\n" - ".word 0x4fa2e1da // sdot v26.4s, v14.16b, v2.4b[1]\n" - ".word 0x4fa3e1de // sdot v30.4s, v14.16b, v3.4b[1]\n" - "ldr q14, [%[b_ptr0], #0x60]\n" - ".word 0x4fa0e1f3 // sdot v19.4s, v15.16b, v0.4b[1]\n" - ".word 0x4fa1e1f7 // sdot v23.4s, v15.16b, v1.4b[1]\n" - ".word 0x4fa2e1fb // sdot v27.4s, v15.16b, v2.4b[1]\n" - ".word 0x4fa3e1ff // sdot v31.4s, v15.16b, v3.4b[1]\n" - "ldr q15, [%[b_ptr0], #0x70]\n" - ".word 0x4f80e910 // sdot v16.4s, v8.16b, v0.4b[2]\n" - "add %[b_ptr0], %[b_ptr0], #0x100\n" - ".word 0x4f81e914 // sdot v20.4s, v8.16b, v1.4b[2]\n" - ".word 0x4f82e918 // sdot v24.4s, v8.16b, v2.4b[2]\n" - ".word 0x4f83e91c // sdot v28.4s, v8.16b, v3.4b[2]\n" - "ldr q8, [%[b_ptr0], #-0x80]\n" - ".word 0x4f80e931 // sdot v17.4s, v9.16b, v0.4b[2]\n" - ".word 0x4f81e935 // sdot v21.4s, v9.16b, v1.4b[2]\n" - ".word 0x4f82e939 // sdot v25.4s, v9.16b, v2.4b[2]\n" - ".word 0x4f83e93d // sdot v29.4s, v9.16b, v3.4b[2]\n" - "ldr q9, [%[b_ptr0], #-0x70]\n" - ".word 0x4f80e952 // sdot v18.4s, v10.16b, v0.4b[2]\n" - ".word 0x4f81e956 // sdot v22.4s, v10.16b, v1.4b[2]\n" - ".word 0x4f82e95a // sdot v26.4s, v10.16b, v2.4b[2]\n" - ".word 0x4f83e95e // sdot v30.4s, v10.16b, v3.4b[2]\n" - "ldr q10, [%[b_ptr0], #-0x60]\n" - ".word 0x4f80e973 // sdot v19.4s, v11.16b, v0.4b[2]\n" - ".word 0x4f81e977 // sdot v23.4s, v11.16b, v1.4b[2]\n" - ".word 0x4f82e97b // sdot v27.4s, v11.16b, v2.4b[2]\n" - ".word 0x4f83e97f // sdot v31.4s, v11.16b, v3.4b[2]\n" - "ldr q11, [%[b_ptr0], #-0x50]\n" - ".word 0x4fa0e990 // sdot v16.4s, v12.16b, v0.4b[3]\n" - ".word 0x4fa1e994 // sdot v20.4s, v12.16b, v1.4b[3]\n" - ".word 0x4fa2e998 // sdot v24.4s, v12.16b, v2.4b[3]\n" - ".word 0x4fa3e99c // sdot v28.4s, v12.16b, v3.4b[3]\n" - "ldr q12, [%[b_ptr0], #-0x40]\n" - ".word 0x4fa0e9b1 // sdot v17.4s, v13.16b, v0.4b[3]\n" - ".word 0x4fa1e9b5 // sdot v21.4s, v13.16b, v1.4b[3]\n" - ".word 0x4fa2e9b9 // sdot v25.4s, v13.16b, v2.4b[3]\n" - ".word 0x4fa3e9bd // sdot v29.4s, v13.16b, v3.4b[3]\n" - "ldr q13, [%[b_ptr0], #-0x30]\n" - ".word 0x4fa0e9d2 // sdot v18.4s, v14.16b, v0.4b[3]\n" - ".word 0x4fa1e9d6 // sdot v22.4s, v14.16b, v1.4b[3]\n" - ".word 0x4fa2e9da // sdot v26.4s, v14.16b, v2.4b[3]\n" - ".word 0x4fa3e9de // sdot v30.4s, v14.16b, v3.4b[3]\n" - "ldr q14, [%[b_ptr0], #-0x20]\n" - ".word 0x4fa0e9f3 // sdot v19.4s, v15.16b, v0.4b[3]\n" - ".word 0x4fa1e9f7 // sdot v23.4s, v15.16b, v1.4b[3]\n" - ".word 0x4fa2e9fb // sdot v27.4s, v15.16b, v2.4b[3]\n" - ".word 0x4fa3e9ff // sdot v31.4s, v15.16b, v3.4b[3]\n" - "ldr q15, [%[b_ptr0], #-0x10]\n" - ".word 0x4f84e110 // sdot v16.4s, v8.16b, v4.4b[0]\n" - ".word 0x4f85e114 // sdot v20.4s, v8.16b, v5.4b[0]\n" - ".word 0x4f86e118 // sdot v24.4s, v8.16b, v6.4b[0]\n" - ".word 0x4f87e11c // sdot v28.4s, v8.16b, v7.4b[0]\n" - "ldr q8, [%[b_ptr0]]\n" - ".word 0x4f84e131 // sdot v17.4s, v9.16b, v4.4b[0]\n" - ".word 0x4f85e135 // sdot v21.4s, v9.16b, v5.4b[0]\n" - ".word 0x4f86e139 // sdot v25.4s, v9.16b, v6.4b[0]\n" - ".word 0x4f87e13d // sdot v29.4s, v9.16b, v7.4b[0]\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - ".word 0x4f84e152 // sdot v18.4s, v10.16b, v4.4b[0]\n" - ".word 0x4f85e156 // sdot v22.4s, v10.16b, v5.4b[0]\n" - ".word 0x4f86e15a // sdot v26.4s, v10.16b, v6.4b[0]\n" - ".word 0x4f87e15e // sdot v30.4s, v10.16b, v7.4b[0]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - ".word 0x4f84e173 // sdot v19.4s, v11.16b, v4.4b[0]\n" - ".word 0x4f85e177 // sdot v23.4s, v11.16b, v5.4b[0]\n" - ".word 0x4f86e17b // sdot v27.4s, v11.16b, v6.4b[0]\n" - ".word 0x4f87e17f // sdot v31.4s, v11.16b, v7.4b[0]\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - ".word 0x4fa4e190 // sdot v16.4s, v12.16b, v4.4b[1]\n" - ".word 0x4fa5e194 // sdot v20.4s, v12.16b, v5.4b[1]\n" - ".word 0x4fa6e198 // sdot v24.4s, v12.16b, v6.4b[1]\n" - ".word 0x4fa7e19c // sdot v28.4s, v12.16b, v7.4b[1]\n" - "ldr q12, [%[b_ptr0], #0x40]\n" - ".word 0x4fa4e1b1 // sdot v17.4s, v13.16b, v4.4b[1]\n" - ".word 0x4fa5e1b5 // sdot v21.4s, v13.16b, v5.4b[1]\n" - ".word 0x4fa6e1b9 // sdot v25.4s, v13.16b, v6.4b[1]\n" - ".word 0x4fa7e1bd // sdot v29.4s, v13.16b, v7.4b[1]\n" - "ldr q13, [%[b_ptr0], #0x50]\n" - ".word 0x4fa4e1d2 // sdot v18.4s, v14.16b, v4.4b[1]\n" - ".word 0x4fa5e1d6 // sdot v22.4s, v14.16b, v5.4b[1]\n" - ".word 0x4fa6e1da // sdot v26.4s, v14.16b, v6.4b[1]\n" - ".word 0x4fa7e1de // sdot v30.4s, v14.16b, v7.4b[1]\n" - "ldr q14, [%[b_ptr0], #0x60]\n" - ".word 0x4fa4e1f3 // sdot v19.4s, v15.16b, v4.4b[1]\n" - ".word 0x4fa5e1f7 // sdot v23.4s, v15.16b, v5.4b[1]\n" - ".word 0x4fa6e1fb // sdot v27.4s, v15.16b, v6.4b[1]\n" - ".word 0x4fa7e1ff // sdot v31.4s, v15.16b, v7.4b[1]\n" - "ldr q15, [%[b_ptr0], #0x70]\n" - ".word 0x4f84e910 // sdot v16.4s, v8.16b, v4.4b[2]\n" - "add %[b_ptr0], %[b_ptr0], #0x80\n" - ".word 0x4f85e914 // sdot v20.4s, v8.16b, v5.4b[2]\n" - ".word 0x4f86e918 // sdot v24.4s, v8.16b, v6.4b[2]\n" - ".word 0x4f87e91c // sdot v28.4s, v8.16b, v7.4b[2]\n" - ".word 0x4f84e931 // sdot v17.4s, v9.16b, v4.4b[2]\n" - ".word 0x4f85e935 // sdot v21.4s, v9.16b, v5.4b[2]\n" - ".word 0x4f86e939 // sdot v25.4s, v9.16b, v6.4b[2]\n" - ".word 0x4f87e93d // sdot v29.4s, v9.16b, v7.4b[2]\n" - ".word 0x4f84e952 // sdot v18.4s, v10.16b, v4.4b[2]\n" - ".word 0x4f85e956 // sdot v22.4s, v10.16b, v5.4b[2]\n" - ".word 0x4f86e95a // sdot v26.4s, v10.16b, v6.4b[2]\n" - ".word 0x4f87e95e // sdot v30.4s, v10.16b, v7.4b[2]\n" - ".word 0x4f84e973 // sdot v19.4s, v11.16b, v4.4b[2]\n" - ".word 0x4f85e977 // sdot v23.4s, v11.16b, v5.4b[2]\n" - ".word 0x4f86e97b // sdot v27.4s, v11.16b, v6.4b[2]\n" - ".word 0x4f87e97f // sdot v31.4s, v11.16b, v7.4b[2]\n" - ".word 0x4fa4e990 // sdot v16.4s, v12.16b, v4.4b[3]\n" - ".word 0x4fa5e994 // sdot v20.4s, v12.16b, v5.4b[3]\n" - ".word 0x4fa6e998 // sdot v24.4s, v12.16b, v6.4b[3]\n" - ".word 0x4fa7e99c // sdot v28.4s, v12.16b, v7.4b[3]\n" - ".word 0x4fa4e9b1 // sdot v17.4s, v13.16b, v4.4b[3]\n" - ".word 0x4fa5e9b5 // sdot v21.4s, v13.16b, v5.4b[3]\n" - ".word 0x4fa6e9b9 // sdot v25.4s, v13.16b, v6.4b[3]\n" - ".word 0x4fa7e9bd // sdot v29.4s, v13.16b, v7.4b[3]\n" - ".word 0x4fa4e9d2 // sdot v18.4s, v14.16b, v4.4b[3]\n" - ".word 0x4fa5e9d6 // sdot v22.4s, v14.16b, v5.4b[3]\n" - ".word 0x4fa6e9da // sdot v26.4s, v14.16b, v6.4b[3]\n" - ".word 0x4fa7e9de // sdot v30.4s, v14.16b, v7.4b[3]\n" - ".word 0x4fa4e9f3 // sdot v19.4s, v15.16b, v4.4b[3]\n" - ".word 0x4fa5e9f7 // sdot v23.4s, v15.16b, v5.4b[3]\n" - ".word 0x4fa6e9fb // sdot v27.4s, v15.16b, v6.4b[3]\n" - ".word 0x4fa7e9ff // sdot v31.4s, v15.16b, v7.4b[3]\n" - "b 5f\n" - "4:\n" - ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" - ".word 0x4f81e114 // sdot v20.4s, v8.16b, v1.4b[0]\n" - ".word 0x4f82e118 // sdot v24.4s, v8.16b, v2.4b[0]\n" - ".word 0x4f83e11c // sdot v28.4s, v8.16b, v3.4b[0]\n" - "ldr q8, [%[b_ptr0]]\n" - ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" - ".word 0x4f81e135 // sdot v21.4s, v9.16b, v1.4b[0]\n" - ".word 0x4f82e139 // sdot v25.4s, v9.16b, v2.4b[0]\n" - ".word 0x4f83e13d // sdot v29.4s, v9.16b, v3.4b[0]\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" - ".word 0x4f81e156 // sdot v22.4s, v10.16b, v1.4b[0]\n" - ".word 0x4f82e15a // sdot v26.4s, v10.16b, v2.4b[0]\n" - ".word 0x4f83e15e // sdot v30.4s, v10.16b, v3.4b[0]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" - ".word 0x4f81e177 // sdot v23.4s, v11.16b, v1.4b[0]\n" - ".word 0x4f82e17b // sdot v27.4s, v11.16b, v2.4b[0]\n" - ".word 0x4f83e17f // sdot v31.4s, v11.16b, v3.4b[0]\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - ".word 0x4fa0e190 // sdot v16.4s, v12.16b, v0.4b[1]\n" - ".word 0x4fa1e194 // sdot v20.4s, v12.16b, v1.4b[1]\n" - ".word 0x4fa2e198 // sdot v24.4s, v12.16b, v2.4b[1]\n" - ".word 0x4fa3e19c // sdot v28.4s, v12.16b, v3.4b[1]\n" - "ldr q12, [%[b_ptr0], #0x40]\n" - ".word 0x4fa0e1b1 // sdot v17.4s, v13.16b, v0.4b[1]\n" - ".word 0x4fa1e1b5 // sdot v21.4s, v13.16b, v1.4b[1]\n" - ".word 0x4fa2e1b9 // sdot v25.4s, v13.16b, v2.4b[1]\n" - ".word 0x4fa3e1bd // sdot v29.4s, v13.16b, v3.4b[1]\n" - "ldr q13, [%[b_ptr0], #0x50]\n" - ".word 0x4fa0e1d2 // sdot v18.4s, v14.16b, v0.4b[1]\n" - ".word 0x4fa1e1d6 // sdot v22.4s, v14.16b, v1.4b[1]\n" - ".word 0x4fa2e1da // sdot v26.4s, v14.16b, v2.4b[1]\n" - ".word 0x4fa3e1de // sdot v30.4s, v14.16b, v3.4b[1]\n" - "ldr q14, [%[b_ptr0], #0x60]\n" - ".word 0x4fa0e1f3 // sdot v19.4s, v15.16b, v0.4b[1]\n" - ".word 0x4fa1e1f7 // sdot v23.4s, v15.16b, v1.4b[1]\n" - ".word 0x4fa2e1fb // sdot v27.4s, v15.16b, v2.4b[1]\n" - ".word 0x4fa3e1ff // sdot v31.4s, v15.16b, v3.4b[1]\n" - "ldr q15, [%[b_ptr0], #0x70]\n" - ".word 0x4f80e910 // sdot v16.4s, v8.16b, v0.4b[2]\n" - "add %[b_ptr0], %[b_ptr0], #0x80\n" - ".word 0x4f81e914 // sdot v20.4s, v8.16b, v1.4b[2]\n" - ".word 0x4f82e918 // sdot v24.4s, v8.16b, v2.4b[2]\n" - ".word 0x4f83e91c // sdot v28.4s, v8.16b, v3.4b[2]\n" - ".word 0x4f80e931 // sdot v17.4s, v9.16b, v0.4b[2]\n" - ".word 0x4f81e935 // sdot v21.4s, v9.16b, v1.4b[2]\n" - ".word 0x4f82e939 // sdot v25.4s, v9.16b, v2.4b[2]\n" - ".word 0x4f83e93d // sdot v29.4s, v9.16b, v3.4b[2]\n" - ".word 0x4f80e952 // sdot v18.4s, v10.16b, v0.4b[2]\n" - ".word 0x4f81e956 // sdot v22.4s, v10.16b, v1.4b[2]\n" - ".word 0x4f82e95a // sdot v26.4s, v10.16b, v2.4b[2]\n" - ".word 0x4f83e95e // sdot v30.4s, v10.16b, v3.4b[2]\n" - ".word 0x4f80e973 // sdot v19.4s, v11.16b, v0.4b[2]\n" - ".word 0x4f81e977 // sdot v23.4s, v11.16b, v1.4b[2]\n" - ".word 0x4f82e97b // sdot v27.4s, v11.16b, v2.4b[2]\n" - ".word 0x4f83e97f // sdot v31.4s, v11.16b, v3.4b[2]\n" - ".word 0x4fa0e990 // sdot v16.4s, v12.16b, v0.4b[3]\n" - ".word 0x4fa1e994 // sdot v20.4s, v12.16b, v1.4b[3]\n" - ".word 0x4fa2e998 // sdot v24.4s, v12.16b, v2.4b[3]\n" - ".word 0x4fa3e99c // sdot v28.4s, v12.16b, v3.4b[3]\n" - ".word 0x4fa0e9b1 // sdot v17.4s, v13.16b, v0.4b[3]\n" - ".word 0x4fa1e9b5 // sdot v21.4s, v13.16b, v1.4b[3]\n" - ".word 0x4fa2e9b9 // sdot v25.4s, v13.16b, v2.4b[3]\n" - ".word 0x4fa3e9bd // sdot v29.4s, v13.16b, v3.4b[3]\n" - ".word 0x4fa0e9d2 // sdot v18.4s, v14.16b, v0.4b[3]\n" - ".word 0x4fa1e9d6 // sdot v22.4s, v14.16b, v1.4b[3]\n" - ".word 0x4fa2e9da // sdot v26.4s, v14.16b, v2.4b[3]\n" - ".word 0x4fa3e9de // sdot v30.4s, v14.16b, v3.4b[3]\n" - ".word 0x4fa0e9f3 // sdot v19.4s, v15.16b, v0.4b[3]\n" - ".word 0x4fa1e9f7 // sdot v23.4s, v15.16b, v1.4b[3]\n" - ".word 0x4fa2e9fb // sdot v27.4s, v15.16b, v2.4b[3]\n" - ".word 0x4fa3e9ff // sdot v31.4s, v15.16b, v3.4b[3]\n" - "5:\n" - "cbz %[blocks], 6f\n" - "7:\n" - "ldr q8, [%[b_ptr0]]\n" - "subs %[blocks], %[blocks], #0x1\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - "ldr s0, [%[a_ptr0]]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - "add %[a_ptr0], %[a_ptr0], #0x4\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - "add %[b_ptr0], %[b_ptr0], #0x40\n" - ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" - "ldr s1, [a_ptr1]\n" - ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" - "add a_ptr1, a_ptr1, #0x4\n" - ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" - "ldr s2, [a_ptr2]\n" - ".word 0x4f81e114 // sdot v20.4s, v8.16b, v1.4b[0]\n" - "add a_ptr2, a_ptr2, #0x4\n" - ".word 0x4f81e135 // sdot v21.4s, v9.16b, v1.4b[0]\n" - "ldr s3, [a_ptr3]\n" - ".word 0x4f82e118 // sdot v24.4s, v8.16b, v2.4b[0]\n" - "add a_ptr3, a_ptr3, #0x4\n" - ".word 0x4f82e139 // sdot v25.4s, v9.16b, v2.4b[0]\n" - ".word 0x4f83e11c // sdot v28.4s, v8.16b, v3.4b[0]\n" - ".word 0x4f83e13d // sdot v29.4s, v9.16b, v3.4b[0]\n" - ".word 0x4f81e156 // sdot v22.4s, v10.16b, v1.4b[0]\n" - ".word 0x4f82e15a // sdot v26.4s, v10.16b, v2.4b[0]\n" - ".word 0x4f83e15e // sdot v30.4s, v10.16b, v3.4b[0]\n" - ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" - ".word 0x4f81e177 // sdot v23.4s, v11.16b, v1.4b[0]\n" - ".word 0x4f82e17b // sdot v27.4s, v11.16b, v2.4b[0]\n" - ".word 0x4f83e17f // sdot v31.4s, v11.16b, v3.4b[0]\n" - "b.ne 7b\n" - "6:\n" - "cbz %[odds], 8f\n" - "ld1 {v0.b}[0], [%[a_ptr0]], #1\n" - "ld1 {v1.b}[0], [a_ptr1], #1\n" - "ld1 {v2.b}[0], [a_ptr2], #1\n" - "ld1 {v3.b}[0], [a_ptr3], #1\n" - "subs %[odds], %[odds], #0x1\n" - "b.eq 9f\n" - "ld1 {v0.b}[1], [%[a_ptr0]], #1\n" - "ld1 {v1.b}[1], [a_ptr1], #1\n" - "ld1 {v2.b}[1], [a_ptr2], #1\n" - "ld1 {v3.b}[1], [a_ptr3], #1\n" - "subs %[odds], %[odds], #0x1\n" - "b.eq 9f\n" - "ld1 {v0.b}[2], [%[a_ptr0]]\n" - "ld1 {v1.b}[2], [a_ptr1]\n" - "ld1 {v2.b}[2], [a_ptr2]\n" - "ld1 {v3.b}[2], [a_ptr3]\n" - "9:\n" - "ldr q8, [%[b_ptr0]]\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" - ".word 0x4f81e114 // sdot v20.4s, v8.16b, v1.4b[0]\n" - ".word 0x4f82e118 // sdot v24.4s, v8.16b, v2.4b[0]\n" - ".word 0x4f83e11c // sdot v28.4s, v8.16b, v3.4b[0]\n" - ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" - ".word 0x4f81e135 // sdot v21.4s, v9.16b, v1.4b[0]\n" - ".word 0x4f82e139 // sdot v25.4s, v9.16b, v2.4b[0]\n" - ".word 0x4f83e13d // sdot v29.4s, v9.16b, v3.4b[0]\n" - ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" - ".word 0x4f81e156 // sdot v22.4s, v10.16b, v1.4b[0]\n" - ".word 0x4f82e15a // sdot v26.4s, v10.16b, v2.4b[0]\n" - ".word 0x4f83e15e // sdot v30.4s, v10.16b, v3.4b[0]\n" - ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" - ".word 0x4f81e177 // sdot v23.4s, v11.16b, v1.4b[0]\n" - ".word 0x4f82e17b // sdot v27.4s, v11.16b, v2.4b[0]\n" - ".word 0x4f83e17f // sdot v31.4s, v11.16b, v3.4b[0]\n" - "8:\n" - "str q16, [%[c_ptr0]]\n" - "str q17, [%[c_ptr0], #0x10]\n" - "str q18, [%[c_ptr0], #0x20]\n" - "str q19, [%[c_ptr0], #0x30]\n" - "add %[c_ptr0], %[c_ptr0], #0x40\n" - "str q20, [c_ptr1]\n" - "str q21, [c_ptr1, #0x10]\n" - "str q22, [c_ptr1, #0x20]\n" - "str q23, [c_ptr1, #0x30]\n" - "str q24, [c_ptr2]\n" - "str q25, [c_ptr2, #0x10]\n" - "str q26, [c_ptr2, #0x20]\n" - "str q27, [c_ptr2, #0x30]\n" - "str q28, [c_ptr3]\n" - "str q29, [c_ptr3, #0x10]\n" - "str q30, [c_ptr3, #0x20]\n" - "str q31, [c_ptr3, #0x30]\n" - ".unreq a_ptr1\n" - ".unreq a_ptr2\n" - ".unreq a_ptr3\n" - ".unreq c_ptr1\n" - ".unreq c_ptr2\n" - ".unreq c_ptr3\n" - : [a_ptr0] "+r" (a_ptr0), [b_ptr0] "+r" (b_ptr0), [c_ptr0] "+r" (c_ptr0), [loops] "+r" (loops), [regs] "+r" (regs), [blocks] "+r" (blocks), [odds] "+r" (odds) - : [betaptr] "r" (betaptr), [width] "r" (width), [beta0] "r" (beta0), [lda] "r" (ldab), [ldc] "r" (ldcb) - : "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x0", "x1", "x2", "x3", "x4", "x5", "cc", "memory" + "a_ptr1 .req X0\n" + "a_ptr2 .req X1\n" + "a_ptr3 .req X2\n" + "c_ptr1 .req X3\n" + "c_ptr2 .req X4\n" + "c_ptr3 .req X5\n" + "add a_ptr1, %[a_ptr0], %[lda]\n" + "add c_ptr1, %[c_ptr0], %[ldc]\n" + "add a_ptr2, a_ptr1, %[lda]\n" + "add c_ptr2, c_ptr1, %[ldc]\n" + "add a_ptr3, a_ptr2, %[lda]\n" + "add c_ptr3, c_ptr2, %[ldc]\n" + "cbz %[beta0], 1f\n" + "movi v16.4s, #0\n" + "ldr q0, [%[a_ptr0]]\n" + "movi v17.4s, #0\n" + "ldr q1, [a_ptr1]\n" + "movi v18.4s, #0\n" + "ldr q2, [a_ptr2]\n" + "movi v19.4s, #0\n" + "ldr q3, [a_ptr3]\n" + "movi v20.4s, #0\n" + "ldr q8, [%[b_ptr0]]\n" + "movi v21.4s, #0\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + "movi v22.4s, #0\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + "movi v23.4s, #0\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + "movi v24.4s, #0\n" + "ldr q12, [%[b_ptr0], #0x40]\n" + "movi v25.4s, #0\n" + "ldr q13, [%[b_ptr0], #0x50]\n" + "movi v26.4s, #0\n" + "ldr q14, [%[b_ptr0], #0x60]\n" + "movi v27.4s, #0\n" + "add %[a_ptr0], %[a_ptr0], #0x10\n" + "movi v28.4s, #0\n" + "add a_ptr1, a_ptr1, #0x10\n" + "movi v29.4s, #0\n" + "add a_ptr2, a_ptr2, #0x10\n" + "movi v30.4s, #0\n" + "add a_ptr3, a_ptr3, #0x10\n" + "movi v31.4s, #0\n" + "add %[b_ptr0], %[b_ptr0], #0x80\n" + "cbz %[loops], 2f\n" + "b 3f\n" + "1:\n" + "ld1r {v15.4s}, [%[betaptr]]\n" + "ldr q16, [%[c_ptr0]]\n" + "ldr q17, [%[c_ptr0], #0x10]\n" + "ldr q18, [%[c_ptr0], #0x20]\n" + "ldr q19, [%[c_ptr0], #0x30]\n" + "mul v16.4s, v16.4s, v15.4s\n" + "ldr q20, [c_ptr1]\n" + "mul v17.4s, v17.4s, v15.4s\n" + "ldr q21, [c_ptr1, #0x10]\n" + "mul v18.4s, v18.4s, v15.4s\n" + "ldr q22, [c_ptr1, #0x20]\n" + "mul v19.4s, v19.4s, v15.4s\n" + "ldr q23, [c_ptr1, #0x30]\n" + "mul v20.4s, v20.4s, v15.4s\n" + "ldr q24, [c_ptr2]\n" + "mul v21.4s, v21.4s, v15.4s\n" + "ldr q25, [c_ptr2, #0x10]\n" + "mul v22.4s, v22.4s, v15.4s\n" + "ldr q26, [c_ptr2, #0x20]\n" + "mul v23.4s, v23.4s, v15.4s\n" + "ldr q27, [c_ptr2, #0x30]\n" + "mul v24.4s, v24.4s, v15.4s\n" + "ldr q28, [c_ptr3]\n" + "mul v25.4s, v25.4s, v15.4s\n" + "ldr q29, [c_ptr3, #0x10]\n" + "mul v26.4s, v26.4s, v15.4s\n" + "ldr q30, [c_ptr3, #0x20]\n" + "mul v27.4s, v27.4s, v15.4s\n" + "ldr q31, [c_ptr3, #0x30]\n" + "mul v28.4s, v28.4s, v15.4s\n" + "ldr q0, [%[a_ptr0]]\n" + "mul v29.4s, v29.4s, v15.4s\n" + "ldr q1, [a_ptr1]\n" + "mul v30.4s, v30.4s, v15.4s\n" + "ldr q2, [a_ptr2]\n" + "mul v31.4s, v31.4s, v15.4s\n" + "ldr q3, [a_ptr3]\n" + "ldr q8, [%[b_ptr0]]\n" + "add %[a_ptr0], %[a_ptr0], #0x10\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + "add a_ptr1, a_ptr1, #0x10\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + "add a_ptr2, a_ptr2, #0x10\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + "add a_ptr3, a_ptr3, #0x10\n" + "ldr q12, [%[b_ptr0], #0x40]\n" + "ldr q13, [%[b_ptr0], #0x50]\n" + "ldr q14, [%[b_ptr0], #0x60]\n" + "add %[b_ptr0], %[b_ptr0], #0x80\n" + "cbz %[loops], 2f\n" + "3:\n" + ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" + "ldr q15, [%[b_ptr0], #-0x10]\n" + ".word 0x4f81e114 // sdot v20.4s, v8.16b, v1.4b[0]\n" + "ldr q4, [%[a_ptr0]]\n" + ".word 0x4f82e118 // sdot v24.4s, v8.16b, v2.4b[0]\n" + "ldr q5, [a_ptr1]\n" + ".word 0x4f83e11c // sdot v28.4s, v8.16b, v3.4b[0]\n" + "ldr q6, [a_ptr2]\n" + ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" + "ldr q7, [a_ptr3]\n" + ".word 0x4f81e135 // sdot v21.4s, v9.16b, v1.4b[0]\n" + "ldr q8, [%[b_ptr0]]\n" + ".word 0x4f82e139 // sdot v25.4s, v9.16b, v2.4b[0]\n" + "subs %[loops], %[loops], #0x1\n" + ".word 0x4f83e13d // sdot v29.4s, v9.16b, v3.4b[0]\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" + "prfm PLDL1KEEP, [%[a_ptr0], #0x40]\n" + ".word 0x4f81e156 // sdot v22.4s, v10.16b, v1.4b[0]\n" + "add %[a_ptr0], %[a_ptr0], #0x20\n" + ".word 0x4f82e15a // sdot v26.4s, v10.16b, v2.4b[0]\n" + "add a_ptr1, a_ptr1, #0x20\n" + ".word 0x4f83e15e // sdot v30.4s, v10.16b, v3.4b[0]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" + "add a_ptr2, a_ptr2, #0x20\n" + ".word 0x4f81e177 // sdot v23.4s, v11.16b, v1.4b[0]\n" + "add a_ptr3, a_ptr3, #0x20\n" + ".word 0x4f82e17b // sdot v27.4s, v11.16b, v2.4b[0]\n" + "prfm PLDL1KEEP, [a_ptr1, #0x40]\n" + ".word 0x4f83e17f // sdot v31.4s, v11.16b, v3.4b[0]\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + ".word 0x4fa0e190 // sdot v16.4s, v12.16b, v0.4b[1]\n" + "prfm PLDL1KEEP, [a_ptr2, #0x40]\n" + ".word 0x4fa1e194 // sdot v20.4s, v12.16b, v1.4b[1]\n" + "prfm PLDL1KEEP, [a_ptr3, #0x40]\n" + ".word 0x4fa2e198 // sdot v24.4s, v12.16b, v2.4b[1]\n" + ".word 0x4fa3e19c // sdot v28.4s, v12.16b, v3.4b[1]\n" + "ldr q12, [%[b_ptr0], #0x40]\n" + ".word 0x4fa0e1b1 // sdot v17.4s, v13.16b, v0.4b[1]\n" + ".word 0x4fa1e1b5 // sdot v21.4s, v13.16b, v1.4b[1]\n" + ".word 0x4fa2e1b9 // sdot v25.4s, v13.16b, v2.4b[1]\n" + ".word 0x4fa3e1bd // sdot v29.4s, v13.16b, v3.4b[1]\n" + "ldr q13, [%[b_ptr0], #0x50]\n" + ".word 0x4fa0e1d2 // sdot v18.4s, v14.16b, v0.4b[1]\n" + ".word 0x4fa1e1d6 // sdot v22.4s, v14.16b, v1.4b[1]\n" + ".word 0x4fa2e1da // sdot v26.4s, v14.16b, v2.4b[1]\n" + ".word 0x4fa3e1de // sdot v30.4s, v14.16b, v3.4b[1]\n" + "ldr q14, [%[b_ptr0], #0x60]\n" + ".word 0x4fa0e1f3 // sdot v19.4s, v15.16b, v0.4b[1]\n" + ".word 0x4fa1e1f7 // sdot v23.4s, v15.16b, v1.4b[1]\n" + ".word 0x4fa2e1fb // sdot v27.4s, v15.16b, v2.4b[1]\n" + ".word 0x4fa3e1ff // sdot v31.4s, v15.16b, v3.4b[1]\n" + "ldr q15, [%[b_ptr0], #0x70]\n" + ".word 0x4f80e910 // sdot v16.4s, v8.16b, v0.4b[2]\n" + "add %[b_ptr0], %[b_ptr0], #0x100\n" + ".word 0x4f81e914 // sdot v20.4s, v8.16b, v1.4b[2]\n" + ".word 0x4f82e918 // sdot v24.4s, v8.16b, v2.4b[2]\n" + ".word 0x4f83e91c // sdot v28.4s, v8.16b, v3.4b[2]\n" + "ldr q8, [%[b_ptr0], #-0x80]\n" + ".word 0x4f80e931 // sdot v17.4s, v9.16b, v0.4b[2]\n" + ".word 0x4f81e935 // sdot v21.4s, v9.16b, v1.4b[2]\n" + ".word 0x4f82e939 // sdot v25.4s, v9.16b, v2.4b[2]\n" + ".word 0x4f83e93d // sdot v29.4s, v9.16b, v3.4b[2]\n" + "ldr q9, [%[b_ptr0], #-0x70]\n" + ".word 0x4f80e952 // sdot v18.4s, v10.16b, v0.4b[2]\n" + ".word 0x4f81e956 // sdot v22.4s, v10.16b, v1.4b[2]\n" + ".word 0x4f82e95a // sdot v26.4s, v10.16b, v2.4b[2]\n" + ".word 0x4f83e95e // sdot v30.4s, v10.16b, v3.4b[2]\n" + "ldr q10, [%[b_ptr0], #-0x60]\n" + ".word 0x4f80e973 // sdot v19.4s, v11.16b, v0.4b[2]\n" + ".word 0x4f81e977 // sdot v23.4s, v11.16b, v1.4b[2]\n" + ".word 0x4f82e97b // sdot v27.4s, v11.16b, v2.4b[2]\n" + ".word 0x4f83e97f // sdot v31.4s, v11.16b, v3.4b[2]\n" + "ldr q11, [%[b_ptr0], #-0x50]\n" + ".word 0x4fa0e990 // sdot v16.4s, v12.16b, v0.4b[3]\n" + ".word 0x4fa1e994 // sdot v20.4s, v12.16b, v1.4b[3]\n" + ".word 0x4fa2e998 // sdot v24.4s, v12.16b, v2.4b[3]\n" + ".word 0x4fa3e99c // sdot v28.4s, v12.16b, v3.4b[3]\n" + "ldr q12, [%[b_ptr0], #-0x40]\n" + ".word 0x4fa0e9b1 // sdot v17.4s, v13.16b, v0.4b[3]\n" + ".word 0x4fa1e9b5 // sdot v21.4s, v13.16b, v1.4b[3]\n" + ".word 0x4fa2e9b9 // sdot v25.4s, v13.16b, v2.4b[3]\n" + ".word 0x4fa3e9bd // sdot v29.4s, v13.16b, v3.4b[3]\n" + "ldr q13, [%[b_ptr0], #-0x30]\n" + ".word 0x4fa0e9d2 // sdot v18.4s, v14.16b, v0.4b[3]\n" + ".word 0x4fa1e9d6 // sdot v22.4s, v14.16b, v1.4b[3]\n" + ".word 0x4fa2e9da // sdot v26.4s, v14.16b, v2.4b[3]\n" + ".word 0x4fa3e9de // sdot v30.4s, v14.16b, v3.4b[3]\n" + "ldr q14, [%[b_ptr0], #-0x20]\n" + ".word 0x4fa0e9f3 // sdot v19.4s, v15.16b, v0.4b[3]\n" + "ldr q0, [%[a_ptr0], #-0x10]\n" + ".word 0x4fa1e9f7 // sdot v23.4s, v15.16b, v1.4b[3]\n" + "ldr q1, [a_ptr1, #-0x10]\n" + ".word 0x4fa2e9fb // sdot v27.4s, v15.16b, v2.4b[3]\n" + "ldr q2, [a_ptr2, #-0x10]\n" + ".word 0x4fa3e9ff // sdot v31.4s, v15.16b, v3.4b[3]\n" + "ldr q15, [%[b_ptr0], #-0x10]\n" + ".word 0x4f84e110 // sdot v16.4s, v8.16b, v4.4b[0]\n" + "ldr q3, [a_ptr3, #-0x10]\n" + ".word 0x4f85e114 // sdot v20.4s, v8.16b, v5.4b[0]\n" + ".word 0x4f86e118 // sdot v24.4s, v8.16b, v6.4b[0]\n" + ".word 0x4f87e11c // sdot v28.4s, v8.16b, v7.4b[0]\n" + "ldr q8, [%[b_ptr0]]\n" + ".word 0x4f84e131 // sdot v17.4s, v9.16b, v4.4b[0]\n" + ".word 0x4f85e135 // sdot v21.4s, v9.16b, v5.4b[0]\n" + ".word 0x4f86e139 // sdot v25.4s, v9.16b, v6.4b[0]\n" + ".word 0x4f87e13d // sdot v29.4s, v9.16b, v7.4b[0]\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + ".word 0x4f84e152 // sdot v18.4s, v10.16b, v4.4b[0]\n" + ".word 0x4f85e156 // sdot v22.4s, v10.16b, v5.4b[0]\n" + ".word 0x4f86e15a // sdot v26.4s, v10.16b, v6.4b[0]\n" + ".word 0x4f87e15e // sdot v30.4s, v10.16b, v7.4b[0]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + ".word 0x4f84e173 // sdot v19.4s, v11.16b, v4.4b[0]\n" + ".word 0x4f85e177 // sdot v23.4s, v11.16b, v5.4b[0]\n" + ".word 0x4f86e17b // sdot v27.4s, v11.16b, v6.4b[0]\n" + ".word 0x4f87e17f // sdot v31.4s, v11.16b, v7.4b[0]\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + ".word 0x4fa4e190 // sdot v16.4s, v12.16b, v4.4b[1]\n" + ".word 0x4fa5e194 // sdot v20.4s, v12.16b, v5.4b[1]\n" + ".word 0x4fa6e198 // sdot v24.4s, v12.16b, v6.4b[1]\n" + ".word 0x4fa7e19c // sdot v28.4s, v12.16b, v7.4b[1]\n" + "ldr q12, [%[b_ptr0], #0x40]\n" + ".word 0x4fa4e1b1 // sdot v17.4s, v13.16b, v4.4b[1]\n" + ".word 0x4fa5e1b5 // sdot v21.4s, v13.16b, v5.4b[1]\n" + ".word 0x4fa6e1b9 // sdot v25.4s, v13.16b, v6.4b[1]\n" + ".word 0x4fa7e1bd // sdot v29.4s, v13.16b, v7.4b[1]\n" + "ldr q13, [%[b_ptr0], #0x50]\n" + ".word 0x4fa4e1d2 // sdot v18.4s, v14.16b, v4.4b[1]\n" + ".word 0x4fa5e1d6 // sdot v22.4s, v14.16b, v5.4b[1]\n" + ".word 0x4fa6e1da // sdot v26.4s, v14.16b, v6.4b[1]\n" + ".word 0x4fa7e1de // sdot v30.4s, v14.16b, v7.4b[1]\n" + "ldr q14, [%[b_ptr0], #0x60]\n" + ".word 0x4fa4e1f3 // sdot v19.4s, v15.16b, v4.4b[1]\n" + ".word 0x4fa5e1f7 // sdot v23.4s, v15.16b, v5.4b[1]\n" + ".word 0x4fa6e1fb // sdot v27.4s, v15.16b, v6.4b[1]\n" + ".word 0x4fa7e1ff // sdot v31.4s, v15.16b, v7.4b[1]\n" + "ldr q15, [%[b_ptr0], #0x70]\n" + ".word 0x4f84e910 // sdot v16.4s, v8.16b, v4.4b[2]\n" + "add %[b_ptr0], %[b_ptr0], #0x100\n" + ".word 0x4f85e914 // sdot v20.4s, v8.16b, v5.4b[2]\n" + ".word 0x4f86e918 // sdot v24.4s, v8.16b, v6.4b[2]\n" + ".word 0x4f87e91c // sdot v28.4s, v8.16b, v7.4b[2]\n" + "ldr q8, [%[b_ptr0], #-0x80]\n" + ".word 0x4f84e931 // sdot v17.4s, v9.16b, v4.4b[2]\n" + ".word 0x4f85e935 // sdot v21.4s, v9.16b, v5.4b[2]\n" + ".word 0x4f86e939 // sdot v25.4s, v9.16b, v6.4b[2]\n" + ".word 0x4f87e93d // sdot v29.4s, v9.16b, v7.4b[2]\n" + "ldr q9, [%[b_ptr0], #-0x70]\n" + ".word 0x4f84e952 // sdot v18.4s, v10.16b, v4.4b[2]\n" + ".word 0x4f85e956 // sdot v22.4s, v10.16b, v5.4b[2]\n" + ".word 0x4f86e95a // sdot v26.4s, v10.16b, v6.4b[2]\n" + ".word 0x4f87e95e // sdot v30.4s, v10.16b, v7.4b[2]\n" + "ldr q10, [%[b_ptr0], #-0x60]\n" + ".word 0x4f84e973 // sdot v19.4s, v11.16b, v4.4b[2]\n" + ".word 0x4f85e977 // sdot v23.4s, v11.16b, v5.4b[2]\n" + ".word 0x4f86e97b // sdot v27.4s, v11.16b, v6.4b[2]\n" + ".word 0x4f87e97f // sdot v31.4s, v11.16b, v7.4b[2]\n" + "ldr q11, [%[b_ptr0], #-0x50]\n" + ".word 0x4fa4e990 // sdot v16.4s, v12.16b, v4.4b[3]\n" + ".word 0x4fa5e994 // sdot v20.4s, v12.16b, v5.4b[3]\n" + ".word 0x4fa6e998 // sdot v24.4s, v12.16b, v6.4b[3]\n" + ".word 0x4fa7e99c // sdot v28.4s, v12.16b, v7.4b[3]\n" + "ldr q12, [%[b_ptr0], #-0x40]\n" + ".word 0x4fa4e9b1 // sdot v17.4s, v13.16b, v4.4b[3]\n" + ".word 0x4fa5e9b5 // sdot v21.4s, v13.16b, v5.4b[3]\n" + ".word 0x4fa6e9b9 // sdot v25.4s, v13.16b, v6.4b[3]\n" + ".word 0x4fa7e9bd // sdot v29.4s, v13.16b, v7.4b[3]\n" + "ldr q13, [%[b_ptr0], #-0x30]\n" + ".word 0x4fa4e9d2 // sdot v18.4s, v14.16b, v4.4b[3]\n" + ".word 0x4fa5e9d6 // sdot v22.4s, v14.16b, v5.4b[3]\n" + ".word 0x4fa6e9da // sdot v26.4s, v14.16b, v6.4b[3]\n" + ".word 0x4fa7e9de // sdot v30.4s, v14.16b, v7.4b[3]\n" + "ldr q14, [%[b_ptr0], #-0x20]\n" + ".word 0x4fa4e9f3 // sdot v19.4s, v15.16b, v4.4b[3]\n" + ".word 0x4fa5e9f7 // sdot v23.4s, v15.16b, v5.4b[3]\n" + ".word 0x4fa6e9fb // sdot v27.4s, v15.16b, v6.4b[3]\n" + ".word 0x4fa7e9ff // sdot v31.4s, v15.16b, v7.4b[3]\n" + "b.ne 3b\n" + "2:\n" + "ldr q15, [%[b_ptr0], #-0x10]\n" + "prfm PSTL1KEEP, [%[c_ptr0]]\n" + "prfm PSTL1KEEP, [c_ptr1]\n" + "prfm PSTL1KEEP, [c_ptr2]\n" + "prfm PSTL1KEEP, [c_ptr3]\n" + "cbz %[regs], 4f\n" + ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" + "ldr q4, [%[a_ptr0]]\n" + ".word 0x4f81e114 // sdot v20.4s, v8.16b, v1.4b[0]\n" + "ldr q5, [a_ptr1]\n" + ".word 0x4f82e118 // sdot v24.4s, v8.16b, v2.4b[0]\n" + "ldr q6, [a_ptr2]\n" + ".word 0x4f83e11c // sdot v28.4s, v8.16b, v3.4b[0]\n" + "ldr q7, [a_ptr3]\n" + ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" + "ldr q8, [%[b_ptr0]]\n" + ".word 0x4f81e135 // sdot v21.4s, v9.16b, v1.4b[0]\n" + "add %[a_ptr0], %[a_ptr0], #0x10\n" + ".word 0x4f82e139 // sdot v25.4s, v9.16b, v2.4b[0]\n" + "add a_ptr1, a_ptr1, #0x10\n" + ".word 0x4f83e13d // sdot v29.4s, v9.16b, v3.4b[0]\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" + "add a_ptr2, a_ptr2, #0x10\n" + ".word 0x4f81e156 // sdot v22.4s, v10.16b, v1.4b[0]\n" + "add a_ptr3, a_ptr3, #0x10\n" + ".word 0x4f82e15a // sdot v26.4s, v10.16b, v2.4b[0]\n" + ".word 0x4f83e15e // sdot v30.4s, v10.16b, v3.4b[0]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" + ".word 0x4f81e177 // sdot v23.4s, v11.16b, v1.4b[0]\n" + ".word 0x4f82e17b // sdot v27.4s, v11.16b, v2.4b[0]\n" + ".word 0x4f83e17f // sdot v31.4s, v11.16b, v3.4b[0]\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + ".word 0x4fa0e190 // sdot v16.4s, v12.16b, v0.4b[1]\n" + ".word 0x4fa1e194 // sdot v20.4s, v12.16b, v1.4b[1]\n" + ".word 0x4fa2e198 // sdot v24.4s, v12.16b, v2.4b[1]\n" + ".word 0x4fa3e19c // sdot v28.4s, v12.16b, v3.4b[1]\n" + "ldr q12, [%[b_ptr0], #0x40]\n" + ".word 0x4fa0e1b1 // sdot v17.4s, v13.16b, v0.4b[1]\n" + ".word 0x4fa1e1b5 // sdot v21.4s, v13.16b, v1.4b[1]\n" + ".word 0x4fa2e1b9 // sdot v25.4s, v13.16b, v2.4b[1]\n" + ".word 0x4fa3e1bd // sdot v29.4s, v13.16b, v3.4b[1]\n" + "ldr q13, [%[b_ptr0], #0x50]\n" + ".word 0x4fa0e1d2 // sdot v18.4s, v14.16b, v0.4b[1]\n" + ".word 0x4fa1e1d6 // sdot v22.4s, v14.16b, v1.4b[1]\n" + ".word 0x4fa2e1da // sdot v26.4s, v14.16b, v2.4b[1]\n" + ".word 0x4fa3e1de // sdot v30.4s, v14.16b, v3.4b[1]\n" + "ldr q14, [%[b_ptr0], #0x60]\n" + ".word 0x4fa0e1f3 // sdot v19.4s, v15.16b, v0.4b[1]\n" + ".word 0x4fa1e1f7 // sdot v23.4s, v15.16b, v1.4b[1]\n" + ".word 0x4fa2e1fb // sdot v27.4s, v15.16b, v2.4b[1]\n" + ".word 0x4fa3e1ff // sdot v31.4s, v15.16b, v3.4b[1]\n" + "ldr q15, [%[b_ptr0], #0x70]\n" + ".word 0x4f80e910 // sdot v16.4s, v8.16b, v0.4b[2]\n" + "add %[b_ptr0], %[b_ptr0], #0x100\n" + ".word 0x4f81e914 // sdot v20.4s, v8.16b, v1.4b[2]\n" + ".word 0x4f82e918 // sdot v24.4s, v8.16b, v2.4b[2]\n" + ".word 0x4f83e91c // sdot v28.4s, v8.16b, v3.4b[2]\n" + "ldr q8, [%[b_ptr0], #-0x80]\n" + ".word 0x4f80e931 // sdot v17.4s, v9.16b, v0.4b[2]\n" + ".word 0x4f81e935 // sdot v21.4s, v9.16b, v1.4b[2]\n" + ".word 0x4f82e939 // sdot v25.4s, v9.16b, v2.4b[2]\n" + ".word 0x4f83e93d // sdot v29.4s, v9.16b, v3.4b[2]\n" + "ldr q9, [%[b_ptr0], #-0x70]\n" + ".word 0x4f80e952 // sdot v18.4s, v10.16b, v0.4b[2]\n" + ".word 0x4f81e956 // sdot v22.4s, v10.16b, v1.4b[2]\n" + ".word 0x4f82e95a // sdot v26.4s, v10.16b, v2.4b[2]\n" + ".word 0x4f83e95e // sdot v30.4s, v10.16b, v3.4b[2]\n" + "ldr q10, [%[b_ptr0], #-0x60]\n" + ".word 0x4f80e973 // sdot v19.4s, v11.16b, v0.4b[2]\n" + ".word 0x4f81e977 // sdot v23.4s, v11.16b, v1.4b[2]\n" + ".word 0x4f82e97b // sdot v27.4s, v11.16b, v2.4b[2]\n" + ".word 0x4f83e97f // sdot v31.4s, v11.16b, v3.4b[2]\n" + "ldr q11, [%[b_ptr0], #-0x50]\n" + ".word 0x4fa0e990 // sdot v16.4s, v12.16b, v0.4b[3]\n" + ".word 0x4fa1e994 // sdot v20.4s, v12.16b, v1.4b[3]\n" + ".word 0x4fa2e998 // sdot v24.4s, v12.16b, v2.4b[3]\n" + ".word 0x4fa3e99c // sdot v28.4s, v12.16b, v3.4b[3]\n" + "ldr q12, [%[b_ptr0], #-0x40]\n" + ".word 0x4fa0e9b1 // sdot v17.4s, v13.16b, v0.4b[3]\n" + ".word 0x4fa1e9b5 // sdot v21.4s, v13.16b, v1.4b[3]\n" + ".word 0x4fa2e9b9 // sdot v25.4s, v13.16b, v2.4b[3]\n" + ".word 0x4fa3e9bd // sdot v29.4s, v13.16b, v3.4b[3]\n" + "ldr q13, [%[b_ptr0], #-0x30]\n" + ".word 0x4fa0e9d2 // sdot v18.4s, v14.16b, v0.4b[3]\n" + ".word 0x4fa1e9d6 // sdot v22.4s, v14.16b, v1.4b[3]\n" + ".word 0x4fa2e9da // sdot v26.4s, v14.16b, v2.4b[3]\n" + ".word 0x4fa3e9de // sdot v30.4s, v14.16b, v3.4b[3]\n" + "ldr q14, [%[b_ptr0], #-0x20]\n" + ".word 0x4fa0e9f3 // sdot v19.4s, v15.16b, v0.4b[3]\n" + ".word 0x4fa1e9f7 // sdot v23.4s, v15.16b, v1.4b[3]\n" + ".word 0x4fa2e9fb // sdot v27.4s, v15.16b, v2.4b[3]\n" + ".word 0x4fa3e9ff // sdot v31.4s, v15.16b, v3.4b[3]\n" + "ldr q15, [%[b_ptr0], #-0x10]\n" + ".word 0x4f84e110 // sdot v16.4s, v8.16b, v4.4b[0]\n" + ".word 0x4f85e114 // sdot v20.4s, v8.16b, v5.4b[0]\n" + ".word 0x4f86e118 // sdot v24.4s, v8.16b, v6.4b[0]\n" + ".word 0x4f87e11c // sdot v28.4s, v8.16b, v7.4b[0]\n" + "ldr q8, [%[b_ptr0]]\n" + ".word 0x4f84e131 // sdot v17.4s, v9.16b, v4.4b[0]\n" + ".word 0x4f85e135 // sdot v21.4s, v9.16b, v5.4b[0]\n" + ".word 0x4f86e139 // sdot v25.4s, v9.16b, v6.4b[0]\n" + ".word 0x4f87e13d // sdot v29.4s, v9.16b, v7.4b[0]\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + ".word 0x4f84e152 // sdot v18.4s, v10.16b, v4.4b[0]\n" + ".word 0x4f85e156 // sdot v22.4s, v10.16b, v5.4b[0]\n" + ".word 0x4f86e15a // sdot v26.4s, v10.16b, v6.4b[0]\n" + ".word 0x4f87e15e // sdot v30.4s, v10.16b, v7.4b[0]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + ".word 0x4f84e173 // sdot v19.4s, v11.16b, v4.4b[0]\n" + ".word 0x4f85e177 // sdot v23.4s, v11.16b, v5.4b[0]\n" + ".word 0x4f86e17b // sdot v27.4s, v11.16b, v6.4b[0]\n" + ".word 0x4f87e17f // sdot v31.4s, v11.16b, v7.4b[0]\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + ".word 0x4fa4e190 // sdot v16.4s, v12.16b, v4.4b[1]\n" + ".word 0x4fa5e194 // sdot v20.4s, v12.16b, v5.4b[1]\n" + ".word 0x4fa6e198 // sdot v24.4s, v12.16b, v6.4b[1]\n" + ".word 0x4fa7e19c // sdot v28.4s, v12.16b, v7.4b[1]\n" + "ldr q12, [%[b_ptr0], #0x40]\n" + ".word 0x4fa4e1b1 // sdot v17.4s, v13.16b, v4.4b[1]\n" + ".word 0x4fa5e1b5 // sdot v21.4s, v13.16b, v5.4b[1]\n" + ".word 0x4fa6e1b9 // sdot v25.4s, v13.16b, v6.4b[1]\n" + ".word 0x4fa7e1bd // sdot v29.4s, v13.16b, v7.4b[1]\n" + "ldr q13, [%[b_ptr0], #0x50]\n" + ".word 0x4fa4e1d2 // sdot v18.4s, v14.16b, v4.4b[1]\n" + ".word 0x4fa5e1d6 // sdot v22.4s, v14.16b, v5.4b[1]\n" + ".word 0x4fa6e1da // sdot v26.4s, v14.16b, v6.4b[1]\n" + ".word 0x4fa7e1de // sdot v30.4s, v14.16b, v7.4b[1]\n" + "ldr q14, [%[b_ptr0], #0x60]\n" + ".word 0x4fa4e1f3 // sdot v19.4s, v15.16b, v4.4b[1]\n" + ".word 0x4fa5e1f7 // sdot v23.4s, v15.16b, v5.4b[1]\n" + ".word 0x4fa6e1fb // sdot v27.4s, v15.16b, v6.4b[1]\n" + ".word 0x4fa7e1ff // sdot v31.4s, v15.16b, v7.4b[1]\n" + "ldr q15, [%[b_ptr0], #0x70]\n" + ".word 0x4f84e910 // sdot v16.4s, v8.16b, v4.4b[2]\n" + "add %[b_ptr0], %[b_ptr0], #0x80\n" + ".word 0x4f85e914 // sdot v20.4s, v8.16b, v5.4b[2]\n" + ".word 0x4f86e918 // sdot v24.4s, v8.16b, v6.4b[2]\n" + ".word 0x4f87e91c // sdot v28.4s, v8.16b, v7.4b[2]\n" + ".word 0x4f84e931 // sdot v17.4s, v9.16b, v4.4b[2]\n" + ".word 0x4f85e935 // sdot v21.4s, v9.16b, v5.4b[2]\n" + ".word 0x4f86e939 // sdot v25.4s, v9.16b, v6.4b[2]\n" + ".word 0x4f87e93d // sdot v29.4s, v9.16b, v7.4b[2]\n" + ".word 0x4f84e952 // sdot v18.4s, v10.16b, v4.4b[2]\n" + ".word 0x4f85e956 // sdot v22.4s, v10.16b, v5.4b[2]\n" + ".word 0x4f86e95a // sdot v26.4s, v10.16b, v6.4b[2]\n" + ".word 0x4f87e95e // sdot v30.4s, v10.16b, v7.4b[2]\n" + ".word 0x4f84e973 // sdot v19.4s, v11.16b, v4.4b[2]\n" + ".word 0x4f85e977 // sdot v23.4s, v11.16b, v5.4b[2]\n" + ".word 0x4f86e97b // sdot v27.4s, v11.16b, v6.4b[2]\n" + ".word 0x4f87e97f // sdot v31.4s, v11.16b, v7.4b[2]\n" + ".word 0x4fa4e990 // sdot v16.4s, v12.16b, v4.4b[3]\n" + ".word 0x4fa5e994 // sdot v20.4s, v12.16b, v5.4b[3]\n" + ".word 0x4fa6e998 // sdot v24.4s, v12.16b, v6.4b[3]\n" + ".word 0x4fa7e99c // sdot v28.4s, v12.16b, v7.4b[3]\n" + ".word 0x4fa4e9b1 // sdot v17.4s, v13.16b, v4.4b[3]\n" + ".word 0x4fa5e9b5 // sdot v21.4s, v13.16b, v5.4b[3]\n" + ".word 0x4fa6e9b9 // sdot v25.4s, v13.16b, v6.4b[3]\n" + ".word 0x4fa7e9bd // sdot v29.4s, v13.16b, v7.4b[3]\n" + ".word 0x4fa4e9d2 // sdot v18.4s, v14.16b, v4.4b[3]\n" + ".word 0x4fa5e9d6 // sdot v22.4s, v14.16b, v5.4b[3]\n" + ".word 0x4fa6e9da // sdot v26.4s, v14.16b, v6.4b[3]\n" + ".word 0x4fa7e9de // sdot v30.4s, v14.16b, v7.4b[3]\n" + ".word 0x4fa4e9f3 // sdot v19.4s, v15.16b, v4.4b[3]\n" + ".word 0x4fa5e9f7 // sdot v23.4s, v15.16b, v5.4b[3]\n" + ".word 0x4fa6e9fb // sdot v27.4s, v15.16b, v6.4b[3]\n" + ".word 0x4fa7e9ff // sdot v31.4s, v15.16b, v7.4b[3]\n" + "b 5f\n" + "4:\n" + ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" + ".word 0x4f81e114 // sdot v20.4s, v8.16b, v1.4b[0]\n" + ".word 0x4f82e118 // sdot v24.4s, v8.16b, v2.4b[0]\n" + ".word 0x4f83e11c // sdot v28.4s, v8.16b, v3.4b[0]\n" + "ldr q8, [%[b_ptr0]]\n" + ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" + ".word 0x4f81e135 // sdot v21.4s, v9.16b, v1.4b[0]\n" + ".word 0x4f82e139 // sdot v25.4s, v9.16b, v2.4b[0]\n" + ".word 0x4f83e13d // sdot v29.4s, v9.16b, v3.4b[0]\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" + ".word 0x4f81e156 // sdot v22.4s, v10.16b, v1.4b[0]\n" + ".word 0x4f82e15a // sdot v26.4s, v10.16b, v2.4b[0]\n" + ".word 0x4f83e15e // sdot v30.4s, v10.16b, v3.4b[0]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" + ".word 0x4f81e177 // sdot v23.4s, v11.16b, v1.4b[0]\n" + ".word 0x4f82e17b // sdot v27.4s, v11.16b, v2.4b[0]\n" + ".word 0x4f83e17f // sdot v31.4s, v11.16b, v3.4b[0]\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + ".word 0x4fa0e190 // sdot v16.4s, v12.16b, v0.4b[1]\n" + ".word 0x4fa1e194 // sdot v20.4s, v12.16b, v1.4b[1]\n" + ".word 0x4fa2e198 // sdot v24.4s, v12.16b, v2.4b[1]\n" + ".word 0x4fa3e19c // sdot v28.4s, v12.16b, v3.4b[1]\n" + "ldr q12, [%[b_ptr0], #0x40]\n" + ".word 0x4fa0e1b1 // sdot v17.4s, v13.16b, v0.4b[1]\n" + ".word 0x4fa1e1b5 // sdot v21.4s, v13.16b, v1.4b[1]\n" + ".word 0x4fa2e1b9 // sdot v25.4s, v13.16b, v2.4b[1]\n" + ".word 0x4fa3e1bd // sdot v29.4s, v13.16b, v3.4b[1]\n" + "ldr q13, [%[b_ptr0], #0x50]\n" + ".word 0x4fa0e1d2 // sdot v18.4s, v14.16b, v0.4b[1]\n" + ".word 0x4fa1e1d6 // sdot v22.4s, v14.16b, v1.4b[1]\n" + ".word 0x4fa2e1da // sdot v26.4s, v14.16b, v2.4b[1]\n" + ".word 0x4fa3e1de // sdot v30.4s, v14.16b, v3.4b[1]\n" + "ldr q14, [%[b_ptr0], #0x60]\n" + ".word 0x4fa0e1f3 // sdot v19.4s, v15.16b, v0.4b[1]\n" + ".word 0x4fa1e1f7 // sdot v23.4s, v15.16b, v1.4b[1]\n" + ".word 0x4fa2e1fb // sdot v27.4s, v15.16b, v2.4b[1]\n" + ".word 0x4fa3e1ff // sdot v31.4s, v15.16b, v3.4b[1]\n" + "ldr q15, [%[b_ptr0], #0x70]\n" + ".word 0x4f80e910 // sdot v16.4s, v8.16b, v0.4b[2]\n" + "add %[b_ptr0], %[b_ptr0], #0x80\n" + ".word 0x4f81e914 // sdot v20.4s, v8.16b, v1.4b[2]\n" + ".word 0x4f82e918 // sdot v24.4s, v8.16b, v2.4b[2]\n" + ".word 0x4f83e91c // sdot v28.4s, v8.16b, v3.4b[2]\n" + ".word 0x4f80e931 // sdot v17.4s, v9.16b, v0.4b[2]\n" + ".word 0x4f81e935 // sdot v21.4s, v9.16b, v1.4b[2]\n" + ".word 0x4f82e939 // sdot v25.4s, v9.16b, v2.4b[2]\n" + ".word 0x4f83e93d // sdot v29.4s, v9.16b, v3.4b[2]\n" + ".word 0x4f80e952 // sdot v18.4s, v10.16b, v0.4b[2]\n" + ".word 0x4f81e956 // sdot v22.4s, v10.16b, v1.4b[2]\n" + ".word 0x4f82e95a // sdot v26.4s, v10.16b, v2.4b[2]\n" + ".word 0x4f83e95e // sdot v30.4s, v10.16b, v3.4b[2]\n" + ".word 0x4f80e973 // sdot v19.4s, v11.16b, v0.4b[2]\n" + ".word 0x4f81e977 // sdot v23.4s, v11.16b, v1.4b[2]\n" + ".word 0x4f82e97b // sdot v27.4s, v11.16b, v2.4b[2]\n" + ".word 0x4f83e97f // sdot v31.4s, v11.16b, v3.4b[2]\n" + ".word 0x4fa0e990 // sdot v16.4s, v12.16b, v0.4b[3]\n" + ".word 0x4fa1e994 // sdot v20.4s, v12.16b, v1.4b[3]\n" + ".word 0x4fa2e998 // sdot v24.4s, v12.16b, v2.4b[3]\n" + ".word 0x4fa3e99c // sdot v28.4s, v12.16b, v3.4b[3]\n" + ".word 0x4fa0e9b1 // sdot v17.4s, v13.16b, v0.4b[3]\n" + ".word 0x4fa1e9b5 // sdot v21.4s, v13.16b, v1.4b[3]\n" + ".word 0x4fa2e9b9 // sdot v25.4s, v13.16b, v2.4b[3]\n" + ".word 0x4fa3e9bd // sdot v29.4s, v13.16b, v3.4b[3]\n" + ".word 0x4fa0e9d2 // sdot v18.4s, v14.16b, v0.4b[3]\n" + ".word 0x4fa1e9d6 // sdot v22.4s, v14.16b, v1.4b[3]\n" + ".word 0x4fa2e9da // sdot v26.4s, v14.16b, v2.4b[3]\n" + ".word 0x4fa3e9de // sdot v30.4s, v14.16b, v3.4b[3]\n" + ".word 0x4fa0e9f3 // sdot v19.4s, v15.16b, v0.4b[3]\n" + ".word 0x4fa1e9f7 // sdot v23.4s, v15.16b, v1.4b[3]\n" + ".word 0x4fa2e9fb // sdot v27.4s, v15.16b, v2.4b[3]\n" + ".word 0x4fa3e9ff // sdot v31.4s, v15.16b, v3.4b[3]\n" + "5:\n" + "cbz %[blocks], 6f\n" + "7:\n" + "ldr q8, [%[b_ptr0]]\n" + "subs %[blocks], %[blocks], #0x1\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + "ldr s0, [%[a_ptr0]]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + "add %[a_ptr0], %[a_ptr0], #0x4\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + "add %[b_ptr0], %[b_ptr0], #0x40\n" + ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" + "ldr s1, [a_ptr1]\n" + ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" + "add a_ptr1, a_ptr1, #0x4\n" + ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" + "ldr s2, [a_ptr2]\n" + ".word 0x4f81e114 // sdot v20.4s, v8.16b, v1.4b[0]\n" + "add a_ptr2, a_ptr2, #0x4\n" + ".word 0x4f81e135 // sdot v21.4s, v9.16b, v1.4b[0]\n" + "ldr s3, [a_ptr3]\n" + ".word 0x4f82e118 // sdot v24.4s, v8.16b, v2.4b[0]\n" + "add a_ptr3, a_ptr3, #0x4\n" + ".word 0x4f82e139 // sdot v25.4s, v9.16b, v2.4b[0]\n" + ".word 0x4f83e11c // sdot v28.4s, v8.16b, v3.4b[0]\n" + ".word 0x4f83e13d // sdot v29.4s, v9.16b, v3.4b[0]\n" + ".word 0x4f81e156 // sdot v22.4s, v10.16b, v1.4b[0]\n" + ".word 0x4f82e15a // sdot v26.4s, v10.16b, v2.4b[0]\n" + ".word 0x4f83e15e // sdot v30.4s, v10.16b, v3.4b[0]\n" + ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" + ".word 0x4f81e177 // sdot v23.4s, v11.16b, v1.4b[0]\n" + ".word 0x4f82e17b // sdot v27.4s, v11.16b, v2.4b[0]\n" + ".word 0x4f83e17f // sdot v31.4s, v11.16b, v3.4b[0]\n" + "b.ne 7b\n" + "6:\n" + "cbz %[odds], 8f\n" + "ld1 {v0.b}[0], [%[a_ptr0]], #1\n" + "ld1 {v1.b}[0], [a_ptr1], #1\n" + "ld1 {v2.b}[0], [a_ptr2], #1\n" + "ld1 {v3.b}[0], [a_ptr3], #1\n" + "subs %[odds], %[odds], #0x1\n" + "b.eq 9f\n" + "ld1 {v0.b}[1], [%[a_ptr0]], #1\n" + "ld1 {v1.b}[1], [a_ptr1], #1\n" + "ld1 {v2.b}[1], [a_ptr2], #1\n" + "ld1 {v3.b}[1], [a_ptr3], #1\n" + "subs %[odds], %[odds], #0x1\n" + "b.eq 9f\n" + "ld1 {v0.b}[2], [%[a_ptr0]]\n" + "ld1 {v1.b}[2], [a_ptr1]\n" + "ld1 {v2.b}[2], [a_ptr2]\n" + "ld1 {v3.b}[2], [a_ptr3]\n" + "9:\n" + "ldr q8, [%[b_ptr0]]\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + ".word 0x4f80e110 // sdot v16.4s, v8.16b, v0.4b[0]\n" + ".word 0x4f81e114 // sdot v20.4s, v8.16b, v1.4b[0]\n" + ".word 0x4f82e118 // sdot v24.4s, v8.16b, v2.4b[0]\n" + ".word 0x4f83e11c // sdot v28.4s, v8.16b, v3.4b[0]\n" + ".word 0x4f80e131 // sdot v17.4s, v9.16b, v0.4b[0]\n" + ".word 0x4f81e135 // sdot v21.4s, v9.16b, v1.4b[0]\n" + ".word 0x4f82e139 // sdot v25.4s, v9.16b, v2.4b[0]\n" + ".word 0x4f83e13d // sdot v29.4s, v9.16b, v3.4b[0]\n" + ".word 0x4f80e152 // sdot v18.4s, v10.16b, v0.4b[0]\n" + ".word 0x4f81e156 // sdot v22.4s, v10.16b, v1.4b[0]\n" + ".word 0x4f82e15a // sdot v26.4s, v10.16b, v2.4b[0]\n" + ".word 0x4f83e15e // sdot v30.4s, v10.16b, v3.4b[0]\n" + ".word 0x4f80e173 // sdot v19.4s, v11.16b, v0.4b[0]\n" + ".word 0x4f81e177 // sdot v23.4s, v11.16b, v1.4b[0]\n" + ".word 0x4f82e17b // sdot v27.4s, v11.16b, v2.4b[0]\n" + ".word 0x4f83e17f // sdot v31.4s, v11.16b, v3.4b[0]\n" + "8:\n" + "str q16, [%[c_ptr0]]\n" + "str q17, [%[c_ptr0], #0x10]\n" + "str q18, [%[c_ptr0], #0x20]\n" + "str q19, [%[c_ptr0], #0x30]\n" + "add %[c_ptr0], %[c_ptr0], #0x40\n" + "str q20, [c_ptr1]\n" + "str q21, [c_ptr1, #0x10]\n" + "str q22, [c_ptr1, #0x20]\n" + "str q23, [c_ptr1, #0x30]\n" + "str q24, [c_ptr2]\n" + "str q25, [c_ptr2, #0x10]\n" + "str q26, [c_ptr2, #0x20]\n" + "str q27, [c_ptr2, #0x30]\n" + "str q28, [c_ptr3]\n" + "str q29, [c_ptr3, #0x10]\n" + "str q30, [c_ptr3, #0x20]\n" + "str q31, [c_ptr3, #0x30]\n" + ".unreq a_ptr1\n" + ".unreq a_ptr2\n" + ".unreq a_ptr3\n" + ".unreq c_ptr1\n" + ".unreq c_ptr2\n" + ".unreq c_ptr3\n" + : [a_ptr0] "+r" (a_ptr0), [b_ptr0] "+r" (b_ptr0), [c_ptr0] "+r" (c_ptr0), [loops] "+r" (loops), [regs] "+r" (regs), [blocks] "+r" (blocks), [odds] "+r" (odds) + : [betaptr] "r" (betaptr), [width] "r" (width), [beta0] "r" (beta0), [lda] "r" (ldab), [ldc] "r" (ldcb) + : "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x0", "x1", "x2", "x3", "x4", "x5", "cc", "memory" ); break; } @@ -1839,4 +1839,4 @@ void a64_hybrid_s8s32_dot_16x4(const int8_t *A, int lda, const int8_t *B, int32_ } // namespace arm_gemm -#endif // __aarch64__ \ No newline at end of file +#endif // __aarch64__ diff --git a/src/core/NEON/kernels/arm_gemm/kernels/a64_hybrid_u8u32_dot_16x4.hpp b/src/core/NEON/kernels/arm_gemm/kernels/a64_hybrid_u8u32_dot_16x4.hpp index 7fb9b5c131..48731efc57 100644 --- a/src/core/NEON/kernels/arm_gemm/kernels/a64_hybrid_u8u32_dot_16x4.hpp +++ b/src/core/NEON/kernels/arm_gemm/kernels/a64_hybrid_u8u32_dot_16x4.hpp @@ -44,7 +44,7 @@ public: typedef void (*kern_type)(const uint8_t *, int, const uint8_t *, uint32_t *, int, uint32_t, int, int, int); /* Kernel blocking parameters */ - static unsigned int out_height() + static constexpr unsigned int out_height() { return 4; } diff --git a/src/core/NEON/kernels/arm_gemm/kernels/a64_hybrid_u8u32_dot_16x4/a55.cpp b/src/core/NEON/kernels/arm_gemm/kernels/a64_hybrid_u8u32_dot_16x4/a55.cpp index 487cfa08e3..e343d58fa0 100644 --- a/src/core/NEON/kernels/arm_gemm/kernels/a64_hybrid_u8u32_dot_16x4/a55.cpp +++ b/src/core/NEON/kernels/arm_gemm/kernels/a64_hybrid_u8u32_dot_16x4/a55.cpp @@ -74,2381 +74,2381 @@ void a64_hybrid_u8u32_dot_16x4_a55(const uint8_t *A, int lda, const uint8_t *B, switch(M-y) { case 1: __asm __volatile ( - "temploadreg0 .req X0\n" - "temploadreg1 .req X1\n" - "temploadreg2 .req X2\n" - "temploadreg3 .req X3\n" - "cbz %[beta0], 1f\n" - "movi v16.4s, #0\n" - "ldr q0, [%[a_ptr0]]\n" - "movi v17.4s, #0\n" - "ldr q8, [%[b_ptr0]]\n" - "movi v18.4s, #0\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - "movi v19.4s, #0\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - "add %[a_ptr0], %[a_ptr0], #0x10\n" - "ldr q12, [%[b_ptr0], #0x40]\n" - "ldr q13, [%[b_ptr0], #0x50]\n" - "ldr d14, [%[b_ptr0], #0x60]\n" - "ldr temploadreg2, [%[b_ptr0], #0x68]\n" - "add %[b_ptr0], %[b_ptr0], #0x80\n" - "cbz %[loops], 2f\n" - "b 3f\n" - "1:\n" - "ld1r {v15.4s}, [%[betaptr]]\n" - "ldr q16, [%[c_ptr0]]\n" - "ldr q17, [%[c_ptr0], #0x10]\n" - "ldr q18, [%[c_ptr0], #0x20]\n" - "ldr q19, [%[c_ptr0], #0x30]\n" - "mul v16.4s, v16.4s, v15.4s\n" - "ldr q0, [%[a_ptr0]]\n" - "mul v17.4s, v17.4s, v15.4s\n" - "ldr q8, [%[b_ptr0]]\n" - "mul v18.4s, v18.4s, v15.4s\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - "mul v19.4s, v19.4s, v15.4s\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - "add %[a_ptr0], %[a_ptr0], #0x10\n" - "ldr q12, [%[b_ptr0], #0x40]\n" - "ldr q13, [%[b_ptr0], #0x50]\n" - "ldr d14, [%[b_ptr0], #0x60]\n" - "ldr temploadreg2, [%[b_ptr0], #0x68]\n" - "add %[b_ptr0], %[b_ptr0], #0x80\n" - "cbz %[loops], 2f\n" - "3:\n" - ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" - "ins v14.d[1], temploadreg2\n" - ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" - "ldr d15, [%[b_ptr0], #-0x10]\n" - ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" - "ldr temploadreg3, [%[b_ptr0], #-0x8]\n" - ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" - "ldr d4, [%[a_ptr0]]\n" - ".word 0x6fa0e190 // udot v16.4s, v12.16b, v0.4b[1]\n" - "ldr temploadreg0, [%[a_ptr0], #0x8]\n" - ".word 0x6fa0e1b1 // udot v17.4s, v13.16b, v0.4b[1]\n" - "ldr d8, [%[b_ptr0]]\n" - ".word 0x6fa0e1d2 // udot v18.4s, v14.16b, v0.4b[1]\n" - "ldr d9, [%[b_ptr0], #0x10]\n" - "ldr temploadreg1, [%[b_ptr0], #0x18]\n" - "subs %[loops], %[loops], #0x1\n" - "ins v4.d[1], temploadreg0\n" - "prfm PLDL1KEEP, [%[a_ptr0], #0x40]\n" - "ldr temploadreg0, [%[b_ptr0], #0x8]\n" - "add %[a_ptr0], %[a_ptr0], #0x20\n" - "ldr d10, [%[b_ptr0], #0x20]\n" - "ldr temploadreg2, [%[b_ptr0], #0x28]\n" - "ldr d11, [%[b_ptr0], #0x30]\n" - "ins v15.d[1], temploadreg3\n" - "ldr temploadreg3, [%[b_ptr0], #0x38]\n" - "ldr d12, [%[b_ptr0], #0x40]\n" - "ins v8.d[1], temploadreg0\n" - ".word 0x6fa0e1f3 // udot v19.4s, v15.16b, v0.4b[1]\n" - "ldr temploadreg0, [%[b_ptr0], #0x48]\n" - "ldr d13, [%[b_ptr0], #0x50]\n" - "ins v9.d[1], temploadreg1\n" - ".word 0x6f80e910 // udot v16.4s, v8.16b, v0.4b[2]\n" - "ldr temploadreg1, [%[b_ptr0], #0x58]\n" - "ldr d14, [%[b_ptr0], #0x60]\n" - "ins v10.d[1], temploadreg2\n" - ".word 0x6f80e931 // udot v17.4s, v9.16b, v0.4b[2]\n" - "ldr temploadreg2, [%[b_ptr0], #0x68]\n" - "ldr d15, [%[b_ptr0], #0x70]\n" - "ins v11.d[1], temploadreg3\n" - ".word 0x6f80e952 // udot v18.4s, v10.16b, v0.4b[2]\n" - "ldr temploadreg3, [%[b_ptr0], #0x78]\n" - "ins v12.d[1], temploadreg0\n" - "add %[b_ptr0], %[b_ptr0], #0x100\n" - ".word 0x6f80e973 // udot v19.4s, v11.16b, v0.4b[2]\n" - "ldr d8, [%[b_ptr0], #-0x80]\n" - "ldr temploadreg0, [%[b_ptr0], #-0x78]\n" - ".word 0x6fa0e990 // udot v16.4s, v12.16b, v0.4b[3]\n" - "ldr d9, [%[b_ptr0], #-0x70]\n" - "ins v13.d[1], temploadreg1\n" - "ldr temploadreg1, [%[b_ptr0], #-0x68]\n" - "ldr d10, [%[b_ptr0], #-0x60]\n" - "ins v14.d[1], temploadreg2\n" - ".word 0x6fa0e9b1 // udot v17.4s, v13.16b, v0.4b[3]\n" - "ldr temploadreg2, [%[b_ptr0], #-0x58]\n" - "ldr d11, [%[b_ptr0], #-0x50]\n" - "ins v15.d[1], temploadreg3\n" - ".word 0x6fa0e9d2 // udot v18.4s, v14.16b, v0.4b[3]\n" - "ldr temploadreg3, [%[b_ptr0], #-0x48]\n" - "ldr d12, [%[b_ptr0], #-0x40]\n" - "ins v8.d[1], temploadreg0\n" - ".word 0x6fa0e9f3 // udot v19.4s, v15.16b, v0.4b[3]\n" - "ldr temploadreg0, [%[b_ptr0], #-0x38]\n" - "ldr d13, [%[b_ptr0], #-0x30]\n" - "ins v9.d[1], temploadreg1\n" - ".word 0x6f84e110 // udot v16.4s, v8.16b, v4.4b[0]\n" - "ldr temploadreg1, [%[b_ptr0], #-0x28]\n" - "ldr d14, [%[b_ptr0], #-0x20]\n" - "ins v10.d[1], temploadreg2\n" - ".word 0x6f84e131 // udot v17.4s, v9.16b, v4.4b[0]\n" - "ldr temploadreg2, [%[b_ptr0], #-0x18]\n" - "ldr d15, [%[b_ptr0], #-0x10]\n" - "ins v11.d[1], temploadreg3\n" - ".word 0x6f84e152 // udot v18.4s, v10.16b, v4.4b[0]\n" - "ldr temploadreg3, [%[b_ptr0], #-0x8]\n" - "ldr d0, [%[a_ptr0], #-0x10]\n" - "ins v12.d[1], temploadreg0\n" - ".word 0x6f84e173 // udot v19.4s, v11.16b, v4.4b[0]\n" - "ldr temploadreg0, [%[a_ptr0], #-0x8]\n" - "ldr d8, [%[b_ptr0]]\n" - "ldr d9, [%[b_ptr0], #0x10]\n" - ".word 0x6fa4e190 // udot v16.4s, v12.16b, v4.4b[1]\n" - "ins v0.d[1], temploadreg0\n" - "ldr temploadreg0, [%[b_ptr0], #0x8]\n" - "ins v13.d[1], temploadreg1\n" - "ldr temploadreg1, [%[b_ptr0], #0x18]\n" - "ldr d10, [%[b_ptr0], #0x20]\n" - "ins v14.d[1], temploadreg2\n" - ".word 0x6fa4e1b1 // udot v17.4s, v13.16b, v4.4b[1]\n" - "ldr temploadreg2, [%[b_ptr0], #0x28]\n" - "ldr d11, [%[b_ptr0], #0x30]\n" - "ins v15.d[1], temploadreg3\n" - ".word 0x6fa4e1d2 // udot v18.4s, v14.16b, v4.4b[1]\n" - "ldr temploadreg3, [%[b_ptr0], #0x38]\n" - "ldr d12, [%[b_ptr0], #0x40]\n" - "ins v8.d[1], temploadreg0\n" - ".word 0x6fa4e1f3 // udot v19.4s, v15.16b, v4.4b[1]\n" - "ldr temploadreg0, [%[b_ptr0], #0x48]\n" - "ldr d13, [%[b_ptr0], #0x50]\n" - "ins v9.d[1], temploadreg1\n" - ".word 0x6f84e910 // udot v16.4s, v8.16b, v4.4b[2]\n" - "ldr temploadreg1, [%[b_ptr0], #0x58]\n" - "ldr d14, [%[b_ptr0], #0x60]\n" - "ins v10.d[1], temploadreg2\n" - ".word 0x6f84e931 // udot v17.4s, v9.16b, v4.4b[2]\n" - "ldr temploadreg2, [%[b_ptr0], #0x68]\n" - "ldr d15, [%[b_ptr0], #0x70]\n" - "ins v11.d[1], temploadreg3\n" - ".word 0x6f84e952 // udot v18.4s, v10.16b, v4.4b[2]\n" - "ldr temploadreg3, [%[b_ptr0], #0x78]\n" - "ins v12.d[1], temploadreg0\n" - "add %[b_ptr0], %[b_ptr0], #0x100\n" - ".word 0x6f84e973 // udot v19.4s, v11.16b, v4.4b[2]\n" - "ldr d8, [%[b_ptr0], #-0x80]\n" - "ldr temploadreg0, [%[b_ptr0], #-0x78]\n" - ".word 0x6fa4e990 // udot v16.4s, v12.16b, v4.4b[3]\n" - "ldr d9, [%[b_ptr0], #-0x70]\n" - "ins v13.d[1], temploadreg1\n" - "ldr temploadreg1, [%[b_ptr0], #-0x68]\n" - "ldr d10, [%[b_ptr0], #-0x60]\n" - "ins v14.d[1], temploadreg2\n" - ".word 0x6fa4e9b1 // udot v17.4s, v13.16b, v4.4b[3]\n" - "ldr temploadreg2, [%[b_ptr0], #-0x58]\n" - "ldr d11, [%[b_ptr0], #-0x50]\n" - "ins v15.d[1], temploadreg3\n" - ".word 0x6fa4e9d2 // udot v18.4s, v14.16b, v4.4b[3]\n" - "ldr temploadreg3, [%[b_ptr0], #-0x48]\n" - "ldr d12, [%[b_ptr0], #-0x40]\n" - "ins v8.d[1], temploadreg0\n" - ".word 0x6fa4e9f3 // udot v19.4s, v15.16b, v4.4b[3]\n" - "ldr temploadreg0, [%[b_ptr0], #-0x38]\n" - "ldr d13, [%[b_ptr0], #-0x30]\n" - "ins v9.d[1], temploadreg1\n" - "ldr temploadreg1, [%[b_ptr0], #-0x28]\n" - "ldr d14, [%[b_ptr0], #-0x20]\n" - "ins v10.d[1], temploadreg2\n" - "ldr temploadreg2, [%[b_ptr0], #-0x18]\n" - "ins v11.d[1], temploadreg3\n" - "ins v12.d[1], temploadreg0\n" - "ins v13.d[1], temploadreg1\n" - "b.ne 3b\n" - "2:\n" - "ins v14.d[1], temploadreg2\n" - "prfm PSTL1KEEP, [%[c_ptr0]]\n" - "ldr d15, [%[b_ptr0], #-0x10]\n" - "ldr temploadreg3, [%[b_ptr0], #-0x8]\n" - "ins v15.d[1], temploadreg3\n" - "cbz %[regs], 4f\n" - ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" - "ldr d4, [%[a_ptr0]]\n" - ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" - "ldr temploadreg0, [%[a_ptr0], #0x8]\n" - ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" - "ldr d8, [%[b_ptr0]]\n" - ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" - "ldr d9, [%[b_ptr0], #0x10]\n" - ".word 0x6fa0e190 // udot v16.4s, v12.16b, v0.4b[1]\n" - "ins v4.d[1], temploadreg0\n" - ".word 0x6fa0e1b1 // udot v17.4s, v13.16b, v0.4b[1]\n" - "ldr temploadreg0, [%[b_ptr0], #0x8]\n" - ".word 0x6fa0e1d2 // udot v18.4s, v14.16b, v0.4b[1]\n" - "ldr temploadreg1, [%[b_ptr0], #0x18]\n" - ".word 0x6fa0e1f3 // udot v19.4s, v15.16b, v0.4b[1]\n" - "ldr d10, [%[b_ptr0], #0x20]\n" - "ldr temploadreg2, [%[b_ptr0], #0x28]\n" - "add %[a_ptr0], %[a_ptr0], #0x10\n" - "ldr d11, [%[b_ptr0], #0x30]\n" - "ldr temploadreg3, [%[b_ptr0], #0x38]\n" - "ldr d12, [%[b_ptr0], #0x40]\n" - "ins v8.d[1], temploadreg0\n" - "ldr temploadreg0, [%[b_ptr0], #0x48]\n" - "ldr d13, [%[b_ptr0], #0x50]\n" - "ins v9.d[1], temploadreg1\n" - ".word 0x6f80e910 // udot v16.4s, v8.16b, v0.4b[2]\n" - "ldr temploadreg1, [%[b_ptr0], #0x58]\n" - "ldr d14, [%[b_ptr0], #0x60]\n" - "ins v10.d[1], temploadreg2\n" - ".word 0x6f80e931 // udot v17.4s, v9.16b, v0.4b[2]\n" - "ldr temploadreg2, [%[b_ptr0], #0x68]\n" - "ldr d15, [%[b_ptr0], #0x70]\n" - "ins v11.d[1], temploadreg3\n" - ".word 0x6f80e952 // udot v18.4s, v10.16b, v0.4b[2]\n" - "ldr temploadreg3, [%[b_ptr0], #0x78]\n" - "ins v12.d[1], temploadreg0\n" - "add %[b_ptr0], %[b_ptr0], #0x100\n" - ".word 0x6f80e973 // udot v19.4s, v11.16b, v0.4b[2]\n" - "ldr d8, [%[b_ptr0], #-0x80]\n" - "ldr temploadreg0, [%[b_ptr0], #-0x78]\n" - ".word 0x6fa0e990 // udot v16.4s, v12.16b, v0.4b[3]\n" - "ldr d9, [%[b_ptr0], #-0x70]\n" - "ins v13.d[1], temploadreg1\n" - "ldr temploadreg1, [%[b_ptr0], #-0x68]\n" - "ldr d10, [%[b_ptr0], #-0x60]\n" - "ins v14.d[1], temploadreg2\n" - ".word 0x6fa0e9b1 // udot v17.4s, v13.16b, v0.4b[3]\n" - "ldr temploadreg2, [%[b_ptr0], #-0x58]\n" - "ldr d11, [%[b_ptr0], #-0x50]\n" - "ins v15.d[1], temploadreg3\n" - ".word 0x6fa0e9d2 // udot v18.4s, v14.16b, v0.4b[3]\n" - "ldr temploadreg3, [%[b_ptr0], #-0x48]\n" - "ldr d12, [%[b_ptr0], #-0x40]\n" - "ins v8.d[1], temploadreg0\n" - ".word 0x6fa0e9f3 // udot v19.4s, v15.16b, v0.4b[3]\n" - "ldr temploadreg0, [%[b_ptr0], #-0x38]\n" - "ldr d13, [%[b_ptr0], #-0x30]\n" - "ins v9.d[1], temploadreg1\n" - ".word 0x6f84e110 // udot v16.4s, v8.16b, v4.4b[0]\n" - "ldr temploadreg1, [%[b_ptr0], #-0x28]\n" - "ldr d14, [%[b_ptr0], #-0x20]\n" - "ins v10.d[1], temploadreg2\n" - ".word 0x6f84e131 // udot v17.4s, v9.16b, v4.4b[0]\n" - "ldr temploadreg2, [%[b_ptr0], #-0x18]\n" - "ldr d15, [%[b_ptr0], #-0x10]\n" - "ins v11.d[1], temploadreg3\n" - ".word 0x6f84e152 // udot v18.4s, v10.16b, v4.4b[0]\n" - "ldr temploadreg3, [%[b_ptr0], #-0x8]\n" - "ldr d8, [%[b_ptr0]]\n" - "ins v12.d[1], temploadreg0\n" - ".word 0x6f84e173 // udot v19.4s, v11.16b, v4.4b[0]\n" - "ldr temploadreg0, [%[b_ptr0], #0x8]\n" - "ldr d9, [%[b_ptr0], #0x10]\n" - "ins v13.d[1], temploadreg1\n" - ".word 0x6fa4e190 // udot v16.4s, v12.16b, v4.4b[1]\n" - "ldr temploadreg1, [%[b_ptr0], #0x18]\n" - "ldr d10, [%[b_ptr0], #0x20]\n" - "ins v14.d[1], temploadreg2\n" - ".word 0x6fa4e1b1 // udot v17.4s, v13.16b, v4.4b[1]\n" - "ldr temploadreg2, [%[b_ptr0], #0x28]\n" - "ldr d11, [%[b_ptr0], #0x30]\n" - "ins v15.d[1], temploadreg3\n" - ".word 0x6fa4e1d2 // udot v18.4s, v14.16b, v4.4b[1]\n" - "ldr temploadreg3, [%[b_ptr0], #0x38]\n" - "ldr d12, [%[b_ptr0], #0x40]\n" - "ins v8.d[1], temploadreg0\n" - ".word 0x6fa4e1f3 // udot v19.4s, v15.16b, v4.4b[1]\n" - "ldr temploadreg0, [%[b_ptr0], #0x48]\n" - "ldr d13, [%[b_ptr0], #0x50]\n" - "ins v9.d[1], temploadreg1\n" - ".word 0x6f84e910 // udot v16.4s, v8.16b, v4.4b[2]\n" - "ldr temploadreg1, [%[b_ptr0], #0x58]\n" - "ldr d14, [%[b_ptr0], #0x60]\n" - "ins v10.d[1], temploadreg2\n" - ".word 0x6f84e931 // udot v17.4s, v9.16b, v4.4b[2]\n" - "ldr temploadreg2, [%[b_ptr0], #0x68]\n" - "ldr d15, [%[b_ptr0], #0x70]\n" - "ins v11.d[1], temploadreg3\n" - ".word 0x6f84e952 // udot v18.4s, v10.16b, v4.4b[2]\n" - "ldr temploadreg3, [%[b_ptr0], #0x78]\n" - "ins v12.d[1], temploadreg0\n" - "add %[b_ptr0], %[b_ptr0], #0x80\n" - ".word 0x6f84e973 // udot v19.4s, v11.16b, v4.4b[2]\n" - "ins v13.d[1], temploadreg1\n" - "ins v14.d[1], temploadreg2\n" - ".word 0x6fa4e990 // udot v16.4s, v12.16b, v4.4b[3]\n" - "ins v15.d[1], temploadreg3\n" - ".word 0x6fa4e9b1 // udot v17.4s, v13.16b, v4.4b[3]\n" - ".word 0x6fa4e9d2 // udot v18.4s, v14.16b, v4.4b[3]\n" - ".word 0x6fa4e9f3 // udot v19.4s, v15.16b, v4.4b[3]\n" - "b 5f\n" - "4:\n" - ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" - "ldr d8, [%[b_ptr0]]\n" - ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" - "ldr temploadreg0, [%[b_ptr0], #0x8]\n" - ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" - "ldr d9, [%[b_ptr0], #0x10]\n" - ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" - "ldr temploadreg1, [%[b_ptr0], #0x18]\n" - ".word 0x6fa0e190 // udot v16.4s, v12.16b, v0.4b[1]\n" - "ldr d10, [%[b_ptr0], #0x20]\n" - ".word 0x6fa0e1b1 // udot v17.4s, v13.16b, v0.4b[1]\n" - "ldr temploadreg2, [%[b_ptr0], #0x28]\n" - ".word 0x6fa0e1d2 // udot v18.4s, v14.16b, v0.4b[1]\n" - "ldr d11, [%[b_ptr0], #0x30]\n" - ".word 0x6fa0e1f3 // udot v19.4s, v15.16b, v0.4b[1]\n" - "ldr temploadreg3, [%[b_ptr0], #0x38]\n" - "ldr d12, [%[b_ptr0], #0x40]\n" - "ins v8.d[1], temploadreg0\n" - "ldr temploadreg0, [%[b_ptr0], #0x48]\n" - "ldr d13, [%[b_ptr0], #0x50]\n" - "ins v9.d[1], temploadreg1\n" - ".word 0x6f80e910 // udot v16.4s, v8.16b, v0.4b[2]\n" - "ldr temploadreg1, [%[b_ptr0], #0x58]\n" - "ldr d14, [%[b_ptr0], #0x60]\n" - "ins v10.d[1], temploadreg2\n" - ".word 0x6f80e931 // udot v17.4s, v9.16b, v0.4b[2]\n" - "ldr temploadreg2, [%[b_ptr0], #0x68]\n" - "ldr d15, [%[b_ptr0], #0x70]\n" - "ins v11.d[1], temploadreg3\n" - ".word 0x6f80e952 // udot v18.4s, v10.16b, v0.4b[2]\n" - "ldr temploadreg3, [%[b_ptr0], #0x78]\n" - "ins v12.d[1], temploadreg0\n" - "add %[b_ptr0], %[b_ptr0], #0x80\n" - ".word 0x6f80e973 // udot v19.4s, v11.16b, v0.4b[2]\n" - "ins v13.d[1], temploadreg1\n" - "ins v14.d[1], temploadreg2\n" - ".word 0x6fa0e990 // udot v16.4s, v12.16b, v0.4b[3]\n" - "ins v15.d[1], temploadreg3\n" - ".word 0x6fa0e9b1 // udot v17.4s, v13.16b, v0.4b[3]\n" - ".word 0x6fa0e9d2 // udot v18.4s, v14.16b, v0.4b[3]\n" - ".word 0x6fa0e9f3 // udot v19.4s, v15.16b, v0.4b[3]\n" - "5:\n" - "cbz %[blocks], 6f\n" - "7:\n" - "ldr q8, [%[b_ptr0]]\n" - "subs %[blocks], %[blocks], #0x1\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - "ldr s0, [%[a_ptr0]]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - "add %[a_ptr0], %[a_ptr0], #0x4\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - "add %[b_ptr0], %[b_ptr0], #0x40\n" - ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" - ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" - ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" - ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" - "b.ne 7b\n" - "6:\n" - "cbz %[odds], 8f\n" - "ld1 {v0.b}[0], [%[a_ptr0]], #1\n" - "subs %[odds], %[odds], #0x1\n" - "b.eq 9f\n" - "ld1 {v0.b}[1], [%[a_ptr0]], #1\n" - "subs %[odds], %[odds], #0x1\n" - "b.eq 9f\n" - "ld1 {v0.b}[2], [%[a_ptr0]]\n" - "9:\n" - "ldr q8, [%[b_ptr0]]\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" - ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" - ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" - ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" - "8:\n" - "str q16, [%[c_ptr0]]\n" - "str q17, [%[c_ptr0], #0x10]\n" - "str q18, [%[c_ptr0], #0x20]\n" - "str q19, [%[c_ptr0], #0x30]\n" - "add %[c_ptr0], %[c_ptr0], #0x40\n" - ".unreq temploadreg0\n" - ".unreq temploadreg1\n" - ".unreq temploadreg2\n" - ".unreq temploadreg3\n" - : [a_ptr0] "+r" (a_ptr0), [b_ptr0] "+r" (b_ptr0), [c_ptr0] "+r" (c_ptr0), [loops] "+r" (loops), [regs] "+r" (regs), [blocks] "+r" (blocks), [odds] "+r" (odds) - : [betaptr] "r" (betaptr), [width] "r" (width), [beta0] "r" (beta0), [lda] "r" (ldab), [ldc] "r" (ldcb) - : "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x0", "x1", "x2", "x3", "cc", "memory" + "temploadreg0 .req X0\n" + "temploadreg1 .req X1\n" + "temploadreg2 .req X2\n" + "temploadreg3 .req X3\n" + "cbz %[beta0], 1f\n" + "movi v16.4s, #0\n" + "ldr q0, [%[a_ptr0]]\n" + "movi v17.4s, #0\n" + "ldr q8, [%[b_ptr0]]\n" + "movi v18.4s, #0\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + "movi v19.4s, #0\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + "add %[a_ptr0], %[a_ptr0], #0x10\n" + "ldr q12, [%[b_ptr0], #0x40]\n" + "ldr q13, [%[b_ptr0], #0x50]\n" + "ldr d14, [%[b_ptr0], #0x60]\n" + "ldr temploadreg2, [%[b_ptr0], #0x68]\n" + "add %[b_ptr0], %[b_ptr0], #0x80\n" + "cbz %[loops], 2f\n" + "b 3f\n" + "1:\n" + "ld1r {v15.4s}, [%[betaptr]]\n" + "ldr q16, [%[c_ptr0]]\n" + "ldr q17, [%[c_ptr0], #0x10]\n" + "ldr q18, [%[c_ptr0], #0x20]\n" + "ldr q19, [%[c_ptr0], #0x30]\n" + "mul v16.4s, v16.4s, v15.4s\n" + "ldr q0, [%[a_ptr0]]\n" + "mul v17.4s, v17.4s, v15.4s\n" + "ldr q8, [%[b_ptr0]]\n" + "mul v18.4s, v18.4s, v15.4s\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + "mul v19.4s, v19.4s, v15.4s\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + "add %[a_ptr0], %[a_ptr0], #0x10\n" + "ldr q12, [%[b_ptr0], #0x40]\n" + "ldr q13, [%[b_ptr0], #0x50]\n" + "ldr d14, [%[b_ptr0], #0x60]\n" + "ldr temploadreg2, [%[b_ptr0], #0x68]\n" + "add %[b_ptr0], %[b_ptr0], #0x80\n" + "cbz %[loops], 2f\n" + "3:\n" + ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" + "ins v14.d[1], temploadreg2\n" + ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" + "ldr d15, [%[b_ptr0], #-0x10]\n" + ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" + "ldr temploadreg3, [%[b_ptr0], #-0x8]\n" + ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" + "ldr d4, [%[a_ptr0]]\n" + ".word 0x6fa0e190 // udot v16.4s, v12.16b, v0.4b[1]\n" + "ldr temploadreg0, [%[a_ptr0], #0x8]\n" + ".word 0x6fa0e1b1 // udot v17.4s, v13.16b, v0.4b[1]\n" + "ldr d8, [%[b_ptr0]]\n" + ".word 0x6fa0e1d2 // udot v18.4s, v14.16b, v0.4b[1]\n" + "ldr d9, [%[b_ptr0], #0x10]\n" + "ldr temploadreg1, [%[b_ptr0], #0x18]\n" + "subs %[loops], %[loops], #0x1\n" + "ins v4.d[1], temploadreg0\n" + "prfm PLDL1KEEP, [%[a_ptr0], #0x40]\n" + "ldr temploadreg0, [%[b_ptr0], #0x8]\n" + "add %[a_ptr0], %[a_ptr0], #0x20\n" + "ldr d10, [%[b_ptr0], #0x20]\n" + "ldr temploadreg2, [%[b_ptr0], #0x28]\n" + "ldr d11, [%[b_ptr0], #0x30]\n" + "ins v15.d[1], temploadreg3\n" + "ldr temploadreg3, [%[b_ptr0], #0x38]\n" + "ldr d12, [%[b_ptr0], #0x40]\n" + "ins v8.d[1], temploadreg0\n" + ".word 0x6fa0e1f3 // udot v19.4s, v15.16b, v0.4b[1]\n" + "ldr temploadreg0, [%[b_ptr0], #0x48]\n" + "ldr d13, [%[b_ptr0], #0x50]\n" + "ins v9.d[1], temploadreg1\n" + ".word 0x6f80e910 // udot v16.4s, v8.16b, v0.4b[2]\n" + "ldr temploadreg1, [%[b_ptr0], #0x58]\n" + "ldr d14, [%[b_ptr0], #0x60]\n" + "ins v10.d[1], temploadreg2\n" + ".word 0x6f80e931 // udot v17.4s, v9.16b, v0.4b[2]\n" + "ldr temploadreg2, [%[b_ptr0], #0x68]\n" + "ldr d15, [%[b_ptr0], #0x70]\n" + "ins v11.d[1], temploadreg3\n" + ".word 0x6f80e952 // udot v18.4s, v10.16b, v0.4b[2]\n" + "ldr temploadreg3, [%[b_ptr0], #0x78]\n" + "ins v12.d[1], temploadreg0\n" + "add %[b_ptr0], %[b_ptr0], #0x100\n" + ".word 0x6f80e973 // udot v19.4s, v11.16b, v0.4b[2]\n" + "ldr d8, [%[b_ptr0], #-0x80]\n" + "ldr temploadreg0, [%[b_ptr0], #-0x78]\n" + ".word 0x6fa0e990 // udot v16.4s, v12.16b, v0.4b[3]\n" + "ldr d9, [%[b_ptr0], #-0x70]\n" + "ins v13.d[1], temploadreg1\n" + "ldr temploadreg1, [%[b_ptr0], #-0x68]\n" + "ldr d10, [%[b_ptr0], #-0x60]\n" + "ins v14.d[1], temploadreg2\n" + ".word 0x6fa0e9b1 // udot v17.4s, v13.16b, v0.4b[3]\n" + "ldr temploadreg2, [%[b_ptr0], #-0x58]\n" + "ldr d11, [%[b_ptr0], #-0x50]\n" + "ins v15.d[1], temploadreg3\n" + ".word 0x6fa0e9d2 // udot v18.4s, v14.16b, v0.4b[3]\n" + "ldr temploadreg3, [%[b_ptr0], #-0x48]\n" + "ldr d12, [%[b_ptr0], #-0x40]\n" + "ins v8.d[1], temploadreg0\n" + ".word 0x6fa0e9f3 // udot v19.4s, v15.16b, v0.4b[3]\n" + "ldr temploadreg0, [%[b_ptr0], #-0x38]\n" + "ldr d13, [%[b_ptr0], #-0x30]\n" + "ins v9.d[1], temploadreg1\n" + ".word 0x6f84e110 // udot v16.4s, v8.16b, v4.4b[0]\n" + "ldr temploadreg1, [%[b_ptr0], #-0x28]\n" + "ldr d14, [%[b_ptr0], #-0x20]\n" + "ins v10.d[1], temploadreg2\n" + ".word 0x6f84e131 // udot v17.4s, v9.16b, v4.4b[0]\n" + "ldr temploadreg2, [%[b_ptr0], #-0x18]\n" + "ldr d15, [%[b_ptr0], #-0x10]\n" + "ins v11.d[1], temploadreg3\n" + ".word 0x6f84e152 // udot v18.4s, v10.16b, v4.4b[0]\n" + "ldr temploadreg3, [%[b_ptr0], #-0x8]\n" + "ldr d0, [%[a_ptr0], #-0x10]\n" + "ins v12.d[1], temploadreg0\n" + ".word 0x6f84e173 // udot v19.4s, v11.16b, v4.4b[0]\n" + "ldr temploadreg0, [%[a_ptr0], #-0x8]\n" + "ldr d8, [%[b_ptr0]]\n" + "ldr d9, [%[b_ptr0], #0x10]\n" + ".word 0x6fa4e190 // udot v16.4s, v12.16b, v4.4b[1]\n" + "ins v0.d[1], temploadreg0\n" + "ldr temploadreg0, [%[b_ptr0], #0x8]\n" + "ins v13.d[1], temploadreg1\n" + "ldr temploadreg1, [%[b_ptr0], #0x18]\n" + "ldr d10, [%[b_ptr0], #0x20]\n" + "ins v14.d[1], temploadreg2\n" + ".word 0x6fa4e1b1 // udot v17.4s, v13.16b, v4.4b[1]\n" + "ldr temploadreg2, [%[b_ptr0], #0x28]\n" + "ldr d11, [%[b_ptr0], #0x30]\n" + "ins v15.d[1], temploadreg3\n" + ".word 0x6fa4e1d2 // udot v18.4s, v14.16b, v4.4b[1]\n" + "ldr temploadreg3, [%[b_ptr0], #0x38]\n" + "ldr d12, [%[b_ptr0], #0x40]\n" + "ins v8.d[1], temploadreg0\n" + ".word 0x6fa4e1f3 // udot v19.4s, v15.16b, v4.4b[1]\n" + "ldr temploadreg0, [%[b_ptr0], #0x48]\n" + "ldr d13, [%[b_ptr0], #0x50]\n" + "ins v9.d[1], temploadreg1\n" + ".word 0x6f84e910 // udot v16.4s, v8.16b, v4.4b[2]\n" + "ldr temploadreg1, [%[b_ptr0], #0x58]\n" + "ldr d14, [%[b_ptr0], #0x60]\n" + "ins v10.d[1], temploadreg2\n" + ".word 0x6f84e931 // udot v17.4s, v9.16b, v4.4b[2]\n" + "ldr temploadreg2, [%[b_ptr0], #0x68]\n" + "ldr d15, [%[b_ptr0], #0x70]\n" + "ins v11.d[1], temploadreg3\n" + ".word 0x6f84e952 // udot v18.4s, v10.16b, v4.4b[2]\n" + "ldr temploadreg3, [%[b_ptr0], #0x78]\n" + "ins v12.d[1], temploadreg0\n" + "add %[b_ptr0], %[b_ptr0], #0x100\n" + ".word 0x6f84e973 // udot v19.4s, v11.16b, v4.4b[2]\n" + "ldr d8, [%[b_ptr0], #-0x80]\n" + "ldr temploadreg0, [%[b_ptr0], #-0x78]\n" + ".word 0x6fa4e990 // udot v16.4s, v12.16b, v4.4b[3]\n" + "ldr d9, [%[b_ptr0], #-0x70]\n" + "ins v13.d[1], temploadreg1\n" + "ldr temploadreg1, [%[b_ptr0], #-0x68]\n" + "ldr d10, [%[b_ptr0], #-0x60]\n" + "ins v14.d[1], temploadreg2\n" + ".word 0x6fa4e9b1 // udot v17.4s, v13.16b, v4.4b[3]\n" + "ldr temploadreg2, [%[b_ptr0], #-0x58]\n" + "ldr d11, [%[b_ptr0], #-0x50]\n" + "ins v15.d[1], temploadreg3\n" + ".word 0x6fa4e9d2 // udot v18.4s, v14.16b, v4.4b[3]\n" + "ldr temploadreg3, [%[b_ptr0], #-0x48]\n" + "ldr d12, [%[b_ptr0], #-0x40]\n" + "ins v8.d[1], temploadreg0\n" + ".word 0x6fa4e9f3 // udot v19.4s, v15.16b, v4.4b[3]\n" + "ldr temploadreg0, [%[b_ptr0], #-0x38]\n" + "ldr d13, [%[b_ptr0], #-0x30]\n" + "ins v9.d[1], temploadreg1\n" + "ldr temploadreg1, [%[b_ptr0], #-0x28]\n" + "ldr d14, [%[b_ptr0], #-0x20]\n" + "ins v10.d[1], temploadreg2\n" + "ldr temploadreg2, [%[b_ptr0], #-0x18]\n" + "ins v11.d[1], temploadreg3\n" + "ins v12.d[1], temploadreg0\n" + "ins v13.d[1], temploadreg1\n" + "b.ne 3b\n" + "2:\n" + "ins v14.d[1], temploadreg2\n" + "prfm PSTL1KEEP, [%[c_ptr0]]\n" + "ldr d15, [%[b_ptr0], #-0x10]\n" + "ldr temploadreg3, [%[b_ptr0], #-0x8]\n" + "ins v15.d[1], temploadreg3\n" + "cbz %[regs], 4f\n" + ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" + "ldr d4, [%[a_ptr0]]\n" + ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" + "ldr temploadreg0, [%[a_ptr0], #0x8]\n" + ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" + "ldr d8, [%[b_ptr0]]\n" + ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" + "ldr d9, [%[b_ptr0], #0x10]\n" + ".word 0x6fa0e190 // udot v16.4s, v12.16b, v0.4b[1]\n" + "ins v4.d[1], temploadreg0\n" + ".word 0x6fa0e1b1 // udot v17.4s, v13.16b, v0.4b[1]\n" + "ldr temploadreg0, [%[b_ptr0], #0x8]\n" + ".word 0x6fa0e1d2 // udot v18.4s, v14.16b, v0.4b[1]\n" + "ldr temploadreg1, [%[b_ptr0], #0x18]\n" + ".word 0x6fa0e1f3 // udot v19.4s, v15.16b, v0.4b[1]\n" + "ldr d10, [%[b_ptr0], #0x20]\n" + "ldr temploadreg2, [%[b_ptr0], #0x28]\n" + "add %[a_ptr0], %[a_ptr0], #0x10\n" + "ldr d11, [%[b_ptr0], #0x30]\n" + "ldr temploadreg3, [%[b_ptr0], #0x38]\n" + "ldr d12, [%[b_ptr0], #0x40]\n" + "ins v8.d[1], temploadreg0\n" + "ldr temploadreg0, [%[b_ptr0], #0x48]\n" + "ldr d13, [%[b_ptr0], #0x50]\n" + "ins v9.d[1], temploadreg1\n" + ".word 0x6f80e910 // udot v16.4s, v8.16b, v0.4b[2]\n" + "ldr temploadreg1, [%[b_ptr0], #0x58]\n" + "ldr d14, [%[b_ptr0], #0x60]\n" + "ins v10.d[1], temploadreg2\n" + ".word 0x6f80e931 // udot v17.4s, v9.16b, v0.4b[2]\n" + "ldr temploadreg2, [%[b_ptr0], #0x68]\n" + "ldr d15, [%[b_ptr0], #0x70]\n" + "ins v11.d[1], temploadreg3\n" + ".word 0x6f80e952 // udot v18.4s, v10.16b, v0.4b[2]\n" + "ldr temploadreg3, [%[b_ptr0], #0x78]\n" + "ins v12.d[1], temploadreg0\n" + "add %[b_ptr0], %[b_ptr0], #0x100\n" + ".word 0x6f80e973 // udot v19.4s, v11.16b, v0.4b[2]\n" + "ldr d8, [%[b_ptr0], #-0x80]\n" + "ldr temploadreg0, [%[b_ptr0], #-0x78]\n" + ".word 0x6fa0e990 // udot v16.4s, v12.16b, v0.4b[3]\n" + "ldr d9, [%[b_ptr0], #-0x70]\n" + "ins v13.d[1], temploadreg1\n" + "ldr temploadreg1, [%[b_ptr0], #-0x68]\n" + "ldr d10, [%[b_ptr0], #-0x60]\n" + "ins v14.d[1], temploadreg2\n" + ".word 0x6fa0e9b1 // udot v17.4s, v13.16b, v0.4b[3]\n" + "ldr temploadreg2, [%[b_ptr0], #-0x58]\n" + "ldr d11, [%[b_ptr0], #-0x50]\n" + "ins v15.d[1], temploadreg3\n" + ".word 0x6fa0e9d2 // udot v18.4s, v14.16b, v0.4b[3]\n" + "ldr temploadreg3, [%[b_ptr0], #-0x48]\n" + "ldr d12, [%[b_ptr0], #-0x40]\n" + "ins v8.d[1], temploadreg0\n" + ".word 0x6fa0e9f3 // udot v19.4s, v15.16b, v0.4b[3]\n" + "ldr temploadreg0, [%[b_ptr0], #-0x38]\n" + "ldr d13, [%[b_ptr0], #-0x30]\n" + "ins v9.d[1], temploadreg1\n" + ".word 0x6f84e110 // udot v16.4s, v8.16b, v4.4b[0]\n" + "ldr temploadreg1, [%[b_ptr0], #-0x28]\n" + "ldr d14, [%[b_ptr0], #-0x20]\n" + "ins v10.d[1], temploadreg2\n" + ".word 0x6f84e131 // udot v17.4s, v9.16b, v4.4b[0]\n" + "ldr temploadreg2, [%[b_ptr0], #-0x18]\n" + "ldr d15, [%[b_ptr0], #-0x10]\n" + "ins v11.d[1], temploadreg3\n" + ".word 0x6f84e152 // udot v18.4s, v10.16b, v4.4b[0]\n" + "ldr temploadreg3, [%[b_ptr0], #-0x8]\n" + "ldr d8, [%[b_ptr0]]\n" + "ins v12.d[1], temploadreg0\n" + ".word 0x6f84e173 // udot v19.4s, v11.16b, v4.4b[0]\n" + "ldr temploadreg0, [%[b_ptr0], #0x8]\n" + "ldr d9, [%[b_ptr0], #0x10]\n" + "ins v13.d[1], temploadreg1\n" + ".word 0x6fa4e190 // udot v16.4s, v12.16b, v4.4b[1]\n" + "ldr temploadreg1, [%[b_ptr0], #0x18]\n" + "ldr d10, [%[b_ptr0], #0x20]\n" + "ins v14.d[1], temploadreg2\n" + ".word 0x6fa4e1b1 // udot v17.4s, v13.16b, v4.4b[1]\n" + "ldr temploadreg2, [%[b_ptr0], #0x28]\n" + "ldr d11, [%[b_ptr0], #0x30]\n" + "ins v15.d[1], temploadreg3\n" + ".word 0x6fa4e1d2 // udot v18.4s, v14.16b, v4.4b[1]\n" + "ldr temploadreg3, [%[b_ptr0], #0x38]\n" + "ldr d12, [%[b_ptr0], #0x40]\n" + "ins v8.d[1], temploadreg0\n" + ".word 0x6fa4e1f3 // udot v19.4s, v15.16b, v4.4b[1]\n" + "ldr temploadreg0, [%[b_ptr0], #0x48]\n" + "ldr d13, [%[b_ptr0], #0x50]\n" + "ins v9.d[1], temploadreg1\n" + ".word 0x6f84e910 // udot v16.4s, v8.16b, v4.4b[2]\n" + "ldr temploadreg1, [%[b_ptr0], #0x58]\n" + "ldr d14, [%[b_ptr0], #0x60]\n" + "ins v10.d[1], temploadreg2\n" + ".word 0x6f84e931 // udot v17.4s, v9.16b, v4.4b[2]\n" + "ldr temploadreg2, [%[b_ptr0], #0x68]\n" + "ldr d15, [%[b_ptr0], #0x70]\n" + "ins v11.d[1], temploadreg3\n" + ".word 0x6f84e952 // udot v18.4s, v10.16b, v4.4b[2]\n" + "ldr temploadreg3, [%[b_ptr0], #0x78]\n" + "ins v12.d[1], temploadreg0\n" + "add %[b_ptr0], %[b_ptr0], #0x80\n" + ".word 0x6f84e973 // udot v19.4s, v11.16b, v4.4b[2]\n" + "ins v13.d[1], temploadreg1\n" + "ins v14.d[1], temploadreg2\n" + ".word 0x6fa4e990 // udot v16.4s, v12.16b, v4.4b[3]\n" + "ins v15.d[1], temploadreg3\n" + ".word 0x6fa4e9b1 // udot v17.4s, v13.16b, v4.4b[3]\n" + ".word 0x6fa4e9d2 // udot v18.4s, v14.16b, v4.4b[3]\n" + ".word 0x6fa4e9f3 // udot v19.4s, v15.16b, v4.4b[3]\n" + "b 5f\n" + "4:\n" + ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" + "ldr d8, [%[b_ptr0]]\n" + ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" + "ldr temploadreg0, [%[b_ptr0], #0x8]\n" + ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" + "ldr d9, [%[b_ptr0], #0x10]\n" + ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" + "ldr temploadreg1, [%[b_ptr0], #0x18]\n" + ".word 0x6fa0e190 // udot v16.4s, v12.16b, v0.4b[1]\n" + "ldr d10, [%[b_ptr0], #0x20]\n" + ".word 0x6fa0e1b1 // udot v17.4s, v13.16b, v0.4b[1]\n" + "ldr temploadreg2, [%[b_ptr0], #0x28]\n" + ".word 0x6fa0e1d2 // udot v18.4s, v14.16b, v0.4b[1]\n" + "ldr d11, [%[b_ptr0], #0x30]\n" + ".word 0x6fa0e1f3 // udot v19.4s, v15.16b, v0.4b[1]\n" + "ldr temploadreg3, [%[b_ptr0], #0x38]\n" + "ldr d12, [%[b_ptr0], #0x40]\n" + "ins v8.d[1], temploadreg0\n" + "ldr temploadreg0, [%[b_ptr0], #0x48]\n" + "ldr d13, [%[b_ptr0], #0x50]\n" + "ins v9.d[1], temploadreg1\n" + ".word 0x6f80e910 // udot v16.4s, v8.16b, v0.4b[2]\n" + "ldr temploadreg1, [%[b_ptr0], #0x58]\n" + "ldr d14, [%[b_ptr0], #0x60]\n" + "ins v10.d[1], temploadreg2\n" + ".word 0x6f80e931 // udot v17.4s, v9.16b, v0.4b[2]\n" + "ldr temploadreg2, [%[b_ptr0], #0x68]\n" + "ldr d15, [%[b_ptr0], #0x70]\n" + "ins v11.d[1], temploadreg3\n" + ".word 0x6f80e952 // udot v18.4s, v10.16b, v0.4b[2]\n" + "ldr temploadreg3, [%[b_ptr0], #0x78]\n" + "ins v12.d[1], temploadreg0\n" + "add %[b_ptr0], %[b_ptr0], #0x80\n" + ".word 0x6f80e973 // udot v19.4s, v11.16b, v0.4b[2]\n" + "ins v13.d[1], temploadreg1\n" + "ins v14.d[1], temploadreg2\n" + ".word 0x6fa0e990 // udot v16.4s, v12.16b, v0.4b[3]\n" + "ins v15.d[1], temploadreg3\n" + ".word 0x6fa0e9b1 // udot v17.4s, v13.16b, v0.4b[3]\n" + ".word 0x6fa0e9d2 // udot v18.4s, v14.16b, v0.4b[3]\n" + ".word 0x6fa0e9f3 // udot v19.4s, v15.16b, v0.4b[3]\n" + "5:\n" + "cbz %[blocks], 6f\n" + "7:\n" + "ldr q8, [%[b_ptr0]]\n" + "subs %[blocks], %[blocks], #0x1\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + "ldr s0, [%[a_ptr0]]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + "add %[a_ptr0], %[a_ptr0], #0x4\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + "add %[b_ptr0], %[b_ptr0], #0x40\n" + ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" + ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" + ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" + ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" + "b.ne 7b\n" + "6:\n" + "cbz %[odds], 8f\n" + "ld1 {v0.b}[0], [%[a_ptr0]], #1\n" + "subs %[odds], %[odds], #0x1\n" + "b.eq 9f\n" + "ld1 {v0.b}[1], [%[a_ptr0]], #1\n" + "subs %[odds], %[odds], #0x1\n" + "b.eq 9f\n" + "ld1 {v0.b}[2], [%[a_ptr0]]\n" + "9:\n" + "ldr q8, [%[b_ptr0]]\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" + ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" + ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" + ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" + "8:\n" + "str q16, [%[c_ptr0]]\n" + "str q17, [%[c_ptr0], #0x10]\n" + "str q18, [%[c_ptr0], #0x20]\n" + "str q19, [%[c_ptr0], #0x30]\n" + "add %[c_ptr0], %[c_ptr0], #0x40\n" + ".unreq temploadreg0\n" + ".unreq temploadreg1\n" + ".unreq temploadreg2\n" + ".unreq temploadreg3\n" + : [a_ptr0] "+r" (a_ptr0), [b_ptr0] "+r" (b_ptr0), [c_ptr0] "+r" (c_ptr0), [loops] "+r" (loops), [regs] "+r" (regs), [blocks] "+r" (blocks), [odds] "+r" (odds) + : [betaptr] "r" (betaptr), [width] "r" (width), [beta0] "r" (beta0), [lda] "r" (ldab), [ldc] "r" (ldcb) + : "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x0", "x1", "x2", "x3", "cc", "memory" ); break; case 2: __asm __volatile ( - "a_ptr1 .req X0\n" - "c_ptr1 .req X1\n" - "temploadreg0 .req X2\n" - "temploadreg1 .req X3\n" - "temploadreg2 .req X4\n" - "temploadreg3 .req X5\n" - "add a_ptr1, %[a_ptr0], %[lda]\n" - "add c_ptr1, %[c_ptr0], %[ldc]\n" - "cbz %[beta0], 1f\n" - "movi v16.4s, #0\n" - "ldr q0, [%[a_ptr0]]\n" - "movi v17.4s, #0\n" - "ldr q1, [a_ptr1]\n" - "movi v18.4s, #0\n" - "ldr q8, [%[b_ptr0]]\n" - "movi v19.4s, #0\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - "movi v20.4s, #0\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - "movi v21.4s, #0\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - "movi v22.4s, #0\n" - "ldr q12, [%[b_ptr0], #0x40]\n" - "movi v23.4s, #0\n" - "ldr q13, [%[b_ptr0], #0x50]\n" - "ldr d14, [%[b_ptr0], #0x60]\n" - "add %[a_ptr0], %[a_ptr0], #0x10\n" - "ldr temploadreg2, [%[b_ptr0], #0x68]\n" - "add a_ptr1, a_ptr1, #0x10\n" - "add %[b_ptr0], %[b_ptr0], #0x80\n" - "cbz %[loops], 2f\n" - "b 3f\n" - "1:\n" - "ld1r {v15.4s}, [%[betaptr]]\n" - "ldr q16, [%[c_ptr0]]\n" - "ldr q17, [%[c_ptr0], #0x10]\n" - "ldr q18, [%[c_ptr0], #0x20]\n" - "ldr q19, [%[c_ptr0], #0x30]\n" - "mul v16.4s, v16.4s, v15.4s\n" - "ldr q20, [c_ptr1]\n" - "mul v17.4s, v17.4s, v15.4s\n" - "ldr q21, [c_ptr1, #0x10]\n" - "mul v18.4s, v18.4s, v15.4s\n" - "ldr q22, [c_ptr1, #0x20]\n" - "mul v19.4s, v19.4s, v15.4s\n" - "ldr q23, [c_ptr1, #0x30]\n" - "mul v20.4s, v20.4s, v15.4s\n" - "ldr q0, [%[a_ptr0]]\n" - "mul v21.4s, v21.4s, v15.4s\n" - "ldr q1, [a_ptr1]\n" - "mul v22.4s, v22.4s, v15.4s\n" - "ldr q8, [%[b_ptr0]]\n" - "mul v23.4s, v23.4s, v15.4s\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - "add %[a_ptr0], %[a_ptr0], #0x10\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - "add a_ptr1, a_ptr1, #0x10\n" - "ldr q12, [%[b_ptr0], #0x40]\n" - "ldr q13, [%[b_ptr0], #0x50]\n" - "ldr d14, [%[b_ptr0], #0x60]\n" - "ldr temploadreg2, [%[b_ptr0], #0x68]\n" - "add %[b_ptr0], %[b_ptr0], #0x80\n" - "cbz %[loops], 2f\n" - "3:\n" - ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" - "ins v14.d[1], temploadreg2\n" - ".word 0x6f81e114 // udot v20.4s, v8.16b, v1.4b[0]\n" - "ldr d15, [%[b_ptr0], #-0x10]\n" - ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" - "ldr temploadreg3, [%[b_ptr0], #-0x8]\n" - ".word 0x6f81e135 // udot v21.4s, v9.16b, v1.4b[0]\n" - "ldr d4, [%[a_ptr0]]\n" - ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" - "ldr temploadreg0, [%[a_ptr0], #0x8]\n" - ".word 0x6f81e156 // udot v22.4s, v10.16b, v1.4b[0]\n" - "ldr d5, [a_ptr1]\n" - ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" - "ldr temploadreg1, [a_ptr1, #0x8]\n" - ".word 0x6f81e177 // udot v23.4s, v11.16b, v1.4b[0]\n" - "ldr d8, [%[b_ptr0]]\n" - ".word 0x6fa0e190 // udot v16.4s, v12.16b, v0.4b[1]\n" - "ins v4.d[1], temploadreg0\n" - ".word 0x6fa1e194 // udot v20.4s, v12.16b, v1.4b[1]\n" - "ldr temploadreg0, [%[b_ptr0], #0x8]\n" - ".word 0x6fa0e1b1 // udot v17.4s, v13.16b, v0.4b[1]\n" - "ldr d9, [%[b_ptr0], #0x10]\n" - ".word 0x6fa1e1b5 // udot v21.4s, v13.16b, v1.4b[1]\n" - "ins v5.d[1], temploadreg1\n" - ".word 0x6fa0e1d2 // udot v18.4s, v14.16b, v0.4b[1]\n" - "ldr temploadreg1, [%[b_ptr0], #0x18]\n" - ".word 0x6fa1e1d6 // udot v22.4s, v14.16b, v1.4b[1]\n" - "ldr d10, [%[b_ptr0], #0x20]\n" - "ldr temploadreg2, [%[b_ptr0], #0x28]\n" - "subs %[loops], %[loops], #0x1\n" - "ldr d11, [%[b_ptr0], #0x30]\n" - "prfm PLDL1KEEP, [%[a_ptr0], #0x40]\n" - "ins v15.d[1], temploadreg3\n" - "add %[a_ptr0], %[a_ptr0], #0x20\n" - "ldr temploadreg3, [%[b_ptr0], #0x38]\n" - "add a_ptr1, a_ptr1, #0x20\n" - ".word 0x6fa0e1f3 // udot v19.4s, v15.16b, v0.4b[1]\n" - "ldr d12, [%[b_ptr0], #0x40]\n" - ".word 0x6fa1e1f7 // udot v23.4s, v15.16b, v1.4b[1]\n" - "ins v8.d[1], temploadreg0\n" - "ldr temploadreg0, [%[b_ptr0], #0x48]\n" - "prfm PLDL1KEEP, [a_ptr1, #0x40]\n" - "ldr d13, [%[b_ptr0], #0x50]\n" - ".word 0x6f80e910 // udot v16.4s, v8.16b, v0.4b[2]\n" - "ins v9.d[1], temploadreg1\n" - ".word 0x6f81e914 // udot v20.4s, v8.16b, v1.4b[2]\n" - "ldr temploadreg1, [%[b_ptr0], #0x58]\n" - "ldr d14, [%[b_ptr0], #0x60]\n" - "ins v10.d[1], temploadreg2\n" - ".word 0x6f80e931 // udot v17.4s, v9.16b, v0.4b[2]\n" - "ldr temploadreg2, [%[b_ptr0], #0x68]\n" - ".word 0x6f81e935 // udot v21.4s, v9.16b, v1.4b[2]\n" - "ldr d15, [%[b_ptr0], #0x70]\n" - "ins v11.d[1], temploadreg3\n" - ".word 0x6f80e952 // udot v18.4s, v10.16b, v0.4b[2]\n" - "ldr temploadreg3, [%[b_ptr0], #0x78]\n" - ".word 0x6f81e956 // udot v22.4s, v10.16b, v1.4b[2]\n" - "ins v12.d[1], temploadreg0\n" - "ins v13.d[1], temploadreg1\n" - "add %[b_ptr0], %[b_ptr0], #0x100\n" - ".word 0x6f80e973 // udot v19.4s, v11.16b, v0.4b[2]\n" - "ldr d8, [%[b_ptr0], #-0x80]\n" - ".word 0x6f81e977 // udot v23.4s, v11.16b, v1.4b[2]\n" - "ldr temploadreg0, [%[b_ptr0], #-0x78]\n" - ".word 0x6fa0e990 // udot v16.4s, v12.16b, v0.4b[3]\n" - "ldr d9, [%[b_ptr0], #-0x70]\n" - ".word 0x6fa1e994 // udot v20.4s, v12.16b, v1.4b[3]\n" - "ldr temploadreg1, [%[b_ptr0], #-0x68]\n" - ".word 0x6fa0e9b1 // udot v17.4s, v13.16b, v0.4b[3]\n" - "ldr d10, [%[b_ptr0], #-0x60]\n" - ".word 0x6fa1e9b5 // udot v21.4s, v13.16b, v1.4b[3]\n" - "ins v14.d[1], temploadreg2\n" - "ldr temploadreg2, [%[b_ptr0], #-0x58]\n" - "ldr d11, [%[b_ptr0], #-0x50]\n" - "ins v15.d[1], temploadreg3\n" - ".word 0x6fa0e9d2 // udot v18.4s, v14.16b, v0.4b[3]\n" - "ldr temploadreg3, [%[b_ptr0], #-0x48]\n" - ".word 0x6fa1e9d6 // udot v22.4s, v14.16b, v1.4b[3]\n" - "ldr d12, [%[b_ptr0], #-0x40]\n" - "ins v8.d[1], temploadreg0\n" - ".word 0x6fa0e9f3 // udot v19.4s, v15.16b, v0.4b[3]\n" - "ldr temploadreg0, [%[b_ptr0], #-0x38]\n" - ".word 0x6fa1e9f7 // udot v23.4s, v15.16b, v1.4b[3]\n" - "ldr d13, [%[b_ptr0], #-0x30]\n" - "ins v9.d[1], temploadreg1\n" - ".word 0x6f84e110 // udot v16.4s, v8.16b, v4.4b[0]\n" - "ldr temploadreg1, [%[b_ptr0], #-0x28]\n" - ".word 0x6f85e114 // udot v20.4s, v8.16b, v5.4b[0]\n" - "ldr d14, [%[b_ptr0], #-0x20]\n" - "ins v10.d[1], temploadreg2\n" - ".word 0x6f84e131 // udot v17.4s, v9.16b, v4.4b[0]\n" - "ldr temploadreg2, [%[b_ptr0], #-0x18]\n" - ".word 0x6f85e135 // udot v21.4s, v9.16b, v5.4b[0]\n" - "ldr d15, [%[b_ptr0], #-0x10]\n" - "ins v11.d[1], temploadreg3\n" - ".word 0x6f84e152 // udot v18.4s, v10.16b, v4.4b[0]\n" - "ldr temploadreg3, [%[b_ptr0], #-0x8]\n" - ".word 0x6f85e156 // udot v22.4s, v10.16b, v5.4b[0]\n" - "ldr d0, [%[a_ptr0], #-0x10]\n" - "ins v12.d[1], temploadreg0\n" - ".word 0x6f84e173 // udot v19.4s, v11.16b, v4.4b[0]\n" - "ldr temploadreg0, [%[a_ptr0], #-0x8]\n" - ".word 0x6f85e177 // udot v23.4s, v11.16b, v5.4b[0]\n" - "ldr d1, [a_ptr1, #-0x10]\n" - "ins v13.d[1], temploadreg1\n" - ".word 0x6fa4e190 // udot v16.4s, v12.16b, v4.4b[1]\n" - "ldr temploadreg1, [a_ptr1, #-0x8]\n" - ".word 0x6fa5e194 // udot v20.4s, v12.16b, v5.4b[1]\n" - "ldr d8, [%[b_ptr0]]\n" - "ins v0.d[1], temploadreg0\n" - ".word 0x6fa4e1b1 // udot v17.4s, v13.16b, v4.4b[1]\n" - "ldr temploadreg0, [%[b_ptr0], #0x8]\n" - ".word 0x6fa5e1b5 // udot v21.4s, v13.16b, v5.4b[1]\n" - "ldr d9, [%[b_ptr0], #0x10]\n" - "ins v1.d[1], temploadreg1\n" - "ldr temploadreg1, [%[b_ptr0], #0x18]\n" - "ldr d10, [%[b_ptr0], #0x20]\n" - "ins v14.d[1], temploadreg2\n" - "ldr temploadreg2, [%[b_ptr0], #0x28]\n" - "ldr d11, [%[b_ptr0], #0x30]\n" - "ins v15.d[1], temploadreg3\n" - ".word 0x6fa4e1d2 // udot v18.4s, v14.16b, v4.4b[1]\n" - "ldr temploadreg3, [%[b_ptr0], #0x38]\n" - ".word 0x6fa5e1d6 // udot v22.4s, v14.16b, v5.4b[1]\n" - "ldr d12, [%[b_ptr0], #0x40]\n" - "ins v8.d[1], temploadreg0\n" - ".word 0x6fa4e1f3 // udot v19.4s, v15.16b, v4.4b[1]\n" - "ldr temploadreg0, [%[b_ptr0], #0x48]\n" - ".word 0x6fa5e1f7 // udot v23.4s, v15.16b, v5.4b[1]\n" - "ldr d13, [%[b_ptr0], #0x50]\n" - "ins v9.d[1], temploadreg1\n" - ".word 0x6f84e910 // udot v16.4s, v8.16b, v4.4b[2]\n" - "ldr temploadreg1, [%[b_ptr0], #0x58]\n" - ".word 0x6f85e914 // udot v20.4s, v8.16b, v5.4b[2]\n" - "ldr d14, [%[b_ptr0], #0x60]\n" - "ins v10.d[1], temploadreg2\n" - ".word 0x6f84e931 // udot v17.4s, v9.16b, v4.4b[2]\n" - "ldr temploadreg2, [%[b_ptr0], #0x68]\n" - ".word 0x6f85e935 // udot v21.4s, v9.16b, v5.4b[2]\n" - "ldr d15, [%[b_ptr0], #0x70]\n" - "ins v11.d[1], temploadreg3\n" - ".word 0x6f84e952 // udot v18.4s, v10.16b, v4.4b[2]\n" - "ldr temploadreg3, [%[b_ptr0], #0x78]\n" - ".word 0x6f85e956 // udot v22.4s, v10.16b, v5.4b[2]\n" - "ins v12.d[1], temploadreg0\n" - "ins v13.d[1], temploadreg1\n" - "add %[b_ptr0], %[b_ptr0], #0x100\n" - ".word 0x6f84e973 // udot v19.4s, v11.16b, v4.4b[2]\n" - "ldr d8, [%[b_ptr0], #-0x80]\n" - ".word 0x6f85e977 // udot v23.4s, v11.16b, v5.4b[2]\n" - "ldr temploadreg0, [%[b_ptr0], #-0x78]\n" - ".word 0x6fa4e990 // udot v16.4s, v12.16b, v4.4b[3]\n" - "ldr d9, [%[b_ptr0], #-0x70]\n" - ".word 0x6fa5e994 // udot v20.4s, v12.16b, v5.4b[3]\n" - "ldr temploadreg1, [%[b_ptr0], #-0x68]\n" - ".word 0x6fa4e9b1 // udot v17.4s, v13.16b, v4.4b[3]\n" - "ldr d10, [%[b_ptr0], #-0x60]\n" - ".word 0x6fa5e9b5 // udot v21.4s, v13.16b, v5.4b[3]\n" - "ins v14.d[1], temploadreg2\n" - "ldr temploadreg2, [%[b_ptr0], #-0x58]\n" - "ldr d11, [%[b_ptr0], #-0x50]\n" - "ins v15.d[1], temploadreg3\n" - ".word 0x6fa4e9d2 // udot v18.4s, v14.16b, v4.4b[3]\n" - "ldr temploadreg3, [%[b_ptr0], #-0x48]\n" - ".word 0x6fa5e9d6 // udot v22.4s, v14.16b, v5.4b[3]\n" - "ldr d12, [%[b_ptr0], #-0x40]\n" - "ins v8.d[1], temploadreg0\n" - ".word 0x6fa4e9f3 // udot v19.4s, v15.16b, v4.4b[3]\n" - "ldr temploadreg0, [%[b_ptr0], #-0x38]\n" - ".word 0x6fa5e9f7 // udot v23.4s, v15.16b, v5.4b[3]\n" - "ldr d13, [%[b_ptr0], #-0x30]\n" - "ins v9.d[1], temploadreg1\n" - "ldr temploadreg1, [%[b_ptr0], #-0x28]\n" - "ldr d14, [%[b_ptr0], #-0x20]\n" - "ins v10.d[1], temploadreg2\n" - "ldr temploadreg2, [%[b_ptr0], #-0x18]\n" - "ins v11.d[1], temploadreg3\n" - "ins v12.d[1], temploadreg0\n" - "ins v13.d[1], temploadreg1\n" - "b.ne 3b\n" - "2:\n" - "ins v14.d[1], temploadreg2\n" - "prfm PSTL1KEEP, [%[c_ptr0]]\n" - "ldr d15, [%[b_ptr0], #-0x10]\n" - "prfm PSTL1KEEP, [c_ptr1]\n" - "ldr temploadreg3, [%[b_ptr0], #-0x8]\n" - "ins v15.d[1], temploadreg3\n" - "cbz %[regs], 4f\n" - ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" - "ldr d4, [%[a_ptr0]]\n" - ".word 0x6f81e114 // udot v20.4s, v8.16b, v1.4b[0]\n" - "ldr temploadreg0, [%[a_ptr0], #0x8]\n" - ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" - "ldr d5, [a_ptr1]\n" - ".word 0x6f81e135 // udot v21.4s, v9.16b, v1.4b[0]\n" - "ldr temploadreg1, [a_ptr1, #0x8]\n" - ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" - "ldr d8, [%[b_ptr0]]\n" - ".word 0x6f81e156 // udot v22.4s, v10.16b, v1.4b[0]\n" - "ins v4.d[1], temploadreg0\n" - ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" - "ldr temploadreg0, [%[b_ptr0], #0x8]\n" - ".word 0x6f81e177 // udot v23.4s, v11.16b, v1.4b[0]\n" - "ldr d9, [%[b_ptr0], #0x10]\n" - ".word 0x6fa0e190 // udot v16.4s, v12.16b, v0.4b[1]\n" - "ins v5.d[1], temploadreg1\n" - ".word 0x6fa1e194 // udot v20.4s, v12.16b, v1.4b[1]\n" - "ldr temploadreg1, [%[b_ptr0], #0x18]\n" - ".word 0x6fa0e1b1 // udot v17.4s, v13.16b, v0.4b[1]\n" - "ldr d10, [%[b_ptr0], #0x20]\n" - ".word 0x6fa1e1b5 // udot v21.4s, v13.16b, v1.4b[1]\n" - "ldr temploadreg2, [%[b_ptr0], #0x28]\n" - ".word 0x6fa0e1d2 // udot v18.4s, v14.16b, v0.4b[1]\n" - "ldr d11, [%[b_ptr0], #0x30]\n" - ".word 0x6fa1e1d6 // udot v22.4s, v14.16b, v1.4b[1]\n" - "ldr temploadreg3, [%[b_ptr0], #0x38]\n" - ".word 0x6fa0e1f3 // udot v19.4s, v15.16b, v0.4b[1]\n" - "ldr d12, [%[b_ptr0], #0x40]\n" - ".word 0x6fa1e1f7 // udot v23.4s, v15.16b, v1.4b[1]\n" - "ins v8.d[1], temploadreg0\n" - "ldr temploadreg0, [%[b_ptr0], #0x48]\n" - "add %[a_ptr0], %[a_ptr0], #0x10\n" - "ldr d13, [%[b_ptr0], #0x50]\n" - "add a_ptr1, a_ptr1, #0x10\n" - ".word 0x6f80e910 // udot v16.4s, v8.16b, v0.4b[2]\n" - "ins v9.d[1], temploadreg1\n" - ".word 0x6f81e914 // udot v20.4s, v8.16b, v1.4b[2]\n" - "ldr temploadreg1, [%[b_ptr0], #0x58]\n" - "ldr d14, [%[b_ptr0], #0x60]\n" - "ins v10.d[1], temploadreg2\n" - ".word 0x6f80e931 // udot v17.4s, v9.16b, v0.4b[2]\n" - "ldr temploadreg2, [%[b_ptr0], #0x68]\n" - ".word 0x6f81e935 // udot v21.4s, v9.16b, v1.4b[2]\n" - "ldr d15, [%[b_ptr0], #0x70]\n" - "ins v11.d[1], temploadreg3\n" - ".word 0x6f80e952 // udot v18.4s, v10.16b, v0.4b[2]\n" - "ldr temploadreg3, [%[b_ptr0], #0x78]\n" - ".word 0x6f81e956 // udot v22.4s, v10.16b, v1.4b[2]\n" - "ins v12.d[1], temploadreg0\n" - "ins v13.d[1], temploadreg1\n" - "add %[b_ptr0], %[b_ptr0], #0x100\n" - ".word 0x6f80e973 // udot v19.4s, v11.16b, v0.4b[2]\n" - "ldr d8, [%[b_ptr0], #-0x80]\n" - ".word 0x6f81e977 // udot v23.4s, v11.16b, v1.4b[2]\n" - "ldr temploadreg0, [%[b_ptr0], #-0x78]\n" - ".word 0x6fa0e990 // udot v16.4s, v12.16b, v0.4b[3]\n" - "ldr d9, [%[b_ptr0], #-0x70]\n" - ".word 0x6fa1e994 // udot v20.4s, v12.16b, v1.4b[3]\n" - "ldr temploadreg1, [%[b_ptr0], #-0x68]\n" - ".word 0x6fa0e9b1 // udot v17.4s, v13.16b, v0.4b[3]\n" - "ldr d10, [%[b_ptr0], #-0x60]\n" - ".word 0x6fa1e9b5 // udot v21.4s, v13.16b, v1.4b[3]\n" - "ins v14.d[1], temploadreg2\n" - "ldr temploadreg2, [%[b_ptr0], #-0x58]\n" - "ldr d11, [%[b_ptr0], #-0x50]\n" - "ins v15.d[1], temploadreg3\n" - ".word 0x6fa0e9d2 // udot v18.4s, v14.16b, v0.4b[3]\n" - "ldr temploadreg3, [%[b_ptr0], #-0x48]\n" - ".word 0x6fa1e9d6 // udot v22.4s, v14.16b, v1.4b[3]\n" - "ldr d12, [%[b_ptr0], #-0x40]\n" - "ins v8.d[1], temploadreg0\n" - ".word 0x6fa0e9f3 // udot v19.4s, v15.16b, v0.4b[3]\n" - "ldr temploadreg0, [%[b_ptr0], #-0x38]\n" - ".word 0x6fa1e9f7 // udot v23.4s, v15.16b, v1.4b[3]\n" - "ldr d13, [%[b_ptr0], #-0x30]\n" - "ins v9.d[1], temploadreg1\n" - ".word 0x6f84e110 // udot v16.4s, v8.16b, v4.4b[0]\n" - "ldr temploadreg1, [%[b_ptr0], #-0x28]\n" - ".word 0x6f85e114 // udot v20.4s, v8.16b, v5.4b[0]\n" - "ldr d14, [%[b_ptr0], #-0x20]\n" - "ins v10.d[1], temploadreg2\n" - ".word 0x6f84e131 // udot v17.4s, v9.16b, v4.4b[0]\n" - "ldr temploadreg2, [%[b_ptr0], #-0x18]\n" - ".word 0x6f85e135 // udot v21.4s, v9.16b, v5.4b[0]\n" - "ldr d15, [%[b_ptr0], #-0x10]\n" - "ins v11.d[1], temploadreg3\n" - ".word 0x6f84e152 // udot v18.4s, v10.16b, v4.4b[0]\n" - "ldr temploadreg3, [%[b_ptr0], #-0x8]\n" - ".word 0x6f85e156 // udot v22.4s, v10.16b, v5.4b[0]\n" - "ldr d8, [%[b_ptr0]]\n" - "ins v12.d[1], temploadreg0\n" - ".word 0x6f84e173 // udot v19.4s, v11.16b, v4.4b[0]\n" - "ldr temploadreg0, [%[b_ptr0], #0x8]\n" - ".word 0x6f85e177 // udot v23.4s, v11.16b, v5.4b[0]\n" - "ldr d9, [%[b_ptr0], #0x10]\n" - "ins v13.d[1], temploadreg1\n" - ".word 0x6fa4e190 // udot v16.4s, v12.16b, v4.4b[1]\n" - "ldr temploadreg1, [%[b_ptr0], #0x18]\n" - ".word 0x6fa5e194 // udot v20.4s, v12.16b, v5.4b[1]\n" - "ldr d10, [%[b_ptr0], #0x20]\n" - "ins v14.d[1], temploadreg2\n" - ".word 0x6fa4e1b1 // udot v17.4s, v13.16b, v4.4b[1]\n" - "ldr temploadreg2, [%[b_ptr0], #0x28]\n" - ".word 0x6fa5e1b5 // udot v21.4s, v13.16b, v5.4b[1]\n" - "ldr d11, [%[b_ptr0], #0x30]\n" - "ins v15.d[1], temploadreg3\n" - ".word 0x6fa4e1d2 // udot v18.4s, v14.16b, v4.4b[1]\n" - "ldr temploadreg3, [%[b_ptr0], #0x38]\n" - ".word 0x6fa5e1d6 // udot v22.4s, v14.16b, v5.4b[1]\n" - "ldr d12, [%[b_ptr0], #0x40]\n" - "ins v8.d[1], temploadreg0\n" - ".word 0x6fa4e1f3 // udot v19.4s, v15.16b, v4.4b[1]\n" - "ldr temploadreg0, [%[b_ptr0], #0x48]\n" - ".word 0x6fa5e1f7 // udot v23.4s, v15.16b, v5.4b[1]\n" - "ldr d13, [%[b_ptr0], #0x50]\n" - "ins v9.d[1], temploadreg1\n" - ".word 0x6f84e910 // udot v16.4s, v8.16b, v4.4b[2]\n" - "ldr temploadreg1, [%[b_ptr0], #0x58]\n" - ".word 0x6f85e914 // udot v20.4s, v8.16b, v5.4b[2]\n" - "ldr d14, [%[b_ptr0], #0x60]\n" - "ins v10.d[1], temploadreg2\n" - ".word 0x6f84e931 // udot v17.4s, v9.16b, v4.4b[2]\n" - "ldr temploadreg2, [%[b_ptr0], #0x68]\n" - ".word 0x6f85e935 // udot v21.4s, v9.16b, v5.4b[2]\n" - "ldr d15, [%[b_ptr0], #0x70]\n" - "ins v11.d[1], temploadreg3\n" - ".word 0x6f84e952 // udot v18.4s, v10.16b, v4.4b[2]\n" - "ldr temploadreg3, [%[b_ptr0], #0x78]\n" - ".word 0x6f85e956 // udot v22.4s, v10.16b, v5.4b[2]\n" - "ins v12.d[1], temploadreg0\n" - "ins v13.d[1], temploadreg1\n" - "add %[b_ptr0], %[b_ptr0], #0x80\n" - ".word 0x6f84e973 // udot v19.4s, v11.16b, v4.4b[2]\n" - "ins v14.d[1], temploadreg2\n" - ".word 0x6f85e977 // udot v23.4s, v11.16b, v5.4b[2]\n" - "ins v15.d[1], temploadreg3\n" - ".word 0x6fa4e990 // udot v16.4s, v12.16b, v4.4b[3]\n" - ".word 0x6fa5e994 // udot v20.4s, v12.16b, v5.4b[3]\n" - ".word 0x6fa4e9b1 // udot v17.4s, v13.16b, v4.4b[3]\n" - ".word 0x6fa5e9b5 // udot v21.4s, v13.16b, v5.4b[3]\n" - ".word 0x6fa4e9d2 // udot v18.4s, v14.16b, v4.4b[3]\n" - ".word 0x6fa5e9d6 // udot v22.4s, v14.16b, v5.4b[3]\n" - ".word 0x6fa4e9f3 // udot v19.4s, v15.16b, v4.4b[3]\n" - ".word 0x6fa5e9f7 // udot v23.4s, v15.16b, v5.4b[3]\n" - "b 5f\n" - "4:\n" - ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" - "ldr temploadreg0, [%[b_ptr0], #0x8]\n" - ".word 0x6f81e114 // udot v20.4s, v8.16b, v1.4b[0]\n" - "ldr d8, [%[b_ptr0]]\n" - ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" - "ldr temploadreg1, [%[b_ptr0], #0x18]\n" - ".word 0x6f81e135 // udot v21.4s, v9.16b, v1.4b[0]\n" - "ldr d9, [%[b_ptr0], #0x10]\n" - ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" - "ldr temploadreg2, [%[b_ptr0], #0x28]\n" - ".word 0x6f81e156 // udot v22.4s, v10.16b, v1.4b[0]\n" - "ldr d10, [%[b_ptr0], #0x20]\n" - ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" - "ldr temploadreg3, [%[b_ptr0], #0x38]\n" - ".word 0x6f81e177 // udot v23.4s, v11.16b, v1.4b[0]\n" - "ldr d11, [%[b_ptr0], #0x30]\n" - ".word 0x6fa0e190 // udot v16.4s, v12.16b, v0.4b[1]\n" - "ins v8.d[1], temploadreg0\n" - ".word 0x6fa1e194 // udot v20.4s, v12.16b, v1.4b[1]\n" - "ldr d12, [%[b_ptr0], #0x40]\n" - ".word 0x6fa0e1b1 // udot v17.4s, v13.16b, v0.4b[1]\n" - "ldr temploadreg0, [%[b_ptr0], #0x48]\n" - ".word 0x6fa1e1b5 // udot v21.4s, v13.16b, v1.4b[1]\n" - "ldr d13, [%[b_ptr0], #0x50]\n" - ".word 0x6fa0e1d2 // udot v18.4s, v14.16b, v0.4b[1]\n" - "ins v9.d[1], temploadreg1\n" - ".word 0x6fa1e1d6 // udot v22.4s, v14.16b, v1.4b[1]\n" - "ldr temploadreg1, [%[b_ptr0], #0x58]\n" - ".word 0x6fa0e1f3 // udot v19.4s, v15.16b, v0.4b[1]\n" - "ldr d14, [%[b_ptr0], #0x60]\n" - ".word 0x6fa1e1f7 // udot v23.4s, v15.16b, v1.4b[1]\n" - "ins v10.d[1], temploadreg2\n" - ".word 0x6f80e910 // udot v16.4s, v8.16b, v0.4b[2]\n" - "ldr temploadreg2, [%[b_ptr0], #0x68]\n" - ".word 0x6f81e914 // udot v20.4s, v8.16b, v1.4b[2]\n" - "ldr d15, [%[b_ptr0], #0x70]\n" - ".word 0x6f80e931 // udot v17.4s, v9.16b, v0.4b[2]\n" - "ins v11.d[1], temploadreg3\n" - ".word 0x6f81e935 // udot v21.4s, v9.16b, v1.4b[2]\n" - "ldr temploadreg3, [%[b_ptr0], #0x78]\n" - ".word 0x6f80e952 // udot v18.4s, v10.16b, v0.4b[2]\n" - "ins v12.d[1], temploadreg0\n" - ".word 0x6f81e956 // udot v22.4s, v10.16b, v1.4b[2]\n" - "ins v13.d[1], temploadreg1\n" - ".word 0x6f80e973 // udot v19.4s, v11.16b, v0.4b[2]\n" - "ins v14.d[1], temploadreg2\n" - ".word 0x6f81e977 // udot v23.4s, v11.16b, v1.4b[2]\n" - "ins v15.d[1], temploadreg3\n" - ".word 0x6fa0e990 // udot v16.4s, v12.16b, v0.4b[3]\n" - "add %[b_ptr0], %[b_ptr0], #0x80\n" - ".word 0x6fa1e994 // udot v20.4s, v12.16b, v1.4b[3]\n" - ".word 0x6fa0e9b1 // udot v17.4s, v13.16b, v0.4b[3]\n" - ".word 0x6fa1e9b5 // udot v21.4s, v13.16b, v1.4b[3]\n" - ".word 0x6fa0e9d2 // udot v18.4s, v14.16b, v0.4b[3]\n" - ".word 0x6fa1e9d6 // udot v22.4s, v14.16b, v1.4b[3]\n" - ".word 0x6fa0e9f3 // udot v19.4s, v15.16b, v0.4b[3]\n" - ".word 0x6fa1e9f7 // udot v23.4s, v15.16b, v1.4b[3]\n" - "5:\n" - "cbz %[blocks], 6f\n" - "7:\n" - "ldr q8, [%[b_ptr0]]\n" - "subs %[blocks], %[blocks], #0x1\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - "ldr s0, [%[a_ptr0]]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - "add %[a_ptr0], %[a_ptr0], #0x4\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - "add %[b_ptr0], %[b_ptr0], #0x40\n" - ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" - "ldr s1, [a_ptr1]\n" - ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" - "add a_ptr1, a_ptr1, #0x4\n" - ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" - ".word 0x6f81e114 // udot v20.4s, v8.16b, v1.4b[0]\n" - ".word 0x6f81e135 // udot v21.4s, v9.16b, v1.4b[0]\n" - ".word 0x6f81e156 // udot v22.4s, v10.16b, v1.4b[0]\n" - ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" - ".word 0x6f81e177 // udot v23.4s, v11.16b, v1.4b[0]\n" - "b.ne 7b\n" - "6:\n" - "cbz %[odds], 8f\n" - "ld1 {v0.b}[0], [%[a_ptr0]], #1\n" - "ld1 {v1.b}[0], [a_ptr1], #1\n" - "subs %[odds], %[odds], #0x1\n" - "b.eq 9f\n" - "ld1 {v0.b}[1], [%[a_ptr0]], #1\n" - "ld1 {v1.b}[1], [a_ptr1], #1\n" - "subs %[odds], %[odds], #0x1\n" - "b.eq 9f\n" - "ld1 {v0.b}[2], [%[a_ptr0]]\n" - "ld1 {v1.b}[2], [a_ptr1]\n" - "9:\n" - "ldr q8, [%[b_ptr0]]\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" - ".word 0x6f81e114 // udot v20.4s, v8.16b, v1.4b[0]\n" - ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" - ".word 0x6f81e135 // udot v21.4s, v9.16b, v1.4b[0]\n" - ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" - ".word 0x6f81e156 // udot v22.4s, v10.16b, v1.4b[0]\n" - ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" - ".word 0x6f81e177 // udot v23.4s, v11.16b, v1.4b[0]\n" - "8:\n" - "str q16, [%[c_ptr0]]\n" - "str q17, [%[c_ptr0], #0x10]\n" - "str q18, [%[c_ptr0], #0x20]\n" - "str q19, [%[c_ptr0], #0x30]\n" - "add %[c_ptr0], %[c_ptr0], #0x40\n" - "str q20, [c_ptr1]\n" - "str q21, [c_ptr1, #0x10]\n" - "str q22, [c_ptr1, #0x20]\n" - "str q23, [c_ptr1, #0x30]\n" - ".unreq a_ptr1\n" - ".unreq c_ptr1\n" - ".unreq temploadreg0\n" - ".unreq temploadreg1\n" - ".unreq temploadreg2\n" - ".unreq temploadreg3\n" - : [a_ptr0] "+r" (a_ptr0), [b_ptr0] "+r" (b_ptr0), [c_ptr0] "+r" (c_ptr0), [loops] "+r" (loops), [regs] "+r" (regs), [blocks] "+r" (blocks), [odds] "+r" (odds) - : [betaptr] "r" (betaptr), [width] "r" (width), [beta0] "r" (beta0), [lda] "r" (ldab), [ldc] "r" (ldcb) - : "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x0", "x1", "x2", "x3", "x4", "x5", "cc", "memory" + "a_ptr1 .req X0\n" + "c_ptr1 .req X1\n" + "temploadreg0 .req X2\n" + "temploadreg1 .req X3\n" + "temploadreg2 .req X4\n" + "temploadreg3 .req X5\n" + "add a_ptr1, %[a_ptr0], %[lda]\n" + "add c_ptr1, %[c_ptr0], %[ldc]\n" + "cbz %[beta0], 1f\n" + "movi v16.4s, #0\n" + "ldr q0, [%[a_ptr0]]\n" + "movi v17.4s, #0\n" + "ldr q1, [a_ptr1]\n" + "movi v18.4s, #0\n" + "ldr q8, [%[b_ptr0]]\n" + "movi v19.4s, #0\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + "movi v20.4s, #0\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + "movi v21.4s, #0\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + "movi v22.4s, #0\n" + "ldr q12, [%[b_ptr0], #0x40]\n" + "movi v23.4s, #0\n" + "ldr q13, [%[b_ptr0], #0x50]\n" + "ldr d14, [%[b_ptr0], #0x60]\n" + "add %[a_ptr0], %[a_ptr0], #0x10\n" + "ldr temploadreg2, [%[b_ptr0], #0x68]\n" + "add a_ptr1, a_ptr1, #0x10\n" + "add %[b_ptr0], %[b_ptr0], #0x80\n" + "cbz %[loops], 2f\n" + "b 3f\n" + "1:\n" + "ld1r {v15.4s}, [%[betaptr]]\n" + "ldr q16, [%[c_ptr0]]\n" + "ldr q17, [%[c_ptr0], #0x10]\n" + "ldr q18, [%[c_ptr0], #0x20]\n" + "ldr q19, [%[c_ptr0], #0x30]\n" + "mul v16.4s, v16.4s, v15.4s\n" + "ldr q20, [c_ptr1]\n" + "mul v17.4s, v17.4s, v15.4s\n" + "ldr q21, [c_ptr1, #0x10]\n" + "mul v18.4s, v18.4s, v15.4s\n" + "ldr q22, [c_ptr1, #0x20]\n" + "mul v19.4s, v19.4s, v15.4s\n" + "ldr q23, [c_ptr1, #0x30]\n" + "mul v20.4s, v20.4s, v15.4s\n" + "ldr q0, [%[a_ptr0]]\n" + "mul v21.4s, v21.4s, v15.4s\n" + "ldr q1, [a_ptr1]\n" + "mul v22.4s, v22.4s, v15.4s\n" + "ldr q8, [%[b_ptr0]]\n" + "mul v23.4s, v23.4s, v15.4s\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + "add %[a_ptr0], %[a_ptr0], #0x10\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + "add a_ptr1, a_ptr1, #0x10\n" + "ldr q12, [%[b_ptr0], #0x40]\n" + "ldr q13, [%[b_ptr0], #0x50]\n" + "ldr d14, [%[b_ptr0], #0x60]\n" + "ldr temploadreg2, [%[b_ptr0], #0x68]\n" + "add %[b_ptr0], %[b_ptr0], #0x80\n" + "cbz %[loops], 2f\n" + "3:\n" + ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" + "ins v14.d[1], temploadreg2\n" + ".word 0x6f81e114 // udot v20.4s, v8.16b, v1.4b[0]\n" + "ldr d15, [%[b_ptr0], #-0x10]\n" + ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" + "ldr temploadreg3, [%[b_ptr0], #-0x8]\n" + ".word 0x6f81e135 // udot v21.4s, v9.16b, v1.4b[0]\n" + "ldr d4, [%[a_ptr0]]\n" + ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" + "ldr temploadreg0, [%[a_ptr0], #0x8]\n" + ".word 0x6f81e156 // udot v22.4s, v10.16b, v1.4b[0]\n" + "ldr d5, [a_ptr1]\n" + ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" + "ldr temploadreg1, [a_ptr1, #0x8]\n" + ".word 0x6f81e177 // udot v23.4s, v11.16b, v1.4b[0]\n" + "ldr d8, [%[b_ptr0]]\n" + ".word 0x6fa0e190 // udot v16.4s, v12.16b, v0.4b[1]\n" + "ins v4.d[1], temploadreg0\n" + ".word 0x6fa1e194 // udot v20.4s, v12.16b, v1.4b[1]\n" + "ldr temploadreg0, [%[b_ptr0], #0x8]\n" + ".word 0x6fa0e1b1 // udot v17.4s, v13.16b, v0.4b[1]\n" + "ldr d9, [%[b_ptr0], #0x10]\n" + ".word 0x6fa1e1b5 // udot v21.4s, v13.16b, v1.4b[1]\n" + "ins v5.d[1], temploadreg1\n" + ".word 0x6fa0e1d2 // udot v18.4s, v14.16b, v0.4b[1]\n" + "ldr temploadreg1, [%[b_ptr0], #0x18]\n" + ".word 0x6fa1e1d6 // udot v22.4s, v14.16b, v1.4b[1]\n" + "ldr d10, [%[b_ptr0], #0x20]\n" + "ldr temploadreg2, [%[b_ptr0], #0x28]\n" + "subs %[loops], %[loops], #0x1\n" + "ldr d11, [%[b_ptr0], #0x30]\n" + "prfm PLDL1KEEP, [%[a_ptr0], #0x40]\n" + "ins v15.d[1], temploadreg3\n" + "add %[a_ptr0], %[a_ptr0], #0x20\n" + "ldr temploadreg3, [%[b_ptr0], #0x38]\n" + "add a_ptr1, a_ptr1, #0x20\n" + ".word 0x6fa0e1f3 // udot v19.4s, v15.16b, v0.4b[1]\n" + "ldr d12, [%[b_ptr0], #0x40]\n" + ".word 0x6fa1e1f7 // udot v23.4s, v15.16b, v1.4b[1]\n" + "ins v8.d[1], temploadreg0\n" + "ldr temploadreg0, [%[b_ptr0], #0x48]\n" + "prfm PLDL1KEEP, [a_ptr1, #0x40]\n" + "ldr d13, [%[b_ptr0], #0x50]\n" + ".word 0x6f80e910 // udot v16.4s, v8.16b, v0.4b[2]\n" + "ins v9.d[1], temploadreg1\n" + ".word 0x6f81e914 // udot v20.4s, v8.16b, v1.4b[2]\n" + "ldr temploadreg1, [%[b_ptr0], #0x58]\n" + "ldr d14, [%[b_ptr0], #0x60]\n" + "ins v10.d[1], temploadreg2\n" + ".word 0x6f80e931 // udot v17.4s, v9.16b, v0.4b[2]\n" + "ldr temploadreg2, [%[b_ptr0], #0x68]\n" + ".word 0x6f81e935 // udot v21.4s, v9.16b, v1.4b[2]\n" + "ldr d15, [%[b_ptr0], #0x70]\n" + "ins v11.d[1], temploadreg3\n" + ".word 0x6f80e952 // udot v18.4s, v10.16b, v0.4b[2]\n" + "ldr temploadreg3, [%[b_ptr0], #0x78]\n" + ".word 0x6f81e956 // udot v22.4s, v10.16b, v1.4b[2]\n" + "ins v12.d[1], temploadreg0\n" + "ins v13.d[1], temploadreg1\n" + "add %[b_ptr0], %[b_ptr0], #0x100\n" + ".word 0x6f80e973 // udot v19.4s, v11.16b, v0.4b[2]\n" + "ldr d8, [%[b_ptr0], #-0x80]\n" + ".word 0x6f81e977 // udot v23.4s, v11.16b, v1.4b[2]\n" + "ldr temploadreg0, [%[b_ptr0], #-0x78]\n" + ".word 0x6fa0e990 // udot v16.4s, v12.16b, v0.4b[3]\n" + "ldr d9, [%[b_ptr0], #-0x70]\n" + ".word 0x6fa1e994 // udot v20.4s, v12.16b, v1.4b[3]\n" + "ldr temploadreg1, [%[b_ptr0], #-0x68]\n" + ".word 0x6fa0e9b1 // udot v17.4s, v13.16b, v0.4b[3]\n" + "ldr d10, [%[b_ptr0], #-0x60]\n" + ".word 0x6fa1e9b5 // udot v21.4s, v13.16b, v1.4b[3]\n" + "ins v14.d[1], temploadreg2\n" + "ldr temploadreg2, [%[b_ptr0], #-0x58]\n" + "ldr d11, [%[b_ptr0], #-0x50]\n" + "ins v15.d[1], temploadreg3\n" + ".word 0x6fa0e9d2 // udot v18.4s, v14.16b, v0.4b[3]\n" + "ldr temploadreg3, [%[b_ptr0], #-0x48]\n" + ".word 0x6fa1e9d6 // udot v22.4s, v14.16b, v1.4b[3]\n" + "ldr d12, [%[b_ptr0], #-0x40]\n" + "ins v8.d[1], temploadreg0\n" + ".word 0x6fa0e9f3 // udot v19.4s, v15.16b, v0.4b[3]\n" + "ldr temploadreg0, [%[b_ptr0], #-0x38]\n" + ".word 0x6fa1e9f7 // udot v23.4s, v15.16b, v1.4b[3]\n" + "ldr d13, [%[b_ptr0], #-0x30]\n" + "ins v9.d[1], temploadreg1\n" + ".word 0x6f84e110 // udot v16.4s, v8.16b, v4.4b[0]\n" + "ldr temploadreg1, [%[b_ptr0], #-0x28]\n" + ".word 0x6f85e114 // udot v20.4s, v8.16b, v5.4b[0]\n" + "ldr d14, [%[b_ptr0], #-0x20]\n" + "ins v10.d[1], temploadreg2\n" + ".word 0x6f84e131 // udot v17.4s, v9.16b, v4.4b[0]\n" + "ldr temploadreg2, [%[b_ptr0], #-0x18]\n" + ".word 0x6f85e135 // udot v21.4s, v9.16b, v5.4b[0]\n" + "ldr d15, [%[b_ptr0], #-0x10]\n" + "ins v11.d[1], temploadreg3\n" + ".word 0x6f84e152 // udot v18.4s, v10.16b, v4.4b[0]\n" + "ldr temploadreg3, [%[b_ptr0], #-0x8]\n" + ".word 0x6f85e156 // udot v22.4s, v10.16b, v5.4b[0]\n" + "ldr d0, [%[a_ptr0], #-0x10]\n" + "ins v12.d[1], temploadreg0\n" + ".word 0x6f84e173 // udot v19.4s, v11.16b, v4.4b[0]\n" + "ldr temploadreg0, [%[a_ptr0], #-0x8]\n" + ".word 0x6f85e177 // udot v23.4s, v11.16b, v5.4b[0]\n" + "ldr d1, [a_ptr1, #-0x10]\n" + "ins v13.d[1], temploadreg1\n" + ".word 0x6fa4e190 // udot v16.4s, v12.16b, v4.4b[1]\n" + "ldr temploadreg1, [a_ptr1, #-0x8]\n" + ".word 0x6fa5e194 // udot v20.4s, v12.16b, v5.4b[1]\n" + "ldr d8, [%[b_ptr0]]\n" + "ins v0.d[1], temploadreg0\n" + ".word 0x6fa4e1b1 // udot v17.4s, v13.16b, v4.4b[1]\n" + "ldr temploadreg0, [%[b_ptr0], #0x8]\n" + ".word 0x6fa5e1b5 // udot v21.4s, v13.16b, v5.4b[1]\n" + "ldr d9, [%[b_ptr0], #0x10]\n" + "ins v1.d[1], temploadreg1\n" + "ldr temploadreg1, [%[b_ptr0], #0x18]\n" + "ldr d10, [%[b_ptr0], #0x20]\n" + "ins v14.d[1], temploadreg2\n" + "ldr temploadreg2, [%[b_ptr0], #0x28]\n" + "ldr d11, [%[b_ptr0], #0x30]\n" + "ins v15.d[1], temploadreg3\n" + ".word 0x6fa4e1d2 // udot v18.4s, v14.16b, v4.4b[1]\n" + "ldr temploadreg3, [%[b_ptr0], #0x38]\n" + ".word 0x6fa5e1d6 // udot v22.4s, v14.16b, v5.4b[1]\n" + "ldr d12, [%[b_ptr0], #0x40]\n" + "ins v8.d[1], temploadreg0\n" + ".word 0x6fa4e1f3 // udot v19.4s, v15.16b, v4.4b[1]\n" + "ldr temploadreg0, [%[b_ptr0], #0x48]\n" + ".word 0x6fa5e1f7 // udot v23.4s, v15.16b, v5.4b[1]\n" + "ldr d13, [%[b_ptr0], #0x50]\n" + "ins v9.d[1], temploadreg1\n" + ".word 0x6f84e910 // udot v16.4s, v8.16b, v4.4b[2]\n" + "ldr temploadreg1, [%[b_ptr0], #0x58]\n" + ".word 0x6f85e914 // udot v20.4s, v8.16b, v5.4b[2]\n" + "ldr d14, [%[b_ptr0], #0x60]\n" + "ins v10.d[1], temploadreg2\n" + ".word 0x6f84e931 // udot v17.4s, v9.16b, v4.4b[2]\n" + "ldr temploadreg2, [%[b_ptr0], #0x68]\n" + ".word 0x6f85e935 // udot v21.4s, v9.16b, v5.4b[2]\n" + "ldr d15, [%[b_ptr0], #0x70]\n" + "ins v11.d[1], temploadreg3\n" + ".word 0x6f84e952 // udot v18.4s, v10.16b, v4.4b[2]\n" + "ldr temploadreg3, [%[b_ptr0], #0x78]\n" + ".word 0x6f85e956 // udot v22.4s, v10.16b, v5.4b[2]\n" + "ins v12.d[1], temploadreg0\n" + "ins v13.d[1], temploadreg1\n" + "add %[b_ptr0], %[b_ptr0], #0x100\n" + ".word 0x6f84e973 // udot v19.4s, v11.16b, v4.4b[2]\n" + "ldr d8, [%[b_ptr0], #-0x80]\n" + ".word 0x6f85e977 // udot v23.4s, v11.16b, v5.4b[2]\n" + "ldr temploadreg0, [%[b_ptr0], #-0x78]\n" + ".word 0x6fa4e990 // udot v16.4s, v12.16b, v4.4b[3]\n" + "ldr d9, [%[b_ptr0], #-0x70]\n" + ".word 0x6fa5e994 // udot v20.4s, v12.16b, v5.4b[3]\n" + "ldr temploadreg1, [%[b_ptr0], #-0x68]\n" + ".word 0x6fa4e9b1 // udot v17.4s, v13.16b, v4.4b[3]\n" + "ldr d10, [%[b_ptr0], #-0x60]\n" + ".word 0x6fa5e9b5 // udot v21.4s, v13.16b, v5.4b[3]\n" + "ins v14.d[1], temploadreg2\n" + "ldr temploadreg2, [%[b_ptr0], #-0x58]\n" + "ldr d11, [%[b_ptr0], #-0x50]\n" + "ins v15.d[1], temploadreg3\n" + ".word 0x6fa4e9d2 // udot v18.4s, v14.16b, v4.4b[3]\n" + "ldr temploadreg3, [%[b_ptr0], #-0x48]\n" + ".word 0x6fa5e9d6 // udot v22.4s, v14.16b, v5.4b[3]\n" + "ldr d12, [%[b_ptr0], #-0x40]\n" + "ins v8.d[1], temploadreg0\n" + ".word 0x6fa4e9f3 // udot v19.4s, v15.16b, v4.4b[3]\n" + "ldr temploadreg0, [%[b_ptr0], #-0x38]\n" + ".word 0x6fa5e9f7 // udot v23.4s, v15.16b, v5.4b[3]\n" + "ldr d13, [%[b_ptr0], #-0x30]\n" + "ins v9.d[1], temploadreg1\n" + "ldr temploadreg1, [%[b_ptr0], #-0x28]\n" + "ldr d14, [%[b_ptr0], #-0x20]\n" + "ins v10.d[1], temploadreg2\n" + "ldr temploadreg2, [%[b_ptr0], #-0x18]\n" + "ins v11.d[1], temploadreg3\n" + "ins v12.d[1], temploadreg0\n" + "ins v13.d[1], temploadreg1\n" + "b.ne 3b\n" + "2:\n" + "ins v14.d[1], temploadreg2\n" + "prfm PSTL1KEEP, [%[c_ptr0]]\n" + "ldr d15, [%[b_ptr0], #-0x10]\n" + "prfm PSTL1KEEP, [c_ptr1]\n" + "ldr temploadreg3, [%[b_ptr0], #-0x8]\n" + "ins v15.d[1], temploadreg3\n" + "cbz %[regs], 4f\n" + ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" + "ldr d4, [%[a_ptr0]]\n" + ".word 0x6f81e114 // udot v20.4s, v8.16b, v1.4b[0]\n" + "ldr temploadreg0, [%[a_ptr0], #0x8]\n" + ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" + "ldr d5, [a_ptr1]\n" + ".word 0x6f81e135 // udot v21.4s, v9.16b, v1.4b[0]\n" + "ldr temploadreg1, [a_ptr1, #0x8]\n" + ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" + "ldr d8, [%[b_ptr0]]\n" + ".word 0x6f81e156 // udot v22.4s, v10.16b, v1.4b[0]\n" + "ins v4.d[1], temploadreg0\n" + ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" + "ldr temploadreg0, [%[b_ptr0], #0x8]\n" + ".word 0x6f81e177 // udot v23.4s, v11.16b, v1.4b[0]\n" + "ldr d9, [%[b_ptr0], #0x10]\n" + ".word 0x6fa0e190 // udot v16.4s, v12.16b, v0.4b[1]\n" + "ins v5.d[1], temploadreg1\n" + ".word 0x6fa1e194 // udot v20.4s, v12.16b, v1.4b[1]\n" + "ldr temploadreg1, [%[b_ptr0], #0x18]\n" + ".word 0x6fa0e1b1 // udot v17.4s, v13.16b, v0.4b[1]\n" + "ldr d10, [%[b_ptr0], #0x20]\n" + ".word 0x6fa1e1b5 // udot v21.4s, v13.16b, v1.4b[1]\n" + "ldr temploadreg2, [%[b_ptr0], #0x28]\n" + ".word 0x6fa0e1d2 // udot v18.4s, v14.16b, v0.4b[1]\n" + "ldr d11, [%[b_ptr0], #0x30]\n" + ".word 0x6fa1e1d6 // udot v22.4s, v14.16b, v1.4b[1]\n" + "ldr temploadreg3, [%[b_ptr0], #0x38]\n" + ".word 0x6fa0e1f3 // udot v19.4s, v15.16b, v0.4b[1]\n" + "ldr d12, [%[b_ptr0], #0x40]\n" + ".word 0x6fa1e1f7 // udot v23.4s, v15.16b, v1.4b[1]\n" + "ins v8.d[1], temploadreg0\n" + "ldr temploadreg0, [%[b_ptr0], #0x48]\n" + "add %[a_ptr0], %[a_ptr0], #0x10\n" + "ldr d13, [%[b_ptr0], #0x50]\n" + "add a_ptr1, a_ptr1, #0x10\n" + ".word 0x6f80e910 // udot v16.4s, v8.16b, v0.4b[2]\n" + "ins v9.d[1], temploadreg1\n" + ".word 0x6f81e914 // udot v20.4s, v8.16b, v1.4b[2]\n" + "ldr temploadreg1, [%[b_ptr0], #0x58]\n" + "ldr d14, [%[b_ptr0], #0x60]\n" + "ins v10.d[1], temploadreg2\n" + ".word 0x6f80e931 // udot v17.4s, v9.16b, v0.4b[2]\n" + "ldr temploadreg2, [%[b_ptr0], #0x68]\n" + ".word 0x6f81e935 // udot v21.4s, v9.16b, v1.4b[2]\n" + "ldr d15, [%[b_ptr0], #0x70]\n" + "ins v11.d[1], temploadreg3\n" + ".word 0x6f80e952 // udot v18.4s, v10.16b, v0.4b[2]\n" + "ldr temploadreg3, [%[b_ptr0], #0x78]\n" + ".word 0x6f81e956 // udot v22.4s, v10.16b, v1.4b[2]\n" + "ins v12.d[1], temploadreg0\n" + "ins v13.d[1], temploadreg1\n" + "add %[b_ptr0], %[b_ptr0], #0x100\n" + ".word 0x6f80e973 // udot v19.4s, v11.16b, v0.4b[2]\n" + "ldr d8, [%[b_ptr0], #-0x80]\n" + ".word 0x6f81e977 // udot v23.4s, v11.16b, v1.4b[2]\n" + "ldr temploadreg0, [%[b_ptr0], #-0x78]\n" + ".word 0x6fa0e990 // udot v16.4s, v12.16b, v0.4b[3]\n" + "ldr d9, [%[b_ptr0], #-0x70]\n" + ".word 0x6fa1e994 // udot v20.4s, v12.16b, v1.4b[3]\n" + "ldr temploadreg1, [%[b_ptr0], #-0x68]\n" + ".word 0x6fa0e9b1 // udot v17.4s, v13.16b, v0.4b[3]\n" + "ldr d10, [%[b_ptr0], #-0x60]\n" + ".word 0x6fa1e9b5 // udot v21.4s, v13.16b, v1.4b[3]\n" + "ins v14.d[1], temploadreg2\n" + "ldr temploadreg2, [%[b_ptr0], #-0x58]\n" + "ldr d11, [%[b_ptr0], #-0x50]\n" + "ins v15.d[1], temploadreg3\n" + ".word 0x6fa0e9d2 // udot v18.4s, v14.16b, v0.4b[3]\n" + "ldr temploadreg3, [%[b_ptr0], #-0x48]\n" + ".word 0x6fa1e9d6 // udot v22.4s, v14.16b, v1.4b[3]\n" + "ldr d12, [%[b_ptr0], #-0x40]\n" + "ins v8.d[1], temploadreg0\n" + ".word 0x6fa0e9f3 // udot v19.4s, v15.16b, v0.4b[3]\n" + "ldr temploadreg0, [%[b_ptr0], #-0x38]\n" + ".word 0x6fa1e9f7 // udot v23.4s, v15.16b, v1.4b[3]\n" + "ldr d13, [%[b_ptr0], #-0x30]\n" + "ins v9.d[1], temploadreg1\n" + ".word 0x6f84e110 // udot v16.4s, v8.16b, v4.4b[0]\n" + "ldr temploadreg1, [%[b_ptr0], #-0x28]\n" + ".word 0x6f85e114 // udot v20.4s, v8.16b, v5.4b[0]\n" + "ldr d14, [%[b_ptr0], #-0x20]\n" + "ins v10.d[1], temploadreg2\n" + ".word 0x6f84e131 // udot v17.4s, v9.16b, v4.4b[0]\n" + "ldr temploadreg2, [%[b_ptr0], #-0x18]\n" + ".word 0x6f85e135 // udot v21.4s, v9.16b, v5.4b[0]\n" + "ldr d15, [%[b_ptr0], #-0x10]\n" + "ins v11.d[1], temploadreg3\n" + ".word 0x6f84e152 // udot v18.4s, v10.16b, v4.4b[0]\n" + "ldr temploadreg3, [%[b_ptr0], #-0x8]\n" + ".word 0x6f85e156 // udot v22.4s, v10.16b, v5.4b[0]\n" + "ldr d8, [%[b_ptr0]]\n" + "ins v12.d[1], temploadreg0\n" + ".word 0x6f84e173 // udot v19.4s, v11.16b, v4.4b[0]\n" + "ldr temploadreg0, [%[b_ptr0], #0x8]\n" + ".word 0x6f85e177 // udot v23.4s, v11.16b, v5.4b[0]\n" + "ldr d9, [%[b_ptr0], #0x10]\n" + "ins v13.d[1], temploadreg1\n" + ".word 0x6fa4e190 // udot v16.4s, v12.16b, v4.4b[1]\n" + "ldr temploadreg1, [%[b_ptr0], #0x18]\n" + ".word 0x6fa5e194 // udot v20.4s, v12.16b, v5.4b[1]\n" + "ldr d10, [%[b_ptr0], #0x20]\n" + "ins v14.d[1], temploadreg2\n" + ".word 0x6fa4e1b1 // udot v17.4s, v13.16b, v4.4b[1]\n" + "ldr temploadreg2, [%[b_ptr0], #0x28]\n" + ".word 0x6fa5e1b5 // udot v21.4s, v13.16b, v5.4b[1]\n" + "ldr d11, [%[b_ptr0], #0x30]\n" + "ins v15.d[1], temploadreg3\n" + ".word 0x6fa4e1d2 // udot v18.4s, v14.16b, v4.4b[1]\n" + "ldr temploadreg3, [%[b_ptr0], #0x38]\n" + ".word 0x6fa5e1d6 // udot v22.4s, v14.16b, v5.4b[1]\n" + "ldr d12, [%[b_ptr0], #0x40]\n" + "ins v8.d[1], temploadreg0\n" + ".word 0x6fa4e1f3 // udot v19.4s, v15.16b, v4.4b[1]\n" + "ldr temploadreg0, [%[b_ptr0], #0x48]\n" + ".word 0x6fa5e1f7 // udot v23.4s, v15.16b, v5.4b[1]\n" + "ldr d13, [%[b_ptr0], #0x50]\n" + "ins v9.d[1], temploadreg1\n" + ".word 0x6f84e910 // udot v16.4s, v8.16b, v4.4b[2]\n" + "ldr temploadreg1, [%[b_ptr0], #0x58]\n" + ".word 0x6f85e914 // udot v20.4s, v8.16b, v5.4b[2]\n" + "ldr d14, [%[b_ptr0], #0x60]\n" + "ins v10.d[1], temploadreg2\n" + ".word 0x6f84e931 // udot v17.4s, v9.16b, v4.4b[2]\n" + "ldr temploadreg2, [%[b_ptr0], #0x68]\n" + ".word 0x6f85e935 // udot v21.4s, v9.16b, v5.4b[2]\n" + "ldr d15, [%[b_ptr0], #0x70]\n" + "ins v11.d[1], temploadreg3\n" + ".word 0x6f84e952 // udot v18.4s, v10.16b, v4.4b[2]\n" + "ldr temploadreg3, [%[b_ptr0], #0x78]\n" + ".word 0x6f85e956 // udot v22.4s, v10.16b, v5.4b[2]\n" + "ins v12.d[1], temploadreg0\n" + "ins v13.d[1], temploadreg1\n" + "add %[b_ptr0], %[b_ptr0], #0x80\n" + ".word 0x6f84e973 // udot v19.4s, v11.16b, v4.4b[2]\n" + "ins v14.d[1], temploadreg2\n" + ".word 0x6f85e977 // udot v23.4s, v11.16b, v5.4b[2]\n" + "ins v15.d[1], temploadreg3\n" + ".word 0x6fa4e990 // udot v16.4s, v12.16b, v4.4b[3]\n" + ".word 0x6fa5e994 // udot v20.4s, v12.16b, v5.4b[3]\n" + ".word 0x6fa4e9b1 // udot v17.4s, v13.16b, v4.4b[3]\n" + ".word 0x6fa5e9b5 // udot v21.4s, v13.16b, v5.4b[3]\n" + ".word 0x6fa4e9d2 // udot v18.4s, v14.16b, v4.4b[3]\n" + ".word 0x6fa5e9d6 // udot v22.4s, v14.16b, v5.4b[3]\n" + ".word 0x6fa4e9f3 // udot v19.4s, v15.16b, v4.4b[3]\n" + ".word 0x6fa5e9f7 // udot v23.4s, v15.16b, v5.4b[3]\n" + "b 5f\n" + "4:\n" + ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" + "ldr temploadreg0, [%[b_ptr0], #0x8]\n" + ".word 0x6f81e114 // udot v20.4s, v8.16b, v1.4b[0]\n" + "ldr d8, [%[b_ptr0]]\n" + ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" + "ldr temploadreg1, [%[b_ptr0], #0x18]\n" + ".word 0x6f81e135 // udot v21.4s, v9.16b, v1.4b[0]\n" + "ldr d9, [%[b_ptr0], #0x10]\n" + ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" + "ldr temploadreg2, [%[b_ptr0], #0x28]\n" + ".word 0x6f81e156 // udot v22.4s, v10.16b, v1.4b[0]\n" + "ldr d10, [%[b_ptr0], #0x20]\n" + ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" + "ldr temploadreg3, [%[b_ptr0], #0x38]\n" + ".word 0x6f81e177 // udot v23.4s, v11.16b, v1.4b[0]\n" + "ldr d11, [%[b_ptr0], #0x30]\n" + ".word 0x6fa0e190 // udot v16.4s, v12.16b, v0.4b[1]\n" + "ins v8.d[1], temploadreg0\n" + ".word 0x6fa1e194 // udot v20.4s, v12.16b, v1.4b[1]\n" + "ldr d12, [%[b_ptr0], #0x40]\n" + ".word 0x6fa0e1b1 // udot v17.4s, v13.16b, v0.4b[1]\n" + "ldr temploadreg0, [%[b_ptr0], #0x48]\n" + ".word 0x6fa1e1b5 // udot v21.4s, v13.16b, v1.4b[1]\n" + "ldr d13, [%[b_ptr0], #0x50]\n" + ".word 0x6fa0e1d2 // udot v18.4s, v14.16b, v0.4b[1]\n" + "ins v9.d[1], temploadreg1\n" + ".word 0x6fa1e1d6 // udot v22.4s, v14.16b, v1.4b[1]\n" + "ldr temploadreg1, [%[b_ptr0], #0x58]\n" + ".word 0x6fa0e1f3 // udot v19.4s, v15.16b, v0.4b[1]\n" + "ldr d14, [%[b_ptr0], #0x60]\n" + ".word 0x6fa1e1f7 // udot v23.4s, v15.16b, v1.4b[1]\n" + "ins v10.d[1], temploadreg2\n" + ".word 0x6f80e910 // udot v16.4s, v8.16b, v0.4b[2]\n" + "ldr temploadreg2, [%[b_ptr0], #0x68]\n" + ".word 0x6f81e914 // udot v20.4s, v8.16b, v1.4b[2]\n" + "ldr d15, [%[b_ptr0], #0x70]\n" + ".word 0x6f80e931 // udot v17.4s, v9.16b, v0.4b[2]\n" + "ins v11.d[1], temploadreg3\n" + ".word 0x6f81e935 // udot v21.4s, v9.16b, v1.4b[2]\n" + "ldr temploadreg3, [%[b_ptr0], #0x78]\n" + ".word 0x6f80e952 // udot v18.4s, v10.16b, v0.4b[2]\n" + "ins v12.d[1], temploadreg0\n" + ".word 0x6f81e956 // udot v22.4s, v10.16b, v1.4b[2]\n" + "ins v13.d[1], temploadreg1\n" + ".word 0x6f80e973 // udot v19.4s, v11.16b, v0.4b[2]\n" + "ins v14.d[1], temploadreg2\n" + ".word 0x6f81e977 // udot v23.4s, v11.16b, v1.4b[2]\n" + "ins v15.d[1], temploadreg3\n" + ".word 0x6fa0e990 // udot v16.4s, v12.16b, v0.4b[3]\n" + "add %[b_ptr0], %[b_ptr0], #0x80\n" + ".word 0x6fa1e994 // udot v20.4s, v12.16b, v1.4b[3]\n" + ".word 0x6fa0e9b1 // udot v17.4s, v13.16b, v0.4b[3]\n" + ".word 0x6fa1e9b5 // udot v21.4s, v13.16b, v1.4b[3]\n" + ".word 0x6fa0e9d2 // udot v18.4s, v14.16b, v0.4b[3]\n" + ".word 0x6fa1e9d6 // udot v22.4s, v14.16b, v1.4b[3]\n" + ".word 0x6fa0e9f3 // udot v19.4s, v15.16b, v0.4b[3]\n" + ".word 0x6fa1e9f7 // udot v23.4s, v15.16b, v1.4b[3]\n" + "5:\n" + "cbz %[blocks], 6f\n" + "7:\n" + "ldr q8, [%[b_ptr0]]\n" + "subs %[blocks], %[blocks], #0x1\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + "ldr s0, [%[a_ptr0]]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + "add %[a_ptr0], %[a_ptr0], #0x4\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + "add %[b_ptr0], %[b_ptr0], #0x40\n" + ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" + "ldr s1, [a_ptr1]\n" + ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" + "add a_ptr1, a_ptr1, #0x4\n" + ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" + ".word 0x6f81e114 // udot v20.4s, v8.16b, v1.4b[0]\n" + ".word 0x6f81e135 // udot v21.4s, v9.16b, v1.4b[0]\n" + ".word 0x6f81e156 // udot v22.4s, v10.16b, v1.4b[0]\n" + ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" + ".word 0x6f81e177 // udot v23.4s, v11.16b, v1.4b[0]\n" + "b.ne 7b\n" + "6:\n" + "cbz %[odds], 8f\n" + "ld1 {v0.b}[0], [%[a_ptr0]], #1\n" + "ld1 {v1.b}[0], [a_ptr1], #1\n" + "subs %[odds], %[odds], #0x1\n" + "b.eq 9f\n" + "ld1 {v0.b}[1], [%[a_ptr0]], #1\n" + "ld1 {v1.b}[1], [a_ptr1], #1\n" + "subs %[odds], %[odds], #0x1\n" + "b.eq 9f\n" + "ld1 {v0.b}[2], [%[a_ptr0]]\n" + "ld1 {v1.b}[2], [a_ptr1]\n" + "9:\n" + "ldr q8, [%[b_ptr0]]\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" + ".word 0x6f81e114 // udot v20.4s, v8.16b, v1.4b[0]\n" + ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" + ".word 0x6f81e135 // udot v21.4s, v9.16b, v1.4b[0]\n" + ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" + ".word 0x6f81e156 // udot v22.4s, v10.16b, v1.4b[0]\n" + ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" + ".word 0x6f81e177 // udot v23.4s, v11.16b, v1.4b[0]\n" + "8:\n" + "str q16, [%[c_ptr0]]\n" + "str q17, [%[c_ptr0], #0x10]\n" + "str q18, [%[c_ptr0], #0x20]\n" + "str q19, [%[c_ptr0], #0x30]\n" + "add %[c_ptr0], %[c_ptr0], #0x40\n" + "str q20, [c_ptr1]\n" + "str q21, [c_ptr1, #0x10]\n" + "str q22, [c_ptr1, #0x20]\n" + "str q23, [c_ptr1, #0x30]\n" + ".unreq a_ptr1\n" + ".unreq c_ptr1\n" + ".unreq temploadreg0\n" + ".unreq temploadreg1\n" + ".unreq temploadreg2\n" + ".unreq temploadreg3\n" + : [a_ptr0] "+r" (a_ptr0), [b_ptr0] "+r" (b_ptr0), [c_ptr0] "+r" (c_ptr0), [loops] "+r" (loops), [regs] "+r" (regs), [blocks] "+r" (blocks), [odds] "+r" (odds) + : [betaptr] "r" (betaptr), [width] "r" (width), [beta0] "r" (beta0), [lda] "r" (ldab), [ldc] "r" (ldcb) + : "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x0", "x1", "x2", "x3", "x4", "x5", "cc", "memory" ); break; case 3: __asm __volatile ( - "a_ptr1 .req X0\n" - "a_ptr2 .req X1\n" - "c_ptr1 .req X2\n" - "c_ptr2 .req X3\n" - "temploadreg0 .req X4\n" - "temploadreg1 .req X5\n" - "temploadreg2 .req X6\n" - "temploadreg3 .req X7\n" - "add a_ptr1, %[a_ptr0], %[lda]\n" - "add c_ptr1, %[c_ptr0], %[ldc]\n" - "add a_ptr2, a_ptr1, %[lda]\n" - "add c_ptr2, c_ptr1, %[ldc]\n" - "cbz %[beta0], 1f\n" - "movi v16.4s, #0\n" - "ldr q0, [%[a_ptr0]]\n" - "movi v17.4s, #0\n" - "ldr q1, [a_ptr1]\n" - "movi v18.4s, #0\n" - "ldr q2, [a_ptr2]\n" - "movi v19.4s, #0\n" - "ldr q8, [%[b_ptr0]]\n" - "movi v20.4s, #0\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - "movi v21.4s, #0\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - "movi v22.4s, #0\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - "movi v23.4s, #0\n" - "ldr q12, [%[b_ptr0], #0x40]\n" - "movi v24.4s, #0\n" - "ldr q13, [%[b_ptr0], #0x50]\n" - "movi v25.4s, #0\n" - "ldr d14, [%[b_ptr0], #0x60]\n" - "movi v26.4s, #0\n" - "ldr temploadreg2, [%[b_ptr0], #0x68]\n" - "movi v27.4s, #0\n" - "add %[a_ptr0], %[a_ptr0], #0x10\n" - "add a_ptr1, a_ptr1, #0x10\n" - "ins v14.d[1], temploadreg2\n" - "add a_ptr2, a_ptr2, #0x10\n" - "add %[b_ptr0], %[b_ptr0], #0x80\n" - "cbz %[loops], 2f\n" - "b 3f\n" - "1:\n" - "ld1r {v15.4s}, [%[betaptr]]\n" - "ldr q16, [%[c_ptr0]]\n" - "ldr q17, [%[c_ptr0], #0x10]\n" - "ldr q18, [%[c_ptr0], #0x20]\n" - "ldr q19, [%[c_ptr0], #0x30]\n" - "mul v16.4s, v16.4s, v15.4s\n" - "ldr q20, [c_ptr1]\n" - "mul v17.4s, v17.4s, v15.4s\n" - "ldr q21, [c_ptr1, #0x10]\n" - "mul v18.4s, v18.4s, v15.4s\n" - "ldr q22, [c_ptr1, #0x20]\n" - "mul v19.4s, v19.4s, v15.4s\n" - "ldr q23, [c_ptr1, #0x30]\n" - "mul v20.4s, v20.4s, v15.4s\n" - "ldr q24, [c_ptr2]\n" - "mul v21.4s, v21.4s, v15.4s\n" - "ldr q25, [c_ptr2, #0x10]\n" - "mul v22.4s, v22.4s, v15.4s\n" - "ldr q26, [c_ptr2, #0x20]\n" - "mul v23.4s, v23.4s, v15.4s\n" - "ldr q27, [c_ptr2, #0x30]\n" - "mul v24.4s, v24.4s, v15.4s\n" - "ldr q0, [%[a_ptr0]]\n" - "mul v25.4s, v25.4s, v15.4s\n" - "ldr q1, [a_ptr1]\n" - "mul v26.4s, v26.4s, v15.4s\n" - "ldr q2, [a_ptr2]\n" - "mul v27.4s, v27.4s, v15.4s\n" - "ldr q8, [%[b_ptr0]]\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - "add %[a_ptr0], %[a_ptr0], #0x10\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - "add a_ptr1, a_ptr1, #0x10\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - "add a_ptr2, a_ptr2, #0x10\n" - "ldr q12, [%[b_ptr0], #0x40]\n" - "ldr q13, [%[b_ptr0], #0x50]\n" - "ldr d14, [%[b_ptr0], #0x60]\n" - "ldr temploadreg2, [%[b_ptr0], #0x68]\n" - "add %[b_ptr0], %[b_ptr0], #0x80\n" - "ins v14.d[1], temploadreg2\n" - "cbz %[loops], 2f\n" - "3:\n" - ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" - "ldr d15, [%[b_ptr0], #-0x10]\n" - ".word 0x6f81e114 // udot v20.4s, v8.16b, v1.4b[0]\n" - "ldr temploadreg3, [%[b_ptr0], #-0x8]\n" - ".word 0x6f82e118 // udot v24.4s, v8.16b, v2.4b[0]\n" - "ldr d4, [%[a_ptr0]]\n" - ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" - "ldr temploadreg0, [%[a_ptr0], #0x8]\n" - ".word 0x6f81e135 // udot v21.4s, v9.16b, v1.4b[0]\n" - "ldr d5, [a_ptr1]\n" - ".word 0x6f82e139 // udot v25.4s, v9.16b, v2.4b[0]\n" - "ldr temploadreg1, [a_ptr1, #0x8]\n" - ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" - "ldr d6, [a_ptr2]\n" - ".word 0x6f81e156 // udot v22.4s, v10.16b, v1.4b[0]\n" - "ldr temploadreg2, [a_ptr2, #0x8]\n" - ".word 0x6f82e15a // udot v26.4s, v10.16b, v2.4b[0]\n" - "ldr d8, [%[b_ptr0]]\n" - ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" - "ins v4.d[1], temploadreg0\n" - ".word 0x6f81e177 // udot v23.4s, v11.16b, v1.4b[0]\n" - "ldr temploadreg0, [%[b_ptr0], #0x8]\n" - ".word 0x6f82e17b // udot v27.4s, v11.16b, v2.4b[0]\n" - "ldr d9, [%[b_ptr0], #0x10]\n" - ".word 0x6fa0e190 // udot v16.4s, v12.16b, v0.4b[1]\n" - "ins v5.d[1], temploadreg1\n" - ".word 0x6fa1e194 // udot v20.4s, v12.16b, v1.4b[1]\n" - "ldr temploadreg1, [%[b_ptr0], #0x18]\n" - ".word 0x6fa2e198 // udot v24.4s, v12.16b, v2.4b[1]\n" - "ldr d10, [%[b_ptr0], #0x20]\n" - ".word 0x6fa0e1b1 // udot v17.4s, v13.16b, v0.4b[1]\n" - "ins v6.d[1], temploadreg2\n" - ".word 0x6fa1e1b5 // udot v21.4s, v13.16b, v1.4b[1]\n" - "ldr temploadreg2, [%[b_ptr0], #0x28]\n" - ".word 0x6fa2e1b9 // udot v25.4s, v13.16b, v2.4b[1]\n" - "ldr d11, [%[b_ptr0], #0x30]\n" - ".word 0x6fa0e1d2 // udot v18.4s, v14.16b, v0.4b[1]\n" - "ins v15.d[1], temploadreg3\n" - ".word 0x6fa1e1d6 // udot v22.4s, v14.16b, v1.4b[1]\n" - "ldr temploadreg3, [%[b_ptr0], #0x38]\n" - ".word 0x6fa2e1da // udot v26.4s, v14.16b, v2.4b[1]\n" - "ldr d12, [%[b_ptr0], #0x40]\n" - "ins v8.d[1], temploadreg0\n" - "subs %[loops], %[loops], #0x1\n" - ".word 0x6fa0e1f3 // udot v19.4s, v15.16b, v0.4b[1]\n" - "ldr temploadreg0, [%[b_ptr0], #0x48]\n" - ".word 0x6fa1e1f7 // udot v23.4s, v15.16b, v1.4b[1]\n" - "ldr d13, [%[b_ptr0], #0x50]\n" - ".word 0x6fa2e1fb // udot v27.4s, v15.16b, v2.4b[1]\n" - "ins v9.d[1], temploadreg1\n" - ".word 0x6f80e910 // udot v16.4s, v8.16b, v0.4b[2]\n" - "ldr temploadreg1, [%[b_ptr0], #0x58]\n" - ".word 0x6f81e914 // udot v20.4s, v8.16b, v1.4b[2]\n" - "ldr d14, [%[b_ptr0], #0x60]\n" - ".word 0x6f82e918 // udot v24.4s, v8.16b, v2.4b[2]\n" - "ins v10.d[1], temploadreg2\n" - ".word 0x6f80e931 // udot v17.4s, v9.16b, v0.4b[2]\n" - "ldr temploadreg2, [%[b_ptr0], #0x68]\n" - ".word 0x6f81e935 // udot v21.4s, v9.16b, v1.4b[2]\n" - "ldr d15, [%[b_ptr0], #0x70]\n" - ".word 0x6f82e939 // udot v25.4s, v9.16b, v2.4b[2]\n" - "ins v11.d[1], temploadreg3\n" - ".word 0x6f80e952 // udot v18.4s, v10.16b, v0.4b[2]\n" - "ldr temploadreg3, [%[b_ptr0], #0x78]\n" - ".word 0x6f81e956 // udot v22.4s, v10.16b, v1.4b[2]\n" - "ins v12.d[1], temploadreg0\n" - ".word 0x6f82e95a // udot v26.4s, v10.16b, v2.4b[2]\n" - "ins v13.d[1], temploadreg1\n" - ".word 0x6f80e973 // udot v19.4s, v11.16b, v0.4b[2]\n" - "ins v14.d[1], temploadreg2\n" - ".word 0x6f81e977 // udot v23.4s, v11.16b, v1.4b[2]\n" - "ins v15.d[1], temploadreg3\n" - ".word 0x6f82e97b // udot v27.4s, v11.16b, v2.4b[2]\n" - "prfm PLDL1KEEP, [%[a_ptr0], #0x40]\n" - ".word 0x6fa0e990 // udot v16.4s, v12.16b, v0.4b[3]\n" - "add %[b_ptr0], %[b_ptr0], #0x100\n" - ".word 0x6fa1e994 // udot v20.4s, v12.16b, v1.4b[3]\n" - "ldr d8, [%[b_ptr0], #-0x80]\n" - ".word 0x6fa2e998 // udot v24.4s, v12.16b, v2.4b[3]\n" - "ldr temploadreg0, [%[b_ptr0], #-0x78]\n" - ".word 0x6fa0e9b1 // udot v17.4s, v13.16b, v0.4b[3]\n" - "ldr d9, [%[b_ptr0], #-0x70]\n" - ".word 0x6fa1e9b5 // udot v21.4s, v13.16b, v1.4b[3]\n" - "ldr temploadreg1, [%[b_ptr0], #-0x68]\n" - ".word 0x6fa2e9b9 // udot v25.4s, v13.16b, v2.4b[3]\n" - "ldr d10, [%[b_ptr0], #-0x60]\n" - ".word 0x6fa0e9d2 // udot v18.4s, v14.16b, v0.4b[3]\n" - "ldr temploadreg2, [%[b_ptr0], #-0x58]\n" - ".word 0x6fa1e9d6 // udot v22.4s, v14.16b, v1.4b[3]\n" - "ldr d11, [%[b_ptr0], #-0x50]\n" - ".word 0x6fa2e9da // udot v26.4s, v14.16b, v2.4b[3]\n" - "ldr temploadreg3, [%[b_ptr0], #-0x48]\n" - ".word 0x6fa0e9f3 // udot v19.4s, v15.16b, v0.4b[3]\n" - "ldr d12, [%[b_ptr0], #-0x40]\n" - ".word 0x6fa1e9f7 // udot v23.4s, v15.16b, v1.4b[3]\n" - "ins v8.d[1], temploadreg0\n" - ".word 0x6fa2e9fb // udot v27.4s, v15.16b, v2.4b[3]\n" - "ldr temploadreg0, [%[b_ptr0], #-0x38]\n" - "ldr d13, [%[b_ptr0], #-0x30]\n" - "add %[a_ptr0], %[a_ptr0], #0x20\n" - ".word 0x6f84e110 // udot v16.4s, v8.16b, v4.4b[0]\n" - "ins v9.d[1], temploadreg1\n" - ".word 0x6f85e114 // udot v20.4s, v8.16b, v5.4b[0]\n" - "ldr temploadreg1, [%[b_ptr0], #-0x28]\n" - ".word 0x6f86e118 // udot v24.4s, v8.16b, v6.4b[0]\n" - "ldr d14, [%[b_ptr0], #-0x20]\n" - "ins v10.d[1], temploadreg2\n" - "add a_ptr1, a_ptr1, #0x20\n" - ".word 0x6f84e131 // udot v17.4s, v9.16b, v4.4b[0]\n" - "ldr temploadreg2, [%[b_ptr0], #-0x18]\n" - ".word 0x6f85e135 // udot v21.4s, v9.16b, v5.4b[0]\n" - "ldr d15, [%[b_ptr0], #-0x10]\n" - ".word 0x6f86e139 // udot v25.4s, v9.16b, v6.4b[0]\n" - "ins v11.d[1], temploadreg3\n" - ".word 0x6f84e152 // udot v18.4s, v10.16b, v4.4b[0]\n" - "ldr temploadreg3, [%[b_ptr0], #-0x8]\n" - ".word 0x6f85e156 // udot v22.4s, v10.16b, v5.4b[0]\n" - "ldr d0, [%[a_ptr0], #-0x10]\n" - ".word 0x6f86e15a // udot v26.4s, v10.16b, v6.4b[0]\n" - "ins v12.d[1], temploadreg0\n" - ".word 0x6f84e173 // udot v19.4s, v11.16b, v4.4b[0]\n" - "ldr temploadreg0, [%[a_ptr0], #-0x8]\n" - ".word 0x6f85e177 // udot v23.4s, v11.16b, v5.4b[0]\n" - "ldr d1, [a_ptr1, #-0x10]\n" - ".word 0x6f86e17b // udot v27.4s, v11.16b, v6.4b[0]\n" - "ins v13.d[1], temploadreg1\n" - ".word 0x6fa4e190 // udot v16.4s, v12.16b, v4.4b[1]\n" - "ldr temploadreg1, [a_ptr1, #-0x8]\n" - ".word 0x6fa5e194 // udot v20.4s, v12.16b, v5.4b[1]\n" - "ins v14.d[1], temploadreg2\n" - ".word 0x6fa6e198 // udot v24.4s, v12.16b, v6.4b[1]\n" - "ldr d8, [%[b_ptr0]]\n" - ".word 0x6fa4e1b1 // udot v17.4s, v13.16b, v4.4b[1]\n" - "ins v0.d[1], temploadreg0\n" - ".word 0x6fa5e1b5 // udot v21.4s, v13.16b, v5.4b[1]\n" - "ldr temploadreg0, [%[b_ptr0], #0x8]\n" - ".word 0x6fa6e1b9 // udot v25.4s, v13.16b, v6.4b[1]\n" - "ldr d9, [%[b_ptr0], #0x10]\n" - ".word 0x6fa4e1d2 // udot v18.4s, v14.16b, v4.4b[1]\n" - "ins v1.d[1], temploadreg1\n" - ".word 0x6fa5e1d6 // udot v22.4s, v14.16b, v5.4b[1]\n" - "ldr temploadreg1, [%[b_ptr0], #0x18]\n" - ".word 0x6fa6e1da // udot v26.4s, v14.16b, v6.4b[1]\n" - "ldr d10, [%[b_ptr0], #0x20]\n" - "ldr d11, [%[b_ptr0], #0x30]\n" - "add a_ptr2, a_ptr2, #0x20\n" - "ins v15.d[1], temploadreg3\n" - "prfm PLDL1KEEP, [a_ptr1, #0x40]\n" - "ldr d2, [a_ptr2, #-0x10]\n" - "prfm PLDL1KEEP, [a_ptr2, #0x40]\n" - ".word 0x6fa4e1f3 // udot v19.4s, v15.16b, v4.4b[1]\n" - "ldr temploadreg2, [a_ptr2, #-0x8]\n" - ".word 0x6fa5e1f7 // udot v23.4s, v15.16b, v5.4b[1]\n" - "ldr temploadreg3, [%[b_ptr0], #0x38]\n" - ".word 0x6fa6e1fb // udot v27.4s, v15.16b, v6.4b[1]\n" - "ldr d12, [%[b_ptr0], #0x40]\n" - "ins v8.d[1], temploadreg0\n" - "ins v2.d[1], temploadreg2\n" - "ldr temploadreg2, [%[b_ptr0], #0x28]\n" - "ldr temploadreg0, [%[b_ptr0], #0x48]\n" - ".word 0x6f84e910 // udot v16.4s, v8.16b, v4.4b[2]\n" - "ldr d13, [%[b_ptr0], #0x50]\n" - ".word 0x6f85e914 // udot v20.4s, v8.16b, v5.4b[2]\n" - "ins v9.d[1], temploadreg1\n" - ".word 0x6f86e918 // udot v24.4s, v8.16b, v6.4b[2]\n" - "ldr temploadreg1, [%[b_ptr0], #0x58]\n" - "ldr d14, [%[b_ptr0], #0x60]\n" - "ins v10.d[1], temploadreg2\n" - ".word 0x6f84e931 // udot v17.4s, v9.16b, v4.4b[2]\n" - "ldr temploadreg2, [%[b_ptr0], #0x68]\n" - ".word 0x6f85e935 // udot v21.4s, v9.16b, v5.4b[2]\n" - "ldr d15, [%[b_ptr0], #0x70]\n" - ".word 0x6f86e939 // udot v25.4s, v9.16b, v6.4b[2]\n" - "ins v11.d[1], temploadreg3\n" - ".word 0x6f84e952 // udot v18.4s, v10.16b, v4.4b[2]\n" - "ldr temploadreg3, [%[b_ptr0], #0x78]\n" - ".word 0x6f85e956 // udot v22.4s, v10.16b, v5.4b[2]\n" - "ins v12.d[1], temploadreg0\n" - ".word 0x6f86e95a // udot v26.4s, v10.16b, v6.4b[2]\n" - "ins v13.d[1], temploadreg1\n" - ".word 0x6f84e973 // udot v19.4s, v11.16b, v4.4b[2]\n" - "ins v14.d[1], temploadreg2\n" - ".word 0x6f85e977 // udot v23.4s, v11.16b, v5.4b[2]\n" - "ins v15.d[1], temploadreg3\n" - ".word 0x6f86e97b // udot v27.4s, v11.16b, v6.4b[2]\n" - "add %[b_ptr0], %[b_ptr0], #0x100\n" - ".word 0x6fa4e990 // udot v16.4s, v12.16b, v4.4b[3]\n" - "ldr d8, [%[b_ptr0], #-0x80]\n" - ".word 0x6fa5e994 // udot v20.4s, v12.16b, v5.4b[3]\n" - "ldr temploadreg0, [%[b_ptr0], #-0x78]\n" - ".word 0x6fa6e998 // udot v24.4s, v12.16b, v6.4b[3]\n" - "ldr d9, [%[b_ptr0], #-0x70]\n" - ".word 0x6fa4e9b1 // udot v17.4s, v13.16b, v4.4b[3]\n" - "ldr temploadreg1, [%[b_ptr0], #-0x68]\n" - ".word 0x6fa5e9b5 // udot v21.4s, v13.16b, v5.4b[3]\n" - "ldr d10, [%[b_ptr0], #-0x60]\n" - ".word 0x6fa6e9b9 // udot v25.4s, v13.16b, v6.4b[3]\n" - "ldr temploadreg2, [%[b_ptr0], #-0x58]\n" - ".word 0x6fa4e9d2 // udot v18.4s, v14.16b, v4.4b[3]\n" - "ldr d11, [%[b_ptr0], #-0x50]\n" - ".word 0x6fa5e9d6 // udot v22.4s, v14.16b, v5.4b[3]\n" - "ldr temploadreg3, [%[b_ptr0], #-0x48]\n" - ".word 0x6fa6e9da // udot v26.4s, v14.16b, v6.4b[3]\n" - "ldr d12, [%[b_ptr0], #-0x40]\n" - ".word 0x6fa4e9f3 // udot v19.4s, v15.16b, v4.4b[3]\n" - "ins v8.d[1], temploadreg0\n" - ".word 0x6fa5e9f7 // udot v23.4s, v15.16b, v5.4b[3]\n" - "ldr temploadreg0, [%[b_ptr0], #-0x38]\n" - ".word 0x6fa6e9fb // udot v27.4s, v15.16b, v6.4b[3]\n" - "ldr d13, [%[b_ptr0], #-0x30]\n" - "ins v9.d[1], temploadreg1\n" - "ldr temploadreg1, [%[b_ptr0], #-0x28]\n" - "ldr d14, [%[b_ptr0], #-0x20]\n" - "ins v10.d[1], temploadreg2\n" - "ldr temploadreg2, [%[b_ptr0], #-0x18]\n" - "ins v11.d[1], temploadreg3\n" - "ins v12.d[1], temploadreg0\n" - "ins v13.d[1], temploadreg1\n" - "ins v14.d[1], temploadreg2\n" - "b.ne 3b\n" - "2:\n" - "ldr d15, [%[b_ptr0], #-0x10]\n" - "prfm PSTL1KEEP, [%[c_ptr0]]\n" - "ldr temploadreg3, [%[b_ptr0], #-0x8]\n" - "prfm PSTL1KEEP, [c_ptr1]\n" - "prfm PSTL1KEEP, [c_ptr2]\n" - "ins v15.d[1], temploadreg3\n" - "cbz %[regs], 4f\n" - ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" - "ldr d4, [%[a_ptr0]]\n" - ".word 0x6f81e114 // udot v20.4s, v8.16b, v1.4b[0]\n" - "ldr temploadreg0, [%[a_ptr0], #0x8]\n" - ".word 0x6f82e118 // udot v24.4s, v8.16b, v2.4b[0]\n" - "ldr d5, [a_ptr1]\n" - ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" - "ldr temploadreg1, [a_ptr1, #0x8]\n" - ".word 0x6f81e135 // udot v21.4s, v9.16b, v1.4b[0]\n" - "ldr d6, [a_ptr2]\n" - ".word 0x6f82e139 // udot v25.4s, v9.16b, v2.4b[0]\n" - "ldr temploadreg2, [a_ptr2, #0x8]\n" - ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" - "ldr d8, [%[b_ptr0]]\n" - ".word 0x6f81e156 // udot v22.4s, v10.16b, v1.4b[0]\n" - "ins v4.d[1], temploadreg0\n" - ".word 0x6f82e15a // udot v26.4s, v10.16b, v2.4b[0]\n" - "ldr temploadreg0, [%[b_ptr0], #0x8]\n" - ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" - "ldr d9, [%[b_ptr0], #0x10]\n" - ".word 0x6f81e177 // udot v23.4s, v11.16b, v1.4b[0]\n" - "ins v5.d[1], temploadreg1\n" - ".word 0x6f82e17b // udot v27.4s, v11.16b, v2.4b[0]\n" - "ldr temploadreg1, [%[b_ptr0], #0x18]\n" - ".word 0x6fa0e190 // udot v16.4s, v12.16b, v0.4b[1]\n" - "ldr d10, [%[b_ptr0], #0x20]\n" - ".word 0x6fa1e194 // udot v20.4s, v12.16b, v1.4b[1]\n" - "ins v6.d[1], temploadreg2\n" - ".word 0x6fa2e198 // udot v24.4s, v12.16b, v2.4b[1]\n" - "ldr temploadreg2, [%[b_ptr0], #0x28]\n" - ".word 0x6fa0e1b1 // udot v17.4s, v13.16b, v0.4b[1]\n" - "ldr d11, [%[b_ptr0], #0x30]\n" - ".word 0x6fa1e1b5 // udot v21.4s, v13.16b, v1.4b[1]\n" - "ldr temploadreg3, [%[b_ptr0], #0x38]\n" - ".word 0x6fa2e1b9 // udot v25.4s, v13.16b, v2.4b[1]\n" - "ldr d12, [%[b_ptr0], #0x40]\n" - ".word 0x6fa0e1d2 // udot v18.4s, v14.16b, v0.4b[1]\n" - "ins v8.d[1], temploadreg0\n" - ".word 0x6fa1e1d6 // udot v22.4s, v14.16b, v1.4b[1]\n" - "ldr temploadreg0, [%[b_ptr0], #0x48]\n" - ".word 0x6fa2e1da // udot v26.4s, v14.16b, v2.4b[1]\n" - "ldr d13, [%[b_ptr0], #0x50]\n" - ".word 0x6fa0e1f3 // udot v19.4s, v15.16b, v0.4b[1]\n" - "ins v9.d[1], temploadreg1\n" - ".word 0x6fa1e1f7 // udot v23.4s, v15.16b, v1.4b[1]\n" - "ldr temploadreg1, [%[b_ptr0], #0x58]\n" - ".word 0x6fa2e1fb // udot v27.4s, v15.16b, v2.4b[1]\n" - "ldr d14, [%[b_ptr0], #0x60]\n" - ".word 0x6f80e910 // udot v16.4s, v8.16b, v0.4b[2]\n" - "ins v10.d[1], temploadreg2\n" - ".word 0x6f81e914 // udot v20.4s, v8.16b, v1.4b[2]\n" - "ldr temploadreg2, [%[b_ptr0], #0x68]\n" - ".word 0x6f82e918 // udot v24.4s, v8.16b, v2.4b[2]\n" - "ldr d15, [%[b_ptr0], #0x70]\n" - ".word 0x6f80e931 // udot v17.4s, v9.16b, v0.4b[2]\n" - "ins v11.d[1], temploadreg3\n" - ".word 0x6f81e935 // udot v21.4s, v9.16b, v1.4b[2]\n" - "ldr temploadreg3, [%[b_ptr0], #0x78]\n" - ".word 0x6f82e939 // udot v25.4s, v9.16b, v2.4b[2]\n" - "ins v12.d[1], temploadreg0\n" - ".word 0x6f80e952 // udot v18.4s, v10.16b, v0.4b[2]\n" - "ins v13.d[1], temploadreg1\n" - ".word 0x6f81e956 // udot v22.4s, v10.16b, v1.4b[2]\n" - "ins v14.d[1], temploadreg2\n" - ".word 0x6f82e95a // udot v26.4s, v10.16b, v2.4b[2]\n" - "ins v15.d[1], temploadreg3\n" - ".word 0x6f80e973 // udot v19.4s, v11.16b, v0.4b[2]\n" - "add %[b_ptr0], %[b_ptr0], #0x100\n" - ".word 0x6f81e977 // udot v23.4s, v11.16b, v1.4b[2]\n" - "ldr d8, [%[b_ptr0], #-0x80]\n" - ".word 0x6f82e97b // udot v27.4s, v11.16b, v2.4b[2]\n" - "ldr temploadreg0, [%[b_ptr0], #-0x78]\n" - ".word 0x6fa0e990 // udot v16.4s, v12.16b, v0.4b[3]\n" - "ldr d9, [%[b_ptr0], #-0x70]\n" - ".word 0x6fa1e994 // udot v20.4s, v12.16b, v1.4b[3]\n" - "ldr temploadreg1, [%[b_ptr0], #-0x68]\n" - ".word 0x6fa2e998 // udot v24.4s, v12.16b, v2.4b[3]\n" - "ldr d10, [%[b_ptr0], #-0x60]\n" - ".word 0x6fa0e9b1 // udot v17.4s, v13.16b, v0.4b[3]\n" - "ldr temploadreg2, [%[b_ptr0], #-0x58]\n" - ".word 0x6fa1e9b5 // udot v21.4s, v13.16b, v1.4b[3]\n" - "ldr d11, [%[b_ptr0], #-0x50]\n" - ".word 0x6fa2e9b9 // udot v25.4s, v13.16b, v2.4b[3]\n" - "ldr temploadreg3, [%[b_ptr0], #-0x48]\n" - ".word 0x6fa0e9d2 // udot v18.4s, v14.16b, v0.4b[3]\n" - "ldr d12, [%[b_ptr0], #-0x40]\n" - ".word 0x6fa1e9d6 // udot v22.4s, v14.16b, v1.4b[3]\n" - "ins v8.d[1], temploadreg0\n" - ".word 0x6fa2e9da // udot v26.4s, v14.16b, v2.4b[3]\n" - "ldr temploadreg0, [%[b_ptr0], #-0x38]\n" - ".word 0x6fa0e9f3 // udot v19.4s, v15.16b, v0.4b[3]\n" - "ldr d13, [%[b_ptr0], #-0x30]\n" - ".word 0x6fa1e9f7 // udot v23.4s, v15.16b, v1.4b[3]\n" - "ins v9.d[1], temploadreg1\n" - ".word 0x6fa2e9fb // udot v27.4s, v15.16b, v2.4b[3]\n" - "ldr temploadreg1, [%[b_ptr0], #-0x28]\n" - ".word 0x6f84e110 // udot v16.4s, v8.16b, v4.4b[0]\n" - "ldr d14, [%[b_ptr0], #-0x20]\n" - ".word 0x6f85e114 // udot v20.4s, v8.16b, v5.4b[0]\n" - "ins v10.d[1], temploadreg2\n" - ".word 0x6f86e118 // udot v24.4s, v8.16b, v6.4b[0]\n" - "ldr temploadreg2, [%[b_ptr0], #-0x18]\n" - ".word 0x6f84e131 // udot v17.4s, v9.16b, v4.4b[0]\n" - "ldr d15, [%[b_ptr0], #-0x10]\n" - ".word 0x6f85e135 // udot v21.4s, v9.16b, v5.4b[0]\n" - "ins v11.d[1], temploadreg3\n" - ".word 0x6f86e139 // udot v25.4s, v9.16b, v6.4b[0]\n" - "ldr temploadreg3, [%[b_ptr0], #-0x8]\n" - ".word 0x6f84e152 // udot v18.4s, v10.16b, v4.4b[0]\n" - "ldr d8, [%[b_ptr0]]\n" - ".word 0x6f85e156 // udot v22.4s, v10.16b, v5.4b[0]\n" - "ins v12.d[1], temploadreg0\n" - ".word 0x6f86e15a // udot v26.4s, v10.16b, v6.4b[0]\n" - "ldr temploadreg0, [%[b_ptr0], #0x8]\n" - ".word 0x6f84e173 // udot v19.4s, v11.16b, v4.4b[0]\n" - "ldr d9, [%[b_ptr0], #0x10]\n" - ".word 0x6f85e177 // udot v23.4s, v11.16b, v5.4b[0]\n" - "ins v13.d[1], temploadreg1\n" - ".word 0x6f86e17b // udot v27.4s, v11.16b, v6.4b[0]\n" - "ldr temploadreg1, [%[b_ptr0], #0x18]\n" - ".word 0x6fa4e190 // udot v16.4s, v12.16b, v4.4b[1]\n" - "ldr d10, [%[b_ptr0], #0x20]\n" - ".word 0x6fa5e194 // udot v20.4s, v12.16b, v5.4b[1]\n" - "ins v14.d[1], temploadreg2\n" - ".word 0x6fa6e198 // udot v24.4s, v12.16b, v6.4b[1]\n" - "ldr temploadreg2, [%[b_ptr0], #0x28]\n" - ".word 0x6fa4e1b1 // udot v17.4s, v13.16b, v4.4b[1]\n" - "ldr d11, [%[b_ptr0], #0x30]\n" - ".word 0x6fa5e1b5 // udot v21.4s, v13.16b, v5.4b[1]\n" - "ins v15.d[1], temploadreg3\n" - ".word 0x6fa6e1b9 // udot v25.4s, v13.16b, v6.4b[1]\n" - "ldr temploadreg3, [%[b_ptr0], #0x38]\n" - ".word 0x6fa4e1d2 // udot v18.4s, v14.16b, v4.4b[1]\n" - "ldr d12, [%[b_ptr0], #0x40]\n" - ".word 0x6fa5e1d6 // udot v22.4s, v14.16b, v5.4b[1]\n" - "ins v8.d[1], temploadreg0\n" - ".word 0x6fa6e1da // udot v26.4s, v14.16b, v6.4b[1]\n" - "ldr temploadreg0, [%[b_ptr0], #0x48]\n" - ".word 0x6fa4e1f3 // udot v19.4s, v15.16b, v4.4b[1]\n" - "ldr d13, [%[b_ptr0], #0x50]\n" - ".word 0x6fa5e1f7 // udot v23.4s, v15.16b, v5.4b[1]\n" - "ins v9.d[1], temploadreg1\n" - ".word 0x6fa6e1fb // udot v27.4s, v15.16b, v6.4b[1]\n" - "ldr temploadreg1, [%[b_ptr0], #0x58]\n" - ".word 0x6f84e910 // udot v16.4s, v8.16b, v4.4b[2]\n" - "ldr d14, [%[b_ptr0], #0x60]\n" - ".word 0x6f85e914 // udot v20.4s, v8.16b, v5.4b[2]\n" - "ins v10.d[1], temploadreg2\n" - ".word 0x6f86e918 // udot v24.4s, v8.16b, v6.4b[2]\n" - "ldr temploadreg2, [%[b_ptr0], #0x68]\n" - ".word 0x6f84e931 // udot v17.4s, v9.16b, v4.4b[2]\n" - "ldr d15, [%[b_ptr0], #0x70]\n" - ".word 0x6f85e935 // udot v21.4s, v9.16b, v5.4b[2]\n" - "ins v11.d[1], temploadreg3\n" - ".word 0x6f86e939 // udot v25.4s, v9.16b, v6.4b[2]\n" - "ldr temploadreg3, [%[b_ptr0], #0x78]\n" - ".word 0x6f84e952 // udot v18.4s, v10.16b, v4.4b[2]\n" - "ins v12.d[1], temploadreg0\n" - ".word 0x6f85e956 // udot v22.4s, v10.16b, v5.4b[2]\n" - "ins v13.d[1], temploadreg1\n" - ".word 0x6f86e95a // udot v26.4s, v10.16b, v6.4b[2]\n" - "ins v14.d[1], temploadreg2\n" - ".word 0x6f84e973 // udot v19.4s, v11.16b, v4.4b[2]\n" - "ins v15.d[1], temploadreg3\n" - ".word 0x6f85e977 // udot v23.4s, v11.16b, v5.4b[2]\n" - "add %[b_ptr0], %[b_ptr0], #0x80\n" - ".word 0x6f86e97b // udot v27.4s, v11.16b, v6.4b[2]\n" - "add %[a_ptr0], %[a_ptr0], #0x10\n" - ".word 0x6fa4e990 // udot v16.4s, v12.16b, v4.4b[3]\n" - "add a_ptr1, a_ptr1, #0x10\n" - ".word 0x6fa5e994 // udot v20.4s, v12.16b, v5.4b[3]\n" - "add a_ptr2, a_ptr2, #0x10\n" - ".word 0x6fa6e998 // udot v24.4s, v12.16b, v6.4b[3]\n" - ".word 0x6fa4e9b1 // udot v17.4s, v13.16b, v4.4b[3]\n" - ".word 0x6fa5e9b5 // udot v21.4s, v13.16b, v5.4b[3]\n" - ".word 0x6fa6e9b9 // udot v25.4s, v13.16b, v6.4b[3]\n" - ".word 0x6fa4e9d2 // udot v18.4s, v14.16b, v4.4b[3]\n" - ".word 0x6fa5e9d6 // udot v22.4s, v14.16b, v5.4b[3]\n" - ".word 0x6fa6e9da // udot v26.4s, v14.16b, v6.4b[3]\n" - ".word 0x6fa4e9f3 // udot v19.4s, v15.16b, v4.4b[3]\n" - ".word 0x6fa5e9f7 // udot v23.4s, v15.16b, v5.4b[3]\n" - ".word 0x6fa6e9fb // udot v27.4s, v15.16b, v6.4b[3]\n" - "b 5f\n" - "4:\n" - ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" - "ldr temploadreg0, [%[b_ptr0], #0x8]\n" - ".word 0x6f81e114 // udot v20.4s, v8.16b, v1.4b[0]\n" - "ldr temploadreg1, [%[b_ptr0], #0x18]\n" - ".word 0x6f82e118 // udot v24.4s, v8.16b, v2.4b[0]\n" - "ldr d8, [%[b_ptr0]]\n" - ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" - "ldr temploadreg2, [%[b_ptr0], #0x28]\n" - ".word 0x6f81e135 // udot v21.4s, v9.16b, v1.4b[0]\n" - "ldr temploadreg3, [%[b_ptr0], #0x38]\n" - ".word 0x6f82e139 // udot v25.4s, v9.16b, v2.4b[0]\n" - "ldr d9, [%[b_ptr0], #0x10]\n" - ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" - "ins v8.d[1], temploadreg0\n" - ".word 0x6f81e156 // udot v22.4s, v10.16b, v1.4b[0]\n" - "ldr temploadreg0, [%[b_ptr0], #0x48]\n" - ".word 0x6f82e15a // udot v26.4s, v10.16b, v2.4b[0]\n" - "ldr d10, [%[b_ptr0], #0x20]\n" - ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" - "ins v9.d[1], temploadreg1\n" - ".word 0x6f81e177 // udot v23.4s, v11.16b, v1.4b[0]\n" - "ldr temploadreg1, [%[b_ptr0], #0x58]\n" - ".word 0x6f82e17b // udot v27.4s, v11.16b, v2.4b[0]\n" - "ldr d11, [%[b_ptr0], #0x30]\n" - ".word 0x6fa0e190 // udot v16.4s, v12.16b, v0.4b[1]\n" - "ins v10.d[1], temploadreg2\n" - ".word 0x6fa1e194 // udot v20.4s, v12.16b, v1.4b[1]\n" - "ldr temploadreg2, [%[b_ptr0], #0x68]\n" - ".word 0x6fa2e198 // udot v24.4s, v12.16b, v2.4b[1]\n" - "ldr d12, [%[b_ptr0], #0x40]\n" - ".word 0x6fa0e1b1 // udot v17.4s, v13.16b, v0.4b[1]\n" - "ins v11.d[1], temploadreg3\n" - ".word 0x6fa1e1b5 // udot v21.4s, v13.16b, v1.4b[1]\n" - "ldr temploadreg3, [%[b_ptr0], #0x78]\n" - ".word 0x6fa2e1b9 // udot v25.4s, v13.16b, v2.4b[1]\n" - "ldr d13, [%[b_ptr0], #0x50]\n" - ".word 0x6fa0e1d2 // udot v18.4s, v14.16b, v0.4b[1]\n" - "ins v12.d[1], temploadreg0\n" - ".word 0x6fa1e1d6 // udot v22.4s, v14.16b, v1.4b[1]\n" - ".word 0x6fa2e1da // udot v26.4s, v14.16b, v2.4b[1]\n" - "ldr d14, [%[b_ptr0], #0x60]\n" - ".word 0x6fa0e1f3 // udot v19.4s, v15.16b, v0.4b[1]\n" - "ins v13.d[1], temploadreg1\n" - ".word 0x6fa1e1f7 // udot v23.4s, v15.16b, v1.4b[1]\n" - ".word 0x6fa2e1fb // udot v27.4s, v15.16b, v2.4b[1]\n" - "ldr d15, [%[b_ptr0], #0x70]\n" - ".word 0x6f80e910 // udot v16.4s, v8.16b, v0.4b[2]\n" - "ins v14.d[1], temploadreg2\n" - ".word 0x6f81e914 // udot v20.4s, v8.16b, v1.4b[2]\n" - "add %[b_ptr0], %[b_ptr0], #0x80\n" - ".word 0x6f82e918 // udot v24.4s, v8.16b, v2.4b[2]\n" - "ins v15.d[1], temploadreg3\n" - ".word 0x6f80e931 // udot v17.4s, v9.16b, v0.4b[2]\n" - ".word 0x6f81e935 // udot v21.4s, v9.16b, v1.4b[2]\n" - ".word 0x6f82e939 // udot v25.4s, v9.16b, v2.4b[2]\n" - ".word 0x6f80e952 // udot v18.4s, v10.16b, v0.4b[2]\n" - ".word 0x6f81e956 // udot v22.4s, v10.16b, v1.4b[2]\n" - ".word 0x6f82e95a // udot v26.4s, v10.16b, v2.4b[2]\n" - ".word 0x6f80e973 // udot v19.4s, v11.16b, v0.4b[2]\n" - ".word 0x6f81e977 // udot v23.4s, v11.16b, v1.4b[2]\n" - ".word 0x6f82e97b // udot v27.4s, v11.16b, v2.4b[2]\n" - ".word 0x6fa0e990 // udot v16.4s, v12.16b, v0.4b[3]\n" - ".word 0x6fa1e994 // udot v20.4s, v12.16b, v1.4b[3]\n" - ".word 0x6fa2e998 // udot v24.4s, v12.16b, v2.4b[3]\n" - ".word 0x6fa0e9b1 // udot v17.4s, v13.16b, v0.4b[3]\n" - ".word 0x6fa1e9b5 // udot v21.4s, v13.16b, v1.4b[3]\n" - ".word 0x6fa2e9b9 // udot v25.4s, v13.16b, v2.4b[3]\n" - ".word 0x6fa0e9d2 // udot v18.4s, v14.16b, v0.4b[3]\n" - ".word 0x6fa1e9d6 // udot v22.4s, v14.16b, v1.4b[3]\n" - ".word 0x6fa2e9da // udot v26.4s, v14.16b, v2.4b[3]\n" - ".word 0x6fa0e9f3 // udot v19.4s, v15.16b, v0.4b[3]\n" - ".word 0x6fa1e9f7 // udot v23.4s, v15.16b, v1.4b[3]\n" - ".word 0x6fa2e9fb // udot v27.4s, v15.16b, v2.4b[3]\n" - "5:\n" - "cbz %[blocks], 6f\n" - "7:\n" - "ldr q8, [%[b_ptr0]]\n" - "subs %[blocks], %[blocks], #0x1\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - "ldr s0, [%[a_ptr0]]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - "add %[a_ptr0], %[a_ptr0], #0x4\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - "add %[b_ptr0], %[b_ptr0], #0x40\n" - ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" - "ldr s1, [a_ptr1]\n" - ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" - "add a_ptr1, a_ptr1, #0x4\n" - ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" - "ldr s2, [a_ptr2]\n" - ".word 0x6f81e114 // udot v20.4s, v8.16b, v1.4b[0]\n" - "add a_ptr2, a_ptr2, #0x4\n" - ".word 0x6f81e135 // udot v21.4s, v9.16b, v1.4b[0]\n" - ".word 0x6f82e118 // udot v24.4s, v8.16b, v2.4b[0]\n" - ".word 0x6f82e139 // udot v25.4s, v9.16b, v2.4b[0]\n" - ".word 0x6f81e156 // udot v22.4s, v10.16b, v1.4b[0]\n" - ".word 0x6f82e15a // udot v26.4s, v10.16b, v2.4b[0]\n" - ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" - ".word 0x6f81e177 // udot v23.4s, v11.16b, v1.4b[0]\n" - ".word 0x6f82e17b // udot v27.4s, v11.16b, v2.4b[0]\n" - "b.ne 7b\n" - "6:\n" - "cbz %[odds], 8f\n" - "ld1 {v0.b}[0], [%[a_ptr0]], #1\n" - "ld1 {v1.b}[0], [a_ptr1], #1\n" - "ld1 {v2.b}[0], [a_ptr2], #1\n" - "subs %[odds], %[odds], #0x1\n" - "b.eq 9f\n" - "ld1 {v0.b}[1], [%[a_ptr0]], #1\n" - "ld1 {v1.b}[1], [a_ptr1], #1\n" - "ld1 {v2.b}[1], [a_ptr2], #1\n" - "subs %[odds], %[odds], #0x1\n" - "b.eq 9f\n" - "ld1 {v0.b}[2], [%[a_ptr0]]\n" - "ld1 {v1.b}[2], [a_ptr1]\n" - "ld1 {v2.b}[2], [a_ptr2]\n" - "9:\n" - "ldr q8, [%[b_ptr0]]\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" - ".word 0x6f81e114 // udot v20.4s, v8.16b, v1.4b[0]\n" - ".word 0x6f82e118 // udot v24.4s, v8.16b, v2.4b[0]\n" - ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" - ".word 0x6f81e135 // udot v21.4s, v9.16b, v1.4b[0]\n" - ".word 0x6f82e139 // udot v25.4s, v9.16b, v2.4b[0]\n" - ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" - ".word 0x6f81e156 // udot v22.4s, v10.16b, v1.4b[0]\n" - ".word 0x6f82e15a // udot v26.4s, v10.16b, v2.4b[0]\n" - ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" - ".word 0x6f81e177 // udot v23.4s, v11.16b, v1.4b[0]\n" - ".word 0x6f82e17b // udot v27.4s, v11.16b, v2.4b[0]\n" - "8:\n" - "str q16, [%[c_ptr0]]\n" - "str q17, [%[c_ptr0], #0x10]\n" - "str q18, [%[c_ptr0], #0x20]\n" - "str q19, [%[c_ptr0], #0x30]\n" - "add %[c_ptr0], %[c_ptr0], #0x40\n" - "str q20, [c_ptr1]\n" - "str q21, [c_ptr1, #0x10]\n" - "str q22, [c_ptr1, #0x20]\n" - "str q23, [c_ptr1, #0x30]\n" - "str q24, [c_ptr2]\n" - "str q25, [c_ptr2, #0x10]\n" - "str q26, [c_ptr2, #0x20]\n" - "str q27, [c_ptr2, #0x30]\n" - ".unreq a_ptr1\n" - ".unreq a_ptr2\n" - ".unreq c_ptr1\n" - ".unreq c_ptr2\n" - ".unreq temploadreg0\n" - ".unreq temploadreg1\n" - ".unreq temploadreg2\n" - ".unreq temploadreg3\n" - : [a_ptr0] "+r" (a_ptr0), [b_ptr0] "+r" (b_ptr0), [c_ptr0] "+r" (c_ptr0), [loops] "+r" (loops), [regs] "+r" (regs), [blocks] "+r" (blocks), [odds] "+r" (odds) - : [betaptr] "r" (betaptr), [width] "r" (width), [beta0] "r" (beta0), [lda] "r" (ldab), [ldc] "r" (ldcb) - : "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x0", "x1", "x2", "x3", "x4", "x5", "x6", "x7", "cc", "memory" + "a_ptr1 .req X0\n" + "a_ptr2 .req X1\n" + "c_ptr1 .req X2\n" + "c_ptr2 .req X3\n" + "temploadreg0 .req X4\n" + "temploadreg1 .req X5\n" + "temploadreg2 .req X6\n" + "temploadreg3 .req X7\n" + "add a_ptr1, %[a_ptr0], %[lda]\n" + "add c_ptr1, %[c_ptr0], %[ldc]\n" + "add a_ptr2, a_ptr1, %[lda]\n" + "add c_ptr2, c_ptr1, %[ldc]\n" + "cbz %[beta0], 1f\n" + "movi v16.4s, #0\n" + "ldr q0, [%[a_ptr0]]\n" + "movi v17.4s, #0\n" + "ldr q1, [a_ptr1]\n" + "movi v18.4s, #0\n" + "ldr q2, [a_ptr2]\n" + "movi v19.4s, #0\n" + "ldr q8, [%[b_ptr0]]\n" + "movi v20.4s, #0\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + "movi v21.4s, #0\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + "movi v22.4s, #0\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + "movi v23.4s, #0\n" + "ldr q12, [%[b_ptr0], #0x40]\n" + "movi v24.4s, #0\n" + "ldr q13, [%[b_ptr0], #0x50]\n" + "movi v25.4s, #0\n" + "ldr d14, [%[b_ptr0], #0x60]\n" + "movi v26.4s, #0\n" + "ldr temploadreg2, [%[b_ptr0], #0x68]\n" + "movi v27.4s, #0\n" + "add %[a_ptr0], %[a_ptr0], #0x10\n" + "add a_ptr1, a_ptr1, #0x10\n" + "ins v14.d[1], temploadreg2\n" + "add a_ptr2, a_ptr2, #0x10\n" + "add %[b_ptr0], %[b_ptr0], #0x80\n" + "cbz %[loops], 2f\n" + "b 3f\n" + "1:\n" + "ld1r {v15.4s}, [%[betaptr]]\n" + "ldr q16, [%[c_ptr0]]\n" + "ldr q17, [%[c_ptr0], #0x10]\n" + "ldr q18, [%[c_ptr0], #0x20]\n" + "ldr q19, [%[c_ptr0], #0x30]\n" + "mul v16.4s, v16.4s, v15.4s\n" + "ldr q20, [c_ptr1]\n" + "mul v17.4s, v17.4s, v15.4s\n" + "ldr q21, [c_ptr1, #0x10]\n" + "mul v18.4s, v18.4s, v15.4s\n" + "ldr q22, [c_ptr1, #0x20]\n" + "mul v19.4s, v19.4s, v15.4s\n" + "ldr q23, [c_ptr1, #0x30]\n" + "mul v20.4s, v20.4s, v15.4s\n" + "ldr q24, [c_ptr2]\n" + "mul v21.4s, v21.4s, v15.4s\n" + "ldr q25, [c_ptr2, #0x10]\n" + "mul v22.4s, v22.4s, v15.4s\n" + "ldr q26, [c_ptr2, #0x20]\n" + "mul v23.4s, v23.4s, v15.4s\n" + "ldr q27, [c_ptr2, #0x30]\n" + "mul v24.4s, v24.4s, v15.4s\n" + "ldr q0, [%[a_ptr0]]\n" + "mul v25.4s, v25.4s, v15.4s\n" + "ldr q1, [a_ptr1]\n" + "mul v26.4s, v26.4s, v15.4s\n" + "ldr q2, [a_ptr2]\n" + "mul v27.4s, v27.4s, v15.4s\n" + "ldr q8, [%[b_ptr0]]\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + "add %[a_ptr0], %[a_ptr0], #0x10\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + "add a_ptr1, a_ptr1, #0x10\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + "add a_ptr2, a_ptr2, #0x10\n" + "ldr q12, [%[b_ptr0], #0x40]\n" + "ldr q13, [%[b_ptr0], #0x50]\n" + "ldr d14, [%[b_ptr0], #0x60]\n" + "ldr temploadreg2, [%[b_ptr0], #0x68]\n" + "add %[b_ptr0], %[b_ptr0], #0x80\n" + "ins v14.d[1], temploadreg2\n" + "cbz %[loops], 2f\n" + "3:\n" + ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" + "ldr d15, [%[b_ptr0], #-0x10]\n" + ".word 0x6f81e114 // udot v20.4s, v8.16b, v1.4b[0]\n" + "ldr temploadreg3, [%[b_ptr0], #-0x8]\n" + ".word 0x6f82e118 // udot v24.4s, v8.16b, v2.4b[0]\n" + "ldr d4, [%[a_ptr0]]\n" + ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" + "ldr temploadreg0, [%[a_ptr0], #0x8]\n" + ".word 0x6f81e135 // udot v21.4s, v9.16b, v1.4b[0]\n" + "ldr d5, [a_ptr1]\n" + ".word 0x6f82e139 // udot v25.4s, v9.16b, v2.4b[0]\n" + "ldr temploadreg1, [a_ptr1, #0x8]\n" + ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" + "ldr d6, [a_ptr2]\n" + ".word 0x6f81e156 // udot v22.4s, v10.16b, v1.4b[0]\n" + "ldr temploadreg2, [a_ptr2, #0x8]\n" + ".word 0x6f82e15a // udot v26.4s, v10.16b, v2.4b[0]\n" + "ldr d8, [%[b_ptr0]]\n" + ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" + "ins v4.d[1], temploadreg0\n" + ".word 0x6f81e177 // udot v23.4s, v11.16b, v1.4b[0]\n" + "ldr temploadreg0, [%[b_ptr0], #0x8]\n" + ".word 0x6f82e17b // udot v27.4s, v11.16b, v2.4b[0]\n" + "ldr d9, [%[b_ptr0], #0x10]\n" + ".word 0x6fa0e190 // udot v16.4s, v12.16b, v0.4b[1]\n" + "ins v5.d[1], temploadreg1\n" + ".word 0x6fa1e194 // udot v20.4s, v12.16b, v1.4b[1]\n" + "ldr temploadreg1, [%[b_ptr0], #0x18]\n" + ".word 0x6fa2e198 // udot v24.4s, v12.16b, v2.4b[1]\n" + "ldr d10, [%[b_ptr0], #0x20]\n" + ".word 0x6fa0e1b1 // udot v17.4s, v13.16b, v0.4b[1]\n" + "ins v6.d[1], temploadreg2\n" + ".word 0x6fa1e1b5 // udot v21.4s, v13.16b, v1.4b[1]\n" + "ldr temploadreg2, [%[b_ptr0], #0x28]\n" + ".word 0x6fa2e1b9 // udot v25.4s, v13.16b, v2.4b[1]\n" + "ldr d11, [%[b_ptr0], #0x30]\n" + ".word 0x6fa0e1d2 // udot v18.4s, v14.16b, v0.4b[1]\n" + "ins v15.d[1], temploadreg3\n" + ".word 0x6fa1e1d6 // udot v22.4s, v14.16b, v1.4b[1]\n" + "ldr temploadreg3, [%[b_ptr0], #0x38]\n" + ".word 0x6fa2e1da // udot v26.4s, v14.16b, v2.4b[1]\n" + "ldr d12, [%[b_ptr0], #0x40]\n" + "ins v8.d[1], temploadreg0\n" + "subs %[loops], %[loops], #0x1\n" + ".word 0x6fa0e1f3 // udot v19.4s, v15.16b, v0.4b[1]\n" + "ldr temploadreg0, [%[b_ptr0], #0x48]\n" + ".word 0x6fa1e1f7 // udot v23.4s, v15.16b, v1.4b[1]\n" + "ldr d13, [%[b_ptr0], #0x50]\n" + ".word 0x6fa2e1fb // udot v27.4s, v15.16b, v2.4b[1]\n" + "ins v9.d[1], temploadreg1\n" + ".word 0x6f80e910 // udot v16.4s, v8.16b, v0.4b[2]\n" + "ldr temploadreg1, [%[b_ptr0], #0x58]\n" + ".word 0x6f81e914 // udot v20.4s, v8.16b, v1.4b[2]\n" + "ldr d14, [%[b_ptr0], #0x60]\n" + ".word 0x6f82e918 // udot v24.4s, v8.16b, v2.4b[2]\n" + "ins v10.d[1], temploadreg2\n" + ".word 0x6f80e931 // udot v17.4s, v9.16b, v0.4b[2]\n" + "ldr temploadreg2, [%[b_ptr0], #0x68]\n" + ".word 0x6f81e935 // udot v21.4s, v9.16b, v1.4b[2]\n" + "ldr d15, [%[b_ptr0], #0x70]\n" + ".word 0x6f82e939 // udot v25.4s, v9.16b, v2.4b[2]\n" + "ins v11.d[1], temploadreg3\n" + ".word 0x6f80e952 // udot v18.4s, v10.16b, v0.4b[2]\n" + "ldr temploadreg3, [%[b_ptr0], #0x78]\n" + ".word 0x6f81e956 // udot v22.4s, v10.16b, v1.4b[2]\n" + "ins v12.d[1], temploadreg0\n" + ".word 0x6f82e95a // udot v26.4s, v10.16b, v2.4b[2]\n" + "ins v13.d[1], temploadreg1\n" + ".word 0x6f80e973 // udot v19.4s, v11.16b, v0.4b[2]\n" + "ins v14.d[1], temploadreg2\n" + ".word 0x6f81e977 // udot v23.4s, v11.16b, v1.4b[2]\n" + "ins v15.d[1], temploadreg3\n" + ".word 0x6f82e97b // udot v27.4s, v11.16b, v2.4b[2]\n" + "prfm PLDL1KEEP, [%[a_ptr0], #0x40]\n" + ".word 0x6fa0e990 // udot v16.4s, v12.16b, v0.4b[3]\n" + "add %[b_ptr0], %[b_ptr0], #0x100\n" + ".word 0x6fa1e994 // udot v20.4s, v12.16b, v1.4b[3]\n" + "ldr d8, [%[b_ptr0], #-0x80]\n" + ".word 0x6fa2e998 // udot v24.4s, v12.16b, v2.4b[3]\n" + "ldr temploadreg0, [%[b_ptr0], #-0x78]\n" + ".word 0x6fa0e9b1 // udot v17.4s, v13.16b, v0.4b[3]\n" + "ldr d9, [%[b_ptr0], #-0x70]\n" + ".word 0x6fa1e9b5 // udot v21.4s, v13.16b, v1.4b[3]\n" + "ldr temploadreg1, [%[b_ptr0], #-0x68]\n" + ".word 0x6fa2e9b9 // udot v25.4s, v13.16b, v2.4b[3]\n" + "ldr d10, [%[b_ptr0], #-0x60]\n" + ".word 0x6fa0e9d2 // udot v18.4s, v14.16b, v0.4b[3]\n" + "ldr temploadreg2, [%[b_ptr0], #-0x58]\n" + ".word 0x6fa1e9d6 // udot v22.4s, v14.16b, v1.4b[3]\n" + "ldr d11, [%[b_ptr0], #-0x50]\n" + ".word 0x6fa2e9da // udot v26.4s, v14.16b, v2.4b[3]\n" + "ldr temploadreg3, [%[b_ptr0], #-0x48]\n" + ".word 0x6fa0e9f3 // udot v19.4s, v15.16b, v0.4b[3]\n" + "ldr d12, [%[b_ptr0], #-0x40]\n" + ".word 0x6fa1e9f7 // udot v23.4s, v15.16b, v1.4b[3]\n" + "ins v8.d[1], temploadreg0\n" + ".word 0x6fa2e9fb // udot v27.4s, v15.16b, v2.4b[3]\n" + "ldr temploadreg0, [%[b_ptr0], #-0x38]\n" + "ldr d13, [%[b_ptr0], #-0x30]\n" + "add %[a_ptr0], %[a_ptr0], #0x20\n" + ".word 0x6f84e110 // udot v16.4s, v8.16b, v4.4b[0]\n" + "ins v9.d[1], temploadreg1\n" + ".word 0x6f85e114 // udot v20.4s, v8.16b, v5.4b[0]\n" + "ldr temploadreg1, [%[b_ptr0], #-0x28]\n" + ".word 0x6f86e118 // udot v24.4s, v8.16b, v6.4b[0]\n" + "ldr d14, [%[b_ptr0], #-0x20]\n" + "ins v10.d[1], temploadreg2\n" + "add a_ptr1, a_ptr1, #0x20\n" + ".word 0x6f84e131 // udot v17.4s, v9.16b, v4.4b[0]\n" + "ldr temploadreg2, [%[b_ptr0], #-0x18]\n" + ".word 0x6f85e135 // udot v21.4s, v9.16b, v5.4b[0]\n" + "ldr d15, [%[b_ptr0], #-0x10]\n" + ".word 0x6f86e139 // udot v25.4s, v9.16b, v6.4b[0]\n" + "ins v11.d[1], temploadreg3\n" + ".word 0x6f84e152 // udot v18.4s, v10.16b, v4.4b[0]\n" + "ldr temploadreg3, [%[b_ptr0], #-0x8]\n" + ".word 0x6f85e156 // udot v22.4s, v10.16b, v5.4b[0]\n" + "ldr d0, [%[a_ptr0], #-0x10]\n" + ".word 0x6f86e15a // udot v26.4s, v10.16b, v6.4b[0]\n" + "ins v12.d[1], temploadreg0\n" + ".word 0x6f84e173 // udot v19.4s, v11.16b, v4.4b[0]\n" + "ldr temploadreg0, [%[a_ptr0], #-0x8]\n" + ".word 0x6f85e177 // udot v23.4s, v11.16b, v5.4b[0]\n" + "ldr d1, [a_ptr1, #-0x10]\n" + ".word 0x6f86e17b // udot v27.4s, v11.16b, v6.4b[0]\n" + "ins v13.d[1], temploadreg1\n" + ".word 0x6fa4e190 // udot v16.4s, v12.16b, v4.4b[1]\n" + "ldr temploadreg1, [a_ptr1, #-0x8]\n" + ".word 0x6fa5e194 // udot v20.4s, v12.16b, v5.4b[1]\n" + "ins v14.d[1], temploadreg2\n" + ".word 0x6fa6e198 // udot v24.4s, v12.16b, v6.4b[1]\n" + "ldr d8, [%[b_ptr0]]\n" + ".word 0x6fa4e1b1 // udot v17.4s, v13.16b, v4.4b[1]\n" + "ins v0.d[1], temploadreg0\n" + ".word 0x6fa5e1b5 // udot v21.4s, v13.16b, v5.4b[1]\n" + "ldr temploadreg0, [%[b_ptr0], #0x8]\n" + ".word 0x6fa6e1b9 // udot v25.4s, v13.16b, v6.4b[1]\n" + "ldr d9, [%[b_ptr0], #0x10]\n" + ".word 0x6fa4e1d2 // udot v18.4s, v14.16b, v4.4b[1]\n" + "ins v1.d[1], temploadreg1\n" + ".word 0x6fa5e1d6 // udot v22.4s, v14.16b, v5.4b[1]\n" + "ldr temploadreg1, [%[b_ptr0], #0x18]\n" + ".word 0x6fa6e1da // udot v26.4s, v14.16b, v6.4b[1]\n" + "ldr d10, [%[b_ptr0], #0x20]\n" + "ldr d11, [%[b_ptr0], #0x30]\n" + "add a_ptr2, a_ptr2, #0x20\n" + "ins v15.d[1], temploadreg3\n" + "prfm PLDL1KEEP, [a_ptr1, #0x40]\n" + "ldr d2, [a_ptr2, #-0x10]\n" + "prfm PLDL1KEEP, [a_ptr2, #0x40]\n" + ".word 0x6fa4e1f3 // udot v19.4s, v15.16b, v4.4b[1]\n" + "ldr temploadreg2, [a_ptr2, #-0x8]\n" + ".word 0x6fa5e1f7 // udot v23.4s, v15.16b, v5.4b[1]\n" + "ldr temploadreg3, [%[b_ptr0], #0x38]\n" + ".word 0x6fa6e1fb // udot v27.4s, v15.16b, v6.4b[1]\n" + "ldr d12, [%[b_ptr0], #0x40]\n" + "ins v8.d[1], temploadreg0\n" + "ins v2.d[1], temploadreg2\n" + "ldr temploadreg2, [%[b_ptr0], #0x28]\n" + "ldr temploadreg0, [%[b_ptr0], #0x48]\n" + ".word 0x6f84e910 // udot v16.4s, v8.16b, v4.4b[2]\n" + "ldr d13, [%[b_ptr0], #0x50]\n" + ".word 0x6f85e914 // udot v20.4s, v8.16b, v5.4b[2]\n" + "ins v9.d[1], temploadreg1\n" + ".word 0x6f86e918 // udot v24.4s, v8.16b, v6.4b[2]\n" + "ldr temploadreg1, [%[b_ptr0], #0x58]\n" + "ldr d14, [%[b_ptr0], #0x60]\n" + "ins v10.d[1], temploadreg2\n" + ".word 0x6f84e931 // udot v17.4s, v9.16b, v4.4b[2]\n" + "ldr temploadreg2, [%[b_ptr0], #0x68]\n" + ".word 0x6f85e935 // udot v21.4s, v9.16b, v5.4b[2]\n" + "ldr d15, [%[b_ptr0], #0x70]\n" + ".word 0x6f86e939 // udot v25.4s, v9.16b, v6.4b[2]\n" + "ins v11.d[1], temploadreg3\n" + ".word 0x6f84e952 // udot v18.4s, v10.16b, v4.4b[2]\n" + "ldr temploadreg3, [%[b_ptr0], #0x78]\n" + ".word 0x6f85e956 // udot v22.4s, v10.16b, v5.4b[2]\n" + "ins v12.d[1], temploadreg0\n" + ".word 0x6f86e95a // udot v26.4s, v10.16b, v6.4b[2]\n" + "ins v13.d[1], temploadreg1\n" + ".word 0x6f84e973 // udot v19.4s, v11.16b, v4.4b[2]\n" + "ins v14.d[1], temploadreg2\n" + ".word 0x6f85e977 // udot v23.4s, v11.16b, v5.4b[2]\n" + "ins v15.d[1], temploadreg3\n" + ".word 0x6f86e97b // udot v27.4s, v11.16b, v6.4b[2]\n" + "add %[b_ptr0], %[b_ptr0], #0x100\n" + ".word 0x6fa4e990 // udot v16.4s, v12.16b, v4.4b[3]\n" + "ldr d8, [%[b_ptr0], #-0x80]\n" + ".word 0x6fa5e994 // udot v20.4s, v12.16b, v5.4b[3]\n" + "ldr temploadreg0, [%[b_ptr0], #-0x78]\n" + ".word 0x6fa6e998 // udot v24.4s, v12.16b, v6.4b[3]\n" + "ldr d9, [%[b_ptr0], #-0x70]\n" + ".word 0x6fa4e9b1 // udot v17.4s, v13.16b, v4.4b[3]\n" + "ldr temploadreg1, [%[b_ptr0], #-0x68]\n" + ".word 0x6fa5e9b5 // udot v21.4s, v13.16b, v5.4b[3]\n" + "ldr d10, [%[b_ptr0], #-0x60]\n" + ".word 0x6fa6e9b9 // udot v25.4s, v13.16b, v6.4b[3]\n" + "ldr temploadreg2, [%[b_ptr0], #-0x58]\n" + ".word 0x6fa4e9d2 // udot v18.4s, v14.16b, v4.4b[3]\n" + "ldr d11, [%[b_ptr0], #-0x50]\n" + ".word 0x6fa5e9d6 // udot v22.4s, v14.16b, v5.4b[3]\n" + "ldr temploadreg3, [%[b_ptr0], #-0x48]\n" + ".word 0x6fa6e9da // udot v26.4s, v14.16b, v6.4b[3]\n" + "ldr d12, [%[b_ptr0], #-0x40]\n" + ".word 0x6fa4e9f3 // udot v19.4s, v15.16b, v4.4b[3]\n" + "ins v8.d[1], temploadreg0\n" + ".word 0x6fa5e9f7 // udot v23.4s, v15.16b, v5.4b[3]\n" + "ldr temploadreg0, [%[b_ptr0], #-0x38]\n" + ".word 0x6fa6e9fb // udot v27.4s, v15.16b, v6.4b[3]\n" + "ldr d13, [%[b_ptr0], #-0x30]\n" + "ins v9.d[1], temploadreg1\n" + "ldr temploadreg1, [%[b_ptr0], #-0x28]\n" + "ldr d14, [%[b_ptr0], #-0x20]\n" + "ins v10.d[1], temploadreg2\n" + "ldr temploadreg2, [%[b_ptr0], #-0x18]\n" + "ins v11.d[1], temploadreg3\n" + "ins v12.d[1], temploadreg0\n" + "ins v13.d[1], temploadreg1\n" + "ins v14.d[1], temploadreg2\n" + "b.ne 3b\n" + "2:\n" + "ldr d15, [%[b_ptr0], #-0x10]\n" + "prfm PSTL1KEEP, [%[c_ptr0]]\n" + "ldr temploadreg3, [%[b_ptr0], #-0x8]\n" + "prfm PSTL1KEEP, [c_ptr1]\n" + "prfm PSTL1KEEP, [c_ptr2]\n" + "ins v15.d[1], temploadreg3\n" + "cbz %[regs], 4f\n" + ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" + "ldr d4, [%[a_ptr0]]\n" + ".word 0x6f81e114 // udot v20.4s, v8.16b, v1.4b[0]\n" + "ldr temploadreg0, [%[a_ptr0], #0x8]\n" + ".word 0x6f82e118 // udot v24.4s, v8.16b, v2.4b[0]\n" + "ldr d5, [a_ptr1]\n" + ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" + "ldr temploadreg1, [a_ptr1, #0x8]\n" + ".word 0x6f81e135 // udot v21.4s, v9.16b, v1.4b[0]\n" + "ldr d6, [a_ptr2]\n" + ".word 0x6f82e139 // udot v25.4s, v9.16b, v2.4b[0]\n" + "ldr temploadreg2, [a_ptr2, #0x8]\n" + ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" + "ldr d8, [%[b_ptr0]]\n" + ".word 0x6f81e156 // udot v22.4s, v10.16b, v1.4b[0]\n" + "ins v4.d[1], temploadreg0\n" + ".word 0x6f82e15a // udot v26.4s, v10.16b, v2.4b[0]\n" + "ldr temploadreg0, [%[b_ptr0], #0x8]\n" + ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" + "ldr d9, [%[b_ptr0], #0x10]\n" + ".word 0x6f81e177 // udot v23.4s, v11.16b, v1.4b[0]\n" + "ins v5.d[1], temploadreg1\n" + ".word 0x6f82e17b // udot v27.4s, v11.16b, v2.4b[0]\n" + "ldr temploadreg1, [%[b_ptr0], #0x18]\n" + ".word 0x6fa0e190 // udot v16.4s, v12.16b, v0.4b[1]\n" + "ldr d10, [%[b_ptr0], #0x20]\n" + ".word 0x6fa1e194 // udot v20.4s, v12.16b, v1.4b[1]\n" + "ins v6.d[1], temploadreg2\n" + ".word 0x6fa2e198 // udot v24.4s, v12.16b, v2.4b[1]\n" + "ldr temploadreg2, [%[b_ptr0], #0x28]\n" + ".word 0x6fa0e1b1 // udot v17.4s, v13.16b, v0.4b[1]\n" + "ldr d11, [%[b_ptr0], #0x30]\n" + ".word 0x6fa1e1b5 // udot v21.4s, v13.16b, v1.4b[1]\n" + "ldr temploadreg3, [%[b_ptr0], #0x38]\n" + ".word 0x6fa2e1b9 // udot v25.4s, v13.16b, v2.4b[1]\n" + "ldr d12, [%[b_ptr0], #0x40]\n" + ".word 0x6fa0e1d2 // udot v18.4s, v14.16b, v0.4b[1]\n" + "ins v8.d[1], temploadreg0\n" + ".word 0x6fa1e1d6 // udot v22.4s, v14.16b, v1.4b[1]\n" + "ldr temploadreg0, [%[b_ptr0], #0x48]\n" + ".word 0x6fa2e1da // udot v26.4s, v14.16b, v2.4b[1]\n" + "ldr d13, [%[b_ptr0], #0x50]\n" + ".word 0x6fa0e1f3 // udot v19.4s, v15.16b, v0.4b[1]\n" + "ins v9.d[1], temploadreg1\n" + ".word 0x6fa1e1f7 // udot v23.4s, v15.16b, v1.4b[1]\n" + "ldr temploadreg1, [%[b_ptr0], #0x58]\n" + ".word 0x6fa2e1fb // udot v27.4s, v15.16b, v2.4b[1]\n" + "ldr d14, [%[b_ptr0], #0x60]\n" + ".word 0x6f80e910 // udot v16.4s, v8.16b, v0.4b[2]\n" + "ins v10.d[1], temploadreg2\n" + ".word 0x6f81e914 // udot v20.4s, v8.16b, v1.4b[2]\n" + "ldr temploadreg2, [%[b_ptr0], #0x68]\n" + ".word 0x6f82e918 // udot v24.4s, v8.16b, v2.4b[2]\n" + "ldr d15, [%[b_ptr0], #0x70]\n" + ".word 0x6f80e931 // udot v17.4s, v9.16b, v0.4b[2]\n" + "ins v11.d[1], temploadreg3\n" + ".word 0x6f81e935 // udot v21.4s, v9.16b, v1.4b[2]\n" + "ldr temploadreg3, [%[b_ptr0], #0x78]\n" + ".word 0x6f82e939 // udot v25.4s, v9.16b, v2.4b[2]\n" + "ins v12.d[1], temploadreg0\n" + ".word 0x6f80e952 // udot v18.4s, v10.16b, v0.4b[2]\n" + "ins v13.d[1], temploadreg1\n" + ".word 0x6f81e956 // udot v22.4s, v10.16b, v1.4b[2]\n" + "ins v14.d[1], temploadreg2\n" + ".word 0x6f82e95a // udot v26.4s, v10.16b, v2.4b[2]\n" + "ins v15.d[1], temploadreg3\n" + ".word 0x6f80e973 // udot v19.4s, v11.16b, v0.4b[2]\n" + "add %[b_ptr0], %[b_ptr0], #0x100\n" + ".word 0x6f81e977 // udot v23.4s, v11.16b, v1.4b[2]\n" + "ldr d8, [%[b_ptr0], #-0x80]\n" + ".word 0x6f82e97b // udot v27.4s, v11.16b, v2.4b[2]\n" + "ldr temploadreg0, [%[b_ptr0], #-0x78]\n" + ".word 0x6fa0e990 // udot v16.4s, v12.16b, v0.4b[3]\n" + "ldr d9, [%[b_ptr0], #-0x70]\n" + ".word 0x6fa1e994 // udot v20.4s, v12.16b, v1.4b[3]\n" + "ldr temploadreg1, [%[b_ptr0], #-0x68]\n" + ".word 0x6fa2e998 // udot v24.4s, v12.16b, v2.4b[3]\n" + "ldr d10, [%[b_ptr0], #-0x60]\n" + ".word 0x6fa0e9b1 // udot v17.4s, v13.16b, v0.4b[3]\n" + "ldr temploadreg2, [%[b_ptr0], #-0x58]\n" + ".word 0x6fa1e9b5 // udot v21.4s, v13.16b, v1.4b[3]\n" + "ldr d11, [%[b_ptr0], #-0x50]\n" + ".word 0x6fa2e9b9 // udot v25.4s, v13.16b, v2.4b[3]\n" + "ldr temploadreg3, [%[b_ptr0], #-0x48]\n" + ".word 0x6fa0e9d2 // udot v18.4s, v14.16b, v0.4b[3]\n" + "ldr d12, [%[b_ptr0], #-0x40]\n" + ".word 0x6fa1e9d6 // udot v22.4s, v14.16b, v1.4b[3]\n" + "ins v8.d[1], temploadreg0\n" + ".word 0x6fa2e9da // udot v26.4s, v14.16b, v2.4b[3]\n" + "ldr temploadreg0, [%[b_ptr0], #-0x38]\n" + ".word 0x6fa0e9f3 // udot v19.4s, v15.16b, v0.4b[3]\n" + "ldr d13, [%[b_ptr0], #-0x30]\n" + ".word 0x6fa1e9f7 // udot v23.4s, v15.16b, v1.4b[3]\n" + "ins v9.d[1], temploadreg1\n" + ".word 0x6fa2e9fb // udot v27.4s, v15.16b, v2.4b[3]\n" + "ldr temploadreg1, [%[b_ptr0], #-0x28]\n" + ".word 0x6f84e110 // udot v16.4s, v8.16b, v4.4b[0]\n" + "ldr d14, [%[b_ptr0], #-0x20]\n" + ".word 0x6f85e114 // udot v20.4s, v8.16b, v5.4b[0]\n" + "ins v10.d[1], temploadreg2\n" + ".word 0x6f86e118 // udot v24.4s, v8.16b, v6.4b[0]\n" + "ldr temploadreg2, [%[b_ptr0], #-0x18]\n" + ".word 0x6f84e131 // udot v17.4s, v9.16b, v4.4b[0]\n" + "ldr d15, [%[b_ptr0], #-0x10]\n" + ".word 0x6f85e135 // udot v21.4s, v9.16b, v5.4b[0]\n" + "ins v11.d[1], temploadreg3\n" + ".word 0x6f86e139 // udot v25.4s, v9.16b, v6.4b[0]\n" + "ldr temploadreg3, [%[b_ptr0], #-0x8]\n" + ".word 0x6f84e152 // udot v18.4s, v10.16b, v4.4b[0]\n" + "ldr d8, [%[b_ptr0]]\n" + ".word 0x6f85e156 // udot v22.4s, v10.16b, v5.4b[0]\n" + "ins v12.d[1], temploadreg0\n" + ".word 0x6f86e15a // udot v26.4s, v10.16b, v6.4b[0]\n" + "ldr temploadreg0, [%[b_ptr0], #0x8]\n" + ".word 0x6f84e173 // udot v19.4s, v11.16b, v4.4b[0]\n" + "ldr d9, [%[b_ptr0], #0x10]\n" + ".word 0x6f85e177 // udot v23.4s, v11.16b, v5.4b[0]\n" + "ins v13.d[1], temploadreg1\n" + ".word 0x6f86e17b // udot v27.4s, v11.16b, v6.4b[0]\n" + "ldr temploadreg1, [%[b_ptr0], #0x18]\n" + ".word 0x6fa4e190 // udot v16.4s, v12.16b, v4.4b[1]\n" + "ldr d10, [%[b_ptr0], #0x20]\n" + ".word 0x6fa5e194 // udot v20.4s, v12.16b, v5.4b[1]\n" + "ins v14.d[1], temploadreg2\n" + ".word 0x6fa6e198 // udot v24.4s, v12.16b, v6.4b[1]\n" + "ldr temploadreg2, [%[b_ptr0], #0x28]\n" + ".word 0x6fa4e1b1 // udot v17.4s, v13.16b, v4.4b[1]\n" + "ldr d11, [%[b_ptr0], #0x30]\n" + ".word 0x6fa5e1b5 // udot v21.4s, v13.16b, v5.4b[1]\n" + "ins v15.d[1], temploadreg3\n" + ".word 0x6fa6e1b9 // udot v25.4s, v13.16b, v6.4b[1]\n" + "ldr temploadreg3, [%[b_ptr0], #0x38]\n" + ".word 0x6fa4e1d2 // udot v18.4s, v14.16b, v4.4b[1]\n" + "ldr d12, [%[b_ptr0], #0x40]\n" + ".word 0x6fa5e1d6 // udot v22.4s, v14.16b, v5.4b[1]\n" + "ins v8.d[1], temploadreg0\n" + ".word 0x6fa6e1da // udot v26.4s, v14.16b, v6.4b[1]\n" + "ldr temploadreg0, [%[b_ptr0], #0x48]\n" + ".word 0x6fa4e1f3 // udot v19.4s, v15.16b, v4.4b[1]\n" + "ldr d13, [%[b_ptr0], #0x50]\n" + ".word 0x6fa5e1f7 // udot v23.4s, v15.16b, v5.4b[1]\n" + "ins v9.d[1], temploadreg1\n" + ".word 0x6fa6e1fb // udot v27.4s, v15.16b, v6.4b[1]\n" + "ldr temploadreg1, [%[b_ptr0], #0x58]\n" + ".word 0x6f84e910 // udot v16.4s, v8.16b, v4.4b[2]\n" + "ldr d14, [%[b_ptr0], #0x60]\n" + ".word 0x6f85e914 // udot v20.4s, v8.16b, v5.4b[2]\n" + "ins v10.d[1], temploadreg2\n" + ".word 0x6f86e918 // udot v24.4s, v8.16b, v6.4b[2]\n" + "ldr temploadreg2, [%[b_ptr0], #0x68]\n" + ".word 0x6f84e931 // udot v17.4s, v9.16b, v4.4b[2]\n" + "ldr d15, [%[b_ptr0], #0x70]\n" + ".word 0x6f85e935 // udot v21.4s, v9.16b, v5.4b[2]\n" + "ins v11.d[1], temploadreg3\n" + ".word 0x6f86e939 // udot v25.4s, v9.16b, v6.4b[2]\n" + "ldr temploadreg3, [%[b_ptr0], #0x78]\n" + ".word 0x6f84e952 // udot v18.4s, v10.16b, v4.4b[2]\n" + "ins v12.d[1], temploadreg0\n" + ".word 0x6f85e956 // udot v22.4s, v10.16b, v5.4b[2]\n" + "ins v13.d[1], temploadreg1\n" + ".word 0x6f86e95a // udot v26.4s, v10.16b, v6.4b[2]\n" + "ins v14.d[1], temploadreg2\n" + ".word 0x6f84e973 // udot v19.4s, v11.16b, v4.4b[2]\n" + "ins v15.d[1], temploadreg3\n" + ".word 0x6f85e977 // udot v23.4s, v11.16b, v5.4b[2]\n" + "add %[b_ptr0], %[b_ptr0], #0x80\n" + ".word 0x6f86e97b // udot v27.4s, v11.16b, v6.4b[2]\n" + "add %[a_ptr0], %[a_ptr0], #0x10\n" + ".word 0x6fa4e990 // udot v16.4s, v12.16b, v4.4b[3]\n" + "add a_ptr1, a_ptr1, #0x10\n" + ".word 0x6fa5e994 // udot v20.4s, v12.16b, v5.4b[3]\n" + "add a_ptr2, a_ptr2, #0x10\n" + ".word 0x6fa6e998 // udot v24.4s, v12.16b, v6.4b[3]\n" + ".word 0x6fa4e9b1 // udot v17.4s, v13.16b, v4.4b[3]\n" + ".word 0x6fa5e9b5 // udot v21.4s, v13.16b, v5.4b[3]\n" + ".word 0x6fa6e9b9 // udot v25.4s, v13.16b, v6.4b[3]\n" + ".word 0x6fa4e9d2 // udot v18.4s, v14.16b, v4.4b[3]\n" + ".word 0x6fa5e9d6 // udot v22.4s, v14.16b, v5.4b[3]\n" + ".word 0x6fa6e9da // udot v26.4s, v14.16b, v6.4b[3]\n" + ".word 0x6fa4e9f3 // udot v19.4s, v15.16b, v4.4b[3]\n" + ".word 0x6fa5e9f7 // udot v23.4s, v15.16b, v5.4b[3]\n" + ".word 0x6fa6e9fb // udot v27.4s, v15.16b, v6.4b[3]\n" + "b 5f\n" + "4:\n" + ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" + "ldr temploadreg0, [%[b_ptr0], #0x8]\n" + ".word 0x6f81e114 // udot v20.4s, v8.16b, v1.4b[0]\n" + "ldr temploadreg1, [%[b_ptr0], #0x18]\n" + ".word 0x6f82e118 // udot v24.4s, v8.16b, v2.4b[0]\n" + "ldr d8, [%[b_ptr0]]\n" + ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" + "ldr temploadreg2, [%[b_ptr0], #0x28]\n" + ".word 0x6f81e135 // udot v21.4s, v9.16b, v1.4b[0]\n" + "ldr temploadreg3, [%[b_ptr0], #0x38]\n" + ".word 0x6f82e139 // udot v25.4s, v9.16b, v2.4b[0]\n" + "ldr d9, [%[b_ptr0], #0x10]\n" + ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" + "ins v8.d[1], temploadreg0\n" + ".word 0x6f81e156 // udot v22.4s, v10.16b, v1.4b[0]\n" + "ldr temploadreg0, [%[b_ptr0], #0x48]\n" + ".word 0x6f82e15a // udot v26.4s, v10.16b, v2.4b[0]\n" + "ldr d10, [%[b_ptr0], #0x20]\n" + ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" + "ins v9.d[1], temploadreg1\n" + ".word 0x6f81e177 // udot v23.4s, v11.16b, v1.4b[0]\n" + "ldr temploadreg1, [%[b_ptr0], #0x58]\n" + ".word 0x6f82e17b // udot v27.4s, v11.16b, v2.4b[0]\n" + "ldr d11, [%[b_ptr0], #0x30]\n" + ".word 0x6fa0e190 // udot v16.4s, v12.16b, v0.4b[1]\n" + "ins v10.d[1], temploadreg2\n" + ".word 0x6fa1e194 // udot v20.4s, v12.16b, v1.4b[1]\n" + "ldr temploadreg2, [%[b_ptr0], #0x68]\n" + ".word 0x6fa2e198 // udot v24.4s, v12.16b, v2.4b[1]\n" + "ldr d12, [%[b_ptr0], #0x40]\n" + ".word 0x6fa0e1b1 // udot v17.4s, v13.16b, v0.4b[1]\n" + "ins v11.d[1], temploadreg3\n" + ".word 0x6fa1e1b5 // udot v21.4s, v13.16b, v1.4b[1]\n" + "ldr temploadreg3, [%[b_ptr0], #0x78]\n" + ".word 0x6fa2e1b9 // udot v25.4s, v13.16b, v2.4b[1]\n" + "ldr d13, [%[b_ptr0], #0x50]\n" + ".word 0x6fa0e1d2 // udot v18.4s, v14.16b, v0.4b[1]\n" + "ins v12.d[1], temploadreg0\n" + ".word 0x6fa1e1d6 // udot v22.4s, v14.16b, v1.4b[1]\n" + ".word 0x6fa2e1da // udot v26.4s, v14.16b, v2.4b[1]\n" + "ldr d14, [%[b_ptr0], #0x60]\n" + ".word 0x6fa0e1f3 // udot v19.4s, v15.16b, v0.4b[1]\n" + "ins v13.d[1], temploadreg1\n" + ".word 0x6fa1e1f7 // udot v23.4s, v15.16b, v1.4b[1]\n" + ".word 0x6fa2e1fb // udot v27.4s, v15.16b, v2.4b[1]\n" + "ldr d15, [%[b_ptr0], #0x70]\n" + ".word 0x6f80e910 // udot v16.4s, v8.16b, v0.4b[2]\n" + "ins v14.d[1], temploadreg2\n" + ".word 0x6f81e914 // udot v20.4s, v8.16b, v1.4b[2]\n" + "add %[b_ptr0], %[b_ptr0], #0x80\n" + ".word 0x6f82e918 // udot v24.4s, v8.16b, v2.4b[2]\n" + "ins v15.d[1], temploadreg3\n" + ".word 0x6f80e931 // udot v17.4s, v9.16b, v0.4b[2]\n" + ".word 0x6f81e935 // udot v21.4s, v9.16b, v1.4b[2]\n" + ".word 0x6f82e939 // udot v25.4s, v9.16b, v2.4b[2]\n" + ".word 0x6f80e952 // udot v18.4s, v10.16b, v0.4b[2]\n" + ".word 0x6f81e956 // udot v22.4s, v10.16b, v1.4b[2]\n" + ".word 0x6f82e95a // udot v26.4s, v10.16b, v2.4b[2]\n" + ".word 0x6f80e973 // udot v19.4s, v11.16b, v0.4b[2]\n" + ".word 0x6f81e977 // udot v23.4s, v11.16b, v1.4b[2]\n" + ".word 0x6f82e97b // udot v27.4s, v11.16b, v2.4b[2]\n" + ".word 0x6fa0e990 // udot v16.4s, v12.16b, v0.4b[3]\n" + ".word 0x6fa1e994 // udot v20.4s, v12.16b, v1.4b[3]\n" + ".word 0x6fa2e998 // udot v24.4s, v12.16b, v2.4b[3]\n" + ".word 0x6fa0e9b1 // udot v17.4s, v13.16b, v0.4b[3]\n" + ".word 0x6fa1e9b5 // udot v21.4s, v13.16b, v1.4b[3]\n" + ".word 0x6fa2e9b9 // udot v25.4s, v13.16b, v2.4b[3]\n" + ".word 0x6fa0e9d2 // udot v18.4s, v14.16b, v0.4b[3]\n" + ".word 0x6fa1e9d6 // udot v22.4s, v14.16b, v1.4b[3]\n" + ".word 0x6fa2e9da // udot v26.4s, v14.16b, v2.4b[3]\n" + ".word 0x6fa0e9f3 // udot v19.4s, v15.16b, v0.4b[3]\n" + ".word 0x6fa1e9f7 // udot v23.4s, v15.16b, v1.4b[3]\n" + ".word 0x6fa2e9fb // udot v27.4s, v15.16b, v2.4b[3]\n" + "5:\n" + "cbz %[blocks], 6f\n" + "7:\n" + "ldr q8, [%[b_ptr0]]\n" + "subs %[blocks], %[blocks], #0x1\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + "ldr s0, [%[a_ptr0]]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + "add %[a_ptr0], %[a_ptr0], #0x4\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + "add %[b_ptr0], %[b_ptr0], #0x40\n" + ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" + "ldr s1, [a_ptr1]\n" + ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" + "add a_ptr1, a_ptr1, #0x4\n" + ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" + "ldr s2, [a_ptr2]\n" + ".word 0x6f81e114 // udot v20.4s, v8.16b, v1.4b[0]\n" + "add a_ptr2, a_ptr2, #0x4\n" + ".word 0x6f81e135 // udot v21.4s, v9.16b, v1.4b[0]\n" + ".word 0x6f82e118 // udot v24.4s, v8.16b, v2.4b[0]\n" + ".word 0x6f82e139 // udot v25.4s, v9.16b, v2.4b[0]\n" + ".word 0x6f81e156 // udot v22.4s, v10.16b, v1.4b[0]\n" + ".word 0x6f82e15a // udot v26.4s, v10.16b, v2.4b[0]\n" + ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" + ".word 0x6f81e177 // udot v23.4s, v11.16b, v1.4b[0]\n" + ".word 0x6f82e17b // udot v27.4s, v11.16b, v2.4b[0]\n" + "b.ne 7b\n" + "6:\n" + "cbz %[odds], 8f\n" + "ld1 {v0.b}[0], [%[a_ptr0]], #1\n" + "ld1 {v1.b}[0], [a_ptr1], #1\n" + "ld1 {v2.b}[0], [a_ptr2], #1\n" + "subs %[odds], %[odds], #0x1\n" + "b.eq 9f\n" + "ld1 {v0.b}[1], [%[a_ptr0]], #1\n" + "ld1 {v1.b}[1], [a_ptr1], #1\n" + "ld1 {v2.b}[1], [a_ptr2], #1\n" + "subs %[odds], %[odds], #0x1\n" + "b.eq 9f\n" + "ld1 {v0.b}[2], [%[a_ptr0]]\n" + "ld1 {v1.b}[2], [a_ptr1]\n" + "ld1 {v2.b}[2], [a_ptr2]\n" + "9:\n" + "ldr q8, [%[b_ptr0]]\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" + ".word 0x6f81e114 // udot v20.4s, v8.16b, v1.4b[0]\n" + ".word 0x6f82e118 // udot v24.4s, v8.16b, v2.4b[0]\n" + ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" + ".word 0x6f81e135 // udot v21.4s, v9.16b, v1.4b[0]\n" + ".word 0x6f82e139 // udot v25.4s, v9.16b, v2.4b[0]\n" + ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" + ".word 0x6f81e156 // udot v22.4s, v10.16b, v1.4b[0]\n" + ".word 0x6f82e15a // udot v26.4s, v10.16b, v2.4b[0]\n" + ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" + ".word 0x6f81e177 // udot v23.4s, v11.16b, v1.4b[0]\n" + ".word 0x6f82e17b // udot v27.4s, v11.16b, v2.4b[0]\n" + "8:\n" + "str q16, [%[c_ptr0]]\n" + "str q17, [%[c_ptr0], #0x10]\n" + "str q18, [%[c_ptr0], #0x20]\n" + "str q19, [%[c_ptr0], #0x30]\n" + "add %[c_ptr0], %[c_ptr0], #0x40\n" + "str q20, [c_ptr1]\n" + "str q21, [c_ptr1, #0x10]\n" + "str q22, [c_ptr1, #0x20]\n" + "str q23, [c_ptr1, #0x30]\n" + "str q24, [c_ptr2]\n" + "str q25, [c_ptr2, #0x10]\n" + "str q26, [c_ptr2, #0x20]\n" + "str q27, [c_ptr2, #0x30]\n" + ".unreq a_ptr1\n" + ".unreq a_ptr2\n" + ".unreq c_ptr1\n" + ".unreq c_ptr2\n" + ".unreq temploadreg0\n" + ".unreq temploadreg1\n" + ".unreq temploadreg2\n" + ".unreq temploadreg3\n" + : [a_ptr0] "+r" (a_ptr0), [b_ptr0] "+r" (b_ptr0), [c_ptr0] "+r" (c_ptr0), [loops] "+r" (loops), [regs] "+r" (regs), [blocks] "+r" (blocks), [odds] "+r" (odds) + : [betaptr] "r" (betaptr), [width] "r" (width), [beta0] "r" (beta0), [lda] "r" (ldab), [ldc] "r" (ldcb) + : "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x0", "x1", "x2", "x3", "x4", "x5", "x6", "x7", "cc", "memory" ); break; default: case 4: __asm __volatile ( - "a_ptr1 .req X0\n" - "a_ptr2 .req X1\n" - "a_ptr3 .req X2\n" - "c_ptr1 .req X3\n" - "c_ptr2 .req X4\n" - "c_ptr3 .req X5\n" - "temploadreg0 .req X6\n" - "temploadreg1 .req X7\n" - "temploadreg2 .req X8\n" - "temploadreg3 .req X9\n" - "add a_ptr1, %[a_ptr0], %[lda]\n" - "add c_ptr1, %[c_ptr0], %[ldc]\n" - "add a_ptr2, a_ptr1, %[lda]\n" - "add c_ptr2, c_ptr1, %[ldc]\n" - "add a_ptr3, a_ptr2, %[lda]\n" - "add c_ptr3, c_ptr2, %[ldc]\n" - "cbz %[beta0], 1f\n" - "movi v16.4s, #0\n" - "ldr q0, [%[a_ptr0]]\n" - "movi v17.4s, #0\n" - "ldr q1, [a_ptr1]\n" - "movi v18.4s, #0\n" - "ldr q2, [a_ptr2]\n" - "movi v19.4s, #0\n" - "ldr q3, [a_ptr3]\n" - "movi v20.4s, #0\n" - "ldr q8, [%[b_ptr0]]\n" - "movi v21.4s, #0\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - "movi v22.4s, #0\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - "movi v23.4s, #0\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - "movi v24.4s, #0\n" - "ldr q12, [%[b_ptr0], #0x40]\n" - "movi v25.4s, #0\n" - "ldr q13, [%[b_ptr0], #0x50]\n" - "movi v26.4s, #0\n" - "ldr d14, [%[b_ptr0], #0x60]\n" - "movi v27.4s, #0\n" - "ldr temploadreg2, [%[b_ptr0], #0x68]\n" - "movi v28.4s, #0\n" - "add %[a_ptr0], %[a_ptr0], #0x10\n" - "movi v29.4s, #0\n" - "ins v14.d[1], temploadreg2\n" - "movi v30.4s, #0\n" - "add a_ptr1, a_ptr1, #0x10\n" - "movi v31.4s, #0\n" - "add a_ptr2, a_ptr2, #0x10\n" - "add a_ptr3, a_ptr3, #0x10\n" - "add %[b_ptr0], %[b_ptr0], #0x80\n" - "cbz %[loops], 2f\n" - "b 3f\n" - "1:\n" - "ld1r {v15.4s}, [%[betaptr]]\n" - "ldr q16, [%[c_ptr0]]\n" - "ldr q17, [%[c_ptr0], #0x10]\n" - "ldr q18, [%[c_ptr0], #0x20]\n" - "ldr q19, [%[c_ptr0], #0x30]\n" - "mul v16.4s, v16.4s, v15.4s\n" - "ldr q20, [c_ptr1]\n" - "mul v17.4s, v17.4s, v15.4s\n" - "ldr q21, [c_ptr1, #0x10]\n" - "mul v18.4s, v18.4s, v15.4s\n" - "ldr q22, [c_ptr1, #0x20]\n" - "mul v19.4s, v19.4s, v15.4s\n" - "ldr q23, [c_ptr1, #0x30]\n" - "mul v20.4s, v20.4s, v15.4s\n" - "ldr q24, [c_ptr2]\n" - "mul v21.4s, v21.4s, v15.4s\n" - "ldr q25, [c_ptr2, #0x10]\n" - "mul v22.4s, v22.4s, v15.4s\n" - "ldr q26, [c_ptr2, #0x20]\n" - "mul v23.4s, v23.4s, v15.4s\n" - "ldr q27, [c_ptr2, #0x30]\n" - "mul v24.4s, v24.4s, v15.4s\n" - "ldr q28, [c_ptr3]\n" - "mul v25.4s, v25.4s, v15.4s\n" - "ldr q29, [c_ptr3, #0x10]\n" - "mul v26.4s, v26.4s, v15.4s\n" - "ldr q30, [c_ptr3, #0x20]\n" - "mul v27.4s, v27.4s, v15.4s\n" - "ldr q31, [c_ptr3, #0x30]\n" - "mul v28.4s, v28.4s, v15.4s\n" - "ldr q0, [%[a_ptr0]]\n" - "mul v29.4s, v29.4s, v15.4s\n" - "ldr q1, [a_ptr1]\n" - "mul v30.4s, v30.4s, v15.4s\n" - "ldr q2, [a_ptr2]\n" - "mul v31.4s, v31.4s, v15.4s\n" - "ldr q3, [a_ptr3]\n" - "ldr q8, [%[b_ptr0]]\n" - "add %[a_ptr0], %[a_ptr0], #0x10\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - "add a_ptr1, a_ptr1, #0x10\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - "add a_ptr2, a_ptr2, #0x10\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - "add a_ptr3, a_ptr3, #0x10\n" - "ldr q12, [%[b_ptr0], #0x40]\n" - "ldr q13, [%[b_ptr0], #0x50]\n" - "ldr d14, [%[b_ptr0], #0x60]\n" - "ldr temploadreg2, [%[b_ptr0], #0x68]\n" - "add %[b_ptr0], %[b_ptr0], #0x80\n" - "ins v14.d[1], temploadreg2\n" - "cbz %[loops], 2f\n" - "3:\n" - ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" - "ldr d15, [%[b_ptr0], #-0x10]\n" - ".word 0x6f81e114 // udot v20.4s, v8.16b, v1.4b[0]\n" - "ldr temploadreg3, [%[b_ptr0], #-0x8]\n" - ".word 0x6f82e118 // udot v24.4s, v8.16b, v2.4b[0]\n" - "ldr d4, [%[a_ptr0]]\n" - ".word 0x6f83e11c // udot v28.4s, v8.16b, v3.4b[0]\n" - "ldr temploadreg0, [%[a_ptr0], #0x8]\n" - ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" - "ldr d5, [a_ptr1]\n" - ".word 0x6f81e135 // udot v21.4s, v9.16b, v1.4b[0]\n" - "ldr temploadreg1, [a_ptr1, #0x8]\n" - ".word 0x6f82e139 // udot v25.4s, v9.16b, v2.4b[0]\n" - "ldr d6, [a_ptr2]\n" - ".word 0x6f83e13d // udot v29.4s, v9.16b, v3.4b[0]\n" - "ldr temploadreg2, [a_ptr2, #0x8]\n" - ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" - "ldr d7, [a_ptr3]\n" - ".word 0x6f81e156 // udot v22.4s, v10.16b, v1.4b[0]\n" - "ins v15.d[1], temploadreg3\n" - ".word 0x6f82e15a // udot v26.4s, v10.16b, v2.4b[0]\n" - "ldr temploadreg3, [a_ptr3, #0x8]\n" - ".word 0x6f83e15e // udot v30.4s, v10.16b, v3.4b[0]\n" - "ldr d8, [%[b_ptr0]]\n" - ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" - "ins v4.d[1], temploadreg0\n" - ".word 0x6f81e177 // udot v23.4s, v11.16b, v1.4b[0]\n" - "ldr temploadreg0, [%[b_ptr0], #0x8]\n" - ".word 0x6f82e17b // udot v27.4s, v11.16b, v2.4b[0]\n" - "ldr d9, [%[b_ptr0], #0x10]\n" - ".word 0x6f83e17f // udot v31.4s, v11.16b, v3.4b[0]\n" - "ins v5.d[1], temploadreg1\n" - ".word 0x6fa0e190 // udot v16.4s, v12.16b, v0.4b[1]\n" - "ldr temploadreg1, [%[b_ptr0], #0x18]\n" - ".word 0x6fa1e194 // udot v20.4s, v12.16b, v1.4b[1]\n" - "ldr d10, [%[b_ptr0], #0x20]\n" - ".word 0x6fa2e198 // udot v24.4s, v12.16b, v2.4b[1]\n" - "ins v6.d[1], temploadreg2\n" - ".word 0x6fa3e19c // udot v28.4s, v12.16b, v3.4b[1]\n" - "ldr temploadreg2, [%[b_ptr0], #0x28]\n" - ".word 0x6fa0e1b1 // udot v17.4s, v13.16b, v0.4b[1]\n" - "ldr d11, [%[b_ptr0], #0x30]\n" - ".word 0x6fa1e1b5 // udot v21.4s, v13.16b, v1.4b[1]\n" - "ins v7.d[1], temploadreg3\n" - ".word 0x6fa2e1b9 // udot v25.4s, v13.16b, v2.4b[1]\n" - "ldr temploadreg3, [%[b_ptr0], #0x38]\n" - ".word 0x6fa3e1bd // udot v29.4s, v13.16b, v3.4b[1]\n" - "ldr d12, [%[b_ptr0], #0x40]\n" - ".word 0x6fa0e1d2 // udot v18.4s, v14.16b, v0.4b[1]\n" - "ins v8.d[1], temploadreg0\n" - ".word 0x6fa1e1d6 // udot v22.4s, v14.16b, v1.4b[1]\n" - "ldr temploadreg0, [%[b_ptr0], #0x48]\n" - ".word 0x6fa2e1da // udot v26.4s, v14.16b, v2.4b[1]\n" - "ldr d13, [%[b_ptr0], #0x50]\n" - ".word 0x6fa3e1de // udot v30.4s, v14.16b, v3.4b[1]\n" - "ins v9.d[1], temploadreg1\n" - ".word 0x6fa0e1f3 // udot v19.4s, v15.16b, v0.4b[1]\n" - "ldr temploadreg1, [%[b_ptr0], #0x58]\n" - ".word 0x6fa1e1f7 // udot v23.4s, v15.16b, v1.4b[1]\n" - "ldr d14, [%[b_ptr0], #0x60]\n" - ".word 0x6fa2e1fb // udot v27.4s, v15.16b, v2.4b[1]\n" - "ins v10.d[1], temploadreg2\n" - ".word 0x6fa3e1ff // udot v31.4s, v15.16b, v3.4b[1]\n" - "ldr temploadreg2, [%[b_ptr0], #0x68]\n" - ".word 0x6f80e910 // udot v16.4s, v8.16b, v0.4b[2]\n" - "ldr d15, [%[b_ptr0], #0x70]\n" - ".word 0x6f81e914 // udot v20.4s, v8.16b, v1.4b[2]\n" - "ins v11.d[1], temploadreg3\n" - ".word 0x6f82e918 // udot v24.4s, v8.16b, v2.4b[2]\n" - "ldr temploadreg3, [%[b_ptr0], #0x78]\n" - ".word 0x6f83e91c // udot v28.4s, v8.16b, v3.4b[2]\n" - "ins v12.d[1], temploadreg0\n" - ".word 0x6f80e931 // udot v17.4s, v9.16b, v0.4b[2]\n" - "ins v13.d[1], temploadreg1\n" - ".word 0x6f81e935 // udot v21.4s, v9.16b, v1.4b[2]\n" - "ins v14.d[1], temploadreg2\n" - ".word 0x6f82e939 // udot v25.4s, v9.16b, v2.4b[2]\n" - "ins v15.d[1], temploadreg3\n" - ".word 0x6f83e93d // udot v29.4s, v9.16b, v3.4b[2]\n" - "subs %[loops], %[loops], #0x1\n" - ".word 0x6f80e952 // udot v18.4s, v10.16b, v0.4b[2]\n" - "prfm PLDL1KEEP, [%[a_ptr0], #0x40]\n" - ".word 0x6f81e956 // udot v22.4s, v10.16b, v1.4b[2]\n" - "add %[b_ptr0], %[b_ptr0], #0x100\n" - ".word 0x6f82e95a // udot v26.4s, v10.16b, v2.4b[2]\n" - "ldr d8, [%[b_ptr0], #-0x80]\n" - ".word 0x6f83e95e // udot v30.4s, v10.16b, v3.4b[2]\n" - "ldr temploadreg0, [%[b_ptr0], #-0x78]\n" - ".word 0x6f80e973 // udot v19.4s, v11.16b, v0.4b[2]\n" - "ldr d9, [%[b_ptr0], #-0x70]\n" - ".word 0x6f81e977 // udot v23.4s, v11.16b, v1.4b[2]\n" - "ldr temploadreg1, [%[b_ptr0], #-0x68]\n" - ".word 0x6f82e97b // udot v27.4s, v11.16b, v2.4b[2]\n" - "ldr d10, [%[b_ptr0], #-0x60]\n" - ".word 0x6f83e97f // udot v31.4s, v11.16b, v3.4b[2]\n" - "ldr temploadreg2, [%[b_ptr0], #-0x58]\n" - ".word 0x6fa0e990 // udot v16.4s, v12.16b, v0.4b[3]\n" - "ldr d11, [%[b_ptr0], #-0x50]\n" - ".word 0x6fa1e994 // udot v20.4s, v12.16b, v1.4b[3]\n" - "ldr temploadreg3, [%[b_ptr0], #-0x48]\n" - ".word 0x6fa2e998 // udot v24.4s, v12.16b, v2.4b[3]\n" - "ins v8.d[1], temploadreg0\n" - ".word 0x6fa3e99c // udot v28.4s, v12.16b, v3.4b[3]\n" - "ldr d12, [%[b_ptr0], #-0x40]\n" - ".word 0x6fa0e9b1 // udot v17.4s, v13.16b, v0.4b[3]\n" - "ldr temploadreg0, [%[b_ptr0], #-0x38]\n" - ".word 0x6fa1e9b5 // udot v21.4s, v13.16b, v1.4b[3]\n" - "ins v9.d[1], temploadreg1\n" - ".word 0x6fa2e9b9 // udot v25.4s, v13.16b, v2.4b[3]\n" - "ldr temploadreg1, [%[b_ptr0], #-0x28]\n" - ".word 0x6fa3e9bd // udot v29.4s, v13.16b, v3.4b[3]\n" - "ldr d13, [%[b_ptr0], #-0x30]\n" - ".word 0x6fa0e9d2 // udot v18.4s, v14.16b, v0.4b[3]\n" - "ins v10.d[1], temploadreg2\n" - ".word 0x6fa1e9d6 // udot v22.4s, v14.16b, v1.4b[3]\n" - "ldr temploadreg2, [%[b_ptr0], #-0x18]\n" - ".word 0x6fa2e9da // udot v26.4s, v14.16b, v2.4b[3]\n" - "ins v11.d[1], temploadreg3\n" - ".word 0x6fa3e9de // udot v30.4s, v14.16b, v3.4b[3]\n" - "ldr d14, [%[b_ptr0], #-0x20]\n" - ".word 0x6fa0e9f3 // udot v19.4s, v15.16b, v0.4b[3]\n" - "ldr temploadreg3, [%[b_ptr0], #-0x8]\n" - ".word 0x6fa1e9f7 // udot v23.4s, v15.16b, v1.4b[3]\n" - "ins v12.d[1], temploadreg0\n" - ".word 0x6fa2e9fb // udot v27.4s, v15.16b, v2.4b[3]\n" - "ins v13.d[1], temploadreg1\n" - ".word 0x6fa3e9ff // udot v31.4s, v15.16b, v3.4b[3]\n" - "ldr d15, [%[b_ptr0], #-0x10]\n" - ".word 0x6f84e110 // udot v16.4s, v8.16b, v4.4b[0]\n" - "ins v14.d[1], temploadreg2\n" - ".word 0x6f85e114 // udot v20.4s, v8.16b, v5.4b[0]\n" - "add %[a_ptr0], %[a_ptr0], #0x20\n" - ".word 0x6f86e118 // udot v24.4s, v8.16b, v6.4b[0]\n" - "ldr d0, [%[a_ptr0], #-0x10]\n" - ".word 0x6f87e11c // udot v28.4s, v8.16b, v7.4b[0]\n" - "ldr temploadreg0, [%[a_ptr0], #-0x8]\n" - ".word 0x6f84e131 // udot v17.4s, v9.16b, v4.4b[0]\n" - "ins v15.d[1], temploadreg3\n" - ".word 0x6f85e135 // udot v21.4s, v9.16b, v5.4b[0]\n" - "ldr d8, [%[b_ptr0]]\n" - ".word 0x6f86e139 // udot v25.4s, v9.16b, v6.4b[0]\n" - "ins v0.d[1], temploadreg0\n" - ".word 0x6f87e13d // udot v29.4s, v9.16b, v7.4b[0]\n" - "ldr temploadreg0, [%[b_ptr0], #0x8]\n" - ".word 0x6f84e152 // udot v18.4s, v10.16b, v4.4b[0]\n" - "ldr d9, [%[b_ptr0], #0x10]\n" - ".word 0x6f85e156 // udot v22.4s, v10.16b, v5.4b[0]\n" - "add a_ptr1, a_ptr1, #0x20\n" - ".word 0x6f86e15a // udot v26.4s, v10.16b, v6.4b[0]\n" - "ldr d1, [a_ptr1, #-0x10]\n" - ".word 0x6f87e15e // udot v30.4s, v10.16b, v7.4b[0]\n" - "ldr temploadreg1, [a_ptr1, #-0x8]\n" - ".word 0x6f84e173 // udot v19.4s, v11.16b, v4.4b[0]\n" - "ldr d10, [%[b_ptr0], #0x20]\n" - ".word 0x6f85e177 // udot v23.4s, v11.16b, v5.4b[0]\n" - "ins v8.d[1], temploadreg0\n" - ".word 0x6f86e17b // udot v27.4s, v11.16b, v6.4b[0]\n" - "ins v1.d[1], temploadreg1\n" - ".word 0x6f87e17f // udot v31.4s, v11.16b, v7.4b[0]\n" - "ldr temploadreg1, [%[b_ptr0], #0x18]\n" - ".word 0x6fa4e190 // udot v16.4s, v12.16b, v4.4b[1]\n" - "ldr d11, [%[b_ptr0], #0x30]\n" - ".word 0x6fa5e194 // udot v20.4s, v12.16b, v5.4b[1]\n" - "ldr temploadreg0, [%[b_ptr0], #0x48]\n" - ".word 0x6fa6e198 // udot v24.4s, v12.16b, v6.4b[1]\n" - "ins v9.d[1], temploadreg1\n" - ".word 0x6fa7e19c // udot v28.4s, v12.16b, v7.4b[1]\n" - "ldr d12, [%[b_ptr0], #0x40]\n" - ".word 0x6fa4e1b1 // udot v17.4s, v13.16b, v4.4b[1]\n" - "ldr temploadreg1, [%[b_ptr0], #0x58]\n" - ".word 0x6fa5e1b5 // udot v21.4s, v13.16b, v5.4b[1]\n" - "add a_ptr2, a_ptr2, #0x20\n" - ".word 0x6fa6e1b9 // udot v25.4s, v13.16b, v6.4b[1]\n" - "ldr d2, [a_ptr2, #-0x10]\n" - ".word 0x6fa7e1bd // udot v29.4s, v13.16b, v7.4b[1]\n" - "ldr temploadreg2, [a_ptr2, #-0x8]\n" - ".word 0x6fa4e1d2 // udot v18.4s, v14.16b, v4.4b[1]\n" - "ldr d13, [%[b_ptr0], #0x50]\n" - ".word 0x6fa5e1d6 // udot v22.4s, v14.16b, v5.4b[1]\n" - "ins v12.d[1], temploadreg0\n" - ".word 0x6fa6e1da // udot v26.4s, v14.16b, v6.4b[1]\n" - "ins v2.d[1], temploadreg2\n" - ".word 0x6fa7e1de // udot v30.4s, v14.16b, v7.4b[1]\n" - "ldr temploadreg2, [%[b_ptr0], #0x28]\n" - ".word 0x6fa4e1f3 // udot v19.4s, v15.16b, v4.4b[1]\n" - "ldr d14, [%[b_ptr0], #0x60]\n" - ".word 0x6fa5e1f7 // udot v23.4s, v15.16b, v5.4b[1]\n" - "ins v13.d[1], temploadreg1\n" - ".word 0x6fa6e1fb // udot v27.4s, v15.16b, v6.4b[1]\n" - "ins v10.d[1], temploadreg2\n" - ".word 0x6fa7e1ff // udot v31.4s, v15.16b, v7.4b[1]\n" - "ldr temploadreg2, [%[b_ptr0], #0x68]\n" - ".word 0x6f84e910 // udot v16.4s, v8.16b, v4.4b[2]\n" - "ldr d15, [%[b_ptr0], #0x70]\n" - ".word 0x6f85e914 // udot v20.4s, v8.16b, v5.4b[2]\n" - "add a_ptr3, a_ptr3, #0x20\n" - ".word 0x6f86e918 // udot v24.4s, v8.16b, v6.4b[2]\n" - "ldr d3, [a_ptr3, #-0x10]\n" - ".word 0x6f87e91c // udot v28.4s, v8.16b, v7.4b[2]\n" - "ldr temploadreg3, [a_ptr3, #-0x8]\n" - ".word 0x6f84e931 // udot v17.4s, v9.16b, v4.4b[2]\n" - "ins v14.d[1], temploadreg2\n" - ".word 0x6f85e935 // udot v21.4s, v9.16b, v5.4b[2]\n" - "prfm PLDL1KEEP, [a_ptr1, #0x40]\n" - ".word 0x6f86e939 // udot v25.4s, v9.16b, v6.4b[2]\n" - "ins v3.d[1], temploadreg3\n" - ".word 0x6f87e93d // udot v29.4s, v9.16b, v7.4b[2]\n" - "ldr temploadreg3, [%[b_ptr0], #0x38]\n" - ".word 0x6f84e952 // udot v18.4s, v10.16b, v4.4b[2]\n" - "prfm PLDL1KEEP, [a_ptr2, #0x40]\n" - ".word 0x6f85e956 // udot v22.4s, v10.16b, v5.4b[2]\n" - "ins v11.d[1], temploadreg3\n" - ".word 0x6f86e95a // udot v26.4s, v10.16b, v6.4b[2]\n" - "ldr temploadreg3, [%[b_ptr0], #0x78]\n" - ".word 0x6f87e95e // udot v30.4s, v10.16b, v7.4b[2]\n" - "add %[b_ptr0], %[b_ptr0], #0x100\n" - ".word 0x6f84e973 // udot v19.4s, v11.16b, v4.4b[2]\n" - "ldr d8, [%[b_ptr0], #-0x80]\n" - ".word 0x6f85e977 // udot v23.4s, v11.16b, v5.4b[2]\n" - "ldr temploadreg0, [%[b_ptr0], #-0x78]\n" - ".word 0x6f86e97b // udot v27.4s, v11.16b, v6.4b[2]\n" - "ldr d9, [%[b_ptr0], #-0x70]\n" - ".word 0x6f87e97f // udot v31.4s, v11.16b, v7.4b[2]\n" - "ldr temploadreg1, [%[b_ptr0], #-0x68]\n" - ".word 0x6fa4e990 // udot v16.4s, v12.16b, v4.4b[3]\n" - "ldr d10, [%[b_ptr0], #-0x60]\n" - ".word 0x6fa5e994 // udot v20.4s, v12.16b, v5.4b[3]\n" - "ldr temploadreg2, [%[b_ptr0], #-0x58]\n" - ".word 0x6fa6e998 // udot v24.4s, v12.16b, v6.4b[3]\n" - "ldr d11, [%[b_ptr0], #-0x50]\n" - ".word 0x6fa7e99c // udot v28.4s, v12.16b, v7.4b[3]\n" - "ins v15.d[1], temploadreg3\n" - ".word 0x6fa4e9b1 // udot v17.4s, v13.16b, v4.4b[3]\n" - "ldr temploadreg3, [%[b_ptr0], #-0x48]\n" - ".word 0x6fa5e9b5 // udot v21.4s, v13.16b, v5.4b[3]\n" - "ldr d12, [%[b_ptr0], #-0x40]\n" - ".word 0x6fa6e9b9 // udot v25.4s, v13.16b, v6.4b[3]\n" - "ins v8.d[1], temploadreg0\n" - ".word 0x6fa7e9bd // udot v29.4s, v13.16b, v7.4b[3]\n" - "ldr temploadreg0, [%[b_ptr0], #-0x38]\n" - ".word 0x6fa4e9d2 // udot v18.4s, v14.16b, v4.4b[3]\n" - "ldr d13, [%[b_ptr0], #-0x30]\n" - ".word 0x6fa5e9d6 // udot v22.4s, v14.16b, v5.4b[3]\n" - "ins v9.d[1], temploadreg1\n" - ".word 0x6fa6e9da // udot v26.4s, v14.16b, v6.4b[3]\n" - "ldr temploadreg1, [%[b_ptr0], #-0x28]\n" - ".word 0x6fa7e9de // udot v30.4s, v14.16b, v7.4b[3]\n" - "ldr d14, [%[b_ptr0], #-0x20]\n" - ".word 0x6fa4e9f3 // udot v19.4s, v15.16b, v4.4b[3]\n" - "ins v10.d[1], temploadreg2\n" - ".word 0x6fa5e9f7 // udot v23.4s, v15.16b, v5.4b[3]\n" - "ldr temploadreg2, [%[b_ptr0], #-0x18]\n" - ".word 0x6fa6e9fb // udot v27.4s, v15.16b, v6.4b[3]\n" - "ins v11.d[1], temploadreg3\n" - ".word 0x6fa7e9ff // udot v31.4s, v15.16b, v7.4b[3]\n" - "ins v12.d[1], temploadreg0\n" - "ins v13.d[1], temploadreg1\n" - "prfm PLDL1KEEP, [a_ptr3, #0x40]\n" - "ins v14.d[1], temploadreg2\n" - "b.ne 3b\n" - "2:\n" - "ldr d15, [%[b_ptr0], #-0x10]\n" - "prfm PSTL1KEEP, [%[c_ptr0]]\n" - "ldr temploadreg3, [%[b_ptr0], #-0x8]\n" - "prfm PSTL1KEEP, [c_ptr1]\n" - "prfm PSTL1KEEP, [c_ptr2]\n" - "prfm PSTL1KEEP, [c_ptr3]\n" - "ins v15.d[1], temploadreg3\n" - "cbz %[regs], 4f\n" - ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" - "ldr d4, [%[a_ptr0]]\n" - ".word 0x6f81e114 // udot v20.4s, v8.16b, v1.4b[0]\n" - "ldr temploadreg0, [%[a_ptr0], #0x8]\n" - ".word 0x6f82e118 // udot v24.4s, v8.16b, v2.4b[0]\n" - "ldr d5, [a_ptr1]\n" - ".word 0x6f83e11c // udot v28.4s, v8.16b, v3.4b[0]\n" - "ldr temploadreg1, [a_ptr1, #0x8]\n" - ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" - "ldr d6, [a_ptr2]\n" - ".word 0x6f81e135 // udot v21.4s, v9.16b, v1.4b[0]\n" - "ldr temploadreg2, [a_ptr2, #0x8]\n" - ".word 0x6f82e139 // udot v25.4s, v9.16b, v2.4b[0]\n" - "ldr d7, [a_ptr3]\n" - ".word 0x6f83e13d // udot v29.4s, v9.16b, v3.4b[0]\n" - "ldr temploadreg3, [a_ptr3, #0x8]\n" - ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" - "ldr d8, [%[b_ptr0]]\n" - ".word 0x6f81e156 // udot v22.4s, v10.16b, v1.4b[0]\n" - "ins v4.d[1], temploadreg0\n" - ".word 0x6f82e15a // udot v26.4s, v10.16b, v2.4b[0]\n" - "ldr temploadreg0, [%[b_ptr0], #0x8]\n" - ".word 0x6f83e15e // udot v30.4s, v10.16b, v3.4b[0]\n" - "ldr d9, [%[b_ptr0], #0x10]\n" - ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" - "ins v5.d[1], temploadreg1\n" - ".word 0x6f81e177 // udot v23.4s, v11.16b, v1.4b[0]\n" - "ldr temploadreg1, [%[b_ptr0], #0x18]\n" - ".word 0x6f82e17b // udot v27.4s, v11.16b, v2.4b[0]\n" - "ldr d10, [%[b_ptr0], #0x20]\n" - ".word 0x6f83e17f // udot v31.4s, v11.16b, v3.4b[0]\n" - "ins v6.d[1], temploadreg2\n" - ".word 0x6fa0e190 // udot v16.4s, v12.16b, v0.4b[1]\n" - "ldr temploadreg2, [%[b_ptr0], #0x28]\n" - ".word 0x6fa1e194 // udot v20.4s, v12.16b, v1.4b[1]\n" - "ldr d11, [%[b_ptr0], #0x30]\n" - ".word 0x6fa2e198 // udot v24.4s, v12.16b, v2.4b[1]\n" - "ins v7.d[1], temploadreg3\n" - ".word 0x6fa3e19c // udot v28.4s, v12.16b, v3.4b[1]\n" - "ldr temploadreg3, [%[b_ptr0], #0x38]\n" - ".word 0x6fa0e1b1 // udot v17.4s, v13.16b, v0.4b[1]\n" - "ldr d12, [%[b_ptr0], #0x40]\n" - ".word 0x6fa1e1b5 // udot v21.4s, v13.16b, v1.4b[1]\n" - "ins v8.d[1], temploadreg0\n" - ".word 0x6fa2e1b9 // udot v25.4s, v13.16b, v2.4b[1]\n" - "ldr temploadreg0, [%[b_ptr0], #0x48]\n" - ".word 0x6fa3e1bd // udot v29.4s, v13.16b, v3.4b[1]\n" - "ldr d13, [%[b_ptr0], #0x50]\n" - ".word 0x6fa0e1d2 // udot v18.4s, v14.16b, v0.4b[1]\n" - "ins v9.d[1], temploadreg1\n" - ".word 0x6fa1e1d6 // udot v22.4s, v14.16b, v1.4b[1]\n" - "ldr temploadreg1, [%[b_ptr0], #0x58]\n" - ".word 0x6fa2e1da // udot v26.4s, v14.16b, v2.4b[1]\n" - "ins v10.d[1], temploadreg2\n" - ".word 0x6fa3e1de // udot v30.4s, v14.16b, v3.4b[1]\n" - "ldr d14, [%[b_ptr0], #0x60]\n" - ".word 0x6fa0e1f3 // udot v19.4s, v15.16b, v0.4b[1]\n" - "ldr temploadreg2, [%[b_ptr0], #0x68]\n" - ".word 0x6fa1e1f7 // udot v23.4s, v15.16b, v1.4b[1]\n" - "ins v11.d[1], temploadreg3\n" - ".word 0x6fa2e1fb // udot v27.4s, v15.16b, v2.4b[1]\n" - "ldr temploadreg3, [%[b_ptr0], #0x78]\n" - ".word 0x6fa3e1ff // udot v31.4s, v15.16b, v3.4b[1]\n" - "ldr d15, [%[b_ptr0], #0x70]\n" - ".word 0x6f80e910 // udot v16.4s, v8.16b, v0.4b[2]\n" - "ins v12.d[1], temploadreg0\n" - ".word 0x6f81e914 // udot v20.4s, v8.16b, v1.4b[2]\n" - "ins v13.d[1], temploadreg1\n" - ".word 0x6f82e918 // udot v24.4s, v8.16b, v2.4b[2]\n" - "ins v14.d[1], temploadreg2\n" - ".word 0x6f83e91c // udot v28.4s, v8.16b, v3.4b[2]\n" - "ins v15.d[1], temploadreg3\n" - ".word 0x6f80e931 // udot v17.4s, v9.16b, v0.4b[2]\n" - "add %[b_ptr0], %[b_ptr0], #0x100\n" - ".word 0x6f81e935 // udot v21.4s, v9.16b, v1.4b[2]\n" - "ldr d8, [%[b_ptr0], #-0x80]\n" - ".word 0x6f82e939 // udot v25.4s, v9.16b, v2.4b[2]\n" - "ldr temploadreg0, [%[b_ptr0], #-0x78]\n" - ".word 0x6f83e93d // udot v29.4s, v9.16b, v3.4b[2]\n" - "ldr d9, [%[b_ptr0], #-0x70]\n" - ".word 0x6f80e952 // udot v18.4s, v10.16b, v0.4b[2]\n" - "ldr temploadreg1, [%[b_ptr0], #-0x68]\n" - ".word 0x6f81e956 // udot v22.4s, v10.16b, v1.4b[2]\n" - "ldr temploadreg2, [%[b_ptr0], #-0x58]\n" - ".word 0x6f82e95a // udot v26.4s, v10.16b, v2.4b[2]\n" - "ldr temploadreg3, [%[b_ptr0], #-0x48]\n" - ".word 0x6f83e95e // udot v30.4s, v10.16b, v3.4b[2]\n" - "ldr d10, [%[b_ptr0], #-0x60]\n" - ".word 0x6f80e973 // udot v19.4s, v11.16b, v0.4b[2]\n" - "ins v8.d[1], temploadreg0\n" - ".word 0x6f81e977 // udot v23.4s, v11.16b, v1.4b[2]\n" - "ldr temploadreg0, [%[b_ptr0], #-0x38]\n" - ".word 0x6f82e97b // udot v27.4s, v11.16b, v2.4b[2]\n" - "ins v9.d[1], temploadreg1\n" - ".word 0x6f83e97f // udot v31.4s, v11.16b, v3.4b[2]\n" - "ldr d11, [%[b_ptr0], #-0x50]\n" - ".word 0x6fa0e990 // udot v16.4s, v12.16b, v0.4b[3]\n" - "ldr temploadreg1, [%[b_ptr0], #-0x28]\n" - ".word 0x6fa1e994 // udot v20.4s, v12.16b, v1.4b[3]\n" - "ins v10.d[1], temploadreg2\n" - ".word 0x6fa2e998 // udot v24.4s, v12.16b, v2.4b[3]\n" - "ldr temploadreg2, [%[b_ptr0], #-0x18]\n" - ".word 0x6fa3e99c // udot v28.4s, v12.16b, v3.4b[3]\n" - "ldr d12, [%[b_ptr0], #-0x40]\n" - ".word 0x6fa0e9b1 // udot v17.4s, v13.16b, v0.4b[3]\n" - "ins v11.d[1], temploadreg3\n" - ".word 0x6fa1e9b5 // udot v21.4s, v13.16b, v1.4b[3]\n" - "ldr temploadreg3, [%[b_ptr0], #-0x8]\n" - ".word 0x6fa2e9b9 // udot v25.4s, v13.16b, v2.4b[3]\n" - "ins v12.d[1], temploadreg0\n" - ".word 0x6fa3e9bd // udot v29.4s, v13.16b, v3.4b[3]\n" - "ldr d13, [%[b_ptr0], #-0x30]\n" - ".word 0x6fa0e9d2 // udot v18.4s, v14.16b, v0.4b[3]\n" - "ldr temploadreg0, [%[b_ptr0], #0x8]\n" - ".word 0x6fa1e9d6 // udot v22.4s, v14.16b, v1.4b[3]\n" - "add %[a_ptr0], %[a_ptr0], #0x10\n" - ".word 0x6fa2e9da // udot v26.4s, v14.16b, v2.4b[3]\n" - "ins v13.d[1], temploadreg1\n" - ".word 0x6fa3e9de // udot v30.4s, v14.16b, v3.4b[3]\n" - "ldr d14, [%[b_ptr0], #-0x20]\n" - ".word 0x6fa0e9f3 // udot v19.4s, v15.16b, v0.4b[3]\n" - "ldr temploadreg1, [%[b_ptr0], #0x18]\n" - ".word 0x6fa1e9f7 // udot v23.4s, v15.16b, v1.4b[3]\n" - "add a_ptr1, a_ptr1, #0x10\n" - ".word 0x6fa2e9fb // udot v27.4s, v15.16b, v2.4b[3]\n" - "ins v14.d[1], temploadreg2\n" - ".word 0x6fa3e9ff // udot v31.4s, v15.16b, v3.4b[3]\n" - "ldr d15, [%[b_ptr0], #-0x10]\n" - ".word 0x6f84e110 // udot v16.4s, v8.16b, v4.4b[0]\n" - "ldr temploadreg2, [%[b_ptr0], #0x28]\n" - ".word 0x6f85e114 // udot v20.4s, v8.16b, v5.4b[0]\n" - "add a_ptr2, a_ptr2, #0x10\n" - ".word 0x6f86e118 // udot v24.4s, v8.16b, v6.4b[0]\n" - "ins v15.d[1], temploadreg3\n" - ".word 0x6f87e11c // udot v28.4s, v8.16b, v7.4b[0]\n" - "ldr d8, [%[b_ptr0]]\n" - ".word 0x6f84e131 // udot v17.4s, v9.16b, v4.4b[0]\n" - "ldr temploadreg3, [%[b_ptr0], #0x38]\n" - ".word 0x6f85e135 // udot v21.4s, v9.16b, v5.4b[0]\n" - "add a_ptr3, a_ptr3, #0x10\n" - ".word 0x6f86e139 // udot v25.4s, v9.16b, v6.4b[0]\n" - "ins v8.d[1], temploadreg0\n" - ".word 0x6f87e13d // udot v29.4s, v9.16b, v7.4b[0]\n" - "ldr d9, [%[b_ptr0], #0x10]\n" - ".word 0x6f84e152 // udot v18.4s, v10.16b, v4.4b[0]\n" - "ldr temploadreg0, [%[b_ptr0], #0x48]\n" - ".word 0x6f85e156 // udot v22.4s, v10.16b, v5.4b[0]\n" - ".word 0x6f86e15a // udot v26.4s, v10.16b, v6.4b[0]\n" - "ins v9.d[1], temploadreg1\n" - ".word 0x6f87e15e // udot v30.4s, v10.16b, v7.4b[0]\n" - "ldr d10, [%[b_ptr0], #0x20]\n" - ".word 0x6f84e173 // udot v19.4s, v11.16b, v4.4b[0]\n" - "ldr temploadreg1, [%[b_ptr0], #0x58]\n" - ".word 0x6f85e177 // udot v23.4s, v11.16b, v5.4b[0]\n" - ".word 0x6f86e17b // udot v27.4s, v11.16b, v6.4b[0]\n" - "ins v10.d[1], temploadreg2\n" - ".word 0x6f87e17f // udot v31.4s, v11.16b, v7.4b[0]\n" - "ldr d11, [%[b_ptr0], #0x30]\n" - ".word 0x6fa4e190 // udot v16.4s, v12.16b, v4.4b[1]\n" - "ldr temploadreg2, [%[b_ptr0], #0x68]\n" - ".word 0x6fa5e194 // udot v20.4s, v12.16b, v5.4b[1]\n" - ".word 0x6fa6e198 // udot v24.4s, v12.16b, v6.4b[1]\n" - "ins v11.d[1], temploadreg3\n" - ".word 0x6fa7e19c // udot v28.4s, v12.16b, v7.4b[1]\n" - "ldr d12, [%[b_ptr0], #0x40]\n" - ".word 0x6fa4e1b1 // udot v17.4s, v13.16b, v4.4b[1]\n" - "ldr temploadreg3, [%[b_ptr0], #0x78]\n" - ".word 0x6fa5e1b5 // udot v21.4s, v13.16b, v5.4b[1]\n" - ".word 0x6fa6e1b9 // udot v25.4s, v13.16b, v6.4b[1]\n" - "ins v12.d[1], temploadreg0\n" - ".word 0x6fa7e1bd // udot v29.4s, v13.16b, v7.4b[1]\n" - "ldr d13, [%[b_ptr0], #0x50]\n" - ".word 0x6fa4e1d2 // udot v18.4s, v14.16b, v4.4b[1]\n" - ".word 0x6fa5e1d6 // udot v22.4s, v14.16b, v5.4b[1]\n" - ".word 0x6fa6e1da // udot v26.4s, v14.16b, v6.4b[1]\n" - "ins v13.d[1], temploadreg1\n" - ".word 0x6fa7e1de // udot v30.4s, v14.16b, v7.4b[1]\n" - "ldr d14, [%[b_ptr0], #0x60]\n" - ".word 0x6fa4e1f3 // udot v19.4s, v15.16b, v4.4b[1]\n" - ".word 0x6fa5e1f7 // udot v23.4s, v15.16b, v5.4b[1]\n" - ".word 0x6fa6e1fb // udot v27.4s, v15.16b, v6.4b[1]\n" - "ins v14.d[1], temploadreg2\n" - ".word 0x6fa7e1ff // udot v31.4s, v15.16b, v7.4b[1]\n" - "ldr d15, [%[b_ptr0], #0x70]\n" - ".word 0x6f84e910 // udot v16.4s, v8.16b, v4.4b[2]\n" - "add %[b_ptr0], %[b_ptr0], #0x80\n" - ".word 0x6f85e914 // udot v20.4s, v8.16b, v5.4b[2]\n" - "ins v15.d[1], temploadreg3\n" - ".word 0x6f86e918 // udot v24.4s, v8.16b, v6.4b[2]\n" - ".word 0x6f87e91c // udot v28.4s, v8.16b, v7.4b[2]\n" - ".word 0x6f84e931 // udot v17.4s, v9.16b, v4.4b[2]\n" - ".word 0x6f85e935 // udot v21.4s, v9.16b, v5.4b[2]\n" - ".word 0x6f86e939 // udot v25.4s, v9.16b, v6.4b[2]\n" - ".word 0x6f87e93d // udot v29.4s, v9.16b, v7.4b[2]\n" - ".word 0x6f84e952 // udot v18.4s, v10.16b, v4.4b[2]\n" - ".word 0x6f85e956 // udot v22.4s, v10.16b, v5.4b[2]\n" - ".word 0x6f86e95a // udot v26.4s, v10.16b, v6.4b[2]\n" - ".word 0x6f87e95e // udot v30.4s, v10.16b, v7.4b[2]\n" - ".word 0x6f84e973 // udot v19.4s, v11.16b, v4.4b[2]\n" - ".word 0x6f85e977 // udot v23.4s, v11.16b, v5.4b[2]\n" - ".word 0x6f86e97b // udot v27.4s, v11.16b, v6.4b[2]\n" - ".word 0x6f87e97f // udot v31.4s, v11.16b, v7.4b[2]\n" - ".word 0x6fa4e990 // udot v16.4s, v12.16b, v4.4b[3]\n" - ".word 0x6fa5e994 // udot v20.4s, v12.16b, v5.4b[3]\n" - ".word 0x6fa6e998 // udot v24.4s, v12.16b, v6.4b[3]\n" - ".word 0x6fa7e99c // udot v28.4s, v12.16b, v7.4b[3]\n" - ".word 0x6fa4e9b1 // udot v17.4s, v13.16b, v4.4b[3]\n" - ".word 0x6fa5e9b5 // udot v21.4s, v13.16b, v5.4b[3]\n" - ".word 0x6fa6e9b9 // udot v25.4s, v13.16b, v6.4b[3]\n" - ".word 0x6fa7e9bd // udot v29.4s, v13.16b, v7.4b[3]\n" - ".word 0x6fa4e9d2 // udot v18.4s, v14.16b, v4.4b[3]\n" - ".word 0x6fa5e9d6 // udot v22.4s, v14.16b, v5.4b[3]\n" - ".word 0x6fa6e9da // udot v26.4s, v14.16b, v6.4b[3]\n" - ".word 0x6fa7e9de // udot v30.4s, v14.16b, v7.4b[3]\n" - ".word 0x6fa4e9f3 // udot v19.4s, v15.16b, v4.4b[3]\n" - ".word 0x6fa5e9f7 // udot v23.4s, v15.16b, v5.4b[3]\n" - ".word 0x6fa6e9fb // udot v27.4s, v15.16b, v6.4b[3]\n" - ".word 0x6fa7e9ff // udot v31.4s, v15.16b, v7.4b[3]\n" - "b 5f\n" - "4:\n" - ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" - "ldr temploadreg0, [%[b_ptr0], #0x8]\n" - ".word 0x6f81e114 // udot v20.4s, v8.16b, v1.4b[0]\n" - "ldr temploadreg1, [%[b_ptr0], #0x18]\n" - ".word 0x6f82e118 // udot v24.4s, v8.16b, v2.4b[0]\n" - "ldr temploadreg2, [%[b_ptr0], #0x28]\n" - ".word 0x6f83e11c // udot v28.4s, v8.16b, v3.4b[0]\n" - "ldr d8, [%[b_ptr0]]\n" - ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" - "ldr temploadreg3, [%[b_ptr0], #0x38]\n" - ".word 0x6f81e135 // udot v21.4s, v9.16b, v1.4b[0]\n" - ".word 0x6f82e139 // udot v25.4s, v9.16b, v2.4b[0]\n" - "ins v8.d[1], temploadreg0\n" - ".word 0x6f83e13d // udot v29.4s, v9.16b, v3.4b[0]\n" - "ldr d9, [%[b_ptr0], #0x10]\n" - ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" - "ldr temploadreg0, [%[b_ptr0], #0x48]\n" - ".word 0x6f81e156 // udot v22.4s, v10.16b, v1.4b[0]\n" - ".word 0x6f82e15a // udot v26.4s, v10.16b, v2.4b[0]\n" - "ins v9.d[1], temploadreg1\n" - ".word 0x6f83e15e // udot v30.4s, v10.16b, v3.4b[0]\n" - "ldr d10, [%[b_ptr0], #0x20]\n" - ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" - "ldr temploadreg1, [%[b_ptr0], #0x58]\n" - ".word 0x6f81e177 // udot v23.4s, v11.16b, v1.4b[0]\n" - ".word 0x6f82e17b // udot v27.4s, v11.16b, v2.4b[0]\n" - "ins v10.d[1], temploadreg2\n" - ".word 0x6f83e17f // udot v31.4s, v11.16b, v3.4b[0]\n" - "ldr d11, [%[b_ptr0], #0x30]\n" - ".word 0x6fa0e190 // udot v16.4s, v12.16b, v0.4b[1]\n" - "ldr temploadreg2, [%[b_ptr0], #0x68]\n" - ".word 0x6fa1e194 // udot v20.4s, v12.16b, v1.4b[1]\n" - ".word 0x6fa2e198 // udot v24.4s, v12.16b, v2.4b[1]\n" - "ins v11.d[1], temploadreg3\n" - ".word 0x6fa3e19c // udot v28.4s, v12.16b, v3.4b[1]\n" - "ldr d12, [%[b_ptr0], #0x40]\n" - ".word 0x6fa0e1b1 // udot v17.4s, v13.16b, v0.4b[1]\n" - "ldr temploadreg3, [%[b_ptr0], #0x78]\n" - ".word 0x6fa1e1b5 // udot v21.4s, v13.16b, v1.4b[1]\n" - ".word 0x6fa2e1b9 // udot v25.4s, v13.16b, v2.4b[1]\n" - "ins v12.d[1], temploadreg0\n" - ".word 0x6fa3e1bd // udot v29.4s, v13.16b, v3.4b[1]\n" - "ldr d13, [%[b_ptr0], #0x50]\n" - ".word 0x6fa0e1d2 // udot v18.4s, v14.16b, v0.4b[1]\n" - ".word 0x6fa1e1d6 // udot v22.4s, v14.16b, v1.4b[1]\n" - ".word 0x6fa2e1da // udot v26.4s, v14.16b, v2.4b[1]\n" - "ins v13.d[1], temploadreg1\n" - ".word 0x6fa3e1de // udot v30.4s, v14.16b, v3.4b[1]\n" - "ldr d14, [%[b_ptr0], #0x60]\n" - ".word 0x6fa0e1f3 // udot v19.4s, v15.16b, v0.4b[1]\n" - ".word 0x6fa1e1f7 // udot v23.4s, v15.16b, v1.4b[1]\n" - ".word 0x6fa2e1fb // udot v27.4s, v15.16b, v2.4b[1]\n" - "ins v14.d[1], temploadreg2\n" - ".word 0x6fa3e1ff // udot v31.4s, v15.16b, v3.4b[1]\n" - "ldr d15, [%[b_ptr0], #0x70]\n" - ".word 0x6f80e910 // udot v16.4s, v8.16b, v0.4b[2]\n" - "add %[b_ptr0], %[b_ptr0], #0x80\n" - ".word 0x6f81e914 // udot v20.4s, v8.16b, v1.4b[2]\n" - "ins v15.d[1], temploadreg3\n" - ".word 0x6f82e918 // udot v24.4s, v8.16b, v2.4b[2]\n" - ".word 0x6f83e91c // udot v28.4s, v8.16b, v3.4b[2]\n" - ".word 0x6f80e931 // udot v17.4s, v9.16b, v0.4b[2]\n" - ".word 0x6f81e935 // udot v21.4s, v9.16b, v1.4b[2]\n" - ".word 0x6f82e939 // udot v25.4s, v9.16b, v2.4b[2]\n" - ".word 0x6f83e93d // udot v29.4s, v9.16b, v3.4b[2]\n" - ".word 0x6f80e952 // udot v18.4s, v10.16b, v0.4b[2]\n" - ".word 0x6f81e956 // udot v22.4s, v10.16b, v1.4b[2]\n" - ".word 0x6f82e95a // udot v26.4s, v10.16b, v2.4b[2]\n" - ".word 0x6f83e95e // udot v30.4s, v10.16b, v3.4b[2]\n" - ".word 0x6f80e973 // udot v19.4s, v11.16b, v0.4b[2]\n" - ".word 0x6f81e977 // udot v23.4s, v11.16b, v1.4b[2]\n" - ".word 0x6f82e97b // udot v27.4s, v11.16b, v2.4b[2]\n" - ".word 0x6f83e97f // udot v31.4s, v11.16b, v3.4b[2]\n" - ".word 0x6fa0e990 // udot v16.4s, v12.16b, v0.4b[3]\n" - ".word 0x6fa1e994 // udot v20.4s, v12.16b, v1.4b[3]\n" - ".word 0x6fa2e998 // udot v24.4s, v12.16b, v2.4b[3]\n" - ".word 0x6fa3e99c // udot v28.4s, v12.16b, v3.4b[3]\n" - ".word 0x6fa0e9b1 // udot v17.4s, v13.16b, v0.4b[3]\n" - ".word 0x6fa1e9b5 // udot v21.4s, v13.16b, v1.4b[3]\n" - ".word 0x6fa2e9b9 // udot v25.4s, v13.16b, v2.4b[3]\n" - ".word 0x6fa3e9bd // udot v29.4s, v13.16b, v3.4b[3]\n" - ".word 0x6fa0e9d2 // udot v18.4s, v14.16b, v0.4b[3]\n" - ".word 0x6fa1e9d6 // udot v22.4s, v14.16b, v1.4b[3]\n" - ".word 0x6fa2e9da // udot v26.4s, v14.16b, v2.4b[3]\n" - ".word 0x6fa3e9de // udot v30.4s, v14.16b, v3.4b[3]\n" - ".word 0x6fa0e9f3 // udot v19.4s, v15.16b, v0.4b[3]\n" - ".word 0x6fa1e9f7 // udot v23.4s, v15.16b, v1.4b[3]\n" - ".word 0x6fa2e9fb // udot v27.4s, v15.16b, v2.4b[3]\n" - ".word 0x6fa3e9ff // udot v31.4s, v15.16b, v3.4b[3]\n" - "5:\n" - "cbz %[blocks], 6f\n" - "7:\n" - "ldr q8, [%[b_ptr0]]\n" - "subs %[blocks], %[blocks], #0x1\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - "ldr s0, [%[a_ptr0]]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - "add %[a_ptr0], %[a_ptr0], #0x4\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - "add %[b_ptr0], %[b_ptr0], #0x40\n" - ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" - "ldr s1, [a_ptr1]\n" - ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" - "add a_ptr1, a_ptr1, #0x4\n" - ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" - "ldr s2, [a_ptr2]\n" - ".word 0x6f81e114 // udot v20.4s, v8.16b, v1.4b[0]\n" - "add a_ptr2, a_ptr2, #0x4\n" - ".word 0x6f81e135 // udot v21.4s, v9.16b, v1.4b[0]\n" - "ldr s3, [a_ptr3]\n" - ".word 0x6f82e118 // udot v24.4s, v8.16b, v2.4b[0]\n" - "add a_ptr3, a_ptr3, #0x4\n" - ".word 0x6f82e139 // udot v25.4s, v9.16b, v2.4b[0]\n" - ".word 0x6f83e11c // udot v28.4s, v8.16b, v3.4b[0]\n" - ".word 0x6f83e13d // udot v29.4s, v9.16b, v3.4b[0]\n" - ".word 0x6f81e156 // udot v22.4s, v10.16b, v1.4b[0]\n" - ".word 0x6f82e15a // udot v26.4s, v10.16b, v2.4b[0]\n" - ".word 0x6f83e15e // udot v30.4s, v10.16b, v3.4b[0]\n" - ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" - ".word 0x6f81e177 // udot v23.4s, v11.16b, v1.4b[0]\n" - ".word 0x6f82e17b // udot v27.4s, v11.16b, v2.4b[0]\n" - ".word 0x6f83e17f // udot v31.4s, v11.16b, v3.4b[0]\n" - "b.ne 7b\n" - "6:\n" - "cbz %[odds], 8f\n" - "ld1 {v0.b}[0], [%[a_ptr0]], #1\n" - "ld1 {v1.b}[0], [a_ptr1], #1\n" - "ld1 {v2.b}[0], [a_ptr2], #1\n" - "ld1 {v3.b}[0], [a_ptr3], #1\n" - "subs %[odds], %[odds], #0x1\n" - "b.eq 9f\n" - "ld1 {v0.b}[1], [%[a_ptr0]], #1\n" - "ld1 {v1.b}[1], [a_ptr1], #1\n" - "ld1 {v2.b}[1], [a_ptr2], #1\n" - "ld1 {v3.b}[1], [a_ptr3], #1\n" - "subs %[odds], %[odds], #0x1\n" - "b.eq 9f\n" - "ld1 {v0.b}[2], [%[a_ptr0]]\n" - "ld1 {v1.b}[2], [a_ptr1]\n" - "ld1 {v2.b}[2], [a_ptr2]\n" - "ld1 {v3.b}[2], [a_ptr3]\n" - "9:\n" - "ldr q8, [%[b_ptr0]]\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" - ".word 0x6f81e114 // udot v20.4s, v8.16b, v1.4b[0]\n" - ".word 0x6f82e118 // udot v24.4s, v8.16b, v2.4b[0]\n" - ".word 0x6f83e11c // udot v28.4s, v8.16b, v3.4b[0]\n" - ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" - ".word 0x6f81e135 // udot v21.4s, v9.16b, v1.4b[0]\n" - ".word 0x6f82e139 // udot v25.4s, v9.16b, v2.4b[0]\n" - ".word 0x6f83e13d // udot v29.4s, v9.16b, v3.4b[0]\n" - ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" - ".word 0x6f81e156 // udot v22.4s, v10.16b, v1.4b[0]\n" - ".word 0x6f82e15a // udot v26.4s, v10.16b, v2.4b[0]\n" - ".word 0x6f83e15e // udot v30.4s, v10.16b, v3.4b[0]\n" - ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" - ".word 0x6f81e177 // udot v23.4s, v11.16b, v1.4b[0]\n" - ".word 0x6f82e17b // udot v27.4s, v11.16b, v2.4b[0]\n" - ".word 0x6f83e17f // udot v31.4s, v11.16b, v3.4b[0]\n" - "8:\n" - "str q16, [%[c_ptr0]]\n" - "str q17, [%[c_ptr0], #0x10]\n" - "str q18, [%[c_ptr0], #0x20]\n" - "str q19, [%[c_ptr0], #0x30]\n" - "add %[c_ptr0], %[c_ptr0], #0x40\n" - "str q20, [c_ptr1]\n" - "str q21, [c_ptr1, #0x10]\n" - "str q22, [c_ptr1, #0x20]\n" - "str q23, [c_ptr1, #0x30]\n" - "str q24, [c_ptr2]\n" - "str q25, [c_ptr2, #0x10]\n" - "str q26, [c_ptr2, #0x20]\n" - "str q27, [c_ptr2, #0x30]\n" - "str q28, [c_ptr3]\n" - "str q29, [c_ptr3, #0x10]\n" - "str q30, [c_ptr3, #0x20]\n" - "str q31, [c_ptr3, #0x30]\n" - ".unreq a_ptr1\n" - ".unreq a_ptr2\n" - ".unreq a_ptr3\n" - ".unreq c_ptr1\n" - ".unreq c_ptr2\n" - ".unreq c_ptr3\n" - ".unreq temploadreg0\n" - ".unreq temploadreg1\n" - ".unreq temploadreg2\n" - ".unreq temploadreg3\n" - : [a_ptr0] "+r" (a_ptr0), [b_ptr0] "+r" (b_ptr0), [c_ptr0] "+r" (c_ptr0), [loops] "+r" (loops), [regs] "+r" (regs), [blocks] "+r" (blocks), [odds] "+r" (odds) - : [betaptr] "r" (betaptr), [width] "r" (width), [beta0] "r" (beta0), [lda] "r" (ldab), [ldc] "r" (ldcb) - : "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x0", "x1", "x2", "x3", "x4", "x5", "x6", "x7", "x8", "x9", "cc", "memory" + "a_ptr1 .req X0\n" + "a_ptr2 .req X1\n" + "a_ptr3 .req X2\n" + "c_ptr1 .req X3\n" + "c_ptr2 .req X4\n" + "c_ptr3 .req X5\n" + "temploadreg0 .req X6\n" + "temploadreg1 .req X7\n" + "temploadreg2 .req X8\n" + "temploadreg3 .req X9\n" + "add a_ptr1, %[a_ptr0], %[lda]\n" + "add c_ptr1, %[c_ptr0], %[ldc]\n" + "add a_ptr2, a_ptr1, %[lda]\n" + "add c_ptr2, c_ptr1, %[ldc]\n" + "add a_ptr3, a_ptr2, %[lda]\n" + "add c_ptr3, c_ptr2, %[ldc]\n" + "cbz %[beta0], 1f\n" + "movi v16.4s, #0\n" + "ldr q0, [%[a_ptr0]]\n" + "movi v17.4s, #0\n" + "ldr q1, [a_ptr1]\n" + "movi v18.4s, #0\n" + "ldr q2, [a_ptr2]\n" + "movi v19.4s, #0\n" + "ldr q3, [a_ptr3]\n" + "movi v20.4s, #0\n" + "ldr q8, [%[b_ptr0]]\n" + "movi v21.4s, #0\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + "movi v22.4s, #0\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + "movi v23.4s, #0\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + "movi v24.4s, #0\n" + "ldr q12, [%[b_ptr0], #0x40]\n" + "movi v25.4s, #0\n" + "ldr q13, [%[b_ptr0], #0x50]\n" + "movi v26.4s, #0\n" + "ldr d14, [%[b_ptr0], #0x60]\n" + "movi v27.4s, #0\n" + "ldr temploadreg2, [%[b_ptr0], #0x68]\n" + "movi v28.4s, #0\n" + "add %[a_ptr0], %[a_ptr0], #0x10\n" + "movi v29.4s, #0\n" + "ins v14.d[1], temploadreg2\n" + "movi v30.4s, #0\n" + "add a_ptr1, a_ptr1, #0x10\n" + "movi v31.4s, #0\n" + "add a_ptr2, a_ptr2, #0x10\n" + "add a_ptr3, a_ptr3, #0x10\n" + "add %[b_ptr0], %[b_ptr0], #0x80\n" + "cbz %[loops], 2f\n" + "b 3f\n" + "1:\n" + "ld1r {v15.4s}, [%[betaptr]]\n" + "ldr q16, [%[c_ptr0]]\n" + "ldr q17, [%[c_ptr0], #0x10]\n" + "ldr q18, [%[c_ptr0], #0x20]\n" + "ldr q19, [%[c_ptr0], #0x30]\n" + "mul v16.4s, v16.4s, v15.4s\n" + "ldr q20, [c_ptr1]\n" + "mul v17.4s, v17.4s, v15.4s\n" + "ldr q21, [c_ptr1, #0x10]\n" + "mul v18.4s, v18.4s, v15.4s\n" + "ldr q22, [c_ptr1, #0x20]\n" + "mul v19.4s, v19.4s, v15.4s\n" + "ldr q23, [c_ptr1, #0x30]\n" + "mul v20.4s, v20.4s, v15.4s\n" + "ldr q24, [c_ptr2]\n" + "mul v21.4s, v21.4s, v15.4s\n" + "ldr q25, [c_ptr2, #0x10]\n" + "mul v22.4s, v22.4s, v15.4s\n" + "ldr q26, [c_ptr2, #0x20]\n" + "mul v23.4s, v23.4s, v15.4s\n" + "ldr q27, [c_ptr2, #0x30]\n" + "mul v24.4s, v24.4s, v15.4s\n" + "ldr q28, [c_ptr3]\n" + "mul v25.4s, v25.4s, v15.4s\n" + "ldr q29, [c_ptr3, #0x10]\n" + "mul v26.4s, v26.4s, v15.4s\n" + "ldr q30, [c_ptr3, #0x20]\n" + "mul v27.4s, v27.4s, v15.4s\n" + "ldr q31, [c_ptr3, #0x30]\n" + "mul v28.4s, v28.4s, v15.4s\n" + "ldr q0, [%[a_ptr0]]\n" + "mul v29.4s, v29.4s, v15.4s\n" + "ldr q1, [a_ptr1]\n" + "mul v30.4s, v30.4s, v15.4s\n" + "ldr q2, [a_ptr2]\n" + "mul v31.4s, v31.4s, v15.4s\n" + "ldr q3, [a_ptr3]\n" + "ldr q8, [%[b_ptr0]]\n" + "add %[a_ptr0], %[a_ptr0], #0x10\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + "add a_ptr1, a_ptr1, #0x10\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + "add a_ptr2, a_ptr2, #0x10\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + "add a_ptr3, a_ptr3, #0x10\n" + "ldr q12, [%[b_ptr0], #0x40]\n" + "ldr q13, [%[b_ptr0], #0x50]\n" + "ldr d14, [%[b_ptr0], #0x60]\n" + "ldr temploadreg2, [%[b_ptr0], #0x68]\n" + "add %[b_ptr0], %[b_ptr0], #0x80\n" + "ins v14.d[1], temploadreg2\n" + "cbz %[loops], 2f\n" + "3:\n" + ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" + "ldr d15, [%[b_ptr0], #-0x10]\n" + ".word 0x6f81e114 // udot v20.4s, v8.16b, v1.4b[0]\n" + "ldr temploadreg3, [%[b_ptr0], #-0x8]\n" + ".word 0x6f82e118 // udot v24.4s, v8.16b, v2.4b[0]\n" + "ldr d4, [%[a_ptr0]]\n" + ".word 0x6f83e11c // udot v28.4s, v8.16b, v3.4b[0]\n" + "ldr temploadreg0, [%[a_ptr0], #0x8]\n" + ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" + "ldr d5, [a_ptr1]\n" + ".word 0x6f81e135 // udot v21.4s, v9.16b, v1.4b[0]\n" + "ldr temploadreg1, [a_ptr1, #0x8]\n" + ".word 0x6f82e139 // udot v25.4s, v9.16b, v2.4b[0]\n" + "ldr d6, [a_ptr2]\n" + ".word 0x6f83e13d // udot v29.4s, v9.16b, v3.4b[0]\n" + "ldr temploadreg2, [a_ptr2, #0x8]\n" + ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" + "ldr d7, [a_ptr3]\n" + ".word 0x6f81e156 // udot v22.4s, v10.16b, v1.4b[0]\n" + "ins v15.d[1], temploadreg3\n" + ".word 0x6f82e15a // udot v26.4s, v10.16b, v2.4b[0]\n" + "ldr temploadreg3, [a_ptr3, #0x8]\n" + ".word 0x6f83e15e // udot v30.4s, v10.16b, v3.4b[0]\n" + "ldr d8, [%[b_ptr0]]\n" + ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" + "ins v4.d[1], temploadreg0\n" + ".word 0x6f81e177 // udot v23.4s, v11.16b, v1.4b[0]\n" + "ldr temploadreg0, [%[b_ptr0], #0x8]\n" + ".word 0x6f82e17b // udot v27.4s, v11.16b, v2.4b[0]\n" + "ldr d9, [%[b_ptr0], #0x10]\n" + ".word 0x6f83e17f // udot v31.4s, v11.16b, v3.4b[0]\n" + "ins v5.d[1], temploadreg1\n" + ".word 0x6fa0e190 // udot v16.4s, v12.16b, v0.4b[1]\n" + "ldr temploadreg1, [%[b_ptr0], #0x18]\n" + ".word 0x6fa1e194 // udot v20.4s, v12.16b, v1.4b[1]\n" + "ldr d10, [%[b_ptr0], #0x20]\n" + ".word 0x6fa2e198 // udot v24.4s, v12.16b, v2.4b[1]\n" + "ins v6.d[1], temploadreg2\n" + ".word 0x6fa3e19c // udot v28.4s, v12.16b, v3.4b[1]\n" + "ldr temploadreg2, [%[b_ptr0], #0x28]\n" + ".word 0x6fa0e1b1 // udot v17.4s, v13.16b, v0.4b[1]\n" + "ldr d11, [%[b_ptr0], #0x30]\n" + ".word 0x6fa1e1b5 // udot v21.4s, v13.16b, v1.4b[1]\n" + "ins v7.d[1], temploadreg3\n" + ".word 0x6fa2e1b9 // udot v25.4s, v13.16b, v2.4b[1]\n" + "ldr temploadreg3, [%[b_ptr0], #0x38]\n" + ".word 0x6fa3e1bd // udot v29.4s, v13.16b, v3.4b[1]\n" + "ldr d12, [%[b_ptr0], #0x40]\n" + ".word 0x6fa0e1d2 // udot v18.4s, v14.16b, v0.4b[1]\n" + "ins v8.d[1], temploadreg0\n" + ".word 0x6fa1e1d6 // udot v22.4s, v14.16b, v1.4b[1]\n" + "ldr temploadreg0, [%[b_ptr0], #0x48]\n" + ".word 0x6fa2e1da // udot v26.4s, v14.16b, v2.4b[1]\n" + "ldr d13, [%[b_ptr0], #0x50]\n" + ".word 0x6fa3e1de // udot v30.4s, v14.16b, v3.4b[1]\n" + "ins v9.d[1], temploadreg1\n" + ".word 0x6fa0e1f3 // udot v19.4s, v15.16b, v0.4b[1]\n" + "ldr temploadreg1, [%[b_ptr0], #0x58]\n" + ".word 0x6fa1e1f7 // udot v23.4s, v15.16b, v1.4b[1]\n" + "ldr d14, [%[b_ptr0], #0x60]\n" + ".word 0x6fa2e1fb // udot v27.4s, v15.16b, v2.4b[1]\n" + "ins v10.d[1], temploadreg2\n" + ".word 0x6fa3e1ff // udot v31.4s, v15.16b, v3.4b[1]\n" + "ldr temploadreg2, [%[b_ptr0], #0x68]\n" + ".word 0x6f80e910 // udot v16.4s, v8.16b, v0.4b[2]\n" + "ldr d15, [%[b_ptr0], #0x70]\n" + ".word 0x6f81e914 // udot v20.4s, v8.16b, v1.4b[2]\n" + "ins v11.d[1], temploadreg3\n" + ".word 0x6f82e918 // udot v24.4s, v8.16b, v2.4b[2]\n" + "ldr temploadreg3, [%[b_ptr0], #0x78]\n" + ".word 0x6f83e91c // udot v28.4s, v8.16b, v3.4b[2]\n" + "ins v12.d[1], temploadreg0\n" + ".word 0x6f80e931 // udot v17.4s, v9.16b, v0.4b[2]\n" + "ins v13.d[1], temploadreg1\n" + ".word 0x6f81e935 // udot v21.4s, v9.16b, v1.4b[2]\n" + "ins v14.d[1], temploadreg2\n" + ".word 0x6f82e939 // udot v25.4s, v9.16b, v2.4b[2]\n" + "ins v15.d[1], temploadreg3\n" + ".word 0x6f83e93d // udot v29.4s, v9.16b, v3.4b[2]\n" + "subs %[loops], %[loops], #0x1\n" + ".word 0x6f80e952 // udot v18.4s, v10.16b, v0.4b[2]\n" + "prfm PLDL1KEEP, [%[a_ptr0], #0x40]\n" + ".word 0x6f81e956 // udot v22.4s, v10.16b, v1.4b[2]\n" + "add %[b_ptr0], %[b_ptr0], #0x100\n" + ".word 0x6f82e95a // udot v26.4s, v10.16b, v2.4b[2]\n" + "ldr d8, [%[b_ptr0], #-0x80]\n" + ".word 0x6f83e95e // udot v30.4s, v10.16b, v3.4b[2]\n" + "ldr temploadreg0, [%[b_ptr0], #-0x78]\n" + ".word 0x6f80e973 // udot v19.4s, v11.16b, v0.4b[2]\n" + "ldr d9, [%[b_ptr0], #-0x70]\n" + ".word 0x6f81e977 // udot v23.4s, v11.16b, v1.4b[2]\n" + "ldr temploadreg1, [%[b_ptr0], #-0x68]\n" + ".word 0x6f82e97b // udot v27.4s, v11.16b, v2.4b[2]\n" + "ldr d10, [%[b_ptr0], #-0x60]\n" + ".word 0x6f83e97f // udot v31.4s, v11.16b, v3.4b[2]\n" + "ldr temploadreg2, [%[b_ptr0], #-0x58]\n" + ".word 0x6fa0e990 // udot v16.4s, v12.16b, v0.4b[3]\n" + "ldr d11, [%[b_ptr0], #-0x50]\n" + ".word 0x6fa1e994 // udot v20.4s, v12.16b, v1.4b[3]\n" + "ldr temploadreg3, [%[b_ptr0], #-0x48]\n" + ".word 0x6fa2e998 // udot v24.4s, v12.16b, v2.4b[3]\n" + "ins v8.d[1], temploadreg0\n" + ".word 0x6fa3e99c // udot v28.4s, v12.16b, v3.4b[3]\n" + "ldr d12, [%[b_ptr0], #-0x40]\n" + ".word 0x6fa0e9b1 // udot v17.4s, v13.16b, v0.4b[3]\n" + "ldr temploadreg0, [%[b_ptr0], #-0x38]\n" + ".word 0x6fa1e9b5 // udot v21.4s, v13.16b, v1.4b[3]\n" + "ins v9.d[1], temploadreg1\n" + ".word 0x6fa2e9b9 // udot v25.4s, v13.16b, v2.4b[3]\n" + "ldr temploadreg1, [%[b_ptr0], #-0x28]\n" + ".word 0x6fa3e9bd // udot v29.4s, v13.16b, v3.4b[3]\n" + "ldr d13, [%[b_ptr0], #-0x30]\n" + ".word 0x6fa0e9d2 // udot v18.4s, v14.16b, v0.4b[3]\n" + "ins v10.d[1], temploadreg2\n" + ".word 0x6fa1e9d6 // udot v22.4s, v14.16b, v1.4b[3]\n" + "ldr temploadreg2, [%[b_ptr0], #-0x18]\n" + ".word 0x6fa2e9da // udot v26.4s, v14.16b, v2.4b[3]\n" + "ins v11.d[1], temploadreg3\n" + ".word 0x6fa3e9de // udot v30.4s, v14.16b, v3.4b[3]\n" + "ldr d14, [%[b_ptr0], #-0x20]\n" + ".word 0x6fa0e9f3 // udot v19.4s, v15.16b, v0.4b[3]\n" + "ldr temploadreg3, [%[b_ptr0], #-0x8]\n" + ".word 0x6fa1e9f7 // udot v23.4s, v15.16b, v1.4b[3]\n" + "ins v12.d[1], temploadreg0\n" + ".word 0x6fa2e9fb // udot v27.4s, v15.16b, v2.4b[3]\n" + "ins v13.d[1], temploadreg1\n" + ".word 0x6fa3e9ff // udot v31.4s, v15.16b, v3.4b[3]\n" + "ldr d15, [%[b_ptr0], #-0x10]\n" + ".word 0x6f84e110 // udot v16.4s, v8.16b, v4.4b[0]\n" + "ins v14.d[1], temploadreg2\n" + ".word 0x6f85e114 // udot v20.4s, v8.16b, v5.4b[0]\n" + "add %[a_ptr0], %[a_ptr0], #0x20\n" + ".word 0x6f86e118 // udot v24.4s, v8.16b, v6.4b[0]\n" + "ldr d0, [%[a_ptr0], #-0x10]\n" + ".word 0x6f87e11c // udot v28.4s, v8.16b, v7.4b[0]\n" + "ldr temploadreg0, [%[a_ptr0], #-0x8]\n" + ".word 0x6f84e131 // udot v17.4s, v9.16b, v4.4b[0]\n" + "ins v15.d[1], temploadreg3\n" + ".word 0x6f85e135 // udot v21.4s, v9.16b, v5.4b[0]\n" + "ldr d8, [%[b_ptr0]]\n" + ".word 0x6f86e139 // udot v25.4s, v9.16b, v6.4b[0]\n" + "ins v0.d[1], temploadreg0\n" + ".word 0x6f87e13d // udot v29.4s, v9.16b, v7.4b[0]\n" + "ldr temploadreg0, [%[b_ptr0], #0x8]\n" + ".word 0x6f84e152 // udot v18.4s, v10.16b, v4.4b[0]\n" + "ldr d9, [%[b_ptr0], #0x10]\n" + ".word 0x6f85e156 // udot v22.4s, v10.16b, v5.4b[0]\n" + "add a_ptr1, a_ptr1, #0x20\n" + ".word 0x6f86e15a // udot v26.4s, v10.16b, v6.4b[0]\n" + "ldr d1, [a_ptr1, #-0x10]\n" + ".word 0x6f87e15e // udot v30.4s, v10.16b, v7.4b[0]\n" + "ldr temploadreg1, [a_ptr1, #-0x8]\n" + ".word 0x6f84e173 // udot v19.4s, v11.16b, v4.4b[0]\n" + "ldr d10, [%[b_ptr0], #0x20]\n" + ".word 0x6f85e177 // udot v23.4s, v11.16b, v5.4b[0]\n" + "ins v8.d[1], temploadreg0\n" + ".word 0x6f86e17b // udot v27.4s, v11.16b, v6.4b[0]\n" + "ins v1.d[1], temploadreg1\n" + ".word 0x6f87e17f // udot v31.4s, v11.16b, v7.4b[0]\n" + "ldr temploadreg1, [%[b_ptr0], #0x18]\n" + ".word 0x6fa4e190 // udot v16.4s, v12.16b, v4.4b[1]\n" + "ldr d11, [%[b_ptr0], #0x30]\n" + ".word 0x6fa5e194 // udot v20.4s, v12.16b, v5.4b[1]\n" + "ldr temploadreg0, [%[b_ptr0], #0x48]\n" + ".word 0x6fa6e198 // udot v24.4s, v12.16b, v6.4b[1]\n" + "ins v9.d[1], temploadreg1\n" + ".word 0x6fa7e19c // udot v28.4s, v12.16b, v7.4b[1]\n" + "ldr d12, [%[b_ptr0], #0x40]\n" + ".word 0x6fa4e1b1 // udot v17.4s, v13.16b, v4.4b[1]\n" + "ldr temploadreg1, [%[b_ptr0], #0x58]\n" + ".word 0x6fa5e1b5 // udot v21.4s, v13.16b, v5.4b[1]\n" + "add a_ptr2, a_ptr2, #0x20\n" + ".word 0x6fa6e1b9 // udot v25.4s, v13.16b, v6.4b[1]\n" + "ldr d2, [a_ptr2, #-0x10]\n" + ".word 0x6fa7e1bd // udot v29.4s, v13.16b, v7.4b[1]\n" + "ldr temploadreg2, [a_ptr2, #-0x8]\n" + ".word 0x6fa4e1d2 // udot v18.4s, v14.16b, v4.4b[1]\n" + "ldr d13, [%[b_ptr0], #0x50]\n" + ".word 0x6fa5e1d6 // udot v22.4s, v14.16b, v5.4b[1]\n" + "ins v12.d[1], temploadreg0\n" + ".word 0x6fa6e1da // udot v26.4s, v14.16b, v6.4b[1]\n" + "ins v2.d[1], temploadreg2\n" + ".word 0x6fa7e1de // udot v30.4s, v14.16b, v7.4b[1]\n" + "ldr temploadreg2, [%[b_ptr0], #0x28]\n" + ".word 0x6fa4e1f3 // udot v19.4s, v15.16b, v4.4b[1]\n" + "ldr d14, [%[b_ptr0], #0x60]\n" + ".word 0x6fa5e1f7 // udot v23.4s, v15.16b, v5.4b[1]\n" + "ins v13.d[1], temploadreg1\n" + ".word 0x6fa6e1fb // udot v27.4s, v15.16b, v6.4b[1]\n" + "ins v10.d[1], temploadreg2\n" + ".word 0x6fa7e1ff // udot v31.4s, v15.16b, v7.4b[1]\n" + "ldr temploadreg2, [%[b_ptr0], #0x68]\n" + ".word 0x6f84e910 // udot v16.4s, v8.16b, v4.4b[2]\n" + "ldr d15, [%[b_ptr0], #0x70]\n" + ".word 0x6f85e914 // udot v20.4s, v8.16b, v5.4b[2]\n" + "add a_ptr3, a_ptr3, #0x20\n" + ".word 0x6f86e918 // udot v24.4s, v8.16b, v6.4b[2]\n" + "ldr d3, [a_ptr3, #-0x10]\n" + ".word 0x6f87e91c // udot v28.4s, v8.16b, v7.4b[2]\n" + "ldr temploadreg3, [a_ptr3, #-0x8]\n" + ".word 0x6f84e931 // udot v17.4s, v9.16b, v4.4b[2]\n" + "ins v14.d[1], temploadreg2\n" + ".word 0x6f85e935 // udot v21.4s, v9.16b, v5.4b[2]\n" + "prfm PLDL1KEEP, [a_ptr1, #0x40]\n" + ".word 0x6f86e939 // udot v25.4s, v9.16b, v6.4b[2]\n" + "ins v3.d[1], temploadreg3\n" + ".word 0x6f87e93d // udot v29.4s, v9.16b, v7.4b[2]\n" + "ldr temploadreg3, [%[b_ptr0], #0x38]\n" + ".word 0x6f84e952 // udot v18.4s, v10.16b, v4.4b[2]\n" + "prfm PLDL1KEEP, [a_ptr2, #0x40]\n" + ".word 0x6f85e956 // udot v22.4s, v10.16b, v5.4b[2]\n" + "ins v11.d[1], temploadreg3\n" + ".word 0x6f86e95a // udot v26.4s, v10.16b, v6.4b[2]\n" + "ldr temploadreg3, [%[b_ptr0], #0x78]\n" + ".word 0x6f87e95e // udot v30.4s, v10.16b, v7.4b[2]\n" + "add %[b_ptr0], %[b_ptr0], #0x100\n" + ".word 0x6f84e973 // udot v19.4s, v11.16b, v4.4b[2]\n" + "ldr d8, [%[b_ptr0], #-0x80]\n" + ".word 0x6f85e977 // udot v23.4s, v11.16b, v5.4b[2]\n" + "ldr temploadreg0, [%[b_ptr0], #-0x78]\n" + ".word 0x6f86e97b // udot v27.4s, v11.16b, v6.4b[2]\n" + "ldr d9, [%[b_ptr0], #-0x70]\n" + ".word 0x6f87e97f // udot v31.4s, v11.16b, v7.4b[2]\n" + "ldr temploadreg1, [%[b_ptr0], #-0x68]\n" + ".word 0x6fa4e990 // udot v16.4s, v12.16b, v4.4b[3]\n" + "ldr d10, [%[b_ptr0], #-0x60]\n" + ".word 0x6fa5e994 // udot v20.4s, v12.16b, v5.4b[3]\n" + "ldr temploadreg2, [%[b_ptr0], #-0x58]\n" + ".word 0x6fa6e998 // udot v24.4s, v12.16b, v6.4b[3]\n" + "ldr d11, [%[b_ptr0], #-0x50]\n" + ".word 0x6fa7e99c // udot v28.4s, v12.16b, v7.4b[3]\n" + "ins v15.d[1], temploadreg3\n" + ".word 0x6fa4e9b1 // udot v17.4s, v13.16b, v4.4b[3]\n" + "ldr temploadreg3, [%[b_ptr0], #-0x48]\n" + ".word 0x6fa5e9b5 // udot v21.4s, v13.16b, v5.4b[3]\n" + "ldr d12, [%[b_ptr0], #-0x40]\n" + ".word 0x6fa6e9b9 // udot v25.4s, v13.16b, v6.4b[3]\n" + "ins v8.d[1], temploadreg0\n" + ".word 0x6fa7e9bd // udot v29.4s, v13.16b, v7.4b[3]\n" + "ldr temploadreg0, [%[b_ptr0], #-0x38]\n" + ".word 0x6fa4e9d2 // udot v18.4s, v14.16b, v4.4b[3]\n" + "ldr d13, [%[b_ptr0], #-0x30]\n" + ".word 0x6fa5e9d6 // udot v22.4s, v14.16b, v5.4b[3]\n" + "ins v9.d[1], temploadreg1\n" + ".word 0x6fa6e9da // udot v26.4s, v14.16b, v6.4b[3]\n" + "ldr temploadreg1, [%[b_ptr0], #-0x28]\n" + ".word 0x6fa7e9de // udot v30.4s, v14.16b, v7.4b[3]\n" + "ldr d14, [%[b_ptr0], #-0x20]\n" + ".word 0x6fa4e9f3 // udot v19.4s, v15.16b, v4.4b[3]\n" + "ins v10.d[1], temploadreg2\n" + ".word 0x6fa5e9f7 // udot v23.4s, v15.16b, v5.4b[3]\n" + "ldr temploadreg2, [%[b_ptr0], #-0x18]\n" + ".word 0x6fa6e9fb // udot v27.4s, v15.16b, v6.4b[3]\n" + "ins v11.d[1], temploadreg3\n" + ".word 0x6fa7e9ff // udot v31.4s, v15.16b, v7.4b[3]\n" + "ins v12.d[1], temploadreg0\n" + "ins v13.d[1], temploadreg1\n" + "prfm PLDL1KEEP, [a_ptr3, #0x40]\n" + "ins v14.d[1], temploadreg2\n" + "b.ne 3b\n" + "2:\n" + "ldr d15, [%[b_ptr0], #-0x10]\n" + "prfm PSTL1KEEP, [%[c_ptr0]]\n" + "ldr temploadreg3, [%[b_ptr0], #-0x8]\n" + "prfm PSTL1KEEP, [c_ptr1]\n" + "prfm PSTL1KEEP, [c_ptr2]\n" + "prfm PSTL1KEEP, [c_ptr3]\n" + "ins v15.d[1], temploadreg3\n" + "cbz %[regs], 4f\n" + ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" + "ldr d4, [%[a_ptr0]]\n" + ".word 0x6f81e114 // udot v20.4s, v8.16b, v1.4b[0]\n" + "ldr temploadreg0, [%[a_ptr0], #0x8]\n" + ".word 0x6f82e118 // udot v24.4s, v8.16b, v2.4b[0]\n" + "ldr d5, [a_ptr1]\n" + ".word 0x6f83e11c // udot v28.4s, v8.16b, v3.4b[0]\n" + "ldr temploadreg1, [a_ptr1, #0x8]\n" + ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" + "ldr d6, [a_ptr2]\n" + ".word 0x6f81e135 // udot v21.4s, v9.16b, v1.4b[0]\n" + "ldr temploadreg2, [a_ptr2, #0x8]\n" + ".word 0x6f82e139 // udot v25.4s, v9.16b, v2.4b[0]\n" + "ldr d7, [a_ptr3]\n" + ".word 0x6f83e13d // udot v29.4s, v9.16b, v3.4b[0]\n" + "ldr temploadreg3, [a_ptr3, #0x8]\n" + ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" + "ldr d8, [%[b_ptr0]]\n" + ".word 0x6f81e156 // udot v22.4s, v10.16b, v1.4b[0]\n" + "ins v4.d[1], temploadreg0\n" + ".word 0x6f82e15a // udot v26.4s, v10.16b, v2.4b[0]\n" + "ldr temploadreg0, [%[b_ptr0], #0x8]\n" + ".word 0x6f83e15e // udot v30.4s, v10.16b, v3.4b[0]\n" + "ldr d9, [%[b_ptr0], #0x10]\n" + ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" + "ins v5.d[1], temploadreg1\n" + ".word 0x6f81e177 // udot v23.4s, v11.16b, v1.4b[0]\n" + "ldr temploadreg1, [%[b_ptr0], #0x18]\n" + ".word 0x6f82e17b // udot v27.4s, v11.16b, v2.4b[0]\n" + "ldr d10, [%[b_ptr0], #0x20]\n" + ".word 0x6f83e17f // udot v31.4s, v11.16b, v3.4b[0]\n" + "ins v6.d[1], temploadreg2\n" + ".word 0x6fa0e190 // udot v16.4s, v12.16b, v0.4b[1]\n" + "ldr temploadreg2, [%[b_ptr0], #0x28]\n" + ".word 0x6fa1e194 // udot v20.4s, v12.16b, v1.4b[1]\n" + "ldr d11, [%[b_ptr0], #0x30]\n" + ".word 0x6fa2e198 // udot v24.4s, v12.16b, v2.4b[1]\n" + "ins v7.d[1], temploadreg3\n" + ".word 0x6fa3e19c // udot v28.4s, v12.16b, v3.4b[1]\n" + "ldr temploadreg3, [%[b_ptr0], #0x38]\n" + ".word 0x6fa0e1b1 // udot v17.4s, v13.16b, v0.4b[1]\n" + "ldr d12, [%[b_ptr0], #0x40]\n" + ".word 0x6fa1e1b5 // udot v21.4s, v13.16b, v1.4b[1]\n" + "ins v8.d[1], temploadreg0\n" + ".word 0x6fa2e1b9 // udot v25.4s, v13.16b, v2.4b[1]\n" + "ldr temploadreg0, [%[b_ptr0], #0x48]\n" + ".word 0x6fa3e1bd // udot v29.4s, v13.16b, v3.4b[1]\n" + "ldr d13, [%[b_ptr0], #0x50]\n" + ".word 0x6fa0e1d2 // udot v18.4s, v14.16b, v0.4b[1]\n" + "ins v9.d[1], temploadreg1\n" + ".word 0x6fa1e1d6 // udot v22.4s, v14.16b, v1.4b[1]\n" + "ldr temploadreg1, [%[b_ptr0], #0x58]\n" + ".word 0x6fa2e1da // udot v26.4s, v14.16b, v2.4b[1]\n" + "ins v10.d[1], temploadreg2\n" + ".word 0x6fa3e1de // udot v30.4s, v14.16b, v3.4b[1]\n" + "ldr d14, [%[b_ptr0], #0x60]\n" + ".word 0x6fa0e1f3 // udot v19.4s, v15.16b, v0.4b[1]\n" + "ldr temploadreg2, [%[b_ptr0], #0x68]\n" + ".word 0x6fa1e1f7 // udot v23.4s, v15.16b, v1.4b[1]\n" + "ins v11.d[1], temploadreg3\n" + ".word 0x6fa2e1fb // udot v27.4s, v15.16b, v2.4b[1]\n" + "ldr temploadreg3, [%[b_ptr0], #0x78]\n" + ".word 0x6fa3e1ff // udot v31.4s, v15.16b, v3.4b[1]\n" + "ldr d15, [%[b_ptr0], #0x70]\n" + ".word 0x6f80e910 // udot v16.4s, v8.16b, v0.4b[2]\n" + "ins v12.d[1], temploadreg0\n" + ".word 0x6f81e914 // udot v20.4s, v8.16b, v1.4b[2]\n" + "ins v13.d[1], temploadreg1\n" + ".word 0x6f82e918 // udot v24.4s, v8.16b, v2.4b[2]\n" + "ins v14.d[1], temploadreg2\n" + ".word 0x6f83e91c // udot v28.4s, v8.16b, v3.4b[2]\n" + "ins v15.d[1], temploadreg3\n" + ".word 0x6f80e931 // udot v17.4s, v9.16b, v0.4b[2]\n" + "add %[b_ptr0], %[b_ptr0], #0x100\n" + ".word 0x6f81e935 // udot v21.4s, v9.16b, v1.4b[2]\n" + "ldr d8, [%[b_ptr0], #-0x80]\n" + ".word 0x6f82e939 // udot v25.4s, v9.16b, v2.4b[2]\n" + "ldr temploadreg0, [%[b_ptr0], #-0x78]\n" + ".word 0x6f83e93d // udot v29.4s, v9.16b, v3.4b[2]\n" + "ldr d9, [%[b_ptr0], #-0x70]\n" + ".word 0x6f80e952 // udot v18.4s, v10.16b, v0.4b[2]\n" + "ldr temploadreg1, [%[b_ptr0], #-0x68]\n" + ".word 0x6f81e956 // udot v22.4s, v10.16b, v1.4b[2]\n" + "ldr temploadreg2, [%[b_ptr0], #-0x58]\n" + ".word 0x6f82e95a // udot v26.4s, v10.16b, v2.4b[2]\n" + "ldr temploadreg3, [%[b_ptr0], #-0x48]\n" + ".word 0x6f83e95e // udot v30.4s, v10.16b, v3.4b[2]\n" + "ldr d10, [%[b_ptr0], #-0x60]\n" + ".word 0x6f80e973 // udot v19.4s, v11.16b, v0.4b[2]\n" + "ins v8.d[1], temploadreg0\n" + ".word 0x6f81e977 // udot v23.4s, v11.16b, v1.4b[2]\n" + "ldr temploadreg0, [%[b_ptr0], #-0x38]\n" + ".word 0x6f82e97b // udot v27.4s, v11.16b, v2.4b[2]\n" + "ins v9.d[1], temploadreg1\n" + ".word 0x6f83e97f // udot v31.4s, v11.16b, v3.4b[2]\n" + "ldr d11, [%[b_ptr0], #-0x50]\n" + ".word 0x6fa0e990 // udot v16.4s, v12.16b, v0.4b[3]\n" + "ldr temploadreg1, [%[b_ptr0], #-0x28]\n" + ".word 0x6fa1e994 // udot v20.4s, v12.16b, v1.4b[3]\n" + "ins v10.d[1], temploadreg2\n" + ".word 0x6fa2e998 // udot v24.4s, v12.16b, v2.4b[3]\n" + "ldr temploadreg2, [%[b_ptr0], #-0x18]\n" + ".word 0x6fa3e99c // udot v28.4s, v12.16b, v3.4b[3]\n" + "ldr d12, [%[b_ptr0], #-0x40]\n" + ".word 0x6fa0e9b1 // udot v17.4s, v13.16b, v0.4b[3]\n" + "ins v11.d[1], temploadreg3\n" + ".word 0x6fa1e9b5 // udot v21.4s, v13.16b, v1.4b[3]\n" + "ldr temploadreg3, [%[b_ptr0], #-0x8]\n" + ".word 0x6fa2e9b9 // udot v25.4s, v13.16b, v2.4b[3]\n" + "ins v12.d[1], temploadreg0\n" + ".word 0x6fa3e9bd // udot v29.4s, v13.16b, v3.4b[3]\n" + "ldr d13, [%[b_ptr0], #-0x30]\n" + ".word 0x6fa0e9d2 // udot v18.4s, v14.16b, v0.4b[3]\n" + "ldr temploadreg0, [%[b_ptr0], #0x8]\n" + ".word 0x6fa1e9d6 // udot v22.4s, v14.16b, v1.4b[3]\n" + "add %[a_ptr0], %[a_ptr0], #0x10\n" + ".word 0x6fa2e9da // udot v26.4s, v14.16b, v2.4b[3]\n" + "ins v13.d[1], temploadreg1\n" + ".word 0x6fa3e9de // udot v30.4s, v14.16b, v3.4b[3]\n" + "ldr d14, [%[b_ptr0], #-0x20]\n" + ".word 0x6fa0e9f3 // udot v19.4s, v15.16b, v0.4b[3]\n" + "ldr temploadreg1, [%[b_ptr0], #0x18]\n" + ".word 0x6fa1e9f7 // udot v23.4s, v15.16b, v1.4b[3]\n" + "add a_ptr1, a_ptr1, #0x10\n" + ".word 0x6fa2e9fb // udot v27.4s, v15.16b, v2.4b[3]\n" + "ins v14.d[1], temploadreg2\n" + ".word 0x6fa3e9ff // udot v31.4s, v15.16b, v3.4b[3]\n" + "ldr d15, [%[b_ptr0], #-0x10]\n" + ".word 0x6f84e110 // udot v16.4s, v8.16b, v4.4b[0]\n" + "ldr temploadreg2, [%[b_ptr0], #0x28]\n" + ".word 0x6f85e114 // udot v20.4s, v8.16b, v5.4b[0]\n" + "add a_ptr2, a_ptr2, #0x10\n" + ".word 0x6f86e118 // udot v24.4s, v8.16b, v6.4b[0]\n" + "ins v15.d[1], temploadreg3\n" + ".word 0x6f87e11c // udot v28.4s, v8.16b, v7.4b[0]\n" + "ldr d8, [%[b_ptr0]]\n" + ".word 0x6f84e131 // udot v17.4s, v9.16b, v4.4b[0]\n" + "ldr temploadreg3, [%[b_ptr0], #0x38]\n" + ".word 0x6f85e135 // udot v21.4s, v9.16b, v5.4b[0]\n" + "add a_ptr3, a_ptr3, #0x10\n" + ".word 0x6f86e139 // udot v25.4s, v9.16b, v6.4b[0]\n" + "ins v8.d[1], temploadreg0\n" + ".word 0x6f87e13d // udot v29.4s, v9.16b, v7.4b[0]\n" + "ldr d9, [%[b_ptr0], #0x10]\n" + ".word 0x6f84e152 // udot v18.4s, v10.16b, v4.4b[0]\n" + "ldr temploadreg0, [%[b_ptr0], #0x48]\n" + ".word 0x6f85e156 // udot v22.4s, v10.16b, v5.4b[0]\n" + ".word 0x6f86e15a // udot v26.4s, v10.16b, v6.4b[0]\n" + "ins v9.d[1], temploadreg1\n" + ".word 0x6f87e15e // udot v30.4s, v10.16b, v7.4b[0]\n" + "ldr d10, [%[b_ptr0], #0x20]\n" + ".word 0x6f84e173 // udot v19.4s, v11.16b, v4.4b[0]\n" + "ldr temploadreg1, [%[b_ptr0], #0x58]\n" + ".word 0x6f85e177 // udot v23.4s, v11.16b, v5.4b[0]\n" + ".word 0x6f86e17b // udot v27.4s, v11.16b, v6.4b[0]\n" + "ins v10.d[1], temploadreg2\n" + ".word 0x6f87e17f // udot v31.4s, v11.16b, v7.4b[0]\n" + "ldr d11, [%[b_ptr0], #0x30]\n" + ".word 0x6fa4e190 // udot v16.4s, v12.16b, v4.4b[1]\n" + "ldr temploadreg2, [%[b_ptr0], #0x68]\n" + ".word 0x6fa5e194 // udot v20.4s, v12.16b, v5.4b[1]\n" + ".word 0x6fa6e198 // udot v24.4s, v12.16b, v6.4b[1]\n" + "ins v11.d[1], temploadreg3\n" + ".word 0x6fa7e19c // udot v28.4s, v12.16b, v7.4b[1]\n" + "ldr d12, [%[b_ptr0], #0x40]\n" + ".word 0x6fa4e1b1 // udot v17.4s, v13.16b, v4.4b[1]\n" + "ldr temploadreg3, [%[b_ptr0], #0x78]\n" + ".word 0x6fa5e1b5 // udot v21.4s, v13.16b, v5.4b[1]\n" + ".word 0x6fa6e1b9 // udot v25.4s, v13.16b, v6.4b[1]\n" + "ins v12.d[1], temploadreg0\n" + ".word 0x6fa7e1bd // udot v29.4s, v13.16b, v7.4b[1]\n" + "ldr d13, [%[b_ptr0], #0x50]\n" + ".word 0x6fa4e1d2 // udot v18.4s, v14.16b, v4.4b[1]\n" + ".word 0x6fa5e1d6 // udot v22.4s, v14.16b, v5.4b[1]\n" + ".word 0x6fa6e1da // udot v26.4s, v14.16b, v6.4b[1]\n" + "ins v13.d[1], temploadreg1\n" + ".word 0x6fa7e1de // udot v30.4s, v14.16b, v7.4b[1]\n" + "ldr d14, [%[b_ptr0], #0x60]\n" + ".word 0x6fa4e1f3 // udot v19.4s, v15.16b, v4.4b[1]\n" + ".word 0x6fa5e1f7 // udot v23.4s, v15.16b, v5.4b[1]\n" + ".word 0x6fa6e1fb // udot v27.4s, v15.16b, v6.4b[1]\n" + "ins v14.d[1], temploadreg2\n" + ".word 0x6fa7e1ff // udot v31.4s, v15.16b, v7.4b[1]\n" + "ldr d15, [%[b_ptr0], #0x70]\n" + ".word 0x6f84e910 // udot v16.4s, v8.16b, v4.4b[2]\n" + "add %[b_ptr0], %[b_ptr0], #0x80\n" + ".word 0x6f85e914 // udot v20.4s, v8.16b, v5.4b[2]\n" + "ins v15.d[1], temploadreg3\n" + ".word 0x6f86e918 // udot v24.4s, v8.16b, v6.4b[2]\n" + ".word 0x6f87e91c // udot v28.4s, v8.16b, v7.4b[2]\n" + ".word 0x6f84e931 // udot v17.4s, v9.16b, v4.4b[2]\n" + ".word 0x6f85e935 // udot v21.4s, v9.16b, v5.4b[2]\n" + ".word 0x6f86e939 // udot v25.4s, v9.16b, v6.4b[2]\n" + ".word 0x6f87e93d // udot v29.4s, v9.16b, v7.4b[2]\n" + ".word 0x6f84e952 // udot v18.4s, v10.16b, v4.4b[2]\n" + ".word 0x6f85e956 // udot v22.4s, v10.16b, v5.4b[2]\n" + ".word 0x6f86e95a // udot v26.4s, v10.16b, v6.4b[2]\n" + ".word 0x6f87e95e // udot v30.4s, v10.16b, v7.4b[2]\n" + ".word 0x6f84e973 // udot v19.4s, v11.16b, v4.4b[2]\n" + ".word 0x6f85e977 // udot v23.4s, v11.16b, v5.4b[2]\n" + ".word 0x6f86e97b // udot v27.4s, v11.16b, v6.4b[2]\n" + ".word 0x6f87e97f // udot v31.4s, v11.16b, v7.4b[2]\n" + ".word 0x6fa4e990 // udot v16.4s, v12.16b, v4.4b[3]\n" + ".word 0x6fa5e994 // udot v20.4s, v12.16b, v5.4b[3]\n" + ".word 0x6fa6e998 // udot v24.4s, v12.16b, v6.4b[3]\n" + ".word 0x6fa7e99c // udot v28.4s, v12.16b, v7.4b[3]\n" + ".word 0x6fa4e9b1 // udot v17.4s, v13.16b, v4.4b[3]\n" + ".word 0x6fa5e9b5 // udot v21.4s, v13.16b, v5.4b[3]\n" + ".word 0x6fa6e9b9 // udot v25.4s, v13.16b, v6.4b[3]\n" + ".word 0x6fa7e9bd // udot v29.4s, v13.16b, v7.4b[3]\n" + ".word 0x6fa4e9d2 // udot v18.4s, v14.16b, v4.4b[3]\n" + ".word 0x6fa5e9d6 // udot v22.4s, v14.16b, v5.4b[3]\n" + ".word 0x6fa6e9da // udot v26.4s, v14.16b, v6.4b[3]\n" + ".word 0x6fa7e9de // udot v30.4s, v14.16b, v7.4b[3]\n" + ".word 0x6fa4e9f3 // udot v19.4s, v15.16b, v4.4b[3]\n" + ".word 0x6fa5e9f7 // udot v23.4s, v15.16b, v5.4b[3]\n" + ".word 0x6fa6e9fb // udot v27.4s, v15.16b, v6.4b[3]\n" + ".word 0x6fa7e9ff // udot v31.4s, v15.16b, v7.4b[3]\n" + "b 5f\n" + "4:\n" + ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" + "ldr temploadreg0, [%[b_ptr0], #0x8]\n" + ".word 0x6f81e114 // udot v20.4s, v8.16b, v1.4b[0]\n" + "ldr temploadreg1, [%[b_ptr0], #0x18]\n" + ".word 0x6f82e118 // udot v24.4s, v8.16b, v2.4b[0]\n" + "ldr temploadreg2, [%[b_ptr0], #0x28]\n" + ".word 0x6f83e11c // udot v28.4s, v8.16b, v3.4b[0]\n" + "ldr d8, [%[b_ptr0]]\n" + ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" + "ldr temploadreg3, [%[b_ptr0], #0x38]\n" + ".word 0x6f81e135 // udot v21.4s, v9.16b, v1.4b[0]\n" + ".word 0x6f82e139 // udot v25.4s, v9.16b, v2.4b[0]\n" + "ins v8.d[1], temploadreg0\n" + ".word 0x6f83e13d // udot v29.4s, v9.16b, v3.4b[0]\n" + "ldr d9, [%[b_ptr0], #0x10]\n" + ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" + "ldr temploadreg0, [%[b_ptr0], #0x48]\n" + ".word 0x6f81e156 // udot v22.4s, v10.16b, v1.4b[0]\n" + ".word 0x6f82e15a // udot v26.4s, v10.16b, v2.4b[0]\n" + "ins v9.d[1], temploadreg1\n" + ".word 0x6f83e15e // udot v30.4s, v10.16b, v3.4b[0]\n" + "ldr d10, [%[b_ptr0], #0x20]\n" + ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" + "ldr temploadreg1, [%[b_ptr0], #0x58]\n" + ".word 0x6f81e177 // udot v23.4s, v11.16b, v1.4b[0]\n" + ".word 0x6f82e17b // udot v27.4s, v11.16b, v2.4b[0]\n" + "ins v10.d[1], temploadreg2\n" + ".word 0x6f83e17f // udot v31.4s, v11.16b, v3.4b[0]\n" + "ldr d11, [%[b_ptr0], #0x30]\n" + ".word 0x6fa0e190 // udot v16.4s, v12.16b, v0.4b[1]\n" + "ldr temploadreg2, [%[b_ptr0], #0x68]\n" + ".word 0x6fa1e194 // udot v20.4s, v12.16b, v1.4b[1]\n" + ".word 0x6fa2e198 // udot v24.4s, v12.16b, v2.4b[1]\n" + "ins v11.d[1], temploadreg3\n" + ".word 0x6fa3e19c // udot v28.4s, v12.16b, v3.4b[1]\n" + "ldr d12, [%[b_ptr0], #0x40]\n" + ".word 0x6fa0e1b1 // udot v17.4s, v13.16b, v0.4b[1]\n" + "ldr temploadreg3, [%[b_ptr0], #0x78]\n" + ".word 0x6fa1e1b5 // udot v21.4s, v13.16b, v1.4b[1]\n" + ".word 0x6fa2e1b9 // udot v25.4s, v13.16b, v2.4b[1]\n" + "ins v12.d[1], temploadreg0\n" + ".word 0x6fa3e1bd // udot v29.4s, v13.16b, v3.4b[1]\n" + "ldr d13, [%[b_ptr0], #0x50]\n" + ".word 0x6fa0e1d2 // udot v18.4s, v14.16b, v0.4b[1]\n" + ".word 0x6fa1e1d6 // udot v22.4s, v14.16b, v1.4b[1]\n" + ".word 0x6fa2e1da // udot v26.4s, v14.16b, v2.4b[1]\n" + "ins v13.d[1], temploadreg1\n" + ".word 0x6fa3e1de // udot v30.4s, v14.16b, v3.4b[1]\n" + "ldr d14, [%[b_ptr0], #0x60]\n" + ".word 0x6fa0e1f3 // udot v19.4s, v15.16b, v0.4b[1]\n" + ".word 0x6fa1e1f7 // udot v23.4s, v15.16b, v1.4b[1]\n" + ".word 0x6fa2e1fb // udot v27.4s, v15.16b, v2.4b[1]\n" + "ins v14.d[1], temploadreg2\n" + ".word 0x6fa3e1ff // udot v31.4s, v15.16b, v3.4b[1]\n" + "ldr d15, [%[b_ptr0], #0x70]\n" + ".word 0x6f80e910 // udot v16.4s, v8.16b, v0.4b[2]\n" + "add %[b_ptr0], %[b_ptr0], #0x80\n" + ".word 0x6f81e914 // udot v20.4s, v8.16b, v1.4b[2]\n" + "ins v15.d[1], temploadreg3\n" + ".word 0x6f82e918 // udot v24.4s, v8.16b, v2.4b[2]\n" + ".word 0x6f83e91c // udot v28.4s, v8.16b, v3.4b[2]\n" + ".word 0x6f80e931 // udot v17.4s, v9.16b, v0.4b[2]\n" + ".word 0x6f81e935 // udot v21.4s, v9.16b, v1.4b[2]\n" + ".word 0x6f82e939 // udot v25.4s, v9.16b, v2.4b[2]\n" + ".word 0x6f83e93d // udot v29.4s, v9.16b, v3.4b[2]\n" + ".word 0x6f80e952 // udot v18.4s, v10.16b, v0.4b[2]\n" + ".word 0x6f81e956 // udot v22.4s, v10.16b, v1.4b[2]\n" + ".word 0x6f82e95a // udot v26.4s, v10.16b, v2.4b[2]\n" + ".word 0x6f83e95e // udot v30.4s, v10.16b, v3.4b[2]\n" + ".word 0x6f80e973 // udot v19.4s, v11.16b, v0.4b[2]\n" + ".word 0x6f81e977 // udot v23.4s, v11.16b, v1.4b[2]\n" + ".word 0x6f82e97b // udot v27.4s, v11.16b, v2.4b[2]\n" + ".word 0x6f83e97f // udot v31.4s, v11.16b, v3.4b[2]\n" + ".word 0x6fa0e990 // udot v16.4s, v12.16b, v0.4b[3]\n" + ".word 0x6fa1e994 // udot v20.4s, v12.16b, v1.4b[3]\n" + ".word 0x6fa2e998 // udot v24.4s, v12.16b, v2.4b[3]\n" + ".word 0x6fa3e99c // udot v28.4s, v12.16b, v3.4b[3]\n" + ".word 0x6fa0e9b1 // udot v17.4s, v13.16b, v0.4b[3]\n" + ".word 0x6fa1e9b5 // udot v21.4s, v13.16b, v1.4b[3]\n" + ".word 0x6fa2e9b9 // udot v25.4s, v13.16b, v2.4b[3]\n" + ".word 0x6fa3e9bd // udot v29.4s, v13.16b, v3.4b[3]\n" + ".word 0x6fa0e9d2 // udot v18.4s, v14.16b, v0.4b[3]\n" + ".word 0x6fa1e9d6 // udot v22.4s, v14.16b, v1.4b[3]\n" + ".word 0x6fa2e9da // udot v26.4s, v14.16b, v2.4b[3]\n" + ".word 0x6fa3e9de // udot v30.4s, v14.16b, v3.4b[3]\n" + ".word 0x6fa0e9f3 // udot v19.4s, v15.16b, v0.4b[3]\n" + ".word 0x6fa1e9f7 // udot v23.4s, v15.16b, v1.4b[3]\n" + ".word 0x6fa2e9fb // udot v27.4s, v15.16b, v2.4b[3]\n" + ".word 0x6fa3e9ff // udot v31.4s, v15.16b, v3.4b[3]\n" + "5:\n" + "cbz %[blocks], 6f\n" + "7:\n" + "ldr q8, [%[b_ptr0]]\n" + "subs %[blocks], %[blocks], #0x1\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + "ldr s0, [%[a_ptr0]]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + "add %[a_ptr0], %[a_ptr0], #0x4\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + "add %[b_ptr0], %[b_ptr0], #0x40\n" + ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" + "ldr s1, [a_ptr1]\n" + ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" + "add a_ptr1, a_ptr1, #0x4\n" + ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" + "ldr s2, [a_ptr2]\n" + ".word 0x6f81e114 // udot v20.4s, v8.16b, v1.4b[0]\n" + "add a_ptr2, a_ptr2, #0x4\n" + ".word 0x6f81e135 // udot v21.4s, v9.16b, v1.4b[0]\n" + "ldr s3, [a_ptr3]\n" + ".word 0x6f82e118 // udot v24.4s, v8.16b, v2.4b[0]\n" + "add a_ptr3, a_ptr3, #0x4\n" + ".word 0x6f82e139 // udot v25.4s, v9.16b, v2.4b[0]\n" + ".word 0x6f83e11c // udot v28.4s, v8.16b, v3.4b[0]\n" + ".word 0x6f83e13d // udot v29.4s, v9.16b, v3.4b[0]\n" + ".word 0x6f81e156 // udot v22.4s, v10.16b, v1.4b[0]\n" + ".word 0x6f82e15a // udot v26.4s, v10.16b, v2.4b[0]\n" + ".word 0x6f83e15e // udot v30.4s, v10.16b, v3.4b[0]\n" + ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" + ".word 0x6f81e177 // udot v23.4s, v11.16b, v1.4b[0]\n" + ".word 0x6f82e17b // udot v27.4s, v11.16b, v2.4b[0]\n" + ".word 0x6f83e17f // udot v31.4s, v11.16b, v3.4b[0]\n" + "b.ne 7b\n" + "6:\n" + "cbz %[odds], 8f\n" + "ld1 {v0.b}[0], [%[a_ptr0]], #1\n" + "ld1 {v1.b}[0], [a_ptr1], #1\n" + "ld1 {v2.b}[0], [a_ptr2], #1\n" + "ld1 {v3.b}[0], [a_ptr3], #1\n" + "subs %[odds], %[odds], #0x1\n" + "b.eq 9f\n" + "ld1 {v0.b}[1], [%[a_ptr0]], #1\n" + "ld1 {v1.b}[1], [a_ptr1], #1\n" + "ld1 {v2.b}[1], [a_ptr2], #1\n" + "ld1 {v3.b}[1], [a_ptr3], #1\n" + "subs %[odds], %[odds], #0x1\n" + "b.eq 9f\n" + "ld1 {v0.b}[2], [%[a_ptr0]]\n" + "ld1 {v1.b}[2], [a_ptr1]\n" + "ld1 {v2.b}[2], [a_ptr2]\n" + "ld1 {v3.b}[2], [a_ptr3]\n" + "9:\n" + "ldr q8, [%[b_ptr0]]\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" + ".word 0x6f81e114 // udot v20.4s, v8.16b, v1.4b[0]\n" + ".word 0x6f82e118 // udot v24.4s, v8.16b, v2.4b[0]\n" + ".word 0x6f83e11c // udot v28.4s, v8.16b, v3.4b[0]\n" + ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" + ".word 0x6f81e135 // udot v21.4s, v9.16b, v1.4b[0]\n" + ".word 0x6f82e139 // udot v25.4s, v9.16b, v2.4b[0]\n" + ".word 0x6f83e13d // udot v29.4s, v9.16b, v3.4b[0]\n" + ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" + ".word 0x6f81e156 // udot v22.4s, v10.16b, v1.4b[0]\n" + ".word 0x6f82e15a // udot v26.4s, v10.16b, v2.4b[0]\n" + ".word 0x6f83e15e // udot v30.4s, v10.16b, v3.4b[0]\n" + ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" + ".word 0x6f81e177 // udot v23.4s, v11.16b, v1.4b[0]\n" + ".word 0x6f82e17b // udot v27.4s, v11.16b, v2.4b[0]\n" + ".word 0x6f83e17f // udot v31.4s, v11.16b, v3.4b[0]\n" + "8:\n" + "str q16, [%[c_ptr0]]\n" + "str q17, [%[c_ptr0], #0x10]\n" + "str q18, [%[c_ptr0], #0x20]\n" + "str q19, [%[c_ptr0], #0x30]\n" + "add %[c_ptr0], %[c_ptr0], #0x40\n" + "str q20, [c_ptr1]\n" + "str q21, [c_ptr1, #0x10]\n" + "str q22, [c_ptr1, #0x20]\n" + "str q23, [c_ptr1, #0x30]\n" + "str q24, [c_ptr2]\n" + "str q25, [c_ptr2, #0x10]\n" + "str q26, [c_ptr2, #0x20]\n" + "str q27, [c_ptr2, #0x30]\n" + "str q28, [c_ptr3]\n" + "str q29, [c_ptr3, #0x10]\n" + "str q30, [c_ptr3, #0x20]\n" + "str q31, [c_ptr3, #0x30]\n" + ".unreq a_ptr1\n" + ".unreq a_ptr2\n" + ".unreq a_ptr3\n" + ".unreq c_ptr1\n" + ".unreq c_ptr2\n" + ".unreq c_ptr3\n" + ".unreq temploadreg0\n" + ".unreq temploadreg1\n" + ".unreq temploadreg2\n" + ".unreq temploadreg3\n" + : [a_ptr0] "+r" (a_ptr0), [b_ptr0] "+r" (b_ptr0), [c_ptr0] "+r" (c_ptr0), [loops] "+r" (loops), [regs] "+r" (regs), [blocks] "+r" (blocks), [odds] "+r" (odds) + : [betaptr] "r" (betaptr), [width] "r" (width), [beta0] "r" (beta0), [lda] "r" (ldab), [ldc] "r" (ldcb) + : "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x0", "x1", "x2", "x3", "x4", "x5", "x6", "x7", "x8", "x9", "cc", "memory" ); break; } @@ -2465,4 +2465,4 @@ void a64_hybrid_u8u32_dot_16x4_a55(const uint8_t *A, int lda, const uint8_t *B, } // namespace arm_gemm -#endif // __aarch64__ \ No newline at end of file +#endif // __aarch64__ diff --git a/src/core/NEON/kernels/arm_gemm/kernels/a64_hybrid_u8u32_dot_16x4/generic.cpp b/src/core/NEON/kernels/arm_gemm/kernels/a64_hybrid_u8u32_dot_16x4/generic.cpp index 87f46bb261..6301fa5657 100644 --- a/src/core/NEON/kernels/arm_gemm/kernels/a64_hybrid_u8u32_dot_16x4/generic.cpp +++ b/src/core/NEON/kernels/arm_gemm/kernels/a64_hybrid_u8u32_dot_16x4/generic.cpp @@ -74,1755 +74,1755 @@ void a64_hybrid_u8u32_dot_16x4(const uint8_t *A, int lda, const uint8_t *B, uint switch(M-y) { case 1: __asm __volatile ( - "cbz %[beta0], 1f\n" - "movi v16.4s, #0\n" - "ldr q0, [%[a_ptr0]]\n" - "movi v17.4s, #0\n" - "ldr q8, [%[b_ptr0]]\n" - "movi v18.4s, #0\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - "movi v19.4s, #0\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - "add %[a_ptr0], %[a_ptr0], #0x10\n" - "ldr q12, [%[b_ptr0], #0x40]\n" - "ldr q13, [%[b_ptr0], #0x50]\n" - "ldr q14, [%[b_ptr0], #0x60]\n" - "add %[b_ptr0], %[b_ptr0], #0x80\n" - "cbz %[loops], 2f\n" - "b 3f\n" - "1:\n" - "ld1r {v15.4s}, [%[betaptr]]\n" - "ldr q16, [%[c_ptr0]]\n" - "ldr q17, [%[c_ptr0], #0x10]\n" - "ldr q18, [%[c_ptr0], #0x20]\n" - "ldr q19, [%[c_ptr0], #0x30]\n" - "mul v16.4s, v16.4s, v15.4s\n" - "ldr q0, [%[a_ptr0]]\n" - "mul v17.4s, v17.4s, v15.4s\n" - "ldr q8, [%[b_ptr0]]\n" - "mul v18.4s, v18.4s, v15.4s\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - "mul v19.4s, v19.4s, v15.4s\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - "add %[a_ptr0], %[a_ptr0], #0x10\n" - "ldr q12, [%[b_ptr0], #0x40]\n" - "ldr q13, [%[b_ptr0], #0x50]\n" - "ldr q14, [%[b_ptr0], #0x60]\n" - "add %[b_ptr0], %[b_ptr0], #0x80\n" - "cbz %[loops], 2f\n" - "3:\n" - ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" - "ldr q15, [%[b_ptr0], #-0x10]\n" - ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" - "ldr q4, [%[a_ptr0]]\n" - ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" - "ldr q8, [%[b_ptr0]]\n" - ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - ".word 0x6fa0e190 // udot v16.4s, v12.16b, v0.4b[1]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - ".word 0x6fa0e1b1 // udot v17.4s, v13.16b, v0.4b[1]\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - ".word 0x6fa0e1d2 // udot v18.4s, v14.16b, v0.4b[1]\n" - "ldr q12, [%[b_ptr0], #0x40]\n" - ".word 0x6fa0e1f3 // udot v19.4s, v15.16b, v0.4b[1]\n" - "ldr q13, [%[b_ptr0], #0x50]\n" - ".word 0x6f80e910 // udot v16.4s, v8.16b, v0.4b[2]\n" - "ldr q14, [%[b_ptr0], #0x60]\n" - ".word 0x6f80e931 // udot v17.4s, v9.16b, v0.4b[2]\n" - "ldr q15, [%[b_ptr0], #0x70]\n" - ".word 0x6f80e952 // udot v18.4s, v10.16b, v0.4b[2]\n" - "subs %[loops], %[loops], #0x1\n" - ".word 0x6f80e973 // udot v19.4s, v11.16b, v0.4b[2]\n" - "prfm PLDL1KEEP, [%[a_ptr0], #0x40]\n" - ".word 0x6fa0e990 // udot v16.4s, v12.16b, v0.4b[3]\n" - "add %[b_ptr0], %[b_ptr0], #0x100\n" - ".word 0x6fa0e9b1 // udot v17.4s, v13.16b, v0.4b[3]\n" - "ldr q8, [%[b_ptr0], #-0x80]\n" - ".word 0x6fa0e9d2 // udot v18.4s, v14.16b, v0.4b[3]\n" - "ldr q9, [%[b_ptr0], #-0x70]\n" - ".word 0x6fa0e9f3 // udot v19.4s, v15.16b, v0.4b[3]\n" - "ldr q10, [%[b_ptr0], #-0x60]\n" - "ldr q11, [%[b_ptr0], #-0x50]\n" - "add %[a_ptr0], %[a_ptr0], #0x20\n" - ".word 0x6f84e110 // udot v16.4s, v8.16b, v4.4b[0]\n" - "ldr q12, [%[b_ptr0], #-0x40]\n" - ".word 0x6f84e131 // udot v17.4s, v9.16b, v4.4b[0]\n" - "ldr q13, [%[b_ptr0], #-0x30]\n" - ".word 0x6f84e152 // udot v18.4s, v10.16b, v4.4b[0]\n" - "ldr q14, [%[b_ptr0], #-0x20]\n" - ".word 0x6f84e173 // udot v19.4s, v11.16b, v4.4b[0]\n" - "ldr q15, [%[b_ptr0], #-0x10]\n" - ".word 0x6fa4e190 // udot v16.4s, v12.16b, v4.4b[1]\n" - "ldr q0, [%[a_ptr0], #-0x10]\n" - ".word 0x6fa4e1b1 // udot v17.4s, v13.16b, v4.4b[1]\n" - "ldr q8, [%[b_ptr0]]\n" - ".word 0x6fa4e1d2 // udot v18.4s, v14.16b, v4.4b[1]\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - ".word 0x6fa4e1f3 // udot v19.4s, v15.16b, v4.4b[1]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - ".word 0x6f84e910 // udot v16.4s, v8.16b, v4.4b[2]\n" - "ldr q12, [%[b_ptr0], #0x40]\n" - ".word 0x6f84e931 // udot v17.4s, v9.16b, v4.4b[2]\n" - "ldr q13, [%[b_ptr0], #0x50]\n" - ".word 0x6f84e952 // udot v18.4s, v10.16b, v4.4b[2]\n" - "ldr q14, [%[b_ptr0], #0x60]\n" - ".word 0x6f84e973 // udot v19.4s, v11.16b, v4.4b[2]\n" - "ldr q15, [%[b_ptr0], #0x70]\n" - ".word 0x6fa4e990 // udot v16.4s, v12.16b, v4.4b[3]\n" - "add %[b_ptr0], %[b_ptr0], #0x100\n" - ".word 0x6fa4e9b1 // udot v17.4s, v13.16b, v4.4b[3]\n" - "ldr q8, [%[b_ptr0], #-0x80]\n" - ".word 0x6fa4e9d2 // udot v18.4s, v14.16b, v4.4b[3]\n" - "ldr q9, [%[b_ptr0], #-0x70]\n" - ".word 0x6fa4e9f3 // udot v19.4s, v15.16b, v4.4b[3]\n" - "ldr q10, [%[b_ptr0], #-0x60]\n" - "ldr q11, [%[b_ptr0], #-0x50]\n" - "ldr q12, [%[b_ptr0], #-0x40]\n" - "ldr q13, [%[b_ptr0], #-0x30]\n" - "ldr q14, [%[b_ptr0], #-0x20]\n" - "b.ne 3b\n" - "2:\n" - "ldr q15, [%[b_ptr0], #-0x10]\n" - "prfm PSTL1KEEP, [%[c_ptr0]]\n" - "cbz %[regs], 4f\n" - ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" - "ldr q4, [%[a_ptr0]]\n" - ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" - "ldr q8, [%[b_ptr0]]\n" - ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - ".word 0x6fa0e190 // udot v16.4s, v12.16b, v0.4b[1]\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - ".word 0x6fa0e1b1 // udot v17.4s, v13.16b, v0.4b[1]\n" - "ldr q12, [%[b_ptr0], #0x40]\n" - ".word 0x6fa0e1d2 // udot v18.4s, v14.16b, v0.4b[1]\n" - "ldr q13, [%[b_ptr0], #0x50]\n" - ".word 0x6fa0e1f3 // udot v19.4s, v15.16b, v0.4b[1]\n" - "ldr q14, [%[b_ptr0], #0x60]\n" - ".word 0x6f80e910 // udot v16.4s, v8.16b, v0.4b[2]\n" - "ldr q15, [%[b_ptr0], #0x70]\n" - ".word 0x6f80e931 // udot v17.4s, v9.16b, v0.4b[2]\n" - "add %[b_ptr0], %[b_ptr0], #0x100\n" - ".word 0x6f80e952 // udot v18.4s, v10.16b, v0.4b[2]\n" - "ldr q8, [%[b_ptr0], #-0x80]\n" - ".word 0x6f80e973 // udot v19.4s, v11.16b, v0.4b[2]\n" - "ldr q9, [%[b_ptr0], #-0x70]\n" - ".word 0x6fa0e990 // udot v16.4s, v12.16b, v0.4b[3]\n" - "ldr q10, [%[b_ptr0], #-0x60]\n" - ".word 0x6fa0e9b1 // udot v17.4s, v13.16b, v0.4b[3]\n" - "ldr q11, [%[b_ptr0], #-0x50]\n" - ".word 0x6fa0e9d2 // udot v18.4s, v14.16b, v0.4b[3]\n" - "ldr q12, [%[b_ptr0], #-0x40]\n" - ".word 0x6fa0e9f3 // udot v19.4s, v15.16b, v0.4b[3]\n" - "ldr q13, [%[b_ptr0], #-0x30]\n" - ".word 0x6f84e110 // udot v16.4s, v8.16b, v4.4b[0]\n" - "ldr q14, [%[b_ptr0], #-0x20]\n" - ".word 0x6f84e131 // udot v17.4s, v9.16b, v4.4b[0]\n" - "ldr q15, [%[b_ptr0], #-0x10]\n" - ".word 0x6f84e152 // udot v18.4s, v10.16b, v4.4b[0]\n" - "ldr q8, [%[b_ptr0]]\n" - ".word 0x6f84e173 // udot v19.4s, v11.16b, v4.4b[0]\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - ".word 0x6fa4e190 // udot v16.4s, v12.16b, v4.4b[1]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - ".word 0x6fa4e1b1 // udot v17.4s, v13.16b, v4.4b[1]\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - ".word 0x6fa4e1d2 // udot v18.4s, v14.16b, v4.4b[1]\n" - "ldr q12, [%[b_ptr0], #0x40]\n" - ".word 0x6fa4e1f3 // udot v19.4s, v15.16b, v4.4b[1]\n" - "ldr q13, [%[b_ptr0], #0x50]\n" - ".word 0x6f84e910 // udot v16.4s, v8.16b, v4.4b[2]\n" - "ldr q14, [%[b_ptr0], #0x60]\n" - ".word 0x6f84e931 // udot v17.4s, v9.16b, v4.4b[2]\n" - "ldr q15, [%[b_ptr0], #0x70]\n" - ".word 0x6f84e952 // udot v18.4s, v10.16b, v4.4b[2]\n" - "add %[b_ptr0], %[b_ptr0], #0x80\n" - ".word 0x6f84e973 // udot v19.4s, v11.16b, v4.4b[2]\n" - "add %[a_ptr0], %[a_ptr0], #0x10\n" - ".word 0x6fa4e990 // udot v16.4s, v12.16b, v4.4b[3]\n" - ".word 0x6fa4e9b1 // udot v17.4s, v13.16b, v4.4b[3]\n" - ".word 0x6fa4e9d2 // udot v18.4s, v14.16b, v4.4b[3]\n" - ".word 0x6fa4e9f3 // udot v19.4s, v15.16b, v4.4b[3]\n" - "b 5f\n" - "4:\n" - ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" - "ldr q8, [%[b_ptr0]]\n" - ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - ".word 0x6fa0e190 // udot v16.4s, v12.16b, v0.4b[1]\n" - "ldr q12, [%[b_ptr0], #0x40]\n" - ".word 0x6fa0e1b1 // udot v17.4s, v13.16b, v0.4b[1]\n" - "ldr q13, [%[b_ptr0], #0x50]\n" - ".word 0x6fa0e1d2 // udot v18.4s, v14.16b, v0.4b[1]\n" - "ldr q14, [%[b_ptr0], #0x60]\n" - ".word 0x6fa0e1f3 // udot v19.4s, v15.16b, v0.4b[1]\n" - "ldr q15, [%[b_ptr0], #0x70]\n" - ".word 0x6f80e910 // udot v16.4s, v8.16b, v0.4b[2]\n" - "add %[b_ptr0], %[b_ptr0], #0x80\n" - ".word 0x6f80e931 // udot v17.4s, v9.16b, v0.4b[2]\n" - ".word 0x6f80e952 // udot v18.4s, v10.16b, v0.4b[2]\n" - ".word 0x6f80e973 // udot v19.4s, v11.16b, v0.4b[2]\n" - ".word 0x6fa0e990 // udot v16.4s, v12.16b, v0.4b[3]\n" - ".word 0x6fa0e9b1 // udot v17.4s, v13.16b, v0.4b[3]\n" - ".word 0x6fa0e9d2 // udot v18.4s, v14.16b, v0.4b[3]\n" - ".word 0x6fa0e9f3 // udot v19.4s, v15.16b, v0.4b[3]\n" - "5:\n" - "cbz %[blocks], 6f\n" - "7:\n" - "ldr q8, [%[b_ptr0]]\n" - "subs %[blocks], %[blocks], #0x1\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - "ldr s0, [%[a_ptr0]]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - "add %[a_ptr0], %[a_ptr0], #0x4\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - "add %[b_ptr0], %[b_ptr0], #0x40\n" - ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" - ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" - ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" - ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" - "b.ne 7b\n" - "6:\n" - "cbz %[odds], 8f\n" - "ld1 {v0.b}[0], [%[a_ptr0]], #1\n" - "subs %[odds], %[odds], #0x1\n" - "b.eq 9f\n" - "ld1 {v0.b}[1], [%[a_ptr0]], #1\n" - "subs %[odds], %[odds], #0x1\n" - "b.eq 9f\n" - "ld1 {v0.b}[2], [%[a_ptr0]]\n" - "9:\n" - "ldr q8, [%[b_ptr0]]\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" - ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" - ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" - ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" - "8:\n" - "str q16, [%[c_ptr0]]\n" - "str q17, [%[c_ptr0], #0x10]\n" - "str q18, [%[c_ptr0], #0x20]\n" - "str q19, [%[c_ptr0], #0x30]\n" - "add %[c_ptr0], %[c_ptr0], #0x40\n" - : [a_ptr0] "+r" (a_ptr0), [b_ptr0] "+r" (b_ptr0), [c_ptr0] "+r" (c_ptr0), [loops] "+r" (loops), [regs] "+r" (regs), [blocks] "+r" (blocks), [odds] "+r" (odds) - : [betaptr] "r" (betaptr), [width] "r" (width), [beta0] "r" (beta0), [lda] "r" (ldab), [ldc] "r" (ldcb) - : "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "cc", "memory" + "cbz %[beta0], 1f\n" + "movi v16.4s, #0\n" + "ldr q0, [%[a_ptr0]]\n" + "movi v17.4s, #0\n" + "ldr q8, [%[b_ptr0]]\n" + "movi v18.4s, #0\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + "movi v19.4s, #0\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + "add %[a_ptr0], %[a_ptr0], #0x10\n" + "ldr q12, [%[b_ptr0], #0x40]\n" + "ldr q13, [%[b_ptr0], #0x50]\n" + "ldr q14, [%[b_ptr0], #0x60]\n" + "add %[b_ptr0], %[b_ptr0], #0x80\n" + "cbz %[loops], 2f\n" + "b 3f\n" + "1:\n" + "ld1r {v15.4s}, [%[betaptr]]\n" + "ldr q16, [%[c_ptr0]]\n" + "ldr q17, [%[c_ptr0], #0x10]\n" + "ldr q18, [%[c_ptr0], #0x20]\n" + "ldr q19, [%[c_ptr0], #0x30]\n" + "mul v16.4s, v16.4s, v15.4s\n" + "ldr q0, [%[a_ptr0]]\n" + "mul v17.4s, v17.4s, v15.4s\n" + "ldr q8, [%[b_ptr0]]\n" + "mul v18.4s, v18.4s, v15.4s\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + "mul v19.4s, v19.4s, v15.4s\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + "add %[a_ptr0], %[a_ptr0], #0x10\n" + "ldr q12, [%[b_ptr0], #0x40]\n" + "ldr q13, [%[b_ptr0], #0x50]\n" + "ldr q14, [%[b_ptr0], #0x60]\n" + "add %[b_ptr0], %[b_ptr0], #0x80\n" + "cbz %[loops], 2f\n" + "3:\n" + ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" + "ldr q15, [%[b_ptr0], #-0x10]\n" + ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" + "ldr q4, [%[a_ptr0]]\n" + ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" + "ldr q8, [%[b_ptr0]]\n" + ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + ".word 0x6fa0e190 // udot v16.4s, v12.16b, v0.4b[1]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + ".word 0x6fa0e1b1 // udot v17.4s, v13.16b, v0.4b[1]\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + ".word 0x6fa0e1d2 // udot v18.4s, v14.16b, v0.4b[1]\n" + "ldr q12, [%[b_ptr0], #0x40]\n" + ".word 0x6fa0e1f3 // udot v19.4s, v15.16b, v0.4b[1]\n" + "ldr q13, [%[b_ptr0], #0x50]\n" + ".word 0x6f80e910 // udot v16.4s, v8.16b, v0.4b[2]\n" + "ldr q14, [%[b_ptr0], #0x60]\n" + ".word 0x6f80e931 // udot v17.4s, v9.16b, v0.4b[2]\n" + "ldr q15, [%[b_ptr0], #0x70]\n" + ".word 0x6f80e952 // udot v18.4s, v10.16b, v0.4b[2]\n" + "subs %[loops], %[loops], #0x1\n" + ".word 0x6f80e973 // udot v19.4s, v11.16b, v0.4b[2]\n" + "prfm PLDL1KEEP, [%[a_ptr0], #0x40]\n" + ".word 0x6fa0e990 // udot v16.4s, v12.16b, v0.4b[3]\n" + "add %[b_ptr0], %[b_ptr0], #0x100\n" + ".word 0x6fa0e9b1 // udot v17.4s, v13.16b, v0.4b[3]\n" + "ldr q8, [%[b_ptr0], #-0x80]\n" + ".word 0x6fa0e9d2 // udot v18.4s, v14.16b, v0.4b[3]\n" + "ldr q9, [%[b_ptr0], #-0x70]\n" + ".word 0x6fa0e9f3 // udot v19.4s, v15.16b, v0.4b[3]\n" + "ldr q10, [%[b_ptr0], #-0x60]\n" + "ldr q11, [%[b_ptr0], #-0x50]\n" + "add %[a_ptr0], %[a_ptr0], #0x20\n" + ".word 0x6f84e110 // udot v16.4s, v8.16b, v4.4b[0]\n" + "ldr q12, [%[b_ptr0], #-0x40]\n" + ".word 0x6f84e131 // udot v17.4s, v9.16b, v4.4b[0]\n" + "ldr q13, [%[b_ptr0], #-0x30]\n" + ".word 0x6f84e152 // udot v18.4s, v10.16b, v4.4b[0]\n" + "ldr q14, [%[b_ptr0], #-0x20]\n" + ".word 0x6f84e173 // udot v19.4s, v11.16b, v4.4b[0]\n" + "ldr q15, [%[b_ptr0], #-0x10]\n" + ".word 0x6fa4e190 // udot v16.4s, v12.16b, v4.4b[1]\n" + "ldr q0, [%[a_ptr0], #-0x10]\n" + ".word 0x6fa4e1b1 // udot v17.4s, v13.16b, v4.4b[1]\n" + "ldr q8, [%[b_ptr0]]\n" + ".word 0x6fa4e1d2 // udot v18.4s, v14.16b, v4.4b[1]\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + ".word 0x6fa4e1f3 // udot v19.4s, v15.16b, v4.4b[1]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + ".word 0x6f84e910 // udot v16.4s, v8.16b, v4.4b[2]\n" + "ldr q12, [%[b_ptr0], #0x40]\n" + ".word 0x6f84e931 // udot v17.4s, v9.16b, v4.4b[2]\n" + "ldr q13, [%[b_ptr0], #0x50]\n" + ".word 0x6f84e952 // udot v18.4s, v10.16b, v4.4b[2]\n" + "ldr q14, [%[b_ptr0], #0x60]\n" + ".word 0x6f84e973 // udot v19.4s, v11.16b, v4.4b[2]\n" + "ldr q15, [%[b_ptr0], #0x70]\n" + ".word 0x6fa4e990 // udot v16.4s, v12.16b, v4.4b[3]\n" + "add %[b_ptr0], %[b_ptr0], #0x100\n" + ".word 0x6fa4e9b1 // udot v17.4s, v13.16b, v4.4b[3]\n" + "ldr q8, [%[b_ptr0], #-0x80]\n" + ".word 0x6fa4e9d2 // udot v18.4s, v14.16b, v4.4b[3]\n" + "ldr q9, [%[b_ptr0], #-0x70]\n" + ".word 0x6fa4e9f3 // udot v19.4s, v15.16b, v4.4b[3]\n" + "ldr q10, [%[b_ptr0], #-0x60]\n" + "ldr q11, [%[b_ptr0], #-0x50]\n" + "ldr q12, [%[b_ptr0], #-0x40]\n" + "ldr q13, [%[b_ptr0], #-0x30]\n" + "ldr q14, [%[b_ptr0], #-0x20]\n" + "b.ne 3b\n" + "2:\n" + "ldr q15, [%[b_ptr0], #-0x10]\n" + "prfm PSTL1KEEP, [%[c_ptr0]]\n" + "cbz %[regs], 4f\n" + ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" + "ldr q4, [%[a_ptr0]]\n" + ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" + "ldr q8, [%[b_ptr0]]\n" + ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + ".word 0x6fa0e190 // udot v16.4s, v12.16b, v0.4b[1]\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + ".word 0x6fa0e1b1 // udot v17.4s, v13.16b, v0.4b[1]\n" + "ldr q12, [%[b_ptr0], #0x40]\n" + ".word 0x6fa0e1d2 // udot v18.4s, v14.16b, v0.4b[1]\n" + "ldr q13, [%[b_ptr0], #0x50]\n" + ".word 0x6fa0e1f3 // udot v19.4s, v15.16b, v0.4b[1]\n" + "ldr q14, [%[b_ptr0], #0x60]\n" + ".word 0x6f80e910 // udot v16.4s, v8.16b, v0.4b[2]\n" + "ldr q15, [%[b_ptr0], #0x70]\n" + ".word 0x6f80e931 // udot v17.4s, v9.16b, v0.4b[2]\n" + "add %[b_ptr0], %[b_ptr0], #0x100\n" + ".word 0x6f80e952 // udot v18.4s, v10.16b, v0.4b[2]\n" + "ldr q8, [%[b_ptr0], #-0x80]\n" + ".word 0x6f80e973 // udot v19.4s, v11.16b, v0.4b[2]\n" + "ldr q9, [%[b_ptr0], #-0x70]\n" + ".word 0x6fa0e990 // udot v16.4s, v12.16b, v0.4b[3]\n" + "ldr q10, [%[b_ptr0], #-0x60]\n" + ".word 0x6fa0e9b1 // udot v17.4s, v13.16b, v0.4b[3]\n" + "ldr q11, [%[b_ptr0], #-0x50]\n" + ".word 0x6fa0e9d2 // udot v18.4s, v14.16b, v0.4b[3]\n" + "ldr q12, [%[b_ptr0], #-0x40]\n" + ".word 0x6fa0e9f3 // udot v19.4s, v15.16b, v0.4b[3]\n" + "ldr q13, [%[b_ptr0], #-0x30]\n" + ".word 0x6f84e110 // udot v16.4s, v8.16b, v4.4b[0]\n" + "ldr q14, [%[b_ptr0], #-0x20]\n" + ".word 0x6f84e131 // udot v17.4s, v9.16b, v4.4b[0]\n" + "ldr q15, [%[b_ptr0], #-0x10]\n" + ".word 0x6f84e152 // udot v18.4s, v10.16b, v4.4b[0]\n" + "ldr q8, [%[b_ptr0]]\n" + ".word 0x6f84e173 // udot v19.4s, v11.16b, v4.4b[0]\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + ".word 0x6fa4e190 // udot v16.4s, v12.16b, v4.4b[1]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + ".word 0x6fa4e1b1 // udot v17.4s, v13.16b, v4.4b[1]\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + ".word 0x6fa4e1d2 // udot v18.4s, v14.16b, v4.4b[1]\n" + "ldr q12, [%[b_ptr0], #0x40]\n" + ".word 0x6fa4e1f3 // udot v19.4s, v15.16b, v4.4b[1]\n" + "ldr q13, [%[b_ptr0], #0x50]\n" + ".word 0x6f84e910 // udot v16.4s, v8.16b, v4.4b[2]\n" + "ldr q14, [%[b_ptr0], #0x60]\n" + ".word 0x6f84e931 // udot v17.4s, v9.16b, v4.4b[2]\n" + "ldr q15, [%[b_ptr0], #0x70]\n" + ".word 0x6f84e952 // udot v18.4s, v10.16b, v4.4b[2]\n" + "add %[b_ptr0], %[b_ptr0], #0x80\n" + ".word 0x6f84e973 // udot v19.4s, v11.16b, v4.4b[2]\n" + "add %[a_ptr0], %[a_ptr0], #0x10\n" + ".word 0x6fa4e990 // udot v16.4s, v12.16b, v4.4b[3]\n" + ".word 0x6fa4e9b1 // udot v17.4s, v13.16b, v4.4b[3]\n" + ".word 0x6fa4e9d2 // udot v18.4s, v14.16b, v4.4b[3]\n" + ".word 0x6fa4e9f3 // udot v19.4s, v15.16b, v4.4b[3]\n" + "b 5f\n" + "4:\n" + ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" + "ldr q8, [%[b_ptr0]]\n" + ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + ".word 0x6fa0e190 // udot v16.4s, v12.16b, v0.4b[1]\n" + "ldr q12, [%[b_ptr0], #0x40]\n" + ".word 0x6fa0e1b1 // udot v17.4s, v13.16b, v0.4b[1]\n" + "ldr q13, [%[b_ptr0], #0x50]\n" + ".word 0x6fa0e1d2 // udot v18.4s, v14.16b, v0.4b[1]\n" + "ldr q14, [%[b_ptr0], #0x60]\n" + ".word 0x6fa0e1f3 // udot v19.4s, v15.16b, v0.4b[1]\n" + "ldr q15, [%[b_ptr0], #0x70]\n" + ".word 0x6f80e910 // udot v16.4s, v8.16b, v0.4b[2]\n" + "add %[b_ptr0], %[b_ptr0], #0x80\n" + ".word 0x6f80e931 // udot v17.4s, v9.16b, v0.4b[2]\n" + ".word 0x6f80e952 // udot v18.4s, v10.16b, v0.4b[2]\n" + ".word 0x6f80e973 // udot v19.4s, v11.16b, v0.4b[2]\n" + ".word 0x6fa0e990 // udot v16.4s, v12.16b, v0.4b[3]\n" + ".word 0x6fa0e9b1 // udot v17.4s, v13.16b, v0.4b[3]\n" + ".word 0x6fa0e9d2 // udot v18.4s, v14.16b, v0.4b[3]\n" + ".word 0x6fa0e9f3 // udot v19.4s, v15.16b, v0.4b[3]\n" + "5:\n" + "cbz %[blocks], 6f\n" + "7:\n" + "ldr q8, [%[b_ptr0]]\n" + "subs %[blocks], %[blocks], #0x1\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + "ldr s0, [%[a_ptr0]]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + "add %[a_ptr0], %[a_ptr0], #0x4\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + "add %[b_ptr0], %[b_ptr0], #0x40\n" + ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" + ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" + ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" + ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" + "b.ne 7b\n" + "6:\n" + "cbz %[odds], 8f\n" + "ld1 {v0.b}[0], [%[a_ptr0]], #1\n" + "subs %[odds], %[odds], #0x1\n" + "b.eq 9f\n" + "ld1 {v0.b}[1], [%[a_ptr0]], #1\n" + "subs %[odds], %[odds], #0x1\n" + "b.eq 9f\n" + "ld1 {v0.b}[2], [%[a_ptr0]]\n" + "9:\n" + "ldr q8, [%[b_ptr0]]\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" + ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" + ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" + ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" + "8:\n" + "str q16, [%[c_ptr0]]\n" + "str q17, [%[c_ptr0], #0x10]\n" + "str q18, [%[c_ptr0], #0x20]\n" + "str q19, [%[c_ptr0], #0x30]\n" + "add %[c_ptr0], %[c_ptr0], #0x40\n" + : [a_ptr0] "+r" (a_ptr0), [b_ptr0] "+r" (b_ptr0), [c_ptr0] "+r" (c_ptr0), [loops] "+r" (loops), [regs] "+r" (regs), [blocks] "+r" (blocks), [odds] "+r" (odds) + : [betaptr] "r" (betaptr), [width] "r" (width), [beta0] "r" (beta0), [lda] "r" (ldab), [ldc] "r" (ldcb) + : "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "cc", "memory" ); break; case 2: __asm __volatile ( - "a_ptr1 .req X0\n" - "c_ptr1 .req X1\n" - "add a_ptr1, %[a_ptr0], %[lda]\n" - "add c_ptr1, %[c_ptr0], %[ldc]\n" - "cbz %[beta0], 1f\n" - "movi v16.4s, #0\n" - "ldr q0, [%[a_ptr0]]\n" - "movi v17.4s, #0\n" - "ldr q1, [a_ptr1]\n" - "movi v18.4s, #0\n" - "ldr q8, [%[b_ptr0]]\n" - "movi v19.4s, #0\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - "movi v20.4s, #0\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - "movi v21.4s, #0\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - "movi v22.4s, #0\n" - "ldr q12, [%[b_ptr0], #0x40]\n" - "movi v23.4s, #0\n" - "ldr q13, [%[b_ptr0], #0x50]\n" - "ldr q14, [%[b_ptr0], #0x60]\n" - "add %[a_ptr0], %[a_ptr0], #0x10\n" - "add a_ptr1, a_ptr1, #0x10\n" - "add %[b_ptr0], %[b_ptr0], #0x80\n" - "cbz %[loops], 2f\n" - "b 3f\n" - "1:\n" - "ld1r {v15.4s}, [%[betaptr]]\n" - "ldr q16, [%[c_ptr0]]\n" - "ldr q17, [%[c_ptr0], #0x10]\n" - "ldr q18, [%[c_ptr0], #0x20]\n" - "ldr q19, [%[c_ptr0], #0x30]\n" - "mul v16.4s, v16.4s, v15.4s\n" - "ldr q20, [c_ptr1]\n" - "mul v17.4s, v17.4s, v15.4s\n" - "ldr q21, [c_ptr1, #0x10]\n" - "mul v18.4s, v18.4s, v15.4s\n" - "ldr q22, [c_ptr1, #0x20]\n" - "mul v19.4s, v19.4s, v15.4s\n" - "ldr q23, [c_ptr1, #0x30]\n" - "mul v20.4s, v20.4s, v15.4s\n" - "ldr q0, [%[a_ptr0]]\n" - "mul v21.4s, v21.4s, v15.4s\n" - "ldr q1, [a_ptr1]\n" - "mul v22.4s, v22.4s, v15.4s\n" - "ldr q8, [%[b_ptr0]]\n" - "mul v23.4s, v23.4s, v15.4s\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - "add %[a_ptr0], %[a_ptr0], #0x10\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - "add a_ptr1, a_ptr1, #0x10\n" - "ldr q12, [%[b_ptr0], #0x40]\n" - "ldr q13, [%[b_ptr0], #0x50]\n" - "ldr q14, [%[b_ptr0], #0x60]\n" - "add %[b_ptr0], %[b_ptr0], #0x80\n" - "cbz %[loops], 2f\n" - "3:\n" - ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" - "ldr q15, [%[b_ptr0], #-0x10]\n" - ".word 0x6f81e114 // udot v20.4s, v8.16b, v1.4b[0]\n" - "ldr q4, [%[a_ptr0]]\n" - ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" - "ldr q5, [a_ptr1]\n" - ".word 0x6f81e135 // udot v21.4s, v9.16b, v1.4b[0]\n" - "ldr q8, [%[b_ptr0]]\n" - ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - ".word 0x6f81e156 // udot v22.4s, v10.16b, v1.4b[0]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" - "subs %[loops], %[loops], #0x1\n" - ".word 0x6f81e177 // udot v23.4s, v11.16b, v1.4b[0]\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - ".word 0x6fa0e190 // udot v16.4s, v12.16b, v0.4b[1]\n" - "prfm PLDL1KEEP, [%[a_ptr0], #0x40]\n" - ".word 0x6fa1e194 // udot v20.4s, v12.16b, v1.4b[1]\n" - "ldr q12, [%[b_ptr0], #0x40]\n" - ".word 0x6fa0e1b1 // udot v17.4s, v13.16b, v0.4b[1]\n" - "add %[a_ptr0], %[a_ptr0], #0x20\n" - ".word 0x6fa1e1b5 // udot v21.4s, v13.16b, v1.4b[1]\n" - "ldr q13, [%[b_ptr0], #0x50]\n" - ".word 0x6fa0e1d2 // udot v18.4s, v14.16b, v0.4b[1]\n" - "add a_ptr1, a_ptr1, #0x20\n" - ".word 0x6fa1e1d6 // udot v22.4s, v14.16b, v1.4b[1]\n" - "ldr q14, [%[b_ptr0], #0x60]\n" - ".word 0x6fa0e1f3 // udot v19.4s, v15.16b, v0.4b[1]\n" - "prfm PLDL1KEEP, [a_ptr1, #0x40]\n" - ".word 0x6fa1e1f7 // udot v23.4s, v15.16b, v1.4b[1]\n" - "ldr q15, [%[b_ptr0], #0x70]\n" - ".word 0x6f80e910 // udot v16.4s, v8.16b, v0.4b[2]\n" - "add %[b_ptr0], %[b_ptr0], #0x100\n" - ".word 0x6f81e914 // udot v20.4s, v8.16b, v1.4b[2]\n" - "ldr q8, [%[b_ptr0], #-0x80]\n" - ".word 0x6f80e931 // udot v17.4s, v9.16b, v0.4b[2]\n" - ".word 0x6f81e935 // udot v21.4s, v9.16b, v1.4b[2]\n" - "ldr q9, [%[b_ptr0], #-0x70]\n" - ".word 0x6f80e952 // udot v18.4s, v10.16b, v0.4b[2]\n" - ".word 0x6f81e956 // udot v22.4s, v10.16b, v1.4b[2]\n" - "ldr q10, [%[b_ptr0], #-0x60]\n" - ".word 0x6f80e973 // udot v19.4s, v11.16b, v0.4b[2]\n" - ".word 0x6f81e977 // udot v23.4s, v11.16b, v1.4b[2]\n" - "ldr q11, [%[b_ptr0], #-0x50]\n" - ".word 0x6fa0e990 // udot v16.4s, v12.16b, v0.4b[3]\n" - ".word 0x6fa1e994 // udot v20.4s, v12.16b, v1.4b[3]\n" - "ldr q12, [%[b_ptr0], #-0x40]\n" - ".word 0x6fa0e9b1 // udot v17.4s, v13.16b, v0.4b[3]\n" - ".word 0x6fa1e9b5 // udot v21.4s, v13.16b, v1.4b[3]\n" - "ldr q13, [%[b_ptr0], #-0x30]\n" - ".word 0x6fa0e9d2 // udot v18.4s, v14.16b, v0.4b[3]\n" - ".word 0x6fa1e9d6 // udot v22.4s, v14.16b, v1.4b[3]\n" - "ldr q14, [%[b_ptr0], #-0x20]\n" - ".word 0x6fa0e9f3 // udot v19.4s, v15.16b, v0.4b[3]\n" - "ldr q0, [%[a_ptr0], #-0x10]\n" - ".word 0x6fa1e9f7 // udot v23.4s, v15.16b, v1.4b[3]\n" - "ldr q15, [%[b_ptr0], #-0x10]\n" - ".word 0x6f84e110 // udot v16.4s, v8.16b, v4.4b[0]\n" - "ldr q1, [a_ptr1, #-0x10]\n" - ".word 0x6f85e114 // udot v20.4s, v8.16b, v5.4b[0]\n" - "ldr q8, [%[b_ptr0]]\n" - ".word 0x6f84e131 // udot v17.4s, v9.16b, v4.4b[0]\n" - ".word 0x6f85e135 // udot v21.4s, v9.16b, v5.4b[0]\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - ".word 0x6f84e152 // udot v18.4s, v10.16b, v4.4b[0]\n" - ".word 0x6f85e156 // udot v22.4s, v10.16b, v5.4b[0]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - ".word 0x6f84e173 // udot v19.4s, v11.16b, v4.4b[0]\n" - ".word 0x6f85e177 // udot v23.4s, v11.16b, v5.4b[0]\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - ".word 0x6fa4e190 // udot v16.4s, v12.16b, v4.4b[1]\n" - ".word 0x6fa5e194 // udot v20.4s, v12.16b, v5.4b[1]\n" - "ldr q12, [%[b_ptr0], #0x40]\n" - ".word 0x6fa4e1b1 // udot v17.4s, v13.16b, v4.4b[1]\n" - ".word 0x6fa5e1b5 // udot v21.4s, v13.16b, v5.4b[1]\n" - "ldr q13, [%[b_ptr0], #0x50]\n" - ".word 0x6fa4e1d2 // udot v18.4s, v14.16b, v4.4b[1]\n" - ".word 0x6fa5e1d6 // udot v22.4s, v14.16b, v5.4b[1]\n" - "ldr q14, [%[b_ptr0], #0x60]\n" - ".word 0x6fa4e1f3 // udot v19.4s, v15.16b, v4.4b[1]\n" - ".word 0x6fa5e1f7 // udot v23.4s, v15.16b, v5.4b[1]\n" - "ldr q15, [%[b_ptr0], #0x70]\n" - ".word 0x6f84e910 // udot v16.4s, v8.16b, v4.4b[2]\n" - "add %[b_ptr0], %[b_ptr0], #0x100\n" - ".word 0x6f85e914 // udot v20.4s, v8.16b, v5.4b[2]\n" - "ldr q8, [%[b_ptr0], #-0x80]\n" - ".word 0x6f84e931 // udot v17.4s, v9.16b, v4.4b[2]\n" - ".word 0x6f85e935 // udot v21.4s, v9.16b, v5.4b[2]\n" - "ldr q9, [%[b_ptr0], #-0x70]\n" - ".word 0x6f84e952 // udot v18.4s, v10.16b, v4.4b[2]\n" - ".word 0x6f85e956 // udot v22.4s, v10.16b, v5.4b[2]\n" - "ldr q10, [%[b_ptr0], #-0x60]\n" - ".word 0x6f84e973 // udot v19.4s, v11.16b, v4.4b[2]\n" - ".word 0x6f85e977 // udot v23.4s, v11.16b, v5.4b[2]\n" - "ldr q11, [%[b_ptr0], #-0x50]\n" - ".word 0x6fa4e990 // udot v16.4s, v12.16b, v4.4b[3]\n" - ".word 0x6fa5e994 // udot v20.4s, v12.16b, v5.4b[3]\n" - "ldr q12, [%[b_ptr0], #-0x40]\n" - ".word 0x6fa4e9b1 // udot v17.4s, v13.16b, v4.4b[3]\n" - ".word 0x6fa5e9b5 // udot v21.4s, v13.16b, v5.4b[3]\n" - "ldr q13, [%[b_ptr0], #-0x30]\n" - ".word 0x6fa4e9d2 // udot v18.4s, v14.16b, v4.4b[3]\n" - ".word 0x6fa5e9d6 // udot v22.4s, v14.16b, v5.4b[3]\n" - "ldr q14, [%[b_ptr0], #-0x20]\n" - ".word 0x6fa4e9f3 // udot v19.4s, v15.16b, v4.4b[3]\n" - ".word 0x6fa5e9f7 // udot v23.4s, v15.16b, v5.4b[3]\n" - "b.ne 3b\n" - "2:\n" - "ldr q15, [%[b_ptr0], #-0x10]\n" - "prfm PSTL1KEEP, [%[c_ptr0]]\n" - "prfm PSTL1KEEP, [c_ptr1]\n" - "cbz %[regs], 4f\n" - ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" - "ldr q4, [%[a_ptr0]]\n" - ".word 0x6f81e114 // udot v20.4s, v8.16b, v1.4b[0]\n" - "ldr q5, [a_ptr1]\n" - ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" - "ldr q8, [%[b_ptr0]]\n" - ".word 0x6f81e135 // udot v21.4s, v9.16b, v1.4b[0]\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" - "add %[a_ptr0], %[a_ptr0], #0x10\n" - ".word 0x6f81e156 // udot v22.4s, v10.16b, v1.4b[0]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" - "add a_ptr1, a_ptr1, #0x10\n" - ".word 0x6f81e177 // udot v23.4s, v11.16b, v1.4b[0]\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - ".word 0x6fa0e190 // udot v16.4s, v12.16b, v0.4b[1]\n" - ".word 0x6fa1e194 // udot v20.4s, v12.16b, v1.4b[1]\n" - "ldr q12, [%[b_ptr0], #0x40]\n" - ".word 0x6fa0e1b1 // udot v17.4s, v13.16b, v0.4b[1]\n" - ".word 0x6fa1e1b5 // udot v21.4s, v13.16b, v1.4b[1]\n" - "ldr q13, [%[b_ptr0], #0x50]\n" - ".word 0x6fa0e1d2 // udot v18.4s, v14.16b, v0.4b[1]\n" - ".word 0x6fa1e1d6 // udot v22.4s, v14.16b, v1.4b[1]\n" - "ldr q14, [%[b_ptr0], #0x60]\n" - ".word 0x6fa0e1f3 // udot v19.4s, v15.16b, v0.4b[1]\n" - ".word 0x6fa1e1f7 // udot v23.4s, v15.16b, v1.4b[1]\n" - "ldr q15, [%[b_ptr0], #0x70]\n" - ".word 0x6f80e910 // udot v16.4s, v8.16b, v0.4b[2]\n" - "add %[b_ptr0], %[b_ptr0], #0x100\n" - ".word 0x6f81e914 // udot v20.4s, v8.16b, v1.4b[2]\n" - "ldr q8, [%[b_ptr0], #-0x80]\n" - ".word 0x6f80e931 // udot v17.4s, v9.16b, v0.4b[2]\n" - ".word 0x6f81e935 // udot v21.4s, v9.16b, v1.4b[2]\n" - "ldr q9, [%[b_ptr0], #-0x70]\n" - ".word 0x6f80e952 // udot v18.4s, v10.16b, v0.4b[2]\n" - ".word 0x6f81e956 // udot v22.4s, v10.16b, v1.4b[2]\n" - "ldr q10, [%[b_ptr0], #-0x60]\n" - ".word 0x6f80e973 // udot v19.4s, v11.16b, v0.4b[2]\n" - ".word 0x6f81e977 // udot v23.4s, v11.16b, v1.4b[2]\n" - "ldr q11, [%[b_ptr0], #-0x50]\n" - ".word 0x6fa0e990 // udot v16.4s, v12.16b, v0.4b[3]\n" - ".word 0x6fa1e994 // udot v20.4s, v12.16b, v1.4b[3]\n" - "ldr q12, [%[b_ptr0], #-0x40]\n" - ".word 0x6fa0e9b1 // udot v17.4s, v13.16b, v0.4b[3]\n" - ".word 0x6fa1e9b5 // udot v21.4s, v13.16b, v1.4b[3]\n" - "ldr q13, [%[b_ptr0], #-0x30]\n" - ".word 0x6fa0e9d2 // udot v18.4s, v14.16b, v0.4b[3]\n" - ".word 0x6fa1e9d6 // udot v22.4s, v14.16b, v1.4b[3]\n" - "ldr q14, [%[b_ptr0], #-0x20]\n" - ".word 0x6fa0e9f3 // udot v19.4s, v15.16b, v0.4b[3]\n" - ".word 0x6fa1e9f7 // udot v23.4s, v15.16b, v1.4b[3]\n" - "ldr q15, [%[b_ptr0], #-0x10]\n" - ".word 0x6f84e110 // udot v16.4s, v8.16b, v4.4b[0]\n" - ".word 0x6f85e114 // udot v20.4s, v8.16b, v5.4b[0]\n" - "ldr q8, [%[b_ptr0]]\n" - ".word 0x6f84e131 // udot v17.4s, v9.16b, v4.4b[0]\n" - ".word 0x6f85e135 // udot v21.4s, v9.16b, v5.4b[0]\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - ".word 0x6f84e152 // udot v18.4s, v10.16b, v4.4b[0]\n" - ".word 0x6f85e156 // udot v22.4s, v10.16b, v5.4b[0]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - ".word 0x6f84e173 // udot v19.4s, v11.16b, v4.4b[0]\n" - ".word 0x6f85e177 // udot v23.4s, v11.16b, v5.4b[0]\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - ".word 0x6fa4e190 // udot v16.4s, v12.16b, v4.4b[1]\n" - ".word 0x6fa5e194 // udot v20.4s, v12.16b, v5.4b[1]\n" - "ldr q12, [%[b_ptr0], #0x40]\n" - ".word 0x6fa4e1b1 // udot v17.4s, v13.16b, v4.4b[1]\n" - ".word 0x6fa5e1b5 // udot v21.4s, v13.16b, v5.4b[1]\n" - "ldr q13, [%[b_ptr0], #0x50]\n" - ".word 0x6fa4e1d2 // udot v18.4s, v14.16b, v4.4b[1]\n" - ".word 0x6fa5e1d6 // udot v22.4s, v14.16b, v5.4b[1]\n" - "ldr q14, [%[b_ptr0], #0x60]\n" - ".word 0x6fa4e1f3 // udot v19.4s, v15.16b, v4.4b[1]\n" - ".word 0x6fa5e1f7 // udot v23.4s, v15.16b, v5.4b[1]\n" - "ldr q15, [%[b_ptr0], #0x70]\n" - ".word 0x6f84e910 // udot v16.4s, v8.16b, v4.4b[2]\n" - "add %[b_ptr0], %[b_ptr0], #0x80\n" - ".word 0x6f85e914 // udot v20.4s, v8.16b, v5.4b[2]\n" - ".word 0x6f84e931 // udot v17.4s, v9.16b, v4.4b[2]\n" - ".word 0x6f85e935 // udot v21.4s, v9.16b, v5.4b[2]\n" - ".word 0x6f84e952 // udot v18.4s, v10.16b, v4.4b[2]\n" - ".word 0x6f85e956 // udot v22.4s, v10.16b, v5.4b[2]\n" - ".word 0x6f84e973 // udot v19.4s, v11.16b, v4.4b[2]\n" - ".word 0x6f85e977 // udot v23.4s, v11.16b, v5.4b[2]\n" - ".word 0x6fa4e990 // udot v16.4s, v12.16b, v4.4b[3]\n" - ".word 0x6fa5e994 // udot v20.4s, v12.16b, v5.4b[3]\n" - ".word 0x6fa4e9b1 // udot v17.4s, v13.16b, v4.4b[3]\n" - ".word 0x6fa5e9b5 // udot v21.4s, v13.16b, v5.4b[3]\n" - ".word 0x6fa4e9d2 // udot v18.4s, v14.16b, v4.4b[3]\n" - ".word 0x6fa5e9d6 // udot v22.4s, v14.16b, v5.4b[3]\n" - ".word 0x6fa4e9f3 // udot v19.4s, v15.16b, v4.4b[3]\n" - ".word 0x6fa5e9f7 // udot v23.4s, v15.16b, v5.4b[3]\n" - "b 5f\n" - "4:\n" - ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" - ".word 0x6f81e114 // udot v20.4s, v8.16b, v1.4b[0]\n" - "ldr q8, [%[b_ptr0]]\n" - ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" - ".word 0x6f81e135 // udot v21.4s, v9.16b, v1.4b[0]\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" - ".word 0x6f81e156 // udot v22.4s, v10.16b, v1.4b[0]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" - ".word 0x6f81e177 // udot v23.4s, v11.16b, v1.4b[0]\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - ".word 0x6fa0e190 // udot v16.4s, v12.16b, v0.4b[1]\n" - ".word 0x6fa1e194 // udot v20.4s, v12.16b, v1.4b[1]\n" - "ldr q12, [%[b_ptr0], #0x40]\n" - ".word 0x6fa0e1b1 // udot v17.4s, v13.16b, v0.4b[1]\n" - ".word 0x6fa1e1b5 // udot v21.4s, v13.16b, v1.4b[1]\n" - "ldr q13, [%[b_ptr0], #0x50]\n" - ".word 0x6fa0e1d2 // udot v18.4s, v14.16b, v0.4b[1]\n" - ".word 0x6fa1e1d6 // udot v22.4s, v14.16b, v1.4b[1]\n" - "ldr q14, [%[b_ptr0], #0x60]\n" - ".word 0x6fa0e1f3 // udot v19.4s, v15.16b, v0.4b[1]\n" - ".word 0x6fa1e1f7 // udot v23.4s, v15.16b, v1.4b[1]\n" - "ldr q15, [%[b_ptr0], #0x70]\n" - ".word 0x6f80e910 // udot v16.4s, v8.16b, v0.4b[2]\n" - "add %[b_ptr0], %[b_ptr0], #0x80\n" - ".word 0x6f81e914 // udot v20.4s, v8.16b, v1.4b[2]\n" - ".word 0x6f80e931 // udot v17.4s, v9.16b, v0.4b[2]\n" - ".word 0x6f81e935 // udot v21.4s, v9.16b, v1.4b[2]\n" - ".word 0x6f80e952 // udot v18.4s, v10.16b, v0.4b[2]\n" - ".word 0x6f81e956 // udot v22.4s, v10.16b, v1.4b[2]\n" - ".word 0x6f80e973 // udot v19.4s, v11.16b, v0.4b[2]\n" - ".word 0x6f81e977 // udot v23.4s, v11.16b, v1.4b[2]\n" - ".word 0x6fa0e990 // udot v16.4s, v12.16b, v0.4b[3]\n" - ".word 0x6fa1e994 // udot v20.4s, v12.16b, v1.4b[3]\n" - ".word 0x6fa0e9b1 // udot v17.4s, v13.16b, v0.4b[3]\n" - ".word 0x6fa1e9b5 // udot v21.4s, v13.16b, v1.4b[3]\n" - ".word 0x6fa0e9d2 // udot v18.4s, v14.16b, v0.4b[3]\n" - ".word 0x6fa1e9d6 // udot v22.4s, v14.16b, v1.4b[3]\n" - ".word 0x6fa0e9f3 // udot v19.4s, v15.16b, v0.4b[3]\n" - ".word 0x6fa1e9f7 // udot v23.4s, v15.16b, v1.4b[3]\n" - "5:\n" - "cbz %[blocks], 6f\n" - "7:\n" - "ldr q8, [%[b_ptr0]]\n" - "subs %[blocks], %[blocks], #0x1\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - "ldr s0, [%[a_ptr0]]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - "add %[a_ptr0], %[a_ptr0], #0x4\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - "add %[b_ptr0], %[b_ptr0], #0x40\n" - ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" - "ldr s1, [a_ptr1]\n" - ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" - "add a_ptr1, a_ptr1, #0x4\n" - ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" - ".word 0x6f81e114 // udot v20.4s, v8.16b, v1.4b[0]\n" - ".word 0x6f81e135 // udot v21.4s, v9.16b, v1.4b[0]\n" - ".word 0x6f81e156 // udot v22.4s, v10.16b, v1.4b[0]\n" - ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" - ".word 0x6f81e177 // udot v23.4s, v11.16b, v1.4b[0]\n" - "b.ne 7b\n" - "6:\n" - "cbz %[odds], 8f\n" - "ld1 {v0.b}[0], [%[a_ptr0]], #1\n" - "ld1 {v1.b}[0], [a_ptr1], #1\n" - "subs %[odds], %[odds], #0x1\n" - "b.eq 9f\n" - "ld1 {v0.b}[1], [%[a_ptr0]], #1\n" - "ld1 {v1.b}[1], [a_ptr1], #1\n" - "subs %[odds], %[odds], #0x1\n" - "b.eq 9f\n" - "ld1 {v0.b}[2], [%[a_ptr0]]\n" - "ld1 {v1.b}[2], [a_ptr1]\n" - "9:\n" - "ldr q8, [%[b_ptr0]]\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" - ".word 0x6f81e114 // udot v20.4s, v8.16b, v1.4b[0]\n" - ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" - ".word 0x6f81e135 // udot v21.4s, v9.16b, v1.4b[0]\n" - ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" - ".word 0x6f81e156 // udot v22.4s, v10.16b, v1.4b[0]\n" - ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" - ".word 0x6f81e177 // udot v23.4s, v11.16b, v1.4b[0]\n" - "8:\n" - "str q16, [%[c_ptr0]]\n" - "str q17, [%[c_ptr0], #0x10]\n" - "str q18, [%[c_ptr0], #0x20]\n" - "str q19, [%[c_ptr0], #0x30]\n" - "add %[c_ptr0], %[c_ptr0], #0x40\n" - "str q20, [c_ptr1]\n" - "str q21, [c_ptr1, #0x10]\n" - "str q22, [c_ptr1, #0x20]\n" - "str q23, [c_ptr1, #0x30]\n" - ".unreq a_ptr1\n" - ".unreq c_ptr1\n" - : [a_ptr0] "+r" (a_ptr0), [b_ptr0] "+r" (b_ptr0), [c_ptr0] "+r" (c_ptr0), [loops] "+r" (loops), [regs] "+r" (regs), [blocks] "+r" (blocks), [odds] "+r" (odds) - : [betaptr] "r" (betaptr), [width] "r" (width), [beta0] "r" (beta0), [lda] "r" (ldab), [ldc] "r" (ldcb) - : "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x0", "x1", "cc", "memory" + "a_ptr1 .req X0\n" + "c_ptr1 .req X1\n" + "add a_ptr1, %[a_ptr0], %[lda]\n" + "add c_ptr1, %[c_ptr0], %[ldc]\n" + "cbz %[beta0], 1f\n" + "movi v16.4s, #0\n" + "ldr q0, [%[a_ptr0]]\n" + "movi v17.4s, #0\n" + "ldr q1, [a_ptr1]\n" + "movi v18.4s, #0\n" + "ldr q8, [%[b_ptr0]]\n" + "movi v19.4s, #0\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + "movi v20.4s, #0\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + "movi v21.4s, #0\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + "movi v22.4s, #0\n" + "ldr q12, [%[b_ptr0], #0x40]\n" + "movi v23.4s, #0\n" + "ldr q13, [%[b_ptr0], #0x50]\n" + "ldr q14, [%[b_ptr0], #0x60]\n" + "add %[a_ptr0], %[a_ptr0], #0x10\n" + "add a_ptr1, a_ptr1, #0x10\n" + "add %[b_ptr0], %[b_ptr0], #0x80\n" + "cbz %[loops], 2f\n" + "b 3f\n" + "1:\n" + "ld1r {v15.4s}, [%[betaptr]]\n" + "ldr q16, [%[c_ptr0]]\n" + "ldr q17, [%[c_ptr0], #0x10]\n" + "ldr q18, [%[c_ptr0], #0x20]\n" + "ldr q19, [%[c_ptr0], #0x30]\n" + "mul v16.4s, v16.4s, v15.4s\n" + "ldr q20, [c_ptr1]\n" + "mul v17.4s, v17.4s, v15.4s\n" + "ldr q21, [c_ptr1, #0x10]\n" + "mul v18.4s, v18.4s, v15.4s\n" + "ldr q22, [c_ptr1, #0x20]\n" + "mul v19.4s, v19.4s, v15.4s\n" + "ldr q23, [c_ptr1, #0x30]\n" + "mul v20.4s, v20.4s, v15.4s\n" + "ldr q0, [%[a_ptr0]]\n" + "mul v21.4s, v21.4s, v15.4s\n" + "ldr q1, [a_ptr1]\n" + "mul v22.4s, v22.4s, v15.4s\n" + "ldr q8, [%[b_ptr0]]\n" + "mul v23.4s, v23.4s, v15.4s\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + "add %[a_ptr0], %[a_ptr0], #0x10\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + "add a_ptr1, a_ptr1, #0x10\n" + "ldr q12, [%[b_ptr0], #0x40]\n" + "ldr q13, [%[b_ptr0], #0x50]\n" + "ldr q14, [%[b_ptr0], #0x60]\n" + "add %[b_ptr0], %[b_ptr0], #0x80\n" + "cbz %[loops], 2f\n" + "3:\n" + ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" + "ldr q15, [%[b_ptr0], #-0x10]\n" + ".word 0x6f81e114 // udot v20.4s, v8.16b, v1.4b[0]\n" + "ldr q4, [%[a_ptr0]]\n" + ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" + "ldr q5, [a_ptr1]\n" + ".word 0x6f81e135 // udot v21.4s, v9.16b, v1.4b[0]\n" + "ldr q8, [%[b_ptr0]]\n" + ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + ".word 0x6f81e156 // udot v22.4s, v10.16b, v1.4b[0]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" + "subs %[loops], %[loops], #0x1\n" + ".word 0x6f81e177 // udot v23.4s, v11.16b, v1.4b[0]\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + ".word 0x6fa0e190 // udot v16.4s, v12.16b, v0.4b[1]\n" + "prfm PLDL1KEEP, [%[a_ptr0], #0x40]\n" + ".word 0x6fa1e194 // udot v20.4s, v12.16b, v1.4b[1]\n" + "ldr q12, [%[b_ptr0], #0x40]\n" + ".word 0x6fa0e1b1 // udot v17.4s, v13.16b, v0.4b[1]\n" + "add %[a_ptr0], %[a_ptr0], #0x20\n" + ".word 0x6fa1e1b5 // udot v21.4s, v13.16b, v1.4b[1]\n" + "ldr q13, [%[b_ptr0], #0x50]\n" + ".word 0x6fa0e1d2 // udot v18.4s, v14.16b, v0.4b[1]\n" + "add a_ptr1, a_ptr1, #0x20\n" + ".word 0x6fa1e1d6 // udot v22.4s, v14.16b, v1.4b[1]\n" + "ldr q14, [%[b_ptr0], #0x60]\n" + ".word 0x6fa0e1f3 // udot v19.4s, v15.16b, v0.4b[1]\n" + "prfm PLDL1KEEP, [a_ptr1, #0x40]\n" + ".word 0x6fa1e1f7 // udot v23.4s, v15.16b, v1.4b[1]\n" + "ldr q15, [%[b_ptr0], #0x70]\n" + ".word 0x6f80e910 // udot v16.4s, v8.16b, v0.4b[2]\n" + "add %[b_ptr0], %[b_ptr0], #0x100\n" + ".word 0x6f81e914 // udot v20.4s, v8.16b, v1.4b[2]\n" + "ldr q8, [%[b_ptr0], #-0x80]\n" + ".word 0x6f80e931 // udot v17.4s, v9.16b, v0.4b[2]\n" + ".word 0x6f81e935 // udot v21.4s, v9.16b, v1.4b[2]\n" + "ldr q9, [%[b_ptr0], #-0x70]\n" + ".word 0x6f80e952 // udot v18.4s, v10.16b, v0.4b[2]\n" + ".word 0x6f81e956 // udot v22.4s, v10.16b, v1.4b[2]\n" + "ldr q10, [%[b_ptr0], #-0x60]\n" + ".word 0x6f80e973 // udot v19.4s, v11.16b, v0.4b[2]\n" + ".word 0x6f81e977 // udot v23.4s, v11.16b, v1.4b[2]\n" + "ldr q11, [%[b_ptr0], #-0x50]\n" + ".word 0x6fa0e990 // udot v16.4s, v12.16b, v0.4b[3]\n" + ".word 0x6fa1e994 // udot v20.4s, v12.16b, v1.4b[3]\n" + "ldr q12, [%[b_ptr0], #-0x40]\n" + ".word 0x6fa0e9b1 // udot v17.4s, v13.16b, v0.4b[3]\n" + ".word 0x6fa1e9b5 // udot v21.4s, v13.16b, v1.4b[3]\n" + "ldr q13, [%[b_ptr0], #-0x30]\n" + ".word 0x6fa0e9d2 // udot v18.4s, v14.16b, v0.4b[3]\n" + ".word 0x6fa1e9d6 // udot v22.4s, v14.16b, v1.4b[3]\n" + "ldr q14, [%[b_ptr0], #-0x20]\n" + ".word 0x6fa0e9f3 // udot v19.4s, v15.16b, v0.4b[3]\n" + "ldr q0, [%[a_ptr0], #-0x10]\n" + ".word 0x6fa1e9f7 // udot v23.4s, v15.16b, v1.4b[3]\n" + "ldr q15, [%[b_ptr0], #-0x10]\n" + ".word 0x6f84e110 // udot v16.4s, v8.16b, v4.4b[0]\n" + "ldr q1, [a_ptr1, #-0x10]\n" + ".word 0x6f85e114 // udot v20.4s, v8.16b, v5.4b[0]\n" + "ldr q8, [%[b_ptr0]]\n" + ".word 0x6f84e131 // udot v17.4s, v9.16b, v4.4b[0]\n" + ".word 0x6f85e135 // udot v21.4s, v9.16b, v5.4b[0]\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + ".word 0x6f84e152 // udot v18.4s, v10.16b, v4.4b[0]\n" + ".word 0x6f85e156 // udot v22.4s, v10.16b, v5.4b[0]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + ".word 0x6f84e173 // udot v19.4s, v11.16b, v4.4b[0]\n" + ".word 0x6f85e177 // udot v23.4s, v11.16b, v5.4b[0]\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + ".word 0x6fa4e190 // udot v16.4s, v12.16b, v4.4b[1]\n" + ".word 0x6fa5e194 // udot v20.4s, v12.16b, v5.4b[1]\n" + "ldr q12, [%[b_ptr0], #0x40]\n" + ".word 0x6fa4e1b1 // udot v17.4s, v13.16b, v4.4b[1]\n" + ".word 0x6fa5e1b5 // udot v21.4s, v13.16b, v5.4b[1]\n" + "ldr q13, [%[b_ptr0], #0x50]\n" + ".word 0x6fa4e1d2 // udot v18.4s, v14.16b, v4.4b[1]\n" + ".word 0x6fa5e1d6 // udot v22.4s, v14.16b, v5.4b[1]\n" + "ldr q14, [%[b_ptr0], #0x60]\n" + ".word 0x6fa4e1f3 // udot v19.4s, v15.16b, v4.4b[1]\n" + ".word 0x6fa5e1f7 // udot v23.4s, v15.16b, v5.4b[1]\n" + "ldr q15, [%[b_ptr0], #0x70]\n" + ".word 0x6f84e910 // udot v16.4s, v8.16b, v4.4b[2]\n" + "add %[b_ptr0], %[b_ptr0], #0x100\n" + ".word 0x6f85e914 // udot v20.4s, v8.16b, v5.4b[2]\n" + "ldr q8, [%[b_ptr0], #-0x80]\n" + ".word 0x6f84e931 // udot v17.4s, v9.16b, v4.4b[2]\n" + ".word 0x6f85e935 // udot v21.4s, v9.16b, v5.4b[2]\n" + "ldr q9, [%[b_ptr0], #-0x70]\n" + ".word 0x6f84e952 // udot v18.4s, v10.16b, v4.4b[2]\n" + ".word 0x6f85e956 // udot v22.4s, v10.16b, v5.4b[2]\n" + "ldr q10, [%[b_ptr0], #-0x60]\n" + ".word 0x6f84e973 // udot v19.4s, v11.16b, v4.4b[2]\n" + ".word 0x6f85e977 // udot v23.4s, v11.16b, v5.4b[2]\n" + "ldr q11, [%[b_ptr0], #-0x50]\n" + ".word 0x6fa4e990 // udot v16.4s, v12.16b, v4.4b[3]\n" + ".word 0x6fa5e994 // udot v20.4s, v12.16b, v5.4b[3]\n" + "ldr q12, [%[b_ptr0], #-0x40]\n" + ".word 0x6fa4e9b1 // udot v17.4s, v13.16b, v4.4b[3]\n" + ".word 0x6fa5e9b5 // udot v21.4s, v13.16b, v5.4b[3]\n" + "ldr q13, [%[b_ptr0], #-0x30]\n" + ".word 0x6fa4e9d2 // udot v18.4s, v14.16b, v4.4b[3]\n" + ".word 0x6fa5e9d6 // udot v22.4s, v14.16b, v5.4b[3]\n" + "ldr q14, [%[b_ptr0], #-0x20]\n" + ".word 0x6fa4e9f3 // udot v19.4s, v15.16b, v4.4b[3]\n" + ".word 0x6fa5e9f7 // udot v23.4s, v15.16b, v5.4b[3]\n" + "b.ne 3b\n" + "2:\n" + "ldr q15, [%[b_ptr0], #-0x10]\n" + "prfm PSTL1KEEP, [%[c_ptr0]]\n" + "prfm PSTL1KEEP, [c_ptr1]\n" + "cbz %[regs], 4f\n" + ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" + "ldr q4, [%[a_ptr0]]\n" + ".word 0x6f81e114 // udot v20.4s, v8.16b, v1.4b[0]\n" + "ldr q5, [a_ptr1]\n" + ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" + "ldr q8, [%[b_ptr0]]\n" + ".word 0x6f81e135 // udot v21.4s, v9.16b, v1.4b[0]\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" + "add %[a_ptr0], %[a_ptr0], #0x10\n" + ".word 0x6f81e156 // udot v22.4s, v10.16b, v1.4b[0]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" + "add a_ptr1, a_ptr1, #0x10\n" + ".word 0x6f81e177 // udot v23.4s, v11.16b, v1.4b[0]\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + ".word 0x6fa0e190 // udot v16.4s, v12.16b, v0.4b[1]\n" + ".word 0x6fa1e194 // udot v20.4s, v12.16b, v1.4b[1]\n" + "ldr q12, [%[b_ptr0], #0x40]\n" + ".word 0x6fa0e1b1 // udot v17.4s, v13.16b, v0.4b[1]\n" + ".word 0x6fa1e1b5 // udot v21.4s, v13.16b, v1.4b[1]\n" + "ldr q13, [%[b_ptr0], #0x50]\n" + ".word 0x6fa0e1d2 // udot v18.4s, v14.16b, v0.4b[1]\n" + ".word 0x6fa1e1d6 // udot v22.4s, v14.16b, v1.4b[1]\n" + "ldr q14, [%[b_ptr0], #0x60]\n" + ".word 0x6fa0e1f3 // udot v19.4s, v15.16b, v0.4b[1]\n" + ".word 0x6fa1e1f7 // udot v23.4s, v15.16b, v1.4b[1]\n" + "ldr q15, [%[b_ptr0], #0x70]\n" + ".word 0x6f80e910 // udot v16.4s, v8.16b, v0.4b[2]\n" + "add %[b_ptr0], %[b_ptr0], #0x100\n" + ".word 0x6f81e914 // udot v20.4s, v8.16b, v1.4b[2]\n" + "ldr q8, [%[b_ptr0], #-0x80]\n" + ".word 0x6f80e931 // udot v17.4s, v9.16b, v0.4b[2]\n" + ".word 0x6f81e935 // udot v21.4s, v9.16b, v1.4b[2]\n" + "ldr q9, [%[b_ptr0], #-0x70]\n" + ".word 0x6f80e952 // udot v18.4s, v10.16b, v0.4b[2]\n" + ".word 0x6f81e956 // udot v22.4s, v10.16b, v1.4b[2]\n" + "ldr q10, [%[b_ptr0], #-0x60]\n" + ".word 0x6f80e973 // udot v19.4s, v11.16b, v0.4b[2]\n" + ".word 0x6f81e977 // udot v23.4s, v11.16b, v1.4b[2]\n" + "ldr q11, [%[b_ptr0], #-0x50]\n" + ".word 0x6fa0e990 // udot v16.4s, v12.16b, v0.4b[3]\n" + ".word 0x6fa1e994 // udot v20.4s, v12.16b, v1.4b[3]\n" + "ldr q12, [%[b_ptr0], #-0x40]\n" + ".word 0x6fa0e9b1 // udot v17.4s, v13.16b, v0.4b[3]\n" + ".word 0x6fa1e9b5 // udot v21.4s, v13.16b, v1.4b[3]\n" + "ldr q13, [%[b_ptr0], #-0x30]\n" + ".word 0x6fa0e9d2 // udot v18.4s, v14.16b, v0.4b[3]\n" + ".word 0x6fa1e9d6 // udot v22.4s, v14.16b, v1.4b[3]\n" + "ldr q14, [%[b_ptr0], #-0x20]\n" + ".word 0x6fa0e9f3 // udot v19.4s, v15.16b, v0.4b[3]\n" + ".word 0x6fa1e9f7 // udot v23.4s, v15.16b, v1.4b[3]\n" + "ldr q15, [%[b_ptr0], #-0x10]\n" + ".word 0x6f84e110 // udot v16.4s, v8.16b, v4.4b[0]\n" + ".word 0x6f85e114 // udot v20.4s, v8.16b, v5.4b[0]\n" + "ldr q8, [%[b_ptr0]]\n" + ".word 0x6f84e131 // udot v17.4s, v9.16b, v4.4b[0]\n" + ".word 0x6f85e135 // udot v21.4s, v9.16b, v5.4b[0]\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + ".word 0x6f84e152 // udot v18.4s, v10.16b, v4.4b[0]\n" + ".word 0x6f85e156 // udot v22.4s, v10.16b, v5.4b[0]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + ".word 0x6f84e173 // udot v19.4s, v11.16b, v4.4b[0]\n" + ".word 0x6f85e177 // udot v23.4s, v11.16b, v5.4b[0]\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + ".word 0x6fa4e190 // udot v16.4s, v12.16b, v4.4b[1]\n" + ".word 0x6fa5e194 // udot v20.4s, v12.16b, v5.4b[1]\n" + "ldr q12, [%[b_ptr0], #0x40]\n" + ".word 0x6fa4e1b1 // udot v17.4s, v13.16b, v4.4b[1]\n" + ".word 0x6fa5e1b5 // udot v21.4s, v13.16b, v5.4b[1]\n" + "ldr q13, [%[b_ptr0], #0x50]\n" + ".word 0x6fa4e1d2 // udot v18.4s, v14.16b, v4.4b[1]\n" + ".word 0x6fa5e1d6 // udot v22.4s, v14.16b, v5.4b[1]\n" + "ldr q14, [%[b_ptr0], #0x60]\n" + ".word 0x6fa4e1f3 // udot v19.4s, v15.16b, v4.4b[1]\n" + ".word 0x6fa5e1f7 // udot v23.4s, v15.16b, v5.4b[1]\n" + "ldr q15, [%[b_ptr0], #0x70]\n" + ".word 0x6f84e910 // udot v16.4s, v8.16b, v4.4b[2]\n" + "add %[b_ptr0], %[b_ptr0], #0x80\n" + ".word 0x6f85e914 // udot v20.4s, v8.16b, v5.4b[2]\n" + ".word 0x6f84e931 // udot v17.4s, v9.16b, v4.4b[2]\n" + ".word 0x6f85e935 // udot v21.4s, v9.16b, v5.4b[2]\n" + ".word 0x6f84e952 // udot v18.4s, v10.16b, v4.4b[2]\n" + ".word 0x6f85e956 // udot v22.4s, v10.16b, v5.4b[2]\n" + ".word 0x6f84e973 // udot v19.4s, v11.16b, v4.4b[2]\n" + ".word 0x6f85e977 // udot v23.4s, v11.16b, v5.4b[2]\n" + ".word 0x6fa4e990 // udot v16.4s, v12.16b, v4.4b[3]\n" + ".word 0x6fa5e994 // udot v20.4s, v12.16b, v5.4b[3]\n" + ".word 0x6fa4e9b1 // udot v17.4s, v13.16b, v4.4b[3]\n" + ".word 0x6fa5e9b5 // udot v21.4s, v13.16b, v5.4b[3]\n" + ".word 0x6fa4e9d2 // udot v18.4s, v14.16b, v4.4b[3]\n" + ".word 0x6fa5e9d6 // udot v22.4s, v14.16b, v5.4b[3]\n" + ".word 0x6fa4e9f3 // udot v19.4s, v15.16b, v4.4b[3]\n" + ".word 0x6fa5e9f7 // udot v23.4s, v15.16b, v5.4b[3]\n" + "b 5f\n" + "4:\n" + ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" + ".word 0x6f81e114 // udot v20.4s, v8.16b, v1.4b[0]\n" + "ldr q8, [%[b_ptr0]]\n" + ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" + ".word 0x6f81e135 // udot v21.4s, v9.16b, v1.4b[0]\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" + ".word 0x6f81e156 // udot v22.4s, v10.16b, v1.4b[0]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" + ".word 0x6f81e177 // udot v23.4s, v11.16b, v1.4b[0]\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + ".word 0x6fa0e190 // udot v16.4s, v12.16b, v0.4b[1]\n" + ".word 0x6fa1e194 // udot v20.4s, v12.16b, v1.4b[1]\n" + "ldr q12, [%[b_ptr0], #0x40]\n" + ".word 0x6fa0e1b1 // udot v17.4s, v13.16b, v0.4b[1]\n" + ".word 0x6fa1e1b5 // udot v21.4s, v13.16b, v1.4b[1]\n" + "ldr q13, [%[b_ptr0], #0x50]\n" + ".word 0x6fa0e1d2 // udot v18.4s, v14.16b, v0.4b[1]\n" + ".word 0x6fa1e1d6 // udot v22.4s, v14.16b, v1.4b[1]\n" + "ldr q14, [%[b_ptr0], #0x60]\n" + ".word 0x6fa0e1f3 // udot v19.4s, v15.16b, v0.4b[1]\n" + ".word 0x6fa1e1f7 // udot v23.4s, v15.16b, v1.4b[1]\n" + "ldr q15, [%[b_ptr0], #0x70]\n" + ".word 0x6f80e910 // udot v16.4s, v8.16b, v0.4b[2]\n" + "add %[b_ptr0], %[b_ptr0], #0x80\n" + ".word 0x6f81e914 // udot v20.4s, v8.16b, v1.4b[2]\n" + ".word 0x6f80e931 // udot v17.4s, v9.16b, v0.4b[2]\n" + ".word 0x6f81e935 // udot v21.4s, v9.16b, v1.4b[2]\n" + ".word 0x6f80e952 // udot v18.4s, v10.16b, v0.4b[2]\n" + ".word 0x6f81e956 // udot v22.4s, v10.16b, v1.4b[2]\n" + ".word 0x6f80e973 // udot v19.4s, v11.16b, v0.4b[2]\n" + ".word 0x6f81e977 // udot v23.4s, v11.16b, v1.4b[2]\n" + ".word 0x6fa0e990 // udot v16.4s, v12.16b, v0.4b[3]\n" + ".word 0x6fa1e994 // udot v20.4s, v12.16b, v1.4b[3]\n" + ".word 0x6fa0e9b1 // udot v17.4s, v13.16b, v0.4b[3]\n" + ".word 0x6fa1e9b5 // udot v21.4s, v13.16b, v1.4b[3]\n" + ".word 0x6fa0e9d2 // udot v18.4s, v14.16b, v0.4b[3]\n" + ".word 0x6fa1e9d6 // udot v22.4s, v14.16b, v1.4b[3]\n" + ".word 0x6fa0e9f3 // udot v19.4s, v15.16b, v0.4b[3]\n" + ".word 0x6fa1e9f7 // udot v23.4s, v15.16b, v1.4b[3]\n" + "5:\n" + "cbz %[blocks], 6f\n" + "7:\n" + "ldr q8, [%[b_ptr0]]\n" + "subs %[blocks], %[blocks], #0x1\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + "ldr s0, [%[a_ptr0]]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + "add %[a_ptr0], %[a_ptr0], #0x4\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + "add %[b_ptr0], %[b_ptr0], #0x40\n" + ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" + "ldr s1, [a_ptr1]\n" + ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" + "add a_ptr1, a_ptr1, #0x4\n" + ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" + ".word 0x6f81e114 // udot v20.4s, v8.16b, v1.4b[0]\n" + ".word 0x6f81e135 // udot v21.4s, v9.16b, v1.4b[0]\n" + ".word 0x6f81e156 // udot v22.4s, v10.16b, v1.4b[0]\n" + ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" + ".word 0x6f81e177 // udot v23.4s, v11.16b, v1.4b[0]\n" + "b.ne 7b\n" + "6:\n" + "cbz %[odds], 8f\n" + "ld1 {v0.b}[0], [%[a_ptr0]], #1\n" + "ld1 {v1.b}[0], [a_ptr1], #1\n" + "subs %[odds], %[odds], #0x1\n" + "b.eq 9f\n" + "ld1 {v0.b}[1], [%[a_ptr0]], #1\n" + "ld1 {v1.b}[1], [a_ptr1], #1\n" + "subs %[odds], %[odds], #0x1\n" + "b.eq 9f\n" + "ld1 {v0.b}[2], [%[a_ptr0]]\n" + "ld1 {v1.b}[2], [a_ptr1]\n" + "9:\n" + "ldr q8, [%[b_ptr0]]\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" + ".word 0x6f81e114 // udot v20.4s, v8.16b, v1.4b[0]\n" + ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" + ".word 0x6f81e135 // udot v21.4s, v9.16b, v1.4b[0]\n" + ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" + ".word 0x6f81e156 // udot v22.4s, v10.16b, v1.4b[0]\n" + ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" + ".word 0x6f81e177 // udot v23.4s, v11.16b, v1.4b[0]\n" + "8:\n" + "str q16, [%[c_ptr0]]\n" + "str q17, [%[c_ptr0], #0x10]\n" + "str q18, [%[c_ptr0], #0x20]\n" + "str q19, [%[c_ptr0], #0x30]\n" + "add %[c_ptr0], %[c_ptr0], #0x40\n" + "str q20, [c_ptr1]\n" + "str q21, [c_ptr1, #0x10]\n" + "str q22, [c_ptr1, #0x20]\n" + "str q23, [c_ptr1, #0x30]\n" + ".unreq a_ptr1\n" + ".unreq c_ptr1\n" + : [a_ptr0] "+r" (a_ptr0), [b_ptr0] "+r" (b_ptr0), [c_ptr0] "+r" (c_ptr0), [loops] "+r" (loops), [regs] "+r" (regs), [blocks] "+r" (blocks), [odds] "+r" (odds) + : [betaptr] "r" (betaptr), [width] "r" (width), [beta0] "r" (beta0), [lda] "r" (ldab), [ldc] "r" (ldcb) + : "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x0", "x1", "cc", "memory" ); break; case 3: __asm __volatile ( - "a_ptr1 .req X0\n" - "a_ptr2 .req X1\n" - "c_ptr1 .req X2\n" - "c_ptr2 .req X3\n" - "add a_ptr1, %[a_ptr0], %[lda]\n" - "add c_ptr1, %[c_ptr0], %[ldc]\n" - "add a_ptr2, a_ptr1, %[lda]\n" - "add c_ptr2, c_ptr1, %[ldc]\n" - "cbz %[beta0], 1f\n" - "movi v16.4s, #0\n" - "ldr q0, [%[a_ptr0]]\n" - "movi v17.4s, #0\n" - "ldr q1, [a_ptr1]\n" - "movi v18.4s, #0\n" - "ldr q2, [a_ptr2]\n" - "movi v19.4s, #0\n" - "ldr q8, [%[b_ptr0]]\n" - "movi v20.4s, #0\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - "movi v21.4s, #0\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - "movi v22.4s, #0\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - "movi v23.4s, #0\n" - "ldr q12, [%[b_ptr0], #0x40]\n" - "movi v24.4s, #0\n" - "ldr q13, [%[b_ptr0], #0x50]\n" - "movi v25.4s, #0\n" - "ldr q14, [%[b_ptr0], #0x60]\n" - "movi v26.4s, #0\n" - "add %[a_ptr0], %[a_ptr0], #0x10\n" - "movi v27.4s, #0\n" - "add a_ptr1, a_ptr1, #0x10\n" - "add a_ptr2, a_ptr2, #0x10\n" - "add %[b_ptr0], %[b_ptr0], #0x80\n" - "cbz %[loops], 2f\n" - "b 3f\n" - "1:\n" - "ld1r {v15.4s}, [%[betaptr]]\n" - "ldr q16, [%[c_ptr0]]\n" - "ldr q17, [%[c_ptr0], #0x10]\n" - "ldr q18, [%[c_ptr0], #0x20]\n" - "ldr q19, [%[c_ptr0], #0x30]\n" - "mul v16.4s, v16.4s, v15.4s\n" - "ldr q20, [c_ptr1]\n" - "mul v17.4s, v17.4s, v15.4s\n" - "ldr q21, [c_ptr1, #0x10]\n" - "mul v18.4s, v18.4s, v15.4s\n" - "ldr q22, [c_ptr1, #0x20]\n" - "mul v19.4s, v19.4s, v15.4s\n" - "ldr q23, [c_ptr1, #0x30]\n" - "mul v20.4s, v20.4s, v15.4s\n" - "ldr q24, [c_ptr2]\n" - "mul v21.4s, v21.4s, v15.4s\n" - "ldr q25, [c_ptr2, #0x10]\n" - "mul v22.4s, v22.4s, v15.4s\n" - "ldr q26, [c_ptr2, #0x20]\n" - "mul v23.4s, v23.4s, v15.4s\n" - "ldr q27, [c_ptr2, #0x30]\n" - "mul v24.4s, v24.4s, v15.4s\n" - "ldr q0, [%[a_ptr0]]\n" - "mul v25.4s, v25.4s, v15.4s\n" - "ldr q1, [a_ptr1]\n" - "mul v26.4s, v26.4s, v15.4s\n" - "ldr q2, [a_ptr2]\n" - "mul v27.4s, v27.4s, v15.4s\n" - "ldr q8, [%[b_ptr0]]\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - "add %[a_ptr0], %[a_ptr0], #0x10\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - "add a_ptr1, a_ptr1, #0x10\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - "add a_ptr2, a_ptr2, #0x10\n" - "ldr q12, [%[b_ptr0], #0x40]\n" - "ldr q13, [%[b_ptr0], #0x50]\n" - "ldr q14, [%[b_ptr0], #0x60]\n" - "add %[b_ptr0], %[b_ptr0], #0x80\n" - "cbz %[loops], 2f\n" - "3:\n" - ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" - "ldr q15, [%[b_ptr0], #-0x10]\n" - ".word 0x6f81e114 // udot v20.4s, v8.16b, v1.4b[0]\n" - "ldr q4, [%[a_ptr0]]\n" - ".word 0x6f82e118 // udot v24.4s, v8.16b, v2.4b[0]\n" - "ldr q5, [a_ptr1]\n" - ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" - "ldr q6, [a_ptr2]\n" - ".word 0x6f81e135 // udot v21.4s, v9.16b, v1.4b[0]\n" - "ldr q8, [%[b_ptr0]]\n" - ".word 0x6f82e139 // udot v25.4s, v9.16b, v2.4b[0]\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" - "subs %[loops], %[loops], #0x1\n" - ".word 0x6f81e156 // udot v22.4s, v10.16b, v1.4b[0]\n" - "prfm PLDL1KEEP, [%[a_ptr0], #0x40]\n" - ".word 0x6f82e15a // udot v26.4s, v10.16b, v2.4b[0]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" - "add %[a_ptr0], %[a_ptr0], #0x20\n" - ".word 0x6f81e177 // udot v23.4s, v11.16b, v1.4b[0]\n" - "add a_ptr1, a_ptr1, #0x20\n" - ".word 0x6f82e17b // udot v27.4s, v11.16b, v2.4b[0]\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - ".word 0x6fa0e190 // udot v16.4s, v12.16b, v0.4b[1]\n" - "add a_ptr2, a_ptr2, #0x20\n" - ".word 0x6fa1e194 // udot v20.4s, v12.16b, v1.4b[1]\n" - "prfm PLDL1KEEP, [a_ptr1, #0x40]\n" - ".word 0x6fa2e198 // udot v24.4s, v12.16b, v2.4b[1]\n" - "ldr q12, [%[b_ptr0], #0x40]\n" - ".word 0x6fa0e1b1 // udot v17.4s, v13.16b, v0.4b[1]\n" - "prfm PLDL1KEEP, [a_ptr2, #0x40]\n" - ".word 0x6fa1e1b5 // udot v21.4s, v13.16b, v1.4b[1]\n" - ".word 0x6fa2e1b9 // udot v25.4s, v13.16b, v2.4b[1]\n" - "ldr q13, [%[b_ptr0], #0x50]\n" - ".word 0x6fa0e1d2 // udot v18.4s, v14.16b, v0.4b[1]\n" - ".word 0x6fa1e1d6 // udot v22.4s, v14.16b, v1.4b[1]\n" - ".word 0x6fa2e1da // udot v26.4s, v14.16b, v2.4b[1]\n" - "ldr q14, [%[b_ptr0], #0x60]\n" - ".word 0x6fa0e1f3 // udot v19.4s, v15.16b, v0.4b[1]\n" - ".word 0x6fa1e1f7 // udot v23.4s, v15.16b, v1.4b[1]\n" - ".word 0x6fa2e1fb // udot v27.4s, v15.16b, v2.4b[1]\n" - "ldr q15, [%[b_ptr0], #0x70]\n" - ".word 0x6f80e910 // udot v16.4s, v8.16b, v0.4b[2]\n" - "add %[b_ptr0], %[b_ptr0], #0x100\n" - ".word 0x6f81e914 // udot v20.4s, v8.16b, v1.4b[2]\n" - ".word 0x6f82e918 // udot v24.4s, v8.16b, v2.4b[2]\n" - "ldr q8, [%[b_ptr0], #-0x80]\n" - ".word 0x6f80e931 // udot v17.4s, v9.16b, v0.4b[2]\n" - ".word 0x6f81e935 // udot v21.4s, v9.16b, v1.4b[2]\n" - ".word 0x6f82e939 // udot v25.4s, v9.16b, v2.4b[2]\n" - "ldr q9, [%[b_ptr0], #-0x70]\n" - ".word 0x6f80e952 // udot v18.4s, v10.16b, v0.4b[2]\n" - ".word 0x6f81e956 // udot v22.4s, v10.16b, v1.4b[2]\n" - ".word 0x6f82e95a // udot v26.4s, v10.16b, v2.4b[2]\n" - "ldr q10, [%[b_ptr0], #-0x60]\n" - ".word 0x6f80e973 // udot v19.4s, v11.16b, v0.4b[2]\n" - ".word 0x6f81e977 // udot v23.4s, v11.16b, v1.4b[2]\n" - ".word 0x6f82e97b // udot v27.4s, v11.16b, v2.4b[2]\n" - "ldr q11, [%[b_ptr0], #-0x50]\n" - ".word 0x6fa0e990 // udot v16.4s, v12.16b, v0.4b[3]\n" - ".word 0x6fa1e994 // udot v20.4s, v12.16b, v1.4b[3]\n" - ".word 0x6fa2e998 // udot v24.4s, v12.16b, v2.4b[3]\n" - "ldr q12, [%[b_ptr0], #-0x40]\n" - ".word 0x6fa0e9b1 // udot v17.4s, v13.16b, v0.4b[3]\n" - ".word 0x6fa1e9b5 // udot v21.4s, v13.16b, v1.4b[3]\n" - ".word 0x6fa2e9b9 // udot v25.4s, v13.16b, v2.4b[3]\n" - "ldr q13, [%[b_ptr0], #-0x30]\n" - ".word 0x6fa0e9d2 // udot v18.4s, v14.16b, v0.4b[3]\n" - ".word 0x6fa1e9d6 // udot v22.4s, v14.16b, v1.4b[3]\n" - ".word 0x6fa2e9da // udot v26.4s, v14.16b, v2.4b[3]\n" - "ldr q14, [%[b_ptr0], #-0x20]\n" - ".word 0x6fa0e9f3 // udot v19.4s, v15.16b, v0.4b[3]\n" - "ldr q0, [%[a_ptr0], #-0x10]\n" - ".word 0x6fa1e9f7 // udot v23.4s, v15.16b, v1.4b[3]\n" - "ldr q1, [a_ptr1, #-0x10]\n" - ".word 0x6fa2e9fb // udot v27.4s, v15.16b, v2.4b[3]\n" - "ldr q15, [%[b_ptr0], #-0x10]\n" - ".word 0x6f84e110 // udot v16.4s, v8.16b, v4.4b[0]\n" - "ldr q2, [a_ptr2, #-0x10]\n" - ".word 0x6f85e114 // udot v20.4s, v8.16b, v5.4b[0]\n" - ".word 0x6f86e118 // udot v24.4s, v8.16b, v6.4b[0]\n" - "ldr q8, [%[b_ptr0]]\n" - ".word 0x6f84e131 // udot v17.4s, v9.16b, v4.4b[0]\n" - ".word 0x6f85e135 // udot v21.4s, v9.16b, v5.4b[0]\n" - ".word 0x6f86e139 // udot v25.4s, v9.16b, v6.4b[0]\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - ".word 0x6f84e152 // udot v18.4s, v10.16b, v4.4b[0]\n" - ".word 0x6f85e156 // udot v22.4s, v10.16b, v5.4b[0]\n" - ".word 0x6f86e15a // udot v26.4s, v10.16b, v6.4b[0]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - ".word 0x6f84e173 // udot v19.4s, v11.16b, v4.4b[0]\n" - ".word 0x6f85e177 // udot v23.4s, v11.16b, v5.4b[0]\n" - ".word 0x6f86e17b // udot v27.4s, v11.16b, v6.4b[0]\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - ".word 0x6fa4e190 // udot v16.4s, v12.16b, v4.4b[1]\n" - ".word 0x6fa5e194 // udot v20.4s, v12.16b, v5.4b[1]\n" - ".word 0x6fa6e198 // udot v24.4s, v12.16b, v6.4b[1]\n" - "ldr q12, [%[b_ptr0], #0x40]\n" - ".word 0x6fa4e1b1 // udot v17.4s, v13.16b, v4.4b[1]\n" - ".word 0x6fa5e1b5 // udot v21.4s, v13.16b, v5.4b[1]\n" - ".word 0x6fa6e1b9 // udot v25.4s, v13.16b, v6.4b[1]\n" - "ldr q13, [%[b_ptr0], #0x50]\n" - ".word 0x6fa4e1d2 // udot v18.4s, v14.16b, v4.4b[1]\n" - ".word 0x6fa5e1d6 // udot v22.4s, v14.16b, v5.4b[1]\n" - ".word 0x6fa6e1da // udot v26.4s, v14.16b, v6.4b[1]\n" - "ldr q14, [%[b_ptr0], #0x60]\n" - ".word 0x6fa4e1f3 // udot v19.4s, v15.16b, v4.4b[1]\n" - ".word 0x6fa5e1f7 // udot v23.4s, v15.16b, v5.4b[1]\n" - ".word 0x6fa6e1fb // udot v27.4s, v15.16b, v6.4b[1]\n" - "ldr q15, [%[b_ptr0], #0x70]\n" - ".word 0x6f84e910 // udot v16.4s, v8.16b, v4.4b[2]\n" - "add %[b_ptr0], %[b_ptr0], #0x100\n" - ".word 0x6f85e914 // udot v20.4s, v8.16b, v5.4b[2]\n" - ".word 0x6f86e918 // udot v24.4s, v8.16b, v6.4b[2]\n" - "ldr q8, [%[b_ptr0], #-0x80]\n" - ".word 0x6f84e931 // udot v17.4s, v9.16b, v4.4b[2]\n" - ".word 0x6f85e935 // udot v21.4s, v9.16b, v5.4b[2]\n" - ".word 0x6f86e939 // udot v25.4s, v9.16b, v6.4b[2]\n" - "ldr q9, [%[b_ptr0], #-0x70]\n" - ".word 0x6f84e952 // udot v18.4s, v10.16b, v4.4b[2]\n" - ".word 0x6f85e956 // udot v22.4s, v10.16b, v5.4b[2]\n" - ".word 0x6f86e95a // udot v26.4s, v10.16b, v6.4b[2]\n" - "ldr q10, [%[b_ptr0], #-0x60]\n" - ".word 0x6f84e973 // udot v19.4s, v11.16b, v4.4b[2]\n" - ".word 0x6f85e977 // udot v23.4s, v11.16b, v5.4b[2]\n" - ".word 0x6f86e97b // udot v27.4s, v11.16b, v6.4b[2]\n" - "ldr q11, [%[b_ptr0], #-0x50]\n" - ".word 0x6fa4e990 // udot v16.4s, v12.16b, v4.4b[3]\n" - ".word 0x6fa5e994 // udot v20.4s, v12.16b, v5.4b[3]\n" - ".word 0x6fa6e998 // udot v24.4s, v12.16b, v6.4b[3]\n" - "ldr q12, [%[b_ptr0], #-0x40]\n" - ".word 0x6fa4e9b1 // udot v17.4s, v13.16b, v4.4b[3]\n" - ".word 0x6fa5e9b5 // udot v21.4s, v13.16b, v5.4b[3]\n" - ".word 0x6fa6e9b9 // udot v25.4s, v13.16b, v6.4b[3]\n" - "ldr q13, [%[b_ptr0], #-0x30]\n" - ".word 0x6fa4e9d2 // udot v18.4s, v14.16b, v4.4b[3]\n" - ".word 0x6fa5e9d6 // udot v22.4s, v14.16b, v5.4b[3]\n" - ".word 0x6fa6e9da // udot v26.4s, v14.16b, v6.4b[3]\n" - "ldr q14, [%[b_ptr0], #-0x20]\n" - ".word 0x6fa4e9f3 // udot v19.4s, v15.16b, v4.4b[3]\n" - ".word 0x6fa5e9f7 // udot v23.4s, v15.16b, v5.4b[3]\n" - ".word 0x6fa6e9fb // udot v27.4s, v15.16b, v6.4b[3]\n" - "b.ne 3b\n" - "2:\n" - "ldr q15, [%[b_ptr0], #-0x10]\n" - "prfm PSTL1KEEP, [%[c_ptr0]]\n" - "prfm PSTL1KEEP, [c_ptr1]\n" - "prfm PSTL1KEEP, [c_ptr2]\n" - "cbz %[regs], 4f\n" - ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" - "ldr q4, [%[a_ptr0]]\n" - ".word 0x6f81e114 // udot v20.4s, v8.16b, v1.4b[0]\n" - "ldr q5, [a_ptr1]\n" - ".word 0x6f82e118 // udot v24.4s, v8.16b, v2.4b[0]\n" - "ldr q6, [a_ptr2]\n" - ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" - "ldr q8, [%[b_ptr0]]\n" - ".word 0x6f81e135 // udot v21.4s, v9.16b, v1.4b[0]\n" - "add %[a_ptr0], %[a_ptr0], #0x10\n" - ".word 0x6f82e139 // udot v25.4s, v9.16b, v2.4b[0]\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" - "add a_ptr1, a_ptr1, #0x10\n" - ".word 0x6f81e156 // udot v22.4s, v10.16b, v1.4b[0]\n" - "add a_ptr2, a_ptr2, #0x10\n" - ".word 0x6f82e15a // udot v26.4s, v10.16b, v2.4b[0]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" - ".word 0x6f81e177 // udot v23.4s, v11.16b, v1.4b[0]\n" - ".word 0x6f82e17b // udot v27.4s, v11.16b, v2.4b[0]\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - ".word 0x6fa0e190 // udot v16.4s, v12.16b, v0.4b[1]\n" - ".word 0x6fa1e194 // udot v20.4s, v12.16b, v1.4b[1]\n" - ".word 0x6fa2e198 // udot v24.4s, v12.16b, v2.4b[1]\n" - "ldr q12, [%[b_ptr0], #0x40]\n" - ".word 0x6fa0e1b1 // udot v17.4s, v13.16b, v0.4b[1]\n" - ".word 0x6fa1e1b5 // udot v21.4s, v13.16b, v1.4b[1]\n" - ".word 0x6fa2e1b9 // udot v25.4s, v13.16b, v2.4b[1]\n" - "ldr q13, [%[b_ptr0], #0x50]\n" - ".word 0x6fa0e1d2 // udot v18.4s, v14.16b, v0.4b[1]\n" - ".word 0x6fa1e1d6 // udot v22.4s, v14.16b, v1.4b[1]\n" - ".word 0x6fa2e1da // udot v26.4s, v14.16b, v2.4b[1]\n" - "ldr q14, [%[b_ptr0], #0x60]\n" - ".word 0x6fa0e1f3 // udot v19.4s, v15.16b, v0.4b[1]\n" - ".word 0x6fa1e1f7 // udot v23.4s, v15.16b, v1.4b[1]\n" - ".word 0x6fa2e1fb // udot v27.4s, v15.16b, v2.4b[1]\n" - "ldr q15, [%[b_ptr0], #0x70]\n" - ".word 0x6f80e910 // udot v16.4s, v8.16b, v0.4b[2]\n" - "add %[b_ptr0], %[b_ptr0], #0x100\n" - ".word 0x6f81e914 // udot v20.4s, v8.16b, v1.4b[2]\n" - ".word 0x6f82e918 // udot v24.4s, v8.16b, v2.4b[2]\n" - "ldr q8, [%[b_ptr0], #-0x80]\n" - ".word 0x6f80e931 // udot v17.4s, v9.16b, v0.4b[2]\n" - ".word 0x6f81e935 // udot v21.4s, v9.16b, v1.4b[2]\n" - ".word 0x6f82e939 // udot v25.4s, v9.16b, v2.4b[2]\n" - "ldr q9, [%[b_ptr0], #-0x70]\n" - ".word 0x6f80e952 // udot v18.4s, v10.16b, v0.4b[2]\n" - ".word 0x6f81e956 // udot v22.4s, v10.16b, v1.4b[2]\n" - ".word 0x6f82e95a // udot v26.4s, v10.16b, v2.4b[2]\n" - "ldr q10, [%[b_ptr0], #-0x60]\n" - ".word 0x6f80e973 // udot v19.4s, v11.16b, v0.4b[2]\n" - ".word 0x6f81e977 // udot v23.4s, v11.16b, v1.4b[2]\n" - ".word 0x6f82e97b // udot v27.4s, v11.16b, v2.4b[2]\n" - "ldr q11, [%[b_ptr0], #-0x50]\n" - ".word 0x6fa0e990 // udot v16.4s, v12.16b, v0.4b[3]\n" - ".word 0x6fa1e994 // udot v20.4s, v12.16b, v1.4b[3]\n" - ".word 0x6fa2e998 // udot v24.4s, v12.16b, v2.4b[3]\n" - "ldr q12, [%[b_ptr0], #-0x40]\n" - ".word 0x6fa0e9b1 // udot v17.4s, v13.16b, v0.4b[3]\n" - ".word 0x6fa1e9b5 // udot v21.4s, v13.16b, v1.4b[3]\n" - ".word 0x6fa2e9b9 // udot v25.4s, v13.16b, v2.4b[3]\n" - "ldr q13, [%[b_ptr0], #-0x30]\n" - ".word 0x6fa0e9d2 // udot v18.4s, v14.16b, v0.4b[3]\n" - ".word 0x6fa1e9d6 // udot v22.4s, v14.16b, v1.4b[3]\n" - ".word 0x6fa2e9da // udot v26.4s, v14.16b, v2.4b[3]\n" - "ldr q14, [%[b_ptr0], #-0x20]\n" - ".word 0x6fa0e9f3 // udot v19.4s, v15.16b, v0.4b[3]\n" - ".word 0x6fa1e9f7 // udot v23.4s, v15.16b, v1.4b[3]\n" - ".word 0x6fa2e9fb // udot v27.4s, v15.16b, v2.4b[3]\n" - "ldr q15, [%[b_ptr0], #-0x10]\n" - ".word 0x6f84e110 // udot v16.4s, v8.16b, v4.4b[0]\n" - ".word 0x6f85e114 // udot v20.4s, v8.16b, v5.4b[0]\n" - ".word 0x6f86e118 // udot v24.4s, v8.16b, v6.4b[0]\n" - "ldr q8, [%[b_ptr0]]\n" - ".word 0x6f84e131 // udot v17.4s, v9.16b, v4.4b[0]\n" - ".word 0x6f85e135 // udot v21.4s, v9.16b, v5.4b[0]\n" - ".word 0x6f86e139 // udot v25.4s, v9.16b, v6.4b[0]\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - ".word 0x6f84e152 // udot v18.4s, v10.16b, v4.4b[0]\n" - ".word 0x6f85e156 // udot v22.4s, v10.16b, v5.4b[0]\n" - ".word 0x6f86e15a // udot v26.4s, v10.16b, v6.4b[0]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - ".word 0x6f84e173 // udot v19.4s, v11.16b, v4.4b[0]\n" - ".word 0x6f85e177 // udot v23.4s, v11.16b, v5.4b[0]\n" - ".word 0x6f86e17b // udot v27.4s, v11.16b, v6.4b[0]\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - ".word 0x6fa4e190 // udot v16.4s, v12.16b, v4.4b[1]\n" - ".word 0x6fa5e194 // udot v20.4s, v12.16b, v5.4b[1]\n" - ".word 0x6fa6e198 // udot v24.4s, v12.16b, v6.4b[1]\n" - "ldr q12, [%[b_ptr0], #0x40]\n" - ".word 0x6fa4e1b1 // udot v17.4s, v13.16b, v4.4b[1]\n" - ".word 0x6fa5e1b5 // udot v21.4s, v13.16b, v5.4b[1]\n" - ".word 0x6fa6e1b9 // udot v25.4s, v13.16b, v6.4b[1]\n" - "ldr q13, [%[b_ptr0], #0x50]\n" - ".word 0x6fa4e1d2 // udot v18.4s, v14.16b, v4.4b[1]\n" - ".word 0x6fa5e1d6 // udot v22.4s, v14.16b, v5.4b[1]\n" - ".word 0x6fa6e1da // udot v26.4s, v14.16b, v6.4b[1]\n" - "ldr q14, [%[b_ptr0], #0x60]\n" - ".word 0x6fa4e1f3 // udot v19.4s, v15.16b, v4.4b[1]\n" - ".word 0x6fa5e1f7 // udot v23.4s, v15.16b, v5.4b[1]\n" - ".word 0x6fa6e1fb // udot v27.4s, v15.16b, v6.4b[1]\n" - "ldr q15, [%[b_ptr0], #0x70]\n" - ".word 0x6f84e910 // udot v16.4s, v8.16b, v4.4b[2]\n" - "add %[b_ptr0], %[b_ptr0], #0x80\n" - ".word 0x6f85e914 // udot v20.4s, v8.16b, v5.4b[2]\n" - ".word 0x6f86e918 // udot v24.4s, v8.16b, v6.4b[2]\n" - ".word 0x6f84e931 // udot v17.4s, v9.16b, v4.4b[2]\n" - ".word 0x6f85e935 // udot v21.4s, v9.16b, v5.4b[2]\n" - ".word 0x6f86e939 // udot v25.4s, v9.16b, v6.4b[2]\n" - ".word 0x6f84e952 // udot v18.4s, v10.16b, v4.4b[2]\n" - ".word 0x6f85e956 // udot v22.4s, v10.16b, v5.4b[2]\n" - ".word 0x6f86e95a // udot v26.4s, v10.16b, v6.4b[2]\n" - ".word 0x6f84e973 // udot v19.4s, v11.16b, v4.4b[2]\n" - ".word 0x6f85e977 // udot v23.4s, v11.16b, v5.4b[2]\n" - ".word 0x6f86e97b // udot v27.4s, v11.16b, v6.4b[2]\n" - ".word 0x6fa4e990 // udot v16.4s, v12.16b, v4.4b[3]\n" - ".word 0x6fa5e994 // udot v20.4s, v12.16b, v5.4b[3]\n" - ".word 0x6fa6e998 // udot v24.4s, v12.16b, v6.4b[3]\n" - ".word 0x6fa4e9b1 // udot v17.4s, v13.16b, v4.4b[3]\n" - ".word 0x6fa5e9b5 // udot v21.4s, v13.16b, v5.4b[3]\n" - ".word 0x6fa6e9b9 // udot v25.4s, v13.16b, v6.4b[3]\n" - ".word 0x6fa4e9d2 // udot v18.4s, v14.16b, v4.4b[3]\n" - ".word 0x6fa5e9d6 // udot v22.4s, v14.16b, v5.4b[3]\n" - ".word 0x6fa6e9da // udot v26.4s, v14.16b, v6.4b[3]\n" - ".word 0x6fa4e9f3 // udot v19.4s, v15.16b, v4.4b[3]\n" - ".word 0x6fa5e9f7 // udot v23.4s, v15.16b, v5.4b[3]\n" - ".word 0x6fa6e9fb // udot v27.4s, v15.16b, v6.4b[3]\n" - "b 5f\n" - "4:\n" - ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" - ".word 0x6f81e114 // udot v20.4s, v8.16b, v1.4b[0]\n" - ".word 0x6f82e118 // udot v24.4s, v8.16b, v2.4b[0]\n" - "ldr q8, [%[b_ptr0]]\n" - ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" - ".word 0x6f81e135 // udot v21.4s, v9.16b, v1.4b[0]\n" - ".word 0x6f82e139 // udot v25.4s, v9.16b, v2.4b[0]\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" - ".word 0x6f81e156 // udot v22.4s, v10.16b, v1.4b[0]\n" - ".word 0x6f82e15a // udot v26.4s, v10.16b, v2.4b[0]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" - ".word 0x6f81e177 // udot v23.4s, v11.16b, v1.4b[0]\n" - ".word 0x6f82e17b // udot v27.4s, v11.16b, v2.4b[0]\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - ".word 0x6fa0e190 // udot v16.4s, v12.16b, v0.4b[1]\n" - ".word 0x6fa1e194 // udot v20.4s, v12.16b, v1.4b[1]\n" - ".word 0x6fa2e198 // udot v24.4s, v12.16b, v2.4b[1]\n" - "ldr q12, [%[b_ptr0], #0x40]\n" - ".word 0x6fa0e1b1 // udot v17.4s, v13.16b, v0.4b[1]\n" - ".word 0x6fa1e1b5 // udot v21.4s, v13.16b, v1.4b[1]\n" - ".word 0x6fa2e1b9 // udot v25.4s, v13.16b, v2.4b[1]\n" - "ldr q13, [%[b_ptr0], #0x50]\n" - ".word 0x6fa0e1d2 // udot v18.4s, v14.16b, v0.4b[1]\n" - ".word 0x6fa1e1d6 // udot v22.4s, v14.16b, v1.4b[1]\n" - ".word 0x6fa2e1da // udot v26.4s, v14.16b, v2.4b[1]\n" - "ldr q14, [%[b_ptr0], #0x60]\n" - ".word 0x6fa0e1f3 // udot v19.4s, v15.16b, v0.4b[1]\n" - ".word 0x6fa1e1f7 // udot v23.4s, v15.16b, v1.4b[1]\n" - ".word 0x6fa2e1fb // udot v27.4s, v15.16b, v2.4b[1]\n" - "ldr q15, [%[b_ptr0], #0x70]\n" - ".word 0x6f80e910 // udot v16.4s, v8.16b, v0.4b[2]\n" - "add %[b_ptr0], %[b_ptr0], #0x80\n" - ".word 0x6f81e914 // udot v20.4s, v8.16b, v1.4b[2]\n" - ".word 0x6f82e918 // udot v24.4s, v8.16b, v2.4b[2]\n" - ".word 0x6f80e931 // udot v17.4s, v9.16b, v0.4b[2]\n" - ".word 0x6f81e935 // udot v21.4s, v9.16b, v1.4b[2]\n" - ".word 0x6f82e939 // udot v25.4s, v9.16b, v2.4b[2]\n" - ".word 0x6f80e952 // udot v18.4s, v10.16b, v0.4b[2]\n" - ".word 0x6f81e956 // udot v22.4s, v10.16b, v1.4b[2]\n" - ".word 0x6f82e95a // udot v26.4s, v10.16b, v2.4b[2]\n" - ".word 0x6f80e973 // udot v19.4s, v11.16b, v0.4b[2]\n" - ".word 0x6f81e977 // udot v23.4s, v11.16b, v1.4b[2]\n" - ".word 0x6f82e97b // udot v27.4s, v11.16b, v2.4b[2]\n" - ".word 0x6fa0e990 // udot v16.4s, v12.16b, v0.4b[3]\n" - ".word 0x6fa1e994 // udot v20.4s, v12.16b, v1.4b[3]\n" - ".word 0x6fa2e998 // udot v24.4s, v12.16b, v2.4b[3]\n" - ".word 0x6fa0e9b1 // udot v17.4s, v13.16b, v0.4b[3]\n" - ".word 0x6fa1e9b5 // udot v21.4s, v13.16b, v1.4b[3]\n" - ".word 0x6fa2e9b9 // udot v25.4s, v13.16b, v2.4b[3]\n" - ".word 0x6fa0e9d2 // udot v18.4s, v14.16b, v0.4b[3]\n" - ".word 0x6fa1e9d6 // udot v22.4s, v14.16b, v1.4b[3]\n" - ".word 0x6fa2e9da // udot v26.4s, v14.16b, v2.4b[3]\n" - ".word 0x6fa0e9f3 // udot v19.4s, v15.16b, v0.4b[3]\n" - ".word 0x6fa1e9f7 // udot v23.4s, v15.16b, v1.4b[3]\n" - ".word 0x6fa2e9fb // udot v27.4s, v15.16b, v2.4b[3]\n" - "5:\n" - "cbz %[blocks], 6f\n" - "7:\n" - "ldr q8, [%[b_ptr0]]\n" - "subs %[blocks], %[blocks], #0x1\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - "ldr s0, [%[a_ptr0]]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - "add %[a_ptr0], %[a_ptr0], #0x4\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - "add %[b_ptr0], %[b_ptr0], #0x40\n" - ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" - "ldr s1, [a_ptr1]\n" - ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" - "add a_ptr1, a_ptr1, #0x4\n" - ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" - "ldr s2, [a_ptr2]\n" - ".word 0x6f81e114 // udot v20.4s, v8.16b, v1.4b[0]\n" - "add a_ptr2, a_ptr2, #0x4\n" - ".word 0x6f81e135 // udot v21.4s, v9.16b, v1.4b[0]\n" - ".word 0x6f82e118 // udot v24.4s, v8.16b, v2.4b[0]\n" - ".word 0x6f82e139 // udot v25.4s, v9.16b, v2.4b[0]\n" - ".word 0x6f81e156 // udot v22.4s, v10.16b, v1.4b[0]\n" - ".word 0x6f82e15a // udot v26.4s, v10.16b, v2.4b[0]\n" - ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" - ".word 0x6f81e177 // udot v23.4s, v11.16b, v1.4b[0]\n" - ".word 0x6f82e17b // udot v27.4s, v11.16b, v2.4b[0]\n" - "b.ne 7b\n" - "6:\n" - "cbz %[odds], 8f\n" - "ld1 {v0.b}[0], [%[a_ptr0]], #1\n" - "ld1 {v1.b}[0], [a_ptr1], #1\n" - "ld1 {v2.b}[0], [a_ptr2], #1\n" - "subs %[odds], %[odds], #0x1\n" - "b.eq 9f\n" - "ld1 {v0.b}[1], [%[a_ptr0]], #1\n" - "ld1 {v1.b}[1], [a_ptr1], #1\n" - "ld1 {v2.b}[1], [a_ptr2], #1\n" - "subs %[odds], %[odds], #0x1\n" - "b.eq 9f\n" - "ld1 {v0.b}[2], [%[a_ptr0]]\n" - "ld1 {v1.b}[2], [a_ptr1]\n" - "ld1 {v2.b}[2], [a_ptr2]\n" - "9:\n" - "ldr q8, [%[b_ptr0]]\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" - ".word 0x6f81e114 // udot v20.4s, v8.16b, v1.4b[0]\n" - ".word 0x6f82e118 // udot v24.4s, v8.16b, v2.4b[0]\n" - ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" - ".word 0x6f81e135 // udot v21.4s, v9.16b, v1.4b[0]\n" - ".word 0x6f82e139 // udot v25.4s, v9.16b, v2.4b[0]\n" - ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" - ".word 0x6f81e156 // udot v22.4s, v10.16b, v1.4b[0]\n" - ".word 0x6f82e15a // udot v26.4s, v10.16b, v2.4b[0]\n" - ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" - ".word 0x6f81e177 // udot v23.4s, v11.16b, v1.4b[0]\n" - ".word 0x6f82e17b // udot v27.4s, v11.16b, v2.4b[0]\n" - "8:\n" - "str q16, [%[c_ptr0]]\n" - "str q17, [%[c_ptr0], #0x10]\n" - "str q18, [%[c_ptr0], #0x20]\n" - "str q19, [%[c_ptr0], #0x30]\n" - "add %[c_ptr0], %[c_ptr0], #0x40\n" - "str q20, [c_ptr1]\n" - "str q21, [c_ptr1, #0x10]\n" - "str q22, [c_ptr1, #0x20]\n" - "str q23, [c_ptr1, #0x30]\n" - "str q24, [c_ptr2]\n" - "str q25, [c_ptr2, #0x10]\n" - "str q26, [c_ptr2, #0x20]\n" - "str q27, [c_ptr2, #0x30]\n" - ".unreq a_ptr1\n" - ".unreq a_ptr2\n" - ".unreq c_ptr1\n" - ".unreq c_ptr2\n" - : [a_ptr0] "+r" (a_ptr0), [b_ptr0] "+r" (b_ptr0), [c_ptr0] "+r" (c_ptr0), [loops] "+r" (loops), [regs] "+r" (regs), [blocks] "+r" (blocks), [odds] "+r" (odds) - : [betaptr] "r" (betaptr), [width] "r" (width), [beta0] "r" (beta0), [lda] "r" (ldab), [ldc] "r" (ldcb) - : "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x0", "x1", "x2", "x3", "cc", "memory" + "a_ptr1 .req X0\n" + "a_ptr2 .req X1\n" + "c_ptr1 .req X2\n" + "c_ptr2 .req X3\n" + "add a_ptr1, %[a_ptr0], %[lda]\n" + "add c_ptr1, %[c_ptr0], %[ldc]\n" + "add a_ptr2, a_ptr1, %[lda]\n" + "add c_ptr2, c_ptr1, %[ldc]\n" + "cbz %[beta0], 1f\n" + "movi v16.4s, #0\n" + "ldr q0, [%[a_ptr0]]\n" + "movi v17.4s, #0\n" + "ldr q1, [a_ptr1]\n" + "movi v18.4s, #0\n" + "ldr q2, [a_ptr2]\n" + "movi v19.4s, #0\n" + "ldr q8, [%[b_ptr0]]\n" + "movi v20.4s, #0\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + "movi v21.4s, #0\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + "movi v22.4s, #0\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + "movi v23.4s, #0\n" + "ldr q12, [%[b_ptr0], #0x40]\n" + "movi v24.4s, #0\n" + "ldr q13, [%[b_ptr0], #0x50]\n" + "movi v25.4s, #0\n" + "ldr q14, [%[b_ptr0], #0x60]\n" + "movi v26.4s, #0\n" + "add %[a_ptr0], %[a_ptr0], #0x10\n" + "movi v27.4s, #0\n" + "add a_ptr1, a_ptr1, #0x10\n" + "add a_ptr2, a_ptr2, #0x10\n" + "add %[b_ptr0], %[b_ptr0], #0x80\n" + "cbz %[loops], 2f\n" + "b 3f\n" + "1:\n" + "ld1r {v15.4s}, [%[betaptr]]\n" + "ldr q16, [%[c_ptr0]]\n" + "ldr q17, [%[c_ptr0], #0x10]\n" + "ldr q18, [%[c_ptr0], #0x20]\n" + "ldr q19, [%[c_ptr0], #0x30]\n" + "mul v16.4s, v16.4s, v15.4s\n" + "ldr q20, [c_ptr1]\n" + "mul v17.4s, v17.4s, v15.4s\n" + "ldr q21, [c_ptr1, #0x10]\n" + "mul v18.4s, v18.4s, v15.4s\n" + "ldr q22, [c_ptr1, #0x20]\n" + "mul v19.4s, v19.4s, v15.4s\n" + "ldr q23, [c_ptr1, #0x30]\n" + "mul v20.4s, v20.4s, v15.4s\n" + "ldr q24, [c_ptr2]\n" + "mul v21.4s, v21.4s, v15.4s\n" + "ldr q25, [c_ptr2, #0x10]\n" + "mul v22.4s, v22.4s, v15.4s\n" + "ldr q26, [c_ptr2, #0x20]\n" + "mul v23.4s, v23.4s, v15.4s\n" + "ldr q27, [c_ptr2, #0x30]\n" + "mul v24.4s, v24.4s, v15.4s\n" + "ldr q0, [%[a_ptr0]]\n" + "mul v25.4s, v25.4s, v15.4s\n" + "ldr q1, [a_ptr1]\n" + "mul v26.4s, v26.4s, v15.4s\n" + "ldr q2, [a_ptr2]\n" + "mul v27.4s, v27.4s, v15.4s\n" + "ldr q8, [%[b_ptr0]]\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + "add %[a_ptr0], %[a_ptr0], #0x10\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + "add a_ptr1, a_ptr1, #0x10\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + "add a_ptr2, a_ptr2, #0x10\n" + "ldr q12, [%[b_ptr0], #0x40]\n" + "ldr q13, [%[b_ptr0], #0x50]\n" + "ldr q14, [%[b_ptr0], #0x60]\n" + "add %[b_ptr0], %[b_ptr0], #0x80\n" + "cbz %[loops], 2f\n" + "3:\n" + ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" + "ldr q15, [%[b_ptr0], #-0x10]\n" + ".word 0x6f81e114 // udot v20.4s, v8.16b, v1.4b[0]\n" + "ldr q4, [%[a_ptr0]]\n" + ".word 0x6f82e118 // udot v24.4s, v8.16b, v2.4b[0]\n" + "ldr q5, [a_ptr1]\n" + ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" + "ldr q6, [a_ptr2]\n" + ".word 0x6f81e135 // udot v21.4s, v9.16b, v1.4b[0]\n" + "ldr q8, [%[b_ptr0]]\n" + ".word 0x6f82e139 // udot v25.4s, v9.16b, v2.4b[0]\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" + "subs %[loops], %[loops], #0x1\n" + ".word 0x6f81e156 // udot v22.4s, v10.16b, v1.4b[0]\n" + "prfm PLDL1KEEP, [%[a_ptr0], #0x40]\n" + ".word 0x6f82e15a // udot v26.4s, v10.16b, v2.4b[0]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" + "add %[a_ptr0], %[a_ptr0], #0x20\n" + ".word 0x6f81e177 // udot v23.4s, v11.16b, v1.4b[0]\n" + "add a_ptr1, a_ptr1, #0x20\n" + ".word 0x6f82e17b // udot v27.4s, v11.16b, v2.4b[0]\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + ".word 0x6fa0e190 // udot v16.4s, v12.16b, v0.4b[1]\n" + "add a_ptr2, a_ptr2, #0x20\n" + ".word 0x6fa1e194 // udot v20.4s, v12.16b, v1.4b[1]\n" + "prfm PLDL1KEEP, [a_ptr1, #0x40]\n" + ".word 0x6fa2e198 // udot v24.4s, v12.16b, v2.4b[1]\n" + "ldr q12, [%[b_ptr0], #0x40]\n" + ".word 0x6fa0e1b1 // udot v17.4s, v13.16b, v0.4b[1]\n" + "prfm PLDL1KEEP, [a_ptr2, #0x40]\n" + ".word 0x6fa1e1b5 // udot v21.4s, v13.16b, v1.4b[1]\n" + ".word 0x6fa2e1b9 // udot v25.4s, v13.16b, v2.4b[1]\n" + "ldr q13, [%[b_ptr0], #0x50]\n" + ".word 0x6fa0e1d2 // udot v18.4s, v14.16b, v0.4b[1]\n" + ".word 0x6fa1e1d6 // udot v22.4s, v14.16b, v1.4b[1]\n" + ".word 0x6fa2e1da // udot v26.4s, v14.16b, v2.4b[1]\n" + "ldr q14, [%[b_ptr0], #0x60]\n" + ".word 0x6fa0e1f3 // udot v19.4s, v15.16b, v0.4b[1]\n" + ".word 0x6fa1e1f7 // udot v23.4s, v15.16b, v1.4b[1]\n" + ".word 0x6fa2e1fb // udot v27.4s, v15.16b, v2.4b[1]\n" + "ldr q15, [%[b_ptr0], #0x70]\n" + ".word 0x6f80e910 // udot v16.4s, v8.16b, v0.4b[2]\n" + "add %[b_ptr0], %[b_ptr0], #0x100\n" + ".word 0x6f81e914 // udot v20.4s, v8.16b, v1.4b[2]\n" + ".word 0x6f82e918 // udot v24.4s, v8.16b, v2.4b[2]\n" + "ldr q8, [%[b_ptr0], #-0x80]\n" + ".word 0x6f80e931 // udot v17.4s, v9.16b, v0.4b[2]\n" + ".word 0x6f81e935 // udot v21.4s, v9.16b, v1.4b[2]\n" + ".word 0x6f82e939 // udot v25.4s, v9.16b, v2.4b[2]\n" + "ldr q9, [%[b_ptr0], #-0x70]\n" + ".word 0x6f80e952 // udot v18.4s, v10.16b, v0.4b[2]\n" + ".word 0x6f81e956 // udot v22.4s, v10.16b, v1.4b[2]\n" + ".word 0x6f82e95a // udot v26.4s, v10.16b, v2.4b[2]\n" + "ldr q10, [%[b_ptr0], #-0x60]\n" + ".word 0x6f80e973 // udot v19.4s, v11.16b, v0.4b[2]\n" + ".word 0x6f81e977 // udot v23.4s, v11.16b, v1.4b[2]\n" + ".word 0x6f82e97b // udot v27.4s, v11.16b, v2.4b[2]\n" + "ldr q11, [%[b_ptr0], #-0x50]\n" + ".word 0x6fa0e990 // udot v16.4s, v12.16b, v0.4b[3]\n" + ".word 0x6fa1e994 // udot v20.4s, v12.16b, v1.4b[3]\n" + ".word 0x6fa2e998 // udot v24.4s, v12.16b, v2.4b[3]\n" + "ldr q12, [%[b_ptr0], #-0x40]\n" + ".word 0x6fa0e9b1 // udot v17.4s, v13.16b, v0.4b[3]\n" + ".word 0x6fa1e9b5 // udot v21.4s, v13.16b, v1.4b[3]\n" + ".word 0x6fa2e9b9 // udot v25.4s, v13.16b, v2.4b[3]\n" + "ldr q13, [%[b_ptr0], #-0x30]\n" + ".word 0x6fa0e9d2 // udot v18.4s, v14.16b, v0.4b[3]\n" + ".word 0x6fa1e9d6 // udot v22.4s, v14.16b, v1.4b[3]\n" + ".word 0x6fa2e9da // udot v26.4s, v14.16b, v2.4b[3]\n" + "ldr q14, [%[b_ptr0], #-0x20]\n" + ".word 0x6fa0e9f3 // udot v19.4s, v15.16b, v0.4b[3]\n" + "ldr q0, [%[a_ptr0], #-0x10]\n" + ".word 0x6fa1e9f7 // udot v23.4s, v15.16b, v1.4b[3]\n" + "ldr q1, [a_ptr1, #-0x10]\n" + ".word 0x6fa2e9fb // udot v27.4s, v15.16b, v2.4b[3]\n" + "ldr q15, [%[b_ptr0], #-0x10]\n" + ".word 0x6f84e110 // udot v16.4s, v8.16b, v4.4b[0]\n" + "ldr q2, [a_ptr2, #-0x10]\n" + ".word 0x6f85e114 // udot v20.4s, v8.16b, v5.4b[0]\n" + ".word 0x6f86e118 // udot v24.4s, v8.16b, v6.4b[0]\n" + "ldr q8, [%[b_ptr0]]\n" + ".word 0x6f84e131 // udot v17.4s, v9.16b, v4.4b[0]\n" + ".word 0x6f85e135 // udot v21.4s, v9.16b, v5.4b[0]\n" + ".word 0x6f86e139 // udot v25.4s, v9.16b, v6.4b[0]\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + ".word 0x6f84e152 // udot v18.4s, v10.16b, v4.4b[0]\n" + ".word 0x6f85e156 // udot v22.4s, v10.16b, v5.4b[0]\n" + ".word 0x6f86e15a // udot v26.4s, v10.16b, v6.4b[0]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + ".word 0x6f84e173 // udot v19.4s, v11.16b, v4.4b[0]\n" + ".word 0x6f85e177 // udot v23.4s, v11.16b, v5.4b[0]\n" + ".word 0x6f86e17b // udot v27.4s, v11.16b, v6.4b[0]\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + ".word 0x6fa4e190 // udot v16.4s, v12.16b, v4.4b[1]\n" + ".word 0x6fa5e194 // udot v20.4s, v12.16b, v5.4b[1]\n" + ".word 0x6fa6e198 // udot v24.4s, v12.16b, v6.4b[1]\n" + "ldr q12, [%[b_ptr0], #0x40]\n" + ".word 0x6fa4e1b1 // udot v17.4s, v13.16b, v4.4b[1]\n" + ".word 0x6fa5e1b5 // udot v21.4s, v13.16b, v5.4b[1]\n" + ".word 0x6fa6e1b9 // udot v25.4s, v13.16b, v6.4b[1]\n" + "ldr q13, [%[b_ptr0], #0x50]\n" + ".word 0x6fa4e1d2 // udot v18.4s, v14.16b, v4.4b[1]\n" + ".word 0x6fa5e1d6 // udot v22.4s, v14.16b, v5.4b[1]\n" + ".word 0x6fa6e1da // udot v26.4s, v14.16b, v6.4b[1]\n" + "ldr q14, [%[b_ptr0], #0x60]\n" + ".word 0x6fa4e1f3 // udot v19.4s, v15.16b, v4.4b[1]\n" + ".word 0x6fa5e1f7 // udot v23.4s, v15.16b, v5.4b[1]\n" + ".word 0x6fa6e1fb // udot v27.4s, v15.16b, v6.4b[1]\n" + "ldr q15, [%[b_ptr0], #0x70]\n" + ".word 0x6f84e910 // udot v16.4s, v8.16b, v4.4b[2]\n" + "add %[b_ptr0], %[b_ptr0], #0x100\n" + ".word 0x6f85e914 // udot v20.4s, v8.16b, v5.4b[2]\n" + ".word 0x6f86e918 // udot v24.4s, v8.16b, v6.4b[2]\n" + "ldr q8, [%[b_ptr0], #-0x80]\n" + ".word 0x6f84e931 // udot v17.4s, v9.16b, v4.4b[2]\n" + ".word 0x6f85e935 // udot v21.4s, v9.16b, v5.4b[2]\n" + ".word 0x6f86e939 // udot v25.4s, v9.16b, v6.4b[2]\n" + "ldr q9, [%[b_ptr0], #-0x70]\n" + ".word 0x6f84e952 // udot v18.4s, v10.16b, v4.4b[2]\n" + ".word 0x6f85e956 // udot v22.4s, v10.16b, v5.4b[2]\n" + ".word 0x6f86e95a // udot v26.4s, v10.16b, v6.4b[2]\n" + "ldr q10, [%[b_ptr0], #-0x60]\n" + ".word 0x6f84e973 // udot v19.4s, v11.16b, v4.4b[2]\n" + ".word 0x6f85e977 // udot v23.4s, v11.16b, v5.4b[2]\n" + ".word 0x6f86e97b // udot v27.4s, v11.16b, v6.4b[2]\n" + "ldr q11, [%[b_ptr0], #-0x50]\n" + ".word 0x6fa4e990 // udot v16.4s, v12.16b, v4.4b[3]\n" + ".word 0x6fa5e994 // udot v20.4s, v12.16b, v5.4b[3]\n" + ".word 0x6fa6e998 // udot v24.4s, v12.16b, v6.4b[3]\n" + "ldr q12, [%[b_ptr0], #-0x40]\n" + ".word 0x6fa4e9b1 // udot v17.4s, v13.16b, v4.4b[3]\n" + ".word 0x6fa5e9b5 // udot v21.4s, v13.16b, v5.4b[3]\n" + ".word 0x6fa6e9b9 // udot v25.4s, v13.16b, v6.4b[3]\n" + "ldr q13, [%[b_ptr0], #-0x30]\n" + ".word 0x6fa4e9d2 // udot v18.4s, v14.16b, v4.4b[3]\n" + ".word 0x6fa5e9d6 // udot v22.4s, v14.16b, v5.4b[3]\n" + ".word 0x6fa6e9da // udot v26.4s, v14.16b, v6.4b[3]\n" + "ldr q14, [%[b_ptr0], #-0x20]\n" + ".word 0x6fa4e9f3 // udot v19.4s, v15.16b, v4.4b[3]\n" + ".word 0x6fa5e9f7 // udot v23.4s, v15.16b, v5.4b[3]\n" + ".word 0x6fa6e9fb // udot v27.4s, v15.16b, v6.4b[3]\n" + "b.ne 3b\n" + "2:\n" + "ldr q15, [%[b_ptr0], #-0x10]\n" + "prfm PSTL1KEEP, [%[c_ptr0]]\n" + "prfm PSTL1KEEP, [c_ptr1]\n" + "prfm PSTL1KEEP, [c_ptr2]\n" + "cbz %[regs], 4f\n" + ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" + "ldr q4, [%[a_ptr0]]\n" + ".word 0x6f81e114 // udot v20.4s, v8.16b, v1.4b[0]\n" + "ldr q5, [a_ptr1]\n" + ".word 0x6f82e118 // udot v24.4s, v8.16b, v2.4b[0]\n" + "ldr q6, [a_ptr2]\n" + ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" + "ldr q8, [%[b_ptr0]]\n" + ".word 0x6f81e135 // udot v21.4s, v9.16b, v1.4b[0]\n" + "add %[a_ptr0], %[a_ptr0], #0x10\n" + ".word 0x6f82e139 // udot v25.4s, v9.16b, v2.4b[0]\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" + "add a_ptr1, a_ptr1, #0x10\n" + ".word 0x6f81e156 // udot v22.4s, v10.16b, v1.4b[0]\n" + "add a_ptr2, a_ptr2, #0x10\n" + ".word 0x6f82e15a // udot v26.4s, v10.16b, v2.4b[0]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" + ".word 0x6f81e177 // udot v23.4s, v11.16b, v1.4b[0]\n" + ".word 0x6f82e17b // udot v27.4s, v11.16b, v2.4b[0]\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + ".word 0x6fa0e190 // udot v16.4s, v12.16b, v0.4b[1]\n" + ".word 0x6fa1e194 // udot v20.4s, v12.16b, v1.4b[1]\n" + ".word 0x6fa2e198 // udot v24.4s, v12.16b, v2.4b[1]\n" + "ldr q12, [%[b_ptr0], #0x40]\n" + ".word 0x6fa0e1b1 // udot v17.4s, v13.16b, v0.4b[1]\n" + ".word 0x6fa1e1b5 // udot v21.4s, v13.16b, v1.4b[1]\n" + ".word 0x6fa2e1b9 // udot v25.4s, v13.16b, v2.4b[1]\n" + "ldr q13, [%[b_ptr0], #0x50]\n" + ".word 0x6fa0e1d2 // udot v18.4s, v14.16b, v0.4b[1]\n" + ".word 0x6fa1e1d6 // udot v22.4s, v14.16b, v1.4b[1]\n" + ".word 0x6fa2e1da // udot v26.4s, v14.16b, v2.4b[1]\n" + "ldr q14, [%[b_ptr0], #0x60]\n" + ".word 0x6fa0e1f3 // udot v19.4s, v15.16b, v0.4b[1]\n" + ".word 0x6fa1e1f7 // udot v23.4s, v15.16b, v1.4b[1]\n" + ".word 0x6fa2e1fb // udot v27.4s, v15.16b, v2.4b[1]\n" + "ldr q15, [%[b_ptr0], #0x70]\n" + ".word 0x6f80e910 // udot v16.4s, v8.16b, v0.4b[2]\n" + "add %[b_ptr0], %[b_ptr0], #0x100\n" + ".word 0x6f81e914 // udot v20.4s, v8.16b, v1.4b[2]\n" + ".word 0x6f82e918 // udot v24.4s, v8.16b, v2.4b[2]\n" + "ldr q8, [%[b_ptr0], #-0x80]\n" + ".word 0x6f80e931 // udot v17.4s, v9.16b, v0.4b[2]\n" + ".word 0x6f81e935 // udot v21.4s, v9.16b, v1.4b[2]\n" + ".word 0x6f82e939 // udot v25.4s, v9.16b, v2.4b[2]\n" + "ldr q9, [%[b_ptr0], #-0x70]\n" + ".word 0x6f80e952 // udot v18.4s, v10.16b, v0.4b[2]\n" + ".word 0x6f81e956 // udot v22.4s, v10.16b, v1.4b[2]\n" + ".word 0x6f82e95a // udot v26.4s, v10.16b, v2.4b[2]\n" + "ldr q10, [%[b_ptr0], #-0x60]\n" + ".word 0x6f80e973 // udot v19.4s, v11.16b, v0.4b[2]\n" + ".word 0x6f81e977 // udot v23.4s, v11.16b, v1.4b[2]\n" + ".word 0x6f82e97b // udot v27.4s, v11.16b, v2.4b[2]\n" + "ldr q11, [%[b_ptr0], #-0x50]\n" + ".word 0x6fa0e990 // udot v16.4s, v12.16b, v0.4b[3]\n" + ".word 0x6fa1e994 // udot v20.4s, v12.16b, v1.4b[3]\n" + ".word 0x6fa2e998 // udot v24.4s, v12.16b, v2.4b[3]\n" + "ldr q12, [%[b_ptr0], #-0x40]\n" + ".word 0x6fa0e9b1 // udot v17.4s, v13.16b, v0.4b[3]\n" + ".word 0x6fa1e9b5 // udot v21.4s, v13.16b, v1.4b[3]\n" + ".word 0x6fa2e9b9 // udot v25.4s, v13.16b, v2.4b[3]\n" + "ldr q13, [%[b_ptr0], #-0x30]\n" + ".word 0x6fa0e9d2 // udot v18.4s, v14.16b, v0.4b[3]\n" + ".word 0x6fa1e9d6 // udot v22.4s, v14.16b, v1.4b[3]\n" + ".word 0x6fa2e9da // udot v26.4s, v14.16b, v2.4b[3]\n" + "ldr q14, [%[b_ptr0], #-0x20]\n" + ".word 0x6fa0e9f3 // udot v19.4s, v15.16b, v0.4b[3]\n" + ".word 0x6fa1e9f7 // udot v23.4s, v15.16b, v1.4b[3]\n" + ".word 0x6fa2e9fb // udot v27.4s, v15.16b, v2.4b[3]\n" + "ldr q15, [%[b_ptr0], #-0x10]\n" + ".word 0x6f84e110 // udot v16.4s, v8.16b, v4.4b[0]\n" + ".word 0x6f85e114 // udot v20.4s, v8.16b, v5.4b[0]\n" + ".word 0x6f86e118 // udot v24.4s, v8.16b, v6.4b[0]\n" + "ldr q8, [%[b_ptr0]]\n" + ".word 0x6f84e131 // udot v17.4s, v9.16b, v4.4b[0]\n" + ".word 0x6f85e135 // udot v21.4s, v9.16b, v5.4b[0]\n" + ".word 0x6f86e139 // udot v25.4s, v9.16b, v6.4b[0]\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + ".word 0x6f84e152 // udot v18.4s, v10.16b, v4.4b[0]\n" + ".word 0x6f85e156 // udot v22.4s, v10.16b, v5.4b[0]\n" + ".word 0x6f86e15a // udot v26.4s, v10.16b, v6.4b[0]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + ".word 0x6f84e173 // udot v19.4s, v11.16b, v4.4b[0]\n" + ".word 0x6f85e177 // udot v23.4s, v11.16b, v5.4b[0]\n" + ".word 0x6f86e17b // udot v27.4s, v11.16b, v6.4b[0]\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + ".word 0x6fa4e190 // udot v16.4s, v12.16b, v4.4b[1]\n" + ".word 0x6fa5e194 // udot v20.4s, v12.16b, v5.4b[1]\n" + ".word 0x6fa6e198 // udot v24.4s, v12.16b, v6.4b[1]\n" + "ldr q12, [%[b_ptr0], #0x40]\n" + ".word 0x6fa4e1b1 // udot v17.4s, v13.16b, v4.4b[1]\n" + ".word 0x6fa5e1b5 // udot v21.4s, v13.16b, v5.4b[1]\n" + ".word 0x6fa6e1b9 // udot v25.4s, v13.16b, v6.4b[1]\n" + "ldr q13, [%[b_ptr0], #0x50]\n" + ".word 0x6fa4e1d2 // udot v18.4s, v14.16b, v4.4b[1]\n" + ".word 0x6fa5e1d6 // udot v22.4s, v14.16b, v5.4b[1]\n" + ".word 0x6fa6e1da // udot v26.4s, v14.16b, v6.4b[1]\n" + "ldr q14, [%[b_ptr0], #0x60]\n" + ".word 0x6fa4e1f3 // udot v19.4s, v15.16b, v4.4b[1]\n" + ".word 0x6fa5e1f7 // udot v23.4s, v15.16b, v5.4b[1]\n" + ".word 0x6fa6e1fb // udot v27.4s, v15.16b, v6.4b[1]\n" + "ldr q15, [%[b_ptr0], #0x70]\n" + ".word 0x6f84e910 // udot v16.4s, v8.16b, v4.4b[2]\n" + "add %[b_ptr0], %[b_ptr0], #0x80\n" + ".word 0x6f85e914 // udot v20.4s, v8.16b, v5.4b[2]\n" + ".word 0x6f86e918 // udot v24.4s, v8.16b, v6.4b[2]\n" + ".word 0x6f84e931 // udot v17.4s, v9.16b, v4.4b[2]\n" + ".word 0x6f85e935 // udot v21.4s, v9.16b, v5.4b[2]\n" + ".word 0x6f86e939 // udot v25.4s, v9.16b, v6.4b[2]\n" + ".word 0x6f84e952 // udot v18.4s, v10.16b, v4.4b[2]\n" + ".word 0x6f85e956 // udot v22.4s, v10.16b, v5.4b[2]\n" + ".word 0x6f86e95a // udot v26.4s, v10.16b, v6.4b[2]\n" + ".word 0x6f84e973 // udot v19.4s, v11.16b, v4.4b[2]\n" + ".word 0x6f85e977 // udot v23.4s, v11.16b, v5.4b[2]\n" + ".word 0x6f86e97b // udot v27.4s, v11.16b, v6.4b[2]\n" + ".word 0x6fa4e990 // udot v16.4s, v12.16b, v4.4b[3]\n" + ".word 0x6fa5e994 // udot v20.4s, v12.16b, v5.4b[3]\n" + ".word 0x6fa6e998 // udot v24.4s, v12.16b, v6.4b[3]\n" + ".word 0x6fa4e9b1 // udot v17.4s, v13.16b, v4.4b[3]\n" + ".word 0x6fa5e9b5 // udot v21.4s, v13.16b, v5.4b[3]\n" + ".word 0x6fa6e9b9 // udot v25.4s, v13.16b, v6.4b[3]\n" + ".word 0x6fa4e9d2 // udot v18.4s, v14.16b, v4.4b[3]\n" + ".word 0x6fa5e9d6 // udot v22.4s, v14.16b, v5.4b[3]\n" + ".word 0x6fa6e9da // udot v26.4s, v14.16b, v6.4b[3]\n" + ".word 0x6fa4e9f3 // udot v19.4s, v15.16b, v4.4b[3]\n" + ".word 0x6fa5e9f7 // udot v23.4s, v15.16b, v5.4b[3]\n" + ".word 0x6fa6e9fb // udot v27.4s, v15.16b, v6.4b[3]\n" + "b 5f\n" + "4:\n" + ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" + ".word 0x6f81e114 // udot v20.4s, v8.16b, v1.4b[0]\n" + ".word 0x6f82e118 // udot v24.4s, v8.16b, v2.4b[0]\n" + "ldr q8, [%[b_ptr0]]\n" + ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" + ".word 0x6f81e135 // udot v21.4s, v9.16b, v1.4b[0]\n" + ".word 0x6f82e139 // udot v25.4s, v9.16b, v2.4b[0]\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" + ".word 0x6f81e156 // udot v22.4s, v10.16b, v1.4b[0]\n" + ".word 0x6f82e15a // udot v26.4s, v10.16b, v2.4b[0]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" + ".word 0x6f81e177 // udot v23.4s, v11.16b, v1.4b[0]\n" + ".word 0x6f82e17b // udot v27.4s, v11.16b, v2.4b[0]\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + ".word 0x6fa0e190 // udot v16.4s, v12.16b, v0.4b[1]\n" + ".word 0x6fa1e194 // udot v20.4s, v12.16b, v1.4b[1]\n" + ".word 0x6fa2e198 // udot v24.4s, v12.16b, v2.4b[1]\n" + "ldr q12, [%[b_ptr0], #0x40]\n" + ".word 0x6fa0e1b1 // udot v17.4s, v13.16b, v0.4b[1]\n" + ".word 0x6fa1e1b5 // udot v21.4s, v13.16b, v1.4b[1]\n" + ".word 0x6fa2e1b9 // udot v25.4s, v13.16b, v2.4b[1]\n" + "ldr q13, [%[b_ptr0], #0x50]\n" + ".word 0x6fa0e1d2 // udot v18.4s, v14.16b, v0.4b[1]\n" + ".word 0x6fa1e1d6 // udot v22.4s, v14.16b, v1.4b[1]\n" + ".word 0x6fa2e1da // udot v26.4s, v14.16b, v2.4b[1]\n" + "ldr q14, [%[b_ptr0], #0x60]\n" + ".word 0x6fa0e1f3 // udot v19.4s, v15.16b, v0.4b[1]\n" + ".word 0x6fa1e1f7 // udot v23.4s, v15.16b, v1.4b[1]\n" + ".word 0x6fa2e1fb // udot v27.4s, v15.16b, v2.4b[1]\n" + "ldr q15, [%[b_ptr0], #0x70]\n" + ".word 0x6f80e910 // udot v16.4s, v8.16b, v0.4b[2]\n" + "add %[b_ptr0], %[b_ptr0], #0x80\n" + ".word 0x6f81e914 // udot v20.4s, v8.16b, v1.4b[2]\n" + ".word 0x6f82e918 // udot v24.4s, v8.16b, v2.4b[2]\n" + ".word 0x6f80e931 // udot v17.4s, v9.16b, v0.4b[2]\n" + ".word 0x6f81e935 // udot v21.4s, v9.16b, v1.4b[2]\n" + ".word 0x6f82e939 // udot v25.4s, v9.16b, v2.4b[2]\n" + ".word 0x6f80e952 // udot v18.4s, v10.16b, v0.4b[2]\n" + ".word 0x6f81e956 // udot v22.4s, v10.16b, v1.4b[2]\n" + ".word 0x6f82e95a // udot v26.4s, v10.16b, v2.4b[2]\n" + ".word 0x6f80e973 // udot v19.4s, v11.16b, v0.4b[2]\n" + ".word 0x6f81e977 // udot v23.4s, v11.16b, v1.4b[2]\n" + ".word 0x6f82e97b // udot v27.4s, v11.16b, v2.4b[2]\n" + ".word 0x6fa0e990 // udot v16.4s, v12.16b, v0.4b[3]\n" + ".word 0x6fa1e994 // udot v20.4s, v12.16b, v1.4b[3]\n" + ".word 0x6fa2e998 // udot v24.4s, v12.16b, v2.4b[3]\n" + ".word 0x6fa0e9b1 // udot v17.4s, v13.16b, v0.4b[3]\n" + ".word 0x6fa1e9b5 // udot v21.4s, v13.16b, v1.4b[3]\n" + ".word 0x6fa2e9b9 // udot v25.4s, v13.16b, v2.4b[3]\n" + ".word 0x6fa0e9d2 // udot v18.4s, v14.16b, v0.4b[3]\n" + ".word 0x6fa1e9d6 // udot v22.4s, v14.16b, v1.4b[3]\n" + ".word 0x6fa2e9da // udot v26.4s, v14.16b, v2.4b[3]\n" + ".word 0x6fa0e9f3 // udot v19.4s, v15.16b, v0.4b[3]\n" + ".word 0x6fa1e9f7 // udot v23.4s, v15.16b, v1.4b[3]\n" + ".word 0x6fa2e9fb // udot v27.4s, v15.16b, v2.4b[3]\n" + "5:\n" + "cbz %[blocks], 6f\n" + "7:\n" + "ldr q8, [%[b_ptr0]]\n" + "subs %[blocks], %[blocks], #0x1\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + "ldr s0, [%[a_ptr0]]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + "add %[a_ptr0], %[a_ptr0], #0x4\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + "add %[b_ptr0], %[b_ptr0], #0x40\n" + ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" + "ldr s1, [a_ptr1]\n" + ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" + "add a_ptr1, a_ptr1, #0x4\n" + ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" + "ldr s2, [a_ptr2]\n" + ".word 0x6f81e114 // udot v20.4s, v8.16b, v1.4b[0]\n" + "add a_ptr2, a_ptr2, #0x4\n" + ".word 0x6f81e135 // udot v21.4s, v9.16b, v1.4b[0]\n" + ".word 0x6f82e118 // udot v24.4s, v8.16b, v2.4b[0]\n" + ".word 0x6f82e139 // udot v25.4s, v9.16b, v2.4b[0]\n" + ".word 0x6f81e156 // udot v22.4s, v10.16b, v1.4b[0]\n" + ".word 0x6f82e15a // udot v26.4s, v10.16b, v2.4b[0]\n" + ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" + ".word 0x6f81e177 // udot v23.4s, v11.16b, v1.4b[0]\n" + ".word 0x6f82e17b // udot v27.4s, v11.16b, v2.4b[0]\n" + "b.ne 7b\n" + "6:\n" + "cbz %[odds], 8f\n" + "ld1 {v0.b}[0], [%[a_ptr0]], #1\n" + "ld1 {v1.b}[0], [a_ptr1], #1\n" + "ld1 {v2.b}[0], [a_ptr2], #1\n" + "subs %[odds], %[odds], #0x1\n" + "b.eq 9f\n" + "ld1 {v0.b}[1], [%[a_ptr0]], #1\n" + "ld1 {v1.b}[1], [a_ptr1], #1\n" + "ld1 {v2.b}[1], [a_ptr2], #1\n" + "subs %[odds], %[odds], #0x1\n" + "b.eq 9f\n" + "ld1 {v0.b}[2], [%[a_ptr0]]\n" + "ld1 {v1.b}[2], [a_ptr1]\n" + "ld1 {v2.b}[2], [a_ptr2]\n" + "9:\n" + "ldr q8, [%[b_ptr0]]\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" + ".word 0x6f81e114 // udot v20.4s, v8.16b, v1.4b[0]\n" + ".word 0x6f82e118 // udot v24.4s, v8.16b, v2.4b[0]\n" + ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" + ".word 0x6f81e135 // udot v21.4s, v9.16b, v1.4b[0]\n" + ".word 0x6f82e139 // udot v25.4s, v9.16b, v2.4b[0]\n" + ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" + ".word 0x6f81e156 // udot v22.4s, v10.16b, v1.4b[0]\n" + ".word 0x6f82e15a // udot v26.4s, v10.16b, v2.4b[0]\n" + ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" + ".word 0x6f81e177 // udot v23.4s, v11.16b, v1.4b[0]\n" + ".word 0x6f82e17b // udot v27.4s, v11.16b, v2.4b[0]\n" + "8:\n" + "str q16, [%[c_ptr0]]\n" + "str q17, [%[c_ptr0], #0x10]\n" + "str q18, [%[c_ptr0], #0x20]\n" + "str q19, [%[c_ptr0], #0x30]\n" + "add %[c_ptr0], %[c_ptr0], #0x40\n" + "str q20, [c_ptr1]\n" + "str q21, [c_ptr1, #0x10]\n" + "str q22, [c_ptr1, #0x20]\n" + "str q23, [c_ptr1, #0x30]\n" + "str q24, [c_ptr2]\n" + "str q25, [c_ptr2, #0x10]\n" + "str q26, [c_ptr2, #0x20]\n" + "str q27, [c_ptr2, #0x30]\n" + ".unreq a_ptr1\n" + ".unreq a_ptr2\n" + ".unreq c_ptr1\n" + ".unreq c_ptr2\n" + : [a_ptr0] "+r" (a_ptr0), [b_ptr0] "+r" (b_ptr0), [c_ptr0] "+r" (c_ptr0), [loops] "+r" (loops), [regs] "+r" (regs), [blocks] "+r" (blocks), [odds] "+r" (odds) + : [betaptr] "r" (betaptr), [width] "r" (width), [beta0] "r" (beta0), [lda] "r" (ldab), [ldc] "r" (ldcb) + : "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x0", "x1", "x2", "x3", "cc", "memory" ); break; default: case 4: __asm __volatile ( - "a_ptr1 .req X0\n" - "a_ptr2 .req X1\n" - "a_ptr3 .req X2\n" - "c_ptr1 .req X3\n" - "c_ptr2 .req X4\n" - "c_ptr3 .req X5\n" - "add a_ptr1, %[a_ptr0], %[lda]\n" - "add c_ptr1, %[c_ptr0], %[ldc]\n" - "add a_ptr2, a_ptr1, %[lda]\n" - "add c_ptr2, c_ptr1, %[ldc]\n" - "add a_ptr3, a_ptr2, %[lda]\n" - "add c_ptr3, c_ptr2, %[ldc]\n" - "cbz %[beta0], 1f\n" - "movi v16.4s, #0\n" - "ldr q0, [%[a_ptr0]]\n" - "movi v17.4s, #0\n" - "ldr q1, [a_ptr1]\n" - "movi v18.4s, #0\n" - "ldr q2, [a_ptr2]\n" - "movi v19.4s, #0\n" - "ldr q3, [a_ptr3]\n" - "movi v20.4s, #0\n" - "ldr q8, [%[b_ptr0]]\n" - "movi v21.4s, #0\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - "movi v22.4s, #0\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - "movi v23.4s, #0\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - "movi v24.4s, #0\n" - "ldr q12, [%[b_ptr0], #0x40]\n" - "movi v25.4s, #0\n" - "ldr q13, [%[b_ptr0], #0x50]\n" - "movi v26.4s, #0\n" - "ldr q14, [%[b_ptr0], #0x60]\n" - "movi v27.4s, #0\n" - "add %[a_ptr0], %[a_ptr0], #0x10\n" - "movi v28.4s, #0\n" - "add a_ptr1, a_ptr1, #0x10\n" - "movi v29.4s, #0\n" - "add a_ptr2, a_ptr2, #0x10\n" - "movi v30.4s, #0\n" - "add a_ptr3, a_ptr3, #0x10\n" - "movi v31.4s, #0\n" - "add %[b_ptr0], %[b_ptr0], #0x80\n" - "cbz %[loops], 2f\n" - "b 3f\n" - "1:\n" - "ld1r {v15.4s}, [%[betaptr]]\n" - "ldr q16, [%[c_ptr0]]\n" - "ldr q17, [%[c_ptr0], #0x10]\n" - "ldr q18, [%[c_ptr0], #0x20]\n" - "ldr q19, [%[c_ptr0], #0x30]\n" - "mul v16.4s, v16.4s, v15.4s\n" - "ldr q20, [c_ptr1]\n" - "mul v17.4s, v17.4s, v15.4s\n" - "ldr q21, [c_ptr1, #0x10]\n" - "mul v18.4s, v18.4s, v15.4s\n" - "ldr q22, [c_ptr1, #0x20]\n" - "mul v19.4s, v19.4s, v15.4s\n" - "ldr q23, [c_ptr1, #0x30]\n" - "mul v20.4s, v20.4s, v15.4s\n" - "ldr q24, [c_ptr2]\n" - "mul v21.4s, v21.4s, v15.4s\n" - "ldr q25, [c_ptr2, #0x10]\n" - "mul v22.4s, v22.4s, v15.4s\n" - "ldr q26, [c_ptr2, #0x20]\n" - "mul v23.4s, v23.4s, v15.4s\n" - "ldr q27, [c_ptr2, #0x30]\n" - "mul v24.4s, v24.4s, v15.4s\n" - "ldr q28, [c_ptr3]\n" - "mul v25.4s, v25.4s, v15.4s\n" - "ldr q29, [c_ptr3, #0x10]\n" - "mul v26.4s, v26.4s, v15.4s\n" - "ldr q30, [c_ptr3, #0x20]\n" - "mul v27.4s, v27.4s, v15.4s\n" - "ldr q31, [c_ptr3, #0x30]\n" - "mul v28.4s, v28.4s, v15.4s\n" - "ldr q0, [%[a_ptr0]]\n" - "mul v29.4s, v29.4s, v15.4s\n" - "ldr q1, [a_ptr1]\n" - "mul v30.4s, v30.4s, v15.4s\n" - "ldr q2, [a_ptr2]\n" - "mul v31.4s, v31.4s, v15.4s\n" - "ldr q3, [a_ptr3]\n" - "ldr q8, [%[b_ptr0]]\n" - "add %[a_ptr0], %[a_ptr0], #0x10\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - "add a_ptr1, a_ptr1, #0x10\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - "add a_ptr2, a_ptr2, #0x10\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - "add a_ptr3, a_ptr3, #0x10\n" - "ldr q12, [%[b_ptr0], #0x40]\n" - "ldr q13, [%[b_ptr0], #0x50]\n" - "ldr q14, [%[b_ptr0], #0x60]\n" - "add %[b_ptr0], %[b_ptr0], #0x80\n" - "cbz %[loops], 2f\n" - "3:\n" - ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" - "ldr q15, [%[b_ptr0], #-0x10]\n" - ".word 0x6f81e114 // udot v20.4s, v8.16b, v1.4b[0]\n" - "ldr q4, [%[a_ptr0]]\n" - ".word 0x6f82e118 // udot v24.4s, v8.16b, v2.4b[0]\n" - "ldr q5, [a_ptr1]\n" - ".word 0x6f83e11c // udot v28.4s, v8.16b, v3.4b[0]\n" - "ldr q6, [a_ptr2]\n" - ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" - "ldr q7, [a_ptr3]\n" - ".word 0x6f81e135 // udot v21.4s, v9.16b, v1.4b[0]\n" - "ldr q8, [%[b_ptr0]]\n" - ".word 0x6f82e139 // udot v25.4s, v9.16b, v2.4b[0]\n" - "subs %[loops], %[loops], #0x1\n" - ".word 0x6f83e13d // udot v29.4s, v9.16b, v3.4b[0]\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" - "prfm PLDL1KEEP, [%[a_ptr0], #0x40]\n" - ".word 0x6f81e156 // udot v22.4s, v10.16b, v1.4b[0]\n" - "add %[a_ptr0], %[a_ptr0], #0x20\n" - ".word 0x6f82e15a // udot v26.4s, v10.16b, v2.4b[0]\n" - "add a_ptr1, a_ptr1, #0x20\n" - ".word 0x6f83e15e // udot v30.4s, v10.16b, v3.4b[0]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" - "add a_ptr2, a_ptr2, #0x20\n" - ".word 0x6f81e177 // udot v23.4s, v11.16b, v1.4b[0]\n" - "add a_ptr3, a_ptr3, #0x20\n" - ".word 0x6f82e17b // udot v27.4s, v11.16b, v2.4b[0]\n" - "prfm PLDL1KEEP, [a_ptr1, #0x40]\n" - ".word 0x6f83e17f // udot v31.4s, v11.16b, v3.4b[0]\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - ".word 0x6fa0e190 // udot v16.4s, v12.16b, v0.4b[1]\n" - "prfm PLDL1KEEP, [a_ptr2, #0x40]\n" - ".word 0x6fa1e194 // udot v20.4s, v12.16b, v1.4b[1]\n" - "prfm PLDL1KEEP, [a_ptr3, #0x40]\n" - ".word 0x6fa2e198 // udot v24.4s, v12.16b, v2.4b[1]\n" - ".word 0x6fa3e19c // udot v28.4s, v12.16b, v3.4b[1]\n" - "ldr q12, [%[b_ptr0], #0x40]\n" - ".word 0x6fa0e1b1 // udot v17.4s, v13.16b, v0.4b[1]\n" - ".word 0x6fa1e1b5 // udot v21.4s, v13.16b, v1.4b[1]\n" - ".word 0x6fa2e1b9 // udot v25.4s, v13.16b, v2.4b[1]\n" - ".word 0x6fa3e1bd // udot v29.4s, v13.16b, v3.4b[1]\n" - "ldr q13, [%[b_ptr0], #0x50]\n" - ".word 0x6fa0e1d2 // udot v18.4s, v14.16b, v0.4b[1]\n" - ".word 0x6fa1e1d6 // udot v22.4s, v14.16b, v1.4b[1]\n" - ".word 0x6fa2e1da // udot v26.4s, v14.16b, v2.4b[1]\n" - ".word 0x6fa3e1de // udot v30.4s, v14.16b, v3.4b[1]\n" - "ldr q14, [%[b_ptr0], #0x60]\n" - ".word 0x6fa0e1f3 // udot v19.4s, v15.16b, v0.4b[1]\n" - ".word 0x6fa1e1f7 // udot v23.4s, v15.16b, v1.4b[1]\n" - ".word 0x6fa2e1fb // udot v27.4s, v15.16b, v2.4b[1]\n" - ".word 0x6fa3e1ff // udot v31.4s, v15.16b, v3.4b[1]\n" - "ldr q15, [%[b_ptr0], #0x70]\n" - ".word 0x6f80e910 // udot v16.4s, v8.16b, v0.4b[2]\n" - "add %[b_ptr0], %[b_ptr0], #0x100\n" - ".word 0x6f81e914 // udot v20.4s, v8.16b, v1.4b[2]\n" - ".word 0x6f82e918 // udot v24.4s, v8.16b, v2.4b[2]\n" - ".word 0x6f83e91c // udot v28.4s, v8.16b, v3.4b[2]\n" - "ldr q8, [%[b_ptr0], #-0x80]\n" - ".word 0x6f80e931 // udot v17.4s, v9.16b, v0.4b[2]\n" - ".word 0x6f81e935 // udot v21.4s, v9.16b, v1.4b[2]\n" - ".word 0x6f82e939 // udot v25.4s, v9.16b, v2.4b[2]\n" - ".word 0x6f83e93d // udot v29.4s, v9.16b, v3.4b[2]\n" - "ldr q9, [%[b_ptr0], #-0x70]\n" - ".word 0x6f80e952 // udot v18.4s, v10.16b, v0.4b[2]\n" - ".word 0x6f81e956 // udot v22.4s, v10.16b, v1.4b[2]\n" - ".word 0x6f82e95a // udot v26.4s, v10.16b, v2.4b[2]\n" - ".word 0x6f83e95e // udot v30.4s, v10.16b, v3.4b[2]\n" - "ldr q10, [%[b_ptr0], #-0x60]\n" - ".word 0x6f80e973 // udot v19.4s, v11.16b, v0.4b[2]\n" - ".word 0x6f81e977 // udot v23.4s, v11.16b, v1.4b[2]\n" - ".word 0x6f82e97b // udot v27.4s, v11.16b, v2.4b[2]\n" - ".word 0x6f83e97f // udot v31.4s, v11.16b, v3.4b[2]\n" - "ldr q11, [%[b_ptr0], #-0x50]\n" - ".word 0x6fa0e990 // udot v16.4s, v12.16b, v0.4b[3]\n" - ".word 0x6fa1e994 // udot v20.4s, v12.16b, v1.4b[3]\n" - ".word 0x6fa2e998 // udot v24.4s, v12.16b, v2.4b[3]\n" - ".word 0x6fa3e99c // udot v28.4s, v12.16b, v3.4b[3]\n" - "ldr q12, [%[b_ptr0], #-0x40]\n" - ".word 0x6fa0e9b1 // udot v17.4s, v13.16b, v0.4b[3]\n" - ".word 0x6fa1e9b5 // udot v21.4s, v13.16b, v1.4b[3]\n" - ".word 0x6fa2e9b9 // udot v25.4s, v13.16b, v2.4b[3]\n" - ".word 0x6fa3e9bd // udot v29.4s, v13.16b, v3.4b[3]\n" - "ldr q13, [%[b_ptr0], #-0x30]\n" - ".word 0x6fa0e9d2 // udot v18.4s, v14.16b, v0.4b[3]\n" - ".word 0x6fa1e9d6 // udot v22.4s, v14.16b, v1.4b[3]\n" - ".word 0x6fa2e9da // udot v26.4s, v14.16b, v2.4b[3]\n" - ".word 0x6fa3e9de // udot v30.4s, v14.16b, v3.4b[3]\n" - "ldr q14, [%[b_ptr0], #-0x20]\n" - ".word 0x6fa0e9f3 // udot v19.4s, v15.16b, v0.4b[3]\n" - "ldr q0, [%[a_ptr0], #-0x10]\n" - ".word 0x6fa1e9f7 // udot v23.4s, v15.16b, v1.4b[3]\n" - "ldr q1, [a_ptr1, #-0x10]\n" - ".word 0x6fa2e9fb // udot v27.4s, v15.16b, v2.4b[3]\n" - "ldr q2, [a_ptr2, #-0x10]\n" - ".word 0x6fa3e9ff // udot v31.4s, v15.16b, v3.4b[3]\n" - "ldr q15, [%[b_ptr0], #-0x10]\n" - ".word 0x6f84e110 // udot v16.4s, v8.16b, v4.4b[0]\n" - "ldr q3, [a_ptr3, #-0x10]\n" - ".word 0x6f85e114 // udot v20.4s, v8.16b, v5.4b[0]\n" - ".word 0x6f86e118 // udot v24.4s, v8.16b, v6.4b[0]\n" - ".word 0x6f87e11c // udot v28.4s, v8.16b, v7.4b[0]\n" - "ldr q8, [%[b_ptr0]]\n" - ".word 0x6f84e131 // udot v17.4s, v9.16b, v4.4b[0]\n" - ".word 0x6f85e135 // udot v21.4s, v9.16b, v5.4b[0]\n" - ".word 0x6f86e139 // udot v25.4s, v9.16b, v6.4b[0]\n" - ".word 0x6f87e13d // udot v29.4s, v9.16b, v7.4b[0]\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - ".word 0x6f84e152 // udot v18.4s, v10.16b, v4.4b[0]\n" - ".word 0x6f85e156 // udot v22.4s, v10.16b, v5.4b[0]\n" - ".word 0x6f86e15a // udot v26.4s, v10.16b, v6.4b[0]\n" - ".word 0x6f87e15e // udot v30.4s, v10.16b, v7.4b[0]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - ".word 0x6f84e173 // udot v19.4s, v11.16b, v4.4b[0]\n" - ".word 0x6f85e177 // udot v23.4s, v11.16b, v5.4b[0]\n" - ".word 0x6f86e17b // udot v27.4s, v11.16b, v6.4b[0]\n" - ".word 0x6f87e17f // udot v31.4s, v11.16b, v7.4b[0]\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - ".word 0x6fa4e190 // udot v16.4s, v12.16b, v4.4b[1]\n" - ".word 0x6fa5e194 // udot v20.4s, v12.16b, v5.4b[1]\n" - ".word 0x6fa6e198 // udot v24.4s, v12.16b, v6.4b[1]\n" - ".word 0x6fa7e19c // udot v28.4s, v12.16b, v7.4b[1]\n" - "ldr q12, [%[b_ptr0], #0x40]\n" - ".word 0x6fa4e1b1 // udot v17.4s, v13.16b, v4.4b[1]\n" - ".word 0x6fa5e1b5 // udot v21.4s, v13.16b, v5.4b[1]\n" - ".word 0x6fa6e1b9 // udot v25.4s, v13.16b, v6.4b[1]\n" - ".word 0x6fa7e1bd // udot v29.4s, v13.16b, v7.4b[1]\n" - "ldr q13, [%[b_ptr0], #0x50]\n" - ".word 0x6fa4e1d2 // udot v18.4s, v14.16b, v4.4b[1]\n" - ".word 0x6fa5e1d6 // udot v22.4s, v14.16b, v5.4b[1]\n" - ".word 0x6fa6e1da // udot v26.4s, v14.16b, v6.4b[1]\n" - ".word 0x6fa7e1de // udot v30.4s, v14.16b, v7.4b[1]\n" - "ldr q14, [%[b_ptr0], #0x60]\n" - ".word 0x6fa4e1f3 // udot v19.4s, v15.16b, v4.4b[1]\n" - ".word 0x6fa5e1f7 // udot v23.4s, v15.16b, v5.4b[1]\n" - ".word 0x6fa6e1fb // udot v27.4s, v15.16b, v6.4b[1]\n" - ".word 0x6fa7e1ff // udot v31.4s, v15.16b, v7.4b[1]\n" - "ldr q15, [%[b_ptr0], #0x70]\n" - ".word 0x6f84e910 // udot v16.4s, v8.16b, v4.4b[2]\n" - "add %[b_ptr0], %[b_ptr0], #0x100\n" - ".word 0x6f85e914 // udot v20.4s, v8.16b, v5.4b[2]\n" - ".word 0x6f86e918 // udot v24.4s, v8.16b, v6.4b[2]\n" - ".word 0x6f87e91c // udot v28.4s, v8.16b, v7.4b[2]\n" - "ldr q8, [%[b_ptr0], #-0x80]\n" - ".word 0x6f84e931 // udot v17.4s, v9.16b, v4.4b[2]\n" - ".word 0x6f85e935 // udot v21.4s, v9.16b, v5.4b[2]\n" - ".word 0x6f86e939 // udot v25.4s, v9.16b, v6.4b[2]\n" - ".word 0x6f87e93d // udot v29.4s, v9.16b, v7.4b[2]\n" - "ldr q9, [%[b_ptr0], #-0x70]\n" - ".word 0x6f84e952 // udot v18.4s, v10.16b, v4.4b[2]\n" - ".word 0x6f85e956 // udot v22.4s, v10.16b, v5.4b[2]\n" - ".word 0x6f86e95a // udot v26.4s, v10.16b, v6.4b[2]\n" - ".word 0x6f87e95e // udot v30.4s, v10.16b, v7.4b[2]\n" - "ldr q10, [%[b_ptr0], #-0x60]\n" - ".word 0x6f84e973 // udot v19.4s, v11.16b, v4.4b[2]\n" - ".word 0x6f85e977 // udot v23.4s, v11.16b, v5.4b[2]\n" - ".word 0x6f86e97b // udot v27.4s, v11.16b, v6.4b[2]\n" - ".word 0x6f87e97f // udot v31.4s, v11.16b, v7.4b[2]\n" - "ldr q11, [%[b_ptr0], #-0x50]\n" - ".word 0x6fa4e990 // udot v16.4s, v12.16b, v4.4b[3]\n" - ".word 0x6fa5e994 // udot v20.4s, v12.16b, v5.4b[3]\n" - ".word 0x6fa6e998 // udot v24.4s, v12.16b, v6.4b[3]\n" - ".word 0x6fa7e99c // udot v28.4s, v12.16b, v7.4b[3]\n" - "ldr q12, [%[b_ptr0], #-0x40]\n" - ".word 0x6fa4e9b1 // udot v17.4s, v13.16b, v4.4b[3]\n" - ".word 0x6fa5e9b5 // udot v21.4s, v13.16b, v5.4b[3]\n" - ".word 0x6fa6e9b9 // udot v25.4s, v13.16b, v6.4b[3]\n" - ".word 0x6fa7e9bd // udot v29.4s, v13.16b, v7.4b[3]\n" - "ldr q13, [%[b_ptr0], #-0x30]\n" - ".word 0x6fa4e9d2 // udot v18.4s, v14.16b, v4.4b[3]\n" - ".word 0x6fa5e9d6 // udot v22.4s, v14.16b, v5.4b[3]\n" - ".word 0x6fa6e9da // udot v26.4s, v14.16b, v6.4b[3]\n" - ".word 0x6fa7e9de // udot v30.4s, v14.16b, v7.4b[3]\n" - "ldr q14, [%[b_ptr0], #-0x20]\n" - ".word 0x6fa4e9f3 // udot v19.4s, v15.16b, v4.4b[3]\n" - ".word 0x6fa5e9f7 // udot v23.4s, v15.16b, v5.4b[3]\n" - ".word 0x6fa6e9fb // udot v27.4s, v15.16b, v6.4b[3]\n" - ".word 0x6fa7e9ff // udot v31.4s, v15.16b, v7.4b[3]\n" - "b.ne 3b\n" - "2:\n" - "ldr q15, [%[b_ptr0], #-0x10]\n" - "prfm PSTL1KEEP, [%[c_ptr0]]\n" - "prfm PSTL1KEEP, [c_ptr1]\n" - "prfm PSTL1KEEP, [c_ptr2]\n" - "prfm PSTL1KEEP, [c_ptr3]\n" - "cbz %[regs], 4f\n" - ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" - "ldr q4, [%[a_ptr0]]\n" - ".word 0x6f81e114 // udot v20.4s, v8.16b, v1.4b[0]\n" - "ldr q5, [a_ptr1]\n" - ".word 0x6f82e118 // udot v24.4s, v8.16b, v2.4b[0]\n" - "ldr q6, [a_ptr2]\n" - ".word 0x6f83e11c // udot v28.4s, v8.16b, v3.4b[0]\n" - "ldr q7, [a_ptr3]\n" - ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" - "ldr q8, [%[b_ptr0]]\n" - ".word 0x6f81e135 // udot v21.4s, v9.16b, v1.4b[0]\n" - "add %[a_ptr0], %[a_ptr0], #0x10\n" - ".word 0x6f82e139 // udot v25.4s, v9.16b, v2.4b[0]\n" - "add a_ptr1, a_ptr1, #0x10\n" - ".word 0x6f83e13d // udot v29.4s, v9.16b, v3.4b[0]\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" - "add a_ptr2, a_ptr2, #0x10\n" - ".word 0x6f81e156 // udot v22.4s, v10.16b, v1.4b[0]\n" - "add a_ptr3, a_ptr3, #0x10\n" - ".word 0x6f82e15a // udot v26.4s, v10.16b, v2.4b[0]\n" - ".word 0x6f83e15e // udot v30.4s, v10.16b, v3.4b[0]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" - ".word 0x6f81e177 // udot v23.4s, v11.16b, v1.4b[0]\n" - ".word 0x6f82e17b // udot v27.4s, v11.16b, v2.4b[0]\n" - ".word 0x6f83e17f // udot v31.4s, v11.16b, v3.4b[0]\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - ".word 0x6fa0e190 // udot v16.4s, v12.16b, v0.4b[1]\n" - ".word 0x6fa1e194 // udot v20.4s, v12.16b, v1.4b[1]\n" - ".word 0x6fa2e198 // udot v24.4s, v12.16b, v2.4b[1]\n" - ".word 0x6fa3e19c // udot v28.4s, v12.16b, v3.4b[1]\n" - "ldr q12, [%[b_ptr0], #0x40]\n" - ".word 0x6fa0e1b1 // udot v17.4s, v13.16b, v0.4b[1]\n" - ".word 0x6fa1e1b5 // udot v21.4s, v13.16b, v1.4b[1]\n" - ".word 0x6fa2e1b9 // udot v25.4s, v13.16b, v2.4b[1]\n" - ".word 0x6fa3e1bd // udot v29.4s, v13.16b, v3.4b[1]\n" - "ldr q13, [%[b_ptr0], #0x50]\n" - ".word 0x6fa0e1d2 // udot v18.4s, v14.16b, v0.4b[1]\n" - ".word 0x6fa1e1d6 // udot v22.4s, v14.16b, v1.4b[1]\n" - ".word 0x6fa2e1da // udot v26.4s, v14.16b, v2.4b[1]\n" - ".word 0x6fa3e1de // udot v30.4s, v14.16b, v3.4b[1]\n" - "ldr q14, [%[b_ptr0], #0x60]\n" - ".word 0x6fa0e1f3 // udot v19.4s, v15.16b, v0.4b[1]\n" - ".word 0x6fa1e1f7 // udot v23.4s, v15.16b, v1.4b[1]\n" - ".word 0x6fa2e1fb // udot v27.4s, v15.16b, v2.4b[1]\n" - ".word 0x6fa3e1ff // udot v31.4s, v15.16b, v3.4b[1]\n" - "ldr q15, [%[b_ptr0], #0x70]\n" - ".word 0x6f80e910 // udot v16.4s, v8.16b, v0.4b[2]\n" - "add %[b_ptr0], %[b_ptr0], #0x100\n" - ".word 0x6f81e914 // udot v20.4s, v8.16b, v1.4b[2]\n" - ".word 0x6f82e918 // udot v24.4s, v8.16b, v2.4b[2]\n" - ".word 0x6f83e91c // udot v28.4s, v8.16b, v3.4b[2]\n" - "ldr q8, [%[b_ptr0], #-0x80]\n" - ".word 0x6f80e931 // udot v17.4s, v9.16b, v0.4b[2]\n" - ".word 0x6f81e935 // udot v21.4s, v9.16b, v1.4b[2]\n" - ".word 0x6f82e939 // udot v25.4s, v9.16b, v2.4b[2]\n" - ".word 0x6f83e93d // udot v29.4s, v9.16b, v3.4b[2]\n" - "ldr q9, [%[b_ptr0], #-0x70]\n" - ".word 0x6f80e952 // udot v18.4s, v10.16b, v0.4b[2]\n" - ".word 0x6f81e956 // udot v22.4s, v10.16b, v1.4b[2]\n" - ".word 0x6f82e95a // udot v26.4s, v10.16b, v2.4b[2]\n" - ".word 0x6f83e95e // udot v30.4s, v10.16b, v3.4b[2]\n" - "ldr q10, [%[b_ptr0], #-0x60]\n" - ".word 0x6f80e973 // udot v19.4s, v11.16b, v0.4b[2]\n" - ".word 0x6f81e977 // udot v23.4s, v11.16b, v1.4b[2]\n" - ".word 0x6f82e97b // udot v27.4s, v11.16b, v2.4b[2]\n" - ".word 0x6f83e97f // udot v31.4s, v11.16b, v3.4b[2]\n" - "ldr q11, [%[b_ptr0], #-0x50]\n" - ".word 0x6fa0e990 // udot v16.4s, v12.16b, v0.4b[3]\n" - ".word 0x6fa1e994 // udot v20.4s, v12.16b, v1.4b[3]\n" - ".word 0x6fa2e998 // udot v24.4s, v12.16b, v2.4b[3]\n" - ".word 0x6fa3e99c // udot v28.4s, v12.16b, v3.4b[3]\n" - "ldr q12, [%[b_ptr0], #-0x40]\n" - ".word 0x6fa0e9b1 // udot v17.4s, v13.16b, v0.4b[3]\n" - ".word 0x6fa1e9b5 // udot v21.4s, v13.16b, v1.4b[3]\n" - ".word 0x6fa2e9b9 // udot v25.4s, v13.16b, v2.4b[3]\n" - ".word 0x6fa3e9bd // udot v29.4s, v13.16b, v3.4b[3]\n" - "ldr q13, [%[b_ptr0], #-0x30]\n" - ".word 0x6fa0e9d2 // udot v18.4s, v14.16b, v0.4b[3]\n" - ".word 0x6fa1e9d6 // udot v22.4s, v14.16b, v1.4b[3]\n" - ".word 0x6fa2e9da // udot v26.4s, v14.16b, v2.4b[3]\n" - ".word 0x6fa3e9de // udot v30.4s, v14.16b, v3.4b[3]\n" - "ldr q14, [%[b_ptr0], #-0x20]\n" - ".word 0x6fa0e9f3 // udot v19.4s, v15.16b, v0.4b[3]\n" - ".word 0x6fa1e9f7 // udot v23.4s, v15.16b, v1.4b[3]\n" - ".word 0x6fa2e9fb // udot v27.4s, v15.16b, v2.4b[3]\n" - ".word 0x6fa3e9ff // udot v31.4s, v15.16b, v3.4b[3]\n" - "ldr q15, [%[b_ptr0], #-0x10]\n" - ".word 0x6f84e110 // udot v16.4s, v8.16b, v4.4b[0]\n" - ".word 0x6f85e114 // udot v20.4s, v8.16b, v5.4b[0]\n" - ".word 0x6f86e118 // udot v24.4s, v8.16b, v6.4b[0]\n" - ".word 0x6f87e11c // udot v28.4s, v8.16b, v7.4b[0]\n" - "ldr q8, [%[b_ptr0]]\n" - ".word 0x6f84e131 // udot v17.4s, v9.16b, v4.4b[0]\n" - ".word 0x6f85e135 // udot v21.4s, v9.16b, v5.4b[0]\n" - ".word 0x6f86e139 // udot v25.4s, v9.16b, v6.4b[0]\n" - ".word 0x6f87e13d // udot v29.4s, v9.16b, v7.4b[0]\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - ".word 0x6f84e152 // udot v18.4s, v10.16b, v4.4b[0]\n" - ".word 0x6f85e156 // udot v22.4s, v10.16b, v5.4b[0]\n" - ".word 0x6f86e15a // udot v26.4s, v10.16b, v6.4b[0]\n" - ".word 0x6f87e15e // udot v30.4s, v10.16b, v7.4b[0]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - ".word 0x6f84e173 // udot v19.4s, v11.16b, v4.4b[0]\n" - ".word 0x6f85e177 // udot v23.4s, v11.16b, v5.4b[0]\n" - ".word 0x6f86e17b // udot v27.4s, v11.16b, v6.4b[0]\n" - ".word 0x6f87e17f // udot v31.4s, v11.16b, v7.4b[0]\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - ".word 0x6fa4e190 // udot v16.4s, v12.16b, v4.4b[1]\n" - ".word 0x6fa5e194 // udot v20.4s, v12.16b, v5.4b[1]\n" - ".word 0x6fa6e198 // udot v24.4s, v12.16b, v6.4b[1]\n" - ".word 0x6fa7e19c // udot v28.4s, v12.16b, v7.4b[1]\n" - "ldr q12, [%[b_ptr0], #0x40]\n" - ".word 0x6fa4e1b1 // udot v17.4s, v13.16b, v4.4b[1]\n" - ".word 0x6fa5e1b5 // udot v21.4s, v13.16b, v5.4b[1]\n" - ".word 0x6fa6e1b9 // udot v25.4s, v13.16b, v6.4b[1]\n" - ".word 0x6fa7e1bd // udot v29.4s, v13.16b, v7.4b[1]\n" - "ldr q13, [%[b_ptr0], #0x50]\n" - ".word 0x6fa4e1d2 // udot v18.4s, v14.16b, v4.4b[1]\n" - ".word 0x6fa5e1d6 // udot v22.4s, v14.16b, v5.4b[1]\n" - ".word 0x6fa6e1da // udot v26.4s, v14.16b, v6.4b[1]\n" - ".word 0x6fa7e1de // udot v30.4s, v14.16b, v7.4b[1]\n" - "ldr q14, [%[b_ptr0], #0x60]\n" - ".word 0x6fa4e1f3 // udot v19.4s, v15.16b, v4.4b[1]\n" - ".word 0x6fa5e1f7 // udot v23.4s, v15.16b, v5.4b[1]\n" - ".word 0x6fa6e1fb // udot v27.4s, v15.16b, v6.4b[1]\n" - ".word 0x6fa7e1ff // udot v31.4s, v15.16b, v7.4b[1]\n" - "ldr q15, [%[b_ptr0], #0x70]\n" - ".word 0x6f84e910 // udot v16.4s, v8.16b, v4.4b[2]\n" - "add %[b_ptr0], %[b_ptr0], #0x80\n" - ".word 0x6f85e914 // udot v20.4s, v8.16b, v5.4b[2]\n" - ".word 0x6f86e918 // udot v24.4s, v8.16b, v6.4b[2]\n" - ".word 0x6f87e91c // udot v28.4s, v8.16b, v7.4b[2]\n" - ".word 0x6f84e931 // udot v17.4s, v9.16b, v4.4b[2]\n" - ".word 0x6f85e935 // udot v21.4s, v9.16b, v5.4b[2]\n" - ".word 0x6f86e939 // udot v25.4s, v9.16b, v6.4b[2]\n" - ".word 0x6f87e93d // udot v29.4s, v9.16b, v7.4b[2]\n" - ".word 0x6f84e952 // udot v18.4s, v10.16b, v4.4b[2]\n" - ".word 0x6f85e956 // udot v22.4s, v10.16b, v5.4b[2]\n" - ".word 0x6f86e95a // udot v26.4s, v10.16b, v6.4b[2]\n" - ".word 0x6f87e95e // udot v30.4s, v10.16b, v7.4b[2]\n" - ".word 0x6f84e973 // udot v19.4s, v11.16b, v4.4b[2]\n" - ".word 0x6f85e977 // udot v23.4s, v11.16b, v5.4b[2]\n" - ".word 0x6f86e97b // udot v27.4s, v11.16b, v6.4b[2]\n" - ".word 0x6f87e97f // udot v31.4s, v11.16b, v7.4b[2]\n" - ".word 0x6fa4e990 // udot v16.4s, v12.16b, v4.4b[3]\n" - ".word 0x6fa5e994 // udot v20.4s, v12.16b, v5.4b[3]\n" - ".word 0x6fa6e998 // udot v24.4s, v12.16b, v6.4b[3]\n" - ".word 0x6fa7e99c // udot v28.4s, v12.16b, v7.4b[3]\n" - ".word 0x6fa4e9b1 // udot v17.4s, v13.16b, v4.4b[3]\n" - ".word 0x6fa5e9b5 // udot v21.4s, v13.16b, v5.4b[3]\n" - ".word 0x6fa6e9b9 // udot v25.4s, v13.16b, v6.4b[3]\n" - ".word 0x6fa7e9bd // udot v29.4s, v13.16b, v7.4b[3]\n" - ".word 0x6fa4e9d2 // udot v18.4s, v14.16b, v4.4b[3]\n" - ".word 0x6fa5e9d6 // udot v22.4s, v14.16b, v5.4b[3]\n" - ".word 0x6fa6e9da // udot v26.4s, v14.16b, v6.4b[3]\n" - ".word 0x6fa7e9de // udot v30.4s, v14.16b, v7.4b[3]\n" - ".word 0x6fa4e9f3 // udot v19.4s, v15.16b, v4.4b[3]\n" - ".word 0x6fa5e9f7 // udot v23.4s, v15.16b, v5.4b[3]\n" - ".word 0x6fa6e9fb // udot v27.4s, v15.16b, v6.4b[3]\n" - ".word 0x6fa7e9ff // udot v31.4s, v15.16b, v7.4b[3]\n" - "b 5f\n" - "4:\n" - ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" - ".word 0x6f81e114 // udot v20.4s, v8.16b, v1.4b[0]\n" - ".word 0x6f82e118 // udot v24.4s, v8.16b, v2.4b[0]\n" - ".word 0x6f83e11c // udot v28.4s, v8.16b, v3.4b[0]\n" - "ldr q8, [%[b_ptr0]]\n" - ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" - ".word 0x6f81e135 // udot v21.4s, v9.16b, v1.4b[0]\n" - ".word 0x6f82e139 // udot v25.4s, v9.16b, v2.4b[0]\n" - ".word 0x6f83e13d // udot v29.4s, v9.16b, v3.4b[0]\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" - ".word 0x6f81e156 // udot v22.4s, v10.16b, v1.4b[0]\n" - ".word 0x6f82e15a // udot v26.4s, v10.16b, v2.4b[0]\n" - ".word 0x6f83e15e // udot v30.4s, v10.16b, v3.4b[0]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" - ".word 0x6f81e177 // udot v23.4s, v11.16b, v1.4b[0]\n" - ".word 0x6f82e17b // udot v27.4s, v11.16b, v2.4b[0]\n" - ".word 0x6f83e17f // udot v31.4s, v11.16b, v3.4b[0]\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - ".word 0x6fa0e190 // udot v16.4s, v12.16b, v0.4b[1]\n" - ".word 0x6fa1e194 // udot v20.4s, v12.16b, v1.4b[1]\n" - ".word 0x6fa2e198 // udot v24.4s, v12.16b, v2.4b[1]\n" - ".word 0x6fa3e19c // udot v28.4s, v12.16b, v3.4b[1]\n" - "ldr q12, [%[b_ptr0], #0x40]\n" - ".word 0x6fa0e1b1 // udot v17.4s, v13.16b, v0.4b[1]\n" - ".word 0x6fa1e1b5 // udot v21.4s, v13.16b, v1.4b[1]\n" - ".word 0x6fa2e1b9 // udot v25.4s, v13.16b, v2.4b[1]\n" - ".word 0x6fa3e1bd // udot v29.4s, v13.16b, v3.4b[1]\n" - "ldr q13, [%[b_ptr0], #0x50]\n" - ".word 0x6fa0e1d2 // udot v18.4s, v14.16b, v0.4b[1]\n" - ".word 0x6fa1e1d6 // udot v22.4s, v14.16b, v1.4b[1]\n" - ".word 0x6fa2e1da // udot v26.4s, v14.16b, v2.4b[1]\n" - ".word 0x6fa3e1de // udot v30.4s, v14.16b, v3.4b[1]\n" - "ldr q14, [%[b_ptr0], #0x60]\n" - ".word 0x6fa0e1f3 // udot v19.4s, v15.16b, v0.4b[1]\n" - ".word 0x6fa1e1f7 // udot v23.4s, v15.16b, v1.4b[1]\n" - ".word 0x6fa2e1fb // udot v27.4s, v15.16b, v2.4b[1]\n" - ".word 0x6fa3e1ff // udot v31.4s, v15.16b, v3.4b[1]\n" - "ldr q15, [%[b_ptr0], #0x70]\n" - ".word 0x6f80e910 // udot v16.4s, v8.16b, v0.4b[2]\n" - "add %[b_ptr0], %[b_ptr0], #0x80\n" - ".word 0x6f81e914 // udot v20.4s, v8.16b, v1.4b[2]\n" - ".word 0x6f82e918 // udot v24.4s, v8.16b, v2.4b[2]\n" - ".word 0x6f83e91c // udot v28.4s, v8.16b, v3.4b[2]\n" - ".word 0x6f80e931 // udot v17.4s, v9.16b, v0.4b[2]\n" - ".word 0x6f81e935 // udot v21.4s, v9.16b, v1.4b[2]\n" - ".word 0x6f82e939 // udot v25.4s, v9.16b, v2.4b[2]\n" - ".word 0x6f83e93d // udot v29.4s, v9.16b, v3.4b[2]\n" - ".word 0x6f80e952 // udot v18.4s, v10.16b, v0.4b[2]\n" - ".word 0x6f81e956 // udot v22.4s, v10.16b, v1.4b[2]\n" - ".word 0x6f82e95a // udot v26.4s, v10.16b, v2.4b[2]\n" - ".word 0x6f83e95e // udot v30.4s, v10.16b, v3.4b[2]\n" - ".word 0x6f80e973 // udot v19.4s, v11.16b, v0.4b[2]\n" - ".word 0x6f81e977 // udot v23.4s, v11.16b, v1.4b[2]\n" - ".word 0x6f82e97b // udot v27.4s, v11.16b, v2.4b[2]\n" - ".word 0x6f83e97f // udot v31.4s, v11.16b, v3.4b[2]\n" - ".word 0x6fa0e990 // udot v16.4s, v12.16b, v0.4b[3]\n" - ".word 0x6fa1e994 // udot v20.4s, v12.16b, v1.4b[3]\n" - ".word 0x6fa2e998 // udot v24.4s, v12.16b, v2.4b[3]\n" - ".word 0x6fa3e99c // udot v28.4s, v12.16b, v3.4b[3]\n" - ".word 0x6fa0e9b1 // udot v17.4s, v13.16b, v0.4b[3]\n" - ".word 0x6fa1e9b5 // udot v21.4s, v13.16b, v1.4b[3]\n" - ".word 0x6fa2e9b9 // udot v25.4s, v13.16b, v2.4b[3]\n" - ".word 0x6fa3e9bd // udot v29.4s, v13.16b, v3.4b[3]\n" - ".word 0x6fa0e9d2 // udot v18.4s, v14.16b, v0.4b[3]\n" - ".word 0x6fa1e9d6 // udot v22.4s, v14.16b, v1.4b[3]\n" - ".word 0x6fa2e9da // udot v26.4s, v14.16b, v2.4b[3]\n" - ".word 0x6fa3e9de // udot v30.4s, v14.16b, v3.4b[3]\n" - ".word 0x6fa0e9f3 // udot v19.4s, v15.16b, v0.4b[3]\n" - ".word 0x6fa1e9f7 // udot v23.4s, v15.16b, v1.4b[3]\n" - ".word 0x6fa2e9fb // udot v27.4s, v15.16b, v2.4b[3]\n" - ".word 0x6fa3e9ff // udot v31.4s, v15.16b, v3.4b[3]\n" - "5:\n" - "cbz %[blocks], 6f\n" - "7:\n" - "ldr q8, [%[b_ptr0]]\n" - "subs %[blocks], %[blocks], #0x1\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - "ldr s0, [%[a_ptr0]]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - "add %[a_ptr0], %[a_ptr0], #0x4\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - "add %[b_ptr0], %[b_ptr0], #0x40\n" - ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" - "ldr s1, [a_ptr1]\n" - ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" - "add a_ptr1, a_ptr1, #0x4\n" - ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" - "ldr s2, [a_ptr2]\n" - ".word 0x6f81e114 // udot v20.4s, v8.16b, v1.4b[0]\n" - "add a_ptr2, a_ptr2, #0x4\n" - ".word 0x6f81e135 // udot v21.4s, v9.16b, v1.4b[0]\n" - "ldr s3, [a_ptr3]\n" - ".word 0x6f82e118 // udot v24.4s, v8.16b, v2.4b[0]\n" - "add a_ptr3, a_ptr3, #0x4\n" - ".word 0x6f82e139 // udot v25.4s, v9.16b, v2.4b[0]\n" - ".word 0x6f83e11c // udot v28.4s, v8.16b, v3.4b[0]\n" - ".word 0x6f83e13d // udot v29.4s, v9.16b, v3.4b[0]\n" - ".word 0x6f81e156 // udot v22.4s, v10.16b, v1.4b[0]\n" - ".word 0x6f82e15a // udot v26.4s, v10.16b, v2.4b[0]\n" - ".word 0x6f83e15e // udot v30.4s, v10.16b, v3.4b[0]\n" - ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" - ".word 0x6f81e177 // udot v23.4s, v11.16b, v1.4b[0]\n" - ".word 0x6f82e17b // udot v27.4s, v11.16b, v2.4b[0]\n" - ".word 0x6f83e17f // udot v31.4s, v11.16b, v3.4b[0]\n" - "b.ne 7b\n" - "6:\n" - "cbz %[odds], 8f\n" - "ld1 {v0.b}[0], [%[a_ptr0]], #1\n" - "ld1 {v1.b}[0], [a_ptr1], #1\n" - "ld1 {v2.b}[0], [a_ptr2], #1\n" - "ld1 {v3.b}[0], [a_ptr3], #1\n" - "subs %[odds], %[odds], #0x1\n" - "b.eq 9f\n" - "ld1 {v0.b}[1], [%[a_ptr0]], #1\n" - "ld1 {v1.b}[1], [a_ptr1], #1\n" - "ld1 {v2.b}[1], [a_ptr2], #1\n" - "ld1 {v3.b}[1], [a_ptr3], #1\n" - "subs %[odds], %[odds], #0x1\n" - "b.eq 9f\n" - "ld1 {v0.b}[2], [%[a_ptr0]]\n" - "ld1 {v1.b}[2], [a_ptr1]\n" - "ld1 {v2.b}[2], [a_ptr2]\n" - "ld1 {v3.b}[2], [a_ptr3]\n" - "9:\n" - "ldr q8, [%[b_ptr0]]\n" - "ldr q9, [%[b_ptr0], #0x10]\n" - "ldr q10, [%[b_ptr0], #0x20]\n" - "ldr q11, [%[b_ptr0], #0x30]\n" - ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" - ".word 0x6f81e114 // udot v20.4s, v8.16b, v1.4b[0]\n" - ".word 0x6f82e118 // udot v24.4s, v8.16b, v2.4b[0]\n" - ".word 0x6f83e11c // udot v28.4s, v8.16b, v3.4b[0]\n" - ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" - ".word 0x6f81e135 // udot v21.4s, v9.16b, v1.4b[0]\n" - ".word 0x6f82e139 // udot v25.4s, v9.16b, v2.4b[0]\n" - ".word 0x6f83e13d // udot v29.4s, v9.16b, v3.4b[0]\n" - ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" - ".word 0x6f81e156 // udot v22.4s, v10.16b, v1.4b[0]\n" - ".word 0x6f82e15a // udot v26.4s, v10.16b, v2.4b[0]\n" - ".word 0x6f83e15e // udot v30.4s, v10.16b, v3.4b[0]\n" - ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" - ".word 0x6f81e177 // udot v23.4s, v11.16b, v1.4b[0]\n" - ".word 0x6f82e17b // udot v27.4s, v11.16b, v2.4b[0]\n" - ".word 0x6f83e17f // udot v31.4s, v11.16b, v3.4b[0]\n" - "8:\n" - "str q16, [%[c_ptr0]]\n" - "str q17, [%[c_ptr0], #0x10]\n" - "str q18, [%[c_ptr0], #0x20]\n" - "str q19, [%[c_ptr0], #0x30]\n" - "add %[c_ptr0], %[c_ptr0], #0x40\n" - "str q20, [c_ptr1]\n" - "str q21, [c_ptr1, #0x10]\n" - "str q22, [c_ptr1, #0x20]\n" - "str q23, [c_ptr1, #0x30]\n" - "str q24, [c_ptr2]\n" - "str q25, [c_ptr2, #0x10]\n" - "str q26, [c_ptr2, #0x20]\n" - "str q27, [c_ptr2, #0x30]\n" - "str q28, [c_ptr3]\n" - "str q29, [c_ptr3, #0x10]\n" - "str q30, [c_ptr3, #0x20]\n" - "str q31, [c_ptr3, #0x30]\n" - ".unreq a_ptr1\n" - ".unreq a_ptr2\n" - ".unreq a_ptr3\n" - ".unreq c_ptr1\n" - ".unreq c_ptr2\n" - ".unreq c_ptr3\n" - : [a_ptr0] "+r" (a_ptr0), [b_ptr0] "+r" (b_ptr0), [c_ptr0] "+r" (c_ptr0), [loops] "+r" (loops), [regs] "+r" (regs), [blocks] "+r" (blocks), [odds] "+r" (odds) - : [betaptr] "r" (betaptr), [width] "r" (width), [beta0] "r" (beta0), [lda] "r" (ldab), [ldc] "r" (ldcb) - : "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x0", "x1", "x2", "x3", "x4", "x5", "cc", "memory" + "a_ptr1 .req X0\n" + "a_ptr2 .req X1\n" + "a_ptr3 .req X2\n" + "c_ptr1 .req X3\n" + "c_ptr2 .req X4\n" + "c_ptr3 .req X5\n" + "add a_ptr1, %[a_ptr0], %[lda]\n" + "add c_ptr1, %[c_ptr0], %[ldc]\n" + "add a_ptr2, a_ptr1, %[lda]\n" + "add c_ptr2, c_ptr1, %[ldc]\n" + "add a_ptr3, a_ptr2, %[lda]\n" + "add c_ptr3, c_ptr2, %[ldc]\n" + "cbz %[beta0], 1f\n" + "movi v16.4s, #0\n" + "ldr q0, [%[a_ptr0]]\n" + "movi v17.4s, #0\n" + "ldr q1, [a_ptr1]\n" + "movi v18.4s, #0\n" + "ldr q2, [a_ptr2]\n" + "movi v19.4s, #0\n" + "ldr q3, [a_ptr3]\n" + "movi v20.4s, #0\n" + "ldr q8, [%[b_ptr0]]\n" + "movi v21.4s, #0\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + "movi v22.4s, #0\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + "movi v23.4s, #0\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + "movi v24.4s, #0\n" + "ldr q12, [%[b_ptr0], #0x40]\n" + "movi v25.4s, #0\n" + "ldr q13, [%[b_ptr0], #0x50]\n" + "movi v26.4s, #0\n" + "ldr q14, [%[b_ptr0], #0x60]\n" + "movi v27.4s, #0\n" + "add %[a_ptr0], %[a_ptr0], #0x10\n" + "movi v28.4s, #0\n" + "add a_ptr1, a_ptr1, #0x10\n" + "movi v29.4s, #0\n" + "add a_ptr2, a_ptr2, #0x10\n" + "movi v30.4s, #0\n" + "add a_ptr3, a_ptr3, #0x10\n" + "movi v31.4s, #0\n" + "add %[b_ptr0], %[b_ptr0], #0x80\n" + "cbz %[loops], 2f\n" + "b 3f\n" + "1:\n" + "ld1r {v15.4s}, [%[betaptr]]\n" + "ldr q16, [%[c_ptr0]]\n" + "ldr q17, [%[c_ptr0], #0x10]\n" + "ldr q18, [%[c_ptr0], #0x20]\n" + "ldr q19, [%[c_ptr0], #0x30]\n" + "mul v16.4s, v16.4s, v15.4s\n" + "ldr q20, [c_ptr1]\n" + "mul v17.4s, v17.4s, v15.4s\n" + "ldr q21, [c_ptr1, #0x10]\n" + "mul v18.4s, v18.4s, v15.4s\n" + "ldr q22, [c_ptr1, #0x20]\n" + "mul v19.4s, v19.4s, v15.4s\n" + "ldr q23, [c_ptr1, #0x30]\n" + "mul v20.4s, v20.4s, v15.4s\n" + "ldr q24, [c_ptr2]\n" + "mul v21.4s, v21.4s, v15.4s\n" + "ldr q25, [c_ptr2, #0x10]\n" + "mul v22.4s, v22.4s, v15.4s\n" + "ldr q26, [c_ptr2, #0x20]\n" + "mul v23.4s, v23.4s, v15.4s\n" + "ldr q27, [c_ptr2, #0x30]\n" + "mul v24.4s, v24.4s, v15.4s\n" + "ldr q28, [c_ptr3]\n" + "mul v25.4s, v25.4s, v15.4s\n" + "ldr q29, [c_ptr3, #0x10]\n" + "mul v26.4s, v26.4s, v15.4s\n" + "ldr q30, [c_ptr3, #0x20]\n" + "mul v27.4s, v27.4s, v15.4s\n" + "ldr q31, [c_ptr3, #0x30]\n" + "mul v28.4s, v28.4s, v15.4s\n" + "ldr q0, [%[a_ptr0]]\n" + "mul v29.4s, v29.4s, v15.4s\n" + "ldr q1, [a_ptr1]\n" + "mul v30.4s, v30.4s, v15.4s\n" + "ldr q2, [a_ptr2]\n" + "mul v31.4s, v31.4s, v15.4s\n" + "ldr q3, [a_ptr3]\n" + "ldr q8, [%[b_ptr0]]\n" + "add %[a_ptr0], %[a_ptr0], #0x10\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + "add a_ptr1, a_ptr1, #0x10\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + "add a_ptr2, a_ptr2, #0x10\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + "add a_ptr3, a_ptr3, #0x10\n" + "ldr q12, [%[b_ptr0], #0x40]\n" + "ldr q13, [%[b_ptr0], #0x50]\n" + "ldr q14, [%[b_ptr0], #0x60]\n" + "add %[b_ptr0], %[b_ptr0], #0x80\n" + "cbz %[loops], 2f\n" + "3:\n" + ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" + "ldr q15, [%[b_ptr0], #-0x10]\n" + ".word 0x6f81e114 // udot v20.4s, v8.16b, v1.4b[0]\n" + "ldr q4, [%[a_ptr0]]\n" + ".word 0x6f82e118 // udot v24.4s, v8.16b, v2.4b[0]\n" + "ldr q5, [a_ptr1]\n" + ".word 0x6f83e11c // udot v28.4s, v8.16b, v3.4b[0]\n" + "ldr q6, [a_ptr2]\n" + ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" + "ldr q7, [a_ptr3]\n" + ".word 0x6f81e135 // udot v21.4s, v9.16b, v1.4b[0]\n" + "ldr q8, [%[b_ptr0]]\n" + ".word 0x6f82e139 // udot v25.4s, v9.16b, v2.4b[0]\n" + "subs %[loops], %[loops], #0x1\n" + ".word 0x6f83e13d // udot v29.4s, v9.16b, v3.4b[0]\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" + "prfm PLDL1KEEP, [%[a_ptr0], #0x40]\n" + ".word 0x6f81e156 // udot v22.4s, v10.16b, v1.4b[0]\n" + "add %[a_ptr0], %[a_ptr0], #0x20\n" + ".word 0x6f82e15a // udot v26.4s, v10.16b, v2.4b[0]\n" + "add a_ptr1, a_ptr1, #0x20\n" + ".word 0x6f83e15e // udot v30.4s, v10.16b, v3.4b[0]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" + "add a_ptr2, a_ptr2, #0x20\n" + ".word 0x6f81e177 // udot v23.4s, v11.16b, v1.4b[0]\n" + "add a_ptr3, a_ptr3, #0x20\n" + ".word 0x6f82e17b // udot v27.4s, v11.16b, v2.4b[0]\n" + "prfm PLDL1KEEP, [a_ptr1, #0x40]\n" + ".word 0x6f83e17f // udot v31.4s, v11.16b, v3.4b[0]\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + ".word 0x6fa0e190 // udot v16.4s, v12.16b, v0.4b[1]\n" + "prfm PLDL1KEEP, [a_ptr2, #0x40]\n" + ".word 0x6fa1e194 // udot v20.4s, v12.16b, v1.4b[1]\n" + "prfm PLDL1KEEP, [a_ptr3, #0x40]\n" + ".word 0x6fa2e198 // udot v24.4s, v12.16b, v2.4b[1]\n" + ".word 0x6fa3e19c // udot v28.4s, v12.16b, v3.4b[1]\n" + "ldr q12, [%[b_ptr0], #0x40]\n" + ".word 0x6fa0e1b1 // udot v17.4s, v13.16b, v0.4b[1]\n" + ".word 0x6fa1e1b5 // udot v21.4s, v13.16b, v1.4b[1]\n" + ".word 0x6fa2e1b9 // udot v25.4s, v13.16b, v2.4b[1]\n" + ".word 0x6fa3e1bd // udot v29.4s, v13.16b, v3.4b[1]\n" + "ldr q13, [%[b_ptr0], #0x50]\n" + ".word 0x6fa0e1d2 // udot v18.4s, v14.16b, v0.4b[1]\n" + ".word 0x6fa1e1d6 // udot v22.4s, v14.16b, v1.4b[1]\n" + ".word 0x6fa2e1da // udot v26.4s, v14.16b, v2.4b[1]\n" + ".word 0x6fa3e1de // udot v30.4s, v14.16b, v3.4b[1]\n" + "ldr q14, [%[b_ptr0], #0x60]\n" + ".word 0x6fa0e1f3 // udot v19.4s, v15.16b, v0.4b[1]\n" + ".word 0x6fa1e1f7 // udot v23.4s, v15.16b, v1.4b[1]\n" + ".word 0x6fa2e1fb // udot v27.4s, v15.16b, v2.4b[1]\n" + ".word 0x6fa3e1ff // udot v31.4s, v15.16b, v3.4b[1]\n" + "ldr q15, [%[b_ptr0], #0x70]\n" + ".word 0x6f80e910 // udot v16.4s, v8.16b, v0.4b[2]\n" + "add %[b_ptr0], %[b_ptr0], #0x100\n" + ".word 0x6f81e914 // udot v20.4s, v8.16b, v1.4b[2]\n" + ".word 0x6f82e918 // udot v24.4s, v8.16b, v2.4b[2]\n" + ".word 0x6f83e91c // udot v28.4s, v8.16b, v3.4b[2]\n" + "ldr q8, [%[b_ptr0], #-0x80]\n" + ".word 0x6f80e931 // udot v17.4s, v9.16b, v0.4b[2]\n" + ".word 0x6f81e935 // udot v21.4s, v9.16b, v1.4b[2]\n" + ".word 0x6f82e939 // udot v25.4s, v9.16b, v2.4b[2]\n" + ".word 0x6f83e93d // udot v29.4s, v9.16b, v3.4b[2]\n" + "ldr q9, [%[b_ptr0], #-0x70]\n" + ".word 0x6f80e952 // udot v18.4s, v10.16b, v0.4b[2]\n" + ".word 0x6f81e956 // udot v22.4s, v10.16b, v1.4b[2]\n" + ".word 0x6f82e95a // udot v26.4s, v10.16b, v2.4b[2]\n" + ".word 0x6f83e95e // udot v30.4s, v10.16b, v3.4b[2]\n" + "ldr q10, [%[b_ptr0], #-0x60]\n" + ".word 0x6f80e973 // udot v19.4s, v11.16b, v0.4b[2]\n" + ".word 0x6f81e977 // udot v23.4s, v11.16b, v1.4b[2]\n" + ".word 0x6f82e97b // udot v27.4s, v11.16b, v2.4b[2]\n" + ".word 0x6f83e97f // udot v31.4s, v11.16b, v3.4b[2]\n" + "ldr q11, [%[b_ptr0], #-0x50]\n" + ".word 0x6fa0e990 // udot v16.4s, v12.16b, v0.4b[3]\n" + ".word 0x6fa1e994 // udot v20.4s, v12.16b, v1.4b[3]\n" + ".word 0x6fa2e998 // udot v24.4s, v12.16b, v2.4b[3]\n" + ".word 0x6fa3e99c // udot v28.4s, v12.16b, v3.4b[3]\n" + "ldr q12, [%[b_ptr0], #-0x40]\n" + ".word 0x6fa0e9b1 // udot v17.4s, v13.16b, v0.4b[3]\n" + ".word 0x6fa1e9b5 // udot v21.4s, v13.16b, v1.4b[3]\n" + ".word 0x6fa2e9b9 // udot v25.4s, v13.16b, v2.4b[3]\n" + ".word 0x6fa3e9bd // udot v29.4s, v13.16b, v3.4b[3]\n" + "ldr q13, [%[b_ptr0], #-0x30]\n" + ".word 0x6fa0e9d2 // udot v18.4s, v14.16b, v0.4b[3]\n" + ".word 0x6fa1e9d6 // udot v22.4s, v14.16b, v1.4b[3]\n" + ".word 0x6fa2e9da // udot v26.4s, v14.16b, v2.4b[3]\n" + ".word 0x6fa3e9de // udot v30.4s, v14.16b, v3.4b[3]\n" + "ldr q14, [%[b_ptr0], #-0x20]\n" + ".word 0x6fa0e9f3 // udot v19.4s, v15.16b, v0.4b[3]\n" + "ldr q0, [%[a_ptr0], #-0x10]\n" + ".word 0x6fa1e9f7 // udot v23.4s, v15.16b, v1.4b[3]\n" + "ldr q1, [a_ptr1, #-0x10]\n" + ".word 0x6fa2e9fb // udot v27.4s, v15.16b, v2.4b[3]\n" + "ldr q2, [a_ptr2, #-0x10]\n" + ".word 0x6fa3e9ff // udot v31.4s, v15.16b, v3.4b[3]\n" + "ldr q15, [%[b_ptr0], #-0x10]\n" + ".word 0x6f84e110 // udot v16.4s, v8.16b, v4.4b[0]\n" + "ldr q3, [a_ptr3, #-0x10]\n" + ".word 0x6f85e114 // udot v20.4s, v8.16b, v5.4b[0]\n" + ".word 0x6f86e118 // udot v24.4s, v8.16b, v6.4b[0]\n" + ".word 0x6f87e11c // udot v28.4s, v8.16b, v7.4b[0]\n" + "ldr q8, [%[b_ptr0]]\n" + ".word 0x6f84e131 // udot v17.4s, v9.16b, v4.4b[0]\n" + ".word 0x6f85e135 // udot v21.4s, v9.16b, v5.4b[0]\n" + ".word 0x6f86e139 // udot v25.4s, v9.16b, v6.4b[0]\n" + ".word 0x6f87e13d // udot v29.4s, v9.16b, v7.4b[0]\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + ".word 0x6f84e152 // udot v18.4s, v10.16b, v4.4b[0]\n" + ".word 0x6f85e156 // udot v22.4s, v10.16b, v5.4b[0]\n" + ".word 0x6f86e15a // udot v26.4s, v10.16b, v6.4b[0]\n" + ".word 0x6f87e15e // udot v30.4s, v10.16b, v7.4b[0]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + ".word 0x6f84e173 // udot v19.4s, v11.16b, v4.4b[0]\n" + ".word 0x6f85e177 // udot v23.4s, v11.16b, v5.4b[0]\n" + ".word 0x6f86e17b // udot v27.4s, v11.16b, v6.4b[0]\n" + ".word 0x6f87e17f // udot v31.4s, v11.16b, v7.4b[0]\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + ".word 0x6fa4e190 // udot v16.4s, v12.16b, v4.4b[1]\n" + ".word 0x6fa5e194 // udot v20.4s, v12.16b, v5.4b[1]\n" + ".word 0x6fa6e198 // udot v24.4s, v12.16b, v6.4b[1]\n" + ".word 0x6fa7e19c // udot v28.4s, v12.16b, v7.4b[1]\n" + "ldr q12, [%[b_ptr0], #0x40]\n" + ".word 0x6fa4e1b1 // udot v17.4s, v13.16b, v4.4b[1]\n" + ".word 0x6fa5e1b5 // udot v21.4s, v13.16b, v5.4b[1]\n" + ".word 0x6fa6e1b9 // udot v25.4s, v13.16b, v6.4b[1]\n" + ".word 0x6fa7e1bd // udot v29.4s, v13.16b, v7.4b[1]\n" + "ldr q13, [%[b_ptr0], #0x50]\n" + ".word 0x6fa4e1d2 // udot v18.4s, v14.16b, v4.4b[1]\n" + ".word 0x6fa5e1d6 // udot v22.4s, v14.16b, v5.4b[1]\n" + ".word 0x6fa6e1da // udot v26.4s, v14.16b, v6.4b[1]\n" + ".word 0x6fa7e1de // udot v30.4s, v14.16b, v7.4b[1]\n" + "ldr q14, [%[b_ptr0], #0x60]\n" + ".word 0x6fa4e1f3 // udot v19.4s, v15.16b, v4.4b[1]\n" + ".word 0x6fa5e1f7 // udot v23.4s, v15.16b, v5.4b[1]\n" + ".word 0x6fa6e1fb // udot v27.4s, v15.16b, v6.4b[1]\n" + ".word 0x6fa7e1ff // udot v31.4s, v15.16b, v7.4b[1]\n" + "ldr q15, [%[b_ptr0], #0x70]\n" + ".word 0x6f84e910 // udot v16.4s, v8.16b, v4.4b[2]\n" + "add %[b_ptr0], %[b_ptr0], #0x100\n" + ".word 0x6f85e914 // udot v20.4s, v8.16b, v5.4b[2]\n" + ".word 0x6f86e918 // udot v24.4s, v8.16b, v6.4b[2]\n" + ".word 0x6f87e91c // udot v28.4s, v8.16b, v7.4b[2]\n" + "ldr q8, [%[b_ptr0], #-0x80]\n" + ".word 0x6f84e931 // udot v17.4s, v9.16b, v4.4b[2]\n" + ".word 0x6f85e935 // udot v21.4s, v9.16b, v5.4b[2]\n" + ".word 0x6f86e939 // udot v25.4s, v9.16b, v6.4b[2]\n" + ".word 0x6f87e93d // udot v29.4s, v9.16b, v7.4b[2]\n" + "ldr q9, [%[b_ptr0], #-0x70]\n" + ".word 0x6f84e952 // udot v18.4s, v10.16b, v4.4b[2]\n" + ".word 0x6f85e956 // udot v22.4s, v10.16b, v5.4b[2]\n" + ".word 0x6f86e95a // udot v26.4s, v10.16b, v6.4b[2]\n" + ".word 0x6f87e95e // udot v30.4s, v10.16b, v7.4b[2]\n" + "ldr q10, [%[b_ptr0], #-0x60]\n" + ".word 0x6f84e973 // udot v19.4s, v11.16b, v4.4b[2]\n" + ".word 0x6f85e977 // udot v23.4s, v11.16b, v5.4b[2]\n" + ".word 0x6f86e97b // udot v27.4s, v11.16b, v6.4b[2]\n" + ".word 0x6f87e97f // udot v31.4s, v11.16b, v7.4b[2]\n" + "ldr q11, [%[b_ptr0], #-0x50]\n" + ".word 0x6fa4e990 // udot v16.4s, v12.16b, v4.4b[3]\n" + ".word 0x6fa5e994 // udot v20.4s, v12.16b, v5.4b[3]\n" + ".word 0x6fa6e998 // udot v24.4s, v12.16b, v6.4b[3]\n" + ".word 0x6fa7e99c // udot v28.4s, v12.16b, v7.4b[3]\n" + "ldr q12, [%[b_ptr0], #-0x40]\n" + ".word 0x6fa4e9b1 // udot v17.4s, v13.16b, v4.4b[3]\n" + ".word 0x6fa5e9b5 // udot v21.4s, v13.16b, v5.4b[3]\n" + ".word 0x6fa6e9b9 // udot v25.4s, v13.16b, v6.4b[3]\n" + ".word 0x6fa7e9bd // udot v29.4s, v13.16b, v7.4b[3]\n" + "ldr q13, [%[b_ptr0], #-0x30]\n" + ".word 0x6fa4e9d2 // udot v18.4s, v14.16b, v4.4b[3]\n" + ".word 0x6fa5e9d6 // udot v22.4s, v14.16b, v5.4b[3]\n" + ".word 0x6fa6e9da // udot v26.4s, v14.16b, v6.4b[3]\n" + ".word 0x6fa7e9de // udot v30.4s, v14.16b, v7.4b[3]\n" + "ldr q14, [%[b_ptr0], #-0x20]\n" + ".word 0x6fa4e9f3 // udot v19.4s, v15.16b, v4.4b[3]\n" + ".word 0x6fa5e9f7 // udot v23.4s, v15.16b, v5.4b[3]\n" + ".word 0x6fa6e9fb // udot v27.4s, v15.16b, v6.4b[3]\n" + ".word 0x6fa7e9ff // udot v31.4s, v15.16b, v7.4b[3]\n" + "b.ne 3b\n" + "2:\n" + "ldr q15, [%[b_ptr0], #-0x10]\n" + "prfm PSTL1KEEP, [%[c_ptr0]]\n" + "prfm PSTL1KEEP, [c_ptr1]\n" + "prfm PSTL1KEEP, [c_ptr2]\n" + "prfm PSTL1KEEP, [c_ptr3]\n" + "cbz %[regs], 4f\n" + ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" + "ldr q4, [%[a_ptr0]]\n" + ".word 0x6f81e114 // udot v20.4s, v8.16b, v1.4b[0]\n" + "ldr q5, [a_ptr1]\n" + ".word 0x6f82e118 // udot v24.4s, v8.16b, v2.4b[0]\n" + "ldr q6, [a_ptr2]\n" + ".word 0x6f83e11c // udot v28.4s, v8.16b, v3.4b[0]\n" + "ldr q7, [a_ptr3]\n" + ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" + "ldr q8, [%[b_ptr0]]\n" + ".word 0x6f81e135 // udot v21.4s, v9.16b, v1.4b[0]\n" + "add %[a_ptr0], %[a_ptr0], #0x10\n" + ".word 0x6f82e139 // udot v25.4s, v9.16b, v2.4b[0]\n" + "add a_ptr1, a_ptr1, #0x10\n" + ".word 0x6f83e13d // udot v29.4s, v9.16b, v3.4b[0]\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" + "add a_ptr2, a_ptr2, #0x10\n" + ".word 0x6f81e156 // udot v22.4s, v10.16b, v1.4b[0]\n" + "add a_ptr3, a_ptr3, #0x10\n" + ".word 0x6f82e15a // udot v26.4s, v10.16b, v2.4b[0]\n" + ".word 0x6f83e15e // udot v30.4s, v10.16b, v3.4b[0]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" + ".word 0x6f81e177 // udot v23.4s, v11.16b, v1.4b[0]\n" + ".word 0x6f82e17b // udot v27.4s, v11.16b, v2.4b[0]\n" + ".word 0x6f83e17f // udot v31.4s, v11.16b, v3.4b[0]\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + ".word 0x6fa0e190 // udot v16.4s, v12.16b, v0.4b[1]\n" + ".word 0x6fa1e194 // udot v20.4s, v12.16b, v1.4b[1]\n" + ".word 0x6fa2e198 // udot v24.4s, v12.16b, v2.4b[1]\n" + ".word 0x6fa3e19c // udot v28.4s, v12.16b, v3.4b[1]\n" + "ldr q12, [%[b_ptr0], #0x40]\n" + ".word 0x6fa0e1b1 // udot v17.4s, v13.16b, v0.4b[1]\n" + ".word 0x6fa1e1b5 // udot v21.4s, v13.16b, v1.4b[1]\n" + ".word 0x6fa2e1b9 // udot v25.4s, v13.16b, v2.4b[1]\n" + ".word 0x6fa3e1bd // udot v29.4s, v13.16b, v3.4b[1]\n" + "ldr q13, [%[b_ptr0], #0x50]\n" + ".word 0x6fa0e1d2 // udot v18.4s, v14.16b, v0.4b[1]\n" + ".word 0x6fa1e1d6 // udot v22.4s, v14.16b, v1.4b[1]\n" + ".word 0x6fa2e1da // udot v26.4s, v14.16b, v2.4b[1]\n" + ".word 0x6fa3e1de // udot v30.4s, v14.16b, v3.4b[1]\n" + "ldr q14, [%[b_ptr0], #0x60]\n" + ".word 0x6fa0e1f3 // udot v19.4s, v15.16b, v0.4b[1]\n" + ".word 0x6fa1e1f7 // udot v23.4s, v15.16b, v1.4b[1]\n" + ".word 0x6fa2e1fb // udot v27.4s, v15.16b, v2.4b[1]\n" + ".word 0x6fa3e1ff // udot v31.4s, v15.16b, v3.4b[1]\n" + "ldr q15, [%[b_ptr0], #0x70]\n" + ".word 0x6f80e910 // udot v16.4s, v8.16b, v0.4b[2]\n" + "add %[b_ptr0], %[b_ptr0], #0x100\n" + ".word 0x6f81e914 // udot v20.4s, v8.16b, v1.4b[2]\n" + ".word 0x6f82e918 // udot v24.4s, v8.16b, v2.4b[2]\n" + ".word 0x6f83e91c // udot v28.4s, v8.16b, v3.4b[2]\n" + "ldr q8, [%[b_ptr0], #-0x80]\n" + ".word 0x6f80e931 // udot v17.4s, v9.16b, v0.4b[2]\n" + ".word 0x6f81e935 // udot v21.4s, v9.16b, v1.4b[2]\n" + ".word 0x6f82e939 // udot v25.4s, v9.16b, v2.4b[2]\n" + ".word 0x6f83e93d // udot v29.4s, v9.16b, v3.4b[2]\n" + "ldr q9, [%[b_ptr0], #-0x70]\n" + ".word 0x6f80e952 // udot v18.4s, v10.16b, v0.4b[2]\n" + ".word 0x6f81e956 // udot v22.4s, v10.16b, v1.4b[2]\n" + ".word 0x6f82e95a // udot v26.4s, v10.16b, v2.4b[2]\n" + ".word 0x6f83e95e // udot v30.4s, v10.16b, v3.4b[2]\n" + "ldr q10, [%[b_ptr0], #-0x60]\n" + ".word 0x6f80e973 // udot v19.4s, v11.16b, v0.4b[2]\n" + ".word 0x6f81e977 // udot v23.4s, v11.16b, v1.4b[2]\n" + ".word 0x6f82e97b // udot v27.4s, v11.16b, v2.4b[2]\n" + ".word 0x6f83e97f // udot v31.4s, v11.16b, v3.4b[2]\n" + "ldr q11, [%[b_ptr0], #-0x50]\n" + ".word 0x6fa0e990 // udot v16.4s, v12.16b, v0.4b[3]\n" + ".word 0x6fa1e994 // udot v20.4s, v12.16b, v1.4b[3]\n" + ".word 0x6fa2e998 // udot v24.4s, v12.16b, v2.4b[3]\n" + ".word 0x6fa3e99c // udot v28.4s, v12.16b, v3.4b[3]\n" + "ldr q12, [%[b_ptr0], #-0x40]\n" + ".word 0x6fa0e9b1 // udot v17.4s, v13.16b, v0.4b[3]\n" + ".word 0x6fa1e9b5 // udot v21.4s, v13.16b, v1.4b[3]\n" + ".word 0x6fa2e9b9 // udot v25.4s, v13.16b, v2.4b[3]\n" + ".word 0x6fa3e9bd // udot v29.4s, v13.16b, v3.4b[3]\n" + "ldr q13, [%[b_ptr0], #-0x30]\n" + ".word 0x6fa0e9d2 // udot v18.4s, v14.16b, v0.4b[3]\n" + ".word 0x6fa1e9d6 // udot v22.4s, v14.16b, v1.4b[3]\n" + ".word 0x6fa2e9da // udot v26.4s, v14.16b, v2.4b[3]\n" + ".word 0x6fa3e9de // udot v30.4s, v14.16b, v3.4b[3]\n" + "ldr q14, [%[b_ptr0], #-0x20]\n" + ".word 0x6fa0e9f3 // udot v19.4s, v15.16b, v0.4b[3]\n" + ".word 0x6fa1e9f7 // udot v23.4s, v15.16b, v1.4b[3]\n" + ".word 0x6fa2e9fb // udot v27.4s, v15.16b, v2.4b[3]\n" + ".word 0x6fa3e9ff // udot v31.4s, v15.16b, v3.4b[3]\n" + "ldr q15, [%[b_ptr0], #-0x10]\n" + ".word 0x6f84e110 // udot v16.4s, v8.16b, v4.4b[0]\n" + ".word 0x6f85e114 // udot v20.4s, v8.16b, v5.4b[0]\n" + ".word 0x6f86e118 // udot v24.4s, v8.16b, v6.4b[0]\n" + ".word 0x6f87e11c // udot v28.4s, v8.16b, v7.4b[0]\n" + "ldr q8, [%[b_ptr0]]\n" + ".word 0x6f84e131 // udot v17.4s, v9.16b, v4.4b[0]\n" + ".word 0x6f85e135 // udot v21.4s, v9.16b, v5.4b[0]\n" + ".word 0x6f86e139 // udot v25.4s, v9.16b, v6.4b[0]\n" + ".word 0x6f87e13d // udot v29.4s, v9.16b, v7.4b[0]\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + ".word 0x6f84e152 // udot v18.4s, v10.16b, v4.4b[0]\n" + ".word 0x6f85e156 // udot v22.4s, v10.16b, v5.4b[0]\n" + ".word 0x6f86e15a // udot v26.4s, v10.16b, v6.4b[0]\n" + ".word 0x6f87e15e // udot v30.4s, v10.16b, v7.4b[0]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + ".word 0x6f84e173 // udot v19.4s, v11.16b, v4.4b[0]\n" + ".word 0x6f85e177 // udot v23.4s, v11.16b, v5.4b[0]\n" + ".word 0x6f86e17b // udot v27.4s, v11.16b, v6.4b[0]\n" + ".word 0x6f87e17f // udot v31.4s, v11.16b, v7.4b[0]\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + ".word 0x6fa4e190 // udot v16.4s, v12.16b, v4.4b[1]\n" + ".word 0x6fa5e194 // udot v20.4s, v12.16b, v5.4b[1]\n" + ".word 0x6fa6e198 // udot v24.4s, v12.16b, v6.4b[1]\n" + ".word 0x6fa7e19c // udot v28.4s, v12.16b, v7.4b[1]\n" + "ldr q12, [%[b_ptr0], #0x40]\n" + ".word 0x6fa4e1b1 // udot v17.4s, v13.16b, v4.4b[1]\n" + ".word 0x6fa5e1b5 // udot v21.4s, v13.16b, v5.4b[1]\n" + ".word 0x6fa6e1b9 // udot v25.4s, v13.16b, v6.4b[1]\n" + ".word 0x6fa7e1bd // udot v29.4s, v13.16b, v7.4b[1]\n" + "ldr q13, [%[b_ptr0], #0x50]\n" + ".word 0x6fa4e1d2 // udot v18.4s, v14.16b, v4.4b[1]\n" + ".word 0x6fa5e1d6 // udot v22.4s, v14.16b, v5.4b[1]\n" + ".word 0x6fa6e1da // udot v26.4s, v14.16b, v6.4b[1]\n" + ".word 0x6fa7e1de // udot v30.4s, v14.16b, v7.4b[1]\n" + "ldr q14, [%[b_ptr0], #0x60]\n" + ".word 0x6fa4e1f3 // udot v19.4s, v15.16b, v4.4b[1]\n" + ".word 0x6fa5e1f7 // udot v23.4s, v15.16b, v5.4b[1]\n" + ".word 0x6fa6e1fb // udot v27.4s, v15.16b, v6.4b[1]\n" + ".word 0x6fa7e1ff // udot v31.4s, v15.16b, v7.4b[1]\n" + "ldr q15, [%[b_ptr0], #0x70]\n" + ".word 0x6f84e910 // udot v16.4s, v8.16b, v4.4b[2]\n" + "add %[b_ptr0], %[b_ptr0], #0x80\n" + ".word 0x6f85e914 // udot v20.4s, v8.16b, v5.4b[2]\n" + ".word 0x6f86e918 // udot v24.4s, v8.16b, v6.4b[2]\n" + ".word 0x6f87e91c // udot v28.4s, v8.16b, v7.4b[2]\n" + ".word 0x6f84e931 // udot v17.4s, v9.16b, v4.4b[2]\n" + ".word 0x6f85e935 // udot v21.4s, v9.16b, v5.4b[2]\n" + ".word 0x6f86e939 // udot v25.4s, v9.16b, v6.4b[2]\n" + ".word 0x6f87e93d // udot v29.4s, v9.16b, v7.4b[2]\n" + ".word 0x6f84e952 // udot v18.4s, v10.16b, v4.4b[2]\n" + ".word 0x6f85e956 // udot v22.4s, v10.16b, v5.4b[2]\n" + ".word 0x6f86e95a // udot v26.4s, v10.16b, v6.4b[2]\n" + ".word 0x6f87e95e // udot v30.4s, v10.16b, v7.4b[2]\n" + ".word 0x6f84e973 // udot v19.4s, v11.16b, v4.4b[2]\n" + ".word 0x6f85e977 // udot v23.4s, v11.16b, v5.4b[2]\n" + ".word 0x6f86e97b // udot v27.4s, v11.16b, v6.4b[2]\n" + ".word 0x6f87e97f // udot v31.4s, v11.16b, v7.4b[2]\n" + ".word 0x6fa4e990 // udot v16.4s, v12.16b, v4.4b[3]\n" + ".word 0x6fa5e994 // udot v20.4s, v12.16b, v5.4b[3]\n" + ".word 0x6fa6e998 // udot v24.4s, v12.16b, v6.4b[3]\n" + ".word 0x6fa7e99c // udot v28.4s, v12.16b, v7.4b[3]\n" + ".word 0x6fa4e9b1 // udot v17.4s, v13.16b, v4.4b[3]\n" + ".word 0x6fa5e9b5 // udot v21.4s, v13.16b, v5.4b[3]\n" + ".word 0x6fa6e9b9 // udot v25.4s, v13.16b, v6.4b[3]\n" + ".word 0x6fa7e9bd // udot v29.4s, v13.16b, v7.4b[3]\n" + ".word 0x6fa4e9d2 // udot v18.4s, v14.16b, v4.4b[3]\n" + ".word 0x6fa5e9d6 // udot v22.4s, v14.16b, v5.4b[3]\n" + ".word 0x6fa6e9da // udot v26.4s, v14.16b, v6.4b[3]\n" + ".word 0x6fa7e9de // udot v30.4s, v14.16b, v7.4b[3]\n" + ".word 0x6fa4e9f3 // udot v19.4s, v15.16b, v4.4b[3]\n" + ".word 0x6fa5e9f7 // udot v23.4s, v15.16b, v5.4b[3]\n" + ".word 0x6fa6e9fb // udot v27.4s, v15.16b, v6.4b[3]\n" + ".word 0x6fa7e9ff // udot v31.4s, v15.16b, v7.4b[3]\n" + "b 5f\n" + "4:\n" + ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" + ".word 0x6f81e114 // udot v20.4s, v8.16b, v1.4b[0]\n" + ".word 0x6f82e118 // udot v24.4s, v8.16b, v2.4b[0]\n" + ".word 0x6f83e11c // udot v28.4s, v8.16b, v3.4b[0]\n" + "ldr q8, [%[b_ptr0]]\n" + ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" + ".word 0x6f81e135 // udot v21.4s, v9.16b, v1.4b[0]\n" + ".word 0x6f82e139 // udot v25.4s, v9.16b, v2.4b[0]\n" + ".word 0x6f83e13d // udot v29.4s, v9.16b, v3.4b[0]\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" + ".word 0x6f81e156 // udot v22.4s, v10.16b, v1.4b[0]\n" + ".word 0x6f82e15a // udot v26.4s, v10.16b, v2.4b[0]\n" + ".word 0x6f83e15e // udot v30.4s, v10.16b, v3.4b[0]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" + ".word 0x6f81e177 // udot v23.4s, v11.16b, v1.4b[0]\n" + ".word 0x6f82e17b // udot v27.4s, v11.16b, v2.4b[0]\n" + ".word 0x6f83e17f // udot v31.4s, v11.16b, v3.4b[0]\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + ".word 0x6fa0e190 // udot v16.4s, v12.16b, v0.4b[1]\n" + ".word 0x6fa1e194 // udot v20.4s, v12.16b, v1.4b[1]\n" + ".word 0x6fa2e198 // udot v24.4s, v12.16b, v2.4b[1]\n" + ".word 0x6fa3e19c // udot v28.4s, v12.16b, v3.4b[1]\n" + "ldr q12, [%[b_ptr0], #0x40]\n" + ".word 0x6fa0e1b1 // udot v17.4s, v13.16b, v0.4b[1]\n" + ".word 0x6fa1e1b5 // udot v21.4s, v13.16b, v1.4b[1]\n" + ".word 0x6fa2e1b9 // udot v25.4s, v13.16b, v2.4b[1]\n" + ".word 0x6fa3e1bd // udot v29.4s, v13.16b, v3.4b[1]\n" + "ldr q13, [%[b_ptr0], #0x50]\n" + ".word 0x6fa0e1d2 // udot v18.4s, v14.16b, v0.4b[1]\n" + ".word 0x6fa1e1d6 // udot v22.4s, v14.16b, v1.4b[1]\n" + ".word 0x6fa2e1da // udot v26.4s, v14.16b, v2.4b[1]\n" + ".word 0x6fa3e1de // udot v30.4s, v14.16b, v3.4b[1]\n" + "ldr q14, [%[b_ptr0], #0x60]\n" + ".word 0x6fa0e1f3 // udot v19.4s, v15.16b, v0.4b[1]\n" + ".word 0x6fa1e1f7 // udot v23.4s, v15.16b, v1.4b[1]\n" + ".word 0x6fa2e1fb // udot v27.4s, v15.16b, v2.4b[1]\n" + ".word 0x6fa3e1ff // udot v31.4s, v15.16b, v3.4b[1]\n" + "ldr q15, [%[b_ptr0], #0x70]\n" + ".word 0x6f80e910 // udot v16.4s, v8.16b, v0.4b[2]\n" + "add %[b_ptr0], %[b_ptr0], #0x80\n" + ".word 0x6f81e914 // udot v20.4s, v8.16b, v1.4b[2]\n" + ".word 0x6f82e918 // udot v24.4s, v8.16b, v2.4b[2]\n" + ".word 0x6f83e91c // udot v28.4s, v8.16b, v3.4b[2]\n" + ".word 0x6f80e931 // udot v17.4s, v9.16b, v0.4b[2]\n" + ".word 0x6f81e935 // udot v21.4s, v9.16b, v1.4b[2]\n" + ".word 0x6f82e939 // udot v25.4s, v9.16b, v2.4b[2]\n" + ".word 0x6f83e93d // udot v29.4s, v9.16b, v3.4b[2]\n" + ".word 0x6f80e952 // udot v18.4s, v10.16b, v0.4b[2]\n" + ".word 0x6f81e956 // udot v22.4s, v10.16b, v1.4b[2]\n" + ".word 0x6f82e95a // udot v26.4s, v10.16b, v2.4b[2]\n" + ".word 0x6f83e95e // udot v30.4s, v10.16b, v3.4b[2]\n" + ".word 0x6f80e973 // udot v19.4s, v11.16b, v0.4b[2]\n" + ".word 0x6f81e977 // udot v23.4s, v11.16b, v1.4b[2]\n" + ".word 0x6f82e97b // udot v27.4s, v11.16b, v2.4b[2]\n" + ".word 0x6f83e97f // udot v31.4s, v11.16b, v3.4b[2]\n" + ".word 0x6fa0e990 // udot v16.4s, v12.16b, v0.4b[3]\n" + ".word 0x6fa1e994 // udot v20.4s, v12.16b, v1.4b[3]\n" + ".word 0x6fa2e998 // udot v24.4s, v12.16b, v2.4b[3]\n" + ".word 0x6fa3e99c // udot v28.4s, v12.16b, v3.4b[3]\n" + ".word 0x6fa0e9b1 // udot v17.4s, v13.16b, v0.4b[3]\n" + ".word 0x6fa1e9b5 // udot v21.4s, v13.16b, v1.4b[3]\n" + ".word 0x6fa2e9b9 // udot v25.4s, v13.16b, v2.4b[3]\n" + ".word 0x6fa3e9bd // udot v29.4s, v13.16b, v3.4b[3]\n" + ".word 0x6fa0e9d2 // udot v18.4s, v14.16b, v0.4b[3]\n" + ".word 0x6fa1e9d6 // udot v22.4s, v14.16b, v1.4b[3]\n" + ".word 0x6fa2e9da // udot v26.4s, v14.16b, v2.4b[3]\n" + ".word 0x6fa3e9de // udot v30.4s, v14.16b, v3.4b[3]\n" + ".word 0x6fa0e9f3 // udot v19.4s, v15.16b, v0.4b[3]\n" + ".word 0x6fa1e9f7 // udot v23.4s, v15.16b, v1.4b[3]\n" + ".word 0x6fa2e9fb // udot v27.4s, v15.16b, v2.4b[3]\n" + ".word 0x6fa3e9ff // udot v31.4s, v15.16b, v3.4b[3]\n" + "5:\n" + "cbz %[blocks], 6f\n" + "7:\n" + "ldr q8, [%[b_ptr0]]\n" + "subs %[blocks], %[blocks], #0x1\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + "ldr s0, [%[a_ptr0]]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + "add %[a_ptr0], %[a_ptr0], #0x4\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + "add %[b_ptr0], %[b_ptr0], #0x40\n" + ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" + "ldr s1, [a_ptr1]\n" + ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" + "add a_ptr1, a_ptr1, #0x4\n" + ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" + "ldr s2, [a_ptr2]\n" + ".word 0x6f81e114 // udot v20.4s, v8.16b, v1.4b[0]\n" + "add a_ptr2, a_ptr2, #0x4\n" + ".word 0x6f81e135 // udot v21.4s, v9.16b, v1.4b[0]\n" + "ldr s3, [a_ptr3]\n" + ".word 0x6f82e118 // udot v24.4s, v8.16b, v2.4b[0]\n" + "add a_ptr3, a_ptr3, #0x4\n" + ".word 0x6f82e139 // udot v25.4s, v9.16b, v2.4b[0]\n" + ".word 0x6f83e11c // udot v28.4s, v8.16b, v3.4b[0]\n" + ".word 0x6f83e13d // udot v29.4s, v9.16b, v3.4b[0]\n" + ".word 0x6f81e156 // udot v22.4s, v10.16b, v1.4b[0]\n" + ".word 0x6f82e15a // udot v26.4s, v10.16b, v2.4b[0]\n" + ".word 0x6f83e15e // udot v30.4s, v10.16b, v3.4b[0]\n" + ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" + ".word 0x6f81e177 // udot v23.4s, v11.16b, v1.4b[0]\n" + ".word 0x6f82e17b // udot v27.4s, v11.16b, v2.4b[0]\n" + ".word 0x6f83e17f // udot v31.4s, v11.16b, v3.4b[0]\n" + "b.ne 7b\n" + "6:\n" + "cbz %[odds], 8f\n" + "ld1 {v0.b}[0], [%[a_ptr0]], #1\n" + "ld1 {v1.b}[0], [a_ptr1], #1\n" + "ld1 {v2.b}[0], [a_ptr2], #1\n" + "ld1 {v3.b}[0], [a_ptr3], #1\n" + "subs %[odds], %[odds], #0x1\n" + "b.eq 9f\n" + "ld1 {v0.b}[1], [%[a_ptr0]], #1\n" + "ld1 {v1.b}[1], [a_ptr1], #1\n" + "ld1 {v2.b}[1], [a_ptr2], #1\n" + "ld1 {v3.b}[1], [a_ptr3], #1\n" + "subs %[odds], %[odds], #0x1\n" + "b.eq 9f\n" + "ld1 {v0.b}[2], [%[a_ptr0]]\n" + "ld1 {v1.b}[2], [a_ptr1]\n" + "ld1 {v2.b}[2], [a_ptr2]\n" + "ld1 {v3.b}[2], [a_ptr3]\n" + "9:\n" + "ldr q8, [%[b_ptr0]]\n" + "ldr q9, [%[b_ptr0], #0x10]\n" + "ldr q10, [%[b_ptr0], #0x20]\n" + "ldr q11, [%[b_ptr0], #0x30]\n" + ".word 0x6f80e110 // udot v16.4s, v8.16b, v0.4b[0]\n" + ".word 0x6f81e114 // udot v20.4s, v8.16b, v1.4b[0]\n" + ".word 0x6f82e118 // udot v24.4s, v8.16b, v2.4b[0]\n" + ".word 0x6f83e11c // udot v28.4s, v8.16b, v3.4b[0]\n" + ".word 0x6f80e131 // udot v17.4s, v9.16b, v0.4b[0]\n" + ".word 0x6f81e135 // udot v21.4s, v9.16b, v1.4b[0]\n" + ".word 0x6f82e139 // udot v25.4s, v9.16b, v2.4b[0]\n" + ".word 0x6f83e13d // udot v29.4s, v9.16b, v3.4b[0]\n" + ".word 0x6f80e152 // udot v18.4s, v10.16b, v0.4b[0]\n" + ".word 0x6f81e156 // udot v22.4s, v10.16b, v1.4b[0]\n" + ".word 0x6f82e15a // udot v26.4s, v10.16b, v2.4b[0]\n" + ".word 0x6f83e15e // udot v30.4s, v10.16b, v3.4b[0]\n" + ".word 0x6f80e173 // udot v19.4s, v11.16b, v0.4b[0]\n" + ".word 0x6f81e177 // udot v23.4s, v11.16b, v1.4b[0]\n" + ".word 0x6f82e17b // udot v27.4s, v11.16b, v2.4b[0]\n" + ".word 0x6f83e17f // udot v31.4s, v11.16b, v3.4b[0]\n" + "8:\n" + "str q16, [%[c_ptr0]]\n" + "str q17, [%[c_ptr0], #0x10]\n" + "str q18, [%[c_ptr0], #0x20]\n" + "str q19, [%[c_ptr0], #0x30]\n" + "add %[c_ptr0], %[c_ptr0], #0x40\n" + "str q20, [c_ptr1]\n" + "str q21, [c_ptr1, #0x10]\n" + "str q22, [c_ptr1, #0x20]\n" + "str q23, [c_ptr1, #0x30]\n" + "str q24, [c_ptr2]\n" + "str q25, [c_ptr2, #0x10]\n" + "str q26, [c_ptr2, #0x20]\n" + "str q27, [c_ptr2, #0x30]\n" + "str q28, [c_ptr3]\n" + "str q29, [c_ptr3, #0x10]\n" + "str q30, [c_ptr3, #0x20]\n" + "str q31, [c_ptr3, #0x30]\n" + ".unreq a_ptr1\n" + ".unreq a_ptr2\n" + ".unreq a_ptr3\n" + ".unreq c_ptr1\n" + ".unreq c_ptr2\n" + ".unreq c_ptr3\n" + : [a_ptr0] "+r" (a_ptr0), [b_ptr0] "+r" (b_ptr0), [c_ptr0] "+r" (c_ptr0), [loops] "+r" (loops), [regs] "+r" (regs), [blocks] "+r" (blocks), [odds] "+r" (odds) + : [betaptr] "r" (betaptr), [width] "r" (width), [beta0] "r" (beta0), [lda] "r" (ldab), [ldc] "r" (ldcb) + : "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x0", "x1", "x2", "x3", "x4", "x5", "cc", "memory" ); break; } @@ -1839,4 +1839,4 @@ void a64_hybrid_u8u32_dot_16x4(const uint8_t *A, int lda, const uint8_t *B, uint } // namespace arm_gemm -#endif // __aarch64__ \ No newline at end of file +#endif // __aarch64__ diff --git a/src/core/NEON/kernels/arm_gemm/kernels/a64_sgemm_12x8/generic.cpp b/src/core/NEON/kernels/arm_gemm/kernels/a64_sgemm_12x8/generic.cpp index 7169c8bdec..6c0b5b18f9 100644 --- a/src/core/NEON/kernels/arm_gemm/kernels/a64_sgemm_12x8/generic.cpp +++ b/src/core/NEON/kernels/arm_gemm/kernels/a64_sgemm_12x8/generic.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017-2018 ARM Limited. + * Copyright (c) 2017-2019 ARM Limited. * * SPDX-License-Identifier: MIT * @@ -39,7 +39,7 @@ namespace arm_gemm { -void a64_sgemm_asimd_12x8_jumps(const float *Apanel, const float *Bpanel, float *Cpanel, int ablocks, int bblocks, int K, long int row_jump=0, long int block_jump=0) { +void a64_sgemm_asimd_12x8(const float *Apanel, const float *Bpanel, float *Cpanel, int ablocks, int bblocks, int K) { const float *a_ptr = Apanel; float *c_ptr = Cpanel; @@ -112,7 +112,6 @@ void a64_sgemm_asimd_12x8_jumps(const float *Apanel, const float *Bpanel, float "fmla v9.4s , %[b0].4s, %[a0].s[1]\n" "ldr %q[b2], [%[b_ptr], #32]\n" "fmla v10.4s, %[b0].4s, %[a0].s[2]\n" - "add %[b_ptr], %[b_ptr], %[row_jump]\n" "fmla v11.4s, %[b0].4s, %[a0].s[3]\n" "ldr %q[a0a], [%[a_ptr], #32]\n" "fmla v12.4s, %[b0].4s, %[a1].s[0]\n" @@ -148,7 +147,6 @@ void a64_sgemm_asimd_12x8_jumps(const float *Apanel, const float *Bpanel, float "fmla v9.4s , %[b0].4s, %[a0a].s[1]\n" "ldr %q[a0], [%[a_ptr], #64]\n" "fmla v10.4s, %[b0].4s, %[a0a].s[2]\n" - "add %[b_ptr], %[b_ptr], %[row_jump]\n" "fmla v11.4s, %[b0].4s, %[a0a].s[3]\n" "fmla v12.4s, %[b0].4s, %[a1a].s[0]\n" "ldr %q[a1], [%[a_ptr], #80]\n" @@ -192,7 +190,6 @@ void a64_sgemm_asimd_12x8_jumps(const float *Apanel, const float *Bpanel, float "fmla v9.4s , %[b0].4s, %[a0].s[1]\n" "ldr %q[b2], [%[b_ptr], #32]\n" "fmla v10.4s, %[b0].4s, %[a0].s[2]\n" - "add %[b_ptr], %[b_ptr], %[row_jump]\n" "fmla v11.4s, %[b0].4s, %[a0].s[3]\n" "ldr %q[a0a], [%[a_ptr], #32]\n" "fmla v12.4s, %[b0].4s, %[a1].s[0]\n" @@ -224,11 +221,9 @@ void a64_sgemm_asimd_12x8_jumps(const float *Apanel, const float *Bpanel, float "ldr %q[b2], [%[b_ptr], #80]\n" "fmla v8.4s , %[b0].4s, %[a0a].s[0]\n" - "add %[b_ptr], %[b_ptr], %[block_jump]\n" "fmla v16.4s, %[b1].4s, %[a0a].s[0]\n" "add %[b_ptr], %[b_ptr], #96\n" "fmla v9.4s , %[b0].4s, %[a0a].s[1]\n" - "add %[b_ptr], %[b_ptr], %[row_jump]\n" "str q8, [%[c_ptr], #0]\n" "fmla v17.4s, %[b1].4s, %[a0a].s[1]\n" "str q16, [%[c_ptr], #16]\n" @@ -286,7 +281,6 @@ void a64_sgemm_asimd_12x8_jumps(const float *Apanel, const float *Bpanel, float "fmla v8.4s , %[b0].4s, %[a0].s[0]\n" "ldr %q[b2], [%[b_ptr], #32]\n" "fmla v16.4s, %[b1].4s, %[a0].s[0]\n" - "add %[b_ptr], %[b_ptr], %[row_jump]\n" "fmla v9.4s , %[b0].4s, %[a0].s[1]\n" "str q8, [%[c_ptr], #0]\n" "fmla v17.4s, %[b1].4s, %[a0].s[1]\n" @@ -349,7 +343,7 @@ void a64_sgemm_asimd_12x8_jumps(const float *Apanel, const float *Bpanel, float [a_ptr] "+r" (a_ptr), [b_ptr] "+r" (b_ptr), [c_ptr] "+r" (c_ptr), [a0] "+w" (a0), [a1] "+w" (a1), [a0a] "+w" (a0a), [a1a] "+w" (a1a), [b0] "+w" (b0), [b1] "+w" (b1), [b2] "+w" (b2), [k] "+r" (k) - : [oddk] "r" (oddk), [row_jump] "r" (row_jump), [block_jump] "r" (block_jump) + : [oddk] "r" (oddk) : "x20", "x21", "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "cc" ); @@ -357,10 +351,6 @@ void a64_sgemm_asimd_12x8_jumps(const float *Apanel, const float *Bpanel, float } } -void a64_sgemm_asimd_12x8(const float *Apanel, const float *Bpanel, float *Cpanel, int ablocks, int bblocks, int K) { - a64_sgemm_asimd_12x8_jumps(Apanel, Bpanel, Cpanel, ablocks, bblocks, K, 0, 0); -} - } // namespace arm_gemm -#endif \ No newline at end of file +#endif diff --git a/src/core/NEON/kernels/arm_gemm/kernels/a64_sgemm_nativeA_pretransposeB_16x4/generic.cpp b/src/core/NEON/kernels/arm_gemm/kernels/a64_sgemm_nativeA_pretransposeB_16x4/generic.cpp index b2516f8797..c51c8ff863 100644 --- a/src/core/NEON/kernels/arm_gemm/kernels/a64_sgemm_nativeA_pretransposeB_16x4/generic.cpp +++ b/src/core/NEON/kernels/arm_gemm/kernels/a64_sgemm_nativeA_pretransposeB_16x4/generic.cpp @@ -111,846 +111,846 @@ void a64_sgemm_nativeA_pretransposeB_16x4(const float *A, int lda, const float * unsigned int odds = oddones; __asm __volatile ( - "a0 .req v0\n" - "a1 .req v1\n" - "a2 .req v2\n" - "a3 .req v3\n" - "a0a .req v4\n" - "a1a .req v5\n" - "a2a .req v6\n" - "a3a .req v7\n" - "bb0 .req v8\n" - "bb1 .req v9\n" - "bb2 .req v10\n" - "bb3 .req v11\n" - "b0a .req v12\n" - "b1a .req v13\n" - "b2a .req v14\n" - "b3a .req v15\n" - - "a0q .req q0\n" - "a1q .req q1\n" - "a2q .req q2\n" - "a3q .req q3\n" - "a0aq .req q4\n" - "a1aq .req q5\n" - "a2aq .req q6\n" - "a3aq .req q7\n" - "b0q .req q8\n" - "b1q .req q9\n" - "b2q .req q10\n" - "b3q .req q11\n" - "b0aq .req q12\n" - "b1aq .req q13\n" - "b2aq .req q14\n" - "b3aq .req q15\n" - - "movi v16.4s, #0x0\n" - "ldr a0q, [%[a_ptr0]]\n" - "movi v17.4s, #0x0\n" - "ldr b0q, [%[b_ptr]]\n" - "movi v18.4s, #0x0\n" - "ldr b1q, [%[b_ptr], #16]\n" - "movi v19.4s, #0x0\n" - "ldr b2q, [%[b_ptr], #32]\n" - "movi v20.4s, #0x0\n" - "ldr b3q, [%[b_ptr], #48]\n" - "add %[b_ptr], %[b_ptr], #64\n" - "movi v21.4s, #0x0\n" - "ldr a1q, [%[a_ptr1]]\n" - "movi v22.4s, #0x0\n" - "ldr a2q, [%[a_ptr2]]\n" - "movi v23.4s, #0x0\n" - "ldr a3q, [%[a_ptr3]]\n" - "movi v24.4s, #0x0\n" - "ldr b0aq, [%[b_ptr]]\n" - "movi v25.4s, #0x0\n" - "ldr b1aq, [%[b_ptr], #16]\n" - "movi v26.4s, #0x0\n" - "ldr b2aq, [%[b_ptr], #32]\n" - "cbz %w[beta0], 5f\n" - "movi v27.4s, #0x0\n" - ASM_PREFETCH("[%[b_ptr], #0x40]") - "movi v28.4s, #0x0\n" - ASM_PREFETCH("[%[b_ptr], #0x80]") - "movi v29.4s, #0x0\n" - ASM_PREFETCH("[%[b_ptr], #0xC0]") - "movi v30.4s, #0x0\n" - ASM_PREFETCH("[%[b_ptr], #0x100]") - "movi v31.4s, #0x0\n" - ASM_PREFETCH("[%[b_ptr], #0x140]") - ASM_PREFETCH("[%[b_ptr], #0x180]") - ASM_PREFETCH("[%[b_ptr], #0x1C0]") - ASM_PREFETCH("[%[b_ptr], #0x200]") - - // Skip if no complete loops. - "cbz %w[loops], 4f\n" - "b 1f\n" - - // If beta is non-zero, need to load and multiply by beta - "5:\n" - "ld1r {v4.4s}, [%[betaptr]]\n" - "ldr q16, [%[c_ptr0]]\n" - "ldr q17, [%[c_ptr0], #16]\n" - "ldr q18, [%[c_ptr0], #32]\n" - "ldr q19, [%[c_ptr0], #48]\n" - - "ldr q20, [%[c_ptr1]]\n" - "fmul v16.4s, v16.4s, v4.4s\n" - "ldr q21, [%[c_ptr1], #16]\n" - "fmul v17.4s, v17.4s, v4.4s\n" - "ldr q22, [%[c_ptr1], #32]\n" - "fmul v18.4s, v18.4s, v4.4s\n" - "ldr q23, [%[c_ptr1], #48]\n" - "fmul v19.4s, v19.4s, v4.4s\n" - - "ldr q24, [%[c_ptr2]]\n" - "fmul v20.4s, v20.4s, v4.4s\n" - "ldr q25, [%[c_ptr2], #16]\n" - "fmul v21.4s, v21.4s, v4.4s\n" - "ldr q26, [%[c_ptr2], #32]\n" - "fmul v22.4s, v22.4s, v4.4s\n" - "ldr q27, [%[c_ptr2], #48]\n" - "fmul v23.4s, v23.4s, v4.4s\n" - - "ldr q28, [%[c_ptr3]]\n" - "fmul v24.4s, v24.4s, v4.4s\n" - ASM_PREFETCH("[%[b_ptr], #0x40]") - "ldr q29, [%[c_ptr3], #16]\n" - "fmul v25.4s, v25.4s, v4.4s\n" - ASM_PREFETCH("[%[b_ptr], #0x80]") - "ldr q30, [%[c_ptr3], #32]\n" - "fmul v26.4s, v26.4s, v4.4s\n" - ASM_PREFETCH("[%[b_ptr], #0xC0]") - "ldr q31, [%[c_ptr3], #48]\n" - "fmul v27.4s, v27.4s, v4.4s\n" - ASM_PREFETCH("[%[b_ptr], #0x100]") - - "fmul v28.4s, v28.4s, v4.4s\n" - ASM_PREFETCH("[%[b_ptr], #0x140]") - "fmul v29.4s, v29.4s, v4.4s\n" - ASM_PREFETCH("[%[b_ptr], #0x180]") - "fmul v30.4s, v30.4s, v4.4s\n" - ASM_PREFETCH("[%[b_ptr], #0x1C0]") - "fmul v31.4s, v31.4s, v4.4s\n" - ASM_PREFETCH("[%[b_ptr], #0x200]") - - "cbz %w[loops], 4f\n" - - "1:\n" - // Unroll 0 - "fmla v16.4s, bb0.4s, a0.s[0]\n" - ASM_PREFETCH("[%[b_ptr], #0x240]") - "fmla v20.4s, bb0.4s, a1.s[0]\n" - "ldr b3aq, [%[b_ptr], #48]\n" - "fmla v24.4s, bb0.4s, a2.s[0]\n" - "fmla v28.4s, bb0.4s, a3.s[0]\n" - "ldr b0q, [%[b_ptr], #64]\n" - - "fmla v17.4s, bb1.4s, a0.s[0]\n" - "fmla v21.4s, bb1.4s, a1.s[0]\n" - "ldr a0aq, [%[a_ptr0], #16]\n" - "fmla v25.4s, bb1.4s, a2.s[0]\n" - "fmla v29.4s, bb1.4s, a3.s[0]\n" - "ldr b1q, [%[b_ptr], #80]\n" - - "fmla v18.4s, bb2.4s, a0.s[0]\n" - "fmla v22.4s, bb2.4s, a1.s[0]\n" - "ldr a1aq, [%[a_ptr1], #16]\n" - "fmla v26.4s, bb2.4s, a2.s[0]\n" - "fmla v30.4s, bb2.4s, a3.s[0]\n" - "ldr b2q, [%[b_ptr], #96]\n" - - "fmla v19.4s, bb3.4s, a0.s[0]\n" - "fmla v23.4s, bb3.4s, a1.s[0]\n" - "ldr a2aq, [%[a_ptr2], #16]\n" - "fmla v27.4s, bb3.4s, a2.s[0]\n" - "fmla v31.4s, bb3.4s, a3.s[0]\n" - "ldr b3q, [%[b_ptr], #112]\n" - - // Unroll 1 - "fmla v16.4s, b0a.4s, a0.s[1]\n" - ASM_PREFETCH("[%[b_ptr], #0x280]") - "fmla v20.4s, b0a.4s, a1.s[1]\n" - "ldr a3aq, [%[a_ptr3], #16]\n" - "fmla v24.4s, b0a.4s, a2.s[1]\n" - "fmla v28.4s, b0a.4s, a3.s[1]\n" - "ldr b0aq, [%[b_ptr], #128]\n" - - "fmla v17.4s, b1a.4s, a0.s[1]\n" - "fmla v21.4s, b1a.4s, a1.s[1]\n" - "subs %w[loops], %w[loops], #1\n" - "fmla v25.4s, b1a.4s, a2.s[1]\n" - "fmla v29.4s, b1a.4s, a3.s[1]\n" - "ldr b1aq, [%[b_ptr], #144]\n" - - "fmla v18.4s, b2a.4s, a0.s[1]\n" - "fmla v22.4s, b2a.4s, a1.s[1]\n" - "fmla v26.4s, b2a.4s, a2.s[1]\n" - "fmla v30.4s, b2a.4s, a3.s[1]\n" - "ldr b2aq, [%[b_ptr], #160]\n" - - "fmla v19.4s, b3a.4s, a0.s[1]\n" - "fmla v23.4s, b3a.4s, a1.s[1]\n" - "fmla v27.4s, b3a.4s, a2.s[1]\n" - "fmla v31.4s, b3a.4s, a3.s[1]\n" - "ldr b3aq, [%[b_ptr], #176]\n" - - // Unroll 2 - "fmla v16.4s, bb0.4s, a0.s[2]\n" - ASM_PREFETCH("[%[b_ptr], #0x2C0]") - "fmla v20.4s, bb0.4s, a1.s[2]\n" - "fmla v24.4s, bb0.4s, a2.s[2]\n" - "fmla v28.4s, bb0.4s, a3.s[2]\n" - "ldr b0q, [%[b_ptr], #192]\n" - - "fmla v17.4s, bb1.4s, a0.s[2]\n" - "add %[a_ptr0], %[a_ptr0], #32\n" - "fmla v21.4s, bb1.4s, a1.s[2]\n" - "add %[a_ptr1], %[a_ptr1], %[a_incr1]\n" - "fmla v25.4s, bb1.4s, a2.s[2]\n" - "add %[a_ptr2], %[a_ptr2], %[a_incr2]\n" - "fmla v29.4s, bb1.4s, a3.s[2]\n" - "ldr b1q, [%[b_ptr], #208]\n" - - "fmla v18.4s, bb2.4s, a0.s[2]\n" - "add %[a_ptr3], %[a_ptr3], %[a_incr3]\n" - "fmla v22.4s, bb2.4s, a1.s[2]\n" - ASM_PREFETCH("[%[a_ptr0], #0x40]") - "fmla v26.4s, bb2.4s, a2.s[2]\n" - "fmla v30.4s, bb2.4s, a3.s[2]\n" - "ldr b2q, [%[b_ptr], #224]\n" - - "fmla v19.4s, bb3.4s, a0.s[2]\n" - "fmla v23.4s, bb3.4s, a1.s[2]\n" - ASM_PREFETCH("[%[a_ptr1], #0x40]") - "fmla v27.4s, bb3.4s, a2.s[2]\n" - "fmla v31.4s, bb3.4s, a3.s[2]\n" - "ldr b3q, [%[b_ptr], #240]\n" - - // Unroll 3 - "fmla v16.4s, b0a.4s, a0.s[3]\n" - "fmla v20.4s, b0a.4s, a1.s[3]\n" - "add %[b_ptr], %[b_ptr], #512\n" - "fmla v24.4s, b0a.4s, a2.s[3]\n" - "fmla v28.4s, b0a.4s, a3.s[3]\n" - "ldr b0aq, [%[b_ptr], #-256]\n" - - "fmla v17.4s, b1a.4s, a0.s[3]\n" - ASM_PREFETCH("[%[b_ptr], #0x100]") - "fmla v21.4s, b1a.4s, a1.s[3]\n" - "fmla v25.4s, b1a.4s, a2.s[3]\n" - "fmla v29.4s, b1a.4s, a3.s[3]\n" - "ldr b1aq, [%[b_ptr], #-240]\n" - - "fmla v18.4s, b2a.4s, a0.s[3]\n" - "fmla v22.4s, b2a.4s, a1.s[3]\n" - ASM_PREFETCH("[%[a_ptr2], #0x40]") - "fmla v26.4s, b2a.4s, a2.s[3]\n" - "fmla v30.4s, b2a.4s, a3.s[3]\n" - "ldr b2aq, [%[b_ptr], #-224]\n" - - "fmla v19.4s, b3a.4s, a0.s[3]\n" - "fmla v23.4s, b3a.4s, a1.s[3]\n" - "ldr a0q, [%[a_ptr0]]\n" - "fmla v27.4s, b3a.4s, a2.s[3]\n" - "fmla v31.4s, b3a.4s, a3.s[3]\n" - "ldr b3aq, [%[b_ptr], #-208]\n" - - // Unroll 4 - "fmla v16.4s, bb0.4s, a0a.s[0]\n" - "fmla v20.4s, bb0.4s, a1a.s[0]\n" - ASM_PREFETCH("[%[b_ptr], #0x140]") - "fmla v24.4s, bb0.4s, a2a.s[0]\n" - "fmla v28.4s, bb0.4s, a3a.s[0]\n" - "ldr b0q, [%[b_ptr], #-192]\n" - - "fmla v17.4s, bb1.4s, a0a.s[0]\n" - "fmla v21.4s, bb1.4s, a1a.s[0]\n" - "ldr a1q, [%[a_ptr1]]\n" - "fmla v25.4s, bb1.4s, a2a.s[0]\n" - "fmla v29.4s, bb1.4s, a3a.s[0]\n" - "ldr b1q, [%[b_ptr], #-176]\n" - - "fmla v18.4s, bb2.4s, a0a.s[0]\n" - "fmla v22.4s, bb2.4s, a1a.s[0]\n" - "ldr a2q, [%[a_ptr2]]\n" - "fmla v26.4s, bb2.4s, a2a.s[0]\n" - "fmla v30.4s, bb2.4s, a3a.s[0]\n" - "ldr b2q, [%[b_ptr], #-160]\n" - - "fmla v19.4s, bb3.4s, a0a.s[0]\n" - "fmla v23.4s, bb3.4s, a1a.s[0]\n" - "ldr a3q, [%[a_ptr3]]\n" - "fmla v27.4s, bb3.4s, a2a.s[0]\n" - "fmla v31.4s, bb3.4s, a3a.s[0]\n" - "ldr b3q, [%[b_ptr], #-144]\n" - - // Unroll 5 - "fmla v16.4s, b0a.4s, a0a.s[1]\n" - "fmla v20.4s, b0a.4s, a1a.s[1]\n" - ASM_PREFETCH("[%[b_ptr], #0x180]") - "fmla v24.4s, b0a.4s, a2a.s[1]\n" - "fmla v28.4s, b0a.4s, a3a.s[1]\n" - "ldr b0aq, [%[b_ptr], #-128]\n" - - "fmla v17.4s, b1a.4s, a0a.s[1]\n" - "fmla v21.4s, b1a.4s, a1a.s[1]\n" - ASM_PREFETCH("[%[a_ptr3], #0x40]") - "fmla v25.4s, b1a.4s, a2a.s[1]\n" - "fmla v29.4s, b1a.4s, a3a.s[1]\n" - "ldr b1aq, [%[b_ptr], #-112]\n" - - "fmla v18.4s, b2a.4s, a0a.s[1]\n" - "fmla v22.4s, b2a.4s, a1a.s[1]\n" - "fmla v26.4s, b2a.4s, a2a.s[1]\n" - "fmla v30.4s, b2a.4s, a3a.s[1]\n" - "ldr b2aq, [%[b_ptr], #-96]\n" - - "fmla v19.4s, b3a.4s, a0a.s[1]\n" - "fmla v23.4s, b3a.4s, a1a.s[1]\n" - "fmla v27.4s, b3a.4s, a2a.s[1]\n" - "fmla v31.4s, b3a.4s, a3a.s[1]\n" - "ldr b3aq, [%[b_ptr], #-80]\n" - - // Unroll 6 - "fmla v16.4s, bb0.4s, a0a.s[2]\n" - "fmla v20.4s, bb0.4s, a1a.s[2]\n" - ASM_PREFETCH("[%[b_ptr], #0x1C0]") - "fmla v24.4s, bb0.4s, a2a.s[2]\n" - "fmla v28.4s, bb0.4s, a3a.s[2]\n" - "ldr b0q, [%[b_ptr], #-64]\n" - - "fmla v17.4s, bb1.4s, a0a.s[2]\n" - "fmla v21.4s, bb1.4s, a1a.s[2]\n" - "fmla v25.4s, bb1.4s, a2a.s[2]\n" - "fmla v29.4s, bb1.4s, a3a.s[2]\n" - "ldr b1q, [%[b_ptr], #-48]\n" - - "fmla v18.4s, bb2.4s, a0a.s[2]\n" - "fmla v22.4s, bb2.4s, a1a.s[2]\n" - "fmla v26.4s, bb2.4s, a2a.s[2]\n" - "fmla v30.4s, bb2.4s, a3a.s[2]\n" - "ldr b2q, [%[b_ptr], #-32]\n" - - "fmla v19.4s, bb3.4s, a0a.s[2]\n" - "fmla v23.4s, bb3.4s, a1a.s[2]\n" - "fmla v27.4s, bb3.4s, a2a.s[2]\n" - "fmla v31.4s, bb3.4s, a3a.s[2]\n" - "ldr b3q, [%[b_ptr], #-16]\n" - - // Unroll 7 - "fmla v16.4s, b0a.4s, a0a.s[3]\n" - "fmla v20.4s, b0a.4s, a1a.s[3]\n" - "fmla v24.4s, b0a.4s, a2a.s[3]\n" - "fmla v28.4s, b0a.4s, a3a.s[3]\n" - "ldr b0aq, [%[b_ptr]]\n" - - "fmla v17.4s, b1a.4s, a0a.s[3]\n" - "fmla v21.4s, b1a.4s, a1a.s[3]\n" - ASM_PREFETCH("[%[b_ptr], #0x200]") - "fmla v25.4s, b1a.4s, a2a.s[3]\n" - "fmla v29.4s, b1a.4s, a3a.s[3]\n" - "ldr b1aq, [%[b_ptr], #16]\n" - - "fmla v18.4s, b2a.4s, a0a.s[3]\n" - "fmla v22.4s, b2a.4s, a1a.s[3]\n" - "fmla v26.4s, b2a.4s, a2a.s[3]\n" - "fmla v30.4s, b2a.4s, a3a.s[3]\n" - "ldr b2aq, [%[b_ptr], #32]\n" - - "fmla v19.4s, b3a.4s, a0a.s[3]\n" - "fmla v23.4s, b3a.4s, a1a.s[3]\n" - "fmla v27.4s, b3a.4s, a2a.s[3]\n" - "fmla v31.4s, b3a.4s, a3a.s[3]\n" - "bne 1b\n" - - // Skip to here - "4:\n" - - // Detached final iteration - // Unroll 0 - "fmla v16.4s, bb0.4s, a0.s[0]\n" - "fmla v20.4s, bb0.4s, a1.s[0]\n" - "ldr b3aq, [%[b_ptr], #48]\n" - "fmla v24.4s, bb0.4s, a2.s[0]\n" - "add %[b_ptr], %[b_ptr], #64\n" - "fmla v28.4s, bb0.4s, a3.s[0]\n" - "ldr b0q, [%[b_ptr]]\n" - - "fmla v17.4s, bb1.4s, a0.s[0]\n" - "cbnz %w[oddk], 2f\n" // Deal with odd K before we load a0a - "fmla v21.4s, bb1.4s, a1.s[0]\n" - "ldr a0aq, [%[a_ptr0], #16]\n" - "fmla v25.4s, bb1.4s, a2.s[0]\n" - "fmla v29.4s, bb1.4s, a3.s[0]\n" - "ldr b1q, [%[b_ptr], #16]\n" - - "fmla v18.4s, bb2.4s, a0.s[0]\n" - "fmla v22.4s, bb2.4s, a1.s[0]\n" - "ldr a1aq, [%[a_ptr1], #16]\n" - "fmla v26.4s, bb2.4s, a2.s[0]\n" - "fmla v30.4s, bb2.4s, a3.s[0]\n" - "ldr b2q, [%[b_ptr], #32]\n" - - "fmla v19.4s, bb3.4s, a0.s[0]\n" - "fmla v23.4s, bb3.4s, a1.s[0]\n" - "ldr a2aq, [%[a_ptr2], #16]\n" - "fmla v27.4s, bb3.4s, a2.s[0]\n" - "fmla v31.4s, bb3.4s, a3.s[0]\n" - "ldr b3q, [%[b_ptr], #48]\n" - - // Unroll 1 - "fmla v16.4s, b0a.4s, a0.s[1]\n" - "add %[b_ptr], %[b_ptr], #64\n" - "fmla v20.4s, b0a.4s, a1.s[1]\n" - "ldr a3aq, [%[a_ptr3], #16]\n" - "fmla v24.4s, b0a.4s, a2.s[1]\n" - "fmla v28.4s, b0a.4s, a3.s[1]\n" - "ldr b0aq, [%[b_ptr]]\n" - - "fmla v17.4s, b1a.4s, a0.s[1]\n" - "add %[a_ptr0], %[a_ptr0], #32\n" - "fmla v21.4s, b1a.4s, a1.s[1]\n" - "add %[a_ptr1], %[a_ptr1], %[a_incr1]\n" - "fmla v25.4s, b1a.4s, a2.s[1]\n" - "add %[a_ptr2], %[a_ptr2], %[a_incr2]\n" - "fmla v29.4s, b1a.4s, a3.s[1]\n" - "ldr b1aq, [%[b_ptr], #16]\n" - - "fmla v18.4s, b2a.4s, a0.s[1]\n" - "fmla v22.4s, b2a.4s, a1.s[1]\n" - "add %[a_ptr3], %[a_ptr3], %[a_incr3]\n" - "fmla v26.4s, b2a.4s, a2.s[1]\n" - "fmla v30.4s, b2a.4s, a3.s[1]\n" - "ldr b2aq, [%[b_ptr], #32]\n" - - "fmla v19.4s, b3a.4s, a0.s[1]\n" - "fmla v23.4s, b3a.4s, a1.s[1]\n" - "fmla v27.4s, b3a.4s, a2.s[1]\n" - "fmla v31.4s, b3a.4s, a3.s[1]\n" - "ldr b3aq, [%[b_ptr], #48]\n" - - // Unroll 2 - "fmla v16.4s, bb0.4s, a0.s[2]\n" - "fmla v20.4s, bb0.4s, a1.s[2]\n" - "add %[b_ptr], %[b_ptr], #64\n" - "fmla v24.4s, bb0.4s, a2.s[2]\n" - "fmla v28.4s, bb0.4s, a3.s[2]\n" - "ldr b0q, [%[b_ptr]]\n" - - "fmla v17.4s, bb1.4s, a0.s[2]\n" - "fmla v21.4s, bb1.4s, a1.s[2]\n" - "fmla v25.4s, bb1.4s, a2.s[2]\n" - "fmla v29.4s, bb1.4s, a3.s[2]\n" - "ldr b1q, [%[b_ptr], #16]\n" - - "fmla v18.4s, bb2.4s, a0.s[2]\n" - "fmla v22.4s, bb2.4s, a1.s[2]\n" - "fmla v26.4s, bb2.4s, a2.s[2]\n" - "fmla v30.4s, bb2.4s, a3.s[2]\n" - "ldr b2q, [%[b_ptr], #32]\n" - - "fmla v19.4s, bb3.4s, a0.s[2]\n" - "fmla v23.4s, bb3.4s, a1.s[2]\n" - "fmla v27.4s, bb3.4s, a2.s[2]\n" - "fmla v31.4s, bb3.4s, a3.s[2]\n" - "ldr b3q, [%[b_ptr], #48]\n" - - // Unroll 3 - "fmla v16.4s, b0a.4s, a0.s[3]\n" - "fmla v20.4s, b0a.4s, a1.s[3]\n" - "add %[b_ptr], %[b_ptr], #64\n" - "fmla v24.4s, b0a.4s, a2.s[3]\n" - "fmla v28.4s, b0a.4s, a3.s[3]\n" - "ldr b0aq, [%[b_ptr]]\n" - - "fmla v17.4s, b1a.4s, a0.s[3]\n" - "fmla v21.4s, b1a.4s, a1.s[3]\n" - "fmla v25.4s, b1a.4s, a2.s[3]\n" - "fmla v29.4s, b1a.4s, a3.s[3]\n" - "ldr b1aq, [%[b_ptr], #16]\n" - - "fmla v18.4s, b2a.4s, a0.s[3]\n" - "fmla v22.4s, b2a.4s, a1.s[3]\n" - "fmla v26.4s, b2a.4s, a2.s[3]\n" - "fmla v30.4s, b2a.4s, a3.s[3]\n" - "ldr b2aq, [%[b_ptr], #32]\n" - - "fmla v19.4s, b3a.4s, a0.s[3]\n" - "fmla v23.4s, b3a.4s, a1.s[3]\n" - "fmla v27.4s, b3a.4s, a2.s[3]\n" - "fmla v31.4s, b3a.4s, a3.s[3]\n" - "ldr b3aq, [%[b_ptr], #48]\n" - - // Unroll 4 - "fmla v16.4s, bb0.4s, a0a.s[0]\n" - "fmla v20.4s, bb0.4s, a1a.s[0]\n" - "add %[b_ptr], %[b_ptr], #64\n" - "fmla v24.4s, bb0.4s, a2a.s[0]\n" - "fmla v28.4s, bb0.4s, a3a.s[0]\n" - "ldr b0q, [%[b_ptr]]\n" - - "fmla v17.4s, bb1.4s, a0a.s[0]\n" - "fmla v21.4s, bb1.4s, a1a.s[0]\n" - "fmla v25.4s, bb1.4s, a2a.s[0]\n" - "fmla v29.4s, bb1.4s, a3a.s[0]\n" - "ldr b1q, [%[b_ptr], #16]\n" - - "fmla v18.4s, bb2.4s, a0a.s[0]\n" - "fmla v22.4s, bb2.4s, a1a.s[0]\n" - "fmla v26.4s, bb2.4s, a2a.s[0]\n" - "fmla v30.4s, bb2.4s, a3a.s[0]\n" - "ldr b2q, [%[b_ptr], #32]\n" - - "fmla v19.4s, bb3.4s, a0a.s[0]\n" - "fmla v23.4s, bb3.4s, a1a.s[0]\n" - "fmla v27.4s, bb3.4s, a2a.s[0]\n" - "fmla v31.4s, bb3.4s, a3a.s[0]\n" - "ldr b3q, [%[b_ptr], #48]\n" - - // Unroll 5 - "fmla v16.4s, b0a.4s, a0a.s[1]\n" - "fmla v20.4s, b0a.4s, a1a.s[1]\n" - "add %[b_ptr], %[b_ptr], #64\n" - "fmla v24.4s, b0a.4s, a2a.s[1]\n" - "fmla v28.4s, b0a.4s, a3a.s[1]\n" - "ldr b0aq, [%[b_ptr]]\n" - - "fmla v17.4s, b1a.4s, a0a.s[1]\n" - "fmla v21.4s, b1a.4s, a1a.s[1]\n" - "fmla v25.4s, b1a.4s, a2a.s[1]\n" - "fmla v29.4s, b1a.4s, a3a.s[1]\n" - "ldr b1aq, [%[b_ptr], #16]\n" - - "fmla v18.4s, b2a.4s, a0a.s[1]\n" - "fmla v22.4s, b2a.4s, a1a.s[1]\n" - "fmla v26.4s, b2a.4s, a2a.s[1]\n" - "fmla v30.4s, b2a.4s, a3a.s[1]\n" - "ldr b2aq, [%[b_ptr], #32]\n" - - "fmla v19.4s, b3a.4s, a0a.s[1]\n" - "fmla v23.4s, b3a.4s, a1a.s[1]\n" - "fmla v27.4s, b3a.4s, a2a.s[1]\n" - "fmla v31.4s, b3a.4s, a3a.s[1]\n" - "ldr b3aq, [%[b_ptr], #48]\n" - - // Unroll 6 - "fmla v16.4s, bb0.4s, a0a.s[2]\n" - "add %[b_ptr], %[b_ptr], #64\n" - "fmla v20.4s, bb0.4s, a1a.s[2]\n" - ASM_PREFETCH("[%[c_ptr0], #0x40]") - "fmla v24.4s, bb0.4s, a2a.s[2]\n" - "fmla v28.4s, bb0.4s, a3a.s[2]\n" - - "fmla v17.4s, bb1.4s, a0a.s[2]\n" - "fmla v21.4s, bb1.4s, a1a.s[2]\n" - ASM_PREFETCH("[%[c_ptr1], #0x40]") - "fmla v25.4s, bb1.4s, a2a.s[2]\n" - "fmla v29.4s, bb1.4s, a3a.s[2]\n" - - "fmla v18.4s, bb2.4s, a0a.s[2]\n" - "fmla v22.4s, bb2.4s, a1a.s[2]\n" - ASM_PREFETCH("[%[c_ptr2], #0x40]") - "fmla v26.4s, bb2.4s, a2a.s[2]\n" - "fmla v30.4s, bb2.4s, a3a.s[2]\n" - - "fmla v19.4s, bb3.4s, a0a.s[2]\n" - "fmla v23.4s, bb3.4s, a1a.s[2]\n" - ASM_PREFETCH("[%[c_ptr3], #0x40]") - "fmla v27.4s, bb3.4s, a2a.s[2]\n" - "fmla v31.4s, bb3.4s, a3a.s[2]\n" - - // Unroll 7 - "fmla v16.4s, b0a.4s, a0a.s[3]\n" - "fmla v17.4s, b1a.4s, a0a.s[3]\n" - "fmla v18.4s, b2a.4s, a0a.s[3]\n" - "fmla v19.4s, b3a.4s, a0a.s[3]\n" - "cbnz %w[odds], 6f\n" - - "fmla v20.4s, b0a.4s, a1a.s[3]\n" - "str q16, [%[c_ptr0]]\n" - "fmla v21.4s, b1a.4s, a1a.s[3]\n" - "str q17, [%[c_ptr0], #16]\n" - "fmla v22.4s, b2a.4s, a1a.s[3]\n" - "str q18, [%[c_ptr0], #32]\n" - "fmla v23.4s, b3a.4s, a1a.s[3]\n" - "str q19, [%[c_ptr0], #48]\n" - - "fmla v24.4s, b0a.4s, a2a.s[3]\n" - "str q20, [%[c_ptr1]]\n" - "fmla v25.4s, b1a.4s, a2a.s[3]\n" - "str q21, [%[c_ptr1], #16]\n" - "fmla v26.4s, b2a.4s, a2a.s[3]\n" - "str q22, [%[c_ptr1], #32]\n" - "fmla v27.4s, b3a.4s, a2a.s[3]\n" - "str q23, [%[c_ptr1], #48]\n" - - "fmla v28.4s, b0a.4s, a3a.s[3]\n" - "str q24, [%[c_ptr2]]\n" - "fmla v29.4s, b1a.4s, a3a.s[3]\n" - "str q25, [%[c_ptr2], #16]\n" - "fmla v30.4s, b2a.4s, a3a.s[3]\n" - "str q26, [%[c_ptr2], #32]\n" - "fmla v31.4s, b3a.4s, a3a.s[3]\n" - "str q27, [%[c_ptr2], #48]\n" - "b 3f\n" - - // Odd K case: Just do 4 more. - "2:\n" - "fmla v21.4s, bb1.4s, a1.s[0]\n" - "add %[a_ptr0], %[a_ptr0], #16\n" - "fmla v25.4s, bb1.4s, a2.s[0]\n" - "add %[a_ptr1], %[a_ptr1], #16\n" - "fmla v29.4s, bb1.4s, a3.s[0]\n" - "ldr b1q, [%[b_ptr], #16]\n" - - "fmla v18.4s, bb2.4s, a0.s[0]\n" - "add %[a_ptr2], %[a_ptr2], #16\n" - "fmla v22.4s, bb2.4s, a1.s[0]\n" - "add %[a_ptr3], %[a_ptr3], #16\n" - "fmla v26.4s, bb2.4s, a2.s[0]\n" - "fmla v30.4s, bb2.4s, a3.s[0]\n" - "ldr b2q, [%[b_ptr], #32]\n" - - "fmla v19.4s, bb3.4s, a0.s[0]\n" - "fmla v23.4s, bb3.4s, a1.s[0]\n" - "fmla v27.4s, bb3.4s, a2.s[0]\n" - "fmla v31.4s, bb3.4s, a3.s[0]\n" - "ldr b3q, [%[b_ptr], #48]\n" - - // Unroll 1 - "fmla v16.4s, b0a.4s, a0.s[1]\n" - "add %[b_ptr], %[b_ptr], #64\n" - "fmla v20.4s, b0a.4s, a1.s[1]\n" - "fmla v24.4s, b0a.4s, a2.s[1]\n" - "fmla v28.4s, b0a.4s, a3.s[1]\n" - "ldr b0aq, [%[b_ptr]]\n" - - "fmla v17.4s, b1a.4s, a0.s[1]\n" - "fmla v21.4s, b1a.4s, a1.s[1]\n" - "fmla v25.4s, b1a.4s, a2.s[1]\n" - "fmla v29.4s, b1a.4s, a3.s[1]\n" - "ldr b1aq, [%[b_ptr], #16]\n" - - "fmla v18.4s, b2a.4s, a0.s[1]\n" - "fmla v22.4s, b2a.4s, a1.s[1]\n" - "fmla v26.4s, b2a.4s, a2.s[1]\n" - "fmla v30.4s, b2a.4s, a3.s[1]\n" - "ldr b2aq, [%[b_ptr], #32]\n" - - "fmla v19.4s, b3a.4s, a0.s[1]\n" - "fmla v23.4s, b3a.4s, a1.s[1]\n" - "fmla v27.4s, b3a.4s, a2.s[1]\n" - "fmla v31.4s, b3a.4s, a3.s[1]\n" - "ldr b3aq, [%[b_ptr], #48]\n" - - // Unroll 2 - "fmla v16.4s, bb0.4s, a0.s[2]\n" - "add %[b_ptr], %[b_ptr], #64\n" - "fmla v20.4s, bb0.4s, a1.s[2]\n" - ASM_PREFETCH("[%[c_ptr0], #0x40]") - "fmla v24.4s, bb0.4s, a2.s[2]\n" - "fmla v28.4s, bb0.4s, a3.s[2]\n" - - "fmla v17.4s, bb1.4s, a0.s[2]\n" - "fmla v21.4s, bb1.4s, a1.s[2]\n" - ASM_PREFETCH("[%[c_ptr1], #0x40]") - "fmla v25.4s, bb1.4s, a2.s[2]\n" - "fmla v29.4s, bb1.4s, a3.s[2]\n" - - "fmla v18.4s, bb2.4s, a0.s[2]\n" - "fmla v22.4s, bb2.4s, a1.s[2]\n" - ASM_PREFETCH("[%[c_ptr2], #0x40]") - "fmla v26.4s, bb2.4s, a2.s[2]\n" - "fmla v30.4s, bb2.4s, a3.s[2]\n" - - "fmla v19.4s, bb3.4s, a0.s[2]\n" - "fmla v23.4s, bb3.4s, a1.s[2]\n" - ASM_PREFETCH("[%[c_ptr3], #0x40]") - "fmla v27.4s, bb3.4s, a2.s[2]\n" - "fmla v31.4s, bb3.4s, a3.s[2]\n" - - // Unroll 3 - "fmla v16.4s, b0a.4s, a0.s[3]\n" - "fmla v17.4s, b1a.4s, a0.s[3]\n" - "fmla v18.4s, b2a.4s, a0.s[3]\n" - "fmla v19.4s, b3a.4s, a0.s[3]\n" - "cbnz %w[odds], 7f\n" - - "fmla v20.4s, b0a.4s, a1.s[3]\n" - "str q16, [%[c_ptr0]]\n" - "fmla v21.4s, b1a.4s, a1.s[3]\n" - "str q17, [%[c_ptr0], #16]\n" - "fmla v22.4s, b2a.4s, a1.s[3]\n" - "str q18, [%[c_ptr0], #32]\n" - "fmla v23.4s, b3a.4s, a1.s[3]\n" - "str q19, [%[c_ptr0], #48]\n" - - "fmla v24.4s, b0a.4s, a2.s[3]\n" - "str q20, [%[c_ptr1]]\n" - "fmla v25.4s, b1a.4s, a2.s[3]\n" - "str q21, [%[c_ptr1], #16]\n" - "fmla v26.4s, b2a.4s, a2.s[3]\n" - "str q22, [%[c_ptr1], #32]\n" - "fmla v27.4s, b3a.4s, a2.s[3]\n" - "str q23, [%[c_ptr1], #48]\n" - - "fmla v28.4s, b0a.4s, a3.s[3]\n" - "str q24, [%[c_ptr2]]\n" - "fmla v29.4s, b1a.4s, a3.s[3]\n" - "str q25, [%[c_ptr2], #16]\n" - "fmla v30.4s, b2a.4s, a3.s[3]\n" - "str q26, [%[c_ptr2], #32]\n" - "fmla v31.4s, b3a.4s, a3.s[3]\n" - "str q27, [%[c_ptr2], #48]\n" - "b 3f\n" - - // "Odd ones" - lead in from even - "6:\n" - "fmla v20.4s, b0a.4s, a1a.s[3]\n" - "fmla v21.4s, b1a.4s, a1a.s[3]\n" - "ldr b0q, [%[b_ptr]]\n" - "fmla v22.4s, b2a.4s, a1a.s[3]\n" - "subs %w[odds], %w[odds], #1\n" - "fmla v23.4s, b3a.4s, a1a.s[3]\n" - "ldr b1q, [%[b_ptr], #16]\n" - - "fmla v24.4s, b0a.4s, a2a.s[3]\n" - "fmla v25.4s, b1a.4s, a2a.s[3]\n" - "ldr b2q, [%[b_ptr], #32]\n" - "fmla v26.4s, b2a.4s, a2a.s[3]\n" - "fmla v27.4s, b3a.4s, a2a.s[3]\n" - "ldr b3q, [%[b_ptr], #48]\n" - - "fmla v28.4s, b0a.4s, a3a.s[3]\n" - "ld1r {a0.4s}, [%[a_ptr0]], #4\n" - "fmla v29.4s, b1a.4s, a3a.s[3]\n" - "fmla v30.4s, b2a.4s, a3a.s[3]\n" - "ld1r {a1.4s}, [%[a_ptr1]], #4\n" - "fmla v31.4s, b3a.4s, a3a.s[3]\n" - - "fmla v16.4s, bb0.4s, a0.4s\n" - "beq 9f\n" - "b 8f\n" - - // "Odd ones" - lead in from odd - "7:\n" - "fmla v20.4s, b0a.4s, a1.s[3]\n" - "subs %w[odds], %w[odds], #1\n" - "fmla v21.4s, b1a.4s, a1.s[3]\n" - "ldr b0q, [%[b_ptr]]\n" - "fmla v22.4s, b2a.4s, a1.s[3]\n" - "fmla v23.4s, b3a.4s, a1.s[3]\n" - "ldr b1q, [%[b_ptr], #16]\n" - - "fmla v24.4s, b0a.4s, a2.s[3]\n" - "fmla v25.4s, b1a.4s, a2.s[3]\n" - "ldr b2q, [%[b_ptr], #32]\n" - "fmla v26.4s, b2a.4s, a2.s[3]\n" - "fmla v27.4s, b3a.4s, a2.s[3]\n" - "ldr b3q, [%[b_ptr], #48]\n" - - "fmla v28.4s, b0a.4s, a3.s[3]\n" - "ld1r {a0.4s}, [%[a_ptr0]], #4\n" - "fmla v29.4s, b1a.4s, a3.s[3]\n" - "fmla v30.4s, b2a.4s, a3.s[3]\n" - "ld1r {a1.4s}, [%[a_ptr1]], #4\n" - "fmla v31.4s, b3a.4s, a3.s[3]\n" - - "fmla v16.4s, bb0.4s, a0.4s\n" - "beq 9f\n" - - // "Odd ones" - loop - "8:\n" - "fmla v17.4s, bb1.4s, a0.4s\n" - "ld1r {a2.4s}, [%[a_ptr2]], #4\n" - "fmla v18.4s, bb2.4s, a0.4s\n" - "add %[b_ptr], %[b_ptr], #64\n" - "fmla v19.4s, bb3.4s, a0.4s\n" - "ld1r {a3.4s}, [%[a_ptr3]], #4\n" - - "fmla v20.4s, bb0.4s, a1.4s\n" - "subs %w[odds], %w[odds], #1\n" - "fmla v21.4s, bb1.4s, a1.4s\n" - "ld1r {a0.4s}, [%[a_ptr0]], #4\n" - "fmla v22.4s, bb2.4s, a1.4s\n" - "fmla v23.4s, bb3.4s, a1.4s\n" - "ld1r {a1.4s}, [%[a_ptr1]], #4\n" - - "fmla v24.4s, bb0.4s, a2.4s\n" - "fmla v28.4s, bb0.4s, a3.4s\n" - "ldr b0q, [%[b_ptr]]\n" - "fmla v25.4s, bb1.4s, a2.4s\n" - "fmla v29.4s, bb1.4s, a3.4s\n" - "ldr b1q, [%[b_ptr], #16]\n" - - "fmla v26.4s, bb2.4s, a2.4s\n" - "fmla v30.4s, bb2.4s, a3.4s\n" - "ldr b2q, [%[b_ptr], #32]\n" - "fmla v27.4s, bb3.4s, a2.4s\n" - "fmla v31.4s, bb3.4s, a3.4s\n" - "ldr b3q, [%[b_ptr], #48]\n" - "fmla v16.4s, bb0.4s, a0.4s\n" - "bne 8b\n" - - // "Odd ones" - detached final iteration - "9:\n" - "fmla v17.4s, bb1.4s, a0.4s\n" - "ld1r {a2.4s}, [%[a_ptr2]], #4\n" - "fmla v18.4s, bb2.4s, a0.4s\n" - "add %[b_ptr], %[b_ptr], #64\n" - "fmla v19.4s, bb3.4s, a0.4s\n" - "ld1r {a3.4s}, [%[a_ptr3]], #4\n" - - "fmla v20.4s, bb0.4s, a1.4s\n" - "str q16, [%[c_ptr0]]\n" - "fmla v21.4s, bb1.4s, a1.4s\n" - "str q17, [%[c_ptr0], #16]\n" - "fmla v22.4s, bb2.4s, a1.4s\n" - "str q18, [%[c_ptr0], #32]\n" - "fmla v23.4s, bb3.4s, a1.4s\n" - "str q19, [%[c_ptr0], #48]\n" - - "fmla v24.4s, bb0.4s, a2.4s\n" - "str q20, [%[c_ptr1]]\n" - "fmla v25.4s, bb1.4s, a2.4s\n" - "str q21, [%[c_ptr1], #16]\n" - "fmla v26.4s, bb2.4s, a2.4s\n" - "str q22, [%[c_ptr1], #32]\n" - "fmla v27.4s, bb3.4s, a2.4s\n" - "str q23, [%[c_ptr1], #48]\n" - - "fmla v28.4s, bb0.4s, a3.4s\n" - "str q24, [%[c_ptr2]]\n" - "fmla v29.4s, bb1.4s, a3.4s\n" - "str q25, [%[c_ptr2], #16]\n" - "fmla v30.4s, bb2.4s, a3.4s\n" - "str q26, [%[c_ptr2], #32]\n" - "fmla v31.4s, bb3.4s, a3.4s\n" - "str q27, [%[c_ptr2], #48]\n" - - "3:\n" - "str q28, [%[c_ptr3]]\n" - // Increment C pointers for next loop - this looks odd if we - // are using the result buffer, but it's OK as using the - // result buffer implies there will be no next loop. - "add %[c_ptr0], %[c_ptr0], #64\n" - "str q29, [%[c_ptr3], #16]\n" - "add %[c_ptr1], %[c_ptr1], %[a_incr1], LSL #1\n" - "str q30, [%[c_ptr3], #32]\n" - "add %[c_ptr2], %[c_ptr2], %[a_incr2], LSL #1\n" - "str q31, [%[c_ptr3], #48]\n" - "add %[c_ptr3], %[c_ptr3], %[a_incr3], LSL #1\n" + "a0 .req v0\n" + "a1 .req v1\n" + "a2 .req v2\n" + "a3 .req v3\n" + "a0a .req v4\n" + "a1a .req v5\n" + "a2a .req v6\n" + "a3a .req v7\n" + "bb0 .req v8\n" + "bb1 .req v9\n" + "bb2 .req v10\n" + "bb3 .req v11\n" + "b0a .req v12\n" + "b1a .req v13\n" + "b2a .req v14\n" + "b3a .req v15\n" + + "a0q .req q0\n" + "a1q .req q1\n" + "a2q .req q2\n" + "a3q .req q3\n" + "a0aq .req q4\n" + "a1aq .req q5\n" + "a2aq .req q6\n" + "a3aq .req q7\n" + "b0q .req q8\n" + "b1q .req q9\n" + "b2q .req q10\n" + "b3q .req q11\n" + "b0aq .req q12\n" + "b1aq .req q13\n" + "b2aq .req q14\n" + "b3aq .req q15\n" + + "movi v16.4s, #0x0\n" + "ldr a0q, [%[a_ptr0]]\n" + "movi v17.4s, #0x0\n" + "ldr b0q, [%[b_ptr]]\n" + "movi v18.4s, #0x0\n" + "ldr b1q, [%[b_ptr], #16]\n" + "movi v19.4s, #0x0\n" + "ldr b2q, [%[b_ptr], #32]\n" + "movi v20.4s, #0x0\n" + "ldr b3q, [%[b_ptr], #48]\n" + "add %[b_ptr], %[b_ptr], #64\n" + "movi v21.4s, #0x0\n" + "ldr a1q, [%[a_ptr1]]\n" + "movi v22.4s, #0x0\n" + "ldr a2q, [%[a_ptr2]]\n" + "movi v23.4s, #0x0\n" + "ldr a3q, [%[a_ptr3]]\n" + "movi v24.4s, #0x0\n" + "ldr b0aq, [%[b_ptr]]\n" + "movi v25.4s, #0x0\n" + "ldr b1aq, [%[b_ptr], #16]\n" + "movi v26.4s, #0x0\n" + "ldr b2aq, [%[b_ptr], #32]\n" + "cbz %w[beta0], 5f\n" + "movi v27.4s, #0x0\n" + ASM_PREFETCH("[%[b_ptr], #0x40]") + "movi v28.4s, #0x0\n" + ASM_PREFETCH("[%[b_ptr], #0x80]") + "movi v29.4s, #0x0\n" + ASM_PREFETCH("[%[b_ptr], #0xC0]") + "movi v30.4s, #0x0\n" + ASM_PREFETCH("[%[b_ptr], #0x100]") + "movi v31.4s, #0x0\n" + ASM_PREFETCH("[%[b_ptr], #0x140]") + ASM_PREFETCH("[%[b_ptr], #0x180]") + ASM_PREFETCH("[%[b_ptr], #0x1C0]") + ASM_PREFETCH("[%[b_ptr], #0x200]") + + // Skip if no complete loops. + "cbz %w[loops], 4f\n" + "b 1f\n" + + // If beta is non-zero, need to load and multiply by beta + "5:\n" + "ld1r {v4.4s}, [%[betaptr]]\n" + "ldr q16, [%[c_ptr0]]\n" + "ldr q17, [%[c_ptr0], #16]\n" + "ldr q18, [%[c_ptr0], #32]\n" + "ldr q19, [%[c_ptr0], #48]\n" + + "ldr q20, [%[c_ptr1]]\n" + "fmul v16.4s, v16.4s, v4.4s\n" + "ldr q21, [%[c_ptr1], #16]\n" + "fmul v17.4s, v17.4s, v4.4s\n" + "ldr q22, [%[c_ptr1], #32]\n" + "fmul v18.4s, v18.4s, v4.4s\n" + "ldr q23, [%[c_ptr1], #48]\n" + "fmul v19.4s, v19.4s, v4.4s\n" + + "ldr q24, [%[c_ptr2]]\n" + "fmul v20.4s, v20.4s, v4.4s\n" + "ldr q25, [%[c_ptr2], #16]\n" + "fmul v21.4s, v21.4s, v4.4s\n" + "ldr q26, [%[c_ptr2], #32]\n" + "fmul v22.4s, v22.4s, v4.4s\n" + "ldr q27, [%[c_ptr2], #48]\n" + "fmul v23.4s, v23.4s, v4.4s\n" + + "ldr q28, [%[c_ptr3]]\n" + "fmul v24.4s, v24.4s, v4.4s\n" + ASM_PREFETCH("[%[b_ptr], #0x40]") + "ldr q29, [%[c_ptr3], #16]\n" + "fmul v25.4s, v25.4s, v4.4s\n" + ASM_PREFETCH("[%[b_ptr], #0x80]") + "ldr q30, [%[c_ptr3], #32]\n" + "fmul v26.4s, v26.4s, v4.4s\n" + ASM_PREFETCH("[%[b_ptr], #0xC0]") + "ldr q31, [%[c_ptr3], #48]\n" + "fmul v27.4s, v27.4s, v4.4s\n" + ASM_PREFETCH("[%[b_ptr], #0x100]") + + "fmul v28.4s, v28.4s, v4.4s\n" + ASM_PREFETCH("[%[b_ptr], #0x140]") + "fmul v29.4s, v29.4s, v4.4s\n" + ASM_PREFETCH("[%[b_ptr], #0x180]") + "fmul v30.4s, v30.4s, v4.4s\n" + ASM_PREFETCH("[%[b_ptr], #0x1C0]") + "fmul v31.4s, v31.4s, v4.4s\n" + ASM_PREFETCH("[%[b_ptr], #0x200]") + + "cbz %w[loops], 4f\n" + + "1:\n" + // Unroll 0 + "fmla v16.4s, bb0.4s, a0.s[0]\n" + ASM_PREFETCH("[%[b_ptr], #0x240]") + "fmla v20.4s, bb0.4s, a1.s[0]\n" + "ldr b3aq, [%[b_ptr], #48]\n" + "fmla v24.4s, bb0.4s, a2.s[0]\n" + "fmla v28.4s, bb0.4s, a3.s[0]\n" + "ldr b0q, [%[b_ptr], #64]\n" + + "fmla v17.4s, bb1.4s, a0.s[0]\n" + "fmla v21.4s, bb1.4s, a1.s[0]\n" + "ldr a0aq, [%[a_ptr0], #16]\n" + "fmla v25.4s, bb1.4s, a2.s[0]\n" + "fmla v29.4s, bb1.4s, a3.s[0]\n" + "ldr b1q, [%[b_ptr], #80]\n" + + "fmla v18.4s, bb2.4s, a0.s[0]\n" + "fmla v22.4s, bb2.4s, a1.s[0]\n" + "ldr a1aq, [%[a_ptr1], #16]\n" + "fmla v26.4s, bb2.4s, a2.s[0]\n" + "fmla v30.4s, bb2.4s, a3.s[0]\n" + "ldr b2q, [%[b_ptr], #96]\n" + + "fmla v19.4s, bb3.4s, a0.s[0]\n" + "fmla v23.4s, bb3.4s, a1.s[0]\n" + "ldr a2aq, [%[a_ptr2], #16]\n" + "fmla v27.4s, bb3.4s, a2.s[0]\n" + "fmla v31.4s, bb3.4s, a3.s[0]\n" + "ldr b3q, [%[b_ptr], #112]\n" + + // Unroll 1 + "fmla v16.4s, b0a.4s, a0.s[1]\n" + ASM_PREFETCH("[%[b_ptr], #0x280]") + "fmla v20.4s, b0a.4s, a1.s[1]\n" + "ldr a3aq, [%[a_ptr3], #16]\n" + "fmla v24.4s, b0a.4s, a2.s[1]\n" + "fmla v28.4s, b0a.4s, a3.s[1]\n" + "ldr b0aq, [%[b_ptr], #128]\n" + + "fmla v17.4s, b1a.4s, a0.s[1]\n" + "fmla v21.4s, b1a.4s, a1.s[1]\n" + "subs %w[loops], %w[loops], #1\n" + "fmla v25.4s, b1a.4s, a2.s[1]\n" + "fmla v29.4s, b1a.4s, a3.s[1]\n" + "ldr b1aq, [%[b_ptr], #144]\n" + + "fmla v18.4s, b2a.4s, a0.s[1]\n" + "fmla v22.4s, b2a.4s, a1.s[1]\n" + "fmla v26.4s, b2a.4s, a2.s[1]\n" + "fmla v30.4s, b2a.4s, a3.s[1]\n" + "ldr b2aq, [%[b_ptr], #160]\n" + + "fmla v19.4s, b3a.4s, a0.s[1]\n" + "fmla v23.4s, b3a.4s, a1.s[1]\n" + "fmla v27.4s, b3a.4s, a2.s[1]\n" + "fmla v31.4s, b3a.4s, a3.s[1]\n" + "ldr b3aq, [%[b_ptr], #176]\n" + + // Unroll 2 + "fmla v16.4s, bb0.4s, a0.s[2]\n" + ASM_PREFETCH("[%[b_ptr], #0x2C0]") + "fmla v20.4s, bb0.4s, a1.s[2]\n" + "fmla v24.4s, bb0.4s, a2.s[2]\n" + "fmla v28.4s, bb0.4s, a3.s[2]\n" + "ldr b0q, [%[b_ptr], #192]\n" + + "fmla v17.4s, bb1.4s, a0.s[2]\n" + "add %[a_ptr0], %[a_ptr0], #32\n" + "fmla v21.4s, bb1.4s, a1.s[2]\n" + "add %[a_ptr1], %[a_ptr1], %[a_incr1]\n" + "fmla v25.4s, bb1.4s, a2.s[2]\n" + "add %[a_ptr2], %[a_ptr2], %[a_incr2]\n" + "fmla v29.4s, bb1.4s, a3.s[2]\n" + "ldr b1q, [%[b_ptr], #208]\n" + + "fmla v18.4s, bb2.4s, a0.s[2]\n" + "add %[a_ptr3], %[a_ptr3], %[a_incr3]\n" + "fmla v22.4s, bb2.4s, a1.s[2]\n" + ASM_PREFETCH("[%[a_ptr0], #0x40]") + "fmla v26.4s, bb2.4s, a2.s[2]\n" + "fmla v30.4s, bb2.4s, a3.s[2]\n" + "ldr b2q, [%[b_ptr], #224]\n" + + "fmla v19.4s, bb3.4s, a0.s[2]\n" + "fmla v23.4s, bb3.4s, a1.s[2]\n" + ASM_PREFETCH("[%[a_ptr1], #0x40]") + "fmla v27.4s, bb3.4s, a2.s[2]\n" + "fmla v31.4s, bb3.4s, a3.s[2]\n" + "ldr b3q, [%[b_ptr], #240]\n" + + // Unroll 3 + "fmla v16.4s, b0a.4s, a0.s[3]\n" + "fmla v20.4s, b0a.4s, a1.s[3]\n" + "add %[b_ptr], %[b_ptr], #512\n" + "fmla v24.4s, b0a.4s, a2.s[3]\n" + "fmla v28.4s, b0a.4s, a3.s[3]\n" + "ldr b0aq, [%[b_ptr], #-256]\n" + + "fmla v17.4s, b1a.4s, a0.s[3]\n" + ASM_PREFETCH("[%[b_ptr], #0x100]") + "fmla v21.4s, b1a.4s, a1.s[3]\n" + "fmla v25.4s, b1a.4s, a2.s[3]\n" + "fmla v29.4s, b1a.4s, a3.s[3]\n" + "ldr b1aq, [%[b_ptr], #-240]\n" + + "fmla v18.4s, b2a.4s, a0.s[3]\n" + "fmla v22.4s, b2a.4s, a1.s[3]\n" + ASM_PREFETCH("[%[a_ptr2], #0x40]") + "fmla v26.4s, b2a.4s, a2.s[3]\n" + "fmla v30.4s, b2a.4s, a3.s[3]\n" + "ldr b2aq, [%[b_ptr], #-224]\n" + + "fmla v19.4s, b3a.4s, a0.s[3]\n" + "fmla v23.4s, b3a.4s, a1.s[3]\n" + "ldr a0q, [%[a_ptr0]]\n" + "fmla v27.4s, b3a.4s, a2.s[3]\n" + "fmla v31.4s, b3a.4s, a3.s[3]\n" + "ldr b3aq, [%[b_ptr], #-208]\n" + + // Unroll 4 + "fmla v16.4s, bb0.4s, a0a.s[0]\n" + "fmla v20.4s, bb0.4s, a1a.s[0]\n" + ASM_PREFETCH("[%[b_ptr], #0x140]") + "fmla v24.4s, bb0.4s, a2a.s[0]\n" + "fmla v28.4s, bb0.4s, a3a.s[0]\n" + "ldr b0q, [%[b_ptr], #-192]\n" + + "fmla v17.4s, bb1.4s, a0a.s[0]\n" + "fmla v21.4s, bb1.4s, a1a.s[0]\n" + "ldr a1q, [%[a_ptr1]]\n" + "fmla v25.4s, bb1.4s, a2a.s[0]\n" + "fmla v29.4s, bb1.4s, a3a.s[0]\n" + "ldr b1q, [%[b_ptr], #-176]\n" + + "fmla v18.4s, bb2.4s, a0a.s[0]\n" + "fmla v22.4s, bb2.4s, a1a.s[0]\n" + "ldr a2q, [%[a_ptr2]]\n" + "fmla v26.4s, bb2.4s, a2a.s[0]\n" + "fmla v30.4s, bb2.4s, a3a.s[0]\n" + "ldr b2q, [%[b_ptr], #-160]\n" + + "fmla v19.4s, bb3.4s, a0a.s[0]\n" + "fmla v23.4s, bb3.4s, a1a.s[0]\n" + "ldr a3q, [%[a_ptr3]]\n" + "fmla v27.4s, bb3.4s, a2a.s[0]\n" + "fmla v31.4s, bb3.4s, a3a.s[0]\n" + "ldr b3q, [%[b_ptr], #-144]\n" + + // Unroll 5 + "fmla v16.4s, b0a.4s, a0a.s[1]\n" + "fmla v20.4s, b0a.4s, a1a.s[1]\n" + ASM_PREFETCH("[%[b_ptr], #0x180]") + "fmla v24.4s, b0a.4s, a2a.s[1]\n" + "fmla v28.4s, b0a.4s, a3a.s[1]\n" + "ldr b0aq, [%[b_ptr], #-128]\n" + + "fmla v17.4s, b1a.4s, a0a.s[1]\n" + "fmla v21.4s, b1a.4s, a1a.s[1]\n" + ASM_PREFETCH("[%[a_ptr3], #0x40]") + "fmla v25.4s, b1a.4s, a2a.s[1]\n" + "fmla v29.4s, b1a.4s, a3a.s[1]\n" + "ldr b1aq, [%[b_ptr], #-112]\n" + + "fmla v18.4s, b2a.4s, a0a.s[1]\n" + "fmla v22.4s, b2a.4s, a1a.s[1]\n" + "fmla v26.4s, b2a.4s, a2a.s[1]\n" + "fmla v30.4s, b2a.4s, a3a.s[1]\n" + "ldr b2aq, [%[b_ptr], #-96]\n" + + "fmla v19.4s, b3a.4s, a0a.s[1]\n" + "fmla v23.4s, b3a.4s, a1a.s[1]\n" + "fmla v27.4s, b3a.4s, a2a.s[1]\n" + "fmla v31.4s, b3a.4s, a3a.s[1]\n" + "ldr b3aq, [%[b_ptr], #-80]\n" + + // Unroll 6 + "fmla v16.4s, bb0.4s, a0a.s[2]\n" + "fmla v20.4s, bb0.4s, a1a.s[2]\n" + ASM_PREFETCH("[%[b_ptr], #0x1C0]") + "fmla v24.4s, bb0.4s, a2a.s[2]\n" + "fmla v28.4s, bb0.4s, a3a.s[2]\n" + "ldr b0q, [%[b_ptr], #-64]\n" + + "fmla v17.4s, bb1.4s, a0a.s[2]\n" + "fmla v21.4s, bb1.4s, a1a.s[2]\n" + "fmla v25.4s, bb1.4s, a2a.s[2]\n" + "fmla v29.4s, bb1.4s, a3a.s[2]\n" + "ldr b1q, [%[b_ptr], #-48]\n" + + "fmla v18.4s, bb2.4s, a0a.s[2]\n" + "fmla v22.4s, bb2.4s, a1a.s[2]\n" + "fmla v26.4s, bb2.4s, a2a.s[2]\n" + "fmla v30.4s, bb2.4s, a3a.s[2]\n" + "ldr b2q, [%[b_ptr], #-32]\n" + + "fmla v19.4s, bb3.4s, a0a.s[2]\n" + "fmla v23.4s, bb3.4s, a1a.s[2]\n" + "fmla v27.4s, bb3.4s, a2a.s[2]\n" + "fmla v31.4s, bb3.4s, a3a.s[2]\n" + "ldr b3q, [%[b_ptr], #-16]\n" + + // Unroll 7 + "fmla v16.4s, b0a.4s, a0a.s[3]\n" + "fmla v20.4s, b0a.4s, a1a.s[3]\n" + "fmla v24.4s, b0a.4s, a2a.s[3]\n" + "fmla v28.4s, b0a.4s, a3a.s[3]\n" + "ldr b0aq, [%[b_ptr]]\n" + + "fmla v17.4s, b1a.4s, a0a.s[3]\n" + "fmla v21.4s, b1a.4s, a1a.s[3]\n" + ASM_PREFETCH("[%[b_ptr], #0x200]") + "fmla v25.4s, b1a.4s, a2a.s[3]\n" + "fmla v29.4s, b1a.4s, a3a.s[3]\n" + "ldr b1aq, [%[b_ptr], #16]\n" + + "fmla v18.4s, b2a.4s, a0a.s[3]\n" + "fmla v22.4s, b2a.4s, a1a.s[3]\n" + "fmla v26.4s, b2a.4s, a2a.s[3]\n" + "fmla v30.4s, b2a.4s, a3a.s[3]\n" + "ldr b2aq, [%[b_ptr], #32]\n" + + "fmla v19.4s, b3a.4s, a0a.s[3]\n" + "fmla v23.4s, b3a.4s, a1a.s[3]\n" + "fmla v27.4s, b3a.4s, a2a.s[3]\n" + "fmla v31.4s, b3a.4s, a3a.s[3]\n" + "bne 1b\n" + + // Skip to here + "4:\n" + + // Detached final iteration + // Unroll 0 + "fmla v16.4s, bb0.4s, a0.s[0]\n" + "fmla v20.4s, bb0.4s, a1.s[0]\n" + "ldr b3aq, [%[b_ptr], #48]\n" + "fmla v24.4s, bb0.4s, a2.s[0]\n" + "add %[b_ptr], %[b_ptr], #64\n" + "fmla v28.4s, bb0.4s, a3.s[0]\n" + "ldr b0q, [%[b_ptr]]\n" + + "fmla v17.4s, bb1.4s, a0.s[0]\n" + "cbnz %w[oddk], 2f\n" // Deal with odd K before we load a0a + "fmla v21.4s, bb1.4s, a1.s[0]\n" + "ldr a0aq, [%[a_ptr0], #16]\n" + "fmla v25.4s, bb1.4s, a2.s[0]\n" + "fmla v29.4s, bb1.4s, a3.s[0]\n" + "ldr b1q, [%[b_ptr], #16]\n" + + "fmla v18.4s, bb2.4s, a0.s[0]\n" + "fmla v22.4s, bb2.4s, a1.s[0]\n" + "ldr a1aq, [%[a_ptr1], #16]\n" + "fmla v26.4s, bb2.4s, a2.s[0]\n" + "fmla v30.4s, bb2.4s, a3.s[0]\n" + "ldr b2q, [%[b_ptr], #32]\n" + + "fmla v19.4s, bb3.4s, a0.s[0]\n" + "fmla v23.4s, bb3.4s, a1.s[0]\n" + "ldr a2aq, [%[a_ptr2], #16]\n" + "fmla v27.4s, bb3.4s, a2.s[0]\n" + "fmla v31.4s, bb3.4s, a3.s[0]\n" + "ldr b3q, [%[b_ptr], #48]\n" + + // Unroll 1 + "fmla v16.4s, b0a.4s, a0.s[1]\n" + "add %[b_ptr], %[b_ptr], #64\n" + "fmla v20.4s, b0a.4s, a1.s[1]\n" + "ldr a3aq, [%[a_ptr3], #16]\n" + "fmla v24.4s, b0a.4s, a2.s[1]\n" + "fmla v28.4s, b0a.4s, a3.s[1]\n" + "ldr b0aq, [%[b_ptr]]\n" + + "fmla v17.4s, b1a.4s, a0.s[1]\n" + "add %[a_ptr0], %[a_ptr0], #32\n" + "fmla v21.4s, b1a.4s, a1.s[1]\n" + "add %[a_ptr1], %[a_ptr1], %[a_incr1]\n" + "fmla v25.4s, b1a.4s, a2.s[1]\n" + "add %[a_ptr2], %[a_ptr2], %[a_incr2]\n" + "fmla v29.4s, b1a.4s, a3.s[1]\n" + "ldr b1aq, [%[b_ptr], #16]\n" + + "fmla v18.4s, b2a.4s, a0.s[1]\n" + "fmla v22.4s, b2a.4s, a1.s[1]\n" + "add %[a_ptr3], %[a_ptr3], %[a_incr3]\n" + "fmla v26.4s, b2a.4s, a2.s[1]\n" + "fmla v30.4s, b2a.4s, a3.s[1]\n" + "ldr b2aq, [%[b_ptr], #32]\n" + + "fmla v19.4s, b3a.4s, a0.s[1]\n" + "fmla v23.4s, b3a.4s, a1.s[1]\n" + "fmla v27.4s, b3a.4s, a2.s[1]\n" + "fmla v31.4s, b3a.4s, a3.s[1]\n" + "ldr b3aq, [%[b_ptr], #48]\n" + + // Unroll 2 + "fmla v16.4s, bb0.4s, a0.s[2]\n" + "fmla v20.4s, bb0.4s, a1.s[2]\n" + "add %[b_ptr], %[b_ptr], #64\n" + "fmla v24.4s, bb0.4s, a2.s[2]\n" + "fmla v28.4s, bb0.4s, a3.s[2]\n" + "ldr b0q, [%[b_ptr]]\n" + + "fmla v17.4s, bb1.4s, a0.s[2]\n" + "fmla v21.4s, bb1.4s, a1.s[2]\n" + "fmla v25.4s, bb1.4s, a2.s[2]\n" + "fmla v29.4s, bb1.4s, a3.s[2]\n" + "ldr b1q, [%[b_ptr], #16]\n" + + "fmla v18.4s, bb2.4s, a0.s[2]\n" + "fmla v22.4s, bb2.4s, a1.s[2]\n" + "fmla v26.4s, bb2.4s, a2.s[2]\n" + "fmla v30.4s, bb2.4s, a3.s[2]\n" + "ldr b2q, [%[b_ptr], #32]\n" + + "fmla v19.4s, bb3.4s, a0.s[2]\n" + "fmla v23.4s, bb3.4s, a1.s[2]\n" + "fmla v27.4s, bb3.4s, a2.s[2]\n" + "fmla v31.4s, bb3.4s, a3.s[2]\n" + "ldr b3q, [%[b_ptr], #48]\n" + + // Unroll 3 + "fmla v16.4s, b0a.4s, a0.s[3]\n" + "fmla v20.4s, b0a.4s, a1.s[3]\n" + "add %[b_ptr], %[b_ptr], #64\n" + "fmla v24.4s, b0a.4s, a2.s[3]\n" + "fmla v28.4s, b0a.4s, a3.s[3]\n" + "ldr b0aq, [%[b_ptr]]\n" + + "fmla v17.4s, b1a.4s, a0.s[3]\n" + "fmla v21.4s, b1a.4s, a1.s[3]\n" + "fmla v25.4s, b1a.4s, a2.s[3]\n" + "fmla v29.4s, b1a.4s, a3.s[3]\n" + "ldr b1aq, [%[b_ptr], #16]\n" + + "fmla v18.4s, b2a.4s, a0.s[3]\n" + "fmla v22.4s, b2a.4s, a1.s[3]\n" + "fmla v26.4s, b2a.4s, a2.s[3]\n" + "fmla v30.4s, b2a.4s, a3.s[3]\n" + "ldr b2aq, [%[b_ptr], #32]\n" + + "fmla v19.4s, b3a.4s, a0.s[3]\n" + "fmla v23.4s, b3a.4s, a1.s[3]\n" + "fmla v27.4s, b3a.4s, a2.s[3]\n" + "fmla v31.4s, b3a.4s, a3.s[3]\n" + "ldr b3aq, [%[b_ptr], #48]\n" + + // Unroll 4 + "fmla v16.4s, bb0.4s, a0a.s[0]\n" + "fmla v20.4s, bb0.4s, a1a.s[0]\n" + "add %[b_ptr], %[b_ptr], #64\n" + "fmla v24.4s, bb0.4s, a2a.s[0]\n" + "fmla v28.4s, bb0.4s, a3a.s[0]\n" + "ldr b0q, [%[b_ptr]]\n" + + "fmla v17.4s, bb1.4s, a0a.s[0]\n" + "fmla v21.4s, bb1.4s, a1a.s[0]\n" + "fmla v25.4s, bb1.4s, a2a.s[0]\n" + "fmla v29.4s, bb1.4s, a3a.s[0]\n" + "ldr b1q, [%[b_ptr], #16]\n" + + "fmla v18.4s, bb2.4s, a0a.s[0]\n" + "fmla v22.4s, bb2.4s, a1a.s[0]\n" + "fmla v26.4s, bb2.4s, a2a.s[0]\n" + "fmla v30.4s, bb2.4s, a3a.s[0]\n" + "ldr b2q, [%[b_ptr], #32]\n" + + "fmla v19.4s, bb3.4s, a0a.s[0]\n" + "fmla v23.4s, bb3.4s, a1a.s[0]\n" + "fmla v27.4s, bb3.4s, a2a.s[0]\n" + "fmla v31.4s, bb3.4s, a3a.s[0]\n" + "ldr b3q, [%[b_ptr], #48]\n" + + // Unroll 5 + "fmla v16.4s, b0a.4s, a0a.s[1]\n" + "fmla v20.4s, b0a.4s, a1a.s[1]\n" + "add %[b_ptr], %[b_ptr], #64\n" + "fmla v24.4s, b0a.4s, a2a.s[1]\n" + "fmla v28.4s, b0a.4s, a3a.s[1]\n" + "ldr b0aq, [%[b_ptr]]\n" + + "fmla v17.4s, b1a.4s, a0a.s[1]\n" + "fmla v21.4s, b1a.4s, a1a.s[1]\n" + "fmla v25.4s, b1a.4s, a2a.s[1]\n" + "fmla v29.4s, b1a.4s, a3a.s[1]\n" + "ldr b1aq, [%[b_ptr], #16]\n" + + "fmla v18.4s, b2a.4s, a0a.s[1]\n" + "fmla v22.4s, b2a.4s, a1a.s[1]\n" + "fmla v26.4s, b2a.4s, a2a.s[1]\n" + "fmla v30.4s, b2a.4s, a3a.s[1]\n" + "ldr b2aq, [%[b_ptr], #32]\n" + + "fmla v19.4s, b3a.4s, a0a.s[1]\n" + "fmla v23.4s, b3a.4s, a1a.s[1]\n" + "fmla v27.4s, b3a.4s, a2a.s[1]\n" + "fmla v31.4s, b3a.4s, a3a.s[1]\n" + "ldr b3aq, [%[b_ptr], #48]\n" + + // Unroll 6 + "fmla v16.4s, bb0.4s, a0a.s[2]\n" + "add %[b_ptr], %[b_ptr], #64\n" + "fmla v20.4s, bb0.4s, a1a.s[2]\n" + ASM_PREFETCH("[%[c_ptr0], #0x40]") + "fmla v24.4s, bb0.4s, a2a.s[2]\n" + "fmla v28.4s, bb0.4s, a3a.s[2]\n" + + "fmla v17.4s, bb1.4s, a0a.s[2]\n" + "fmla v21.4s, bb1.4s, a1a.s[2]\n" + ASM_PREFETCH("[%[c_ptr1], #0x40]") + "fmla v25.4s, bb1.4s, a2a.s[2]\n" + "fmla v29.4s, bb1.4s, a3a.s[2]\n" + + "fmla v18.4s, bb2.4s, a0a.s[2]\n" + "fmla v22.4s, bb2.4s, a1a.s[2]\n" + ASM_PREFETCH("[%[c_ptr2], #0x40]") + "fmla v26.4s, bb2.4s, a2a.s[2]\n" + "fmla v30.4s, bb2.4s, a3a.s[2]\n" + + "fmla v19.4s, bb3.4s, a0a.s[2]\n" + "fmla v23.4s, bb3.4s, a1a.s[2]\n" + ASM_PREFETCH("[%[c_ptr3], #0x40]") + "fmla v27.4s, bb3.4s, a2a.s[2]\n" + "fmla v31.4s, bb3.4s, a3a.s[2]\n" + + // Unroll 7 + "fmla v16.4s, b0a.4s, a0a.s[3]\n" + "fmla v17.4s, b1a.4s, a0a.s[3]\n" + "fmla v18.4s, b2a.4s, a0a.s[3]\n" + "fmla v19.4s, b3a.4s, a0a.s[3]\n" + "cbnz %w[odds], 6f\n" + + "fmla v20.4s, b0a.4s, a1a.s[3]\n" + "str q16, [%[c_ptr0]]\n" + "fmla v21.4s, b1a.4s, a1a.s[3]\n" + "str q17, [%[c_ptr0], #16]\n" + "fmla v22.4s, b2a.4s, a1a.s[3]\n" + "str q18, [%[c_ptr0], #32]\n" + "fmla v23.4s, b3a.4s, a1a.s[3]\n" + "str q19, [%[c_ptr0], #48]\n" + + "fmla v24.4s, b0a.4s, a2a.s[3]\n" + "str q20, [%[c_ptr1]]\n" + "fmla v25.4s, b1a.4s, a2a.s[3]\n" + "str q21, [%[c_ptr1], #16]\n" + "fmla v26.4s, b2a.4s, a2a.s[3]\n" + "str q22, [%[c_ptr1], #32]\n" + "fmla v27.4s, b3a.4s, a2a.s[3]\n" + "str q23, [%[c_ptr1], #48]\n" + + "fmla v28.4s, b0a.4s, a3a.s[3]\n" + "str q24, [%[c_ptr2]]\n" + "fmla v29.4s, b1a.4s, a3a.s[3]\n" + "str q25, [%[c_ptr2], #16]\n" + "fmla v30.4s, b2a.4s, a3a.s[3]\n" + "str q26, [%[c_ptr2], #32]\n" + "fmla v31.4s, b3a.4s, a3a.s[3]\n" + "str q27, [%[c_ptr2], #48]\n" + "b 3f\n" + + // Odd K case: Just do 4 more. + "2:\n" + "fmla v21.4s, bb1.4s, a1.s[0]\n" + "add %[a_ptr0], %[a_ptr0], #16\n" + "fmla v25.4s, bb1.4s, a2.s[0]\n" + "add %[a_ptr1], %[a_ptr1], #16\n" + "fmla v29.4s, bb1.4s, a3.s[0]\n" + "ldr b1q, [%[b_ptr], #16]\n" + + "fmla v18.4s, bb2.4s, a0.s[0]\n" + "add %[a_ptr2], %[a_ptr2], #16\n" + "fmla v22.4s, bb2.4s, a1.s[0]\n" + "add %[a_ptr3], %[a_ptr3], #16\n" + "fmla v26.4s, bb2.4s, a2.s[0]\n" + "fmla v30.4s, bb2.4s, a3.s[0]\n" + "ldr b2q, [%[b_ptr], #32]\n" + + "fmla v19.4s, bb3.4s, a0.s[0]\n" + "fmla v23.4s, bb3.4s, a1.s[0]\n" + "fmla v27.4s, bb3.4s, a2.s[0]\n" + "fmla v31.4s, bb3.4s, a3.s[0]\n" + "ldr b3q, [%[b_ptr], #48]\n" + + // Unroll 1 + "fmla v16.4s, b0a.4s, a0.s[1]\n" + "add %[b_ptr], %[b_ptr], #64\n" + "fmla v20.4s, b0a.4s, a1.s[1]\n" + "fmla v24.4s, b0a.4s, a2.s[1]\n" + "fmla v28.4s, b0a.4s, a3.s[1]\n" + "ldr b0aq, [%[b_ptr]]\n" + + "fmla v17.4s, b1a.4s, a0.s[1]\n" + "fmla v21.4s, b1a.4s, a1.s[1]\n" + "fmla v25.4s, b1a.4s, a2.s[1]\n" + "fmla v29.4s, b1a.4s, a3.s[1]\n" + "ldr b1aq, [%[b_ptr], #16]\n" + + "fmla v18.4s, b2a.4s, a0.s[1]\n" + "fmla v22.4s, b2a.4s, a1.s[1]\n" + "fmla v26.4s, b2a.4s, a2.s[1]\n" + "fmla v30.4s, b2a.4s, a3.s[1]\n" + "ldr b2aq, [%[b_ptr], #32]\n" + + "fmla v19.4s, b3a.4s, a0.s[1]\n" + "fmla v23.4s, b3a.4s, a1.s[1]\n" + "fmla v27.4s, b3a.4s, a2.s[1]\n" + "fmla v31.4s, b3a.4s, a3.s[1]\n" + "ldr b3aq, [%[b_ptr], #48]\n" + + // Unroll 2 + "fmla v16.4s, bb0.4s, a0.s[2]\n" + "add %[b_ptr], %[b_ptr], #64\n" + "fmla v20.4s, bb0.4s, a1.s[2]\n" + ASM_PREFETCH("[%[c_ptr0], #0x40]") + "fmla v24.4s, bb0.4s, a2.s[2]\n" + "fmla v28.4s, bb0.4s, a3.s[2]\n" + + "fmla v17.4s, bb1.4s, a0.s[2]\n" + "fmla v21.4s, bb1.4s, a1.s[2]\n" + ASM_PREFETCH("[%[c_ptr1], #0x40]") + "fmla v25.4s, bb1.4s, a2.s[2]\n" + "fmla v29.4s, bb1.4s, a3.s[2]\n" + + "fmla v18.4s, bb2.4s, a0.s[2]\n" + "fmla v22.4s, bb2.4s, a1.s[2]\n" + ASM_PREFETCH("[%[c_ptr2], #0x40]") + "fmla v26.4s, bb2.4s, a2.s[2]\n" + "fmla v30.4s, bb2.4s, a3.s[2]\n" + + "fmla v19.4s, bb3.4s, a0.s[2]\n" + "fmla v23.4s, bb3.4s, a1.s[2]\n" + ASM_PREFETCH("[%[c_ptr3], #0x40]") + "fmla v27.4s, bb3.4s, a2.s[2]\n" + "fmla v31.4s, bb3.4s, a3.s[2]\n" + + // Unroll 3 + "fmla v16.4s, b0a.4s, a0.s[3]\n" + "fmla v17.4s, b1a.4s, a0.s[3]\n" + "fmla v18.4s, b2a.4s, a0.s[3]\n" + "fmla v19.4s, b3a.4s, a0.s[3]\n" + "cbnz %w[odds], 7f\n" + + "fmla v20.4s, b0a.4s, a1.s[3]\n" + "str q16, [%[c_ptr0]]\n" + "fmla v21.4s, b1a.4s, a1.s[3]\n" + "str q17, [%[c_ptr0], #16]\n" + "fmla v22.4s, b2a.4s, a1.s[3]\n" + "str q18, [%[c_ptr0], #32]\n" + "fmla v23.4s, b3a.4s, a1.s[3]\n" + "str q19, [%[c_ptr0], #48]\n" + + "fmla v24.4s, b0a.4s, a2.s[3]\n" + "str q20, [%[c_ptr1]]\n" + "fmla v25.4s, b1a.4s, a2.s[3]\n" + "str q21, [%[c_ptr1], #16]\n" + "fmla v26.4s, b2a.4s, a2.s[3]\n" + "str q22, [%[c_ptr1], #32]\n" + "fmla v27.4s, b3a.4s, a2.s[3]\n" + "str q23, [%[c_ptr1], #48]\n" + + "fmla v28.4s, b0a.4s, a3.s[3]\n" + "str q24, [%[c_ptr2]]\n" + "fmla v29.4s, b1a.4s, a3.s[3]\n" + "str q25, [%[c_ptr2], #16]\n" + "fmla v30.4s, b2a.4s, a3.s[3]\n" + "str q26, [%[c_ptr2], #32]\n" + "fmla v31.4s, b3a.4s, a3.s[3]\n" + "str q27, [%[c_ptr2], #48]\n" + "b 3f\n" + + // "Odd ones" - lead in from even + "6:\n" + "fmla v20.4s, b0a.4s, a1a.s[3]\n" + "fmla v21.4s, b1a.4s, a1a.s[3]\n" + "ldr b0q, [%[b_ptr]]\n" + "fmla v22.4s, b2a.4s, a1a.s[3]\n" + "subs %w[odds], %w[odds], #1\n" + "fmla v23.4s, b3a.4s, a1a.s[3]\n" + "ldr b1q, [%[b_ptr], #16]\n" + + "fmla v24.4s, b0a.4s, a2a.s[3]\n" + "fmla v25.4s, b1a.4s, a2a.s[3]\n" + "ldr b2q, [%[b_ptr], #32]\n" + "fmla v26.4s, b2a.4s, a2a.s[3]\n" + "fmla v27.4s, b3a.4s, a2a.s[3]\n" + "ldr b3q, [%[b_ptr], #48]\n" + + "fmla v28.4s, b0a.4s, a3a.s[3]\n" + "ld1r {a0.4s}, [%[a_ptr0]], #4\n" + "fmla v29.4s, b1a.4s, a3a.s[3]\n" + "fmla v30.4s, b2a.4s, a3a.s[3]\n" + "ld1r {a1.4s}, [%[a_ptr1]], #4\n" + "fmla v31.4s, b3a.4s, a3a.s[3]\n" + + "fmla v16.4s, bb0.4s, a0.4s\n" + "beq 9f\n" + "b 8f\n" + + // "Odd ones" - lead in from odd + "7:\n" + "fmla v20.4s, b0a.4s, a1.s[3]\n" + "subs %w[odds], %w[odds], #1\n" + "fmla v21.4s, b1a.4s, a1.s[3]\n" + "ldr b0q, [%[b_ptr]]\n" + "fmla v22.4s, b2a.4s, a1.s[3]\n" + "fmla v23.4s, b3a.4s, a1.s[3]\n" + "ldr b1q, [%[b_ptr], #16]\n" + + "fmla v24.4s, b0a.4s, a2.s[3]\n" + "fmla v25.4s, b1a.4s, a2.s[3]\n" + "ldr b2q, [%[b_ptr], #32]\n" + "fmla v26.4s, b2a.4s, a2.s[3]\n" + "fmla v27.4s, b3a.4s, a2.s[3]\n" + "ldr b3q, [%[b_ptr], #48]\n" + + "fmla v28.4s, b0a.4s, a3.s[3]\n" + "ld1r {a0.4s}, [%[a_ptr0]], #4\n" + "fmla v29.4s, b1a.4s, a3.s[3]\n" + "fmla v30.4s, b2a.4s, a3.s[3]\n" + "ld1r {a1.4s}, [%[a_ptr1]], #4\n" + "fmla v31.4s, b3a.4s, a3.s[3]\n" + + "fmla v16.4s, bb0.4s, a0.4s\n" + "beq 9f\n" + + // "Odd ones" - loop + "8:\n" + "fmla v17.4s, bb1.4s, a0.4s\n" + "ld1r {a2.4s}, [%[a_ptr2]], #4\n" + "fmla v18.4s, bb2.4s, a0.4s\n" + "add %[b_ptr], %[b_ptr], #64\n" + "fmla v19.4s, bb3.4s, a0.4s\n" + "ld1r {a3.4s}, [%[a_ptr3]], #4\n" + + "fmla v20.4s, bb0.4s, a1.4s\n" + "subs %w[odds], %w[odds], #1\n" + "fmla v21.4s, bb1.4s, a1.4s\n" + "ld1r {a0.4s}, [%[a_ptr0]], #4\n" + "fmla v22.4s, bb2.4s, a1.4s\n" + "fmla v23.4s, bb3.4s, a1.4s\n" + "ld1r {a1.4s}, [%[a_ptr1]], #4\n" + + "fmla v24.4s, bb0.4s, a2.4s\n" + "fmla v28.4s, bb0.4s, a3.4s\n" + "ldr b0q, [%[b_ptr]]\n" + "fmla v25.4s, bb1.4s, a2.4s\n" + "fmla v29.4s, bb1.4s, a3.4s\n" + "ldr b1q, [%[b_ptr], #16]\n" + + "fmla v26.4s, bb2.4s, a2.4s\n" + "fmla v30.4s, bb2.4s, a3.4s\n" + "ldr b2q, [%[b_ptr], #32]\n" + "fmla v27.4s, bb3.4s, a2.4s\n" + "fmla v31.4s, bb3.4s, a3.4s\n" + "ldr b3q, [%[b_ptr], #48]\n" + "fmla v16.4s, bb0.4s, a0.4s\n" + "bne 8b\n" + + // "Odd ones" - detached final iteration + "9:\n" + "fmla v17.4s, bb1.4s, a0.4s\n" + "ld1r {a2.4s}, [%[a_ptr2]], #4\n" + "fmla v18.4s, bb2.4s, a0.4s\n" + "add %[b_ptr], %[b_ptr], #64\n" + "fmla v19.4s, bb3.4s, a0.4s\n" + "ld1r {a3.4s}, [%[a_ptr3]], #4\n" + + "fmla v20.4s, bb0.4s, a1.4s\n" + "str q16, [%[c_ptr0]]\n" + "fmla v21.4s, bb1.4s, a1.4s\n" + "str q17, [%[c_ptr0], #16]\n" + "fmla v22.4s, bb2.4s, a1.4s\n" + "str q18, [%[c_ptr0], #32]\n" + "fmla v23.4s, bb3.4s, a1.4s\n" + "str q19, [%[c_ptr0], #48]\n" + + "fmla v24.4s, bb0.4s, a2.4s\n" + "str q20, [%[c_ptr1]]\n" + "fmla v25.4s, bb1.4s, a2.4s\n" + "str q21, [%[c_ptr1], #16]\n" + "fmla v26.4s, bb2.4s, a2.4s\n" + "str q22, [%[c_ptr1], #32]\n" + "fmla v27.4s, bb3.4s, a2.4s\n" + "str q23, [%[c_ptr1], #48]\n" + + "fmla v28.4s, bb0.4s, a3.4s\n" + "str q24, [%[c_ptr2]]\n" + "fmla v29.4s, bb1.4s, a3.4s\n" + "str q25, [%[c_ptr2], #16]\n" + "fmla v30.4s, bb2.4s, a3.4s\n" + "str q26, [%[c_ptr2], #32]\n" + "fmla v31.4s, bb3.4s, a3.4s\n" + "str q27, [%[c_ptr2], #48]\n" + + "3:\n" + "str q28, [%[c_ptr3]]\n" + // Increment C pointers for next loop - this looks odd if we + // are using the result buffer, but it's OK as using the + // result buffer implies there will be no next loop. + "add %[c_ptr0], %[c_ptr0], #64\n" + "str q29, [%[c_ptr3], #16]\n" + "add %[c_ptr1], %[c_ptr1], %[a_incr1], LSL #1\n" + "str q30, [%[c_ptr3], #32]\n" + "add %[c_ptr2], %[c_ptr2], %[a_incr2], LSL #1\n" + "str q31, [%[c_ptr3], #48]\n" + "add %[c_ptr3], %[c_ptr3], %[a_incr3], LSL #1\n" : [a_ptr0] "+r" (a_ptr0), [a_ptr1] "+r" (a_ptr1), [a_ptr2] "+r" (a_ptr2), [a_ptr3] "+r" (a_ptr3), - [b_ptr] "+r" (b_ptr), [loops] "+r" (loops), [odds] "+r" (odds), - [c_ptr0] "+r" (c_ptr0), [c_ptr1] "+r" (c_ptr1), [c_ptr2] "+r" (c_ptr2), [c_ptr3] "+r" (c_ptr3) + [b_ptr] "+r" (b_ptr), [loops] "+r" (loops), [odds] "+r" (odds), + [c_ptr0] "+r" (c_ptr0), [c_ptr1] "+r" (c_ptr1), [c_ptr2] "+r" (c_ptr2), [c_ptr3] "+r" (c_ptr3) : [oddk] "r" (oddk), [beta0] "r" (beta0), [betaptr] "r" (&beta), - [a_incr1] "r" (a_incr1), [a_incr2] "r" (a_incr2), [a_incr3] "r" (a_incr3) + [a_incr1] "r" (a_incr1), [a_incr2] "r" (a_incr2), [a_incr3] "r" (a_incr3) : "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", - "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", - "cc", "memory" + "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", + "cc", "memory" ); /* Copy results from result buffer if needed. */ @@ -967,4 +967,4 @@ void a64_sgemm_nativeA_pretransposeB_16x4(const float *A, int lda, const float * } // namespace arm_gemm -#endif // __aarch64__ \ No newline at end of file +#endif // __aarch64__ diff --git a/src/core/NEON/kernels/arm_gemm/kernels/a64_sgemv_trans/generic.cpp b/src/core/NEON/kernels/arm_gemm/kernels/a64_sgemv_trans/generic.cpp index 64ef9d89a4..e61dbd82ea 100644 --- a/src/core/NEON/kernels/arm_gemm/kernels/a64_sgemv_trans/generic.cpp +++ b/src/core/NEON/kernels/arm_gemm/kernels/a64_sgemv_trans/generic.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017-2018 ARM Limited. + * Copyright (c) 2017-2019 ARM Limited. * * SPDX-License-Identifier: MIT * @@ -54,6 +54,7 @@ namespace arm_gemm { void a64_sgemv_trans(const float *Astart, const float *Xstart, float *Ystart, float beta, int lda, int M, int N) { const float *a_ptr_base = Astart; float *y_ptr = Ystart; + const bool beta0 = (beta == 0.0f); register const float32x4_t vb asm("v1") = vdupq_n_f32(beta); @@ -375,6 +376,7 @@ void a64_sgemv_trans(const float *Astart, const float *Xstart, float *Ystart, fl "fmla v25.4s, v7.4s, v0.4s\n" "ldr q7, [%[a_ptr], #0x170]\n" "fmla v26.4s, v2.4s, v0.4s\n" + "cbnz %w[beta0], 11f\n" "ldr q2, [%[y_ptr]]\n" "fmla v27.4s, v3.4s, v0.4s\n" "ldr q3, [%[y_ptr], #0x10]\n" @@ -449,13 +451,46 @@ void a64_sgemv_trans(const float *Astart, const float *Xstart, float *Ystart, fl "str q26, [%[y_ptr], #0x120]\n" "fmla v31.4s, v7.4s, %[vb].4s\n" "str q27, [%[y_ptr], #0x130]\n" + "b 12f\n" + // beta 0 code - don't read. + "11:\n" + "str q8, [%[y_ptr], #0x00]\n" + "fmla v27.4s, v3.4s, v0.4s\n" + "str q9, [%[y_ptr], #0x10]\n" + "fmla v28.4s, v4.4s, v0.4s\n" + "str q10, [%[y_ptr], #0x20]\n" + "fmla v29.4s, v5.4s, v0.4s\n" + "str q11, [%[y_ptr], #0x30]\n" + "fmla v30.4s, v6.4s, v0.4s\n" + "str q12, [%[y_ptr], #0x40]\n" + "fmla v31.4s, v7.4s, v0.4s\n" + + "str q13, [%[y_ptr], #0x50]\n" + "str q14, [%[y_ptr], #0x60]\n" + "str q15, [%[y_ptr], #0x70]\n" + "str q16, [%[y_ptr], #0x80]\n" + "str q17, [%[y_ptr], #0x90]\n" + "str q18, [%[y_ptr], #0xa0]\n" + "str q19, [%[y_ptr], #0xb0]\n" + "str q20, [%[y_ptr], #0xc0]\n" + "str q21, [%[y_ptr], #0xd0]\n" + "str q22, [%[y_ptr], #0xe0]\n" + "str q23, [%[y_ptr], #0xf0]\n" + "str q24, [%[y_ptr], #0x100]\n" + "str q25, [%[y_ptr], #0x110]\n" + "str q26, [%[y_ptr], #0x120]\n" + "str q27, [%[y_ptr], #0x130]\n" + + "12:\n" "stp q28, q29, [%[y_ptr], #0x140]\n" "stp q30, q31, [%[y_ptr], #0x160]\n" "add %[y_ptr], %[y_ptr], #0x180\n" + + : [a_ptr] "+r" (a_ptr), [x_ptr] "+r" (x_ptr), [y_ptr] "+r" (y_ptr), [k] "+r" (k), [pf_ptr] "+r" (pf_ptr), [firstpf_ptr] "+r" (firstpf_ptr) - : [jump] "r" (jump), [vb] "w" (vb), [pf_limit] "r" (pf_limit) + : [jump] "r" (jump), [vb] "w" (vb), [pf_limit] "r" (pf_limit), [beta0] "r" (beta0) : "w0", "v0", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "cc" @@ -754,6 +789,8 @@ void a64_sgemv_trans(const float *Astart, const float *Xstart, float *Ystart, fl // Now write out the outputs "10:\n" + "cbnz %w[beta0], 15f\n" + "cbz %w[numvecs], 12f\n" "mov %w[vecs], %w[numvecs]\n" @@ -908,13 +945,121 @@ void a64_sgemv_trans(const float *Astart, const float *Xstart, float *Ystart, fl "ldr s7, [%[y_ptr]]\n" "fmla v5.2s, v7.2s, %[vb].2s\n" "str s5, [%[y_ptr]]\n" + "b 14f\n" + + "15:\n" + // beta0 code + "cbz %w[numvecs], 16f\n" + "mov %w[vecs], %w[numvecs]\n" + + // Vector 0 + "subs %w[vecs], %w[vecs], #1\n" + "str q8, [%[y_ptr]], #0x10\n" + "beq 16f\n" + // Vector 1 + "subs %w[vecs], %w[vecs], #1\n" + "str q9, [%[y_ptr]], #0x10\n" + "beq 16f\n" + // Vector 2 + "subs %w[vecs], %w[vecs], #1\n" + "str q10, [%[y_ptr]], #0x10\n" + "beq 16f\n" + // Vector 3 + "subs %w[vecs], %w[vecs], #1\n" + "str q11, [%[y_ptr]], #0x10\n" + "beq 16f\n" + // Vector 4 + "subs %w[vecs], %w[vecs], #1\n" + "str q12, [%[y_ptr]], #0x10\n" + "beq 16f\n" + // Vector 5 + "subs %w[vecs], %w[vecs], #1\n" + "str q13, [%[y_ptr]], #0x10\n" + "beq 16f\n" + // Vector 6 + "subs %w[vecs], %w[vecs], #1\n" + "str q14, [%[y_ptr]], #0x10\n" + "beq 16f\n" + // Vector 7 + "subs %w[vecs], %w[vecs], #1\n" + "str q15, [%[y_ptr]], #0x10\n" + "beq 16f\n" + // Vector 8 + "subs %w[vecs], %w[vecs], #1\n" + "str q16, [%[y_ptr]], #0x10\n" + "beq 16f\n" + // Vector 9 + "subs %w[vecs], %w[vecs], #1\n" + "str q17, [%[y_ptr]], #0x10\n" + "beq 16f\n" + // Vector 10 + "subs %w[vecs], %w[vecs], #1\n" + "str q18, [%[y_ptr]], #0x10\n" + "beq 16f\n" + // Vector 11 + "subs %w[vecs], %w[vecs], #1\n" + "str q19, [%[y_ptr]], #0x10\n" + "beq 16f\n" + // Vector 12 + "subs %w[vecs], %w[vecs], #1\n" + "str q20, [%[y_ptr]], #0x10\n" + "beq 16f\n" + // Vector 13 + "subs %w[vecs], %w[vecs], #1\n" + "str q21, [%[y_ptr]], #0x10\n" + "beq 16f\n" + // Vector 14 + "subs %w[vecs], %w[vecs], #1\n" + "str q22, [%[y_ptr]], #0x10\n" + "beq 16f\n" + // Vector 15 + "subs %w[vecs], %w[vecs], #1\n" + "str q23, [%[y_ptr]], #0x10\n" + "beq 16f\n" + // Vector 16 + "subs %w[vecs], %w[vecs], #1\n" + "str q24, [%[y_ptr]], #0x10\n" + "beq 16f\n" + // Vector 17 + "subs %w[vecs], %w[vecs], #1\n" + "str q25, [%[y_ptr]], #0x10\n" + "beq 16f\n" + // Vector 18 + "subs %w[vecs], %w[vecs], #1\n" + "str q26, [%[y_ptr]], #0x10\n" + "beq 16f\n" + // Vector 19 + "subs %w[vecs], %w[vecs], #1\n" + "str q27, [%[y_ptr]], #0x10\n" + "beq 16f\n" + // Vector 20 + "subs %w[vecs], %w[vecs], #1\n" + "str q28, [%[y_ptr]], #0x10\n" + "beq 16f\n" + // Vector 21 + "subs %w[vecs], %w[vecs], #1\n" + "str q29, [%[y_ptr]], #0x10\n" + "beq 16f\n" + // Vector 22 + "subs %w[vecs], %w[vecs], #1\n" + "str q30, [%[y_ptr]], #0x10\n" + + // Odd 2 + "16:\n" + "cbz %[odd2_aptr], 17f\n" + "str d6, [%[y_ptr]], #0x8\n" + + // Odd 1 + "17:\n" + "cbz %[odd1_aptr], 14f\n" + "str s5, [%[y_ptr]]\n" "14:\n" : [a_ptr] "+r" (a_ptr), [x_ptr] "+r" (x_ptr), [y_ptr] "+r" (y_ptr), [k] "+r" (k), [pf_ptr] "+r" (pf_ptr), [firstpf_ptr] "+r" (firstpf_ptr), [odd1_aptr] "+r" (odd1_aptr), [odd2_aptr] "+r" (odd2_aptr), [dopf] "+r" (dopf), [vecs] "+r" (vecs) - : [jump] "r" (jump), [vb] "w" (vb), [pf_limit] "r" (pf_limit), [numvecs] "r" (numvecs) + : [jump] "r" (jump), [vb] "w" (vb), [pf_limit] "r" (pf_limit), [numvecs] "r" (numvecs), [beta0] "r" (beta0) : "w0", "v0", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "cc" diff --git a/src/core/NEON/kernels/arm_gemm/kernels/a64_smallK_hybrid_s8s32_dot_4x6.hpp b/src/core/NEON/kernels/arm_gemm/kernels/a64_smallK_hybrid_s8s32_dot_4x6.hpp new file mode 100644 index 0000000000..7fa02e326e --- /dev/null +++ b/src/core/NEON/kernels/arm_gemm/kernels/a64_smallK_hybrid_s8s32_dot_4x6.hpp @@ -0,0 +1,76 @@ +/* + * Copyright (c) 2019 ARM Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#pragma once + +#ifdef __aarch64__ + +#include + +namespace arm_gemm +{ + +// Actual kernel implementations +void a64_smallK_hybrid_s8s32_dot_4x6(const int8_t *, int, const int8_t *, int32_t *, int, int32_t, int, int, int); +void a64_smallK_hybrid_s8s32_dot_4x6_a55(const int8_t *, int, const int8_t *, int32_t *, int, int32_t, int, int, int); + +class smallK_hybrid_s8s32_dot_4x6 +{ +public: + typedef int8_t operand_type; + typedef int32_t result_type; + + typedef void (*kern_type)(const int8_t *, int, const int8_t *, int32_t *, int, int32_t, int, int, int); + + /* Kernel blocking parameters */ + static unsigned int out_height() + { + return 6; + } + + static unsigned int out_width() + { + return 4; + } + + static unsigned int k_unroll() + { + return 4; + } + + StdTransformsFixed transforms = {}; + + // Default to the generic kernel + kern_type kernel=a64_smallK_hybrid_s8s32_dot_4x6; + + smallK_hybrid_s8s32_dot_4x6(const CPUInfo *ci) + { + if (ci->get_cpu_model() == CPUModel::A55r1) { + kernel = a64_smallK_hybrid_s8s32_dot_4x6_a55; + } + } +}; + +} // namespace arm_gemm + +#endif // __aarch64__ diff --git a/src/core/NEON/kernels/arm_gemm/kernels/a64_smallK_hybrid_s8s32_dot_4x6/a55.cpp b/src/core/NEON/kernels/arm_gemm/kernels/a64_smallK_hybrid_s8s32_dot_4x6/a55.cpp new file mode 100644 index 0000000000..c957d11608 --- /dev/null +++ b/src/core/NEON/kernels/arm_gemm/kernels/a64_smallK_hybrid_s8s32_dot_4x6/a55.cpp @@ -0,0 +1,3978 @@ +/* + * Copyright (c) 2019 ARM Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#ifdef __aarch64__ + +#include + +#include +#include "../../asmlib.hpp" +#include "../../utils.hpp" + +namespace arm_gemm { + +void a64_smallK_hybrid_s8s32_dot_4x6_a55(const int8_t *A, int lda, const int8_t *B, int32_t *C, int ldc, int32_t beta, int M, int N, int K) { + const long loops_count = (N / 4) - 1; + const long ldab = lda * sizeof(int8_t); + const long ldcb = ldc * sizeof(int32_t); + const long odds_count = K % 4; + K = (K + 3) / 4; + + for (int y0=0; y0 + +#include +#include "../../asmlib.hpp" +#include "../../utils.hpp" + +namespace arm_gemm { + +void a64_smallK_hybrid_s8s32_dot_4x6(const int8_t *A, int lda, const int8_t *B, int32_t *C, int ldc, int32_t beta, int M, int N, int K) { + const long loops_count = (N / 4) - 1; + const long ldab = lda * sizeof(int8_t); + const long ldcb = ldc * sizeof(int32_t); + const long odds_count = K % 4; + K = (K + 3) / 4; + + for (int y0=0; y0 + +namespace arm_gemm +{ + +// Actual kernel implementations +void a64_smallK_hybrid_s8s32_dot_4x8(const int8_t *, int, const int8_t *, int32_t *, int, int32_t, int, int, int); +void a64_smallK_hybrid_s8s32_dot_4x8_a55(const int8_t *, int, const int8_t *, int32_t *, int, int32_t, int, int, int); + +class smallK_hybrid_s8s32_dot_4x8 +{ +public: + typedef int8_t operand_type; + typedef int32_t result_type; + + typedef void (*kern_type)(const int8_t *, int, const int8_t *, int32_t *, int, int32_t, int, int, int); + + /* Kernel blocking parameters */ + static unsigned int out_height() + { + return 8; + } + + static unsigned int out_width() + { + return 4; + } + + static unsigned int k_unroll() + { + return 4; + } + + StdTransformsFixed transforms = {}; + + // Default to the generic kernel + kern_type kernel=a64_smallK_hybrid_s8s32_dot_4x8; + + smallK_hybrid_s8s32_dot_4x8(const CPUInfo *ci) + { + if (ci->get_cpu_model() == CPUModel::A55r1) { + kernel = a64_smallK_hybrid_s8s32_dot_4x8_a55; + } + } +}; + +} // namespace arm_gemm + +#endif // __aarch64__ diff --git a/src/core/NEON/kernels/arm_gemm/kernels/a64_smallK_hybrid_s8s32_dot_4x8/a55.cpp b/src/core/NEON/kernels/arm_gemm/kernels/a64_smallK_hybrid_s8s32_dot_4x8/a55.cpp new file mode 100644 index 0000000000..f050fff84a --- /dev/null +++ b/src/core/NEON/kernels/arm_gemm/kernels/a64_smallK_hybrid_s8s32_dot_4x8/a55.cpp @@ -0,0 +1,2894 @@ +/* + * Copyright (c) 2019 ARM Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#ifdef __aarch64__ + +#include + +#include +#include "../../asmlib.hpp" +#include "../../utils.hpp" + +namespace arm_gemm { + +void a64_smallK_hybrid_s8s32_dot_4x8_a55(const int8_t *A, int lda, const int8_t *B, int32_t *C, int ldc, int32_t beta, int M, int N, int K) { + const long loops_count = (N / 4) - 1; + const long ldab = lda * sizeof(int8_t); + const long ldcb = ldc * sizeof(int32_t); + const long odds_count = K % 4; + K = (K + 3) / 4; + + for (int y0=0; y0 + +#include +#include "../../asmlib.hpp" +#include "../../utils.hpp" + +namespace arm_gemm { + +void a64_smallK_hybrid_s8s32_dot_4x8(const int8_t *A, int lda, const int8_t *B, int32_t *C, int ldc, int32_t beta, int M, int N, int K) { + const long loops_count = (N / 4) - 1; + const long ldab = lda * sizeof(int8_t); + const long ldcb = ldc * sizeof(int32_t); + const long odds_count = K % 4; + K = (K + 3) / 4; + + for (int y0=0; y0 + +namespace arm_gemm +{ + +// Actual kernel implementations +void a64_smallK_hybrid_u8u32_dot_4x6(const uint8_t *, int, const uint8_t *, uint32_t *, int, uint32_t, int, int, int); +void a64_smallK_hybrid_u8u32_dot_4x6_a55(const uint8_t *, int, const uint8_t *, uint32_t *, int, uint32_t, int, int, int); + +class smallK_hybrid_u8u32_dot_4x6 +{ +public: + typedef uint8_t operand_type; + typedef uint32_t result_type; + + typedef void (*kern_type)(const uint8_t *, int, const uint8_t *, uint32_t *, int, uint32_t, int, int, int); + + /* Kernel blocking parameters */ + static constexpr unsigned int out_height() + { + return 6; + } + + static unsigned int out_width() + { + return 4; + } + + static unsigned int k_unroll() + { + return 4; + } + + StdTransformsFixed transforms = {}; + + // Default to the generic kernel + kern_type kernel=a64_smallK_hybrid_u8u32_dot_4x6; + + smallK_hybrid_u8u32_dot_4x6(const CPUInfo *ci) + { + if (ci->get_cpu_model() == CPUModel::A55r1) { + kernel = a64_smallK_hybrid_u8u32_dot_4x6_a55; + } + } +}; + +} // namespace arm_gemm + +#endif // __aarch64__ diff --git a/src/core/NEON/kernels/arm_gemm/kernels/a64_smallK_hybrid_u8u32_dot_4x6/a55.cpp b/src/core/NEON/kernels/arm_gemm/kernels/a64_smallK_hybrid_u8u32_dot_4x6/a55.cpp new file mode 100644 index 0000000000..88ea940fb7 --- /dev/null +++ b/src/core/NEON/kernels/arm_gemm/kernels/a64_smallK_hybrid_u8u32_dot_4x6/a55.cpp @@ -0,0 +1,4122 @@ +/* + * Copyright (c) 2019 ARM Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#ifdef __aarch64__ + +#include + +#include +#include "../../asmlib.hpp" +#include "../../utils.hpp" + +namespace arm_gemm { + +void a64_smallK_hybrid_u8u32_dot_4x6_a55(const uint8_t *A, int lda, const uint8_t *B, uint32_t *C, int ldc, uint32_t beta, int M, int N, int K) { + const long loops_count = iceildiv(N, (int)4) - 1; + const long ldab = lda * sizeof(uint8_t); + const long ldcb = ldc * sizeof(uint32_t); + const long odds_count = K % 4; + K = (K + 3) / 4; + + for (int y0=0; y0 + +#include +#include "../../asmlib.hpp" +#include "../../utils.hpp" + +namespace arm_gemm { + +void a64_smallK_hybrid_u8u32_dot_4x6(const uint8_t *A, int lda, const uint8_t *B, uint32_t *C, int ldc, uint32_t beta, int M, int N, int K) { + const long loops_count = iceildiv(N, (int)4) - 1; + const long ldab = lda * sizeof(uint8_t); + const long ldcb = ldc * sizeof(uint32_t); + const long odds_count = K % 4; + K = (K + 3) / 4; + + for (int y0=0; y0 + +namespace arm_gemm +{ + +// Actual kernel implementations +void a64_smallK_hybrid_u8u32_dot_4x8(const uint8_t *, int, const uint8_t *, uint32_t *, int, uint32_t, int, int, int); +void a64_smallK_hybrid_u8u32_dot_4x8_a55(const uint8_t *, int, const uint8_t *, uint32_t *, int, uint32_t, int, int, int); + +class smallK_hybrid_u8u32_dot_4x8 +{ +public: + typedef uint8_t operand_type; + typedef uint32_t result_type; + + typedef void (*kern_type)(const uint8_t *, int, const uint8_t *, uint32_t *, int, uint32_t, int, int, int); + + /* Kernel blocking parameters */ + static constexpr unsigned int out_height() + { + return 8; + } + + static unsigned int out_width() + { + return 4; + } + + static unsigned int k_unroll() + { + return 4; + } + + StdTransformsFixed transforms = {}; + + // Default to the generic kernel + kern_type kernel=a64_smallK_hybrid_u8u32_dot_4x8; + + smallK_hybrid_u8u32_dot_4x8(const CPUInfo *ci) + { + if (ci->get_cpu_model() == CPUModel::A55r1) { + kernel = a64_smallK_hybrid_u8u32_dot_4x8_a55; + } + } +}; + +} // namespace arm_gemm + +#endif // __aarch64__ diff --git a/src/core/NEON/kernels/arm_gemm/kernels/a64_smallK_hybrid_u8u32_dot_4x8/a55.cpp b/src/core/NEON/kernels/arm_gemm/kernels/a64_smallK_hybrid_u8u32_dot_4x8/a55.cpp new file mode 100644 index 0000000000..fdd928d567 --- /dev/null +++ b/src/core/NEON/kernels/arm_gemm/kernels/a64_smallK_hybrid_u8u32_dot_4x8/a55.cpp @@ -0,0 +1,3086 @@ +/* + * Copyright (c) 2019 ARM Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#ifdef __aarch64__ + +#include + +#include +#include "../../asmlib.hpp" +#include "../../utils.hpp" + +namespace arm_gemm { + +void a64_smallK_hybrid_u8u32_dot_4x8_a55(const uint8_t *A, int lda, const uint8_t *B, uint32_t *C, int ldc, uint32_t beta, int M, int N, int K) { + const long loops_count = iceildiv(N, (int)4) - 1; + const long ldab = lda * sizeof(uint8_t); + const long ldcb = ldc * sizeof(uint32_t); + const long odds_count = K % 4; + K = (K + 3) / 4; + + for (int y0=0; y0 + +#include +#include "../../asmlib.hpp" +#include "../../utils.hpp" + +namespace arm_gemm { + +void a64_smallK_hybrid_u8u32_dot_4x8(const uint8_t *A, int lda, const uint8_t *B, uint32_t *C, int ldc, uint32_t beta, int M, int N, int K) { + const long loops_count = iceildiv(N, (int)4) - 1; + const long ldab = lda * sizeof(uint8_t); + const long ldcb = ldc * sizeof(uint32_t); + const long odds_count = K % 4; + K = (K + 3) / 4; + + for (int y0=0; y0 + +namespace arm_gemm +{ + +// Actual kernel implementations +void sve_smallK_hybrid_s8s32_dot_1VLx8(const int8_t *, int, const int8_t *, int32_t *, int, int32_t, int, int, int); + +class smallK_hybrid_s8s32_dot_1VLx8 +{ +public: + typedef int8_t operand_type; + typedef int32_t result_type; + + typedef void (*kern_type)(const int8_t *, int, const int8_t *, int32_t *, int, int32_t, int, int, int); + + /* Kernel blocking parameters */ + static constexpr unsigned int out_height() + { + return 8; + } + + static unsigned int out_width() + { + return get_vector_length() * 1; + } + + static constexpr unsigned int k_unroll() + { + return 4; + } + + StdTransformsSVE transforms = {}; + + // Default to the generic kernel + kern_type kernel=sve_smallK_hybrid_s8s32_dot_1VLx8; + + smallK_hybrid_s8s32_dot_1VLx8(const CPUInfo *ci) + { + + } +}; + +} // namespace arm_gemm + +#endif // __ARM_FEATURE_SVE diff --git a/src/core/NEON/kernels/arm_gemm/kernels/sve_smallK_hybrid_s8s32_dot_1VLx8/generic.cpp b/src/core/NEON/kernels/arm_gemm/kernels/sve_smallK_hybrid_s8s32_dot_1VLx8/generic.cpp new file mode 100644 index 0000000000..04605b2ac1 --- /dev/null +++ b/src/core/NEON/kernels/arm_gemm/kernels/sve_smallK_hybrid_s8s32_dot_1VLx8/generic.cpp @@ -0,0 +1,7501 @@ +/* + * Copyright (c) 2019 ARM Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#ifdef __ARM_FEATURE_SVE + +#include + +#include +#include "../../asmlib.hpp" +#include "../../utils.hpp" + +namespace arm_gemm { + +void sve_smallK_hybrid_s8s32_dot_1VLx8(const int8_t *A, int lda, const int8_t *B, int32_t *C, int ldc, int32_t beta, int M, int N, int K) { + const long loops_count = iceildiv(N, (int)get_vector_length()) - 1; + const long ldab = lda * sizeof(int8_t); + const long ldcb = ldc * sizeof(int32_t); + const long odd_depth = (K % 16) ? (K % 16) : 16; + const long last_width = N - (loops_count * get_vector_length()); + const long odds_count = K % 4; + K = (K + 3) / 4; + + for (int y0=0; y0 + +namespace arm_gemm +{ + +// Actual kernel implementations +void sve_smallK_hybrid_u8u32_dot_1VLx8(const uint8_t *, int, const uint8_t *, uint32_t *, int, uint32_t, int, int, int); + +class smallK_hybrid_u8u32_dot_1VLx8 +{ +public: + typedef uint8_t operand_type; + typedef uint32_t result_type; + + typedef void (*kern_type)(const uint8_t *, int, const uint8_t *, uint32_t *, int, uint32_t, int, int, int); + + /* Kernel blocking parameters */ + static constexpr unsigned int out_height() + { + return 8; + } + + static unsigned int out_width() + { + return get_vector_length() * 1; + } + + static constexpr unsigned int k_unroll() + { + return 4; + } + + StdTransformsSVE transforms = {}; + + // Default to the generic kernel + kern_type kernel=sve_smallK_hybrid_u8u32_dot_1VLx8; + + smallK_hybrid_u8u32_dot_1VLx8(const CPUInfo *ci) + { + + } +}; + +} // namespace arm_gemm + +#endif // __ARM_FEATURE_SVE diff --git a/src/core/NEON/kernels/arm_gemm/kernels/sve_smallK_hybrid_u8u32_dot_1VLx8/generic.cpp b/src/core/NEON/kernels/arm_gemm/kernels/sve_smallK_hybrid_u8u32_dot_1VLx8/generic.cpp new file mode 100644 index 0000000000..7c965d38a6 --- /dev/null +++ b/src/core/NEON/kernels/arm_gemm/kernels/sve_smallK_hybrid_u8u32_dot_1VLx8/generic.cpp @@ -0,0 +1,7501 @@ +/* + * Copyright (c) 2019 ARM Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#ifdef __ARM_FEATURE_SVE + +#include + +#include +#include "../../asmlib.hpp" +#include "../../utils.hpp" + +namespace arm_gemm { + +void sve_smallK_hybrid_u8u32_dot_1VLx8(const uint8_t *A, int lda, const uint8_t *B, uint32_t *C, int ldc, uint32_t beta, int M, int N, int K) { + const long loops_count = iceildiv(N, (int)get_vector_length()) - 1; + const long ldab = lda * sizeof(uint8_t); + const long ldcb = ldc * sizeof(uint32_t); + const long odd_depth = (K % 16) ? (K % 16) : 16; + const long last_width = N - (loops_count * get_vector_length()); + const long odds_count = K % 4; + K = (K + 3) / 4; + + for (int y0=0; y0(float *out, const float *in, const int ldou ); } break; - + case 2: { long w = xmax - i; @@ -135,7 +135,7 @@ inline void MergeResults<3, 8, true>(float *out, const float *in, const int ldou ); } break; - + case 3: { long w = xmax - i; @@ -198,7 +198,7 @@ inline void MergeResults<3, 8, true>(float *out, const float *in, const int ldou ); } break; - + case 4: { long w = xmax - i; @@ -272,7 +272,7 @@ inline void MergeResults<3, 8, true>(float *out, const float *in, const int ldou ); } break; - + case 5: { long w = xmax - i; @@ -358,7 +358,7 @@ inline void MergeResults<3, 8, true>(float *out, const float *in, const int ldou ); } break; - + case 6: { long w = xmax - i; @@ -456,7 +456,7 @@ inline void MergeResults<3, 8, true>(float *out, const float *in, const int ldou ); } break; - + case 7: { long w = xmax - i; @@ -566,7 +566,7 @@ inline void MergeResults<3, 8, true>(float *out, const float *in, const int ldou ); } break; - + default: case 8: { @@ -688,8 +688,8 @@ inline void MergeResults<3, 8, true>(float *out, const float *in, const int ldou ); } break; - - + + } } else @@ -739,7 +739,7 @@ inline void MergeResults<3, 8, true>(float *out, const float *in, const int ldou ); } break; - + case 2: { long w = xmax - i; @@ -802,7 +802,7 @@ inline void MergeResults<3, 8, true>(float *out, const float *in, const int ldou ); } break; - + case 3: { long w = xmax - i; @@ -883,7 +883,7 @@ inline void MergeResults<3, 8, true>(float *out, const float *in, const int ldou ); } break; - + case 4: { long w = xmax - i; @@ -981,7 +981,7 @@ inline void MergeResults<3, 8, true>(float *out, const float *in, const int ldou ); } break; - + case 5: { long w = xmax - i; @@ -1097,7 +1097,7 @@ inline void MergeResults<3, 8, true>(float *out, const float *in, const int ldou ); } break; - + case 6: { long w = xmax - i; @@ -1231,7 +1231,7 @@ inline void MergeResults<3, 8, true>(float *out, const float *in, const int ldou ); } break; - + case 7: { long w = xmax - i; @@ -1383,7 +1383,7 @@ inline void MergeResults<3, 8, true>(float *out, const float *in, const int ldou ); } break; - + default: case 8: { @@ -1553,8 +1553,8 @@ inline void MergeResults<3, 8, true>(float *out, const float *in, const int ldou ); } break; - - + + } } } diff --git a/src/core/NEON/kernels/arm_gemm/merges/sve_merge_s32_3VLx8.hpp b/src/core/NEON/kernels/arm_gemm/merges/sve_merge_s32_3VLx8.hpp new file mode 100644 index 0000000000..2ea38a78df --- /dev/null +++ b/src/core/NEON/kernels/arm_gemm/merges/sve_merge_s32_3VLx8.hpp @@ -0,0 +1,1348 @@ +/* + * Copyright (c) 2019 ARM Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#pragma once + +#ifdef __ARM_FEATURE_SVE + +template<> +inline void MergeResults<3, 8, true>(int32_t *out, const int32_t *in, const int ldout, const int y0, const int ymax, const int x0, const int xmax, const int32_t alpha, const int32_t beta) +{ + const int32_t *inptr = in; + + for (int y=y0; y())) { + if (beta==0) + { + switch(height) { + case 1: + { + long w = xmax - i; + long p = 0; + /* Optimized routine to copy an entire block */ + __asm __volatile ( + "mov z2.s, %s[alpha]\n" + "addvl x8, %[inptr], #16\n" + "mov z3.s, %s[beta]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "incw %[p], all, mul #1\n" + "prfm PLDL1KEEP, [%[inptr], #0x180]\n" + "ld1w z8.s, p0/z, [%[inptr]]\n" + "st1w z8.s, p0, [%[outptr0]]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "incw %[p], all, mul #1\n" + "ld1w z9.s, p0/z, [%[inptr], #1, MUL VL]\n" + "st1w z9.s, p0, [%[outptr0], #1, MUL VL]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "prfm PSTL1KEEP, [%[outptr0], #0x60]\n" + "ld1w z10.s, p0/z, [%[inptr], #2, MUL VL]\n" + "st1w z10.s, p0, [%[outptr0], #2, MUL VL]\n" + "addvl %[outptr0], %[outptr0], #3\n" + "1:\n" + "addvl %[inptr], %[inptr], #24\n" + : [outptr0] "+r" (outptr0), [outptr1] "+r" (outptr1), [outptr2] "+r" (outptr2), [outptr3] "+r" (outptr3), [outptr4] "+r" (outptr4), [outptr5] "+r" (outptr5), [outptr6] "+r" (outptr6), [outptr7] "+r" (outptr7), + [inptr] "+r" (inptr), [p] "+r" (p) + : [alpha] "w" (alpha), [beta] "w" (beta), [w] "r" (w) + : "x8", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "memory", "cc" + ); + } + break; + + case 2: + { + long w = xmax - i; + long p = 0; + /* Optimized routine to copy an entire block */ + __asm __volatile ( + "mov z2.s, %s[alpha]\n" + "addvl x8, %[inptr], #16\n" + "mov z3.s, %s[beta]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "incw %[p], all, mul #1\n" + "prfm PLDL1KEEP, [%[inptr], #0x180]\n" + "ld1w z8.s, p0/z, [%[inptr]]\n" + "ld1w z9.s, p0/z, [%[inptr], #3, MUL VL]\n" + "st1w z8.s, p0, [%[outptr0]]\n" + "st1w z9.s, p0, [%[outptr1]]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "incw %[p], all, mul #1\n" + "prfm PLDL1KEEP, [%[inptr], #0x1c0]\n" + "ld1w z10.s, p0/z, [%[inptr], #1, MUL VL]\n" + "ld1w z11.s, p0/z, [%[inptr], #4, MUL VL]\n" + "st1w z10.s, p0, [%[outptr0], #1, MUL VL]\n" + "st1w z11.s, p0, [%[outptr1], #1, MUL VL]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "prfm PSTL1KEEP, [%[outptr0], #0x60]\n" + "prfm PSTL1KEEP, [%[outptr1], #0x60]\n" + "ld1w z8.s, p0/z, [%[inptr], #2, MUL VL]\n" + "ld1w z9.s, p0/z, [%[inptr], #5, MUL VL]\n" + "st1w z8.s, p0, [%[outptr0], #2, MUL VL]\n" + "addvl %[outptr0], %[outptr0], #3\n" + "st1w z9.s, p0, [%[outptr1], #2, MUL VL]\n" + "addvl %[outptr1], %[outptr1], #3\n" + "1:\n" + "addvl %[inptr], %[inptr], #24\n" + : [outptr0] "+r" (outptr0), [outptr1] "+r" (outptr1), [outptr2] "+r" (outptr2), [outptr3] "+r" (outptr3), [outptr4] "+r" (outptr4), [outptr5] "+r" (outptr5), [outptr6] "+r" (outptr6), [outptr7] "+r" (outptr7), + [inptr] "+r" (inptr), [p] "+r" (p) + : [alpha] "w" (alpha), [beta] "w" (beta), [w] "r" (w) + : "x8", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "memory", "cc" + ); + } + break; + + case 3: + { + long w = xmax - i; + long p = 0; + /* Optimized routine to copy an entire block */ + __asm __volatile ( + "mov z2.s, %s[alpha]\n" + "addvl x8, %[inptr], #16\n" + "mov z3.s, %s[beta]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "incw %[p], all, mul #1\n" + "prfm PLDL1KEEP, [%[inptr], #0x180]\n" + "ld1w z8.s, p0/z, [%[inptr]]\n" + "ld1w z9.s, p0/z, [%[inptr], #3, MUL VL]\n" + "ld1w z10.s, p0/z, [%[inptr], #6, MUL VL]\n" + "st1w z8.s, p0, [%[outptr0]]\n" + "st1w z9.s, p0, [%[outptr1]]\n" + "st1w z10.s, p0, [%[outptr2]]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "incw %[p], all, mul #1\n" + "prfm PLDL1KEEP, [%[inptr], #0x1c0]\n" + "ld1w z11.s, p0/z, [%[inptr], #1, MUL VL]\n" + "ld1w z8.s, p0/z, [%[inptr], #4, MUL VL]\n" + "ld1w z9.s, p0/z, [%[inptr], #7, MUL VL]\n" + "st1w z11.s, p0, [%[outptr0], #1, MUL VL]\n" + "st1w z8.s, p0, [%[outptr1], #1, MUL VL]\n" + "st1w z9.s, p0, [%[outptr2], #1, MUL VL]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "prfm PSTL1KEEP, [%[outptr0], #0x60]\n" + "prfm PSTL1KEEP, [%[outptr1], #0x60]\n" + "ld1w z10.s, p0/z, [%[inptr], #2, MUL VL]\n" + "prfm PLDL1KEEP, [%[inptr], #0x200]\n" + "ld1w z11.s, p0/z, [%[inptr], #5, MUL VL]\n" + "prfm PSTL1KEEP, [%[outptr2], #0x60]\n" + "st1w z10.s, p0, [%[outptr0], #2, MUL VL]\n" + "addvl %[outptr0], %[outptr0], #3\n" + "ld1w z8.s, p0/z, [x8, #-8, MUL VL]\n" + "st1w z11.s, p0, [%[outptr1], #2, MUL VL]\n" + "addvl %[outptr1], %[outptr1], #3\n" + "st1w z8.s, p0, [%[outptr2], #2, MUL VL]\n" + "addvl %[outptr2], %[outptr2], #3\n" + "1:\n" + "addvl %[inptr], %[inptr], #24\n" + : [outptr0] "+r" (outptr0), [outptr1] "+r" (outptr1), [outptr2] "+r" (outptr2), [outptr3] "+r" (outptr3), [outptr4] "+r" (outptr4), [outptr5] "+r" (outptr5), [outptr6] "+r" (outptr6), [outptr7] "+r" (outptr7), + [inptr] "+r" (inptr), [p] "+r" (p) + : [alpha] "w" (alpha), [beta] "w" (beta), [w] "r" (w) + : "x8", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "memory", "cc" + ); + } + break; + + case 4: + { + long w = xmax - i; + long p = 0; + /* Optimized routine to copy an entire block */ + __asm __volatile ( + "mov z2.s, %s[alpha]\n" + "addvl x8, %[inptr], #16\n" + "mov z3.s, %s[beta]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "incw %[p], all, mul #1\n" + "prfm PLDL1KEEP, [%[inptr], #0x180]\n" + "ld1w z8.s, p0/z, [%[inptr]]\n" + "ld1w z9.s, p0/z, [%[inptr], #3, MUL VL]\n" + "ld1w z10.s, p0/z, [%[inptr], #6, MUL VL]\n" + "ld1w z11.s, p0/z, [x8, #-7, MUL VL]\n" + "st1w z8.s, p0, [%[outptr0]]\n" + "st1w z9.s, p0, [%[outptr1]]\n" + "st1w z10.s, p0, [%[outptr2]]\n" + "st1w z11.s, p0, [%[outptr3]]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "incw %[p], all, mul #1\n" + "prfm PLDL1KEEP, [%[inptr], #0x1c0]\n" + "ld1w z8.s, p0/z, [%[inptr], #1, MUL VL]\n" + "ld1w z9.s, p0/z, [%[inptr], #4, MUL VL]\n" + "ld1w z10.s, p0/z, [%[inptr], #7, MUL VL]\n" + "ld1w z11.s, p0/z, [x8, #-6, MUL VL]\n" + "st1w z8.s, p0, [%[outptr0], #1, MUL VL]\n" + "st1w z9.s, p0, [%[outptr1], #1, MUL VL]\n" + "st1w z10.s, p0, [%[outptr2], #1, MUL VL]\n" + "st1w z11.s, p0, [%[outptr3], #1, MUL VL]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "prfm PSTL1KEEP, [%[outptr0], #0x60]\n" + "prfm PSTL1KEEP, [%[outptr1], #0x60]\n" + "ld1w z8.s, p0/z, [%[inptr], #2, MUL VL]\n" + "prfm PLDL1KEEP, [%[inptr], #0x200]\n" + "ld1w z9.s, p0/z, [%[inptr], #5, MUL VL]\n" + "prfm PSTL1KEEP, [%[outptr2], #0x60]\n" + "st1w z8.s, p0, [%[outptr0], #2, MUL VL]\n" + "addvl %[outptr0], %[outptr0], #3\n" + "ld1w z10.s, p0/z, [x8, #-8, MUL VL]\n" + "prfm PSTL1KEEP, [%[outptr3], #0x60]\n" + "st1w z9.s, p0, [%[outptr1], #2, MUL VL]\n" + "addvl %[outptr1], %[outptr1], #3\n" + "ld1w z11.s, p0/z, [x8, #-5, MUL VL]\n" + "st1w z10.s, p0, [%[outptr2], #2, MUL VL]\n" + "addvl %[outptr2], %[outptr2], #3\n" + "st1w z11.s, p0, [%[outptr3], #2, MUL VL]\n" + "addvl %[outptr3], %[outptr3], #3\n" + "1:\n" + "addvl %[inptr], %[inptr], #24\n" + : [outptr0] "+r" (outptr0), [outptr1] "+r" (outptr1), [outptr2] "+r" (outptr2), [outptr3] "+r" (outptr3), [outptr4] "+r" (outptr4), [outptr5] "+r" (outptr5), [outptr6] "+r" (outptr6), [outptr7] "+r" (outptr7), + [inptr] "+r" (inptr), [p] "+r" (p) + : [alpha] "w" (alpha), [beta] "w" (beta), [w] "r" (w) + : "x8", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "memory", "cc" + ); + } + break; + + case 5: + { + long w = xmax - i; + long p = 0; + /* Optimized routine to copy an entire block */ + __asm __volatile ( + "mov z2.s, %s[alpha]\n" + "addvl x8, %[inptr], #16\n" + "mov z3.s, %s[beta]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "incw %[p], all, mul #1\n" + "prfm PLDL1KEEP, [%[inptr], #0x180]\n" + "ld1w z8.s, p0/z, [%[inptr]]\n" + "prfm PLDL1KEEP, [%[inptr], #0x240]\n" + "ld1w z9.s, p0/z, [%[inptr], #3, MUL VL]\n" + "ld1w z10.s, p0/z, [%[inptr], #6, MUL VL]\n" + "st1w z8.s, p0, [%[outptr0]]\n" + "ld1w z11.s, p0/z, [x8, #-7, MUL VL]\n" + "ld1w z8.s, p0/z, [x8, #-4, MUL VL]\n" + "st1w z9.s, p0, [%[outptr1]]\n" + "st1w z10.s, p0, [%[outptr2]]\n" + "st1w z11.s, p0, [%[outptr3]]\n" + "st1w z8.s, p0, [%[outptr4]]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "incw %[p], all, mul #1\n" + "prfm PLDL1KEEP, [%[inptr], #0x1c0]\n" + "ld1w z9.s, p0/z, [%[inptr], #1, MUL VL]\n" + "ld1w z10.s, p0/z, [%[inptr], #4, MUL VL]\n" + "ld1w z11.s, p0/z, [%[inptr], #7, MUL VL]\n" + "ld1w z8.s, p0/z, [x8, #-6, MUL VL]\n" + "st1w z9.s, p0, [%[outptr0], #1, MUL VL]\n" + "ld1w z9.s, p0/z, [x8, #-3, MUL VL]\n" + "st1w z10.s, p0, [%[outptr1], #1, MUL VL]\n" + "st1w z11.s, p0, [%[outptr2], #1, MUL VL]\n" + "st1w z8.s, p0, [%[outptr3], #1, MUL VL]\n" + "st1w z9.s, p0, [%[outptr4], #1, MUL VL]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "prfm PSTL1KEEP, [%[outptr0], #0x60]\n" + "prfm PSTL1KEEP, [%[outptr1], #0x60]\n" + "ld1w z10.s, p0/z, [%[inptr], #2, MUL VL]\n" + "prfm PLDL1KEEP, [%[inptr], #0x200]\n" + "ld1w z11.s, p0/z, [%[inptr], #5, MUL VL]\n" + "prfm PSTL1KEEP, [%[outptr2], #0x60]\n" + "st1w z10.s, p0, [%[outptr0], #2, MUL VL]\n" + "addvl %[outptr0], %[outptr0], #3\n" + "ld1w z8.s, p0/z, [x8, #-8, MUL VL]\n" + "prfm PSTL1KEEP, [%[outptr3], #0x60]\n" + "st1w z11.s, p0, [%[outptr1], #2, MUL VL]\n" + "addvl %[outptr1], %[outptr1], #3\n" + "ld1w z9.s, p0/z, [x8, #-5, MUL VL]\n" + "prfm PSTL1KEEP, [%[outptr4], #0x60]\n" + "st1w z8.s, p0, [%[outptr2], #2, MUL VL]\n" + "addvl %[outptr2], %[outptr2], #3\n" + "ld1w z10.s, p0/z, [x8, #-2, MUL VL]\n" + "st1w z9.s, p0, [%[outptr3], #2, MUL VL]\n" + "addvl %[outptr3], %[outptr3], #3\n" + "st1w z10.s, p0, [%[outptr4], #2, MUL VL]\n" + "addvl %[outptr4], %[outptr4], #3\n" + "1:\n" + "addvl %[inptr], %[inptr], #24\n" + : [outptr0] "+r" (outptr0), [outptr1] "+r" (outptr1), [outptr2] "+r" (outptr2), [outptr3] "+r" (outptr3), [outptr4] "+r" (outptr4), [outptr5] "+r" (outptr5), [outptr6] "+r" (outptr6), [outptr7] "+r" (outptr7), + [inptr] "+r" (inptr), [p] "+r" (p) + : [alpha] "w" (alpha), [beta] "w" (beta), [w] "r" (w) + : "x8", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "memory", "cc" + ); + } + break; + + case 6: + { + long w = xmax - i; + long p = 0; + /* Optimized routine to copy an entire block */ + __asm __volatile ( + "mov z2.s, %s[alpha]\n" + "addvl x8, %[inptr], #16\n" + "mov z3.s, %s[beta]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "incw %[p], all, mul #1\n" + "prfm PLDL1KEEP, [%[inptr], #0x180]\n" + "ld1w z8.s, p0/z, [%[inptr]]\n" + "prfm PLDL1KEEP, [%[inptr], #0x240]\n" + "ld1w z9.s, p0/z, [%[inptr], #3, MUL VL]\n" + "ld1w z10.s, p0/z, [%[inptr], #6, MUL VL]\n" + "st1w z8.s, p0, [%[outptr0]]\n" + "ld1w z11.s, p0/z, [x8, #-7, MUL VL]\n" + "ld1w z8.s, p0/z, [x8, #-4, MUL VL]\n" + "st1w z9.s, p0, [%[outptr1]]\n" + "ld1w z9.s, p0/z, [x8, #-1, MUL VL]\n" + "st1w z10.s, p0, [%[outptr2]]\n" + "st1w z11.s, p0, [%[outptr3]]\n" + "st1w z8.s, p0, [%[outptr4]]\n" + "st1w z9.s, p0, [%[outptr5]]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "incw %[p], all, mul #1\n" + "prfm PLDL1KEEP, [%[inptr], #0x1c0]\n" + "ld1w z10.s, p0/z, [%[inptr], #1, MUL VL]\n" + "prfm PLDL1KEEP, [%[inptr], #0x280]\n" + "ld1w z11.s, p0/z, [%[inptr], #4, MUL VL]\n" + "ld1w z8.s, p0/z, [%[inptr], #7, MUL VL]\n" + "st1w z10.s, p0, [%[outptr0], #1, MUL VL]\n" + "ld1w z9.s, p0/z, [x8, #-6, MUL VL]\n" + "ld1w z10.s, p0/z, [x8, #-3, MUL VL]\n" + "st1w z11.s, p0, [%[outptr1], #1, MUL VL]\n" + "ld1w z11.s, p0/z, [x8]\n" + "st1w z8.s, p0, [%[outptr2], #1, MUL VL]\n" + "st1w z9.s, p0, [%[outptr3], #1, MUL VL]\n" + "st1w z10.s, p0, [%[outptr4], #1, MUL VL]\n" + "st1w z11.s, p0, [%[outptr5], #1, MUL VL]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "prfm PSTL1KEEP, [%[outptr0], #0x60]\n" + "prfm PSTL1KEEP, [%[outptr1], #0x60]\n" + "ld1w z8.s, p0/z, [%[inptr], #2, MUL VL]\n" + "prfm PLDL1KEEP, [%[inptr], #0x200]\n" + "ld1w z9.s, p0/z, [%[inptr], #5, MUL VL]\n" + "prfm PSTL1KEEP, [%[outptr2], #0x60]\n" + "st1w z8.s, p0, [%[outptr0], #2, MUL VL]\n" + "addvl %[outptr0], %[outptr0], #3\n" + "ld1w z10.s, p0/z, [x8, #-8, MUL VL]\n" + "prfm PSTL1KEEP, [%[outptr3], #0x60]\n" + "st1w z9.s, p0, [%[outptr1], #2, MUL VL]\n" + "addvl %[outptr1], %[outptr1], #3\n" + "ld1w z11.s, p0/z, [x8, #-5, MUL VL]\n" + "prfm PSTL1KEEP, [%[outptr4], #0x60]\n" + "st1w z10.s, p0, [%[outptr2], #2, MUL VL]\n" + "addvl %[outptr2], %[outptr2], #3\n" + "ld1w z8.s, p0/z, [x8, #-2, MUL VL]\n" + "prfm PSTL1KEEP, [%[outptr5], #0x60]\n" + "st1w z11.s, p0, [%[outptr3], #2, MUL VL]\n" + "addvl %[outptr3], %[outptr3], #3\n" + "ld1w z9.s, p0/z, [x8, #1, MUL VL]\n" + "st1w z8.s, p0, [%[outptr4], #2, MUL VL]\n" + "addvl %[outptr4], %[outptr4], #3\n" + "st1w z9.s, p0, [%[outptr5], #2, MUL VL]\n" + "addvl %[outptr5], %[outptr5], #3\n" + "1:\n" + "addvl %[inptr], %[inptr], #24\n" + : [outptr0] "+r" (outptr0), [outptr1] "+r" (outptr1), [outptr2] "+r" (outptr2), [outptr3] "+r" (outptr3), [outptr4] "+r" (outptr4), [outptr5] "+r" (outptr5), [outptr6] "+r" (outptr6), [outptr7] "+r" (outptr7), + [inptr] "+r" (inptr), [p] "+r" (p) + : [alpha] "w" (alpha), [beta] "w" (beta), [w] "r" (w) + : "x8", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "memory", "cc" + ); + } + break; + + case 7: + { + long w = xmax - i; + long p = 0; + /* Optimized routine to copy an entire block */ + __asm __volatile ( + "mov z2.s, %s[alpha]\n" + "addvl x8, %[inptr], #16\n" + "mov z3.s, %s[beta]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "incw %[p], all, mul #1\n" + "prfm PLDL1KEEP, [%[inptr], #0x180]\n" + "ld1w z8.s, p0/z, [%[inptr]]\n" + "prfm PLDL1KEEP, [%[inptr], #0x240]\n" + "ld1w z9.s, p0/z, [%[inptr], #3, MUL VL]\n" + "ld1w z10.s, p0/z, [%[inptr], #6, MUL VL]\n" + "st1w z8.s, p0, [%[outptr0]]\n" + "ld1w z11.s, p0/z, [x8, #-7, MUL VL]\n" + "ld1w z8.s, p0/z, [x8, #-4, MUL VL]\n" + "st1w z9.s, p0, [%[outptr1]]\n" + "ld1w z9.s, p0/z, [x8, #-1, MUL VL]\n" + "st1w z10.s, p0, [%[outptr2]]\n" + "ld1w z10.s, p0/z, [x8, #2, MUL VL]\n" + "st1w z11.s, p0, [%[outptr3]]\n" + "st1w z8.s, p0, [%[outptr4]]\n" + "st1w z9.s, p0, [%[outptr5]]\n" + "st1w z10.s, p0, [%[outptr6]]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "incw %[p], all, mul #1\n" + "prfm PLDL1KEEP, [%[inptr], #0x1c0]\n" + "ld1w z11.s, p0/z, [%[inptr], #1, MUL VL]\n" + "prfm PLDL1KEEP, [%[inptr], #0x280]\n" + "ld1w z8.s, p0/z, [%[inptr], #4, MUL VL]\n" + "ld1w z9.s, p0/z, [%[inptr], #7, MUL VL]\n" + "st1w z11.s, p0, [%[outptr0], #1, MUL VL]\n" + "ld1w z10.s, p0/z, [x8, #-6, MUL VL]\n" + "ld1w z11.s, p0/z, [x8, #-3, MUL VL]\n" + "st1w z8.s, p0, [%[outptr1], #1, MUL VL]\n" + "ld1w z8.s, p0/z, [x8]\n" + "st1w z9.s, p0, [%[outptr2], #1, MUL VL]\n" + "ld1w z9.s, p0/z, [x8, #3, MUL VL]\n" + "st1w z10.s, p0, [%[outptr3], #1, MUL VL]\n" + "st1w z11.s, p0, [%[outptr4], #1, MUL VL]\n" + "st1w z8.s, p0, [%[outptr5], #1, MUL VL]\n" + "st1w z9.s, p0, [%[outptr6], #1, MUL VL]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "prfm PSTL1KEEP, [%[outptr0], #0x60]\n" + "prfm PSTL1KEEP, [%[outptr1], #0x60]\n" + "ld1w z10.s, p0/z, [%[inptr], #2, MUL VL]\n" + "prfm PLDL1KEEP, [%[inptr], #0x200]\n" + "ld1w z11.s, p0/z, [%[inptr], #5, MUL VL]\n" + "prfm PSTL1KEEP, [%[outptr2], #0x60]\n" + "st1w z10.s, p0, [%[outptr0], #2, MUL VL]\n" + "addvl %[outptr0], %[outptr0], #3\n" + "ld1w z8.s, p0/z, [x8, #-8, MUL VL]\n" + "prfm PSTL1KEEP, [%[outptr3], #0x60]\n" + "st1w z11.s, p0, [%[outptr1], #2, MUL VL]\n" + "addvl %[outptr1], %[outptr1], #3\n" + "ld1w z9.s, p0/z, [x8, #-5, MUL VL]\n" + "prfm PSTL1KEEP, [%[outptr4], #0x60]\n" + "st1w z8.s, p0, [%[outptr2], #2, MUL VL]\n" + "addvl %[outptr2], %[outptr2], #3\n" + "ld1w z10.s, p0/z, [x8, #-2, MUL VL]\n" + "prfm PSTL1KEEP, [%[outptr5], #0x60]\n" + "st1w z9.s, p0, [%[outptr3], #2, MUL VL]\n" + "addvl %[outptr3], %[outptr3], #3\n" + "ld1w z11.s, p0/z, [x8, #1, MUL VL]\n" + "prfm PLDL1KEEP, [%[inptr], #0x2c0]\n" + "st1w z10.s, p0, [%[outptr4], #2, MUL VL]\n" + "addvl %[outptr4], %[outptr4], #3\n" + "ld1w z8.s, p0/z, [x8, #4, MUL VL]\n" + "prfm PSTL1KEEP, [%[outptr6], #0x60]\n" + "st1w z11.s, p0, [%[outptr5], #2, MUL VL]\n" + "addvl %[outptr5], %[outptr5], #3\n" + "st1w z8.s, p0, [%[outptr6], #2, MUL VL]\n" + "addvl %[outptr6], %[outptr6], #3\n" + "1:\n" + "addvl %[inptr], %[inptr], #24\n" + : [outptr0] "+r" (outptr0), [outptr1] "+r" (outptr1), [outptr2] "+r" (outptr2), [outptr3] "+r" (outptr3), [outptr4] "+r" (outptr4), [outptr5] "+r" (outptr5), [outptr6] "+r" (outptr6), [outptr7] "+r" (outptr7), + [inptr] "+r" (inptr), [p] "+r" (p) + : [alpha] "w" (alpha), [beta] "w" (beta), [w] "r" (w) + : "x8", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "memory", "cc" + ); + } + break; + + default: + case 8: + { + long w = xmax - i; + long p = 0; + /* Optimized routine to copy an entire block */ + __asm __volatile ( + "mov z2.s, %s[alpha]\n" + "addvl x8, %[inptr], #16\n" + "mov z3.s, %s[beta]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "incw %[p], all, mul #1\n" + "prfm PLDL1KEEP, [%[inptr], #0x180]\n" + "ld1w z8.s, p0/z, [%[inptr]]\n" + "prfm PLDL1KEEP, [%[inptr], #0x240]\n" + "ld1w z9.s, p0/z, [%[inptr], #3, MUL VL]\n" + "ld1w z10.s, p0/z, [%[inptr], #6, MUL VL]\n" + "st1w z8.s, p0, [%[outptr0]]\n" + "ld1w z11.s, p0/z, [x8, #-7, MUL VL]\n" + "ld1w z8.s, p0/z, [x8, #-4, MUL VL]\n" + "st1w z9.s, p0, [%[outptr1]]\n" + "ld1w z9.s, p0/z, [x8, #-1, MUL VL]\n" + "st1w z10.s, p0, [%[outptr2]]\n" + "ld1w z10.s, p0/z, [x8, #2, MUL VL]\n" + "st1w z11.s, p0, [%[outptr3]]\n" + "ld1w z11.s, p0/z, [x8, #5, MUL VL]\n" + "st1w z8.s, p0, [%[outptr4]]\n" + "st1w z9.s, p0, [%[outptr5]]\n" + "st1w z10.s, p0, [%[outptr6]]\n" + "st1w z11.s, p0, [%[outptr7]]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "incw %[p], all, mul #1\n" + "prfm PLDL1KEEP, [%[inptr], #0x1c0]\n" + "ld1w z8.s, p0/z, [%[inptr], #1, MUL VL]\n" + "prfm PLDL1KEEP, [%[inptr], #0x280]\n" + "ld1w z9.s, p0/z, [%[inptr], #4, MUL VL]\n" + "ld1w z10.s, p0/z, [%[inptr], #7, MUL VL]\n" + "st1w z8.s, p0, [%[outptr0], #1, MUL VL]\n" + "ld1w z11.s, p0/z, [x8, #-6, MUL VL]\n" + "ld1w z8.s, p0/z, [x8, #-3, MUL VL]\n" + "st1w z9.s, p0, [%[outptr1], #1, MUL VL]\n" + "ld1w z9.s, p0/z, [x8]\n" + "st1w z10.s, p0, [%[outptr2], #1, MUL VL]\n" + "ld1w z10.s, p0/z, [x8, #3, MUL VL]\n" + "st1w z11.s, p0, [%[outptr3], #1, MUL VL]\n" + "ld1w z11.s, p0/z, [x8, #6, MUL VL]\n" + "st1w z8.s, p0, [%[outptr4], #1, MUL VL]\n" + "st1w z9.s, p0, [%[outptr5], #1, MUL VL]\n" + "st1w z10.s, p0, [%[outptr6], #1, MUL VL]\n" + "st1w z11.s, p0, [%[outptr7], #1, MUL VL]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "prfm PSTL1KEEP, [%[outptr0], #0x60]\n" + "prfm PSTL1KEEP, [%[outptr1], #0x60]\n" + "ld1w z8.s, p0/z, [%[inptr], #2, MUL VL]\n" + "prfm PLDL1KEEP, [%[inptr], #0x200]\n" + "ld1w z9.s, p0/z, [%[inptr], #5, MUL VL]\n" + "prfm PSTL1KEEP, [%[outptr2], #0x60]\n" + "st1w z8.s, p0, [%[outptr0], #2, MUL VL]\n" + "addvl %[outptr0], %[outptr0], #3\n" + "ld1w z10.s, p0/z, [x8, #-8, MUL VL]\n" + "prfm PSTL1KEEP, [%[outptr3], #0x60]\n" + "st1w z9.s, p0, [%[outptr1], #2, MUL VL]\n" + "addvl %[outptr1], %[outptr1], #3\n" + "ld1w z11.s, p0/z, [x8, #-5, MUL VL]\n" + "prfm PSTL1KEEP, [%[outptr4], #0x60]\n" + "st1w z10.s, p0, [%[outptr2], #2, MUL VL]\n" + "addvl %[outptr2], %[outptr2], #3\n" + "ld1w z8.s, p0/z, [x8, #-2, MUL VL]\n" + "prfm PSTL1KEEP, [%[outptr5], #0x60]\n" + "st1w z11.s, p0, [%[outptr3], #2, MUL VL]\n" + "addvl %[outptr3], %[outptr3], #3\n" + "ld1w z9.s, p0/z, [x8, #1, MUL VL]\n" + "prfm PLDL1KEEP, [%[inptr], #0x2c0]\n" + "st1w z8.s, p0, [%[outptr4], #2, MUL VL]\n" + "addvl %[outptr4], %[outptr4], #3\n" + "ld1w z10.s, p0/z, [x8, #4, MUL VL]\n" + "prfm PSTL1KEEP, [%[outptr6], #0x60]\n" + "st1w z9.s, p0, [%[outptr5], #2, MUL VL]\n" + "addvl %[outptr5], %[outptr5], #3\n" + "ld1w z11.s, p0/z, [x8, #7, MUL VL]\n" + "prfm PSTL1KEEP, [%[outptr7], #0x60]\n" + "st1w z10.s, p0, [%[outptr6], #2, MUL VL]\n" + "addvl %[outptr6], %[outptr6], #3\n" + "st1w z11.s, p0, [%[outptr7], #2, MUL VL]\n" + "addvl %[outptr7], %[outptr7], #3\n" + "1:\n" + "addvl %[inptr], %[inptr], #24\n" + : [outptr0] "+r" (outptr0), [outptr1] "+r" (outptr1), [outptr2] "+r" (outptr2), [outptr3] "+r" (outptr3), [outptr4] "+r" (outptr4), [outptr5] "+r" (outptr5), [outptr6] "+r" (outptr6), [outptr7] "+r" (outptr7), + [inptr] "+r" (inptr), [p] "+r" (p) + : [alpha] "w" (alpha), [beta] "w" (beta), [w] "r" (w) + : "x8", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "memory", "cc" + ); + } + break; + + + } + } + else + { + switch(height) { + case 1: + { + long w = xmax - i; + long p = 0; + /* Optimized routine to copy an entire block */ + __asm __volatile ( + "mov z2.s, %s[alpha]\n" + "addvl x8, %[inptr], #16\n" + "mov z3.s, %s[beta]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "incw %[p], all, mul #1\n" + "prfm PLDL1KEEP, [%[inptr], #0x180]\n" + "ld1w z4.s, p0/z, [%[outptr0]]\n" + "ld1w z8.s, p0/z, [%[inptr]]\n" + "add z8.s, z8.s, z4.s\n" + "st1w z8.s, p0, [%[outptr0]]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "incw %[p], all, mul #1\n" + "ld1w z5.s, p0/z, [%[outptr0], #1, MUL VL]\n" + "ld1w z9.s, p0/z, [%[inptr], #1, MUL VL]\n" + "add z9.s, z9.s, z5.s\n" + "st1w z9.s, p0, [%[outptr0], #1, MUL VL]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "prfm PLDL1KEEP, [%[outptr0], #0x60]\n" + "ld1w z6.s, p0/z, [%[outptr0], #2, MUL VL]\n" + "ld1w z10.s, p0/z, [%[inptr], #2, MUL VL]\n" + "add z10.s, z10.s, z6.s\n" + "st1w z10.s, p0, [%[outptr0], #2, MUL VL]\n" + "addvl %[outptr0], %[outptr0], #3\n" + "1:\n" + "addvl %[inptr], %[inptr], #24\n" + : [outptr0] "+r" (outptr0), [outptr1] "+r" (outptr1), [outptr2] "+r" (outptr2), [outptr3] "+r" (outptr3), [outptr4] "+r" (outptr4), [outptr5] "+r" (outptr5), [outptr6] "+r" (outptr6), [outptr7] "+r" (outptr7), + [inptr] "+r" (inptr), [p] "+r" (p) + : [alpha] "w" (alpha), [beta] "w" (beta), [w] "r" (w) + : "x8", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "memory", "cc" + ); + } + break; + + case 2: + { + long w = xmax - i; + long p = 0; + /* Optimized routine to copy an entire block */ + __asm __volatile ( + "mov z2.s, %s[alpha]\n" + "addvl x8, %[inptr], #16\n" + "mov z3.s, %s[beta]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "incw %[p], all, mul #1\n" + "prfm PLDL1KEEP, [%[inptr], #0x180]\n" + "ld1w z4.s, p0/z, [%[outptr0]]\n" + "ld1w z8.s, p0/z, [%[inptr]]\n" + "ld1w z5.s, p0/z, [%[outptr1]]\n" + "ld1w z9.s, p0/z, [%[inptr], #3, MUL VL]\n" + "add z8.s, z8.s, z4.s\n" + "add z9.s, z9.s, z5.s\n" + "st1w z8.s, p0, [%[outptr0]]\n" + "st1w z9.s, p0, [%[outptr1]]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "incw %[p], all, mul #1\n" + "prfm PLDL1KEEP, [%[inptr], #0x1c0]\n" + "ld1w z6.s, p0/z, [%[outptr0], #1, MUL VL]\n" + "ld1w z10.s, p0/z, [%[inptr], #1, MUL VL]\n" + "ld1w z7.s, p0/z, [%[outptr1], #1, MUL VL]\n" + "ld1w z11.s, p0/z, [%[inptr], #4, MUL VL]\n" + "add z10.s, z10.s, z6.s\n" + "add z11.s, z11.s, z7.s\n" + "st1w z10.s, p0, [%[outptr0], #1, MUL VL]\n" + "st1w z11.s, p0, [%[outptr1], #1, MUL VL]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "prfm PLDL1KEEP, [%[outptr0], #0x60]\n" + "prfm PLDL1KEEP, [%[outptr1], #0x60]\n" + "ld1w z4.s, p0/z, [%[outptr0], #2, MUL VL]\n" + "ld1w z8.s, p0/z, [%[inptr], #2, MUL VL]\n" + "ld1w z5.s, p0/z, [%[outptr1], #2, MUL VL]\n" + "ld1w z9.s, p0/z, [%[inptr], #5, MUL VL]\n" + "add z8.s, z8.s, z4.s\n" + "add z9.s, z9.s, z5.s\n" + "st1w z8.s, p0, [%[outptr0], #2, MUL VL]\n" + "addvl %[outptr0], %[outptr0], #3\n" + "st1w z9.s, p0, [%[outptr1], #2, MUL VL]\n" + "addvl %[outptr1], %[outptr1], #3\n" + "1:\n" + "addvl %[inptr], %[inptr], #24\n" + : [outptr0] "+r" (outptr0), [outptr1] "+r" (outptr1), [outptr2] "+r" (outptr2), [outptr3] "+r" (outptr3), [outptr4] "+r" (outptr4), [outptr5] "+r" (outptr5), [outptr6] "+r" (outptr6), [outptr7] "+r" (outptr7), + [inptr] "+r" (inptr), [p] "+r" (p) + : [alpha] "w" (alpha), [beta] "w" (beta), [w] "r" (w) + : "x8", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "memory", "cc" + ); + } + break; + + case 3: + { + long w = xmax - i; + long p = 0; + /* Optimized routine to copy an entire block */ + __asm __volatile ( + "mov z2.s, %s[alpha]\n" + "addvl x8, %[inptr], #16\n" + "mov z3.s, %s[beta]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "incw %[p], all, mul #1\n" + "prfm PLDL1KEEP, [%[inptr], #0x180]\n" + "ld1w z4.s, p0/z, [%[outptr0]]\n" + "ld1w z8.s, p0/z, [%[inptr]]\n" + "ld1w z5.s, p0/z, [%[outptr1]]\n" + "ld1w z9.s, p0/z, [%[inptr], #3, MUL VL]\n" + "ld1w z6.s, p0/z, [%[outptr2]]\n" + "add z8.s, z8.s, z4.s\n" + "ld1w z10.s, p0/z, [%[inptr], #6, MUL VL]\n" + "add z9.s, z9.s, z5.s\n" + "add z10.s, z10.s, z6.s\n" + "st1w z8.s, p0, [%[outptr0]]\n" + "st1w z9.s, p0, [%[outptr1]]\n" + "st1w z10.s, p0, [%[outptr2]]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "incw %[p], all, mul #1\n" + "prfm PLDL1KEEP, [%[inptr], #0x1c0]\n" + "ld1w z7.s, p0/z, [%[outptr0], #1, MUL VL]\n" + "ld1w z11.s, p0/z, [%[inptr], #1, MUL VL]\n" + "ld1w z4.s, p0/z, [%[outptr1], #1, MUL VL]\n" + "ld1w z8.s, p0/z, [%[inptr], #4, MUL VL]\n" + "ld1w z5.s, p0/z, [%[outptr2], #1, MUL VL]\n" + "add z11.s, z11.s, z7.s\n" + "ld1w z9.s, p0/z, [%[inptr], #7, MUL VL]\n" + "add z8.s, z8.s, z4.s\n" + "add z9.s, z9.s, z5.s\n" + "st1w z11.s, p0, [%[outptr0], #1, MUL VL]\n" + "st1w z8.s, p0, [%[outptr1], #1, MUL VL]\n" + "st1w z9.s, p0, [%[outptr2], #1, MUL VL]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "prfm PLDL1KEEP, [%[outptr0], #0x60]\n" + "prfm PLDL1KEEP, [%[outptr1], #0x60]\n" + "ld1w z6.s, p0/z, [%[outptr0], #2, MUL VL]\n" + "prfm PLDL1KEEP, [%[inptr], #0x200]\n" + "ld1w z10.s, p0/z, [%[inptr], #2, MUL VL]\n" + "prfm PLDL1KEEP, [%[outptr2], #0x60]\n" + "ld1w z7.s, p0/z, [%[outptr1], #2, MUL VL]\n" + "ld1w z11.s, p0/z, [%[inptr], #5, MUL VL]\n" + "add z10.s, z10.s, z6.s\n" + "ld1w z4.s, p0/z, [%[outptr2], #2, MUL VL]\n" + "ld1w z8.s, p0/z, [x8, #-8, MUL VL]\n" + "add z11.s, z11.s, z7.s\n" + "st1w z10.s, p0, [%[outptr0], #2, MUL VL]\n" + "addvl %[outptr0], %[outptr0], #3\n" + "add z8.s, z8.s, z4.s\n" + "st1w z11.s, p0, [%[outptr1], #2, MUL VL]\n" + "addvl %[outptr1], %[outptr1], #3\n" + "st1w z8.s, p0, [%[outptr2], #2, MUL VL]\n" + "addvl %[outptr2], %[outptr2], #3\n" + "1:\n" + "addvl %[inptr], %[inptr], #24\n" + : [outptr0] "+r" (outptr0), [outptr1] "+r" (outptr1), [outptr2] "+r" (outptr2), [outptr3] "+r" (outptr3), [outptr4] "+r" (outptr4), [outptr5] "+r" (outptr5), [outptr6] "+r" (outptr6), [outptr7] "+r" (outptr7), + [inptr] "+r" (inptr), [p] "+r" (p) + : [alpha] "w" (alpha), [beta] "w" (beta), [w] "r" (w) + : "x8", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "memory", "cc" + ); + } + break; + + case 4: + { + long w = xmax - i; + long p = 0; + /* Optimized routine to copy an entire block */ + __asm __volatile ( + "mov z2.s, %s[alpha]\n" + "addvl x8, %[inptr], #16\n" + "mov z3.s, %s[beta]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "incw %[p], all, mul #1\n" + "prfm PLDL1KEEP, [%[inptr], #0x180]\n" + "ld1w z4.s, p0/z, [%[outptr0]]\n" + "ld1w z8.s, p0/z, [%[inptr]]\n" + "ld1w z5.s, p0/z, [%[outptr1]]\n" + "ld1w z9.s, p0/z, [%[inptr], #3, MUL VL]\n" + "ld1w z6.s, p0/z, [%[outptr2]]\n" + "add z8.s, z8.s, z4.s\n" + "ld1w z10.s, p0/z, [%[inptr], #6, MUL VL]\n" + "ld1w z7.s, p0/z, [%[outptr3]]\n" + "add z9.s, z9.s, z5.s\n" + "ld1w z11.s, p0/z, [x8, #-7, MUL VL]\n" + "add z10.s, z10.s, z6.s\n" + "st1w z8.s, p0, [%[outptr0]]\n" + "add z11.s, z11.s, z7.s\n" + "st1w z9.s, p0, [%[outptr1]]\n" + "st1w z10.s, p0, [%[outptr2]]\n" + "st1w z11.s, p0, [%[outptr3]]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "incw %[p], all, mul #1\n" + "prfm PLDL1KEEP, [%[inptr], #0x1c0]\n" + "ld1w z4.s, p0/z, [%[outptr0], #1, MUL VL]\n" + "ld1w z8.s, p0/z, [%[inptr], #1, MUL VL]\n" + "ld1w z5.s, p0/z, [%[outptr1], #1, MUL VL]\n" + "ld1w z9.s, p0/z, [%[inptr], #4, MUL VL]\n" + "ld1w z6.s, p0/z, [%[outptr2], #1, MUL VL]\n" + "add z8.s, z8.s, z4.s\n" + "ld1w z10.s, p0/z, [%[inptr], #7, MUL VL]\n" + "ld1w z7.s, p0/z, [%[outptr3], #1, MUL VL]\n" + "add z9.s, z9.s, z5.s\n" + "ld1w z11.s, p0/z, [x8, #-6, MUL VL]\n" + "add z10.s, z10.s, z6.s\n" + "st1w z8.s, p0, [%[outptr0], #1, MUL VL]\n" + "add z11.s, z11.s, z7.s\n" + "st1w z9.s, p0, [%[outptr1], #1, MUL VL]\n" + "st1w z10.s, p0, [%[outptr2], #1, MUL VL]\n" + "st1w z11.s, p0, [%[outptr3], #1, MUL VL]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "prfm PLDL1KEEP, [%[outptr0], #0x60]\n" + "prfm PLDL1KEEP, [%[outptr1], #0x60]\n" + "ld1w z4.s, p0/z, [%[outptr0], #2, MUL VL]\n" + "prfm PLDL1KEEP, [%[inptr], #0x200]\n" + "ld1w z8.s, p0/z, [%[inptr], #2, MUL VL]\n" + "prfm PLDL1KEEP, [%[outptr2], #0x60]\n" + "ld1w z5.s, p0/z, [%[outptr1], #2, MUL VL]\n" + "prfm PLDL1KEEP, [%[outptr3], #0x60]\n" + "add z8.s, z8.s, z4.s\n" + "ld1w z9.s, p0/z, [%[inptr], #5, MUL VL]\n" + "ld1w z6.s, p0/z, [%[outptr2], #2, MUL VL]\n" + "ld1w z10.s, p0/z, [x8, #-8, MUL VL]\n" + "ld1w z7.s, p0/z, [%[outptr3], #2, MUL VL]\n" + "add z9.s, z9.s, z5.s\n" + "st1w z8.s, p0, [%[outptr0], #2, MUL VL]\n" + "ld1w z11.s, p0/z, [x8, #-5, MUL VL]\n" + "addvl %[outptr0], %[outptr0], #3\n" + "add z10.s, z10.s, z6.s\n" + "st1w z9.s, p0, [%[outptr1], #2, MUL VL]\n" + "addvl %[outptr1], %[outptr1], #3\n" + "add z11.s, z11.s, z7.s\n" + "st1w z10.s, p0, [%[outptr2], #2, MUL VL]\n" + "addvl %[outptr2], %[outptr2], #3\n" + "st1w z11.s, p0, [%[outptr3], #2, MUL VL]\n" + "addvl %[outptr3], %[outptr3], #3\n" + "1:\n" + "addvl %[inptr], %[inptr], #24\n" + : [outptr0] "+r" (outptr0), [outptr1] "+r" (outptr1), [outptr2] "+r" (outptr2), [outptr3] "+r" (outptr3), [outptr4] "+r" (outptr4), [outptr5] "+r" (outptr5), [outptr6] "+r" (outptr6), [outptr7] "+r" (outptr7), + [inptr] "+r" (inptr), [p] "+r" (p) + : [alpha] "w" (alpha), [beta] "w" (beta), [w] "r" (w) + : "x8", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "memory", "cc" + ); + } + break; + + case 5: + { + long w = xmax - i; + long p = 0; + /* Optimized routine to copy an entire block */ + __asm __volatile ( + "mov z2.s, %s[alpha]\n" + "addvl x8, %[inptr], #16\n" + "mov z3.s, %s[beta]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "incw %[p], all, mul #1\n" + "prfm PLDL1KEEP, [%[inptr], #0x180]\n" + "ld1w z4.s, p0/z, [%[outptr0]]\n" + "prfm PLDL1KEEP, [%[inptr], #0x240]\n" + "ld1w z8.s, p0/z, [%[inptr]]\n" + "ld1w z5.s, p0/z, [%[outptr1]]\n" + "ld1w z9.s, p0/z, [%[inptr], #3, MUL VL]\n" + "ld1w z6.s, p0/z, [%[outptr2]]\n" + "add z8.s, z8.s, z4.s\n" + "ld1w z10.s, p0/z, [%[inptr], #6, MUL VL]\n" + "ld1w z7.s, p0/z, [%[outptr3]]\n" + "add z9.s, z9.s, z5.s\n" + "ld1w z11.s, p0/z, [x8, #-7, MUL VL]\n" + "ld1w z4.s, p0/z, [%[outptr4]]\n" + "add z10.s, z10.s, z6.s\n" + "st1w z8.s, p0, [%[outptr0]]\n" + "ld1w z8.s, p0/z, [x8, #-4, MUL VL]\n" + "add z11.s, z11.s, z7.s\n" + "st1w z9.s, p0, [%[outptr1]]\n" + "add z8.s, z8.s, z4.s\n" + "st1w z10.s, p0, [%[outptr2]]\n" + "st1w z11.s, p0, [%[outptr3]]\n" + "st1w z8.s, p0, [%[outptr4]]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "incw %[p], all, mul #1\n" + "prfm PLDL1KEEP, [%[inptr], #0x1c0]\n" + "ld1w z5.s, p0/z, [%[outptr0], #1, MUL VL]\n" + "ld1w z9.s, p0/z, [%[inptr], #1, MUL VL]\n" + "ld1w z6.s, p0/z, [%[outptr1], #1, MUL VL]\n" + "ld1w z10.s, p0/z, [%[inptr], #4, MUL VL]\n" + "ld1w z7.s, p0/z, [%[outptr2], #1, MUL VL]\n" + "add z9.s, z9.s, z5.s\n" + "ld1w z11.s, p0/z, [%[inptr], #7, MUL VL]\n" + "ld1w z4.s, p0/z, [%[outptr3], #1, MUL VL]\n" + "add z10.s, z10.s, z6.s\n" + "ld1w z8.s, p0/z, [x8, #-6, MUL VL]\n" + "ld1w z5.s, p0/z, [%[outptr4], #1, MUL VL]\n" + "add z11.s, z11.s, z7.s\n" + "st1w z9.s, p0, [%[outptr0], #1, MUL VL]\n" + "ld1w z9.s, p0/z, [x8, #-3, MUL VL]\n" + "add z8.s, z8.s, z4.s\n" + "st1w z10.s, p0, [%[outptr1], #1, MUL VL]\n" + "add z9.s, z9.s, z5.s\n" + "st1w z11.s, p0, [%[outptr2], #1, MUL VL]\n" + "st1w z8.s, p0, [%[outptr3], #1, MUL VL]\n" + "st1w z9.s, p0, [%[outptr4], #1, MUL VL]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "prfm PLDL1KEEP, [%[outptr0], #0x60]\n" + "prfm PLDL1KEEP, [%[outptr1], #0x60]\n" + "ld1w z6.s, p0/z, [%[outptr0], #2, MUL VL]\n" + "prfm PLDL1KEEP, [%[inptr], #0x200]\n" + "ld1w z10.s, p0/z, [%[inptr], #2, MUL VL]\n" + "prfm PLDL1KEEP, [%[outptr2], #0x60]\n" + "ld1w z7.s, p0/z, [%[outptr1], #2, MUL VL]\n" + "prfm PLDL1KEEP, [%[outptr3], #0x60]\n" + "add z10.s, z10.s, z6.s\n" + "ld1w z11.s, p0/z, [%[inptr], #5, MUL VL]\n" + "ld1w z4.s, p0/z, [%[outptr2], #2, MUL VL]\n" + "prfm PLDL1KEEP, [%[outptr4], #0x60]\n" + "ld1w z8.s, p0/z, [x8, #-8, MUL VL]\n" + "add z11.s, z11.s, z7.s\n" + "st1w z10.s, p0, [%[outptr0], #2, MUL VL]\n" + "ld1w z5.s, p0/z, [%[outptr3], #2, MUL VL]\n" + "addvl %[outptr0], %[outptr0], #3\n" + "add z8.s, z8.s, z4.s\n" + "st1w z11.s, p0, [%[outptr1], #2, MUL VL]\n" + "ld1w z9.s, p0/z, [x8, #-5, MUL VL]\n" + "addvl %[outptr1], %[outptr1], #3\n" + "ld1w z6.s, p0/z, [%[outptr4], #2, MUL VL]\n" + "st1w z8.s, p0, [%[outptr2], #2, MUL VL]\n" + "addvl %[outptr2], %[outptr2], #3\n" + "add z9.s, z9.s, z5.s\n" + "ld1w z10.s, p0/z, [x8, #-2, MUL VL]\n" + "add z10.s, z10.s, z6.s\n" + "st1w z9.s, p0, [%[outptr3], #2, MUL VL]\n" + "addvl %[outptr3], %[outptr3], #3\n" + "st1w z10.s, p0, [%[outptr4], #2, MUL VL]\n" + "addvl %[outptr4], %[outptr4], #3\n" + "1:\n" + "addvl %[inptr], %[inptr], #24\n" + : [outptr0] "+r" (outptr0), [outptr1] "+r" (outptr1), [outptr2] "+r" (outptr2), [outptr3] "+r" (outptr3), [outptr4] "+r" (outptr4), [outptr5] "+r" (outptr5), [outptr6] "+r" (outptr6), [outptr7] "+r" (outptr7), + [inptr] "+r" (inptr), [p] "+r" (p) + : [alpha] "w" (alpha), [beta] "w" (beta), [w] "r" (w) + : "x8", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "memory", "cc" + ); + } + break; + + case 6: + { + long w = xmax - i; + long p = 0; + /* Optimized routine to copy an entire block */ + __asm __volatile ( + "mov z2.s, %s[alpha]\n" + "addvl x8, %[inptr], #16\n" + "mov z3.s, %s[beta]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "incw %[p], all, mul #1\n" + "prfm PLDL1KEEP, [%[inptr], #0x180]\n" + "ld1w z4.s, p0/z, [%[outptr0]]\n" + "prfm PLDL1KEEP, [%[inptr], #0x240]\n" + "ld1w z8.s, p0/z, [%[inptr]]\n" + "ld1w z5.s, p0/z, [%[outptr1]]\n" + "ld1w z9.s, p0/z, [%[inptr], #3, MUL VL]\n" + "ld1w z6.s, p0/z, [%[outptr2]]\n" + "add z8.s, z8.s, z4.s\n" + "ld1w z10.s, p0/z, [%[inptr], #6, MUL VL]\n" + "ld1w z7.s, p0/z, [%[outptr3]]\n" + "add z9.s, z9.s, z5.s\n" + "ld1w z11.s, p0/z, [x8, #-7, MUL VL]\n" + "ld1w z4.s, p0/z, [%[outptr4]]\n" + "add z10.s, z10.s, z6.s\n" + "st1w z8.s, p0, [%[outptr0]]\n" + "ld1w z8.s, p0/z, [x8, #-4, MUL VL]\n" + "add z11.s, z11.s, z7.s\n" + "ld1w z5.s, p0/z, [%[outptr5]]\n" + "st1w z9.s, p0, [%[outptr1]]\n" + "add z8.s, z8.s, z4.s\n" + "ld1w z9.s, p0/z, [x8, #-1, MUL VL]\n" + "st1w z10.s, p0, [%[outptr2]]\n" + "add z9.s, z9.s, z5.s\n" + "st1w z11.s, p0, [%[outptr3]]\n" + "st1w z8.s, p0, [%[outptr4]]\n" + "st1w z9.s, p0, [%[outptr5]]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "incw %[p], all, mul #1\n" + "prfm PLDL1KEEP, [%[inptr], #0x1c0]\n" + "ld1w z6.s, p0/z, [%[outptr0], #1, MUL VL]\n" + "prfm PLDL1KEEP, [%[inptr], #0x280]\n" + "ld1w z10.s, p0/z, [%[inptr], #1, MUL VL]\n" + "ld1w z7.s, p0/z, [%[outptr1], #1, MUL VL]\n" + "ld1w z11.s, p0/z, [%[inptr], #4, MUL VL]\n" + "ld1w z4.s, p0/z, [%[outptr2], #1, MUL VL]\n" + "add z10.s, z10.s, z6.s\n" + "ld1w z8.s, p0/z, [%[inptr], #7, MUL VL]\n" + "ld1w z5.s, p0/z, [%[outptr3], #1, MUL VL]\n" + "add z11.s, z11.s, z7.s\n" + "ld1w z9.s, p0/z, [x8, #-6, MUL VL]\n" + "ld1w z6.s, p0/z, [%[outptr4], #1, MUL VL]\n" + "add z8.s, z8.s, z4.s\n" + "st1w z10.s, p0, [%[outptr0], #1, MUL VL]\n" + "ld1w z10.s, p0/z, [x8, #-3, MUL VL]\n" + "add z9.s, z9.s, z5.s\n" + "ld1w z7.s, p0/z, [%[outptr5], #1, MUL VL]\n" + "st1w z11.s, p0, [%[outptr1], #1, MUL VL]\n" + "add z10.s, z10.s, z6.s\n" + "ld1w z11.s, p0/z, [x8]\n" + "st1w z8.s, p0, [%[outptr2], #1, MUL VL]\n" + "add z11.s, z11.s, z7.s\n" + "st1w z9.s, p0, [%[outptr3], #1, MUL VL]\n" + "st1w z10.s, p0, [%[outptr4], #1, MUL VL]\n" + "st1w z11.s, p0, [%[outptr5], #1, MUL VL]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "prfm PLDL1KEEP, [%[outptr0], #0x60]\n" + "prfm PLDL1KEEP, [%[outptr1], #0x60]\n" + "ld1w z4.s, p0/z, [%[outptr0], #2, MUL VL]\n" + "prfm PLDL1KEEP, [%[inptr], #0x200]\n" + "ld1w z8.s, p0/z, [%[inptr], #2, MUL VL]\n" + "prfm PLDL1KEEP, [%[outptr2], #0x60]\n" + "ld1w z5.s, p0/z, [%[outptr1], #2, MUL VL]\n" + "prfm PLDL1KEEP, [%[outptr3], #0x60]\n" + "add z8.s, z8.s, z4.s\n" + "ld1w z9.s, p0/z, [%[inptr], #5, MUL VL]\n" + "ld1w z6.s, p0/z, [%[outptr2], #2, MUL VL]\n" + "prfm PLDL1KEEP, [%[outptr4], #0x60]\n" + "ld1w z10.s, p0/z, [x8, #-8, MUL VL]\n" + "prfm PLDL1KEEP, [%[outptr5], #0x60]\n" + "add z9.s, z9.s, z5.s\n" + "st1w z8.s, p0, [%[outptr0], #2, MUL VL]\n" + "ld1w z7.s, p0/z, [%[outptr3], #2, MUL VL]\n" + "addvl %[outptr0], %[outptr0], #3\n" + "add z10.s, z10.s, z6.s\n" + "st1w z9.s, p0, [%[outptr1], #2, MUL VL]\n" + "ld1w z11.s, p0/z, [x8, #-5, MUL VL]\n" + "addvl %[outptr1], %[outptr1], #3\n" + "ld1w z4.s, p0/z, [%[outptr4], #2, MUL VL]\n" + "st1w z10.s, p0, [%[outptr2], #2, MUL VL]\n" + "addvl %[outptr2], %[outptr2], #3\n" + "add z11.s, z11.s, z7.s\n" + "ld1w z8.s, p0/z, [x8, #-2, MUL VL]\n" + "ld1w z5.s, p0/z, [%[outptr5], #2, MUL VL]\n" + "ld1w z9.s, p0/z, [x8, #1, MUL VL]\n" + "add z8.s, z8.s, z4.s\n" + "st1w z11.s, p0, [%[outptr3], #2, MUL VL]\n" + "addvl %[outptr3], %[outptr3], #3\n" + "add z9.s, z9.s, z5.s\n" + "st1w z8.s, p0, [%[outptr4], #2, MUL VL]\n" + "addvl %[outptr4], %[outptr4], #3\n" + "st1w z9.s, p0, [%[outptr5], #2, MUL VL]\n" + "addvl %[outptr5], %[outptr5], #3\n" + "1:\n" + "addvl %[inptr], %[inptr], #24\n" + : [outptr0] "+r" (outptr0), [outptr1] "+r" (outptr1), [outptr2] "+r" (outptr2), [outptr3] "+r" (outptr3), [outptr4] "+r" (outptr4), [outptr5] "+r" (outptr5), [outptr6] "+r" (outptr6), [outptr7] "+r" (outptr7), + [inptr] "+r" (inptr), [p] "+r" (p) + : [alpha] "w" (alpha), [beta] "w" (beta), [w] "r" (w) + : "x8", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "memory", "cc" + ); + } + break; + + case 7: + { + long w = xmax - i; + long p = 0; + /* Optimized routine to copy an entire block */ + __asm __volatile ( + "mov z2.s, %s[alpha]\n" + "addvl x8, %[inptr], #16\n" + "mov z3.s, %s[beta]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "incw %[p], all, mul #1\n" + "prfm PLDL1KEEP, [%[inptr], #0x180]\n" + "ld1w z4.s, p0/z, [%[outptr0]]\n" + "prfm PLDL1KEEP, [%[inptr], #0x240]\n" + "ld1w z8.s, p0/z, [%[inptr]]\n" + "ld1w z5.s, p0/z, [%[outptr1]]\n" + "ld1w z9.s, p0/z, [%[inptr], #3, MUL VL]\n" + "ld1w z6.s, p0/z, [%[outptr2]]\n" + "add z8.s, z8.s, z4.s\n" + "ld1w z10.s, p0/z, [%[inptr], #6, MUL VL]\n" + "ld1w z7.s, p0/z, [%[outptr3]]\n" + "add z9.s, z9.s, z5.s\n" + "ld1w z11.s, p0/z, [x8, #-7, MUL VL]\n" + "ld1w z4.s, p0/z, [%[outptr4]]\n" + "add z10.s, z10.s, z6.s\n" + "st1w z8.s, p0, [%[outptr0]]\n" + "ld1w z8.s, p0/z, [x8, #-4, MUL VL]\n" + "add z11.s, z11.s, z7.s\n" + "ld1w z5.s, p0/z, [%[outptr5]]\n" + "ld1w z6.s, p0/z, [%[outptr6]]\n" + "st1w z9.s, p0, [%[outptr1]]\n" + "add z8.s, z8.s, z4.s\n" + "ld1w z9.s, p0/z, [x8, #-1, MUL VL]\n" + "st1w z10.s, p0, [%[outptr2]]\n" + "add z9.s, z9.s, z5.s\n" + "ld1w z10.s, p0/z, [x8, #2, MUL VL]\n" + "st1w z11.s, p0, [%[outptr3]]\n" + "add z10.s, z10.s, z6.s\n" + "st1w z8.s, p0, [%[outptr4]]\n" + "st1w z9.s, p0, [%[outptr5]]\n" + "st1w z10.s, p0, [%[outptr6]]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "incw %[p], all, mul #1\n" + "prfm PLDL1KEEP, [%[inptr], #0x1c0]\n" + "ld1w z7.s, p0/z, [%[outptr0], #1, MUL VL]\n" + "prfm PLDL1KEEP, [%[inptr], #0x280]\n" + "ld1w z11.s, p0/z, [%[inptr], #1, MUL VL]\n" + "ld1w z4.s, p0/z, [%[outptr1], #1, MUL VL]\n" + "ld1w z8.s, p0/z, [%[inptr], #4, MUL VL]\n" + "ld1w z5.s, p0/z, [%[outptr2], #1, MUL VL]\n" + "add z11.s, z11.s, z7.s\n" + "ld1w z9.s, p0/z, [%[inptr], #7, MUL VL]\n" + "ld1w z6.s, p0/z, [%[outptr3], #1, MUL VL]\n" + "add z8.s, z8.s, z4.s\n" + "ld1w z10.s, p0/z, [x8, #-6, MUL VL]\n" + "ld1w z7.s, p0/z, [%[outptr4], #1, MUL VL]\n" + "add z9.s, z9.s, z5.s\n" + "st1w z11.s, p0, [%[outptr0], #1, MUL VL]\n" + "ld1w z11.s, p0/z, [x8, #-3, MUL VL]\n" + "add z10.s, z10.s, z6.s\n" + "ld1w z4.s, p0/z, [%[outptr5], #1, MUL VL]\n" + "ld1w z5.s, p0/z, [%[outptr6], #1, MUL VL]\n" + "st1w z8.s, p0, [%[outptr1], #1, MUL VL]\n" + "add z11.s, z11.s, z7.s\n" + "ld1w z8.s, p0/z, [x8]\n" + "st1w z9.s, p0, [%[outptr2], #1, MUL VL]\n" + "add z8.s, z8.s, z4.s\n" + "ld1w z9.s, p0/z, [x8, #3, MUL VL]\n" + "st1w z10.s, p0, [%[outptr3], #1, MUL VL]\n" + "add z9.s, z9.s, z5.s\n" + "st1w z11.s, p0, [%[outptr4], #1, MUL VL]\n" + "st1w z8.s, p0, [%[outptr5], #1, MUL VL]\n" + "st1w z9.s, p0, [%[outptr6], #1, MUL VL]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "prfm PLDL1KEEP, [%[outptr0], #0x60]\n" + "prfm PLDL1KEEP, [%[outptr1], #0x60]\n" + "ld1w z6.s, p0/z, [%[outptr0], #2, MUL VL]\n" + "prfm PLDL1KEEP, [%[inptr], #0x200]\n" + "ld1w z10.s, p0/z, [%[inptr], #2, MUL VL]\n" + "prfm PLDL1KEEP, [%[outptr2], #0x60]\n" + "ld1w z7.s, p0/z, [%[outptr1], #2, MUL VL]\n" + "prfm PLDL1KEEP, [%[outptr3], #0x60]\n" + "add z10.s, z10.s, z6.s\n" + "ld1w z11.s, p0/z, [%[inptr], #5, MUL VL]\n" + "ld1w z4.s, p0/z, [%[outptr2], #2, MUL VL]\n" + "prfm PLDL1KEEP, [%[outptr4], #0x60]\n" + "ld1w z8.s, p0/z, [x8, #-8, MUL VL]\n" + "prfm PLDL1KEEP, [%[outptr5], #0x60]\n" + "add z11.s, z11.s, z7.s\n" + "st1w z10.s, p0, [%[outptr0], #2, MUL VL]\n" + "ld1w z5.s, p0/z, [%[outptr3], #2, MUL VL]\n" + "addvl %[outptr0], %[outptr0], #3\n" + "add z8.s, z8.s, z4.s\n" + "st1w z11.s, p0, [%[outptr1], #2, MUL VL]\n" + "ld1w z9.s, p0/z, [x8, #-5, MUL VL]\n" + "addvl %[outptr1], %[outptr1], #3\n" + "ld1w z6.s, p0/z, [%[outptr4], #2, MUL VL]\n" + "prfm PLDL1KEEP, [%[inptr], #0x2c0]\n" + "add z9.s, z9.s, z5.s\n" + "st1w z8.s, p0, [%[outptr2], #2, MUL VL]\n" + "ld1w z10.s, p0/z, [x8, #-2, MUL VL]\n" + "addvl %[outptr2], %[outptr2], #3\n" + "ld1w z7.s, p0/z, [%[outptr5], #2, MUL VL]\n" + "prfm PLDL1KEEP, [%[outptr6], #0x60]\n" + "add z10.s, z10.s, z6.s\n" + "st1w z9.s, p0, [%[outptr3], #2, MUL VL]\n" + "ld1w z11.s, p0/z, [x8, #1, MUL VL]\n" + "addvl %[outptr3], %[outptr3], #3\n" + "ld1w z4.s, p0/z, [%[outptr6], #2, MUL VL]\n" + "st1w z10.s, p0, [%[outptr4], #2, MUL VL]\n" + "addvl %[outptr4], %[outptr4], #3\n" + "add z11.s, z11.s, z7.s\n" + "ld1w z8.s, p0/z, [x8, #4, MUL VL]\n" + "add z8.s, z8.s, z4.s\n" + "st1w z11.s, p0, [%[outptr5], #2, MUL VL]\n" + "addvl %[outptr5], %[outptr5], #3\n" + "st1w z8.s, p0, [%[outptr6], #2, MUL VL]\n" + "addvl %[outptr6], %[outptr6], #3\n" + "1:\n" + "addvl %[inptr], %[inptr], #24\n" + : [outptr0] "+r" (outptr0), [outptr1] "+r" (outptr1), [outptr2] "+r" (outptr2), [outptr3] "+r" (outptr3), [outptr4] "+r" (outptr4), [outptr5] "+r" (outptr5), [outptr6] "+r" (outptr6), [outptr7] "+r" (outptr7), + [inptr] "+r" (inptr), [p] "+r" (p) + : [alpha] "w" (alpha), [beta] "w" (beta), [w] "r" (w) + : "x8", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "memory", "cc" + ); + } + break; + + default: + case 8: + { + long w = xmax - i; + long p = 0; + /* Optimized routine to copy an entire block */ + __asm __volatile ( + "mov z2.s, %s[alpha]\n" + "addvl x8, %[inptr], #16\n" + "mov z3.s, %s[beta]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "incw %[p], all, mul #1\n" + "prfm PLDL1KEEP, [%[inptr], #0x180]\n" + "ld1w z4.s, p0/z, [%[outptr0]]\n" + "prfm PLDL1KEEP, [%[inptr], #0x240]\n" + "ld1w z8.s, p0/z, [%[inptr]]\n" + "ld1w z5.s, p0/z, [%[outptr1]]\n" + "ld1w z9.s, p0/z, [%[inptr], #3, MUL VL]\n" + "ld1w z6.s, p0/z, [%[outptr2]]\n" + "add z8.s, z8.s, z4.s\n" + "ld1w z10.s, p0/z, [%[inptr], #6, MUL VL]\n" + "ld1w z7.s, p0/z, [%[outptr3]]\n" + "add z9.s, z9.s, z5.s\n" + "ld1w z11.s, p0/z, [x8, #-7, MUL VL]\n" + "ld1w z4.s, p0/z, [%[outptr4]]\n" + "add z10.s, z10.s, z6.s\n" + "st1w z8.s, p0, [%[outptr0]]\n" + "ld1w z8.s, p0/z, [x8, #-4, MUL VL]\n" + "add z11.s, z11.s, z7.s\n" + "ld1w z5.s, p0/z, [%[outptr5]]\n" + "ld1w z6.s, p0/z, [%[outptr6]]\n" + "st1w z9.s, p0, [%[outptr1]]\n" + "add z8.s, z8.s, z4.s\n" + "ld1w z9.s, p0/z, [x8, #-1, MUL VL]\n" + "ld1w z7.s, p0/z, [%[outptr7]]\n" + "st1w z10.s, p0, [%[outptr2]]\n" + "add z9.s, z9.s, z5.s\n" + "ld1w z10.s, p0/z, [x8, #2, MUL VL]\n" + "st1w z11.s, p0, [%[outptr3]]\n" + "add z10.s, z10.s, z6.s\n" + "ld1w z11.s, p0/z, [x8, #5, MUL VL]\n" + "st1w z8.s, p0, [%[outptr4]]\n" + "add z11.s, z11.s, z7.s\n" + "st1w z9.s, p0, [%[outptr5]]\n" + "st1w z10.s, p0, [%[outptr6]]\n" + "st1w z11.s, p0, [%[outptr7]]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "incw %[p], all, mul #1\n" + "prfm PLDL1KEEP, [%[inptr], #0x1c0]\n" + "ld1w z4.s, p0/z, [%[outptr0], #1, MUL VL]\n" + "prfm PLDL1KEEP, [%[inptr], #0x280]\n" + "ld1w z8.s, p0/z, [%[inptr], #1, MUL VL]\n" + "ld1w z5.s, p0/z, [%[outptr1], #1, MUL VL]\n" + "ld1w z9.s, p0/z, [%[inptr], #4, MUL VL]\n" + "ld1w z6.s, p0/z, [%[outptr2], #1, MUL VL]\n" + "add z8.s, z8.s, z4.s\n" + "ld1w z10.s, p0/z, [%[inptr], #7, MUL VL]\n" + "ld1w z7.s, p0/z, [%[outptr3], #1, MUL VL]\n" + "add z9.s, z9.s, z5.s\n" + "ld1w z11.s, p0/z, [x8, #-6, MUL VL]\n" + "ld1w z4.s, p0/z, [%[outptr4], #1, MUL VL]\n" + "add z10.s, z10.s, z6.s\n" + "st1w z8.s, p0, [%[outptr0], #1, MUL VL]\n" + "ld1w z8.s, p0/z, [x8, #-3, MUL VL]\n" + "add z11.s, z11.s, z7.s\n" + "ld1w z5.s, p0/z, [%[outptr5], #1, MUL VL]\n" + "ld1w z6.s, p0/z, [%[outptr6], #1, MUL VL]\n" + "st1w z9.s, p0, [%[outptr1], #1, MUL VL]\n" + "add z8.s, z8.s, z4.s\n" + "ld1w z9.s, p0/z, [x8]\n" + "ld1w z7.s, p0/z, [%[outptr7], #1, MUL VL]\n" + "st1w z10.s, p0, [%[outptr2], #1, MUL VL]\n" + "add z9.s, z9.s, z5.s\n" + "ld1w z10.s, p0/z, [x8, #3, MUL VL]\n" + "st1w z11.s, p0, [%[outptr3], #1, MUL VL]\n" + "add z10.s, z10.s, z6.s\n" + "ld1w z11.s, p0/z, [x8, #6, MUL VL]\n" + "st1w z8.s, p0, [%[outptr4], #1, MUL VL]\n" + "add z11.s, z11.s, z7.s\n" + "st1w z9.s, p0, [%[outptr5], #1, MUL VL]\n" + "st1w z10.s, p0, [%[outptr6], #1, MUL VL]\n" + "st1w z11.s, p0, [%[outptr7], #1, MUL VL]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "prfm PLDL1KEEP, [%[outptr0], #0x60]\n" + "prfm PLDL1KEEP, [%[outptr1], #0x60]\n" + "ld1w z4.s, p0/z, [%[outptr0], #2, MUL VL]\n" + "prfm PLDL1KEEP, [%[inptr], #0x200]\n" + "ld1w z8.s, p0/z, [%[inptr], #2, MUL VL]\n" + "prfm PLDL1KEEP, [%[outptr2], #0x60]\n" + "ld1w z5.s, p0/z, [%[outptr1], #2, MUL VL]\n" + "prfm PLDL1KEEP, [%[outptr3], #0x60]\n" + "add z8.s, z8.s, z4.s\n" + "ld1w z9.s, p0/z, [%[inptr], #5, MUL VL]\n" + "ld1w z6.s, p0/z, [%[outptr2], #2, MUL VL]\n" + "prfm PLDL1KEEP, [%[outptr4], #0x60]\n" + "ld1w z10.s, p0/z, [x8, #-8, MUL VL]\n" + "prfm PLDL1KEEP, [%[outptr5], #0x60]\n" + "add z9.s, z9.s, z5.s\n" + "st1w z8.s, p0, [%[outptr0], #2, MUL VL]\n" + "ld1w z7.s, p0/z, [%[outptr3], #2, MUL VL]\n" + "addvl %[outptr0], %[outptr0], #3\n" + "add z10.s, z10.s, z6.s\n" + "st1w z9.s, p0, [%[outptr1], #2, MUL VL]\n" + "ld1w z11.s, p0/z, [x8, #-5, MUL VL]\n" + "addvl %[outptr1], %[outptr1], #3\n" + "ld1w z4.s, p0/z, [%[outptr4], #2, MUL VL]\n" + "prfm PLDL1KEEP, [%[inptr], #0x2c0]\n" + "add z11.s, z11.s, z7.s\n" + "st1w z10.s, p0, [%[outptr2], #2, MUL VL]\n" + "ld1w z8.s, p0/z, [x8, #-2, MUL VL]\n" + "addvl %[outptr2], %[outptr2], #3\n" + "ld1w z5.s, p0/z, [%[outptr5], #2, MUL VL]\n" + "prfm PLDL1KEEP, [%[outptr6], #0x60]\n" + "add z8.s, z8.s, z4.s\n" + "st1w z11.s, p0, [%[outptr3], #2, MUL VL]\n" + "ld1w z9.s, p0/z, [x8, #1, MUL VL]\n" + "addvl %[outptr3], %[outptr3], #3\n" + "ld1w z6.s, p0/z, [%[outptr6], #2, MUL VL]\n" + "prfm PLDL1KEEP, [%[outptr7], #0x60]\n" + "add z9.s, z9.s, z5.s\n" + "st1w z8.s, p0, [%[outptr4], #2, MUL VL]\n" + "ld1w z10.s, p0/z, [x8, #4, MUL VL]\n" + "addvl %[outptr4], %[outptr4], #3\n" + "ld1w z7.s, p0/z, [%[outptr7], #2, MUL VL]\n" + "st1w z9.s, p0, [%[outptr5], #2, MUL VL]\n" + "addvl %[outptr5], %[outptr5], #3\n" + "add z10.s, z10.s, z6.s\n" + "ld1w z11.s, p0/z, [x8, #7, MUL VL]\n" + "add z11.s, z11.s, z7.s\n" + "st1w z10.s, p0, [%[outptr6], #2, MUL VL]\n" + "addvl %[outptr6], %[outptr6], #3\n" + "st1w z11.s, p0, [%[outptr7], #2, MUL VL]\n" + "addvl %[outptr7], %[outptr7], #3\n" + "1:\n" + "addvl %[inptr], %[inptr], #24\n" + : [outptr0] "+r" (outptr0), [outptr1] "+r" (outptr1), [outptr2] "+r" (outptr2), [outptr3] "+r" (outptr3), [outptr4] "+r" (outptr4), [outptr5] "+r" (outptr5), [outptr6] "+r" (outptr6), [outptr7] "+r" (outptr7), + [inptr] "+r" (inptr), [p] "+r" (p) + : [alpha] "w" (alpha), [beta] "w" (beta), [w] "r" (w) + : "x8", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "memory", "cc" + ); + } + break; + + + } + } + } + } +} + +#endif // __ARM_FEATURE_SVE diff --git a/src/core/NEON/kernels/arm_gemm/merges/sve_merge_u32_3VLx8.hpp b/src/core/NEON/kernels/arm_gemm/merges/sve_merge_u32_3VLx8.hpp new file mode 100644 index 0000000000..eb684e2118 --- /dev/null +++ b/src/core/NEON/kernels/arm_gemm/merges/sve_merge_u32_3VLx8.hpp @@ -0,0 +1,1348 @@ +/* + * Copyright (c) 2019 ARM Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#pragma once + +#ifdef __ARM_FEATURE_SVE + +template<> +inline void MergeResults<3, 8, true>(uint32_t *out, const uint32_t *in, const int ldout, const int y0, const int ymax, const int x0, const int xmax, const uint32_t alpha, const uint32_t beta) +{ + const uint32_t *inptr = in; + + for (int y=y0; y())) { + if (beta==0u) + { + switch(height) { + case 1: + { + long w = xmax - i; + long p = 0; + /* Optimized routine to copy an entire block */ + __asm __volatile ( + "mov z2.s, %s[alpha]\n" + "addvl x8, %[inptr], #16\n" + "mov z3.s, %s[beta]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "incw %[p], all, mul #1\n" + "prfm PLDL1KEEP, [%[inptr], #0x180]\n" + "ld1w z8.s, p0/z, [%[inptr]]\n" + "st1w z8.s, p0, [%[outptr0]]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "incw %[p], all, mul #1\n" + "ld1w z9.s, p0/z, [%[inptr], #1, MUL VL]\n" + "st1w z9.s, p0, [%[outptr0], #1, MUL VL]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "prfm PSTL1KEEP, [%[outptr0], #0x60]\n" + "ld1w z10.s, p0/z, [%[inptr], #2, MUL VL]\n" + "st1w z10.s, p0, [%[outptr0], #2, MUL VL]\n" + "addvl %[outptr0], %[outptr0], #3\n" + "1:\n" + "addvl %[inptr], %[inptr], #24\n" + : [outptr0] "+r" (outptr0), [outptr1] "+r" (outptr1), [outptr2] "+r" (outptr2), [outptr3] "+r" (outptr3), [outptr4] "+r" (outptr4), [outptr5] "+r" (outptr5), [outptr6] "+r" (outptr6), [outptr7] "+r" (outptr7), + [inptr] "+r" (inptr), [p] "+r" (p) + : [alpha] "w" (alpha), [beta] "w" (beta), [w] "r" (w) + : "x8", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "memory", "cc" + ); + } + break; + + case 2: + { + long w = xmax - i; + long p = 0; + /* Optimized routine to copy an entire block */ + __asm __volatile ( + "mov z2.s, %s[alpha]\n" + "addvl x8, %[inptr], #16\n" + "mov z3.s, %s[beta]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "incw %[p], all, mul #1\n" + "prfm PLDL1KEEP, [%[inptr], #0x180]\n" + "ld1w z8.s, p0/z, [%[inptr]]\n" + "ld1w z9.s, p0/z, [%[inptr], #3, MUL VL]\n" + "st1w z8.s, p0, [%[outptr0]]\n" + "st1w z9.s, p0, [%[outptr1]]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "incw %[p], all, mul #1\n" + "prfm PLDL1KEEP, [%[inptr], #0x1c0]\n" + "ld1w z10.s, p0/z, [%[inptr], #1, MUL VL]\n" + "ld1w z11.s, p0/z, [%[inptr], #4, MUL VL]\n" + "st1w z10.s, p0, [%[outptr0], #1, MUL VL]\n" + "st1w z11.s, p0, [%[outptr1], #1, MUL VL]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "prfm PSTL1KEEP, [%[outptr0], #0x60]\n" + "prfm PSTL1KEEP, [%[outptr1], #0x60]\n" + "ld1w z8.s, p0/z, [%[inptr], #2, MUL VL]\n" + "ld1w z9.s, p0/z, [%[inptr], #5, MUL VL]\n" + "st1w z8.s, p0, [%[outptr0], #2, MUL VL]\n" + "addvl %[outptr0], %[outptr0], #3\n" + "st1w z9.s, p0, [%[outptr1], #2, MUL VL]\n" + "addvl %[outptr1], %[outptr1], #3\n" + "1:\n" + "addvl %[inptr], %[inptr], #24\n" + : [outptr0] "+r" (outptr0), [outptr1] "+r" (outptr1), [outptr2] "+r" (outptr2), [outptr3] "+r" (outptr3), [outptr4] "+r" (outptr4), [outptr5] "+r" (outptr5), [outptr6] "+r" (outptr6), [outptr7] "+r" (outptr7), + [inptr] "+r" (inptr), [p] "+r" (p) + : [alpha] "w" (alpha), [beta] "w" (beta), [w] "r" (w) + : "x8", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "memory", "cc" + ); + } + break; + + case 3: + { + long w = xmax - i; + long p = 0; + /* Optimized routine to copy an entire block */ + __asm __volatile ( + "mov z2.s, %s[alpha]\n" + "addvl x8, %[inptr], #16\n" + "mov z3.s, %s[beta]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "incw %[p], all, mul #1\n" + "prfm PLDL1KEEP, [%[inptr], #0x180]\n" + "ld1w z8.s, p0/z, [%[inptr]]\n" + "ld1w z9.s, p0/z, [%[inptr], #3, MUL VL]\n" + "ld1w z10.s, p0/z, [%[inptr], #6, MUL VL]\n" + "st1w z8.s, p0, [%[outptr0]]\n" + "st1w z9.s, p0, [%[outptr1]]\n" + "st1w z10.s, p0, [%[outptr2]]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "incw %[p], all, mul #1\n" + "prfm PLDL1KEEP, [%[inptr], #0x1c0]\n" + "ld1w z11.s, p0/z, [%[inptr], #1, MUL VL]\n" + "ld1w z8.s, p0/z, [%[inptr], #4, MUL VL]\n" + "ld1w z9.s, p0/z, [%[inptr], #7, MUL VL]\n" + "st1w z11.s, p0, [%[outptr0], #1, MUL VL]\n" + "st1w z8.s, p0, [%[outptr1], #1, MUL VL]\n" + "st1w z9.s, p0, [%[outptr2], #1, MUL VL]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "prfm PSTL1KEEP, [%[outptr0], #0x60]\n" + "prfm PSTL1KEEP, [%[outptr1], #0x60]\n" + "ld1w z10.s, p0/z, [%[inptr], #2, MUL VL]\n" + "prfm PLDL1KEEP, [%[inptr], #0x200]\n" + "ld1w z11.s, p0/z, [%[inptr], #5, MUL VL]\n" + "prfm PSTL1KEEP, [%[outptr2], #0x60]\n" + "st1w z10.s, p0, [%[outptr0], #2, MUL VL]\n" + "addvl %[outptr0], %[outptr0], #3\n" + "ld1w z8.s, p0/z, [x8, #-8, MUL VL]\n" + "st1w z11.s, p0, [%[outptr1], #2, MUL VL]\n" + "addvl %[outptr1], %[outptr1], #3\n" + "st1w z8.s, p0, [%[outptr2], #2, MUL VL]\n" + "addvl %[outptr2], %[outptr2], #3\n" + "1:\n" + "addvl %[inptr], %[inptr], #24\n" + : [outptr0] "+r" (outptr0), [outptr1] "+r" (outptr1), [outptr2] "+r" (outptr2), [outptr3] "+r" (outptr3), [outptr4] "+r" (outptr4), [outptr5] "+r" (outptr5), [outptr6] "+r" (outptr6), [outptr7] "+r" (outptr7), + [inptr] "+r" (inptr), [p] "+r" (p) + : [alpha] "w" (alpha), [beta] "w" (beta), [w] "r" (w) + : "x8", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "memory", "cc" + ); + } + break; + + case 4: + { + long w = xmax - i; + long p = 0; + /* Optimized routine to copy an entire block */ + __asm __volatile ( + "mov z2.s, %s[alpha]\n" + "addvl x8, %[inptr], #16\n" + "mov z3.s, %s[beta]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "incw %[p], all, mul #1\n" + "prfm PLDL1KEEP, [%[inptr], #0x180]\n" + "ld1w z8.s, p0/z, [%[inptr]]\n" + "ld1w z9.s, p0/z, [%[inptr], #3, MUL VL]\n" + "ld1w z10.s, p0/z, [%[inptr], #6, MUL VL]\n" + "ld1w z11.s, p0/z, [x8, #-7, MUL VL]\n" + "st1w z8.s, p0, [%[outptr0]]\n" + "st1w z9.s, p0, [%[outptr1]]\n" + "st1w z10.s, p0, [%[outptr2]]\n" + "st1w z11.s, p0, [%[outptr3]]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "incw %[p], all, mul #1\n" + "prfm PLDL1KEEP, [%[inptr], #0x1c0]\n" + "ld1w z8.s, p0/z, [%[inptr], #1, MUL VL]\n" + "ld1w z9.s, p0/z, [%[inptr], #4, MUL VL]\n" + "ld1w z10.s, p0/z, [%[inptr], #7, MUL VL]\n" + "ld1w z11.s, p0/z, [x8, #-6, MUL VL]\n" + "st1w z8.s, p0, [%[outptr0], #1, MUL VL]\n" + "st1w z9.s, p0, [%[outptr1], #1, MUL VL]\n" + "st1w z10.s, p0, [%[outptr2], #1, MUL VL]\n" + "st1w z11.s, p0, [%[outptr3], #1, MUL VL]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "prfm PSTL1KEEP, [%[outptr0], #0x60]\n" + "prfm PSTL1KEEP, [%[outptr1], #0x60]\n" + "ld1w z8.s, p0/z, [%[inptr], #2, MUL VL]\n" + "prfm PLDL1KEEP, [%[inptr], #0x200]\n" + "ld1w z9.s, p0/z, [%[inptr], #5, MUL VL]\n" + "prfm PSTL1KEEP, [%[outptr2], #0x60]\n" + "st1w z8.s, p0, [%[outptr0], #2, MUL VL]\n" + "addvl %[outptr0], %[outptr0], #3\n" + "ld1w z10.s, p0/z, [x8, #-8, MUL VL]\n" + "prfm PSTL1KEEP, [%[outptr3], #0x60]\n" + "st1w z9.s, p0, [%[outptr1], #2, MUL VL]\n" + "addvl %[outptr1], %[outptr1], #3\n" + "ld1w z11.s, p0/z, [x8, #-5, MUL VL]\n" + "st1w z10.s, p0, [%[outptr2], #2, MUL VL]\n" + "addvl %[outptr2], %[outptr2], #3\n" + "st1w z11.s, p0, [%[outptr3], #2, MUL VL]\n" + "addvl %[outptr3], %[outptr3], #3\n" + "1:\n" + "addvl %[inptr], %[inptr], #24\n" + : [outptr0] "+r" (outptr0), [outptr1] "+r" (outptr1), [outptr2] "+r" (outptr2), [outptr3] "+r" (outptr3), [outptr4] "+r" (outptr4), [outptr5] "+r" (outptr5), [outptr6] "+r" (outptr6), [outptr7] "+r" (outptr7), + [inptr] "+r" (inptr), [p] "+r" (p) + : [alpha] "w" (alpha), [beta] "w" (beta), [w] "r" (w) + : "x8", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "memory", "cc" + ); + } + break; + + case 5: + { + long w = xmax - i; + long p = 0; + /* Optimized routine to copy an entire block */ + __asm __volatile ( + "mov z2.s, %s[alpha]\n" + "addvl x8, %[inptr], #16\n" + "mov z3.s, %s[beta]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "incw %[p], all, mul #1\n" + "prfm PLDL1KEEP, [%[inptr], #0x180]\n" + "ld1w z8.s, p0/z, [%[inptr]]\n" + "prfm PLDL1KEEP, [%[inptr], #0x240]\n" + "ld1w z9.s, p0/z, [%[inptr], #3, MUL VL]\n" + "ld1w z10.s, p0/z, [%[inptr], #6, MUL VL]\n" + "st1w z8.s, p0, [%[outptr0]]\n" + "ld1w z11.s, p0/z, [x8, #-7, MUL VL]\n" + "ld1w z8.s, p0/z, [x8, #-4, MUL VL]\n" + "st1w z9.s, p0, [%[outptr1]]\n" + "st1w z10.s, p0, [%[outptr2]]\n" + "st1w z11.s, p0, [%[outptr3]]\n" + "st1w z8.s, p0, [%[outptr4]]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "incw %[p], all, mul #1\n" + "prfm PLDL1KEEP, [%[inptr], #0x1c0]\n" + "ld1w z9.s, p0/z, [%[inptr], #1, MUL VL]\n" + "ld1w z10.s, p0/z, [%[inptr], #4, MUL VL]\n" + "ld1w z11.s, p0/z, [%[inptr], #7, MUL VL]\n" + "ld1w z8.s, p0/z, [x8, #-6, MUL VL]\n" + "st1w z9.s, p0, [%[outptr0], #1, MUL VL]\n" + "ld1w z9.s, p0/z, [x8, #-3, MUL VL]\n" + "st1w z10.s, p0, [%[outptr1], #1, MUL VL]\n" + "st1w z11.s, p0, [%[outptr2], #1, MUL VL]\n" + "st1w z8.s, p0, [%[outptr3], #1, MUL VL]\n" + "st1w z9.s, p0, [%[outptr4], #1, MUL VL]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "prfm PSTL1KEEP, [%[outptr0], #0x60]\n" + "prfm PSTL1KEEP, [%[outptr1], #0x60]\n" + "ld1w z10.s, p0/z, [%[inptr], #2, MUL VL]\n" + "prfm PLDL1KEEP, [%[inptr], #0x200]\n" + "ld1w z11.s, p0/z, [%[inptr], #5, MUL VL]\n" + "prfm PSTL1KEEP, [%[outptr2], #0x60]\n" + "st1w z10.s, p0, [%[outptr0], #2, MUL VL]\n" + "addvl %[outptr0], %[outptr0], #3\n" + "ld1w z8.s, p0/z, [x8, #-8, MUL VL]\n" + "prfm PSTL1KEEP, [%[outptr3], #0x60]\n" + "st1w z11.s, p0, [%[outptr1], #2, MUL VL]\n" + "addvl %[outptr1], %[outptr1], #3\n" + "ld1w z9.s, p0/z, [x8, #-5, MUL VL]\n" + "prfm PSTL1KEEP, [%[outptr4], #0x60]\n" + "st1w z8.s, p0, [%[outptr2], #2, MUL VL]\n" + "addvl %[outptr2], %[outptr2], #3\n" + "ld1w z10.s, p0/z, [x8, #-2, MUL VL]\n" + "st1w z9.s, p0, [%[outptr3], #2, MUL VL]\n" + "addvl %[outptr3], %[outptr3], #3\n" + "st1w z10.s, p0, [%[outptr4], #2, MUL VL]\n" + "addvl %[outptr4], %[outptr4], #3\n" + "1:\n" + "addvl %[inptr], %[inptr], #24\n" + : [outptr0] "+r" (outptr0), [outptr1] "+r" (outptr1), [outptr2] "+r" (outptr2), [outptr3] "+r" (outptr3), [outptr4] "+r" (outptr4), [outptr5] "+r" (outptr5), [outptr6] "+r" (outptr6), [outptr7] "+r" (outptr7), + [inptr] "+r" (inptr), [p] "+r" (p) + : [alpha] "w" (alpha), [beta] "w" (beta), [w] "r" (w) + : "x8", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "memory", "cc" + ); + } + break; + + case 6: + { + long w = xmax - i; + long p = 0; + /* Optimized routine to copy an entire block */ + __asm __volatile ( + "mov z2.s, %s[alpha]\n" + "addvl x8, %[inptr], #16\n" + "mov z3.s, %s[beta]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "incw %[p], all, mul #1\n" + "prfm PLDL1KEEP, [%[inptr], #0x180]\n" + "ld1w z8.s, p0/z, [%[inptr]]\n" + "prfm PLDL1KEEP, [%[inptr], #0x240]\n" + "ld1w z9.s, p0/z, [%[inptr], #3, MUL VL]\n" + "ld1w z10.s, p0/z, [%[inptr], #6, MUL VL]\n" + "st1w z8.s, p0, [%[outptr0]]\n" + "ld1w z11.s, p0/z, [x8, #-7, MUL VL]\n" + "ld1w z8.s, p0/z, [x8, #-4, MUL VL]\n" + "st1w z9.s, p0, [%[outptr1]]\n" + "ld1w z9.s, p0/z, [x8, #-1, MUL VL]\n" + "st1w z10.s, p0, [%[outptr2]]\n" + "st1w z11.s, p0, [%[outptr3]]\n" + "st1w z8.s, p0, [%[outptr4]]\n" + "st1w z9.s, p0, [%[outptr5]]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "incw %[p], all, mul #1\n" + "prfm PLDL1KEEP, [%[inptr], #0x1c0]\n" + "ld1w z10.s, p0/z, [%[inptr], #1, MUL VL]\n" + "prfm PLDL1KEEP, [%[inptr], #0x280]\n" + "ld1w z11.s, p0/z, [%[inptr], #4, MUL VL]\n" + "ld1w z8.s, p0/z, [%[inptr], #7, MUL VL]\n" + "st1w z10.s, p0, [%[outptr0], #1, MUL VL]\n" + "ld1w z9.s, p0/z, [x8, #-6, MUL VL]\n" + "ld1w z10.s, p0/z, [x8, #-3, MUL VL]\n" + "st1w z11.s, p0, [%[outptr1], #1, MUL VL]\n" + "ld1w z11.s, p0/z, [x8]\n" + "st1w z8.s, p0, [%[outptr2], #1, MUL VL]\n" + "st1w z9.s, p0, [%[outptr3], #1, MUL VL]\n" + "st1w z10.s, p0, [%[outptr4], #1, MUL VL]\n" + "st1w z11.s, p0, [%[outptr5], #1, MUL VL]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "prfm PSTL1KEEP, [%[outptr0], #0x60]\n" + "prfm PSTL1KEEP, [%[outptr1], #0x60]\n" + "ld1w z8.s, p0/z, [%[inptr], #2, MUL VL]\n" + "prfm PLDL1KEEP, [%[inptr], #0x200]\n" + "ld1w z9.s, p0/z, [%[inptr], #5, MUL VL]\n" + "prfm PSTL1KEEP, [%[outptr2], #0x60]\n" + "st1w z8.s, p0, [%[outptr0], #2, MUL VL]\n" + "addvl %[outptr0], %[outptr0], #3\n" + "ld1w z10.s, p0/z, [x8, #-8, MUL VL]\n" + "prfm PSTL1KEEP, [%[outptr3], #0x60]\n" + "st1w z9.s, p0, [%[outptr1], #2, MUL VL]\n" + "addvl %[outptr1], %[outptr1], #3\n" + "ld1w z11.s, p0/z, [x8, #-5, MUL VL]\n" + "prfm PSTL1KEEP, [%[outptr4], #0x60]\n" + "st1w z10.s, p0, [%[outptr2], #2, MUL VL]\n" + "addvl %[outptr2], %[outptr2], #3\n" + "ld1w z8.s, p0/z, [x8, #-2, MUL VL]\n" + "prfm PSTL1KEEP, [%[outptr5], #0x60]\n" + "st1w z11.s, p0, [%[outptr3], #2, MUL VL]\n" + "addvl %[outptr3], %[outptr3], #3\n" + "ld1w z9.s, p0/z, [x8, #1, MUL VL]\n" + "st1w z8.s, p0, [%[outptr4], #2, MUL VL]\n" + "addvl %[outptr4], %[outptr4], #3\n" + "st1w z9.s, p0, [%[outptr5], #2, MUL VL]\n" + "addvl %[outptr5], %[outptr5], #3\n" + "1:\n" + "addvl %[inptr], %[inptr], #24\n" + : [outptr0] "+r" (outptr0), [outptr1] "+r" (outptr1), [outptr2] "+r" (outptr2), [outptr3] "+r" (outptr3), [outptr4] "+r" (outptr4), [outptr5] "+r" (outptr5), [outptr6] "+r" (outptr6), [outptr7] "+r" (outptr7), + [inptr] "+r" (inptr), [p] "+r" (p) + : [alpha] "w" (alpha), [beta] "w" (beta), [w] "r" (w) + : "x8", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "memory", "cc" + ); + } + break; + + case 7: + { + long w = xmax - i; + long p = 0; + /* Optimized routine to copy an entire block */ + __asm __volatile ( + "mov z2.s, %s[alpha]\n" + "addvl x8, %[inptr], #16\n" + "mov z3.s, %s[beta]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "incw %[p], all, mul #1\n" + "prfm PLDL1KEEP, [%[inptr], #0x180]\n" + "ld1w z8.s, p0/z, [%[inptr]]\n" + "prfm PLDL1KEEP, [%[inptr], #0x240]\n" + "ld1w z9.s, p0/z, [%[inptr], #3, MUL VL]\n" + "ld1w z10.s, p0/z, [%[inptr], #6, MUL VL]\n" + "st1w z8.s, p0, [%[outptr0]]\n" + "ld1w z11.s, p0/z, [x8, #-7, MUL VL]\n" + "ld1w z8.s, p0/z, [x8, #-4, MUL VL]\n" + "st1w z9.s, p0, [%[outptr1]]\n" + "ld1w z9.s, p0/z, [x8, #-1, MUL VL]\n" + "st1w z10.s, p0, [%[outptr2]]\n" + "ld1w z10.s, p0/z, [x8, #2, MUL VL]\n" + "st1w z11.s, p0, [%[outptr3]]\n" + "st1w z8.s, p0, [%[outptr4]]\n" + "st1w z9.s, p0, [%[outptr5]]\n" + "st1w z10.s, p0, [%[outptr6]]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "incw %[p], all, mul #1\n" + "prfm PLDL1KEEP, [%[inptr], #0x1c0]\n" + "ld1w z11.s, p0/z, [%[inptr], #1, MUL VL]\n" + "prfm PLDL1KEEP, [%[inptr], #0x280]\n" + "ld1w z8.s, p0/z, [%[inptr], #4, MUL VL]\n" + "ld1w z9.s, p0/z, [%[inptr], #7, MUL VL]\n" + "st1w z11.s, p0, [%[outptr0], #1, MUL VL]\n" + "ld1w z10.s, p0/z, [x8, #-6, MUL VL]\n" + "ld1w z11.s, p0/z, [x8, #-3, MUL VL]\n" + "st1w z8.s, p0, [%[outptr1], #1, MUL VL]\n" + "ld1w z8.s, p0/z, [x8]\n" + "st1w z9.s, p0, [%[outptr2], #1, MUL VL]\n" + "ld1w z9.s, p0/z, [x8, #3, MUL VL]\n" + "st1w z10.s, p0, [%[outptr3], #1, MUL VL]\n" + "st1w z11.s, p0, [%[outptr4], #1, MUL VL]\n" + "st1w z8.s, p0, [%[outptr5], #1, MUL VL]\n" + "st1w z9.s, p0, [%[outptr6], #1, MUL VL]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "prfm PSTL1KEEP, [%[outptr0], #0x60]\n" + "prfm PSTL1KEEP, [%[outptr1], #0x60]\n" + "ld1w z10.s, p0/z, [%[inptr], #2, MUL VL]\n" + "prfm PLDL1KEEP, [%[inptr], #0x200]\n" + "ld1w z11.s, p0/z, [%[inptr], #5, MUL VL]\n" + "prfm PSTL1KEEP, [%[outptr2], #0x60]\n" + "st1w z10.s, p0, [%[outptr0], #2, MUL VL]\n" + "addvl %[outptr0], %[outptr0], #3\n" + "ld1w z8.s, p0/z, [x8, #-8, MUL VL]\n" + "prfm PSTL1KEEP, [%[outptr3], #0x60]\n" + "st1w z11.s, p0, [%[outptr1], #2, MUL VL]\n" + "addvl %[outptr1], %[outptr1], #3\n" + "ld1w z9.s, p0/z, [x8, #-5, MUL VL]\n" + "prfm PSTL1KEEP, [%[outptr4], #0x60]\n" + "st1w z8.s, p0, [%[outptr2], #2, MUL VL]\n" + "addvl %[outptr2], %[outptr2], #3\n" + "ld1w z10.s, p0/z, [x8, #-2, MUL VL]\n" + "prfm PSTL1KEEP, [%[outptr5], #0x60]\n" + "st1w z9.s, p0, [%[outptr3], #2, MUL VL]\n" + "addvl %[outptr3], %[outptr3], #3\n" + "ld1w z11.s, p0/z, [x8, #1, MUL VL]\n" + "prfm PLDL1KEEP, [%[inptr], #0x2c0]\n" + "st1w z10.s, p0, [%[outptr4], #2, MUL VL]\n" + "addvl %[outptr4], %[outptr4], #3\n" + "ld1w z8.s, p0/z, [x8, #4, MUL VL]\n" + "prfm PSTL1KEEP, [%[outptr6], #0x60]\n" + "st1w z11.s, p0, [%[outptr5], #2, MUL VL]\n" + "addvl %[outptr5], %[outptr5], #3\n" + "st1w z8.s, p0, [%[outptr6], #2, MUL VL]\n" + "addvl %[outptr6], %[outptr6], #3\n" + "1:\n" + "addvl %[inptr], %[inptr], #24\n" + : [outptr0] "+r" (outptr0), [outptr1] "+r" (outptr1), [outptr2] "+r" (outptr2), [outptr3] "+r" (outptr3), [outptr4] "+r" (outptr4), [outptr5] "+r" (outptr5), [outptr6] "+r" (outptr6), [outptr7] "+r" (outptr7), + [inptr] "+r" (inptr), [p] "+r" (p) + : [alpha] "w" (alpha), [beta] "w" (beta), [w] "r" (w) + : "x8", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "memory", "cc" + ); + } + break; + + default: + case 8: + { + long w = xmax - i; + long p = 0; + /* Optimized routine to copy an entire block */ + __asm __volatile ( + "mov z2.s, %s[alpha]\n" + "addvl x8, %[inptr], #16\n" + "mov z3.s, %s[beta]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "incw %[p], all, mul #1\n" + "prfm PLDL1KEEP, [%[inptr], #0x180]\n" + "ld1w z8.s, p0/z, [%[inptr]]\n" + "prfm PLDL1KEEP, [%[inptr], #0x240]\n" + "ld1w z9.s, p0/z, [%[inptr], #3, MUL VL]\n" + "ld1w z10.s, p0/z, [%[inptr], #6, MUL VL]\n" + "st1w z8.s, p0, [%[outptr0]]\n" + "ld1w z11.s, p0/z, [x8, #-7, MUL VL]\n" + "ld1w z8.s, p0/z, [x8, #-4, MUL VL]\n" + "st1w z9.s, p0, [%[outptr1]]\n" + "ld1w z9.s, p0/z, [x8, #-1, MUL VL]\n" + "st1w z10.s, p0, [%[outptr2]]\n" + "ld1w z10.s, p0/z, [x8, #2, MUL VL]\n" + "st1w z11.s, p0, [%[outptr3]]\n" + "ld1w z11.s, p0/z, [x8, #5, MUL VL]\n" + "st1w z8.s, p0, [%[outptr4]]\n" + "st1w z9.s, p0, [%[outptr5]]\n" + "st1w z10.s, p0, [%[outptr6]]\n" + "st1w z11.s, p0, [%[outptr7]]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "incw %[p], all, mul #1\n" + "prfm PLDL1KEEP, [%[inptr], #0x1c0]\n" + "ld1w z8.s, p0/z, [%[inptr], #1, MUL VL]\n" + "prfm PLDL1KEEP, [%[inptr], #0x280]\n" + "ld1w z9.s, p0/z, [%[inptr], #4, MUL VL]\n" + "ld1w z10.s, p0/z, [%[inptr], #7, MUL VL]\n" + "st1w z8.s, p0, [%[outptr0], #1, MUL VL]\n" + "ld1w z11.s, p0/z, [x8, #-6, MUL VL]\n" + "ld1w z8.s, p0/z, [x8, #-3, MUL VL]\n" + "st1w z9.s, p0, [%[outptr1], #1, MUL VL]\n" + "ld1w z9.s, p0/z, [x8]\n" + "st1w z10.s, p0, [%[outptr2], #1, MUL VL]\n" + "ld1w z10.s, p0/z, [x8, #3, MUL VL]\n" + "st1w z11.s, p0, [%[outptr3], #1, MUL VL]\n" + "ld1w z11.s, p0/z, [x8, #6, MUL VL]\n" + "st1w z8.s, p0, [%[outptr4], #1, MUL VL]\n" + "st1w z9.s, p0, [%[outptr5], #1, MUL VL]\n" + "st1w z10.s, p0, [%[outptr6], #1, MUL VL]\n" + "st1w z11.s, p0, [%[outptr7], #1, MUL VL]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "prfm PSTL1KEEP, [%[outptr0], #0x60]\n" + "prfm PSTL1KEEP, [%[outptr1], #0x60]\n" + "ld1w z8.s, p0/z, [%[inptr], #2, MUL VL]\n" + "prfm PLDL1KEEP, [%[inptr], #0x200]\n" + "ld1w z9.s, p0/z, [%[inptr], #5, MUL VL]\n" + "prfm PSTL1KEEP, [%[outptr2], #0x60]\n" + "st1w z8.s, p0, [%[outptr0], #2, MUL VL]\n" + "addvl %[outptr0], %[outptr0], #3\n" + "ld1w z10.s, p0/z, [x8, #-8, MUL VL]\n" + "prfm PSTL1KEEP, [%[outptr3], #0x60]\n" + "st1w z9.s, p0, [%[outptr1], #2, MUL VL]\n" + "addvl %[outptr1], %[outptr1], #3\n" + "ld1w z11.s, p0/z, [x8, #-5, MUL VL]\n" + "prfm PSTL1KEEP, [%[outptr4], #0x60]\n" + "st1w z10.s, p0, [%[outptr2], #2, MUL VL]\n" + "addvl %[outptr2], %[outptr2], #3\n" + "ld1w z8.s, p0/z, [x8, #-2, MUL VL]\n" + "prfm PSTL1KEEP, [%[outptr5], #0x60]\n" + "st1w z11.s, p0, [%[outptr3], #2, MUL VL]\n" + "addvl %[outptr3], %[outptr3], #3\n" + "ld1w z9.s, p0/z, [x8, #1, MUL VL]\n" + "prfm PLDL1KEEP, [%[inptr], #0x2c0]\n" + "st1w z8.s, p0, [%[outptr4], #2, MUL VL]\n" + "addvl %[outptr4], %[outptr4], #3\n" + "ld1w z10.s, p0/z, [x8, #4, MUL VL]\n" + "prfm PSTL1KEEP, [%[outptr6], #0x60]\n" + "st1w z9.s, p0, [%[outptr5], #2, MUL VL]\n" + "addvl %[outptr5], %[outptr5], #3\n" + "ld1w z11.s, p0/z, [x8, #7, MUL VL]\n" + "prfm PSTL1KEEP, [%[outptr7], #0x60]\n" + "st1w z10.s, p0, [%[outptr6], #2, MUL VL]\n" + "addvl %[outptr6], %[outptr6], #3\n" + "st1w z11.s, p0, [%[outptr7], #2, MUL VL]\n" + "addvl %[outptr7], %[outptr7], #3\n" + "1:\n" + "addvl %[inptr], %[inptr], #24\n" + : [outptr0] "+r" (outptr0), [outptr1] "+r" (outptr1), [outptr2] "+r" (outptr2), [outptr3] "+r" (outptr3), [outptr4] "+r" (outptr4), [outptr5] "+r" (outptr5), [outptr6] "+r" (outptr6), [outptr7] "+r" (outptr7), + [inptr] "+r" (inptr), [p] "+r" (p) + : [alpha] "w" (alpha), [beta] "w" (beta), [w] "r" (w) + : "x8", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "memory", "cc" + ); + } + break; + + + } + } + else + { + switch(height) { + case 1: + { + long w = xmax - i; + long p = 0; + /* Optimized routine to copy an entire block */ + __asm __volatile ( + "mov z2.s, %s[alpha]\n" + "addvl x8, %[inptr], #16\n" + "mov z3.s, %s[beta]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "incw %[p], all, mul #1\n" + "prfm PLDL1KEEP, [%[inptr], #0x180]\n" + "ld1w z4.s, p0/z, [%[outptr0]]\n" + "ld1w z8.s, p0/z, [%[inptr]]\n" + "add z8.s, z8.s, z4.s\n" + "st1w z8.s, p0, [%[outptr0]]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "incw %[p], all, mul #1\n" + "ld1w z5.s, p0/z, [%[outptr0], #1, MUL VL]\n" + "ld1w z9.s, p0/z, [%[inptr], #1, MUL VL]\n" + "add z9.s, z9.s, z5.s\n" + "st1w z9.s, p0, [%[outptr0], #1, MUL VL]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "prfm PLDL1KEEP, [%[outptr0], #0x60]\n" + "ld1w z6.s, p0/z, [%[outptr0], #2, MUL VL]\n" + "ld1w z10.s, p0/z, [%[inptr], #2, MUL VL]\n" + "add z10.s, z10.s, z6.s\n" + "st1w z10.s, p0, [%[outptr0], #2, MUL VL]\n" + "addvl %[outptr0], %[outptr0], #3\n" + "1:\n" + "addvl %[inptr], %[inptr], #24\n" + : [outptr0] "+r" (outptr0), [outptr1] "+r" (outptr1), [outptr2] "+r" (outptr2), [outptr3] "+r" (outptr3), [outptr4] "+r" (outptr4), [outptr5] "+r" (outptr5), [outptr6] "+r" (outptr6), [outptr7] "+r" (outptr7), + [inptr] "+r" (inptr), [p] "+r" (p) + : [alpha] "w" (alpha), [beta] "w" (beta), [w] "r" (w) + : "x8", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "memory", "cc" + ); + } + break; + + case 2: + { + long w = xmax - i; + long p = 0; + /* Optimized routine to copy an entire block */ + __asm __volatile ( + "mov z2.s, %s[alpha]\n" + "addvl x8, %[inptr], #16\n" + "mov z3.s, %s[beta]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "incw %[p], all, mul #1\n" + "prfm PLDL1KEEP, [%[inptr], #0x180]\n" + "ld1w z4.s, p0/z, [%[outptr0]]\n" + "ld1w z8.s, p0/z, [%[inptr]]\n" + "ld1w z5.s, p0/z, [%[outptr1]]\n" + "ld1w z9.s, p0/z, [%[inptr], #3, MUL VL]\n" + "add z8.s, z8.s, z4.s\n" + "add z9.s, z9.s, z5.s\n" + "st1w z8.s, p0, [%[outptr0]]\n" + "st1w z9.s, p0, [%[outptr1]]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "incw %[p], all, mul #1\n" + "prfm PLDL1KEEP, [%[inptr], #0x1c0]\n" + "ld1w z6.s, p0/z, [%[outptr0], #1, MUL VL]\n" + "ld1w z10.s, p0/z, [%[inptr], #1, MUL VL]\n" + "ld1w z7.s, p0/z, [%[outptr1], #1, MUL VL]\n" + "ld1w z11.s, p0/z, [%[inptr], #4, MUL VL]\n" + "add z10.s, z10.s, z6.s\n" + "add z11.s, z11.s, z7.s\n" + "st1w z10.s, p0, [%[outptr0], #1, MUL VL]\n" + "st1w z11.s, p0, [%[outptr1], #1, MUL VL]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "prfm PLDL1KEEP, [%[outptr0], #0x60]\n" + "prfm PLDL1KEEP, [%[outptr1], #0x60]\n" + "ld1w z4.s, p0/z, [%[outptr0], #2, MUL VL]\n" + "ld1w z8.s, p0/z, [%[inptr], #2, MUL VL]\n" + "ld1w z5.s, p0/z, [%[outptr1], #2, MUL VL]\n" + "ld1w z9.s, p0/z, [%[inptr], #5, MUL VL]\n" + "add z8.s, z8.s, z4.s\n" + "add z9.s, z9.s, z5.s\n" + "st1w z8.s, p0, [%[outptr0], #2, MUL VL]\n" + "addvl %[outptr0], %[outptr0], #3\n" + "st1w z9.s, p0, [%[outptr1], #2, MUL VL]\n" + "addvl %[outptr1], %[outptr1], #3\n" + "1:\n" + "addvl %[inptr], %[inptr], #24\n" + : [outptr0] "+r" (outptr0), [outptr1] "+r" (outptr1), [outptr2] "+r" (outptr2), [outptr3] "+r" (outptr3), [outptr4] "+r" (outptr4), [outptr5] "+r" (outptr5), [outptr6] "+r" (outptr6), [outptr7] "+r" (outptr7), + [inptr] "+r" (inptr), [p] "+r" (p) + : [alpha] "w" (alpha), [beta] "w" (beta), [w] "r" (w) + : "x8", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "memory", "cc" + ); + } + break; + + case 3: + { + long w = xmax - i; + long p = 0; + /* Optimized routine to copy an entire block */ + __asm __volatile ( + "mov z2.s, %s[alpha]\n" + "addvl x8, %[inptr], #16\n" + "mov z3.s, %s[beta]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "incw %[p], all, mul #1\n" + "prfm PLDL1KEEP, [%[inptr], #0x180]\n" + "ld1w z4.s, p0/z, [%[outptr0]]\n" + "ld1w z8.s, p0/z, [%[inptr]]\n" + "ld1w z5.s, p0/z, [%[outptr1]]\n" + "ld1w z9.s, p0/z, [%[inptr], #3, MUL VL]\n" + "ld1w z6.s, p0/z, [%[outptr2]]\n" + "add z8.s, z8.s, z4.s\n" + "ld1w z10.s, p0/z, [%[inptr], #6, MUL VL]\n" + "add z9.s, z9.s, z5.s\n" + "add z10.s, z10.s, z6.s\n" + "st1w z8.s, p0, [%[outptr0]]\n" + "st1w z9.s, p0, [%[outptr1]]\n" + "st1w z10.s, p0, [%[outptr2]]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "incw %[p], all, mul #1\n" + "prfm PLDL1KEEP, [%[inptr], #0x1c0]\n" + "ld1w z7.s, p0/z, [%[outptr0], #1, MUL VL]\n" + "ld1w z11.s, p0/z, [%[inptr], #1, MUL VL]\n" + "ld1w z4.s, p0/z, [%[outptr1], #1, MUL VL]\n" + "ld1w z8.s, p0/z, [%[inptr], #4, MUL VL]\n" + "ld1w z5.s, p0/z, [%[outptr2], #1, MUL VL]\n" + "add z11.s, z11.s, z7.s\n" + "ld1w z9.s, p0/z, [%[inptr], #7, MUL VL]\n" + "add z8.s, z8.s, z4.s\n" + "add z9.s, z9.s, z5.s\n" + "st1w z11.s, p0, [%[outptr0], #1, MUL VL]\n" + "st1w z8.s, p0, [%[outptr1], #1, MUL VL]\n" + "st1w z9.s, p0, [%[outptr2], #1, MUL VL]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "prfm PLDL1KEEP, [%[outptr0], #0x60]\n" + "prfm PLDL1KEEP, [%[outptr1], #0x60]\n" + "ld1w z6.s, p0/z, [%[outptr0], #2, MUL VL]\n" + "prfm PLDL1KEEP, [%[inptr], #0x200]\n" + "ld1w z10.s, p0/z, [%[inptr], #2, MUL VL]\n" + "prfm PLDL1KEEP, [%[outptr2], #0x60]\n" + "ld1w z7.s, p0/z, [%[outptr1], #2, MUL VL]\n" + "ld1w z11.s, p0/z, [%[inptr], #5, MUL VL]\n" + "add z10.s, z10.s, z6.s\n" + "ld1w z4.s, p0/z, [%[outptr2], #2, MUL VL]\n" + "ld1w z8.s, p0/z, [x8, #-8, MUL VL]\n" + "add z11.s, z11.s, z7.s\n" + "st1w z10.s, p0, [%[outptr0], #2, MUL VL]\n" + "addvl %[outptr0], %[outptr0], #3\n" + "add z8.s, z8.s, z4.s\n" + "st1w z11.s, p0, [%[outptr1], #2, MUL VL]\n" + "addvl %[outptr1], %[outptr1], #3\n" + "st1w z8.s, p0, [%[outptr2], #2, MUL VL]\n" + "addvl %[outptr2], %[outptr2], #3\n" + "1:\n" + "addvl %[inptr], %[inptr], #24\n" + : [outptr0] "+r" (outptr0), [outptr1] "+r" (outptr1), [outptr2] "+r" (outptr2), [outptr3] "+r" (outptr3), [outptr4] "+r" (outptr4), [outptr5] "+r" (outptr5), [outptr6] "+r" (outptr6), [outptr7] "+r" (outptr7), + [inptr] "+r" (inptr), [p] "+r" (p) + : [alpha] "w" (alpha), [beta] "w" (beta), [w] "r" (w) + : "x8", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "memory", "cc" + ); + } + break; + + case 4: + { + long w = xmax - i; + long p = 0; + /* Optimized routine to copy an entire block */ + __asm __volatile ( + "mov z2.s, %s[alpha]\n" + "addvl x8, %[inptr], #16\n" + "mov z3.s, %s[beta]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "incw %[p], all, mul #1\n" + "prfm PLDL1KEEP, [%[inptr], #0x180]\n" + "ld1w z4.s, p0/z, [%[outptr0]]\n" + "ld1w z8.s, p0/z, [%[inptr]]\n" + "ld1w z5.s, p0/z, [%[outptr1]]\n" + "ld1w z9.s, p0/z, [%[inptr], #3, MUL VL]\n" + "ld1w z6.s, p0/z, [%[outptr2]]\n" + "add z8.s, z8.s, z4.s\n" + "ld1w z10.s, p0/z, [%[inptr], #6, MUL VL]\n" + "ld1w z7.s, p0/z, [%[outptr3]]\n" + "add z9.s, z9.s, z5.s\n" + "ld1w z11.s, p0/z, [x8, #-7, MUL VL]\n" + "add z10.s, z10.s, z6.s\n" + "st1w z8.s, p0, [%[outptr0]]\n" + "add z11.s, z11.s, z7.s\n" + "st1w z9.s, p0, [%[outptr1]]\n" + "st1w z10.s, p0, [%[outptr2]]\n" + "st1w z11.s, p0, [%[outptr3]]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "incw %[p], all, mul #1\n" + "prfm PLDL1KEEP, [%[inptr], #0x1c0]\n" + "ld1w z4.s, p0/z, [%[outptr0], #1, MUL VL]\n" + "ld1w z8.s, p0/z, [%[inptr], #1, MUL VL]\n" + "ld1w z5.s, p0/z, [%[outptr1], #1, MUL VL]\n" + "ld1w z9.s, p0/z, [%[inptr], #4, MUL VL]\n" + "ld1w z6.s, p0/z, [%[outptr2], #1, MUL VL]\n" + "add z8.s, z8.s, z4.s\n" + "ld1w z10.s, p0/z, [%[inptr], #7, MUL VL]\n" + "ld1w z7.s, p0/z, [%[outptr3], #1, MUL VL]\n" + "add z9.s, z9.s, z5.s\n" + "ld1w z11.s, p0/z, [x8, #-6, MUL VL]\n" + "add z10.s, z10.s, z6.s\n" + "st1w z8.s, p0, [%[outptr0], #1, MUL VL]\n" + "add z11.s, z11.s, z7.s\n" + "st1w z9.s, p0, [%[outptr1], #1, MUL VL]\n" + "st1w z10.s, p0, [%[outptr2], #1, MUL VL]\n" + "st1w z11.s, p0, [%[outptr3], #1, MUL VL]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "prfm PLDL1KEEP, [%[outptr0], #0x60]\n" + "prfm PLDL1KEEP, [%[outptr1], #0x60]\n" + "ld1w z4.s, p0/z, [%[outptr0], #2, MUL VL]\n" + "prfm PLDL1KEEP, [%[inptr], #0x200]\n" + "ld1w z8.s, p0/z, [%[inptr], #2, MUL VL]\n" + "prfm PLDL1KEEP, [%[outptr2], #0x60]\n" + "ld1w z5.s, p0/z, [%[outptr1], #2, MUL VL]\n" + "prfm PLDL1KEEP, [%[outptr3], #0x60]\n" + "add z8.s, z8.s, z4.s\n" + "ld1w z9.s, p0/z, [%[inptr], #5, MUL VL]\n" + "ld1w z6.s, p0/z, [%[outptr2], #2, MUL VL]\n" + "ld1w z10.s, p0/z, [x8, #-8, MUL VL]\n" + "ld1w z7.s, p0/z, [%[outptr3], #2, MUL VL]\n" + "add z9.s, z9.s, z5.s\n" + "st1w z8.s, p0, [%[outptr0], #2, MUL VL]\n" + "ld1w z11.s, p0/z, [x8, #-5, MUL VL]\n" + "addvl %[outptr0], %[outptr0], #3\n" + "add z10.s, z10.s, z6.s\n" + "st1w z9.s, p0, [%[outptr1], #2, MUL VL]\n" + "addvl %[outptr1], %[outptr1], #3\n" + "add z11.s, z11.s, z7.s\n" + "st1w z10.s, p0, [%[outptr2], #2, MUL VL]\n" + "addvl %[outptr2], %[outptr2], #3\n" + "st1w z11.s, p0, [%[outptr3], #2, MUL VL]\n" + "addvl %[outptr3], %[outptr3], #3\n" + "1:\n" + "addvl %[inptr], %[inptr], #24\n" + : [outptr0] "+r" (outptr0), [outptr1] "+r" (outptr1), [outptr2] "+r" (outptr2), [outptr3] "+r" (outptr3), [outptr4] "+r" (outptr4), [outptr5] "+r" (outptr5), [outptr6] "+r" (outptr6), [outptr7] "+r" (outptr7), + [inptr] "+r" (inptr), [p] "+r" (p) + : [alpha] "w" (alpha), [beta] "w" (beta), [w] "r" (w) + : "x8", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "memory", "cc" + ); + } + break; + + case 5: + { + long w = xmax - i; + long p = 0; + /* Optimized routine to copy an entire block */ + __asm __volatile ( + "mov z2.s, %s[alpha]\n" + "addvl x8, %[inptr], #16\n" + "mov z3.s, %s[beta]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "incw %[p], all, mul #1\n" + "prfm PLDL1KEEP, [%[inptr], #0x180]\n" + "ld1w z4.s, p0/z, [%[outptr0]]\n" + "prfm PLDL1KEEP, [%[inptr], #0x240]\n" + "ld1w z8.s, p0/z, [%[inptr]]\n" + "ld1w z5.s, p0/z, [%[outptr1]]\n" + "ld1w z9.s, p0/z, [%[inptr], #3, MUL VL]\n" + "ld1w z6.s, p0/z, [%[outptr2]]\n" + "add z8.s, z8.s, z4.s\n" + "ld1w z10.s, p0/z, [%[inptr], #6, MUL VL]\n" + "ld1w z7.s, p0/z, [%[outptr3]]\n" + "add z9.s, z9.s, z5.s\n" + "ld1w z11.s, p0/z, [x8, #-7, MUL VL]\n" + "ld1w z4.s, p0/z, [%[outptr4]]\n" + "add z10.s, z10.s, z6.s\n" + "st1w z8.s, p0, [%[outptr0]]\n" + "ld1w z8.s, p0/z, [x8, #-4, MUL VL]\n" + "add z11.s, z11.s, z7.s\n" + "st1w z9.s, p0, [%[outptr1]]\n" + "add z8.s, z8.s, z4.s\n" + "st1w z10.s, p0, [%[outptr2]]\n" + "st1w z11.s, p0, [%[outptr3]]\n" + "st1w z8.s, p0, [%[outptr4]]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "incw %[p], all, mul #1\n" + "prfm PLDL1KEEP, [%[inptr], #0x1c0]\n" + "ld1w z5.s, p0/z, [%[outptr0], #1, MUL VL]\n" + "ld1w z9.s, p0/z, [%[inptr], #1, MUL VL]\n" + "ld1w z6.s, p0/z, [%[outptr1], #1, MUL VL]\n" + "ld1w z10.s, p0/z, [%[inptr], #4, MUL VL]\n" + "ld1w z7.s, p0/z, [%[outptr2], #1, MUL VL]\n" + "add z9.s, z9.s, z5.s\n" + "ld1w z11.s, p0/z, [%[inptr], #7, MUL VL]\n" + "ld1w z4.s, p0/z, [%[outptr3], #1, MUL VL]\n" + "add z10.s, z10.s, z6.s\n" + "ld1w z8.s, p0/z, [x8, #-6, MUL VL]\n" + "ld1w z5.s, p0/z, [%[outptr4], #1, MUL VL]\n" + "add z11.s, z11.s, z7.s\n" + "st1w z9.s, p0, [%[outptr0], #1, MUL VL]\n" + "ld1w z9.s, p0/z, [x8, #-3, MUL VL]\n" + "add z8.s, z8.s, z4.s\n" + "st1w z10.s, p0, [%[outptr1], #1, MUL VL]\n" + "add z9.s, z9.s, z5.s\n" + "st1w z11.s, p0, [%[outptr2], #1, MUL VL]\n" + "st1w z8.s, p0, [%[outptr3], #1, MUL VL]\n" + "st1w z9.s, p0, [%[outptr4], #1, MUL VL]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "prfm PLDL1KEEP, [%[outptr0], #0x60]\n" + "prfm PLDL1KEEP, [%[outptr1], #0x60]\n" + "ld1w z6.s, p0/z, [%[outptr0], #2, MUL VL]\n" + "prfm PLDL1KEEP, [%[inptr], #0x200]\n" + "ld1w z10.s, p0/z, [%[inptr], #2, MUL VL]\n" + "prfm PLDL1KEEP, [%[outptr2], #0x60]\n" + "ld1w z7.s, p0/z, [%[outptr1], #2, MUL VL]\n" + "prfm PLDL1KEEP, [%[outptr3], #0x60]\n" + "add z10.s, z10.s, z6.s\n" + "ld1w z11.s, p0/z, [%[inptr], #5, MUL VL]\n" + "ld1w z4.s, p0/z, [%[outptr2], #2, MUL VL]\n" + "prfm PLDL1KEEP, [%[outptr4], #0x60]\n" + "ld1w z8.s, p0/z, [x8, #-8, MUL VL]\n" + "add z11.s, z11.s, z7.s\n" + "st1w z10.s, p0, [%[outptr0], #2, MUL VL]\n" + "ld1w z5.s, p0/z, [%[outptr3], #2, MUL VL]\n" + "addvl %[outptr0], %[outptr0], #3\n" + "add z8.s, z8.s, z4.s\n" + "st1w z11.s, p0, [%[outptr1], #2, MUL VL]\n" + "ld1w z9.s, p0/z, [x8, #-5, MUL VL]\n" + "addvl %[outptr1], %[outptr1], #3\n" + "ld1w z6.s, p0/z, [%[outptr4], #2, MUL VL]\n" + "st1w z8.s, p0, [%[outptr2], #2, MUL VL]\n" + "addvl %[outptr2], %[outptr2], #3\n" + "add z9.s, z9.s, z5.s\n" + "ld1w z10.s, p0/z, [x8, #-2, MUL VL]\n" + "add z10.s, z10.s, z6.s\n" + "st1w z9.s, p0, [%[outptr3], #2, MUL VL]\n" + "addvl %[outptr3], %[outptr3], #3\n" + "st1w z10.s, p0, [%[outptr4], #2, MUL VL]\n" + "addvl %[outptr4], %[outptr4], #3\n" + "1:\n" + "addvl %[inptr], %[inptr], #24\n" + : [outptr0] "+r" (outptr0), [outptr1] "+r" (outptr1), [outptr2] "+r" (outptr2), [outptr3] "+r" (outptr3), [outptr4] "+r" (outptr4), [outptr5] "+r" (outptr5), [outptr6] "+r" (outptr6), [outptr7] "+r" (outptr7), + [inptr] "+r" (inptr), [p] "+r" (p) + : [alpha] "w" (alpha), [beta] "w" (beta), [w] "r" (w) + : "x8", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "memory", "cc" + ); + } + break; + + case 6: + { + long w = xmax - i; + long p = 0; + /* Optimized routine to copy an entire block */ + __asm __volatile ( + "mov z2.s, %s[alpha]\n" + "addvl x8, %[inptr], #16\n" + "mov z3.s, %s[beta]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "incw %[p], all, mul #1\n" + "prfm PLDL1KEEP, [%[inptr], #0x180]\n" + "ld1w z4.s, p0/z, [%[outptr0]]\n" + "prfm PLDL1KEEP, [%[inptr], #0x240]\n" + "ld1w z8.s, p0/z, [%[inptr]]\n" + "ld1w z5.s, p0/z, [%[outptr1]]\n" + "ld1w z9.s, p0/z, [%[inptr], #3, MUL VL]\n" + "ld1w z6.s, p0/z, [%[outptr2]]\n" + "add z8.s, z8.s, z4.s\n" + "ld1w z10.s, p0/z, [%[inptr], #6, MUL VL]\n" + "ld1w z7.s, p0/z, [%[outptr3]]\n" + "add z9.s, z9.s, z5.s\n" + "ld1w z11.s, p0/z, [x8, #-7, MUL VL]\n" + "ld1w z4.s, p0/z, [%[outptr4]]\n" + "add z10.s, z10.s, z6.s\n" + "st1w z8.s, p0, [%[outptr0]]\n" + "ld1w z8.s, p0/z, [x8, #-4, MUL VL]\n" + "add z11.s, z11.s, z7.s\n" + "ld1w z5.s, p0/z, [%[outptr5]]\n" + "st1w z9.s, p0, [%[outptr1]]\n" + "add z8.s, z8.s, z4.s\n" + "ld1w z9.s, p0/z, [x8, #-1, MUL VL]\n" + "st1w z10.s, p0, [%[outptr2]]\n" + "add z9.s, z9.s, z5.s\n" + "st1w z11.s, p0, [%[outptr3]]\n" + "st1w z8.s, p0, [%[outptr4]]\n" + "st1w z9.s, p0, [%[outptr5]]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "incw %[p], all, mul #1\n" + "prfm PLDL1KEEP, [%[inptr], #0x1c0]\n" + "ld1w z6.s, p0/z, [%[outptr0], #1, MUL VL]\n" + "prfm PLDL1KEEP, [%[inptr], #0x280]\n" + "ld1w z10.s, p0/z, [%[inptr], #1, MUL VL]\n" + "ld1w z7.s, p0/z, [%[outptr1], #1, MUL VL]\n" + "ld1w z11.s, p0/z, [%[inptr], #4, MUL VL]\n" + "ld1w z4.s, p0/z, [%[outptr2], #1, MUL VL]\n" + "add z10.s, z10.s, z6.s\n" + "ld1w z8.s, p0/z, [%[inptr], #7, MUL VL]\n" + "ld1w z5.s, p0/z, [%[outptr3], #1, MUL VL]\n" + "add z11.s, z11.s, z7.s\n" + "ld1w z9.s, p0/z, [x8, #-6, MUL VL]\n" + "ld1w z6.s, p0/z, [%[outptr4], #1, MUL VL]\n" + "add z8.s, z8.s, z4.s\n" + "st1w z10.s, p0, [%[outptr0], #1, MUL VL]\n" + "ld1w z10.s, p0/z, [x8, #-3, MUL VL]\n" + "add z9.s, z9.s, z5.s\n" + "ld1w z7.s, p0/z, [%[outptr5], #1, MUL VL]\n" + "st1w z11.s, p0, [%[outptr1], #1, MUL VL]\n" + "add z10.s, z10.s, z6.s\n" + "ld1w z11.s, p0/z, [x8]\n" + "st1w z8.s, p0, [%[outptr2], #1, MUL VL]\n" + "add z11.s, z11.s, z7.s\n" + "st1w z9.s, p0, [%[outptr3], #1, MUL VL]\n" + "st1w z10.s, p0, [%[outptr4], #1, MUL VL]\n" + "st1w z11.s, p0, [%[outptr5], #1, MUL VL]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "prfm PLDL1KEEP, [%[outptr0], #0x60]\n" + "prfm PLDL1KEEP, [%[outptr1], #0x60]\n" + "ld1w z4.s, p0/z, [%[outptr0], #2, MUL VL]\n" + "prfm PLDL1KEEP, [%[inptr], #0x200]\n" + "ld1w z8.s, p0/z, [%[inptr], #2, MUL VL]\n" + "prfm PLDL1KEEP, [%[outptr2], #0x60]\n" + "ld1w z5.s, p0/z, [%[outptr1], #2, MUL VL]\n" + "prfm PLDL1KEEP, [%[outptr3], #0x60]\n" + "add z8.s, z8.s, z4.s\n" + "ld1w z9.s, p0/z, [%[inptr], #5, MUL VL]\n" + "ld1w z6.s, p0/z, [%[outptr2], #2, MUL VL]\n" + "prfm PLDL1KEEP, [%[outptr4], #0x60]\n" + "ld1w z10.s, p0/z, [x8, #-8, MUL VL]\n" + "prfm PLDL1KEEP, [%[outptr5], #0x60]\n" + "add z9.s, z9.s, z5.s\n" + "st1w z8.s, p0, [%[outptr0], #2, MUL VL]\n" + "ld1w z7.s, p0/z, [%[outptr3], #2, MUL VL]\n" + "addvl %[outptr0], %[outptr0], #3\n" + "add z10.s, z10.s, z6.s\n" + "st1w z9.s, p0, [%[outptr1], #2, MUL VL]\n" + "ld1w z11.s, p0/z, [x8, #-5, MUL VL]\n" + "addvl %[outptr1], %[outptr1], #3\n" + "ld1w z4.s, p0/z, [%[outptr4], #2, MUL VL]\n" + "st1w z10.s, p0, [%[outptr2], #2, MUL VL]\n" + "addvl %[outptr2], %[outptr2], #3\n" + "add z11.s, z11.s, z7.s\n" + "ld1w z8.s, p0/z, [x8, #-2, MUL VL]\n" + "ld1w z5.s, p0/z, [%[outptr5], #2, MUL VL]\n" + "ld1w z9.s, p0/z, [x8, #1, MUL VL]\n" + "add z8.s, z8.s, z4.s\n" + "st1w z11.s, p0, [%[outptr3], #2, MUL VL]\n" + "addvl %[outptr3], %[outptr3], #3\n" + "add z9.s, z9.s, z5.s\n" + "st1w z8.s, p0, [%[outptr4], #2, MUL VL]\n" + "addvl %[outptr4], %[outptr4], #3\n" + "st1w z9.s, p0, [%[outptr5], #2, MUL VL]\n" + "addvl %[outptr5], %[outptr5], #3\n" + "1:\n" + "addvl %[inptr], %[inptr], #24\n" + : [outptr0] "+r" (outptr0), [outptr1] "+r" (outptr1), [outptr2] "+r" (outptr2), [outptr3] "+r" (outptr3), [outptr4] "+r" (outptr4), [outptr5] "+r" (outptr5), [outptr6] "+r" (outptr6), [outptr7] "+r" (outptr7), + [inptr] "+r" (inptr), [p] "+r" (p) + : [alpha] "w" (alpha), [beta] "w" (beta), [w] "r" (w) + : "x8", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "memory", "cc" + ); + } + break; + + case 7: + { + long w = xmax - i; + long p = 0; + /* Optimized routine to copy an entire block */ + __asm __volatile ( + "mov z2.s, %s[alpha]\n" + "addvl x8, %[inptr], #16\n" + "mov z3.s, %s[beta]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "incw %[p], all, mul #1\n" + "prfm PLDL1KEEP, [%[inptr], #0x180]\n" + "ld1w z4.s, p0/z, [%[outptr0]]\n" + "prfm PLDL1KEEP, [%[inptr], #0x240]\n" + "ld1w z8.s, p0/z, [%[inptr]]\n" + "ld1w z5.s, p0/z, [%[outptr1]]\n" + "ld1w z9.s, p0/z, [%[inptr], #3, MUL VL]\n" + "ld1w z6.s, p0/z, [%[outptr2]]\n" + "add z8.s, z8.s, z4.s\n" + "ld1w z10.s, p0/z, [%[inptr], #6, MUL VL]\n" + "ld1w z7.s, p0/z, [%[outptr3]]\n" + "add z9.s, z9.s, z5.s\n" + "ld1w z11.s, p0/z, [x8, #-7, MUL VL]\n" + "ld1w z4.s, p0/z, [%[outptr4]]\n" + "add z10.s, z10.s, z6.s\n" + "st1w z8.s, p0, [%[outptr0]]\n" + "ld1w z8.s, p0/z, [x8, #-4, MUL VL]\n" + "add z11.s, z11.s, z7.s\n" + "ld1w z5.s, p0/z, [%[outptr5]]\n" + "ld1w z6.s, p0/z, [%[outptr6]]\n" + "st1w z9.s, p0, [%[outptr1]]\n" + "add z8.s, z8.s, z4.s\n" + "ld1w z9.s, p0/z, [x8, #-1, MUL VL]\n" + "st1w z10.s, p0, [%[outptr2]]\n" + "add z9.s, z9.s, z5.s\n" + "ld1w z10.s, p0/z, [x8, #2, MUL VL]\n" + "st1w z11.s, p0, [%[outptr3]]\n" + "add z10.s, z10.s, z6.s\n" + "st1w z8.s, p0, [%[outptr4]]\n" + "st1w z9.s, p0, [%[outptr5]]\n" + "st1w z10.s, p0, [%[outptr6]]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "incw %[p], all, mul #1\n" + "prfm PLDL1KEEP, [%[inptr], #0x1c0]\n" + "ld1w z7.s, p0/z, [%[outptr0], #1, MUL VL]\n" + "prfm PLDL1KEEP, [%[inptr], #0x280]\n" + "ld1w z11.s, p0/z, [%[inptr], #1, MUL VL]\n" + "ld1w z4.s, p0/z, [%[outptr1], #1, MUL VL]\n" + "ld1w z8.s, p0/z, [%[inptr], #4, MUL VL]\n" + "ld1w z5.s, p0/z, [%[outptr2], #1, MUL VL]\n" + "add z11.s, z11.s, z7.s\n" + "ld1w z9.s, p0/z, [%[inptr], #7, MUL VL]\n" + "ld1w z6.s, p0/z, [%[outptr3], #1, MUL VL]\n" + "add z8.s, z8.s, z4.s\n" + "ld1w z10.s, p0/z, [x8, #-6, MUL VL]\n" + "ld1w z7.s, p0/z, [%[outptr4], #1, MUL VL]\n" + "add z9.s, z9.s, z5.s\n" + "st1w z11.s, p0, [%[outptr0], #1, MUL VL]\n" + "ld1w z11.s, p0/z, [x8, #-3, MUL VL]\n" + "add z10.s, z10.s, z6.s\n" + "ld1w z4.s, p0/z, [%[outptr5], #1, MUL VL]\n" + "ld1w z5.s, p0/z, [%[outptr6], #1, MUL VL]\n" + "st1w z8.s, p0, [%[outptr1], #1, MUL VL]\n" + "add z11.s, z11.s, z7.s\n" + "ld1w z8.s, p0/z, [x8]\n" + "st1w z9.s, p0, [%[outptr2], #1, MUL VL]\n" + "add z8.s, z8.s, z4.s\n" + "ld1w z9.s, p0/z, [x8, #3, MUL VL]\n" + "st1w z10.s, p0, [%[outptr3], #1, MUL VL]\n" + "add z9.s, z9.s, z5.s\n" + "st1w z11.s, p0, [%[outptr4], #1, MUL VL]\n" + "st1w z8.s, p0, [%[outptr5], #1, MUL VL]\n" + "st1w z9.s, p0, [%[outptr6], #1, MUL VL]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "prfm PLDL1KEEP, [%[outptr0], #0x60]\n" + "prfm PLDL1KEEP, [%[outptr1], #0x60]\n" + "ld1w z6.s, p0/z, [%[outptr0], #2, MUL VL]\n" + "prfm PLDL1KEEP, [%[inptr], #0x200]\n" + "ld1w z10.s, p0/z, [%[inptr], #2, MUL VL]\n" + "prfm PLDL1KEEP, [%[outptr2], #0x60]\n" + "ld1w z7.s, p0/z, [%[outptr1], #2, MUL VL]\n" + "prfm PLDL1KEEP, [%[outptr3], #0x60]\n" + "add z10.s, z10.s, z6.s\n" + "ld1w z11.s, p0/z, [%[inptr], #5, MUL VL]\n" + "ld1w z4.s, p0/z, [%[outptr2], #2, MUL VL]\n" + "prfm PLDL1KEEP, [%[outptr4], #0x60]\n" + "ld1w z8.s, p0/z, [x8, #-8, MUL VL]\n" + "prfm PLDL1KEEP, [%[outptr5], #0x60]\n" + "add z11.s, z11.s, z7.s\n" + "st1w z10.s, p0, [%[outptr0], #2, MUL VL]\n" + "ld1w z5.s, p0/z, [%[outptr3], #2, MUL VL]\n" + "addvl %[outptr0], %[outptr0], #3\n" + "add z8.s, z8.s, z4.s\n" + "st1w z11.s, p0, [%[outptr1], #2, MUL VL]\n" + "ld1w z9.s, p0/z, [x8, #-5, MUL VL]\n" + "addvl %[outptr1], %[outptr1], #3\n" + "ld1w z6.s, p0/z, [%[outptr4], #2, MUL VL]\n" + "prfm PLDL1KEEP, [%[inptr], #0x2c0]\n" + "add z9.s, z9.s, z5.s\n" + "st1w z8.s, p0, [%[outptr2], #2, MUL VL]\n" + "ld1w z10.s, p0/z, [x8, #-2, MUL VL]\n" + "addvl %[outptr2], %[outptr2], #3\n" + "ld1w z7.s, p0/z, [%[outptr5], #2, MUL VL]\n" + "prfm PLDL1KEEP, [%[outptr6], #0x60]\n" + "add z10.s, z10.s, z6.s\n" + "st1w z9.s, p0, [%[outptr3], #2, MUL VL]\n" + "ld1w z11.s, p0/z, [x8, #1, MUL VL]\n" + "addvl %[outptr3], %[outptr3], #3\n" + "ld1w z4.s, p0/z, [%[outptr6], #2, MUL VL]\n" + "st1w z10.s, p0, [%[outptr4], #2, MUL VL]\n" + "addvl %[outptr4], %[outptr4], #3\n" + "add z11.s, z11.s, z7.s\n" + "ld1w z8.s, p0/z, [x8, #4, MUL VL]\n" + "add z8.s, z8.s, z4.s\n" + "st1w z11.s, p0, [%[outptr5], #2, MUL VL]\n" + "addvl %[outptr5], %[outptr5], #3\n" + "st1w z8.s, p0, [%[outptr6], #2, MUL VL]\n" + "addvl %[outptr6], %[outptr6], #3\n" + "1:\n" + "addvl %[inptr], %[inptr], #24\n" + : [outptr0] "+r" (outptr0), [outptr1] "+r" (outptr1), [outptr2] "+r" (outptr2), [outptr3] "+r" (outptr3), [outptr4] "+r" (outptr4), [outptr5] "+r" (outptr5), [outptr6] "+r" (outptr6), [outptr7] "+r" (outptr7), + [inptr] "+r" (inptr), [p] "+r" (p) + : [alpha] "w" (alpha), [beta] "w" (beta), [w] "r" (w) + : "x8", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "memory", "cc" + ); + } + break; + + default: + case 8: + { + long w = xmax - i; + long p = 0; + /* Optimized routine to copy an entire block */ + __asm __volatile ( + "mov z2.s, %s[alpha]\n" + "addvl x8, %[inptr], #16\n" + "mov z3.s, %s[beta]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "incw %[p], all, mul #1\n" + "prfm PLDL1KEEP, [%[inptr], #0x180]\n" + "ld1w z4.s, p0/z, [%[outptr0]]\n" + "prfm PLDL1KEEP, [%[inptr], #0x240]\n" + "ld1w z8.s, p0/z, [%[inptr]]\n" + "ld1w z5.s, p0/z, [%[outptr1]]\n" + "ld1w z9.s, p0/z, [%[inptr], #3, MUL VL]\n" + "ld1w z6.s, p0/z, [%[outptr2]]\n" + "add z8.s, z8.s, z4.s\n" + "ld1w z10.s, p0/z, [%[inptr], #6, MUL VL]\n" + "ld1w z7.s, p0/z, [%[outptr3]]\n" + "add z9.s, z9.s, z5.s\n" + "ld1w z11.s, p0/z, [x8, #-7, MUL VL]\n" + "ld1w z4.s, p0/z, [%[outptr4]]\n" + "add z10.s, z10.s, z6.s\n" + "st1w z8.s, p0, [%[outptr0]]\n" + "ld1w z8.s, p0/z, [x8, #-4, MUL VL]\n" + "add z11.s, z11.s, z7.s\n" + "ld1w z5.s, p0/z, [%[outptr5]]\n" + "ld1w z6.s, p0/z, [%[outptr6]]\n" + "st1w z9.s, p0, [%[outptr1]]\n" + "add z8.s, z8.s, z4.s\n" + "ld1w z9.s, p0/z, [x8, #-1, MUL VL]\n" + "ld1w z7.s, p0/z, [%[outptr7]]\n" + "st1w z10.s, p0, [%[outptr2]]\n" + "add z9.s, z9.s, z5.s\n" + "ld1w z10.s, p0/z, [x8, #2, MUL VL]\n" + "st1w z11.s, p0, [%[outptr3]]\n" + "add z10.s, z10.s, z6.s\n" + "ld1w z11.s, p0/z, [x8, #5, MUL VL]\n" + "st1w z8.s, p0, [%[outptr4]]\n" + "add z11.s, z11.s, z7.s\n" + "st1w z9.s, p0, [%[outptr5]]\n" + "st1w z10.s, p0, [%[outptr6]]\n" + "st1w z11.s, p0, [%[outptr7]]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "incw %[p], all, mul #1\n" + "prfm PLDL1KEEP, [%[inptr], #0x1c0]\n" + "ld1w z4.s, p0/z, [%[outptr0], #1, MUL VL]\n" + "prfm PLDL1KEEP, [%[inptr], #0x280]\n" + "ld1w z8.s, p0/z, [%[inptr], #1, MUL VL]\n" + "ld1w z5.s, p0/z, [%[outptr1], #1, MUL VL]\n" + "ld1w z9.s, p0/z, [%[inptr], #4, MUL VL]\n" + "ld1w z6.s, p0/z, [%[outptr2], #1, MUL VL]\n" + "add z8.s, z8.s, z4.s\n" + "ld1w z10.s, p0/z, [%[inptr], #7, MUL VL]\n" + "ld1w z7.s, p0/z, [%[outptr3], #1, MUL VL]\n" + "add z9.s, z9.s, z5.s\n" + "ld1w z11.s, p0/z, [x8, #-6, MUL VL]\n" + "ld1w z4.s, p0/z, [%[outptr4], #1, MUL VL]\n" + "add z10.s, z10.s, z6.s\n" + "st1w z8.s, p0, [%[outptr0], #1, MUL VL]\n" + "ld1w z8.s, p0/z, [x8, #-3, MUL VL]\n" + "add z11.s, z11.s, z7.s\n" + "ld1w z5.s, p0/z, [%[outptr5], #1, MUL VL]\n" + "ld1w z6.s, p0/z, [%[outptr6], #1, MUL VL]\n" + "st1w z9.s, p0, [%[outptr1], #1, MUL VL]\n" + "add z8.s, z8.s, z4.s\n" + "ld1w z9.s, p0/z, [x8]\n" + "ld1w z7.s, p0/z, [%[outptr7], #1, MUL VL]\n" + "st1w z10.s, p0, [%[outptr2], #1, MUL VL]\n" + "add z9.s, z9.s, z5.s\n" + "ld1w z10.s, p0/z, [x8, #3, MUL VL]\n" + "st1w z11.s, p0, [%[outptr3], #1, MUL VL]\n" + "add z10.s, z10.s, z6.s\n" + "ld1w z11.s, p0/z, [x8, #6, MUL VL]\n" + "st1w z8.s, p0, [%[outptr4], #1, MUL VL]\n" + "add z11.s, z11.s, z7.s\n" + "st1w z9.s, p0, [%[outptr5], #1, MUL VL]\n" + "st1w z10.s, p0, [%[outptr6], #1, MUL VL]\n" + "st1w z11.s, p0, [%[outptr7], #1, MUL VL]\n" + "whilelt p0.s, %[p], %[w]\n" + "b.none 1f\n" + "prfm PLDL1KEEP, [%[outptr0], #0x60]\n" + "prfm PLDL1KEEP, [%[outptr1], #0x60]\n" + "ld1w z4.s, p0/z, [%[outptr0], #2, MUL VL]\n" + "prfm PLDL1KEEP, [%[inptr], #0x200]\n" + "ld1w z8.s, p0/z, [%[inptr], #2, MUL VL]\n" + "prfm PLDL1KEEP, [%[outptr2], #0x60]\n" + "ld1w z5.s, p0/z, [%[outptr1], #2, MUL VL]\n" + "prfm PLDL1KEEP, [%[outptr3], #0x60]\n" + "add z8.s, z8.s, z4.s\n" + "ld1w z9.s, p0/z, [%[inptr], #5, MUL VL]\n" + "ld1w z6.s, p0/z, [%[outptr2], #2, MUL VL]\n" + "prfm PLDL1KEEP, [%[outptr4], #0x60]\n" + "ld1w z10.s, p0/z, [x8, #-8, MUL VL]\n" + "prfm PLDL1KEEP, [%[outptr5], #0x60]\n" + "add z9.s, z9.s, z5.s\n" + "st1w z8.s, p0, [%[outptr0], #2, MUL VL]\n" + "ld1w z7.s, p0/z, [%[outptr3], #2, MUL VL]\n" + "addvl %[outptr0], %[outptr0], #3\n" + "add z10.s, z10.s, z6.s\n" + "st1w z9.s, p0, [%[outptr1], #2, MUL VL]\n" + "ld1w z11.s, p0/z, [x8, #-5, MUL VL]\n" + "addvl %[outptr1], %[outptr1], #3\n" + "ld1w z4.s, p0/z, [%[outptr4], #2, MUL VL]\n" + "prfm PLDL1KEEP, [%[inptr], #0x2c0]\n" + "add z11.s, z11.s, z7.s\n" + "st1w z10.s, p0, [%[outptr2], #2, MUL VL]\n" + "ld1w z8.s, p0/z, [x8, #-2, MUL VL]\n" + "addvl %[outptr2], %[outptr2], #3\n" + "ld1w z5.s, p0/z, [%[outptr5], #2, MUL VL]\n" + "prfm PLDL1KEEP, [%[outptr6], #0x60]\n" + "add z8.s, z8.s, z4.s\n" + "st1w z11.s, p0, [%[outptr3], #2, MUL VL]\n" + "ld1w z9.s, p0/z, [x8, #1, MUL VL]\n" + "addvl %[outptr3], %[outptr3], #3\n" + "ld1w z6.s, p0/z, [%[outptr6], #2, MUL VL]\n" + "prfm PLDL1KEEP, [%[outptr7], #0x60]\n" + "add z9.s, z9.s, z5.s\n" + "st1w z8.s, p0, [%[outptr4], #2, MUL VL]\n" + "ld1w z10.s, p0/z, [x8, #4, MUL VL]\n" + "addvl %[outptr4], %[outptr4], #3\n" + "ld1w z7.s, p0/z, [%[outptr7], #2, MUL VL]\n" + "st1w z9.s, p0, [%[outptr5], #2, MUL VL]\n" + "addvl %[outptr5], %[outptr5], #3\n" + "add z10.s, z10.s, z6.s\n" + "ld1w z11.s, p0/z, [x8, #7, MUL VL]\n" + "add z11.s, z11.s, z7.s\n" + "st1w z10.s, p0, [%[outptr6], #2, MUL VL]\n" + "addvl %[outptr6], %[outptr6], #3\n" + "st1w z11.s, p0, [%[outptr7], #2, MUL VL]\n" + "addvl %[outptr7], %[outptr7], #3\n" + "1:\n" + "addvl %[inptr], %[inptr], #24\n" + : [outptr0] "+r" (outptr0), [outptr1] "+r" (outptr1), [outptr2] "+r" (outptr2), [outptr3] "+r" (outptr3), [outptr4] "+r" (outptr4), [outptr5] "+r" (outptr5), [outptr6] "+r" (outptr6), [outptr7] "+r" (outptr7), + [inptr] "+r" (inptr), [p] "+r" (p) + : [alpha] "w" (alpha), [beta] "w" (beta), [w] "r" (w) + : "x8", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "memory", "cc" + ); + } + break; + + + } + } + } + } +} + +#endif // __ARM_FEATURE_SVE diff --git a/src/core/NEON/kernels/arm_gemm/misc.cpp b/src/core/NEON/kernels/arm_gemm/misc.cpp new file mode 100644 index 0000000000..7b345e2e98 --- /dev/null +++ b/src/core/NEON/kernels/arm_gemm/misc.cpp @@ -0,0 +1,34 @@ +/* + * Copyright (c) 2019 ARM Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#ifndef NO_MULTI_THREADING +#include +#endif + +namespace arm_gemm { + +#ifndef NO_MULTI_THREADING +std::mutex report_mutex; +#endif + +} // namespace arm_gemm \ No newline at end of file diff --git a/src/core/NEON/kernels/arm_gemm/quantize_wrapper.hpp b/src/core/NEON/kernels/arm_gemm/quantize_wrapper.hpp new file mode 100644 index 0000000000..5e67bc9c0e --- /dev/null +++ b/src/core/NEON/kernels/arm_gemm/quantize_wrapper.hpp @@ -0,0 +1,240 @@ +/* + * Copyright (c) 2019 ARM Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ + +#pragma once + +#include "arm_gemm.hpp" + +#include "barrier.hpp" +#include "gemm_implementation.hpp" +#include "quantized.hpp" + +namespace arm_gemm { + +/* Quantized wrapper - do an integer GEMM and wrap around the quantization. */ + +template +class QuantizeWrapper : public GemmCommon { +private: + UniqueGemmCommon _subgemm = nullptr; + int32_t *_row_sums = nullptr; + int32_t *_col_sums = nullptr; + ARequantizeLayer32 _params; + GemmArgs _args; + barrier _barrier; + + void *working_space = nullptr; + bool arrays_set = false; + + /* We need a subgemm which outputs the 32-bit intermediates - how much space is needed for that? */ + size_t subgemm_output_size() const { + return (_args._Msize * _args._Nsize * _args._nbatches * _args._nmulti * sizeof(int32_t)); + } + + size_t col_sum_size() const { + return (_args._Nsize * _args._nmulti * sizeof(int32_t)); + } + + size_t row_sum_size() const { + return (_args._Msize * _args._nbatches * _args._nmulti * sizeof(int32_t)); + } + + /* Local working space: We need space for the subgemm output (above) and + * the row sums. If the GEMM is not pretransposed we need to store the + * column sums here too. */ + size_t local_working_size() const { + size_t sz = subgemm_output_size() + row_sum_size(); + + if (_args._pretransposed_hint) { + return sz; + } + + return sz + col_sum_size(); + } + + void set_child_arrays() { + if (working_space == nullptr || arrays_set == false) + return; + + /* Use the first part of our working space for the subgemm result, pass the operand details straight through. */ + _subgemm->set_arrays(this->_Aptr, this->_lda, this->_A_batch_stride, this->_A_multi_stride, + this->_Bptr, this->_ldb, this->_B_multi_stride, + reinterpret_cast(working_space), _args._Nsize, (_args._Nsize * _args._Msize), (_args._Nsize * _args._Msize * _args._nbatches)); + } + + void col_sums_pretransposed(const To *B, const int ldb, const int B_multi_stride) { + for (unsigned int multi=0; multi<_args._nmulti; multi++) { + compute_col_sums(_params, _args._Nsize, _args._Ksize, B + (multi * B_multi_stride), ldb, _col_sums + (multi * _args._Nsize), _args._Ksize, 0); + } + } + + void col_sums_runtime(unsigned int threadid) { + unsigned int first_col = (threadid * _args._Nsize) / _args._maxthreads; + unsigned int last_col = ((threadid + 1) * _args._Nsize) / _args._maxthreads; + + for (unsigned int multi=0; multi<_args._nmulti; multi++) { + compute_col_sums(_params, (last_col - first_col), _args._Ksize, this->_Bptr + (multi * this->_B_multi_stride) + first_col, this->_ldb, _col_sums + (multi * _args._Nsize) + first_col, _args._Ksize, first_col); + } + } + + void requantize_runtime(unsigned int threadid) { + unsigned int first_row = (threadid * _args._Msize) / _args._maxthreads; + unsigned int last_row = ((threadid+1) * _args._Msize) / _args._maxthreads; + + for (unsigned int multi=0; multi<_args._nmulti; multi++) { + for (unsigned int batch=0; batch<_args._nbatches; batch++) { + /* Compute row sums now */ + compute_row_sums(_params, _args._Ksize, (last_row - first_row), this->_Aptr + (multi * this->_A_multi_stride) + (batch * this->_A_batch_stride) + (first_row * this->_lda), + this->_lda, _row_sums + (multi * _args._nbatches * _args._Msize) + (batch * _args._Msize) + first_row); + // If we don't care about negative values, call the version of this function that doesn't correct before shifting. + // 'c_offset' represents zero, so if the lowest possible quantized output value is the same or more than that we will not output negative numbers. + requantize_block_32(_params, _args._Nsize, (last_row - first_row), + reinterpret_cast(working_space) + (multi * (_args._Msize * _args._Nsize * _args._nbatches)) + (batch * (_args._Msize * _args._Nsize)) + (first_row * _args._Nsize), + _args._Nsize, + this->_Cptr + (multi * this->_C_multi_stride) + (batch * this->_C_batch_stride) + (first_row * this->_ldc), this->_ldc, + _row_sums + (multi * _args._nbatches * _args._Msize) + (batch * _args._Msize) + first_row, + _col_sums + (multi * _args._Nsize)); + } + } + } + + +public: + QuantizeWrapper(const GemmArgs &args, const ARequantizeLayer32 &qp) : _params(qp), _args(args), _barrier(args._maxthreads) { + GemmArgs newargs = GemmArgs(args._ci, args._Msize, args._Nsize, args._Ksize, args._nbatches, args._nmulti, args._trA, args._trB, 1, 0, args._maxthreads, args._pretransposed_hint, nullptr); + _subgemm = gemm(newargs); + + if (_subgemm == nullptr) { + return; + } + + if (!_subgemm->B_is_pretransposed()) { + _args._pretransposed_hint = false; + } + } + + QuantizeWrapper(const QuantizeWrapper &) = delete; + QuantizeWrapper &operator=(const QuantizeWrapper &) = delete; + QuantizeWrapper(QuantizeWrapper &&) = default; + QuantizeWrapper &operator=(QuantizeWrapper &&) = default; + + void set_arrays(const To *A, const int lda, const int A_batch_stride, const int A_multi_stride, + const To *B, const int ldb, const int B_multi_stride, + Tr *C, const int ldc, const int C_batch_stride, const int C_multi_stride) override { + GemmCommon::set_arrays(A, lda, A_batch_stride, A_multi_stride, B, ldb, B_multi_stride, C, ldc, C_batch_stride, C_multi_stride); + + arrays_set = true; + set_child_arrays(); + } + + unsigned int get_window_size() const override { + return _subgemm->get_window_size(); + } + + void set_nthreads(int nthreads) override { + _subgemm->set_nthreads(nthreads); + _barrier.set_nthreads(nthreads); + _args._maxthreads = nthreads; + } + + void execute(unsigned int start, unsigned int end, int threadid) override { + _subgemm->execute(start, end, threadid); + if (!_args._pretransposed_hint) { + col_sums_runtime(threadid); + } + + _barrier.arrive_and_wait(); + + requantize_runtime(threadid); + } + + size_t get_working_size() const override { + return _subgemm->get_working_size() + local_working_size(); + } + + // Space arrangement: + + // ptr + // V + // | subgemm output | row_sums | col_sums (if not pretransposed | subgemm working space | + void set_working_space(void *space) override { + uintptr_t space_int = reinterpret_cast(space); + + working_space = space; + _subgemm->set_working_space(reinterpret_cast(space_int + local_working_size())); + + _row_sums = reinterpret_cast(space_int + subgemm_output_size()); + if (!_args._pretransposed_hint) { + _col_sums = reinterpret_cast(space_int + subgemm_output_size() + row_sum_size()); + } + + set_child_arrays(); + } + + bool B_is_pretransposed() const override { + /* We clear this flag if the subgemm isn't pretransposed, so just return its value */ + return _args._pretransposed_hint; + } + + bool B_pretranspose_required() const override { + return _subgemm->B_pretranspose_required(); + } + + size_t get_B_pretransposed_array_size() const override { + if (_args._pretransposed_hint) { + return _subgemm->get_B_pretransposed_array_size() + col_sum_size(); + } + + return 0; + } + + void pretranspose_B_array(void *buffer, const To *B, const int ldb, const int B_multi_stride) override { + if (!_args._pretransposed_hint) { + return; + } + + uintptr_t buffer_int = reinterpret_cast(buffer); + _subgemm->pretranspose_B_array(reinterpret_cast(buffer_int + col_sum_size()), B, ldb, B_multi_stride); + + _col_sums = reinterpret_cast(buffer); + + col_sums_pretransposed(B, ldb, B_multi_stride); + } + + void set_pretransposed_B_data(void *buffer) override { + if (!_args._pretransposed_hint) { + return; + } + + uintptr_t buffer_int = reinterpret_cast(buffer); + _subgemm->set_pretransposed_B_data(reinterpret_cast(buffer_int + col_sum_size())); + _col_sums = reinterpret_cast(buffer); + } + + void set_quantized_bias(const int32_t *bias) override { + _params.bias = bias; + } +}; + +} // namespace arm_gemm diff --git a/src/core/NEON/kernels/arm_gemm/quantized.cpp b/src/core/NEON/kernels/arm_gemm/quantized.cpp new file mode 100644 index 0000000000..dd4eb31ea3 --- /dev/null +++ b/src/core/NEON/kernels/arm_gemm/quantized.cpp @@ -0,0 +1,769 @@ +/* + * Copyright (c) 2019 Arm Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ + +#include "arm_gemm.hpp" + +#include + +namespace arm_gemm { + +namespace { + +/* Requantize a block of data, using the requantize parameters in 'qp'. + * + * row_bias and col_bias are assumed to be precomputed values which include + * any externally supplied bias, plus the row/column contibution sums, plus + * the overall constant offset (A_offset * B_offset * depth). + * + * Note that this function works equally well for uint8_t output: just set + * minval/maxval appropriately and cast the output pointer. It is caller's + * responsibility to ensure that minval/maxval are representable in the + * target type - the downcast to (u)int8_t is done by simply extracting the + * LSB. + * + * The 'do_shift_correction' template parameter turns on the correction + * applied to negative values being shifted right to make sure they round + * properly - if negative values are never output (e.g. fused ReLU) this is + * unnecessary. + */ +template +void requantize_block_32_int(const ARequantizeLayer32 &qp, unsigned int width, unsigned int height, + const int32_t *input, unsigned int in_stride, int8_t *output, unsigned int out_stride, + const int32_t *row_bias, const int32_t *col_bias) { + const int32x4_t v_mul = vdupq_n_s32(qp.requant_mul); + const int32x4_t v_shift = vdupq_n_s32(qp.requant_shift); + const int32x4_t v_minval = vdupq_n_s32(qp.minval); + const int32x4_t v_maxval = vdupq_n_s32(qp.maxval); + const int32x4_t v_c_offset = vdupq_n_s32(qp.c_offset); + + /* To make sure we have plenty of accumulators, compute two rows at a + * time. If the number of rows is odd, compute the bottom row twice to + * avoid needing a duplicate codepath. */ + for (unsigned int row=0; row(out_ptr), vreinterpretq_s32_s8(v_uz0), 0); + out_ptr += 4; + vst1q_lane_s32(reinterpret_cast(out_ptr1), vreinterpretq_s32_s8(v_uz0), 1); + out_ptr1 += 4; + } + + if (odds) { + int32x4_t v_col0 = vdupq_n_s32(0); + int32x4_t v_in00 = vdupq_n_s32(0); + int32x4_t v_in10 = vdupq_n_s32(0); + + do { + v_col0 = vld1q_lane_s32(colptr, v_col0, 0); + v_in00 = vld1q_lane_s32(in_ptr, v_in00, 0); + v_in10 = vld1q_lane_s32(in_ptr1, v_in10, 0); + if (odds == 1) { break; } + + v_col0 = vld1q_lane_s32(colptr + 1, v_col0, 1); + v_in00 = vld1q_lane_s32(in_ptr + 1, v_in00, 1); + v_in10 = vld1q_lane_s32(in_ptr1 + 1, v_in10, 1); + if (odds == 2) { break; } + + v_col0 = vld1q_lane_s32(colptr + 2, v_col0, 2); + v_in00 = vld1q_lane_s32(in_ptr + 2, v_in00, 2); + v_in10 = vld1q_lane_s32(in_ptr1 + 2, v_in10, 2); + } while (0); + + // Add on row sum and bias constant + v_in00 = vaddq_s32(v_in00, v_row_sum); + + v_in10 = vaddq_s32(v_in10, v_row_sum1); + + // Subtract col sum * a_offset + v_in00 = vaddq_s32(v_in00, v_col0); + + v_in10 = vaddq_s32(v_in10, v_col0); + + // Quantize - start with multiply + v_in00 = vqrdmulhq_s32(v_in00, v_mul); + + v_in10 = vqrdmulhq_s32(v_in10, v_mul); + + // Compute and add on corrective offset + if (do_shift_correction) { + int32x4_t v_temp00 = vandq_s32(v_in00, v_shift); + + int32x4_t v_temp10 = vandq_s32(v_in10, v_shift); + + v_temp00 = vshrq_n_s32(v_temp00, 31); + + v_temp10 = vshrq_n_s32(v_temp10, 31); + + v_in00 = vqaddq_s32(v_in00, v_temp00); + + v_in10 = vqaddq_s32(v_in10, v_temp10); + } + + v_in00 = vrshlq_s32(v_in00, v_shift); + + v_in10 = vrshlq_s32(v_in10, v_shift); + + v_in00 = vaddq_s32(v_in00, v_c_offset); + + v_in10 = vaddq_s32(v_in10, v_c_offset); + + v_in00 = vmaxq_s32(v_in00, v_minval); + + v_in10 = vmaxq_s32(v_in10, v_minval); + + v_in00 = vminq_s32(v_in00, v_maxval); + + v_in10 = vminq_s32(v_in10, v_maxval); + + do { + vst1q_lane_s8(out_ptr, vreinterpretq_s8_s32(v_in00), 0); + vst1q_lane_s8(out_ptr1, vreinterpretq_s8_s32(v_in10), 0); + + if (odds==1) { break; } + + vst1q_lane_s8(out_ptr + 1, vreinterpretq_s8_s32(v_in00), 4); + vst1q_lane_s8(out_ptr1 + 1, vreinterpretq_s8_s32(v_in10), 4); + + if (odds==2) { break; } + + vst1q_lane_s8(out_ptr + 2, vreinterpretq_s8_s32(v_in00), 8); + vst1q_lane_s8(out_ptr1 + 2, vreinterpretq_s8_s32(v_in10), 8); + } while(0); + } + } +} + +} // anonymous namespace + +template +void requantize_block_32(const ARequantizeLayer32 &qp, unsigned int width, unsigned int height, + const Tin *input, unsigned int in_stride, Tout *output, unsigned int out_stride, + const int32_t *row_bias, const int32_t *col_bias) { + if (qp.minval >= qp.c_offset) { + requantize_block_32_int(qp, width, height, reinterpret_cast(input), in_stride, + reinterpret_cast(output), out_stride, row_bias, col_bias); + } else { + requantize_block_32_int(qp, width, height, reinterpret_cast(input), in_stride, + reinterpret_cast(output), out_stride, row_bias, col_bias); + } +} + +template void requantize_block_32(const ARequantizeLayer32 &qp, unsigned int width, unsigned int height, + const int32_t *input, unsigned int in_stride, int8_t *output, unsigned int out_stride, + const int32_t *row_bias, const int32_t *col_bias); + +template void requantize_block_32(const ARequantizeLayer32 &qp, unsigned int width, unsigned int height, + const uint32_t *input, unsigned int in_stride, uint8_t *output, unsigned int out_stride, + const int32_t *row_bias, const int32_t *col_bias); + +/* + * Routine (and helpers) to compute row sums needed for offset correction. + * + * This is often needed for a lot of short rows (e.g. Syrax 5 - 6400 rows + * of length 27), therefore it's important not to sacrifice performance on + * odd length rows. + * + * To minimize performance loss in these cases, this routine will overread + * by up to 7 bytes. + * + * This is handled via "mask" and "mask mode" parameters to the inner + * routines; mask mode == 1 indicates that are between 1 and 8 bytes + * (inclusive) needed at the end; in these cases we always read 8 bytes. + * mask mode == 2 indicates that there are between 9 and 15 bytes needed at + * the end, and in this case we always read 16 bytes. In both cases the + * 'mask' vector is set up so that the read value can be masked off to clear + * the overread lanes. This is handled by 'accumulate_masked_8' and + * 'accumulate_masked_16' above. + * + * This routine is templated on the type to be accumulated, because the + * innermost instruction used needs to be of the correct signedness. + * However, beyond this point we always use signed values in both cases. + * The instructions that need to be different are therefore wrapped in + * helper functions below. + */ + +namespace { + struct row_sum_helpers { + const ARequantizeLayer32 &qp; + + /* Load a full 16 byte vector, pairwise accumulate into 'sum' with uadalp or sadalp */ + template + inline int16x8_t accumulate_16(const T *ptr, int16x8_t sum); + + /* Load a full 16 byte vector, but mask before accumulation (see above). */ + template + inline int16x8_t accumulate_masked_16(const T *ptr, int16x8_t sum, uint64x2_t mask); + + /* Load 8 bytes and mask before accumulation. */ + template + inline int16x8_t accumulate_masked_8(const T *ptr, int16x8_t sum, uint64x2_t mask); + + /* This function does the actual work for up to 4 rows at a time. + * It's pulled out so we can template on the row count to generate + * the 4 different cases. 4 rows are computed at a time as this + * reduces to a single vector write. */ + template + void compute_some_rows(unsigned int blocks, const T *input, unsigned int in_stride, int32_t *row_bias, unsigned int mask_mode, uint64x2_t mask, int32x4_t offset_mul) { + int16x8_t sums[rows]; + int32x4_t finalsums[rows]; + + for (unsigned int i=0; i 0) { + for (unsigned int r=0; r + int16x8_t row_sum_helpers::accumulate_16(const uint8_t *ptr, int16x8_t sum) { + return vreinterpretq_s16_u16(vpadalq_u8(vreinterpretq_u16_s16(sum), vld1q_u8(ptr))); + } + + template<> + int16x8_t row_sum_helpers::accumulate_16(const int8_t *ptr, int16x8_t sum) { + return vpadalq_s8(sum, vld1q_s8(ptr)); + } + + template<> + int16x8_t row_sum_helpers::accumulate_masked_16(const int8_t *ptr, int16x8_t sum, uint64x2_t mask) { + int8x16_t v = vandq_s8(vld1q_s8(ptr), vreinterpretq_s8_u64(mask)); + return vpadalq_s8(sum, v); + } + + template<> + int16x8_t row_sum_helpers::accumulate_masked_16(const uint8_t *ptr, int16x8_t sum, uint64x2_t mask) { + uint8x16_t v = vandq_u8(vld1q_u8(ptr), vreinterpretq_u8_u64(mask)); + return vreinterpretq_s16_u16(vpadalq_u8(vreinterpretq_u16_s16(sum), v)); + } + + template<> + int16x8_t row_sum_helpers::accumulate_masked_8(const int8_t *ptr, int16x8_t sum, uint64x2_t mask) { + int8x16_t v = vcombine_s8(vld1_s8(ptr), vdup_n_s8(0)); + v = vreinterpretq_s8_u64(vandq_u64(mask, vreinterpretq_u64_s8(v))); + return vpadalq_s8(sum, v); + } + + template<> + int16x8_t row_sum_helpers::accumulate_masked_8(const uint8_t *ptr, int16x8_t sum, uint64x2_t mask) { + uint8x16_t v = vcombine_u8(vld1_u8(ptr), vdup_n_u8(0)); + v = vreinterpretq_u8_u64(vandq_u64(mask, vreinterpretq_u64_u8(v))); + return vreinterpretq_s16_u16(vpadalq_u8(vreinterpretq_u16_s16(sum), v)); + } +} + +template +void compute_row_sums(const ARequantizeLayer32 &qp, unsigned int width, unsigned int height, + const T *input, unsigned int in_stride, int32_t *row_bias) { + row_sum_helpers thehelpers(qp); + + const int32x4_t offset_mul = vdupq_n_s32(-qp.b_offset); + + /* Work out how many full vectors of 16 bytes we will read, and how many + * odd bytes at the end */ + unsigned int blocks = (width / 16); + const unsigned int odds = width % 16; + + /* Generate a mask to use on the last iteration, if necessary. */ + uint64x2_t mask; + unsigned int mask_mode = 0; + + if (odds > 0 && odds <= 8) { + /* 1-8 odds: mask in the low lane, 0 in the top */ + uint64_t maskval = (~0ULL) >> (8 * (8-odds)); + + mask = vsetq_lane_u64(maskval, vdupq_n_u64(0), 0); + + mask_mode = 1; + } else if (odds > 8) { + /* 9-15 odds: mask in the top lane, all 1s in the bottom. */ + uint64_t maskval = (~0ULL) >> (8 * (16-odds)); + + mask = vsetq_lane_u64(maskval, vdupq_n_u64(~0ULL), 1); + + mask_mode = 2; + } + + for (unsigned int row=0; row(blocks, input + (row * in_stride), in_stride, row_bias + row, mask_mode, mask, offset_mul); + break; + case 3: + thehelpers.compute_some_rows<3>(blocks, input + (row * in_stride), in_stride, row_bias + row, mask_mode, mask, offset_mul); + break; + case 2: + thehelpers.compute_some_rows<2>(blocks, input + (row * in_stride), in_stride, row_bias + row, mask_mode, mask, offset_mul); + break; + case 1: + thehelpers.compute_some_rows<1>(blocks, input + (row * in_stride), in_stride, row_bias + row, mask_mode, mask, offset_mul); + break; + } + } +} + +/* Instantiate the two versions for uint8_t and int8_t. */ +template void compute_row_sums(const ARequantizeLayer32 &, unsigned int, unsigned int, const int8_t *, unsigned int, int32_t *); +template void compute_row_sums(const ARequantizeLayer32 &, unsigned int, unsigned int, const uint8_t *, unsigned int, int32_t *); + +template +inline void add_block(const T *input, unsigned int in_stride, int32_t *output); + +template +inline void add_block(const uint8_t *input, unsigned int in_stride, int32_t *output) { + uint8x16_t inputs[4]; + + for (unsigned int i=0; i<4; i++) { + if (i < active_rows) { + inputs[i] = vld1q_u8(input + i * in_stride); + } else { + inputs[i] = vdupq_n_u8(0); + } + } + + int16x8_t sums_16b[4]; + + // Two adds for the low pairs + sums_16b[0]=vreinterpretq_s16_u16(vaddl_u8(vget_low_u8(inputs[0]), vget_low_u8(inputs[1]))); + sums_16b[1]=vreinterpretq_s16_u16(vaddl_u8(vget_low_u8(inputs[2]), vget_low_u8(inputs[3]))); + // Two adds for the high pairs + sums_16b[2]=vreinterpretq_s16_u16(vaddl_high_u8(inputs[0], inputs[1])); + sums_16b[3]=vreinterpretq_s16_u16(vaddl_high_u8(inputs[2], inputs[3])); + + int32x4_t sums_32b[4]; + + sums_32b[0]=vaddl_s16(vget_low_s16(sums_16b[0]), vget_low_s16(sums_16b[1])); + sums_32b[1]=vaddl_high_s16(sums_16b[0], sums_16b[1]); + sums_32b[2]=vaddl_s16(vget_low_s16(sums_16b[2]), vget_low_s16(sums_16b[3])); + sums_32b[3]=vaddl_high_s16(sums_16b[2], sums_16b[3]); + + for (unsigned int i=0; i<4; i++) { + vst1q_s32(output + 4*i, vaddq_s32(sums_32b[i], vld1q_s32(output + 4*i))); + } +} + +template +inline void add_block(const int8_t *input, unsigned int in_stride, int32_t *output) { + int8x16_t inputs[4]; + + for (unsigned int i=0; i<4; i++) { + if (i < active_rows) { + inputs[i] = vld1q_s8(input + i * in_stride); + } else { + inputs[i] = vdupq_n_s8(0); + } + } + + int16x8_t sums_16b[4]; + + // Two adds for the low pairs + sums_16b[0]=vaddl_s8(vget_low_s8(inputs[0]), vget_low_s8(inputs[1])); + sums_16b[1]=vaddl_s8(vget_low_s8(inputs[2]), vget_low_s8(inputs[3])); + // Two adds for the high pairs + sums_16b[2]=vaddl_high_s8(inputs[0], inputs[1]); + sums_16b[3]=vaddl_high_s8(inputs[2], inputs[3]); + + int32x4_t sums_32b[4]; + + sums_32b[0]=vaddl_s16(vget_low_s16(sums_16b[0]), vget_low_s16(sums_16b[1])); + sums_32b[1]=vaddl_high_s16(sums_16b[0], sums_16b[1]); + sums_32b[2]=vaddl_s16(vget_low_s16(sums_16b[2]), vget_low_s16(sums_16b[3])); + sums_32b[3]=vaddl_high_s16(sums_16b[2], sums_16b[3]); + + for (unsigned int i=0; i<4; i++) { + vst1q_s32(output + 4*i, vaddq_s32(sums_32b[i], vld1q_s32(output + 4*i))); + } +} + + +/* "first_col" parameter is used to offset the read into the qp.bias array, + * in cases where we are not computing the first columns of the output (i.e. + * in multithreaded cases where we divide columns across threads) */ +template +void compute_col_sums(const ARequantizeLayer32 &qp, unsigned int width, unsigned int height, const T *input, unsigned int in_stride, int32_t *col_bias, unsigned int depth, unsigned int first_col) { + memset(reinterpret_cast(col_bias), 0, width * sizeof(int32_t)); + + for (unsigned int row=0; row(input + row * in_stride + col, in_stride, col_bias + col); + break; + + case 2: + add_block<2>(input + row * in_stride + col, in_stride, col_bias + col); + break; + + case 3: + add_block<3>(input + row * in_stride + col, in_stride, col_bias + col); + break; + + case 4: + add_block<4>(input + row * in_stride + col, in_stride, col_bias + col); + break; + default: + break; + } + } else { + for (; col +void requantize_block_32(const ARequantizeLayer32 &qp, unsigned int width, unsigned int height, + const Tin *input, unsigned int in_stride, Tout *output, unsigned int out_stride, + const int32_t *row_bias, const int32_t *col_bias); + +template +void compute_row_sums(const ARequantizeLayer32 &qp, unsigned int width, unsigned int height, + const T *input, unsigned int in_stride, int32_t *row_bias); + +template +void compute_col_sums(const ARequantizeLayer32 &qp, unsigned int width, unsigned int height, + const T *input, unsigned int in_stride, int32_t *col_bias, unsigned int depth, + unsigned int first_col); + +} // namespace arm_gemm diff --git a/src/core/NEON/kernels/arm_gemm/std_transforms_fixed.hpp b/src/core/NEON/kernels/arm_gemm/std_transforms_fixed.hpp index 44124a7b41..2c661e7fa9 100644 --- a/src/core/NEON/kernels/arm_gemm/std_transforms_fixed.hpp +++ b/src/core/NEON/kernels/arm_gemm/std_transforms_fixed.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017-2018 ARM Limited. + * Copyright (c) 2017-2019 ARM Limited. * * SPDX-License-Identifier: MIT * @@ -23,6 +23,9 @@ */ #pragma once +#include "mergeresults.hpp" +#include "transform.hpp" + namespace arm_gemm { /* diff --git a/src/core/NEON/kernels/arm_gemm/transform.hpp b/src/core/NEON/kernels/arm_gemm/transform.hpp index 0330783a0b..d790d566b6 100644 --- a/src/core/NEON/kernels/arm_gemm/transform.hpp +++ b/src/core/NEON/kernels/arm_gemm/transform.hpp @@ -23,6 +23,10 @@ */ #pragma once +#include "utils.hpp" + +namespace arm_gemm { + /* * Generic transform. * @@ -80,6 +84,7 @@ struct TransformImpl { *out++ = static_cast(0); } } + // "row" tail - row is out of range so fill with zeros always. TOut zeroval = static_cast(0); int pads = blank_rows * (fill_cols + blank_cols); @@ -114,3 +119,5 @@ void Transform( /*****************************************************************************/ #include "transforms/list.hpp" + +} // namespace arm_gemm diff --git a/src/core/NEON/kernels/arm_gemm/transforms/a64_transpose_interleave_12way_half_to_float.hpp b/src/core/NEON/kernels/arm_gemm/transforms/a64_transpose_interleave_12way_half_to_float.hpp index 46b4bf5149..8992c1010d 100644 --- a/src/core/NEON/kernels/arm_gemm/transforms/a64_transpose_interleave_12way_half_to_float.hpp +++ b/src/core/NEON/kernels/arm_gemm/transforms/a64_transpose_interleave_12way_half_to_float.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017-2018 ARM Limited. + * Copyright (c) 2017-2019 ARM Limited. * * SPDX-License-Identifier: MIT * @@ -59,7 +59,7 @@ inline void TransposeInterleaveCommon<12, __fp16, float>::moveblock_1x2(const __ "FCVTL v3.4s, v3.4h\n" "STP q2, q3, [%[out], #32]\n" ASM_PREFETCH("[%[in1], #192]") - "LDR d5, [%[in1]], #16\n" + "LDR d5, [%[in1]], #8\n" "FCVTL v5.4s, v5.4h\n" "STP q4, q5, [%[out], #64]\n" : [in0] "+r" (in0), [in1] "+r" (in1), [out] "+r" (out) diff --git a/src/core/NEON/kernels/arm_gemm/transforms/a64_transpose_interleave_24way_16bit.hpp b/src/core/NEON/kernels/arm_gemm/transforms/a64_transpose_interleave_24way_16bit.hpp index 80420dd717..6d627334cd 100644 --- a/src/core/NEON/kernels/arm_gemm/transforms/a64_transpose_interleave_24way_16bit.hpp +++ b/src/core/NEON/kernels/arm_gemm/transforms/a64_transpose_interleave_24way_16bit.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017-2018 ARM Limited. + * Copyright (c) 2017-2019 ARM Limited. * * SPDX-License-Identifier: MIT * @@ -37,7 +37,7 @@ inline void TransformImpl<12, 1, true, 4, 4, false>::Transform( // Redirect to a 24 x uint16_t specialisation TransformImpl<24, 1, true, 2, 2, false>::Transform( reinterpret_cast(out), - reinterpret_cast(in), + reinterpret_cast(in), stride*2, x0*2, xmax*2, k0, kmax ); } @@ -52,7 +52,7 @@ inline void TransformImpl<24, 1, true, 2, 2, false>::Transform( // Redirect to a uint16_t specialisation Transform( reinterpret_cast(out), - reinterpret_cast(in), + reinterpret_cast(in), stride, x0, xmax, k0, kmax ); } diff --git a/src/core/NEON/kernels/arm_gemm/transforms/list.hpp b/src/core/NEON/kernels/arm_gemm/transforms/list.hpp index e1ebba077b..9cd5983ce0 100644 --- a/src/core/NEON/kernels/arm_gemm/transforms/list.hpp +++ b/src/core/NEON/kernels/arm_gemm/transforms/list.hpp @@ -31,6 +31,4 @@ #include "a64_transpose_interleave_12way_half_to_float.hpp" #include "a64_transpose_interleave_24way_16bit.hpp" #include "sve_interleave_8way_32bit.hpp" -#include "sve_interleave_8way_block2_32bit.hpp" #include "sve_interleave_8way_block4_8bit.hpp" -#include "transpose_interleave_common.hpp" \ No newline at end of file diff --git a/src/core/NEON/kernels/arm_gemm/transforms/sve_interleave_8way_32bit.hpp b/src/core/NEON/kernels/arm_gemm/transforms/sve_interleave_8way_32bit.hpp index 07c8219c1b..881dc7bb72 100644 --- a/src/core/NEON/kernels/arm_gemm/transforms/sve_interleave_8way_32bit.hpp +++ b/src/core/NEON/kernels/arm_gemm/transforms/sve_interleave_8way_32bit.hpp @@ -41,7 +41,7 @@ inline void TransformImpl<8, 1, false, 4, 4, false>::Transform(T *out, const T * long outpos = 0; uint32_t *outptr = master_outptr; - master_outptr += (outwidth * 1); + master_outptr += outwidth; const uint32_t *inptr0 = inptr + y * ldin + k0; const uint32_t *inptr1 = inptr0 + ldin; @@ -60,53 +60,52 @@ inline void TransformImpl<8, 1, false, 4, 4, false>::Transform(T *out, const T * "whilelt p0.s, %[inpos], %[inwidth]\n" "b.none 2f\n" "mov z4.s, #0\n" - "ld1w z0.s, p0/z, [%[inptr0]]\n" - "zip1 z8.s, z0.s, z4.s\n" + "ld1w z0.s, p0/z, [%[inptr0], %[inpos], LSL #2]\n" "incw %[inpos], all, mul #1\n" + "whilelt p0.s, %[outpos], %[outwidth]\n" + "incw %[outpos], all, mul #1\n" + "zip1 z8.s, z0.s, z4.s\n" "zip2 z9.s, z0.s, z4.s\n" - "addvl %[inptr0], %[inptr0], #1\n" + "whilelt p1.s, %[outpos], %[outwidth]\n" "zip1 z0.s, z8.s, z4.s\n" - "whilelt p0.s, %[outpos], %[outwidth]\n" - "zip2 z1.s, z8.s, z4.s\n" "incw %[outpos], all, mul #1\n" + "zip2 z1.s, z8.s, z4.s\n" "zip1 z2.s, z9.s, z4.s\n" - "whilelt p1.s, %[outpos], %[outwidth]\n" "zip2 z3.s, z9.s, z4.s\n" - "incw %[outpos], all, mul #1\n" + "whilelt p2.s, %[outpos], %[outwidth]\n" "zip1 z8.s, z0.s, z4.s\n" - "st1w z8.s, p0, [%[outptr]]\n" + "incw %[outpos], all, mul #1\n" "zip2 z9.s, z0.s, z4.s\n" - "st1w z9.s, p1, [%[outptr], #1, MUL VL]\n" "zip1 z10.s, z1.s, z4.s\n" - "whilelt p2.s, %[outpos], %[outwidth]\n" + "st1w z8.s, p0, [%[outptr]]\n" "zip2 z11.s, z1.s, z4.s\n" - "st1w z10.s, p2, [%[outptr], #2, MUL VL]\n" + "whilelt p3.s, %[outpos], %[outwidth]\n" "zip1 z12.s, z2.s, z4.s\n" - "incw %[outpos], all, mul #1\n" + "st1w z9.s, p1, [%[outptr], #1, MUL VL]\n" "zip2 z13.s, z2.s, z4.s\n" - "whilelt p3.s, %[outpos], %[outwidth]\n" + "incw %[outpos], all, mul #1\n" "zip1 z14.s, z3.s, z4.s\n" - "st1w z11.s, p3, [%[outptr], #3, MUL VL]\n" + "st1w z10.s, p2, [%[outptr], #2, MUL VL]\n" "zip2 z15.s, z3.s, z4.s\n" + "whilelt p4.s, %[outpos], %[outwidth]\n" + "st1w z11.s, p3, [%[outptr], #3, MUL VL]\n" "incw %[outpos], all, mul #1\n" - "whilelt p0.s, %[outpos], %[outwidth]\n" - "st1w z12.s, p0, [%[outptr], #4, MUL VL]\n" + "st1w z12.s, p4, [%[outptr], #4, MUL VL]\n" + "whilelt p5.s, %[outpos], %[outwidth]\n" "incw %[outpos], all, mul #1\n" - "whilelt p1.s, %[outpos], %[outwidth]\n" - "st1w z13.s, p1, [%[outptr], #5, MUL VL]\n" + "st1w z13.s, p5, [%[outptr], #5, MUL VL]\n" + "whilelt p6.s, %[outpos], %[outwidth]\n" "incw %[outpos], all, mul #1\n" - "whilelt p2.s, %[outpos], %[outwidth]\n" - "st1w z14.s, p2, [%[outptr], #6, MUL VL]\n" - "incw %[outpos], all, mul #1\n" - "whilelt p3.s, %[outpos], %[outwidth]\n" - "st1w z15.s, p3, [%[outptr], #7, MUL VL]\n" + "st1w z14.s, p6, [%[outptr], #6, MUL VL]\n" + "whilelt p7.s, %[outpos], %[outwidth]\n" "incw %[outpos], all, mul #1\n" + "st1w z15.s, p7, [%[outptr], #7, MUL VL]\n" "addvl %[outptr], %[outptr], #8\n" "b 1b\n" "2:\n" : [inpos] "+r" (inpos), [outpos] "+r" (outpos), [outptr] "+r" (outptr), [inptr0] "+r" (inptr0) : [outwidth] "r" (outwidth), [inwidth] "r" (inwidth) - : "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "cc", "memory" + : "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "cc", "memory" ); break; @@ -116,62 +115,60 @@ inline void TransformImpl<8, 1, false, 4, 4, false>::Transform(T *out, const T * "whilelt p0.s, %[inpos], %[inwidth]\n" "b.none 2f\n" "mov z4.s, #0\n" - "ld1w z0.s, p0/z, [%[inptr0]]\n" + "mov z14.s, #0\n" + "ld1w z0.s, p0/z, [%[inptr0], %[inpos], LSL #2]\n" + "ld1w z1.s, p0/z, [%[inptr1], %[inpos], LSL #2]\n" + "incw %[inpos], all, mul #1\n" + "whilelt p0.s, %[outpos], %[outwidth]\n" "zip1 z8.s, z0.s, z4.s\n" - "ld1w z1.s, p0/z, [%[inptr1]]\n" + "incw %[outpos], all, mul #1\n" "zip2 z9.s, z0.s, z4.s\n" - "incw %[inpos], all, mul #1\n" "zip1 z10.s, z1.s, z4.s\n" - "addvl %[inptr0], %[inptr0], #1\n" "zip2 z11.s, z1.s, z4.s\n" - "addvl %[inptr1], %[inptr1], #1\n" + "whilelt p1.s, %[outpos], %[outwidth]\n" "zip1 z0.s, z8.s, z4.s\n" - "whilelt p0.s, %[outpos], %[outwidth]\n" - "zip2 z1.s, z8.s, z4.s\n" "incw %[outpos], all, mul #1\n" + "zip2 z1.s, z8.s, z4.s\n" "zip1 z2.s, z9.s, z4.s\n" - "whilelt p1.s, %[outpos], %[outwidth]\n" "zip2 z3.s, z9.s, z4.s\n" - "incw %[outpos], all, mul #1\n" - "mov z14.s, #0\n" "whilelt p2.s, %[outpos], %[outwidth]\n" "zip1 z4.s, z10.s, z14.s\n" "incw %[outpos], all, mul #1\n" "zip2 z5.s, z10.s, z14.s\n" - "whilelt p3.s, %[outpos], %[outwidth]\n" "zip1 z6.s, z11.s, z14.s\n" - "incw %[outpos], all, mul #1\n" "zip2 z7.s, z11.s, z14.s\n" + "whilelt p3.s, %[outpos], %[outwidth]\n" "zip1 z8.s, z0.s, z4.s\n" - "st1w z8.s, p0, [%[outptr]]\n" + "incw %[outpos], all, mul #1\n" "zip2 z9.s, z0.s, z4.s\n" - "st1w z9.s, p1, [%[outptr], #1, MUL VL]\n" "zip1 z10.s, z1.s, z5.s\n" - "st1w z10.s, p2, [%[outptr], #2, MUL VL]\n" + "st1w z8.s, p0, [%[outptr]]\n" "zip2 z11.s, z1.s, z5.s\n" - "st1w z11.s, p3, [%[outptr], #3, MUL VL]\n" + "whilelt p4.s, %[outpos], %[outwidth]\n" "zip1 z12.s, z2.s, z6.s\n" - "whilelt p0.s, %[outpos], %[outwidth]\n" + "st1w z9.s, p1, [%[outptr], #1, MUL VL]\n" "zip2 z13.s, z2.s, z6.s\n" - "st1w z12.s, p0, [%[outptr], #4, MUL VL]\n" - "zip1 z14.s, z3.s, z7.s\n" "incw %[outpos], all, mul #1\n" + "zip1 z14.s, z3.s, z7.s\n" + "st1w z10.s, p2, [%[outptr], #2, MUL VL]\n" "zip2 z15.s, z3.s, z7.s\n" - "whilelt p1.s, %[outpos], %[outwidth]\n" - "st1w z13.s, p1, [%[outptr], #5, MUL VL]\n" + "whilelt p5.s, %[outpos], %[outwidth]\n" + "st1w z11.s, p3, [%[outptr], #3, MUL VL]\n" "incw %[outpos], all, mul #1\n" - "whilelt p2.s, %[outpos], %[outwidth]\n" - "st1w z14.s, p2, [%[outptr], #6, MUL VL]\n" + "st1w z12.s, p4, [%[outptr], #4, MUL VL]\n" + "whilelt p6.s, %[outpos], %[outwidth]\n" "incw %[outpos], all, mul #1\n" - "whilelt p3.s, %[outpos], %[outwidth]\n" - "st1w z15.s, p3, [%[outptr], #7, MUL VL]\n" + "st1w z13.s, p5, [%[outptr], #5, MUL VL]\n" + "whilelt p7.s, %[outpos], %[outwidth]\n" "incw %[outpos], all, mul #1\n" + "st1w z14.s, p6, [%[outptr], #6, MUL VL]\n" + "st1w z15.s, p7, [%[outptr], #7, MUL VL]\n" "addvl %[outptr], %[outptr], #8\n" "b 1b\n" "2:\n" : [inpos] "+r" (inpos), [outpos] "+r" (outpos), [outptr] "+r" (outptr), [inptr0] "+r" (inptr0), [inptr1] "+r" (inptr1) : [outwidth] "r" (outwidth), [inwidth] "r" (inwidth) - : "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "cc", "memory" + : "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "cc", "memory" ); break; @@ -181,66 +178,63 @@ inline void TransformImpl<8, 1, false, 4, 4, false>::Transform(T *out, const T * "whilelt p0.s, %[inpos], %[inwidth]\n" "b.none 2f\n" "mov z4.s, #0\n" - "ld1w z0.s, p0/z, [%[inptr0]]\n" + "mov z14.s, #0\n" + "ld1w z0.s, p0/z, [%[inptr0], %[inpos], LSL #2]\n" + "ld1w z1.s, p0/z, [%[inptr1], %[inpos], LSL #2]\n" + "ld1w z2.s, p0/z, [%[inptr2], %[inpos], LSL #2]\n" + "incw %[inpos], all, mul #1\n" "zip1 z8.s, z0.s, z4.s\n" - "ld1w z1.s, p0/z, [%[inptr1]]\n" + "whilelt p0.s, %[outpos], %[outwidth]\n" "zip2 z9.s, z0.s, z4.s\n" - "ld1w z2.s, p0/z, [%[inptr2]]\n" + "incw %[outpos], all, mul #1\n" "zip1 z10.s, z1.s, z4.s\n" - "incw %[inpos], all, mul #1\n" "zip2 z11.s, z1.s, z4.s\n" - "addvl %[inptr0], %[inptr0], #1\n" "zip1 z12.s, z2.s, z4.s\n" - "addvl %[inptr1], %[inptr1], #1\n" + "whilelt p1.s, %[outpos], %[outwidth]\n" "zip2 z13.s, z2.s, z4.s\n" - "addvl %[inptr2], %[inptr2], #1\n" + "incw %[outpos], all, mul #1\n" "zip1 z0.s, z8.s, z12.s\n" - "whilelt p0.s, %[outpos], %[outwidth]\n" "zip2 z1.s, z8.s, z12.s\n" - "incw %[outpos], all, mul #1\n" "zip1 z2.s, z9.s, z13.s\n" - "whilelt p1.s, %[outpos], %[outwidth]\n" + "whilelt p2.s, %[outpos], %[outwidth]\n" "zip2 z3.s, z9.s, z13.s\n" "incw %[outpos], all, mul #1\n" - "mov z14.s, #0\n" - "whilelt p2.s, %[outpos], %[outwidth]\n" "zip1 z4.s, z10.s, z14.s\n" - "incw %[outpos], all, mul #1\n" "zip2 z5.s, z10.s, z14.s\n" - "whilelt p3.s, %[outpos], %[outwidth]\n" "zip1 z6.s, z11.s, z14.s\n" - "incw %[outpos], all, mul #1\n" + "whilelt p3.s, %[outpos], %[outwidth]\n" "zip2 z7.s, z11.s, z14.s\n" + "incw %[outpos], all, mul #1\n" "zip1 z8.s, z0.s, z4.s\n" - "st1w z8.s, p0, [%[outptr]]\n" "zip2 z9.s, z0.s, z4.s\n" - "st1w z9.s, p1, [%[outptr], #1, MUL VL]\n" "zip1 z10.s, z1.s, z5.s\n" - "st1w z10.s, p2, [%[outptr], #2, MUL VL]\n" + "whilelt p4.s, %[outpos], %[outwidth]\n" "zip2 z11.s, z1.s, z5.s\n" - "st1w z11.s, p3, [%[outptr], #3, MUL VL]\n" + "st1w z8.s, p0, [%[outptr]]\n" "zip1 z12.s, z2.s, z6.s\n" - "whilelt p0.s, %[outpos], %[outwidth]\n" + "incw %[outpos], all, mul #1\n" "zip2 z13.s, z2.s, z6.s\n" - "st1w z12.s, p0, [%[outptr], #4, MUL VL]\n" + "st1w z9.s, p1, [%[outptr], #1, MUL VL]\n" "zip1 z14.s, z3.s, z7.s\n" - "incw %[outpos], all, mul #1\n" "zip2 z15.s, z3.s, z7.s\n" - "whilelt p1.s, %[outpos], %[outwidth]\n" - "st1w z13.s, p1, [%[outptr], #5, MUL VL]\n" + "whilelt p5.s, %[outpos], %[outwidth]\n" + "st1w z10.s, p2, [%[outptr], #2, MUL VL]\n" "incw %[outpos], all, mul #1\n" - "whilelt p2.s, %[outpos], %[outwidth]\n" - "st1w z14.s, p2, [%[outptr], #6, MUL VL]\n" + "st1w z11.s, p3, [%[outptr], #3, MUL VL]\n" + "whilelt p6.s, %[outpos], %[outwidth]\n" "incw %[outpos], all, mul #1\n" - "whilelt p3.s, %[outpos], %[outwidth]\n" - "st1w z15.s, p3, [%[outptr], #7, MUL VL]\n" + "st1w z12.s, p4, [%[outptr], #4, MUL VL]\n" + "whilelt p7.s, %[outpos], %[outwidth]\n" "incw %[outpos], all, mul #1\n" + "st1w z13.s, p5, [%[outptr], #5, MUL VL]\n" + "st1w z14.s, p6, [%[outptr], #6, MUL VL]\n" + "st1w z15.s, p7, [%[outptr], #7, MUL VL]\n" "addvl %[outptr], %[outptr], #8\n" "b 1b\n" "2:\n" : [inpos] "+r" (inpos), [outpos] "+r" (outpos), [outptr] "+r" (outptr), [inptr0] "+r" (inptr0), [inptr1] "+r" (inptr1), [inptr2] "+r" (inptr2) : [outwidth] "r" (outwidth), [inwidth] "r" (inwidth) - : "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "cc", "memory" + : "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "cc", "memory" ); break; @@ -250,69 +244,65 @@ inline void TransformImpl<8, 1, false, 4, 4, false>::Transform(T *out, const T * "whilelt p0.s, %[inpos], %[inwidth]\n" "b.none 2f\n" "mov z4.s, #0\n" - "ld1w z0.s, p0/z, [%[inptr0]]\n" + "ld1w z0.s, p0/z, [%[inptr0], %[inpos], LSL #2]\n" + "ld1w z1.s, p0/z, [%[inptr1], %[inpos], LSL #2]\n" + "ld1w z2.s, p0/z, [%[inptr2], %[inpos], LSL #2]\n" + "ld1w z3.s, p0/z, [%[inptr3], %[inpos], LSL #2]\n" + "incw %[inpos], all, mul #1\n" "zip1 z8.s, z0.s, z4.s\n" - "ld1w z1.s, p0/z, [%[inptr1]]\n" + "whilelt p0.s, %[outpos], %[outwidth]\n" "zip2 z9.s, z0.s, z4.s\n" - "ld1w z2.s, p0/z, [%[inptr2]]\n" + "incw %[outpos], all, mul #1\n" "zip1 z10.s, z1.s, z4.s\n" - "ld1w z3.s, p0/z, [%[inptr3]]\n" "zip2 z11.s, z1.s, z4.s\n" - "incw %[inpos], all, mul #1\n" "zip1 z12.s, z2.s, z4.s\n" - "addvl %[inptr0], %[inptr0], #1\n" + "whilelt p1.s, %[outpos], %[outwidth]\n" "zip2 z13.s, z2.s, z4.s\n" - "addvl %[inptr1], %[inptr1], #1\n" + "incw %[outpos], all, mul #1\n" "zip1 z14.s, z3.s, z4.s\n" - "addvl %[inptr2], %[inptr2], #1\n" "zip2 z15.s, z3.s, z4.s\n" - "addvl %[inptr3], %[inptr3], #1\n" "zip1 z0.s, z8.s, z12.s\n" - "whilelt p0.s, %[outpos], %[outwidth]\n" + "whilelt p2.s, %[outpos], %[outwidth]\n" "zip2 z1.s, z8.s, z12.s\n" "incw %[outpos], all, mul #1\n" "zip1 z2.s, z9.s, z13.s\n" - "whilelt p1.s, %[outpos], %[outwidth]\n" "zip2 z3.s, z9.s, z13.s\n" - "incw %[outpos], all, mul #1\n" "zip1 z4.s, z10.s, z14.s\n" - "whilelt p2.s, %[outpos], %[outwidth]\n" + "whilelt p3.s, %[outpos], %[outwidth]\n" "zip2 z5.s, z10.s, z14.s\n" "incw %[outpos], all, mul #1\n" "zip1 z6.s, z11.s, z15.s\n" - "whilelt p3.s, %[outpos], %[outwidth]\n" "zip2 z7.s, z11.s, z15.s\n" - "incw %[outpos], all, mul #1\n" "zip1 z8.s, z0.s, z4.s\n" - "st1w z8.s, p0, [%[outptr]]\n" + "whilelt p4.s, %[outpos], %[outwidth]\n" "zip2 z9.s, z0.s, z4.s\n" - "st1w z9.s, p1, [%[outptr], #1, MUL VL]\n" + "incw %[outpos], all, mul #1\n" "zip1 z10.s, z1.s, z5.s\n" - "st1w z10.s, p2, [%[outptr], #2, MUL VL]\n" + "st1w z8.s, p0, [%[outptr]]\n" "zip2 z11.s, z1.s, z5.s\n" - "st1w z11.s, p3, [%[outptr], #3, MUL VL]\n" "zip1 z12.s, z2.s, z6.s\n" - "whilelt p0.s, %[outpos], %[outwidth]\n" + "whilelt p5.s, %[outpos], %[outwidth]\n" "zip2 z13.s, z2.s, z6.s\n" - "st1w z12.s, p0, [%[outptr], #4, MUL VL]\n" + "st1w z9.s, p1, [%[outptr], #1, MUL VL]\n" "zip1 z14.s, z3.s, z7.s\n" "incw %[outpos], all, mul #1\n" "zip2 z15.s, z3.s, z7.s\n" - "whilelt p1.s, %[outpos], %[outwidth]\n" - "st1w z13.s, p1, [%[outptr], #5, MUL VL]\n" - "incw %[outpos], all, mul #1\n" - "whilelt p2.s, %[outpos], %[outwidth]\n" - "st1w z14.s, p2, [%[outptr], #6, MUL VL]\n" + "st1w z10.s, p2, [%[outptr], #2, MUL VL]\n" + "whilelt p6.s, %[outpos], %[outwidth]\n" + "st1w z11.s, p3, [%[outptr], #3, MUL VL]\n" "incw %[outpos], all, mul #1\n" - "whilelt p3.s, %[outpos], %[outwidth]\n" - "st1w z15.s, p3, [%[outptr], #7, MUL VL]\n" + "st1w z12.s, p4, [%[outptr], #4, MUL VL]\n" + "whilelt p7.s, %[outpos], %[outwidth]\n" "incw %[outpos], all, mul #1\n" + "st1w z13.s, p5, [%[outptr], #5, MUL VL]\n" + "st1w z14.s, p6, [%[outptr], #6, MUL VL]\n" + "st1w z15.s, p7, [%[outptr], #7, MUL VL]\n" "addvl %[outptr], %[outptr], #8\n" "b 1b\n" "2:\n" : [inpos] "+r" (inpos), [outpos] "+r" (outpos), [outptr] "+r" (outptr), [inptr0] "+r" (inptr0), [inptr1] "+r" (inptr1), [inptr2] "+r" (inptr2), [inptr3] "+r" (inptr3) : [outwidth] "r" (outwidth), [inwidth] "r" (inwidth) - : "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "cc", "memory" + : "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "cc", "memory" ); break; @@ -322,71 +312,66 @@ inline void TransformImpl<8, 1, false, 4, 4, false>::Transform(T *out, const T * "whilelt p0.s, %[inpos], %[inwidth]\n" "b.none 2f\n" "mov z5.s, #0\n" - "ld1w z0.s, p0/z, [%[inptr0]]\n" - "ld1w z1.s, p0/z, [%[inptr1]]\n" + "ld1w z0.s, p0/z, [%[inptr0], %[inpos], LSL #2]\n" + "ld1w z1.s, p0/z, [%[inptr1], %[inpos], LSL #2]\n" + "ld1w z2.s, p0/z, [%[inptr2], %[inpos], LSL #2]\n" + "ld1w z3.s, p0/z, [%[inptr3], %[inpos], LSL #2]\n" + "ld1w z4.s, p0/z, [%[inptr4], %[inpos], LSL #2]\n" "incw %[inpos], all, mul #1\n" "zip1 z10.s, z1.s, z5.s\n" - "ld1w z2.s, p0/z, [%[inptr2]]\n" - "zip2 z11.s, z1.s, z5.s\n" - "ld1w z3.s, p0/z, [%[inptr3]]\n" - "zip1 z12.s, z2.s, z5.s\n" - "ld1w z4.s, p0/z, [%[inptr4]]\n" + "whilelt p0.s, %[outpos], %[outwidth]\n" "zip1 z8.s, z0.s, z4.s\n" - "addvl %[inptr0], %[inptr0], #1\n" + "incw %[outpos], all, mul #1\n" "zip2 z9.s, z0.s, z4.s\n" - "addvl %[inptr1], %[inptr1], #1\n" + "zip2 z11.s, z1.s, z5.s\n" + "zip1 z12.s, z2.s, z5.s\n" + "whilelt p1.s, %[outpos], %[outwidth]\n" "zip2 z13.s, z2.s, z5.s\n" - "addvl %[inptr2], %[inptr2], #1\n" + "incw %[outpos], all, mul #1\n" "zip1 z14.s, z3.s, z5.s\n" - "addvl %[inptr3], %[inptr3], #1\n" "zip2 z15.s, z3.s, z5.s\n" - "addvl %[inptr4], %[inptr4], #1\n" "zip1 z0.s, z8.s, z12.s\n" - "whilelt p0.s, %[outpos], %[outwidth]\n" + "whilelt p2.s, %[outpos], %[outwidth]\n" "zip2 z1.s, z8.s, z12.s\n" "incw %[outpos], all, mul #1\n" "zip1 z2.s, z9.s, z13.s\n" - "whilelt p1.s, %[outpos], %[outwidth]\n" "zip2 z3.s, z9.s, z13.s\n" - "incw %[outpos], all, mul #1\n" "zip1 z4.s, z10.s, z14.s\n" - "whilelt p2.s, %[outpos], %[outwidth]\n" + "whilelt p3.s, %[outpos], %[outwidth]\n" "zip2 z5.s, z10.s, z14.s\n" "incw %[outpos], all, mul #1\n" "zip1 z6.s, z11.s, z15.s\n" - "whilelt p3.s, %[outpos], %[outwidth]\n" "zip2 z7.s, z11.s, z15.s\n" - "incw %[outpos], all, mul #1\n" "zip1 z8.s, z0.s, z4.s\n" - "st1w z8.s, p0, [%[outptr]]\n" + "whilelt p4.s, %[outpos], %[outwidth]\n" "zip2 z9.s, z0.s, z4.s\n" - "st1w z9.s, p1, [%[outptr], #1, MUL VL]\n" + "incw %[outpos], all, mul #1\n" "zip1 z10.s, z1.s, z5.s\n" - "st1w z10.s, p2, [%[outptr], #2, MUL VL]\n" + "st1w z8.s, p0, [%[outptr]]\n" "zip2 z11.s, z1.s, z5.s\n" - "st1w z11.s, p3, [%[outptr], #3, MUL VL]\n" "zip1 z12.s, z2.s, z6.s\n" - "whilelt p0.s, %[outpos], %[outwidth]\n" + "whilelt p5.s, %[outpos], %[outwidth]\n" "zip2 z13.s, z2.s, z6.s\n" - "st1w z12.s, p0, [%[outptr], #4, MUL VL]\n" + "st1w z9.s, p1, [%[outptr], #1, MUL VL]\n" "zip1 z14.s, z3.s, z7.s\n" "incw %[outpos], all, mul #1\n" "zip2 z15.s, z3.s, z7.s\n" - "whilelt p1.s, %[outpos], %[outwidth]\n" - "st1w z13.s, p1, [%[outptr], #5, MUL VL]\n" - "incw %[outpos], all, mul #1\n" - "whilelt p2.s, %[outpos], %[outwidth]\n" - "st1w z14.s, p2, [%[outptr], #6, MUL VL]\n" + "st1w z10.s, p2, [%[outptr], #2, MUL VL]\n" + "whilelt p6.s, %[outpos], %[outwidth]\n" + "st1w z11.s, p3, [%[outptr], #3, MUL VL]\n" "incw %[outpos], all, mul #1\n" - "whilelt p3.s, %[outpos], %[outwidth]\n" - "st1w z15.s, p3, [%[outptr], #7, MUL VL]\n" + "st1w z12.s, p4, [%[outptr], #4, MUL VL]\n" + "whilelt p7.s, %[outpos], %[outwidth]\n" "incw %[outpos], all, mul #1\n" + "st1w z13.s, p5, [%[outptr], #5, MUL VL]\n" + "st1w z14.s, p6, [%[outptr], #6, MUL VL]\n" + "st1w z15.s, p7, [%[outptr], #7, MUL VL]\n" "addvl %[outptr], %[outptr], #8\n" "b 1b\n" "2:\n" : [inpos] "+r" (inpos), [outpos] "+r" (outpos), [outptr] "+r" (outptr), [inptr0] "+r" (inptr0), [inptr1] "+r" (inptr1), [inptr2] "+r" (inptr2), [inptr3] "+r" (inptr3), [inptr4] "+r" (inptr4) : [outwidth] "r" (outwidth), [inwidth] "r" (inwidth) - : "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "cc", "memory" + : "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "cc", "memory" ); break; @@ -396,73 +381,67 @@ inline void TransformImpl<8, 1, false, 4, 4, false>::Transform(T *out, const T * "whilelt p0.s, %[inpos], %[inwidth]\n" "b.none 2f\n" "mov z6.s, #0\n" - "ld1w z0.s, p0/z, [%[inptr0]]\n" - "ld1w z1.s, p0/z, [%[inptr1]]\n" + "ld1w z0.s, p0/z, [%[inptr0], %[inpos], LSL #2]\n" + "ld1w z1.s, p0/z, [%[inptr1], %[inpos], LSL #2]\n" + "ld1w z2.s, p0/z, [%[inptr2], %[inpos], LSL #2]\n" + "ld1w z3.s, p0/z, [%[inptr3], %[inpos], LSL #2]\n" + "ld1w z4.s, p0/z, [%[inptr4], %[inpos], LSL #2]\n" + "ld1w z5.s, p0/z, [%[inptr5], %[inpos], LSL #2]\n" "incw %[inpos], all, mul #1\n" - "ld1w z2.s, p0/z, [%[inptr2]]\n" - "addvl %[inptr0], %[inptr0], #1\n" "zip1 z12.s, z2.s, z6.s\n" - "ld1w z3.s, p0/z, [%[inptr3]]\n" - "zip2 z13.s, z2.s, z6.s\n" - "ld1w z4.s, p0/z, [%[inptr4]]\n" + "whilelt p0.s, %[outpos], %[outwidth]\n" "zip1 z8.s, z0.s, z4.s\n" - "ld1w z5.s, p0/z, [%[inptr5]]\n" + "incw %[outpos], all, mul #1\n" "zip2 z9.s, z0.s, z4.s\n" - "addvl %[inptr1], %[inptr1], #1\n" "zip1 z10.s, z1.s, z5.s\n" - "addvl %[inptr2], %[inptr2], #1\n" "zip2 z11.s, z1.s, z5.s\n" - "addvl %[inptr3], %[inptr3], #1\n" + "whilelt p1.s, %[outpos], %[outwidth]\n" + "zip2 z13.s, z2.s, z6.s\n" + "incw %[outpos], all, mul #1\n" "zip1 z14.s, z3.s, z6.s\n" - "addvl %[inptr4], %[inptr4], #1\n" "zip2 z15.s, z3.s, z6.s\n" - "addvl %[inptr5], %[inptr5], #1\n" "zip1 z0.s, z8.s, z12.s\n" - "whilelt p0.s, %[outpos], %[outwidth]\n" + "whilelt p2.s, %[outpos], %[outwidth]\n" "zip2 z1.s, z8.s, z12.s\n" "incw %[outpos], all, mul #1\n" "zip1 z2.s, z9.s, z13.s\n" - "whilelt p1.s, %[outpos], %[outwidth]\n" "zip2 z3.s, z9.s, z13.s\n" - "incw %[outpos], all, mul #1\n" "zip1 z4.s, z10.s, z14.s\n" - "whilelt p2.s, %[outpos], %[outwidth]\n" + "whilelt p3.s, %[outpos], %[outwidth]\n" "zip2 z5.s, z10.s, z14.s\n" "incw %[outpos], all, mul #1\n" "zip1 z6.s, z11.s, z15.s\n" - "whilelt p3.s, %[outpos], %[outwidth]\n" "zip2 z7.s, z11.s, z15.s\n" - "incw %[outpos], all, mul #1\n" "zip1 z8.s, z0.s, z4.s\n" - "st1w z8.s, p0, [%[outptr]]\n" + "whilelt p4.s, %[outpos], %[outwidth]\n" "zip2 z9.s, z0.s, z4.s\n" - "st1w z9.s, p1, [%[outptr], #1, MUL VL]\n" + "incw %[outpos], all, mul #1\n" "zip1 z10.s, z1.s, z5.s\n" - "st1w z10.s, p2, [%[outptr], #2, MUL VL]\n" + "st1w z8.s, p0, [%[outptr]]\n" "zip2 z11.s, z1.s, z5.s\n" - "st1w z11.s, p3, [%[outptr], #3, MUL VL]\n" "zip1 z12.s, z2.s, z6.s\n" - "whilelt p0.s, %[outpos], %[outwidth]\n" + "whilelt p5.s, %[outpos], %[outwidth]\n" "zip2 z13.s, z2.s, z6.s\n" - "st1w z12.s, p0, [%[outptr], #4, MUL VL]\n" + "st1w z9.s, p1, [%[outptr], #1, MUL VL]\n" "zip1 z14.s, z3.s, z7.s\n" "incw %[outpos], all, mul #1\n" "zip2 z15.s, z3.s, z7.s\n" - "whilelt p1.s, %[outpos], %[outwidth]\n" - "st1w z13.s, p1, [%[outptr], #5, MUL VL]\n" - "incw %[outpos], all, mul #1\n" - "whilelt p2.s, %[outpos], %[outwidth]\n" - "st1w z14.s, p2, [%[outptr], #6, MUL VL]\n" + "st1w z10.s, p2, [%[outptr], #2, MUL VL]\n" + "whilelt p6.s, %[outpos], %[outwidth]\n" + "st1w z11.s, p3, [%[outptr], #3, MUL VL]\n" "incw %[outpos], all, mul #1\n" - "whilelt p3.s, %[outpos], %[outwidth]\n" - "st1w z15.s, p3, [%[outptr], #7, MUL VL]\n" + "st1w z12.s, p4, [%[outptr], #4, MUL VL]\n" + "whilelt p7.s, %[outpos], %[outwidth]\n" "incw %[outpos], all, mul #1\n" + "st1w z13.s, p5, [%[outptr], #5, MUL VL]\n" + "st1w z14.s, p6, [%[outptr], #6, MUL VL]\n" + "st1w z15.s, p7, [%[outptr], #7, MUL VL]\n" "addvl %[outptr], %[outptr], #8\n" "b 1b\n" "2:\n" : [inpos] "+r" (inpos), [outpos] "+r" (outpos), [outptr] "+r" (outptr), [inptr0] "+r" (inptr0), [inptr1] "+r" (inptr1), [inptr2] "+r" (inptr2), [inptr3] "+r" (inptr3), [inptr4] "+r" (inptr4), [inptr5] "+r" (inptr5) : [outwidth] "r" (outwidth), [inwidth] "r" (inwidth) - : "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "cc", "memory" + : "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "cc", "memory" ); break; @@ -472,75 +451,68 @@ inline void TransformImpl<8, 1, false, 4, 4, false>::Transform(T *out, const T * "whilelt p0.s, %[inpos], %[inwidth]\n" "b.none 2f\n" "mov z7.s, #0\n" - "ld1w z0.s, p0/z, [%[inptr0]]\n" - "ld1w z1.s, p0/z, [%[inptr1]]\n" + "ld1w z0.s, p0/z, [%[inptr0], %[inpos], LSL #2]\n" + "ld1w z1.s, p0/z, [%[inptr1], %[inpos], LSL #2]\n" + "ld1w z2.s, p0/z, [%[inptr2], %[inpos], LSL #2]\n" + "ld1w z3.s, p0/z, [%[inptr3], %[inpos], LSL #2]\n" + "ld1w z4.s, p0/z, [%[inptr4], %[inpos], LSL #2]\n" + "ld1w z5.s, p0/z, [%[inptr5], %[inpos], LSL #2]\n" + "ld1w z6.s, p0/z, [%[inptr6], %[inpos], LSL #2]\n" "incw %[inpos], all, mul #1\n" - "ld1w z2.s, p0/z, [%[inptr2]]\n" - "addvl %[inptr0], %[inptr0], #1\n" - "ld1w z3.s, p0/z, [%[inptr3]]\n" - "addvl %[inptr1], %[inptr1], #1\n" - "zip1 z14.s, z3.s, z7.s\n" - "ld1w z4.s, p0/z, [%[inptr4]]\n" "zip1 z8.s, z0.s, z4.s\n" - "ld1w z5.s, p0/z, [%[inptr5]]\n" + "whilelt p0.s, %[outpos], %[outwidth]\n" "zip2 z9.s, z0.s, z4.s\n" - "ld1w z6.s, p0/z, [%[inptr6]]\n" + "incw %[outpos], all, mul #1\n" "zip1 z10.s, z1.s, z5.s\n" - "addvl %[inptr2], %[inptr2], #1\n" "zip2 z11.s, z1.s, z5.s\n" - "addvl %[inptr3], %[inptr3], #1\n" "zip1 z12.s, z2.s, z6.s\n" - "addvl %[inptr4], %[inptr4], #1\n" + "whilelt p1.s, %[outpos], %[outwidth]\n" "zip2 z13.s, z2.s, z6.s\n" - "addvl %[inptr5], %[inptr5], #1\n" + "incw %[outpos], all, mul #1\n" + "zip1 z14.s, z3.s, z7.s\n" "zip2 z15.s, z3.s, z7.s\n" - "addvl %[inptr6], %[inptr6], #1\n" "zip1 z0.s, z8.s, z12.s\n" - "whilelt p0.s, %[outpos], %[outwidth]\n" + "whilelt p2.s, %[outpos], %[outwidth]\n" "zip2 z1.s, z8.s, z12.s\n" "incw %[outpos], all, mul #1\n" "zip1 z2.s, z9.s, z13.s\n" - "whilelt p1.s, %[outpos], %[outwidth]\n" "zip2 z3.s, z9.s, z13.s\n" - "incw %[outpos], all, mul #1\n" "zip1 z4.s, z10.s, z14.s\n" - "whilelt p2.s, %[outpos], %[outwidth]\n" + "whilelt p3.s, %[outpos], %[outwidth]\n" "zip2 z5.s, z10.s, z14.s\n" "incw %[outpos], all, mul #1\n" "zip1 z6.s, z11.s, z15.s\n" - "whilelt p3.s, %[outpos], %[outwidth]\n" "zip2 z7.s, z11.s, z15.s\n" - "incw %[outpos], all, mul #1\n" "zip1 z8.s, z0.s, z4.s\n" - "st1w z8.s, p0, [%[outptr]]\n" + "whilelt p4.s, %[outpos], %[outwidth]\n" "zip2 z9.s, z0.s, z4.s\n" - "st1w z9.s, p1, [%[outptr], #1, MUL VL]\n" + "incw %[outpos], all, mul #1\n" "zip1 z10.s, z1.s, z5.s\n" - "st1w z10.s, p2, [%[outptr], #2, MUL VL]\n" + "st1w z8.s, p0, [%[outptr]]\n" "zip2 z11.s, z1.s, z5.s\n" - "st1w z11.s, p3, [%[outptr], #3, MUL VL]\n" "zip1 z12.s, z2.s, z6.s\n" - "whilelt p0.s, %[outpos], %[outwidth]\n" + "whilelt p5.s, %[outpos], %[outwidth]\n" "zip2 z13.s, z2.s, z6.s\n" - "st1w z12.s, p0, [%[outptr], #4, MUL VL]\n" + "st1w z9.s, p1, [%[outptr], #1, MUL VL]\n" "zip1 z14.s, z3.s, z7.s\n" "incw %[outpos], all, mul #1\n" "zip2 z15.s, z3.s, z7.s\n" - "whilelt p1.s, %[outpos], %[outwidth]\n" - "st1w z13.s, p1, [%[outptr], #5, MUL VL]\n" - "incw %[outpos], all, mul #1\n" - "whilelt p2.s, %[outpos], %[outwidth]\n" - "st1w z14.s, p2, [%[outptr], #6, MUL VL]\n" + "st1w z10.s, p2, [%[outptr], #2, MUL VL]\n" + "whilelt p6.s, %[outpos], %[outwidth]\n" + "st1w z11.s, p3, [%[outptr], #3, MUL VL]\n" "incw %[outpos], all, mul #1\n" - "whilelt p3.s, %[outpos], %[outwidth]\n" - "st1w z15.s, p3, [%[outptr], #7, MUL VL]\n" + "st1w z12.s, p4, [%[outptr], #4, MUL VL]\n" + "whilelt p7.s, %[outpos], %[outwidth]\n" "incw %[outpos], all, mul #1\n" + "st1w z13.s, p5, [%[outptr], #5, MUL VL]\n" + "st1w z14.s, p6, [%[outptr], #6, MUL VL]\n" + "st1w z15.s, p7, [%[outptr], #7, MUL VL]\n" "addvl %[outptr], %[outptr], #8\n" "b 1b\n" "2:\n" : [inpos] "+r" (inpos), [outpos] "+r" (outpos), [outptr] "+r" (outptr), [inptr0] "+r" (inptr0), [inptr1] "+r" (inptr1), [inptr2] "+r" (inptr2), [inptr3] "+r" (inptr3), [inptr4] "+r" (inptr4), [inptr5] "+r" (inptr5), [inptr6] "+r" (inptr6) : [outwidth] "r" (outwidth), [inwidth] "r" (inwidth) - : "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "cc", "memory" + : "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "cc", "memory" ); break; @@ -550,77 +522,69 @@ inline void TransformImpl<8, 1, false, 4, 4, false>::Transform(T *out, const T * "1:\n" "whilelt p0.s, %[inpos], %[inwidth]\n" "b.none 2f\n" - "ld1w z0.s, p0/z, [%[inptr0]]\n" + "ld1w z0.s, p0/z, [%[inptr0], %[inpos], LSL #2]\n" + "ld1w z1.s, p0/z, [%[inptr1], %[inpos], LSL #2]\n" + "ld1w z2.s, p0/z, [%[inptr2], %[inpos], LSL #2]\n" + "ld1w z3.s, p0/z, [%[inptr3], %[inpos], LSL #2]\n" + "ld1w z4.s, p0/z, [%[inptr4], %[inpos], LSL #2]\n" + "ld1w z5.s, p0/z, [%[inptr5], %[inpos], LSL #2]\n" + "ld1w z6.s, p0/z, [%[inptr6], %[inpos], LSL #2]\n" + "ld1w z7.s, p0/z, [%[inptr7], %[inpos], LSL #2]\n" "incw %[inpos], all, mul #1\n" - "ld1w z1.s, p0/z, [%[inptr1]]\n" - "addvl %[inptr0], %[inptr0], #1\n" - "ld1w z2.s, p0/z, [%[inptr2]]\n" - "addvl %[inptr1], %[inptr1], #1\n" - "ld1w z3.s, p0/z, [%[inptr3]]\n" - "addvl %[inptr2], %[inptr2], #1\n" - "ld1w z4.s, p0/z, [%[inptr4]]\n" - "addvl %[inptr3], %[inptr3], #1\n" "zip1 z8.s, z0.s, z4.s\n" - "ld1w z5.s, p0/z, [%[inptr5]]\n" + "whilelt p0.s, %[outpos], %[outwidth]\n" "zip2 z9.s, z0.s, z4.s\n" - "ld1w z6.s, p0/z, [%[inptr6]]\n" + "incw %[outpos], all, mul #1\n" "zip1 z10.s, z1.s, z5.s\n" - "ld1w z7.s, p0/z, [%[inptr7]]\n" "zip2 z11.s, z1.s, z5.s\n" - "addvl %[inptr4], %[inptr4], #1\n" "zip1 z12.s, z2.s, z6.s\n" - "addvl %[inptr5], %[inptr5], #1\n" + "whilelt p1.s, %[outpos], %[outwidth]\n" "zip2 z13.s, z2.s, z6.s\n" - "addvl %[inptr6], %[inptr6], #1\n" + "incw %[outpos], all, mul #1\n" "zip1 z14.s, z3.s, z7.s\n" - "addvl %[inptr7], %[inptr7], #1\n" "zip2 z15.s, z3.s, z7.s\n" - "whilelt p0.s, %[outpos], %[outwidth]\n" "zip1 z0.s, z8.s, z12.s\n" - "incw %[outpos], all, mul #1\n" + "whilelt p2.s, %[outpos], %[outwidth]\n" "zip2 z1.s, z8.s, z12.s\n" - "whilelt p1.s, %[outpos], %[outwidth]\n" - "zip1 z2.s, z9.s, z13.s\n" "incw %[outpos], all, mul #1\n" + "zip1 z2.s, z9.s, z13.s\n" "zip2 z3.s, z9.s, z13.s\n" - "whilelt p2.s, %[outpos], %[outwidth]\n" "zip1 z4.s, z10.s, z14.s\n" - "incw %[outpos], all, mul #1\n" - "zip2 z5.s, z10.s, z14.s\n" "whilelt p3.s, %[outpos], %[outwidth]\n" - "zip1 z6.s, z11.s, z15.s\n" + "zip2 z5.s, z10.s, z14.s\n" "incw %[outpos], all, mul #1\n" + "zip1 z6.s, z11.s, z15.s\n" "zip2 z7.s, z11.s, z15.s\n" "zip1 z8.s, z0.s, z4.s\n" - "st1w z8.s, p0, [%[outptr]]\n" + "whilelt p4.s, %[outpos], %[outwidth]\n" "zip2 z9.s, z0.s, z4.s\n" - "st1w z9.s, p1, [%[outptr], #1, MUL VL]\n" + "incw %[outpos], all, mul #1\n" "zip1 z10.s, z1.s, z5.s\n" - "st1w z10.s, p2, [%[outptr], #2, MUL VL]\n" + "st1w z8.s, p0, [%[outptr]]\n" "zip2 z11.s, z1.s, z5.s\n" - "st1w z11.s, p3, [%[outptr], #3, MUL VL]\n" "zip1 z12.s, z2.s, z6.s\n" - "whilelt p0.s, %[outpos], %[outwidth]\n" + "whilelt p5.s, %[outpos], %[outwidth]\n" "zip2 z13.s, z2.s, z6.s\n" - "st1w z12.s, p0, [%[outptr], #4, MUL VL]\n" + "st1w z9.s, p1, [%[outptr], #1, MUL VL]\n" "zip1 z14.s, z3.s, z7.s\n" "incw %[outpos], all, mul #1\n" "zip2 z15.s, z3.s, z7.s\n" - "whilelt p1.s, %[outpos], %[outwidth]\n" - "st1w z13.s, p1, [%[outptr], #5, MUL VL]\n" - "incw %[outpos], all, mul #1\n" - "whilelt p2.s, %[outpos], %[outwidth]\n" - "st1w z14.s, p2, [%[outptr], #6, MUL VL]\n" + "st1w z10.s, p2, [%[outptr], #2, MUL VL]\n" + "whilelt p6.s, %[outpos], %[outwidth]\n" + "st1w z11.s, p3, [%[outptr], #3, MUL VL]\n" "incw %[outpos], all, mul #1\n" - "whilelt p3.s, %[outpos], %[outwidth]\n" - "st1w z15.s, p3, [%[outptr], #7, MUL VL]\n" + "st1w z12.s, p4, [%[outptr], #4, MUL VL]\n" + "whilelt p7.s, %[outpos], %[outwidth]\n" "incw %[outpos], all, mul #1\n" + "st1w z13.s, p5, [%[outptr], #5, MUL VL]\n" + "st1w z14.s, p6, [%[outptr], #6, MUL VL]\n" + "st1w z15.s, p7, [%[outptr], #7, MUL VL]\n" "addvl %[outptr], %[outptr], #8\n" "b 1b\n" "2:\n" : [inpos] "+r" (inpos), [outpos] "+r" (outpos), [outptr] "+r" (outptr), [inptr0] "+r" (inptr0), [inptr1] "+r" (inptr1), [inptr2] "+r" (inptr2), [inptr3] "+r" (inptr3), [inptr4] "+r" (inptr4), [inptr5] "+r" (inptr5), [inptr6] "+r" (inptr6), [inptr7] "+r" (inptr7) : [outwidth] "r" (outwidth), [inwidth] "r" (inwidth) - : "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "cc", "memory" + : "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "cc", "memory" ); break; diff --git a/src/core/NEON/kernels/arm_gemm/transforms/sve_interleave_8way_block4_8bit.hpp b/src/core/NEON/kernels/arm_gemm/transforms/sve_interleave_8way_block4_8bit.hpp index f1690baf43..a96a43cbeb 100644 --- a/src/core/NEON/kernels/arm_gemm/transforms/sve_interleave_8way_block4_8bit.hpp +++ b/src/core/NEON/kernels/arm_gemm/transforms/sve_interleave_8way_block4_8bit.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018 Arm Limited. + * Copyright (c) 2018 - 2019 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -67,8 +67,8 @@ inline void TransformImpl<8, 4, false, 1, 1, false>::Transform(T *out, const T * "zip1 z8.s, z0.s, z4.s\n" "zip2 z9.s, z0.s, z4.s\n" "whilelt p1.b, %[outpos], %[outwidth]\n" - "incb %[outpos], all, mul #1\n" "zip1 z0.s, z8.s, z4.s\n" + "incb %[outpos], all, mul #1\n" "zip2 z1.s, z8.s, z4.s\n" "zip1 z2.s, z9.s, z4.s\n" "zip2 z3.s, z9.s, z4.s\n" @@ -77,28 +77,28 @@ inline void TransformImpl<8, 4, false, 1, 1, false>::Transform(T *out, const T * "incb %[outpos], all, mul #1\n" "zip2 z9.s, z0.s, z4.s\n" "zip1 z10.s, z1.s, z4.s\n" - "zip2 z11.s, z1.s, z4.s\n" "st1b z8.b, p0, [%[outptr]]\n" - "zip1 z12.s, z2.s, z4.s\n" + "zip2 z11.s, z1.s, z4.s\n" "whilelt p3.b, %[outpos], %[outwidth]\n" + "zip1 z12.s, z2.s, z4.s\n" + "st1b z9.b, p1, [%[outptr], #1, MUL VL]\n" "zip2 z13.s, z2.s, z4.s\n" "incb %[outpos], all, mul #1\n" "zip1 z14.s, z3.s, z4.s\n" - "st1b z9.b, p1, [%[outptr], #1, MUL VL]\n" + "st1b z10.b, p2, [%[outptr], #2, MUL VL]\n" "zip2 z15.s, z3.s, z4.s\n" "whilelt p4.b, %[outpos], %[outwidth]\n" - "st1b z10.b, p2, [%[outptr], #2, MUL VL]\n" - "incb %[outpos], all, mul #1\n" "st1b z11.b, p3, [%[outptr], #3, MUL VL]\n" - "whilelt p5.b, %[outpos], %[outwidth]\n" "incb %[outpos], all, mul #1\n" "st1b z12.b, p4, [%[outptr], #4, MUL VL]\n" - "whilelt p6.b, %[outpos], %[outwidth]\n" + "whilelt p5.b, %[outpos], %[outwidth]\n" "incb %[outpos], all, mul #1\n" "st1b z13.b, p5, [%[outptr], #5, MUL VL]\n" - "whilelt p7.b, %[outpos], %[outwidth]\n" + "whilelt p6.b, %[outpos], %[outwidth]\n" "incb %[outpos], all, mul #1\n" "st1b z14.b, p6, [%[outptr], #6, MUL VL]\n" + "whilelt p7.b, %[outpos], %[outwidth]\n" + "incb %[outpos], all, mul #1\n" "st1b z15.b, p7, [%[outptr], #7, MUL VL]\n" "addvl %[outptr], %[outptr], #8\n" "b 1b\n" @@ -120,8 +120,8 @@ inline void TransformImpl<8, 4, false, 1, 1, false>::Transform(T *out, const T * "ld1b z1.b, p0/z, [%[inptr1], %[inpos]]\n" "incb %[inpos], all, mul #1\n" "whilelt p0.b, %[outpos], %[outwidth]\n" - "incb %[outpos], all, mul #1\n" "zip1 z8.s, z0.s, z4.s\n" + "incb %[outpos], all, mul #1\n" "zip2 z9.s, z0.s, z4.s\n" "zip1 z10.s, z1.s, z4.s\n" "zip2 z11.s, z1.s, z4.s\n" @@ -131,36 +131,36 @@ inline void TransformImpl<8, 4, false, 1, 1, false>::Transform(T *out, const T * "zip2 z1.s, z8.s, z4.s\n" "zip1 z2.s, z9.s, z4.s\n" "zip2 z3.s, z9.s, z4.s\n" - "zip1 z4.s, z10.s, z14.s\n" "whilelt p2.b, %[outpos], %[outwidth]\n" - "zip2 z5.s, z10.s, z14.s\n" + "zip1 z4.s, z10.s, z14.s\n" "incb %[outpos], all, mul #1\n" + "zip2 z5.s, z10.s, z14.s\n" "zip1 z6.s, z11.s, z14.s\n" "zip2 z7.s, z11.s, z14.s\n" + "whilelt p3.b, %[outpos], %[outwidth]\n" "zip1 z8.s, z0.s, z4.s\n" + "incb %[outpos], all, mul #1\n" "zip2 z9.s, z0.s, z4.s\n" - "whilelt p3.b, %[outpos], %[outwidth]\n" "zip1 z10.s, z1.s, z5.s\n" - "incb %[outpos], all, mul #1\n" - "zip2 z11.s, z1.s, z5.s\n" "st1b z8.b, p0, [%[outptr]]\n" - "zip1 z12.s, z2.s, z6.s\n" - "zip2 z13.s, z2.s, z6.s\n" - "zip1 z14.s, z3.s, z7.s\n" + "zip2 z11.s, z1.s, z5.s\n" "whilelt p4.b, %[outpos], %[outwidth]\n" - "zip2 z15.s, z3.s, z7.s\n" + "zip1 z12.s, z2.s, z6.s\n" "st1b z9.b, p1, [%[outptr], #1, MUL VL]\n" + "zip2 z13.s, z2.s, z6.s\n" "incb %[outpos], all, mul #1\n" + "zip1 z14.s, z3.s, z7.s\n" "st1b z10.b, p2, [%[outptr], #2, MUL VL]\n" + "zip2 z15.s, z3.s, z7.s\n" "whilelt p5.b, %[outpos], %[outwidth]\n" - "incb %[outpos], all, mul #1\n" "st1b z11.b, p3, [%[outptr], #3, MUL VL]\n" - "whilelt p6.b, %[outpos], %[outwidth]\n" "incb %[outpos], all, mul #1\n" "st1b z12.b, p4, [%[outptr], #4, MUL VL]\n" - "whilelt p7.b, %[outpos], %[outwidth]\n" + "whilelt p6.b, %[outpos], %[outwidth]\n" "incb %[outpos], all, mul #1\n" "st1b z13.b, p5, [%[outptr], #5, MUL VL]\n" + "whilelt p7.b, %[outpos], %[outwidth]\n" + "incb %[outpos], all, mul #1\n" "st1b z14.b, p6, [%[outptr], #6, MUL VL]\n" "st1b z15.b, p7, [%[outptr], #7, MUL VL]\n" "addvl %[outptr], %[outptr], #8\n" @@ -183,50 +183,50 @@ inline void TransformImpl<8, 4, false, 1, 1, false>::Transform(T *out, const T * "ld1b z1.b, p0/z, [%[inptr1], %[inpos]]\n" "ld1b z2.b, p0/z, [%[inptr2], %[inpos]]\n" "incb %[inpos], all, mul #1\n" - "whilelt p0.b, %[outpos], %[outwidth]\n" "zip1 z8.s, z0.s, z4.s\n" - "incb %[outpos], all, mul #1\n" + "whilelt p0.b, %[outpos], %[outwidth]\n" "zip2 z9.s, z0.s, z4.s\n" + "incb %[outpos], all, mul #1\n" "zip1 z10.s, z1.s, z4.s\n" "zip2 z11.s, z1.s, z4.s\n" "zip1 z12.s, z2.s, z4.s\n" "whilelt p1.b, %[outpos], %[outwidth]\n" "zip2 z13.s, z2.s, z4.s\n" "incb %[outpos], all, mul #1\n" - "zip1 z4.s, z10.s, z14.s\n" "zip1 z0.s, z8.s, z12.s\n" "zip2 z1.s, z8.s, z12.s\n" "zip1 z2.s, z9.s, z13.s\n" "whilelt p2.b, %[outpos], %[outwidth]\n" "zip2 z3.s, z9.s, z13.s\n" "incb %[outpos], all, mul #1\n" + "zip1 z4.s, z10.s, z14.s\n" "zip2 z5.s, z10.s, z14.s\n" "zip1 z6.s, z11.s, z14.s\n" + "whilelt p3.b, %[outpos], %[outwidth]\n" "zip2 z7.s, z11.s, z14.s\n" + "incb %[outpos], all, mul #1\n" "zip1 z8.s, z0.s, z4.s\n" - "whilelt p3.b, %[outpos], %[outwidth]\n" "zip2 z9.s, z0.s, z4.s\n" - "incb %[outpos], all, mul #1\n" "zip1 z10.s, z1.s, z5.s\n" - "st1b z8.b, p0, [%[outptr]]\n" + "whilelt p4.b, %[outpos], %[outwidth]\n" "zip2 z11.s, z1.s, z5.s\n" + "st1b z8.b, p0, [%[outptr]]\n" "zip1 z12.s, z2.s, z6.s\n" + "incb %[outpos], all, mul #1\n" "zip2 z13.s, z2.s, z6.s\n" - "whilelt p4.b, %[outpos], %[outwidth]\n" - "zip1 z14.s, z3.s, z7.s\n" "st1b z9.b, p1, [%[outptr], #1, MUL VL]\n" + "zip1 z14.s, z3.s, z7.s\n" "zip2 z15.s, z3.s, z7.s\n" - "incb %[outpos], all, mul #1\n" - "st1b z10.b, p2, [%[outptr], #2, MUL VL]\n" "whilelt p5.b, %[outpos], %[outwidth]\n" + "st1b z10.b, p2, [%[outptr], #2, MUL VL]\n" "incb %[outpos], all, mul #1\n" "st1b z11.b, p3, [%[outptr], #3, MUL VL]\n" "whilelt p6.b, %[outpos], %[outwidth]\n" "incb %[outpos], all, mul #1\n" "st1b z12.b, p4, [%[outptr], #4, MUL VL]\n" "whilelt p7.b, %[outpos], %[outwidth]\n" - "st1b z13.b, p5, [%[outptr], #5, MUL VL]\n" "incb %[outpos], all, mul #1\n" + "st1b z13.b, p5, [%[outptr], #5, MUL VL]\n" "st1b z14.b, p6, [%[outptr], #6, MUL VL]\n" "st1b z15.b, p7, [%[outptr], #7, MUL VL]\n" "addvl %[outptr], %[outptr], #8\n" @@ -256,40 +256,40 @@ inline void TransformImpl<8, 4, false, 1, 1, false>::Transform(T *out, const T * "zip1 z10.s, z1.s, z4.s\n" "zip2 z11.s, z1.s, z4.s\n" "zip1 z12.s, z2.s, z4.s\n" - "zip2 z13.s, z2.s, z4.s\n" "whilelt p1.b, %[outpos], %[outwidth]\n" - "zip1 z14.s, z3.s, z4.s\n" + "zip2 z13.s, z2.s, z4.s\n" "incb %[outpos], all, mul #1\n" + "zip1 z14.s, z3.s, z4.s\n" "zip2 z15.s, z3.s, z4.s\n" "zip1 z0.s, z8.s, z12.s\n" + "whilelt p2.b, %[outpos], %[outwidth]\n" "zip2 z1.s, z8.s, z12.s\n" + "incb %[outpos], all, mul #1\n" "zip1 z2.s, z9.s, z13.s\n" - "whilelt p2.b, %[outpos], %[outwidth]\n" "zip2 z3.s, z9.s, z13.s\n" - "incb %[outpos], all, mul #1\n" "zip1 z4.s, z10.s, z14.s\n" + "whilelt p3.b, %[outpos], %[outwidth]\n" "zip2 z5.s, z10.s, z14.s\n" + "incb %[outpos], all, mul #1\n" "zip1 z6.s, z11.s, z15.s\n" "zip2 z7.s, z11.s, z15.s\n" - "whilelt p3.b, %[outpos], %[outwidth]\n" "zip1 z8.s, z0.s, z4.s\n" - "incb %[outpos], all, mul #1\n" + "whilelt p4.b, %[outpos], %[outwidth]\n" "zip2 z9.s, z0.s, z4.s\n" + "incb %[outpos], all, mul #1\n" "zip1 z10.s, z1.s, z5.s\n" - "zip2 z11.s, z1.s, z5.s\n" "st1b z8.b, p0, [%[outptr]]\n" + "zip2 z11.s, z1.s, z5.s\n" "zip1 z12.s, z2.s, z6.s\n" - "whilelt p4.b, %[outpos], %[outwidth]\n" + "whilelt p5.b, %[outpos], %[outwidth]\n" "zip2 z13.s, z2.s, z6.s\n" - "incb %[outpos], all, mul #1\n" - "zip1 z14.s, z3.s, z7.s\n" "st1b z9.b, p1, [%[outptr], #1, MUL VL]\n" + "zip1 z14.s, z3.s, z7.s\n" + "incb %[outpos], all, mul #1\n" "zip2 z15.s, z3.s, z7.s\n" - "whilelt p5.b, %[outpos], %[outwidth]\n" "st1b z10.b, p2, [%[outptr], #2, MUL VL]\n" - "incb %[outpos], all, mul #1\n" - "st1b z11.b, p3, [%[outptr], #3, MUL VL]\n" "whilelt p6.b, %[outpos], %[outwidth]\n" + "st1b z11.b, p3, [%[outptr], #3, MUL VL]\n" "incb %[outpos], all, mul #1\n" "st1b z12.b, p4, [%[outptr], #4, MUL VL]\n" "whilelt p7.b, %[outpos], %[outwidth]\n" @@ -320,45 +320,45 @@ inline void TransformImpl<8, 4, false, 1, 1, false>::Transform(T *out, const T * "incb %[inpos], all, mul #1\n" "zip1 z10.s, z1.s, z5.s\n" "whilelt p0.b, %[outpos], %[outwidth]\n" - "zip2 z11.s, z1.s, z5.s\n" - "incb %[outpos], all, mul #1\n" "zip1 z8.s, z0.s, z4.s\n" + "incb %[outpos], all, mul #1\n" "zip2 z9.s, z0.s, z4.s\n" + "zip2 z11.s, z1.s, z5.s\n" "zip1 z12.s, z2.s, z5.s\n" - "zip2 z13.s, z2.s, z5.s\n" "whilelt p1.b, %[outpos], %[outwidth]\n" - "zip1 z14.s, z3.s, z5.s\n" + "zip2 z13.s, z2.s, z5.s\n" "incb %[outpos], all, mul #1\n" + "zip1 z14.s, z3.s, z5.s\n" "zip2 z15.s, z3.s, z5.s\n" "zip1 z0.s, z8.s, z12.s\n" + "whilelt p2.b, %[outpos], %[outwidth]\n" "zip2 z1.s, z8.s, z12.s\n" + "incb %[outpos], all, mul #1\n" "zip1 z2.s, z9.s, z13.s\n" - "whilelt p2.b, %[outpos], %[outwidth]\n" "zip2 z3.s, z9.s, z13.s\n" - "incb %[outpos], all, mul #1\n" "zip1 z4.s, z10.s, z14.s\n" + "whilelt p3.b, %[outpos], %[outwidth]\n" "zip2 z5.s, z10.s, z14.s\n" + "incb %[outpos], all, mul #1\n" "zip1 z6.s, z11.s, z15.s\n" "zip2 z7.s, z11.s, z15.s\n" - "whilelt p3.b, %[outpos], %[outwidth]\n" "zip1 z8.s, z0.s, z4.s\n" - "incb %[outpos], all, mul #1\n" + "whilelt p4.b, %[outpos], %[outwidth]\n" "zip2 z9.s, z0.s, z4.s\n" + "incb %[outpos], all, mul #1\n" "zip1 z10.s, z1.s, z5.s\n" - "zip2 z11.s, z1.s, z5.s\n" "st1b z8.b, p0, [%[outptr]]\n" + "zip2 z11.s, z1.s, z5.s\n" "zip1 z12.s, z2.s, z6.s\n" - "whilelt p4.b, %[outpos], %[outwidth]\n" + "whilelt p5.b, %[outpos], %[outwidth]\n" "zip2 z13.s, z2.s, z6.s\n" - "incb %[outpos], all, mul #1\n" - "zip1 z14.s, z3.s, z7.s\n" "st1b z9.b, p1, [%[outptr], #1, MUL VL]\n" + "zip1 z14.s, z3.s, z7.s\n" + "incb %[outpos], all, mul #1\n" "zip2 z15.s, z3.s, z7.s\n" - "whilelt p5.b, %[outpos], %[outwidth]\n" "st1b z10.b, p2, [%[outptr], #2, MUL VL]\n" - "incb %[outpos], all, mul #1\n" - "st1b z11.b, p3, [%[outptr], #3, MUL VL]\n" "whilelt p6.b, %[outpos], %[outwidth]\n" + "st1b z11.b, p3, [%[outptr], #3, MUL VL]\n" "incb %[outpos], all, mul #1\n" "st1b z12.b, p4, [%[outptr], #4, MUL VL]\n" "whilelt p7.b, %[outpos], %[outwidth]\n" @@ -395,40 +395,40 @@ inline void TransformImpl<8, 4, false, 1, 1, false>::Transform(T *out, const T * "zip2 z9.s, z0.s, z4.s\n" "zip1 z10.s, z1.s, z5.s\n" "zip2 z11.s, z1.s, z5.s\n" - "zip2 z13.s, z2.s, z6.s\n" "whilelt p1.b, %[outpos], %[outwidth]\n" - "zip1 z14.s, z3.s, z6.s\n" + "zip2 z13.s, z2.s, z6.s\n" "incb %[outpos], all, mul #1\n" + "zip1 z14.s, z3.s, z6.s\n" "zip2 z15.s, z3.s, z6.s\n" "zip1 z0.s, z8.s, z12.s\n" + "whilelt p2.b, %[outpos], %[outwidth]\n" "zip2 z1.s, z8.s, z12.s\n" + "incb %[outpos], all, mul #1\n" "zip1 z2.s, z9.s, z13.s\n" - "whilelt p2.b, %[outpos], %[outwidth]\n" "zip2 z3.s, z9.s, z13.s\n" - "incb %[outpos], all, mul #1\n" "zip1 z4.s, z10.s, z14.s\n" + "whilelt p3.b, %[outpos], %[outwidth]\n" "zip2 z5.s, z10.s, z14.s\n" + "incb %[outpos], all, mul #1\n" "zip1 z6.s, z11.s, z15.s\n" "zip2 z7.s, z11.s, z15.s\n" - "whilelt p3.b, %[outpos], %[outwidth]\n" "zip1 z8.s, z0.s, z4.s\n" - "incb %[outpos], all, mul #1\n" + "whilelt p4.b, %[outpos], %[outwidth]\n" "zip2 z9.s, z0.s, z4.s\n" + "incb %[outpos], all, mul #1\n" "zip1 z10.s, z1.s, z5.s\n" - "zip2 z11.s, z1.s, z5.s\n" "st1b z8.b, p0, [%[outptr]]\n" + "zip2 z11.s, z1.s, z5.s\n" "zip1 z12.s, z2.s, z6.s\n" - "whilelt p4.b, %[outpos], %[outwidth]\n" + "whilelt p5.b, %[outpos], %[outwidth]\n" "zip2 z13.s, z2.s, z6.s\n" - "incb %[outpos], all, mul #1\n" - "zip1 z14.s, z3.s, z7.s\n" "st1b z9.b, p1, [%[outptr], #1, MUL VL]\n" + "zip1 z14.s, z3.s, z7.s\n" + "incb %[outpos], all, mul #1\n" "zip2 z15.s, z3.s, z7.s\n" - "whilelt p5.b, %[outpos], %[outwidth]\n" "st1b z10.b, p2, [%[outptr], #2, MUL VL]\n" - "incb %[outpos], all, mul #1\n" - "st1b z11.b, p3, [%[outptr], #3, MUL VL]\n" "whilelt p6.b, %[outpos], %[outwidth]\n" + "st1b z11.b, p3, [%[outptr], #3, MUL VL]\n" "incb %[outpos], all, mul #1\n" "st1b z12.b, p4, [%[outptr], #4, MUL VL]\n" "whilelt p7.b, %[outpos], %[outwidth]\n" @@ -459,47 +459,47 @@ inline void TransformImpl<8, 4, false, 1, 1, false>::Transform(T *out, const T * "ld1b z5.b, p0/z, [%[inptr5], %[inpos]]\n" "ld1b z6.b, p0/z, [%[inptr6], %[inpos]]\n" "incb %[inpos], all, mul #1\n" - "zip1 z14.s, z3.s, z7.s\n" - "whilelt p0.b, %[outpos], %[outwidth]\n" "zip1 z8.s, z0.s, z4.s\n" - "incb %[outpos], all, mul #1\n" + "whilelt p0.b, %[outpos], %[outwidth]\n" "zip2 z9.s, z0.s, z4.s\n" + "incb %[outpos], all, mul #1\n" "zip1 z10.s, z1.s, z5.s\n" "zip2 z11.s, z1.s, z5.s\n" "zip1 z12.s, z2.s, z6.s\n" "whilelt p1.b, %[outpos], %[outwidth]\n" "zip2 z13.s, z2.s, z6.s\n" "incb %[outpos], all, mul #1\n" + "zip1 z14.s, z3.s, z7.s\n" "zip2 z15.s, z3.s, z7.s\n" "zip1 z0.s, z8.s, z12.s\n" + "whilelt p2.b, %[outpos], %[outwidth]\n" "zip2 z1.s, z8.s, z12.s\n" + "incb %[outpos], all, mul #1\n" "zip1 z2.s, z9.s, z13.s\n" - "whilelt p2.b, %[outpos], %[outwidth]\n" "zip2 z3.s, z9.s, z13.s\n" - "incb %[outpos], all, mul #1\n" "zip1 z4.s, z10.s, z14.s\n" + "whilelt p3.b, %[outpos], %[outwidth]\n" "zip2 z5.s, z10.s, z14.s\n" + "incb %[outpos], all, mul #1\n" "zip1 z6.s, z11.s, z15.s\n" "zip2 z7.s, z11.s, z15.s\n" - "whilelt p3.b, %[outpos], %[outwidth]\n" "zip1 z8.s, z0.s, z4.s\n" - "incb %[outpos], all, mul #1\n" + "whilelt p4.b, %[outpos], %[outwidth]\n" "zip2 z9.s, z0.s, z4.s\n" + "incb %[outpos], all, mul #1\n" "zip1 z10.s, z1.s, z5.s\n" - "zip2 z11.s, z1.s, z5.s\n" "st1b z8.b, p0, [%[outptr]]\n" + "zip2 z11.s, z1.s, z5.s\n" "zip1 z12.s, z2.s, z6.s\n" - "whilelt p4.b, %[outpos], %[outwidth]\n" + "whilelt p5.b, %[outpos], %[outwidth]\n" "zip2 z13.s, z2.s, z6.s\n" - "incb %[outpos], all, mul #1\n" - "zip1 z14.s, z3.s, z7.s\n" "st1b z9.b, p1, [%[outptr], #1, MUL VL]\n" + "zip1 z14.s, z3.s, z7.s\n" + "incb %[outpos], all, mul #1\n" "zip2 z15.s, z3.s, z7.s\n" - "whilelt p5.b, %[outpos], %[outwidth]\n" "st1b z10.b, p2, [%[outptr], #2, MUL VL]\n" - "incb %[outpos], all, mul #1\n" - "st1b z11.b, p3, [%[outptr], #3, MUL VL]\n" "whilelt p6.b, %[outpos], %[outwidth]\n" + "st1b z11.b, p3, [%[outptr], #3, MUL VL]\n" "incb %[outpos], all, mul #1\n" "st1b z12.b, p4, [%[outptr], #4, MUL VL]\n" "whilelt p7.b, %[outpos], %[outwidth]\n" @@ -538,40 +538,40 @@ inline void TransformImpl<8, 4, false, 1, 1, false>::Transform(T *out, const T * "zip1 z10.s, z1.s, z5.s\n" "zip2 z11.s, z1.s, z5.s\n" "zip1 z12.s, z2.s, z6.s\n" - "zip2 z13.s, z2.s, z6.s\n" "whilelt p1.b, %[outpos], %[outwidth]\n" - "zip1 z14.s, z3.s, z7.s\n" + "zip2 z13.s, z2.s, z6.s\n" "incb %[outpos], all, mul #1\n" + "zip1 z14.s, z3.s, z7.s\n" "zip2 z15.s, z3.s, z7.s\n" "zip1 z0.s, z8.s, z12.s\n" + "whilelt p2.b, %[outpos], %[outwidth]\n" "zip2 z1.s, z8.s, z12.s\n" + "incb %[outpos], all, mul #1\n" "zip1 z2.s, z9.s, z13.s\n" - "whilelt p2.b, %[outpos], %[outwidth]\n" "zip2 z3.s, z9.s, z13.s\n" - "incb %[outpos], all, mul #1\n" "zip1 z4.s, z10.s, z14.s\n" + "whilelt p3.b, %[outpos], %[outwidth]\n" "zip2 z5.s, z10.s, z14.s\n" + "incb %[outpos], all, mul #1\n" "zip1 z6.s, z11.s, z15.s\n" "zip2 z7.s, z11.s, z15.s\n" - "whilelt p3.b, %[outpos], %[outwidth]\n" "zip1 z8.s, z0.s, z4.s\n" - "incb %[outpos], all, mul #1\n" + "whilelt p4.b, %[outpos], %[outwidth]\n" "zip2 z9.s, z0.s, z4.s\n" + "incb %[outpos], all, mul #1\n" "zip1 z10.s, z1.s, z5.s\n" - "zip2 z11.s, z1.s, z5.s\n" "st1b z8.b, p0, [%[outptr]]\n" + "zip2 z11.s, z1.s, z5.s\n" "zip1 z12.s, z2.s, z6.s\n" - "whilelt p4.b, %[outpos], %[outwidth]\n" + "whilelt p5.b, %[outpos], %[outwidth]\n" "zip2 z13.s, z2.s, z6.s\n" - "incb %[outpos], all, mul #1\n" - "zip1 z14.s, z3.s, z7.s\n" "st1b z9.b, p1, [%[outptr], #1, MUL VL]\n" + "zip1 z14.s, z3.s, z7.s\n" + "incb %[outpos], all, mul #1\n" "zip2 z15.s, z3.s, z7.s\n" - "whilelt p5.b, %[outpos], %[outwidth]\n" "st1b z10.b, p2, [%[outptr], #2, MUL VL]\n" - "incb %[outpos], all, mul #1\n" - "st1b z11.b, p3, [%[outptr], #3, MUL VL]\n" "whilelt p6.b, %[outpos], %[outwidth]\n" + "st1b z11.b, p3, [%[outptr], #3, MUL VL]\n" "incb %[outpos], all, mul #1\n" "st1b z12.b, p4, [%[outptr], #4, MUL VL]\n" "whilelt p7.b, %[outpos], %[outwidth]\n" diff --git a/src/core/NEON/kernels/arm_gemm/utils.hpp b/src/core/NEON/kernels/arm_gemm/utils.hpp index f0707800cf..4271997cdd 100644 --- a/src/core/NEON/kernels/arm_gemm/utils.hpp +++ b/src/core/NEON/kernels/arm_gemm/utils.hpp @@ -87,4 +87,4 @@ inline unsigned long get_vector_length() { } // utils namespace } // arm_gemm namespace -using namespace arm_gemm::utils; \ No newline at end of file +using namespace arm_gemm::utils; diff --git a/src/runtime/NEON/functions/NEGEMM.cpp b/src/runtime/NEON/functions/NEGEMM.cpp index 2f36397c8e..37d0e09fc9 100644 --- a/src/runtime/NEON/functions/NEGEMM.cpp +++ b/src/runtime/NEON/functions/NEGEMM.cpp @@ -58,7 +58,7 @@ void NEGEMM::configure(const ITensor *a, const ITensor *b, const ITensor *c, ITe _run_vector_matrix_multiplication = a->info()->dimension(1) < 2; _original_b = b; - bool run_optimised = c == nullptr && bool(NEGEMMAssemblyDispatch::validate(a->info(), b->info(), d->info(), alpha, beta, gemm_info)); + bool run_optimised = c == nullptr && bool(NEGEMMAssemblyDispatch::validate(a->info(), b->info(), c != nullptr ? c->info() : nullptr, d->info(), alpha, beta, gemm_info)); if(run_optimised) { @@ -66,11 +66,11 @@ void NEGEMM::configure(const ITensor *a, const ITensor *b, const ITensor *c, ITe { GEMMInfo gemm_info_ntb = gemm_info; gemm_info_ntb.set_pretranpose_B(false); - _asm_glue.configure(a, b, d, alpha, beta, gemm_info_ntb); + _asm_glue.configure(a, b, c, d, alpha, beta, gemm_info_ntb); } else { - _asm_glue.configure(a, b, d, alpha, beta, gemm_info); + _asm_glue.configure(a, b, c, d, alpha, beta, gemm_info); } ARM_COMPUTE_ERROR_ON(!_asm_glue.is_configured()); } @@ -178,7 +178,7 @@ Status NEGEMM::validate(const ITensorInfo *a, const ITensorInfo *b, const ITenso } // Check if we need to run the optimized assembly kernel - const bool run_optimised = c == nullptr && bool(NEGEMMAssemblyDispatch::validate(a, b, output, alpha, beta, gemm_info)); + const bool run_optimised = c == nullptr && bool(NEGEMMAssemblyDispatch::validate(a, b, c, output, alpha, beta, gemm_info)); if(!run_optimised) { diff --git a/src/runtime/NEON/functions/NEGEMMAssemblyDispatch.cpp b/src/runtime/NEON/functions/NEGEMMAssemblyDispatch.cpp index 2de7d2b279..2a4498b0a9 100644 --- a/src/runtime/NEON/functions/NEGEMMAssemblyDispatch.cpp +++ b/src/runtime/NEON/functions/NEGEMMAssemblyDispatch.cpp @@ -74,7 +74,7 @@ std::unique_ptr create_function_all_types(const arm_gemm::KernelDescr } /** Fallback in case ACL doesn't have a function */ -template +template class Fallback : public NEGEMMAssemblyDispatch::IFallback { public: @@ -82,13 +82,16 @@ public: * * @param[in] a Input tensor containing the Matrix A. * @param[in] b Input tensor containing the Matrix B. + * @param[in] c Input tensor containing the Matrix C. * @param[out] d Output tensor to store the result of matrix multiplication. * @param[in] args Matrix multiplication information. * @param[in] gemm_info GEMM meta-data * @param[in] memory_group Memory group to be used by the function. + * @param[in] os Output stage meta-data. */ - void configure(const ITensor *a, const ITensor *b, ITensor *d, arm_gemm::GemmArgs args, - const GEMMInfo &gemm_info, MemoryGroup &memory_group); + void configure(const ITensor *a, const ITensor *b, const ITensor *c, ITensor *d, + arm_gemm::GemmArgs args, const GEMMInfo &gemm_info, + MemoryGroup &memory_group, const OutputStage &os = {}); // Inherited methods overridden: void run() override; @@ -118,6 +121,10 @@ private: { nullptr }; + const ITensor *_c + { + nullptr + }; /** Output */ ITensor *_d{ nullptr }; /** GEMM workspace */ @@ -130,18 +137,19 @@ private: GEMMInfo _gemm_info{}; }; -template -void Fallback::configure(const ITensor *a, const ITensor *b, ITensor *d, arm_gemm::GemmArgs args, - const GEMMInfo &gemm_info, MemoryGroup &memory_group) +template +void Fallback::configure(const ITensor *a, const ITensor *b, const ITensor *c, ITensor *d, + arm_gemm::GemmArgs args, const GEMMInfo &gemm_info, + MemoryGroup &memory_group, const OutputStage &os) { arm_gemm::GemmConfig gemm_cfg; - const arm_gemm::KernelDescription gemm_kernel_info = arm_gemm::get_gemm_method(args); + const arm_gemm::KernelDescription gemm_kernel_info = arm_gemm::get_gemm_method(args, os); if(gemm_kernel_info.method != arm_gemm::GemmMethod::GEMV_BATCHED) { gemm_cfg.filter = gemm_kernel_info.name; args._cfg = &gemm_cfg; } - _gemm_kernel_asm = arm_gemm::gemm(args); + _gemm_kernel_asm = arm_gemm::gemm(args, os); if(_gemm_kernel_asm == nullptr) { //configuration not supported: Leave function unconfigured: @@ -173,6 +181,7 @@ void Fallback::configure(const ITensor *a, const ITensor _optimised_kernel = std::move(acl_gemm_wrapper); _a = a; _b = b; + _c = c; _d = d; _gemm_info = gemm_info; // Check for pre-transposed support @@ -185,11 +194,17 @@ void Fallback::configure(const ITensor *a, const ITensor } } -template -void Fallback::prepare() +template +void Fallback::prepare() { if(!_is_prepared) { + // Setup up matrix bias in the assembly kernel, it's just a pointer to matrix C. + if(_c && _c->info()->data_type() == DataType::S32) + { + _gemm_kernel_asm->set_quantized_bias(reinterpret_cast(_c->buffer() + _c->info()->offset_first_element_in_bytes())); + } + // Pretranspose B if required if(_gemm_kernel_asm->B_pretranspose_required()) { @@ -207,8 +222,8 @@ void Fallback::prepare() } } -template -void Fallback::allocate_workspace(size_t workspace_size, MemoryGroup &memory_group, size_t alignment) +template +void Fallback::allocate_workspace(size_t workspace_size, MemoryGroup &memory_group, size_t alignment) { ARM_COMPUTE_ERROR_ON_MSG(workspace_size == 0, "size cannot be 0"); _workspace.allocator()->init(TensorInfo(TensorShape{ (workspace_size + alignment /* FIXME: remove alignment after COMPMID-1088 */) }, 1, DataType::S8), alignment); @@ -216,14 +231,14 @@ void Fallback::allocate_workspace(size_t workspace_size, _workspace.allocator()->allocate(); } -template -bool Fallback::is_configured() const +template +bool Fallback::is_configured() const { return _optimised_kernel != nullptr; } -template -void Fallback::run() +template +void Fallback::run() { const int lda = _a->info()->strides_in_bytes().y() / sizeof(TypeInput); int ldb = 0; @@ -277,10 +292,8 @@ void Fallback::run() } template -void create_function_or_arm_gemm(std::unique_ptr &acl_function, - std::unique_ptr &arm_gemm, - MemoryGroup &memory_group, const ITensor *a, const ITensor *b, - ITensor *d, float alpha, float beta, const GEMMInfo &gemm_info, +void create_function_or_arm_gemm(std::unique_ptr &acl_function, std::unique_ptr &arm_gemm, MemoryGroup &memory_group, + const ITensor *a, const ITensor *b, const ITensor *c, ITensor *d, float alpha, float beta, const GEMMInfo &gemm_info, std::shared_ptr memory_manager) { INEGEMMWrapperKernel::Params p = INEGEMMWrapperKernel::extract_parameters(a, b, d, gemm_info); @@ -289,15 +302,51 @@ void create_function_or_arm_gemm(std::unique_ptr arm_gemm::GemmArgs args(&ci, p.M, p.N, p.K, p.batches, p.multis, false, false, alpha, beta, num_threads, gemm_info.pretranpose_B()); - //Try to create an ACL function: - acl_function = create_function_all_types(arm_gemm::get_gemm_method(args), a, b, d, alpha, beta, gemm_info, std::move(memory_manager)); + // Try to create an ACL function: + const arm_gemm::KernelDescription gemm_kernel_info = arm_gemm::get_gemm_method(args); + acl_function = create_function_all_types(gemm_kernel_info, a, b, d, alpha, beta, gemm_info, std::move(memory_manager)); - //If we still don't have an ACL function: + // If we still don't have an ACL function: if(acl_function == nullptr) { //Fallback onto arm_gemm function if ACL doesn't support this method. auto fallback = support::cpp14::make_unique>(); - fallback->configure(a, b, d, args, gemm_info, memory_group); + fallback->configure(a, b, c, d, args, gemm_info, memory_group); + arm_gemm = std::move(fallback); + } +} + +template +void create_function_or_arm_gemm_quant(std::unique_ptr &acl_function, std::unique_ptr &arm_gemm, MemoryGroup &memory_group, + const ITensor *a, const ITensor *b, const ITensor *c, ITensor *d, float alpha, float beta, const GEMMInfo &gemm_info, + std::shared_ptr memory_manager) +{ + INEGEMMWrapperKernel::Params p = INEGEMMWrapperKernel::extract_parameters(a, b, d, gemm_info); + const CPUInfo &ci = NEScheduler::get().cpu_info(); + unsigned int num_threads = NEScheduler::get().num_threads(); + + arm_gemm::GemmArgs args(&ci, p.M, p.N, p.K, p.batches, p.multis, false, false, alpha, beta, num_threads, gemm_info.pretranpose_B()); + + // Configure requantization info + const int32_t a_offset = -a->info()->quantization_info().uniform().offset; + const int32_t b_offset = -b->info()->quantization_info().uniform().offset; + const GEMMLowpOutputStageInfo os_info = gemm_info.gemmlowp_output_stage(); + + const arm_gemm::ARequantizeLayer32 gemm_requant_info(nullptr, + a_offset, b_offset, os_info.gemmlowp_offset, + -os_info.gemmlowp_shift, os_info.gemmlowp_multiplier, + os_info.gemmlowp_min_bound, os_info.gemmlowp_max_bound); + + // Try to create an ACL function: + const arm_gemm::KernelDescription gemm_kernel_info = arm_gemm::get_gemm_method(args, gemm_requant_info); + acl_function = create_function_all_types(gemm_kernel_info, a, b, d, alpha, beta, gemm_info, std::move(memory_manager)); + + // If we still don't have an ACL function: + if(acl_function == nullptr) + { + // Fallback onto arm_gemm function if ACL doesn't support this method. + auto fallback = support::cpp14::make_unique>(); + fallback->configure(a, b, c, d, args, gemm_info, memory_group, gemm_requant_info); arm_gemm = std::move(fallback); } } @@ -309,11 +358,10 @@ NEGEMMAssemblyDispatch::NEGEMMAssemblyDispatch(std::shared_ptr m { } -Status NEGEMMAssemblyDispatch::validate(const ITensorInfo *a, const ITensorInfo *b, const ITensorInfo *d, float alpha, float beta, const GEMMInfo &gemm_info) +Status NEGEMMAssemblyDispatch::validate(const ITensorInfo *a, const ITensorInfo *b, const ITensorInfo *c, const ITensorInfo *d, float alpha, float beta, const GEMMInfo &gemm_info) { - ARM_COMPUTE_UNUSED(alpha); - ARM_COMPUTE_UNUSED(beta); - ARM_COMPUTE_UNUSED(gemm_info); + ARM_COMPUTE_UNUSED(alpha, beta, gemm_info); + ARM_COMPUTE_UNUSED(c); ARM_COMPUTE_RETURN_ERROR_ON_NULLPTR(a, b, d); ARM_COMPUTE_RETURN_ERROR_ON_CPU_F16_UNSUPPORTED(a); #ifndef __aarch64__ @@ -324,19 +372,17 @@ Status NEGEMMAssemblyDispatch::validate(const ITensorInfo *a, const ITensorInfo ARM_COMPUTE_RETURN_ERROR_ON_MSG(a->data_type() == DataType::F32 && d->data_type() != DataType::F32, "Only F32 output supported for F32 input"); ARM_COMPUTE_RETURN_ERROR_ON_MSG(a->data_type() == DataType::F16 && d->data_type() != DataType::F16, "Only F16 output supported for F16 input"); ARM_COMPUTE_RETURN_ERROR_ON_MSG(a->data_type() == DataType::U8 && d->data_type() != DataType::U32, "Only U32 output supported for U8 input"); - ARM_COMPUTE_RETURN_ERROR_ON_MSG(a->data_type() == DataType::QASYMM8 && d->data_type() != DataType::S32 && d->data_type() != DataType::U32, "Only U32/S32 output supported for QASYMM8 input"); ARM_COMPUTE_RETURN_ERROR_ON_MSG(a->data_type() == DataType::S8 && d->data_type() != DataType::S32, "Only S32 output supported for S8 input"); + ARM_COMPUTE_RETURN_ERROR_ON_MSG(a->data_type() == DataType::QASYMM8 && d->data_type() != DataType::QASYMM8, "Only QASYMM8 output supported for QASYMM8 input"); return Status{}; } -void NEGEMMAssemblyDispatch::configure(const ITensor *a, const ITensor *b, ITensor *d, float alpha, float beta, const GEMMInfo &gemm_info) +void NEGEMMAssemblyDispatch::configure(const ITensor *a, const ITensor *b, const ITensor *c, ITensor *d, float alpha, float beta, const GEMMInfo &gemm_info) { - ARM_COMPUTE_ERROR_ON_NULLPTR(a); - ARM_COMPUTE_ERROR_ON_NULLPTR(b); - ARM_COMPUTE_ERROR_ON_NULLPTR(d); + ARM_COMPUTE_ERROR_ON_NULLPTR(a, b, d); //If we don't support a combination of data types, silently return: it is the caller's responsibility to check if configure() was successful via is_configured() - if(!NEGEMMAssemblyDispatch::validate(a->info(), b->info(), d->info(), alpha, beta, gemm_info)) + if(!NEGEMMAssemblyDispatch::validate(a->info(), b->info(), c != nullptr ? c->info() : nullptr, d->info(), alpha, beta, gemm_info)) { return; } @@ -344,20 +390,27 @@ void NEGEMMAssemblyDispatch::configure(const ITensor *a, const ITensor *b, ITens switch(a->info()->data_type()) { case DataType::F32: - create_function_or_arm_gemm(_function, _arm_gemm, _memory_group, a, b, d, alpha, beta, gemm_info, _memory_manager); + create_function_or_arm_gemm(_function, _arm_gemm, _memory_group, a, b, c, d, alpha, beta, gemm_info, _memory_manager); break; #ifdef __aarch64__ case DataType::U8: case DataType::QASYMM8: - create_function_or_arm_gemm(_function, _arm_gemm, _memory_group, a, b, d, alpha, beta, gemm_info, _memory_manager); + if(d->info()->data_type() == DataType::S32) + { + create_function_or_arm_gemm(_function, _arm_gemm, _memory_group, a, b, c, d, alpha, beta, gemm_info, _memory_manager); + } + else + { + create_function_or_arm_gemm_quant(_function, _arm_gemm, _memory_group, a, b, c, d, alpha, beta, gemm_info, _memory_manager); + } break; case DataType::S8: - create_function_or_arm_gemm(_function, _arm_gemm, _memory_group, a, b, d, alpha, beta, gemm_info, _memory_manager); + create_function_or_arm_gemm(_function, _arm_gemm, _memory_group, a, b, c, d, alpha, beta, gemm_info, _memory_manager); break; #endif /* __aarch64__ */ #ifdef __ARM_FEATURE_FP16_VECTOR_ARITHMETIC case DataType::F16: - create_function_or_arm_gemm(_function, _arm_gemm, _memory_group, a, b, d, alpha, beta, gemm_info, _memory_manager); + create_function_or_arm_gemm(_function, _arm_gemm, _memory_group, a, b, c, d, alpha, beta, gemm_info, _memory_manager); break; #endif /* __ARM_FEATURE_FP16_VECTOR_ARITHMETIC */ default: diff --git a/src/runtime/NEON/functions/NEGEMMConvolutionLayer.cpp b/src/runtime/NEON/functions/NEGEMMConvolutionLayer.cpp index c011ddd18f..bd46944f7a 100644 --- a/src/runtime/NEON/functions/NEGEMMConvolutionLayer.cpp +++ b/src/runtime/NEON/functions/NEGEMMConvolutionLayer.cpp @@ -124,7 +124,7 @@ void NEGEMMConvolutionLayer::configure_mm(const ITensor *input, const ITensor *w // Merge activation with output stage int min_activation = 0; - int max_activation = 0; + int max_activation = 255; const std::set supported_acts = { ActivationLayerInfo::ActivationFunction::RELU, ActivationLayerInfo::ActivationFunction::BOUNDED_RELU, @@ -191,7 +191,7 @@ Status NEGEMMConvolutionLayer::validate_mm(const ITensorInfo *input, const ITens // Merge activation with output stage int min_activation = 0; - int max_activation = 0; + int max_activation = 255; const std::set supported_acts = { ActivationLayerInfo::ActivationFunction::RELU, ActivationLayerInfo::ActivationFunction::BOUNDED_RELU, diff --git a/src/runtime/NEON/functions/NEGEMMLowpAssemblyMatrixMultiplyCore.cpp b/src/runtime/NEON/functions/NEGEMMLowpAssemblyMatrixMultiplyCore.cpp index 5b70c8724c..aa40113c5e 100644 --- a/src/runtime/NEON/functions/NEGEMMLowpAssemblyMatrixMultiplyCore.cpp +++ b/src/runtime/NEON/functions/NEGEMMLowpAssemblyMatrixMultiplyCore.cpp @@ -43,7 +43,7 @@ NEGEMMLowpAssemblyMatrixMultiplyCore::NEGEMMLowpAssemblyMatrixMultiplyCore(std:: { } -void NEGEMMLowpAssemblyMatrixMultiplyCore::configure(const ITensor *a, const ITensor *b, ITensor *output) +void NEGEMMLowpAssemblyMatrixMultiplyCore::configure(const ITensor *a, const ITensor *b, const ITensor *c, ITensor *output) { ARM_COMPUTE_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(a, 1, DataType::U8, DataType::S8); ARM_COMPUTE_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(output, 1, DataType::U32, DataType::S32); @@ -59,7 +59,7 @@ void NEGEMMLowpAssemblyMatrixMultiplyCore::configure(const ITensor *a, const ITe case DataType::QASYMM8: case DataType::U8: { - _asm_glue.configure(a, b, output, 1.f, 0.f, GEMMInfo(false, false, true)); + _asm_glue.configure(a, b, c, output, 1.f, 0.f, GEMMInfo(false, false, true)); run_optimised = _asm_glue.is_configured(); break; } diff --git a/src/runtime/NEON/functions/NEGEMMLowpMatrixMultiplyCore.cpp b/src/runtime/NEON/functions/NEGEMMLowpMatrixMultiplyCore.cpp index f10f114287..6dc5dd2a65 100644 --- a/src/runtime/NEON/functions/NEGEMMLowpMatrixMultiplyCore.cpp +++ b/src/runtime/NEON/functions/NEGEMMLowpMatrixMultiplyCore.cpp @@ -43,7 +43,7 @@ using namespace arm_compute::misc::shape_calculator; NEGEMMLowpMatrixMultiplyCore::NEGEMMLowpMatrixMultiplyCore(std::shared_ptr memory_manager) : _memory_group(memory_manager), _asm_glue(memory_manager), _mm_kernel(nullptr), _mtx_a_reshape_kernel(nullptr), _mtx_b_reshape_kernel(nullptr), _mtx_a_reduction_kernel(), _mtx_b_reduction_kernel(), _offset_contribution_kernel(), _offset_contribution_output_stage_kernel(), _vector_sum_col(), _vector_sum_row(), _tmp_a(), _tmp_b(), _mm_result_s32(), _original_b(nullptr), _a_offset(0), _b_offset(0), - _run_vector_matrix_multiplication(false), _dot_product_path(false), _reshape_b_only_on_first_run(false), _is_prepared(false), _fuse_output_stage(false) + _run_vector_matrix_multiplication(false), _assembly_path(false), _fused_assembly_path(false), _reshape_b_only_on_first_run(false), _is_prepared(false), _fuse_output_stage(false) { } @@ -66,17 +66,15 @@ void NEGEMMLowpMatrixMultiplyCore::configure(const ITensor *a, const ITensor *b, _run_vector_matrix_multiplication = a->info()->dimension(1) < 2; _reshape_b_only_on_first_run = gemm_info.reshape_b_only_on_first_run(); _is_prepared = false; + _fused_assembly_path = false; _original_b = b; // If GEMMLowpOutputStage != NONE, fuse the offset contribution with the output stage if(gemm_info.gemmlowp_output_stage().type != GEMMLowpOutputStageType::NONE) { _fuse_output_stage = true; - _memory_group.manage(&_mm_result_s32); - TensorInfo info_mm_result_s32(output->info()->tensor_shape(), 1, DataType::S32); - _mm_result_s32.allocator()->init(info_mm_result_s32); } @@ -87,8 +85,16 @@ void NEGEMMLowpMatrixMultiplyCore::configure(const ITensor *a, const ITensor *b, case DataType::U8: case DataType::S8: { - _asm_glue.configure(a, b, _fuse_output_stage ? &_mm_result_s32 : output, 1.f, 0.f, gemm_info); - _dot_product_path = _asm_glue.is_configured(); + if(a->info()->data_type() == DataType::QASYMM8 && gemm_info.gemmlowp_output_stage().type == GEMMLowpOutputStageType::QUANTIZE_DOWN_FIXEDPOINT) + { + _asm_glue.configure(a, b, c, output, 1.f, 0.f, gemm_info); + _fused_assembly_path = _asm_glue.is_configured(); + } + else + { + _asm_glue.configure(a, b, nullptr, _fuse_output_stage ? &_mm_result_s32 : output, 1.f, 0.f, gemm_info); + } + _assembly_path = _asm_glue.is_configured(); break; } default: @@ -98,7 +104,7 @@ void NEGEMMLowpMatrixMultiplyCore::configure(const ITensor *a, const ITensor *b, } } #endif /* __aarch64__ */ - if(!(_dot_product_path || _run_vector_matrix_multiplication)) + if(!(_assembly_path || _run_vector_matrix_multiplication)) { matrix_a = &_tmp_a; matrix_b = &_tmp_b; @@ -130,63 +136,64 @@ void NEGEMMLowpMatrixMultiplyCore::configure(const ITensor *a, const ITensor *b, } } - // Initialize matrix B reduction kernel only if _a_offset is not equal to 0 - if(_a_offset != 0) + if(!_fused_assembly_path) { - TensorInfo info_vector_sum_col(compute_reductionA_shape(*b->info()), 1, DataType::S32); - - _vector_sum_col.allocator()->init(info_vector_sum_col); - if(!_reshape_b_only_on_first_run) + // Initialize matrix B reduction kernel only if _a_offset is not equal to 0 + if(_a_offset != 0) { - _memory_group.manage(&_vector_sum_col); - } + TensorInfo info_vector_sum_col(compute_reductionA_shape(*b->info()), 1, DataType::S32); - // Configure Matrix B reduction kernel - _mtx_b_reduction_kernel.configure(b, &_vector_sum_col, a->info()->dimension(0), false); - } + _vector_sum_col.allocator()->init(info_vector_sum_col); + if(!_reshape_b_only_on_first_run) + { + _memory_group.manage(&_vector_sum_col); + } - // Initialize Matrix A reduction kernel only if _b_offset is not equal to 0 - if(_b_offset != 0) - { - TensorInfo info_vector_sum_row(compute_reductionB_shape(*a->info()), 1, DataType::S32); + // Configure Matrix B reduction kernel + _mtx_b_reduction_kernel.configure(b, &_vector_sum_col, a->info()->dimension(0), false); + } - _vector_sum_row.allocator()->init(info_vector_sum_row); - _memory_group.manage(&_vector_sum_row); + // Initialize Matrix A reduction kernel only if _b_offset is not equal to 0 + if(_b_offset != 0) + { + TensorInfo info_vector_sum_row(compute_reductionB_shape(*a->info()), 1, DataType::S32); - // Configure matrix A reduction kernel - _mtx_a_reduction_kernel.configure(a, &_vector_sum_row, a->info()->dimension(0), false); - } + _vector_sum_row.allocator()->init(info_vector_sum_row); + _memory_group.manage(&_vector_sum_row); - if(_fuse_output_stage) - { - // Configure matrix multiply kernel - if(!_dot_product_path) - { - auto k = arm_compute::support::cpp14::make_unique(); - k->configure(matrix_a, matrix_b, &_mm_result_s32); - _mm_kernel = std::move(k); + // Configure matrix A reduction kernel + _mtx_a_reduction_kernel.configure(a, &_vector_sum_row, a->info()->dimension(0), false); } - _offset_contribution_output_stage_kernel.configure(&_mm_result_s32, _a_offset == 0 ? nullptr : &_vector_sum_col, _b_offset == 0 ? nullptr : &_vector_sum_row, c, output, a->info()->dimension(0), - _a_offset, _b_offset, gemm_info.gemmlowp_output_stage()); + if(_fuse_output_stage) + { + // Configure matrix multiply kernel + if(!_assembly_path) + { + auto k = arm_compute::support::cpp14::make_unique(); + k->configure(matrix_a, matrix_b, &_mm_result_s32); + _mm_kernel = std::move(k); + } - _mm_result_s32.allocator()->allocate(); - } - else - { - // Configure matrix multiply kernel - if(!_dot_product_path) + _offset_contribution_output_stage_kernel.configure(&_mm_result_s32, _a_offset == 0 ? nullptr : &_vector_sum_col, _b_offset == 0 ? nullptr : &_vector_sum_row, c, output, a->info()->dimension(0), + _a_offset, _b_offset, gemm_info.gemmlowp_output_stage()); + } + else { - auto k = arm_compute::support::cpp14::make_unique(); - k->configure(matrix_a, matrix_b, output); - _mm_kernel = std::move(k); + // Configure matrix multiply kernel + if(!_assembly_path) + { + auto k = arm_compute::support::cpp14::make_unique(); + k->configure(matrix_a, matrix_b, output); + _mm_kernel = std::move(k); + } + // Configure offset contribution kernel + _offset_contribution_kernel.configure(output, _a_offset == 0 ? nullptr : &_vector_sum_col, _b_offset == 0 ? nullptr : &_vector_sum_row, a->info()->dimension(0), _a_offset, _b_offset); } - // Configure offset contribution kernel - _offset_contribution_kernel.configure(output, _a_offset == 0 ? nullptr : &_vector_sum_col, _b_offset == 0 ? nullptr : &_vector_sum_row, a->info()->dimension(0), _a_offset, _b_offset); } // Allocate tensors - if(!_dot_product_path && !_run_vector_matrix_multiplication) + if(!_assembly_path && !_run_vector_matrix_multiplication) { _tmp_a.allocator()->allocate(); if(!_reshape_b_only_on_first_run) @@ -195,14 +202,22 @@ void NEGEMMLowpMatrixMultiplyCore::configure(const ITensor *a, const ITensor *b, } } - if(_a_offset != 0 && !_reshape_b_only_on_first_run) + if(!_fused_assembly_path) { - _vector_sum_col.allocator()->allocate(); + if(_a_offset != 0 && !_reshape_b_only_on_first_run) + { + _vector_sum_col.allocator()->allocate(); + } + + if(_b_offset != 0) + { + _vector_sum_row.allocator()->allocate(); + } } - if(_b_offset != 0) + if(_fuse_output_stage) { - _vector_sum_row.allocator()->allocate(); + _mm_result_s32.allocator()->allocate(); } } @@ -227,14 +242,24 @@ Status NEGEMMLowpMatrixMultiplyCore::validate(const ITensorInfo *a, const ITenso int32_t a_offset = a->quantization_info().uniform().offset; int32_t b_offset = b->quantization_info().uniform().offset; - bool fuse_output_stage = gemm_info.gemmlowp_output_stage().type != GEMMLowpOutputStageType::NONE; + bool fuse_output_stage = gemm_info.gemmlowp_output_stage().type != GEMMLowpOutputStageType::NONE && a->data_type() != DataType::QASYMM8; if(fuse_output_stage) { auto_init_if_empty(mm_result_s32_info, a->clone()->set_tensor_shape(output->tensor_shape()).set_data_type(DataType::S32)); } // Check if we need to run the optimized assembly kernel - const bool run_optimised = bool(NEGEMMAssemblyDispatch::validate(a, b, fuse_output_stage ? &mm_result_s32_info : output, 1.f, 0.f, gemm_info)); + bool run_optimised = false; + bool run_optimised_requantized = false; + if(is_data_type_quantized_asymmetric(a->data_type())) + { + run_optimised = bool(NEGEMMAssemblyDispatch::validate(a, b, c, output, 1.f, 0.f, gemm_info)); + run_optimised_requantized = run_optimised; + } + else + { + run_optimised = bool(NEGEMMAssemblyDispatch::validate(a, b, nullptr, fuse_output_stage ? &mm_result_s32_info : output, 1.f, 0.f, gemm_info)); + } if(run_optimised) { @@ -286,52 +311,55 @@ Status NEGEMMLowpMatrixMultiplyCore::validate(const ITensorInfo *a, const ITenso } } - TensorInfo info_vector_sum_col{}; - TensorInfo info_vector_sum_row{}; - - // Validate matrix B reduction kernel only if _a_offset is not equal to 0 - if(a_offset != 0) + if(!run_optimised_requantized) { - info_vector_sum_col = TensorInfo(compute_reductionA_shape(*b), 1, DataType::S32); + TensorInfo info_vector_sum_col{}; + TensorInfo info_vector_sum_row{}; - // Configure Matrix B reduction kernel - ARM_COMPUTE_RETURN_ON_ERROR(NEGEMMLowpMatrixBReductionKernel::validate(b, &info_vector_sum_col, a->dimension(0), false)); - } - - // Validate Matrix A reduction kernel only if _b_offset is not equal to 0 - if(b_offset != 0) - { - info_vector_sum_row = TensorInfo(compute_reductionB_shape(*a), 1, DataType::S32); + // Validate matrix B reduction kernel only if _a_offset is not equal to 0 + if(a_offset != 0) + { + info_vector_sum_col = TensorInfo(compute_reductionA_shape(*b), 1, DataType::S32); - // Configure matrix A reduction kernel - ARM_COMPUTE_RETURN_ON_ERROR(NEGEMMLowpMatrixAReductionKernel::validate(a, &info_vector_sum_row, a->dimension(0), false)); - } + // Configure Matrix B reduction kernel + ARM_COMPUTE_RETURN_ON_ERROR(NEGEMMLowpMatrixBReductionKernel::validate(b, &info_vector_sum_col, a->dimension(0), false)); + } - if(fuse_output_stage) - { - if(!run_optimised) + // Validate Matrix A reduction kernel only if _b_offset is not equal to 0 + if(b_offset != 0) { - ARM_COMPUTE_RETURN_ON_ERROR(NEGEMMLowpMatrixMultiplyKernel::validate(matrix_a_info, matrix_b_info, &mm_result_s32_info)); + info_vector_sum_row = TensorInfo(compute_reductionB_shape(*a), 1, DataType::S32); + + // Configure matrix A reduction kernel + ARM_COMPUTE_RETURN_ON_ERROR(NEGEMMLowpMatrixAReductionKernel::validate(a, &info_vector_sum_row, a->dimension(0), false)); } - // Validate offset contribution kernel - ARM_COMPUTE_RETURN_ON_ERROR(NEGEMMLowpOffsetContributionOutputStageKernel::validate(&mm_result_s32_info, - a_offset == 0 ? nullptr : &info_vector_sum_col, - b_offset == 0 ? nullptr : &info_vector_sum_row, - c, output, a_offset, b_offset, - gemm_info.gemmlowp_output_stage())); - } - else - { - if(!run_optimised) + if(fuse_output_stage) + { + if(!run_optimised) + { + ARM_COMPUTE_RETURN_ON_ERROR(NEGEMMLowpMatrixMultiplyKernel::validate(matrix_a_info, matrix_b_info, &mm_result_s32_info)); + } + + // Validate offset contribution kernel + ARM_COMPUTE_RETURN_ON_ERROR(NEGEMMLowpOffsetContributionOutputStageKernel::validate(&mm_result_s32_info, + a_offset == 0 ? nullptr : &info_vector_sum_col, + b_offset == 0 ? nullptr : &info_vector_sum_row, + c, output, a_offset, b_offset, + gemm_info.gemmlowp_output_stage())); + } + else { - ARM_COMPUTE_RETURN_ON_ERROR(NEGEMMLowpMatrixMultiplyKernel::validate(matrix_a_info, matrix_b_info, output)); + if(!run_optimised) + { + ARM_COMPUTE_RETURN_ON_ERROR(NEGEMMLowpMatrixMultiplyKernel::validate(matrix_a_info, matrix_b_info, output)); + } + // Validate offset contribution kernel + ARM_COMPUTE_RETURN_ON_ERROR(NEGEMMLowpOffsetContributionKernel::validate(output, + a_offset == 0 ? nullptr : &info_vector_sum_col, + b_offset == 0 ? nullptr : &info_vector_sum_row, + a_offset, b_offset)); } - // Validate offset contribution kernel - ARM_COMPUTE_RETURN_ON_ERROR(NEGEMMLowpOffsetContributionKernel::validate(output, - a_offset == 0 ? nullptr : &info_vector_sum_col, - b_offset == 0 ? nullptr : &info_vector_sum_row, - a_offset, b_offset)); } return Status{}; } @@ -362,27 +390,30 @@ void NEGEMMLowpMatrixMultiplyCore::run() NEScheduler::get().schedule(_mm_kernel.get(), Window::DimY); } - // Run matrix A reduction kernel only if _b_offset is not equal to 0 - if(_b_offset != 0) + if(!_fused_assembly_path) { - NEScheduler::get().schedule(&_mtx_a_reduction_kernel, Window::DimX); - } + // Run matrix A reduction kernel only if _b_offset is not equal to 0 + if(_b_offset != 0) + { + NEScheduler::get().schedule(&_mtx_a_reduction_kernel, Window::DimX); + } - // Run matrix B reduction kernel only if _a_offset is not equal to 0 - if(_a_offset != 0 && !_reshape_b_only_on_first_run) - { - NEScheduler::get().schedule(&_mtx_b_reduction_kernel, Window::DimX); - } + // Run matrix B reduction kernel only if _a_offset is not equal to 0 + if(_a_offset != 0 && !_reshape_b_only_on_first_run) + { + NEScheduler::get().schedule(&_mtx_b_reduction_kernel, Window::DimX); + } - if(_fuse_output_stage) - { - // Run offset contribution kernel - NEScheduler::get().schedule(&_offset_contribution_output_stage_kernel, Window::DimY); - } - else - { - // Run offset contribution kernel - NEScheduler::get().schedule(&_offset_contribution_kernel, Window::DimY); + if(_fuse_output_stage) + { + // Run offset contribution kernel + NEScheduler::get().schedule(&_offset_contribution_output_stage_kernel, Window::DimY); + } + else + { + // Run offset contribution kernel + NEScheduler::get().schedule(&_offset_contribution_kernel, Window::DimY); + } } } -- cgit v1.2.1