From 5e53fc65a6d7a966541c3020593eefc5222ef914 Mon Sep 17 00:00:00 2001 From: Michalis Spyrou Date: Tue, 8 Jun 2021 10:42:54 +0100 Subject: Add guards on SVE kernels Some compiling issues are reported when building through ArmNN. Resolves: COMPMID-4569 Change-Id: If464fda9157fbdba678e54f07b235e3ef00ee51a Signed-off-by: Michalis Spyrou Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/5777 Reviewed-by: Michele Di Giorgio Reviewed-by: Pablo Marquez Tello Comments-Addressed: Arm Jenkins Tested-by: Arm Jenkins --- src/core/cpu/kernels/activation/sve/fp16.cpp | 4 +++- src/core/cpu/kernels/activation/sve/fp32.cpp | 4 +++- src/core/cpu/kernels/add/sve/impl.cpp | 4 +++- src/core/cpu/kernels/add/sve/integer.cpp | 4 +++- src/core/cpu/kernels/add/sve/qasymm8.cpp | 2 +- src/core/cpu/kernels/add/sve/qasymm8_signed.cpp | 2 +- src/core/cpu/kernels/add/sve/qsymm16.cpp | 2 +- src/core/cpu/kernels/elementwise/sve/elementwise.cpp | 4 +++- src/core/cpu/kernels/elementwise/sve/elementwise_unary.cpp | 4 +++- 9 files changed, 21 insertions(+), 9 deletions(-) (limited to 'src') diff --git a/src/core/cpu/kernels/activation/sve/fp16.cpp b/src/core/cpu/kernels/activation/sve/fp16.cpp index e4be1a4faa..5e76e82c52 100644 --- a/src/core/cpu/kernels/activation/sve/fp16.cpp +++ b/src/core/cpu/kernels/activation/sve/fp16.cpp @@ -21,6 +21,7 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ +#if defined(__ARM_FEATURE_SVE) #include "arm_compute/core/Helpers.h" #include "arm_compute/core/ITensorPack.h" #include "arm_compute/core/Window.h" @@ -125,4 +126,5 @@ void fp16_sve_activation(const ITensor *src, ITensor *dst, const ActivationLayer input, output); } } // namespace cpu -} // namespace arm_compute \ No newline at end of file +} // namespace arm_compute +#endif /* defined(__ARM_FEATURE_SVE) */ \ No newline at end of file diff --git a/src/core/cpu/kernels/activation/sve/fp32.cpp b/src/core/cpu/kernels/activation/sve/fp32.cpp index f797944435..cb9f82eb39 100644 --- a/src/core/cpu/kernels/activation/sve/fp32.cpp +++ b/src/core/cpu/kernels/activation/sve/fp32.cpp @@ -21,6 +21,7 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ +#if defined(__ARM_FEATURE_SVE) #include "arm_compute/core/Helpers.h" #include "arm_compute/core/ITensorPack.h" #include "arm_compute/core/Window.h" @@ -126,4 +127,5 @@ void fp32_sve_activation(const ITensor *src, ITensor *dst, const ActivationLayer input, output); } } // namespace cpu -} // namespace arm_compute \ No newline at end of file +} // namespace arm_compute +#endif /* defined(__ARM_FEATURE_SVE) */ \ No newline at end of file diff --git a/src/core/cpu/kernels/add/sve/impl.cpp b/src/core/cpu/kernels/add/sve/impl.cpp index d1660fe19e..cf9e301c29 100644 --- a/src/core/cpu/kernels/add/sve/impl.cpp +++ b/src/core/cpu/kernels/add/sve/impl.cpp @@ -21,6 +21,7 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ +#if defined(__ARM_FEATURE_SVE) #include "arm_compute/core/Helpers.h" #include "arm_compute/core/ITensor.h" #include "arm_compute/core/Types.h" @@ -134,4 +135,5 @@ template void add_same_sve(const ITensor *src0, const ITensor *src1, IT template void add_same_sve(const ITensor *src0, const ITensor *src1, ITensor *dst, const ConvertPolicy &policy, const Window &window); template void add_same_sve(const ITensor *src0, const ITensor *src1, ITensor *dst, const ConvertPolicy &policy, const Window &window); } // namespace cpu -} // namespace arm_compute \ No newline at end of file +} // namespace arm_compute +#endif /* defined(__ARM_FEATURE_SVE) */ \ No newline at end of file diff --git a/src/core/cpu/kernels/add/sve/integer.cpp b/src/core/cpu/kernels/add/sve/integer.cpp index 6dec140499..bd8179205b 100644 --- a/src/core/cpu/kernels/add/sve/integer.cpp +++ b/src/core/cpu/kernels/add/sve/integer.cpp @@ -21,6 +21,7 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ +#if defined(__ARM_FEATURE_SVE) #include "arm_compute/core/Helpers.h" #include "arm_compute/core/ITensor.h" #include "arm_compute/core/Types.h" @@ -196,4 +197,5 @@ void add_u8_s16_s16_sve(const ITensor *src0, const ITensor *src1, ITensor *dst, add_s16_u8_s16_sve(src1, src0, dst, policy, window); } } // namespace cpu -} // namespace arm_compute \ No newline at end of file +} // namespace arm_compute +#endif /* defined(__ARM_FEATURE_SVE) */ \ No newline at end of file diff --git a/src/core/cpu/kernels/add/sve/qasymm8.cpp b/src/core/cpu/kernels/add/sve/qasymm8.cpp index c47b5abf8a..f6d1485e61 100644 --- a/src/core/cpu/kernels/add/sve/qasymm8.cpp +++ b/src/core/cpu/kernels/add/sve/qasymm8.cpp @@ -21,12 +21,12 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ +#if defined(__ARM_FEATURE_SVE2) #include "arm_compute/core/Helpers.h" #include "arm_compute/core/ITensor.h" #include "arm_compute/core/Types.h" #include "arm_compute/core/utils/misc/Traits.h" #include "src/core/NEON/wrapper/intrinsics/intrinsics.h" -#if defined(__ARM_FEATURE_SVE2) #include "src/core/NEON/SVEMath.h" #include diff --git a/src/core/cpu/kernels/add/sve/qasymm8_signed.cpp b/src/core/cpu/kernels/add/sve/qasymm8_signed.cpp index 75d0f75a65..8102aa5c65 100644 --- a/src/core/cpu/kernels/add/sve/qasymm8_signed.cpp +++ b/src/core/cpu/kernels/add/sve/qasymm8_signed.cpp @@ -21,12 +21,12 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ +#if defined(__ARM_FEATURE_SVE2) #include "arm_compute/core/Helpers.h" #include "arm_compute/core/ITensor.h" #include "arm_compute/core/Types.h" #include "arm_compute/core/utils/misc/Traits.h" #include "src/core/NEON/wrapper/intrinsics/intrinsics.h" -#if defined(__ARM_FEATURE_SVE2) #include "src/core/NEON/SVEMath.h" #include diff --git a/src/core/cpu/kernels/add/sve/qsymm16.cpp b/src/core/cpu/kernels/add/sve/qsymm16.cpp index c3b72a5e65..fb62257b0a 100644 --- a/src/core/cpu/kernels/add/sve/qsymm16.cpp +++ b/src/core/cpu/kernels/add/sve/qsymm16.cpp @@ -21,12 +21,12 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ +#if defined(__ARM_FEATURE_SVE2) #include "arm_compute/core/Helpers.h" #include "arm_compute/core/ITensor.h" #include "arm_compute/core/Types.h" #include "arm_compute/core/utils/misc/Traits.h" #include "src/core/NEON/wrapper/intrinsics/intrinsics.h" -#if defined(__ARM_FEATURE_SVE2) #include "src/core/NEON/SVEMath.h" #include diff --git a/src/core/cpu/kernels/elementwise/sve/elementwise.cpp b/src/core/cpu/kernels/elementwise/sve/elementwise.cpp index 2c3bb0ff7c..58ebb28fe5 100644 --- a/src/core/cpu/kernels/elementwise/sve/elementwise.cpp +++ b/src/core/cpu/kernels/elementwise/sve/elementwise.cpp @@ -21,6 +21,7 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ +#if defined(__ARM_FEATURE_SVE) #include "arm_compute/core/Helpers.h" #include "arm_compute/core/Types.h" #include "src/core/cpu/kernels/elementwise/sve/elementwise_list.h" @@ -306,4 +307,5 @@ template void elementwise_comparison_op(const ITensor *in1, const ITensor *in2, ITensor *out, const Window &window); template void elementwise_comparison_op(const ITensor *in1, const ITensor *in2, ITensor *out, const Window &window); } // namespace cpu -} // namespace arm_compute \ No newline at end of file +} // namespace arm_compute +#endif /* defined(__ARM_FEATURE_SVE) */ \ No newline at end of file diff --git a/src/core/cpu/kernels/elementwise/sve/elementwise_unary.cpp b/src/core/cpu/kernels/elementwise/sve/elementwise_unary.cpp index cb58548f0b..ddf1febd66 100644 --- a/src/core/cpu/kernels/elementwise/sve/elementwise_unary.cpp +++ b/src/core/cpu/kernels/elementwise/sve/elementwise_unary.cpp @@ -21,6 +21,7 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ +#if defined(__ARM_FEATURE_SVE) #include "arm_compute/core/Helpers.h" #include "arm_compute/core/ITensor.h" #include "arm_compute/core/Types.h" @@ -108,4 +109,5 @@ template void elementwise_sve_op(const ITensor *in, ITensor *out, con template void elementwise_sve_op(const ITensor *in, ITensor *out, const Window &window, ElementWiseUnary op); template void elementwise_sve_op(const ITensor *in, ITensor *out, const Window &window, ElementWiseUnary op); } // namespace cpu -} // namespace arm_compute \ No newline at end of file +} // namespace arm_compute +#endif /* defined(__ARM_FEATURE_SVE) */ \ No newline at end of file -- cgit v1.2.1