From a68df8dd8befdb53ec03412cf88113c13aa47c09 Mon Sep 17 00:00:00 2001 From: Gian Marco Iodice Date: Tue, 17 Jan 2023 16:59:59 +0000 Subject: Revert "Update the heuristic for CLDepthwiseConvolutionNative kernel" Resolves COMPMID-5813 Change-Id: I5ef6fe9fb6a54db18e41a71085896fd08bc08dbb Signed-off-by: Gian Marco Iodice Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/8975 Benchmark: Arm Jenkins Tested-by: Arm Jenkins Reviewed-by: Gunes Bayir Comments-Addressed: Arm Jenkins --- .../dwc_native/ClDWCNativeDefaultConfigValhall.cpp | 19 ++----------------- 1 file changed, 2 insertions(+), 17 deletions(-) (limited to 'src/runtime') diff --git a/src/runtime/heuristics/dwc_native/ClDWCNativeDefaultConfigValhall.cpp b/src/runtime/heuristics/dwc_native/ClDWCNativeDefaultConfigValhall.cpp index d0ade1bdd7..49485c83a9 100644 --- a/src/runtime/heuristics/dwc_native/ClDWCNativeDefaultConfigValhall.cpp +++ b/src/runtime/heuristics/dwc_native/ClDWCNativeDefaultConfigValhall.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022-2023 Arm Limited. + * Copyright (c) 2022 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -283,30 +283,15 @@ DWCComputeKernelInfo ClDWCNativeDefaultConfigValhall::configure_G77_f16(const IT desc.n0 = adjust_vec_size(desc.n0, kernel_c); // Set m0 only if stride_x == 1 and dilation_x == 1 - // m0 affects the number of rows to load from the input tensor. In fact, when depth_multiplier = 1, the number of rows - // loaded from the input tensors are -> kernel_width - (M0 - 1) - // The bigger the kernel_width, the smaller the M0 to avoid register spilling. if(conv_info.stride().first == 1 && dilation.x() == 1) { - // When the kernel width and kernel height are unit, it means that we have a pointwise multiplication. Therefore, M0 can be 1 if((kernel_w >= 9) || (kernel_w == 1)) { desc.m0 = 1; } else { - switch(kernel_w) - { - case 3: - desc.m0 = 4; - break; - case 5: - desc.m0 = 3; - break; - default: - desc.m0 = 2; - break; - } + desc.m0 = 2; } } else -- cgit v1.2.1