From 0f7ef8ab2171093855a8f21bd39c8fd7066dd629 Mon Sep 17 00:00:00 2001 From: Georgios Pinitas Date: Sun, 10 Jan 2021 04:23:52 +0000 Subject: Make memset/copy functions state-less Port following functions: - NECopy - NEFill - NEPermute - NEReshapeLayer Signed-off-by: Georgios Pinitas Change-Id: I75f3f837012abab79c7dde9a20a34f64f75571d8 Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4800 Tested-by: Arm Jenkins Reviewed-by: Michele Di Giorgio Comments-Addressed: Arm Jenkins --- src/runtime/NEON/functions/NECopy.cpp | 44 ++++++++++++--- .../NEON/functions/NEFFTConvolutionLayer.cpp | 3 +- src/runtime/NEON/functions/NEFill.cpp | 36 ++++++++++--- .../NEON/functions/NEGenerateProposalsLayer.cpp | 3 +- src/runtime/NEON/functions/NEMaxUnpoolingLayer.cpp | 14 ++--- src/runtime/NEON/functions/NEPadLayer.cpp | 10 ++-- src/runtime/NEON/functions/NEPermute.cpp | 45 +++++++++++++--- src/runtime/NEON/functions/NERNNLayer.cpp | 10 ++-- src/runtime/NEON/functions/NEReshapeLayer.cpp | 40 ++++---------- src/runtime/NEON/functions/NESpaceToBatchLayer.cpp | 20 +++---- src/runtime/cpu/operators/CpuActivation.h | 2 +- src/runtime/cpu/operators/CpuCopy.cpp | 44 +++++++++++++++ src/runtime/cpu/operators/CpuCopy.h | 57 ++++++++++++++++++++ src/runtime/cpu/operators/CpuFill.cpp | 39 ++++++++++++++ src/runtime/cpu/operators/CpuFill.h | 48 +++++++++++++++++ src/runtime/cpu/operators/CpuFloor.h | 2 +- src/runtime/cpu/operators/CpuPermute.cpp | 44 +++++++++++++++ src/runtime/cpu/operators/CpuPermute.h | 62 ++++++++++++++++++++++ src/runtime/cpu/operators/CpuReshape.cpp | 44 +++++++++++++++ src/runtime/cpu/operators/CpuReshape.h | 57 ++++++++++++++++++++ 20 files changed, 538 insertions(+), 86 deletions(-) create mode 100644 src/runtime/cpu/operators/CpuCopy.cpp create mode 100644 src/runtime/cpu/operators/CpuCopy.h create mode 100644 src/runtime/cpu/operators/CpuFill.cpp create mode 100644 src/runtime/cpu/operators/CpuFill.h create mode 100644 src/runtime/cpu/operators/CpuPermute.cpp create mode 100644 src/runtime/cpu/operators/CpuPermute.h create mode 100644 src/runtime/cpu/operators/CpuReshape.cpp create mode 100644 src/runtime/cpu/operators/CpuReshape.h (limited to 'src/runtime') diff --git a/src/runtime/NEON/functions/NECopy.cpp b/src/runtime/NEON/functions/NECopy.cpp index 11707cbd4c..20642b5eed 100644 --- a/src/runtime/NEON/functions/NECopy.cpp +++ b/src/runtime/NEON/functions/NECopy.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018-2020 Arm Limited. + * Copyright (c) 2017-2021 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -23,23 +23,51 @@ */ #include "arm_compute/runtime/NEON/functions/NECopy.h" -#include "src/core/NEON/kernels/NECopyKernel.h" +#include "arm_compute/core/Validate.h" +#include "src/runtime/cpu/operators/CpuCopy.h" #include namespace arm_compute { -NECopy::~NECopy() = default; +struct NECopy::Impl +{ + const ITensor *src{ nullptr }; + ITensor *dst{ nullptr }; + std::unique_ptr op{ nullptr }; +}; + +NECopy::NECopy() + : _impl(std::make_unique()) +{ +} +NECopy::NECopy(NECopy &&) = default; +NECopy &NECopy::operator=(NECopy &&) = default; +NECopy::~NECopy() = default; void NECopy::configure(ITensor *input, ITensor *output) { - auto k = std::make_unique(); - k->configure(input, output); - _kernel = std::move(k); + ARM_COMPUTE_ERROR_ON_NULLPTR(input, output); + + _impl->src = input; + _impl->dst = output; + _impl->op = std::make_unique(); + _impl->op->configure(input->info(), output->info()); +} + +Status NECopy::validate(const ITensorInfo *input, const ITensorInfo *output) +{ + ARM_COMPUTE_RETURN_ERROR_ON_NULLPTR(input, output); + ARM_COMPUTE_RETURN_ON_ERROR(cpu::CpuCopy::validate(input, output)); + + return Status{}; } -Status NECopy::validate(const arm_compute::ITensorInfo *input, const arm_compute::ITensorInfo *output) +void NECopy::run() { - return NECopyKernel::validate(input, output); + ITensorPack pack; + pack.add_tensor(TensorType::ACL_SRC, _impl->src); + pack.add_tensor(TensorType::ACL_DST, _impl->dst); + _impl->op->run(pack); } } // namespace arm_compute diff --git a/src/runtime/NEON/functions/NEFFTConvolutionLayer.cpp b/src/runtime/NEON/functions/NEFFTConvolutionLayer.cpp index 60a747daa3..56fc2e4a2b 100644 --- a/src/runtime/NEON/functions/NEFFTConvolutionLayer.cpp +++ b/src/runtime/NEON/functions/NEFFTConvolutionLayer.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2020 Arm Limited. + * Copyright (c) 2019-2021 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -27,7 +27,6 @@ #include "arm_compute/core/Utils.h" #include "arm_compute/core/Validate.h" #include "arm_compute/core/utils/misc/ShapeCalculator.h" -#include "src/core/NEON/kernels/NECopyKernel.h" #include "src/core/NEON/kernels/NEFFTDigitReverseKernel.h" #include "src/core/NEON/kernels/NEFFTRadixStageKernel.h" #include "src/core/NEON/kernels/NEFFTScaleKernel.h" diff --git a/src/runtime/NEON/functions/NEFill.cpp b/src/runtime/NEON/functions/NEFill.cpp index 74e366ab49..ee539fdfc8 100644 --- a/src/runtime/NEON/functions/NEFill.cpp +++ b/src/runtime/NEON/functions/NEFill.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2020 Arm Limited. + * Copyright (c) 2017-2021 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -23,18 +23,40 @@ */ #include "arm_compute/runtime/NEON/functions/NEFill.h" -#include "arm_compute/core/Window.h" -#include "arm_compute/runtime/NEON/NEScheduler.h" -#include "src/core/NEON/kernels/NEMemsetKernel.h" +#include "arm_compute/core/Validate.h" +#include "src/runtime/cpu/operators/CpuFill.h" #include namespace arm_compute { +struct NEFill::Impl +{ + ITensor *tensor{ nullptr }; + std::unique_ptr op{ nullptr }; +}; + +NEFill::NEFill() + : _impl(std::make_unique()) +{ +} +NEFill::NEFill(NEFill &&) = default; +NEFill &NEFill::operator=(NEFill &&) = default; +NEFill::~NEFill() = default; + void NEFill::configure(ITensor *tensor, PixelValue constant_value) { - auto k = std::make_unique(); - k->configure(tensor, constant_value); - _kernel = std::move(k); + ARM_COMPUTE_ERROR_ON_NULLPTR(tensor); + + _impl->tensor = tensor; + _impl->op = std::make_unique(); + _impl->op->configure(tensor->info(), constant_value); +} + +void NEFill::run() +{ + ITensorPack pack; + pack.add_tensor(TensorType::ACL_SRC_DST, _impl->tensor); + _impl->op->run(pack); } } // namespace arm_compute diff --git a/src/runtime/NEON/functions/NEGenerateProposalsLayer.cpp b/src/runtime/NEON/functions/NEGenerateProposalsLayer.cpp index f3a6a30047..931fdb22f7 100644 --- a/src/runtime/NEON/functions/NEGenerateProposalsLayer.cpp +++ b/src/runtime/NEON/functions/NEGenerateProposalsLayer.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2020 Arm Limited. + * Copyright (c) 2019-2021 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -25,7 +25,6 @@ #include "arm_compute/core/Types.h" #include "arm_compute/runtime/NEON/NEScheduler.h" -#include "src/core/NEON/kernels/NECopyKernel.h" #include "src/core/NEON/kernels/NEFillBorderKernel.h" #include "src/core/NEON/kernels/NEGenerateProposalsLayerKernel.h" #include "src/core/NEON/kernels/NEPadLayerKernel.h" diff --git a/src/runtime/NEON/functions/NEMaxUnpoolingLayer.cpp b/src/runtime/NEON/functions/NEMaxUnpoolingLayer.cpp index da6260b0c5..656777d726 100644 --- a/src/runtime/NEON/functions/NEMaxUnpoolingLayer.cpp +++ b/src/runtime/NEON/functions/NEMaxUnpoolingLayer.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020 Arm Limited. + * Copyright (c) 2020-2021 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -24,26 +24,26 @@ #include "arm_compute/runtime/NEON/functions/NEMaxUnpoolingLayer.h" #include "arm_compute/core/ITensor.h" +#include "arm_compute/core/Validate.h" #include "arm_compute/runtime/NEON/NEScheduler.h" +#include "arm_compute/runtime/NEON/functions/NEFill.h" #include "src/core/NEON/kernels/NEMaxUnpoolingLayerKernel.h" -#include "src/core/NEON/kernels/NEMemsetKernel.h" namespace arm_compute { NEMaxUnpoolingLayer::~NEMaxUnpoolingLayer() = default; NEMaxUnpoolingLayer::NEMaxUnpoolingLayer() - - : _memset_kernel(), _unpooling_layer_kernel() + : _fill_func(), _unpooling_layer_kernel() { } void NEMaxUnpoolingLayer::configure(ITensor *input, ITensor *indices, ITensor *output, const PoolingLayerInfo &pool_info) { const PixelValue zero_value(0.f); - _memset_kernel = std::make_unique(); + _fill_func = std::make_unique(); _unpooling_layer_kernel = std::make_unique(); - _memset_kernel->configure(output, zero_value); + _fill_func->configure(output, zero_value); _unpooling_layer_kernel->configure(input, indices, output, pool_info); } @@ -54,7 +54,7 @@ Status NEMaxUnpoolingLayer::validate(const ITensorInfo *input, const ITensorInfo void NEMaxUnpoolingLayer::run() { - NEScheduler::get().schedule(_memset_kernel.get(), Window::DimY); + _fill_func->run(); NEScheduler::get().schedule(_unpooling_layer_kernel.get(), Window::DimY); } } /* namespace arm_compute */ diff --git a/src/runtime/NEON/functions/NEPadLayer.cpp b/src/runtime/NEON/functions/NEPadLayer.cpp index 88a73b8b0d..531b06de64 100644 --- a/src/runtime/NEON/functions/NEPadLayer.cpp +++ b/src/runtime/NEON/functions/NEPadLayer.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018-2020 Arm Limited. + * Copyright (c) 2018-2021 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -27,7 +27,6 @@ #include "arm_compute/core/Types.h" #include "arm_compute/core/utils/misc/ShapeCalculator.h" -#include "src/core/NEON/kernels/NECopyKernel.h" #include "src/core/NEON/kernels/NEPadLayerKernel.h" #include "src/core/helpers/AutoConfiguration.h" @@ -52,7 +51,7 @@ uint32_t last_padding_dimension(const PaddingList &padding) NEPadLayer::~NEPadLayer() = default; NEPadLayer::NEPadLayer() - : _copy_kernel(), _pad_kernel(), _mode(), _padding(), _num_dimensions(0), _slice_functions(), _concat_functions(), _slice_results(), _concat_results() + : _copy_function(), _pad_kernel(), _mode(), _padding(), _num_dimensions(0), _slice_functions(), _concat_functions(), _slice_results(), _concat_results() { } @@ -200,8 +199,7 @@ void NEPadLayer::configure(ITensor *input, ITensor *output, const PaddingList &p else { // Copy the input to the whole output if no padding is applied - _copy_kernel = std::make_unique(); - _copy_kernel->configure(input, output); + _copy_function.configure(input, output); } } @@ -286,7 +284,7 @@ void NEPadLayer::run() } else { - NEScheduler::get().schedule(_copy_kernel.get(), Window::DimY); + _copy_function.run(); } } } // namespace arm_compute diff --git a/src/runtime/NEON/functions/NEPermute.cpp b/src/runtime/NEON/functions/NEPermute.cpp index cceb22f8c6..257c1a2e44 100644 --- a/src/runtime/NEON/functions/NEPermute.cpp +++ b/src/runtime/NEON/functions/NEPermute.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018-2020 Arm Limited. + * Copyright (c) 2017-2021 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -23,19 +23,52 @@ */ #include "arm_compute/runtime/NEON/functions/NEPermute.h" -#include "src/core/NEON/kernels/NEPermuteKernel.h" +#include "arm_compute/core/Validate.h" +#include "src/runtime/cpu/operators/CpuPermute.h" namespace arm_compute { +struct NEPermute::Impl +{ + const ITensor *src{ nullptr }; + ITensor *dst{ nullptr }; + std::unique_ptr op{ nullptr }; +}; + +NEPermute::NEPermute() + : _impl(std::make_unique()) +{ +} + +NEPermute::NEPermute(NEPermute &&) = default; + +NEPermute &NEPermute::operator=(NEPermute &&) = default; + +NEPermute::~NEPermute() = default; + void NEPermute::configure(const ITensor *input, ITensor *output, const PermutationVector &perm) { - auto k = std::make_unique(); - k->configure(input, output, perm); - _kernel = std::move(k); + ARM_COMPUTE_ERROR_ON_NULLPTR(input, output); + + _impl->src = input; + _impl->dst = output; + _impl->op = std::make_unique(); + _impl->op->configure(input->info(), output->info(), perm); } Status NEPermute::validate(const ITensorInfo *input, const ITensorInfo *output, const PermutationVector &perm) { - return NEPermuteKernel::validate(input, output, perm); + ARM_COMPUTE_RETURN_ERROR_ON_NULLPTR(input, output); + ARM_COMPUTE_RETURN_ON_ERROR(cpu::CpuPermute::validate(input, output, perm)); + + return Status{}; +} + +void NEPermute::run() +{ + ITensorPack pack; + pack.add_tensor(TensorType::ACL_SRC, _impl->src); + pack.add_tensor(TensorType::ACL_DST, _impl->dst); + _impl->op->run(pack); } } // namespace arm_compute diff --git a/src/runtime/NEON/functions/NERNNLayer.cpp b/src/runtime/NEON/functions/NERNNLayer.cpp index 93e37cc000..63e8103c03 100644 --- a/src/runtime/NEON/functions/NERNNLayer.cpp +++ b/src/runtime/NEON/functions/NERNNLayer.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018-2020 Arm Limited. + * Copyright (c) 2018-2021 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -32,7 +32,6 @@ #include "arm_compute/runtime/NEON/NEScheduler.h" #include "src/core/NEON/kernels/NEConvertFullyConnectedWeightsKernel.h" #include "src/core/NEON/kernels/NEConvertQuantizedSignednessKernel.h" -#include "src/core/NEON/kernels/NECopyKernel.h" #include "src/core/NEON/kernels/NEGEMMInterleave4x4Kernel.h" #include "src/core/NEON/kernels/NEGEMMLowpMatrixMultiplyKernel.h" #include "src/core/NEON/kernels/NEGEMMLowpOffsetContributionKernel.h" @@ -47,7 +46,7 @@ namespace arm_compute NERNNLayer::~NERNNLayer() = default; NERNNLayer::NERNNLayer(std::shared_ptr memory_manager) - : _memory_group(std::move(memory_manager)), _gemm_state_f(), _add_f(), _activation(), _fully_connected(memory_manager), _copy_kernel(), _fully_connected_out(), _gemm_output(), _add_output(), + : _memory_group(std::move(memory_manager)), _gemm_state_f(), _add_f(), _activation(), _fully_connected(memory_manager), _copy_f(), _fully_connected_out(), _gemm_output(), _add_output(), _is_prepared(false) { } @@ -112,8 +111,7 @@ void NERNNLayer::configure(const ITensor *input, const ITensor *weights, const I _activation.configure(&_add_output, hidden_state, info); _add_output.allocator()->allocate(); - _copy_kernel = std::make_unique(); - _copy_kernel->configure(hidden_state, output); + _copy_f.configure(hidden_state, output); } void NERNNLayer::run() @@ -130,7 +128,7 @@ void NERNNLayer::run() _activation.run(); // copy hidden out to output - NEScheduler::get().schedule(_copy_kernel.get(), Window::DimY); + _copy_f.run(); } void NERNNLayer::prepare() diff --git a/src/runtime/NEON/functions/NEReshapeLayer.cpp b/src/runtime/NEON/functions/NEReshapeLayer.cpp index 9ad6a35cc3..c0c78ea652 100644 --- a/src/runtime/NEON/functions/NEReshapeLayer.cpp +++ b/src/runtime/NEON/functions/NEReshapeLayer.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017-2020 Arm Limited. + * Copyright (c) 2017-2021 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -24,61 +24,41 @@ #include "arm_compute/runtime/NEON/functions/NEReshapeLayer.h" #include "arm_compute/core/Validate.h" -#include "arm_compute/runtime/NEON/NEScheduler.h" -#include "arm_compute/runtime/Types.h" -#include "src/core/NEON/kernels/NEReshapeLayerKernel.h" +#include "src/runtime/cpu/operators/CpuReshape.h" #include namespace arm_compute { -namespace experimental -{ -NEReshape::~NEReshape() = default; - -void NEReshape::configure(const ITensorInfo *input, ITensorInfo *output) -{ - auto k = std::make_unique(); - k->configure(input, output); - _kernel = std::move(k); -} - -Status NEReshape::validate(const ITensorInfo *input, const ITensorInfo *output) -{ - return arm_compute::NEReshapeLayerKernel::validate(input, output); -} -} // namespace experimental - struct NEReshapeLayer::Impl { - const ITensor *src{ nullptr }; - ITensor *dst{ nullptr }; - std::unique_ptr op{ nullptr }; + const ITensor *src{ nullptr }; + ITensor *dst{ nullptr }; + std::unique_ptr op{ nullptr }; }; NEReshapeLayer::NEReshapeLayer() : _impl(std::make_unique()) { } - NEReshapeLayer::NEReshapeLayer(NEReshapeLayer &&) = default; - NEReshapeLayer &NEReshapeLayer::operator=(NEReshapeLayer &&) = default; - -NEReshapeLayer::~NEReshapeLayer() = default; +NEReshapeLayer::~NEReshapeLayer() = default; void NEReshapeLayer::configure(const ITensor *input, ITensor *output) { + ARM_COMPUTE_ERROR_ON_NULLPTR(input, output); + _impl->src = input; _impl->dst = output; - _impl->op = std::make_unique(); + _impl->op = std::make_unique(); _impl->op->configure(input->info(), output->info()); } Status NEReshapeLayer::validate(const ITensorInfo *input, const ITensorInfo *output) { ARM_COMPUTE_RETURN_ERROR_ON_NULLPTR(input, output); - ARM_COMPUTE_RETURN_ON_ERROR(experimental::NEReshape::validate(input, output)); + ARM_COMPUTE_RETURN_ON_ERROR(cpu::CpuReshape::validate(input, output)); return Status{}; } diff --git a/src/runtime/NEON/functions/NESpaceToBatchLayer.cpp b/src/runtime/NEON/functions/NESpaceToBatchLayer.cpp index 10b384157d..e8a84246fe 100644 --- a/src/runtime/NEON/functions/NESpaceToBatchLayer.cpp +++ b/src/runtime/NEON/functions/NESpaceToBatchLayer.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2020 Arm Limited. + * Copyright (c) 2019-2021 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -29,7 +29,7 @@ #include "arm_compute/core/Types.h" #include "arm_compute/core/Validate.h" #include "arm_compute/runtime/NEON/NEScheduler.h" -#include "src/core/NEON/kernels/NEMemsetKernel.h" +#include "arm_compute/runtime/NEON/functions/NEFill.h" #include "src/core/NEON/kernels/NESpaceToBatchLayerKernel.h" namespace arm_compute @@ -37,7 +37,7 @@ namespace arm_compute NESpaceToBatchLayer::~NESpaceToBatchLayer() = default; NESpaceToBatchLayer::NESpaceToBatchLayer() - : _space_to_batch_kernel(), _memset_kernel(), _has_padding(false) + : _space_to_batch_kernel(), _fill_f(), _has_padding(false) { } @@ -47,9 +47,9 @@ void NESpaceToBatchLayer::configure(const ITensor *input, const ITensor *block_s if(input->info()->tensor_shape().total_size() != output->info()->tensor_shape().total_size()) { - _has_padding = true; - _memset_kernel = std::make_unique(); - _memset_kernel->configure(output, PixelValue(0, input->info()->data_type(), input->info()->quantization_info())); + _has_padding = true; + _fill_f = std::make_unique(); + _fill_f->configure(output, PixelValue(0, input->info()->data_type(), input->info()->quantization_info())); } _space_to_batch_kernel = std::make_unique(); _space_to_batch_kernel->configure(input, block_shape, paddings, output); @@ -61,9 +61,9 @@ void NESpaceToBatchLayer::configure(const ITensor *input, const int block_shape_ if(input->info()->tensor_shape().total_size() != output->info()->tensor_shape().total_size()) { - _has_padding = true; - _memset_kernel = std::make_unique(); - _memset_kernel->configure(output, PixelValue(0, input->info()->data_type(), input->info()->quantization_info())); + _has_padding = true; + _fill_f = std::make_unique(); + _fill_f->configure(output, PixelValue(0, input->info()->data_type(), input->info()->quantization_info())); } _space_to_batch_kernel = std::make_unique(); _space_to_batch_kernel->configure(input, block_shape_x, block_shape_y, padding_left, padding_right, output); @@ -89,7 +89,7 @@ void NESpaceToBatchLayer::run() // Zero out output only if we have paddings if(_has_padding) { - NEScheduler::get().schedule(_memset_kernel.get(), Window::DimY); + _fill_f->run(); } NEScheduler::get().schedule(_space_to_batch_kernel.get(), Window::DimY); } diff --git a/src/runtime/cpu/operators/CpuActivation.h b/src/runtime/cpu/operators/CpuActivation.h index 25bc9036dc..a357b32653 100644 --- a/src/runtime/cpu/operators/CpuActivation.h +++ b/src/runtime/cpu/operators/CpuActivation.h @@ -36,7 +36,7 @@ class CpuActivation : public ICpuOperator public: /** Constructor */ CpuActivation() = default; - /** Set the input and output tensor. + /** Configure operator for a given list of arguments * * @param[in] input Source tensor info. Data types supported: QASYMM8/QASYMM8_SIGNED/QSYMM16/F16/F32. * @param[out] output Destination tensor info. Data type supported: same as @p src diff --git a/src/runtime/cpu/operators/CpuCopy.cpp b/src/runtime/cpu/operators/CpuCopy.cpp new file mode 100644 index 0000000000..9fbe916163 --- /dev/null +++ b/src/runtime/cpu/operators/CpuCopy.cpp @@ -0,0 +1,44 @@ +/* + * Copyright (c) 2021 Arm Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#include "src/runtime/cpu/operators/CpuCopy.h" + +#include "src/core/cpu/kernels/CpuCopyKernel.h" + +namespace arm_compute +{ +namespace cpu +{ +void CpuCopy::configure(const ITensorInfo *src, ITensorInfo *dst) +{ + auto k = std::make_unique(); + k->configure(src, dst); + _kernel = std::move(k); +} + +Status CpuCopy::validate(const ITensorInfo *src, const ITensorInfo *dst) +{ + return kernels::CpuCopyKernel::validate(src, dst); +} +} // namespace cpu +} // namespace arm_compute diff --git a/src/runtime/cpu/operators/CpuCopy.h b/src/runtime/cpu/operators/CpuCopy.h new file mode 100644 index 0000000000..576461350e --- /dev/null +++ b/src/runtime/cpu/operators/CpuCopy.h @@ -0,0 +1,57 @@ +/* + * Copyright (c) 2021 Arm Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#ifndef ARM_COMPUTE_CPU_COPY_H +#define ARM_COMPUTE_CPU_COPY_H + +#include "src/runtime/cpu/ICpuOperator.h" + +namespace arm_compute +{ +namespace cpu +{ +/** Basic function to run @ref CpuCopyKernel */ +class CpuCopy : public ICpuOperator +{ +public: + /** Constructor */ + CpuCopy() = default; + /** Configure operator for a given list of arguments + * + * @param[in] src Source tensor info. Data type supported: All + * @param[out] dst Destination info. Data type supported: Same as @p src + */ + void configure(const ITensorInfo *src, ITensorInfo *dst); + + /** Static function to check if given info will lead to a valid configuration of @ref CpuCopy + * + * @param[in] src Source tensor info. Data type supported: All + * @param[in] dst Destination tensor info. Data type supported: Same as @p src + * + * @return a status + */ + static Status validate(const ITensorInfo *src, const ITensorInfo *dst); +}; +} // namespace cpu +} // namespace arm_compute +#endif /* ARM_COMPUTE_CPU_COPY_H */ diff --git a/src/runtime/cpu/operators/CpuFill.cpp b/src/runtime/cpu/operators/CpuFill.cpp new file mode 100644 index 0000000000..081e30ea17 --- /dev/null +++ b/src/runtime/cpu/operators/CpuFill.cpp @@ -0,0 +1,39 @@ +/* + * Copyright (c) 2021 Arm Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#include "src/runtime/cpu/operators/CpuFill.h" + +#include "src/core/cpu/kernels/CpuFillKernel.h" + +namespace arm_compute +{ +namespace cpu +{ +void CpuFill::configure(const ITensorInfo *tensor, PixelValue constant_value) +{ + auto k = std::make_unique(); + k->configure(tensor, constant_value); + _kernel = std::move(k); +} +} // namespace cpu +} // namespace arm_compute diff --git a/src/runtime/cpu/operators/CpuFill.h b/src/runtime/cpu/operators/CpuFill.h new file mode 100644 index 0000000000..7a75f4222c --- /dev/null +++ b/src/runtime/cpu/operators/CpuFill.h @@ -0,0 +1,48 @@ +/* + * Copyright (c) 2021 Arm Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#ifndef ARM_COMPUTE_CPU_FILL_H +#define ARM_COMPUTE_CPU_FILL_H + +#include "src/runtime/cpu/ICpuOperator.h" + +namespace arm_compute +{ +namespace cpu +{ +/** Basic function to run @ref CpuFillKernel */ +class CpuFill : public ICpuOperator +{ +public: + /** Constructor */ + CpuFill() = default; + /** Configure operator for a given list of arguments + * + * @param[in,out] tensor Tensor to fill. Supported data types: All + * @param[in] constant_value The value used to fill the planes of the tensor + */ + void configure(const ITensorInfo *tensor, PixelValue constant_value); +}; +} // namespace cpu +} // namespace arm_compute +#endif /* ARM_COMPUTE_CPU_FILL_H */ diff --git a/src/runtime/cpu/operators/CpuFloor.h b/src/runtime/cpu/operators/CpuFloor.h index 30c850a2ca..86a01e307c 100644 --- a/src/runtime/cpu/operators/CpuFloor.h +++ b/src/runtime/cpu/operators/CpuFloor.h @@ -36,7 +36,7 @@ class CpuFloor : public ICpuOperator public: /** Constructor */ CpuFloor() = default; - /** Set the input and output tensor. + /** Configure operator for a given list of arguments * * @param[in] src Source tensor info. Data types supported: F16/F32. * @param[in] dst Destination tensor info. Data type supported: same as @p src diff --git a/src/runtime/cpu/operators/CpuPermute.cpp b/src/runtime/cpu/operators/CpuPermute.cpp new file mode 100644 index 0000000000..7fde1e3767 --- /dev/null +++ b/src/runtime/cpu/operators/CpuPermute.cpp @@ -0,0 +1,44 @@ +/* + * Copyright (c) 2018-2021 Arm Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#include "src/runtime/cpu/operators/CpuPermute.h" + +#include "src/core/cpu/kernels/CpuPermuteKernel.h" + +namespace arm_compute +{ +namespace cpu +{ +void CpuPermute::configure(const ITensorInfo *src, ITensorInfo *dst, const PermutationVector &perm) +{ + auto k = std::make_unique(); + k->configure(src, dst, perm); + _kernel = std::move(k); +} + +Status CpuPermute::validate(const ITensorInfo *src, const ITensorInfo *dst, const PermutationVector &perm) +{ + return kernels::CpuPermuteKernel::validate(src, dst, perm); +} +} // namesapce cpu +} // namespace arm_compute diff --git a/src/runtime/cpu/operators/CpuPermute.h b/src/runtime/cpu/operators/CpuPermute.h new file mode 100644 index 0000000000..31ad77ecad --- /dev/null +++ b/src/runtime/cpu/operators/CpuPermute.h @@ -0,0 +1,62 @@ +/* + * Copyright (c) 2021 Arm Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#ifndef ARM_COMPUTE_CPU_PERMUTE_H +#define ARM_COMPUTE_CPU_PERMUTE_H + +#include "src/runtime/cpu/ICpuOperator.h" + +namespace arm_compute +{ +namespace cpu +{ +/** Basic function to run @ref CpuPermuteKernel */ +class CpuPermute : public ICpuOperator +{ +public: + /** Constructor */ + CpuPermute() = default; + /** Configure operator for a given list of arguments + * + * @note Arbitrary permutation vectors are supported with rank not greater than 4 + * + * @param[in] src Source tensor to permute. Data types supported: All + * @param[out] dst Destintation tensor. Data types supported: Same as @p src + * @param[in] perm Permutation vector + */ + void configure(const ITensorInfo *src, ITensorInfo *dst, const PermutationVector &perm); + /** Static function to check if given info will lead to a valid configuration of @ref CpuPermute + * + * @note Arbitrary permutation vectors are supported with rank not greater than 4 + * + * @param[in] src Source tensor to permute. Data types supported: All + * @param[in] dst Destination tensor. Data types supported: Same as @p dst + * @param[in] perm Permutation vector + * + * @return a status + */ + static Status validate(const ITensorInfo *src, const ITensorInfo *dst, const PermutationVector &perm); +}; +} // namespace cpu +} // namespace arm_compute +#endif /* ARM_COMPUTE_CPU_RESHAPE_H */ diff --git a/src/runtime/cpu/operators/CpuReshape.cpp b/src/runtime/cpu/operators/CpuReshape.cpp new file mode 100644 index 0000000000..33c9cb87b6 --- /dev/null +++ b/src/runtime/cpu/operators/CpuReshape.cpp @@ -0,0 +1,44 @@ +/* + * Copyright (c) 2021 Arm Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#include "src/runtime/cpu/operators/CpuReshape.h" + +#include "src/core/cpu/kernels/CpuReshapeKernel.h" + +namespace arm_compute +{ +namespace cpu +{ +void CpuReshape::configure(const ITensorInfo *src, ITensorInfo *dst) +{ + auto k = std::make_unique(); + k->configure(src, dst); + _kernel = std::move(k); +} + +Status CpuReshape::validate(const ITensorInfo *src, const ITensorInfo *dst) +{ + return kernels::CpuReshapeKernel::validate(src, dst); +} +} // namespace cpu +} // namespace arm_compute diff --git a/src/runtime/cpu/operators/CpuReshape.h b/src/runtime/cpu/operators/CpuReshape.h new file mode 100644 index 0000000000..b718b078f3 --- /dev/null +++ b/src/runtime/cpu/operators/CpuReshape.h @@ -0,0 +1,57 @@ +/* + * Copyright (c) 2021 Arm Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#ifndef ARM_COMPUTE_CPU_RESHAPE_H +#define ARM_COMPUTE_CPU_RESHAPE_H + +#include "src/runtime/cpu/ICpuOperator.h" + +namespace arm_compute +{ +namespace cpu +{ +/** Basic function to run @ref CpuReshapeKernel */ +class CpuReshape : public ICpuOperator +{ +public: + /** Constructor */ + CpuReshape() = default; + /** Configure operator for a given list of arguments + * + * @param[in] src Source tensor info. Data type supported: All + * @param[out] dst Destination info. Data type supported: Same as @p src + */ + void configure(const ITensorInfo *src, ITensorInfo *dst); + + /** Static function to check if given info will lead to a valid configuration of @ref CpuReshape + * + * @param[in] src Source tensor info. Data type supported: All + * @param[in] dst Destination tensor info. Data type supported: Same as @p src + * + * @return a status + */ + static Status validate(const ITensorInfo *src, const ITensorInfo *dst); +}; +} // namespace cpu +} // namespace arm_compute +#endif /* ARM_COMPUTE_CPU_RESHAPE_H */ -- cgit v1.2.1