From 6ff3b19ee6120edf015fad8caab2991faa3070af Mon Sep 17 00:00:00 2001 From: Anthony Barbier Date: Mon, 4 Sep 2017 18:44:23 +0100 Subject: COMPMID-344 Updated doxygen Change-Id: I32f7b84daa560e460b77216add529c8fa8b327ae --- src/runtime/CL/functions/CLGaussian5x5.cpp | 62 ++++++++++++++++++++++++++++++ 1 file changed, 62 insertions(+) create mode 100644 src/runtime/CL/functions/CLGaussian5x5.cpp (limited to 'src/runtime/CL/functions/CLGaussian5x5.cpp') diff --git a/src/runtime/CL/functions/CLGaussian5x5.cpp b/src/runtime/CL/functions/CLGaussian5x5.cpp new file mode 100644 index 0000000000..e83a8fb857 --- /dev/null +++ b/src/runtime/CL/functions/CLGaussian5x5.cpp @@ -0,0 +1,62 @@ +/* + * Copyright (c) 2016, 2017 ARM Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#include "arm_compute/runtime/CL/functions/CLGaussian5x5.h" + +#include "arm_compute/core/CL/ICLTensor.h" +#include "arm_compute/core/CL/kernels/CLGaussian5x5Kernel.h" +#include "arm_compute/core/PixelValue.h" +#include "arm_compute/core/TensorInfo.h" +#include "arm_compute/core/Validate.h" +#include "arm_compute/runtime/CL/CLScheduler.h" +#include "arm_compute/runtime/ITensorAllocator.h" + +#include + +using namespace arm_compute; + +CLGaussian5x5::CLGaussian5x5() + : _kernel_hor(), _kernel_vert(), _border_handler(), _tmp() +{ +} + +void CLGaussian5x5::configure(ICLTensor *input, ICLTensor *output, BorderMode border_mode, uint8_t constant_border_value) +{ + ARM_COMPUTE_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(input, 1, DataType::U8); + + _tmp.allocator()->init(TensorInfo(input->info()->tensor_shape(), 1, DataType::U16)); + + _kernel_hor.configure(input, &_tmp, border_mode == BorderMode::UNDEFINED); + _kernel_vert.configure(&_tmp, output, border_mode == BorderMode::UNDEFINED); + _border_handler.configure(input, _kernel_hor.border_size(), border_mode, PixelValue(constant_border_value)); + + // Allocate intermediate buffers + _tmp.allocator()->allocate(); +} + +void CLGaussian5x5::run() +{ + CLScheduler::get().enqueue(_border_handler, false); + CLScheduler::get().enqueue(_kernel_hor, false); + CLScheduler::get().enqueue(_kernel_vert); +} -- cgit v1.2.1