From 76335eb8d8733b0bbc0110546797211540870c50 Mon Sep 17 00:00:00 2001 From: Gian Marco Iodice Date: Thu, 17 Nov 2022 11:03:39 +0000 Subject: Implement the OpenCL kernel to compute the indirect convolution - Implement indirect convolution kernel - Add operator support - Add test Resolves COMPMID-5709 Change-Id: I9272304163471a5a40da7fdec204599f3c1d8e32 Signed-off-by: Gian Marco Iodice Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/8701 Comments-Addressed: Arm Jenkins Reviewed-by: Gunes Bayir Tested-by: Arm Jenkins Benchmark: Arm Jenkins --- src/gpu/cl/kernels/ClIndirectConv2dKernel.h | 82 +++++++++++++++++++++++++++++ 1 file changed, 82 insertions(+) create mode 100644 src/gpu/cl/kernels/ClIndirectConv2dKernel.h (limited to 'src/gpu/cl/kernels/ClIndirectConv2dKernel.h') diff --git a/src/gpu/cl/kernels/ClIndirectConv2dKernel.h b/src/gpu/cl/kernels/ClIndirectConv2dKernel.h new file mode 100644 index 0000000000..d86029c5c9 --- /dev/null +++ b/src/gpu/cl/kernels/ClIndirectConv2dKernel.h @@ -0,0 +1,82 @@ +/* + * Copyright (c) 2022 Arm Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#ifndef ARM_COMPUTE_CL_DIRECT_CONV2D_KERNEL_H +#define ARM_COMPUTE_CL_DIRECT_CONV2D_KERNEL_H + +#include "src/core/common/Macros.h" +#include "src/gpu/cl/ClCompileContext.h" +#include "src/gpu/cl/IClKernel.h" + +namespace arm_compute +{ +// Forward declaration +struct DirectConvComputeKernelInfo; + +namespace opencl +{ +namespace kernels +{ +/** Interface for the indirect convolution kernel. */ +class ClIndirectConv2dKernel : public IClKernel +{ +public: + ClIndirectConv2dKernel(); + ARM_COMPUTE_DISALLOW_COPY_ALLOW_MOVE(ClIndirectConv2dKernel); + /** Set the src, offset, weights, biases and dst tensors info. + * + * @param[in] compile_context The compile context to be used. + * @param[in] src The src tensor info to convolve. 3 lower dimensions represent a single src [IFM, width, height], + * while every optional dimension from 4 and above represent a batch of inputs. Data types supported: F16/F32. + * @param[in] off The indirect buffer tensor info. Data types supported: S32. + * @param[in] weights Weights tensor info. Weights are 4D tensor with dimensions [IFM, kernel_x, kernel_y, OFM]. + * Data type supported: Same as @p src. + * @param[in] biases Biases tensor info. Biases are 1D tensor with dimension [OFM]. + * Data type supported: Same as @p src. + * @param[out] dst Output tensor info. + * The 3rd dimension must be equal to the 4th dimension of the @p weights tensor. Data types supported: Same as @p src. + * @param[in] conv_info Contains padding and stride information described in @ref PadStrideInfo. + * @param[in] act_info Contains activaton information described in @ref ActivationLayerInfo. + * @param[in] desc Direct convolution descriptor used to build the NHWC indirect convolution kernel. + */ + void configure(const CLCompileContext &compile_context, ITensorInfo *src, ITensorInfo *off, ITensorInfo *weights, ITensorInfo *biases, ITensorInfo *dst, + const PadStrideInfo &conv_info, const ActivationLayerInfo &act_info, const DirectConvComputeKernelInfo &desc); + /** Static function to check if given info will lead to a valid configuration + * + * Similar to ClIndirectConv2dKernel::configure() + * + * @return a status + */ + static Status validate(const ITensorInfo *src, const ITensorInfo *off, const ITensorInfo *weights, const ITensorInfo *biases, const ITensorInfo *dst, + const PadStrideInfo &conv_info, const ActivationLayerInfo &act_info, const DirectConvComputeKernelInfo &desc); + + // Inherited methods overridden: + void run_op(ITensorPack &tensors, const Window &window, cl::CommandQueue &queue) override; + +public: + bool _export_to_cl_image{ false }; +}; +} // namespace kernels +} // namespace opencl +} // namespace arm_compute +#endif /* ARM_COMPUTE_CL_DIRECT_CONV2D_KERNEL_H */ -- cgit v1.2.1