From c4270cf958e85e0c41590030e1f9e228493a5ba0 Mon Sep 17 00:00:00 2001 From: SiCongLi Date: Wed, 22 Dec 2021 11:22:40 +0000 Subject: Add tests for FP Cpu Pooling where pool region is completely outside the input * Add floating point validation tests for this configuration * Fix reference implementation to return -inf for this configuration * Prohibit this config in Cl, as well as non-float cases in Cpu * Direct this config to non-asm path Resolves COMPMID-4998 Change-Id: If88025c51b14ea337aea2441c548f858e95e5819 Signed-off-by: SiCongLi Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/6857 Reviewed-by: Gunes Bayir Tested-by: Arm Jenkins Comments-Addressed: Arm Jenkins --- src/cpu/kernels/CpuPool2dKernel.cpp | 4 ++++ src/cpu/kernels/internal/CpuPool2dAssemblyWrapperKernel.cpp | 5 +---- 2 files changed, 5 insertions(+), 4 deletions(-) (limited to 'src/cpu/kernels') diff --git a/src/cpu/kernels/CpuPool2dKernel.cpp b/src/cpu/kernels/CpuPool2dKernel.cpp index 00b1ac76f5..f61cd0835d 100644 --- a/src/cpu/kernels/CpuPool2dKernel.cpp +++ b/src/cpu/kernels/CpuPool2dKernel.cpp @@ -199,6 +199,10 @@ Status validate_arguments(const ITensorInfo *src, const ITensorInfo *dst, const const int idx_width = get_data_layout_dimension_index(data_layout, DataLayoutDimension::WIDTH); const int idx_height = get_data_layout_dimension_index(data_layout, DataLayoutDimension::HEIGHT); + ARM_COMPUTE_RETURN_ERROR_ON_MSG((!is_data_type_float(src->data_type())) + && (is_pool_region_entirely_outside_input(pool_info)), + "Pooling region that is entirely outside input tensor is unsupported for non-float types"); + std::tie(output_width, output_height) = scaled_dimensions_signed(src->tensor_shape()[idx_width], src->tensor_shape()[idx_height], pool_size.x(), pool_size.y(), pool_info.pad_stride_info); ARM_COMPUTE_RETURN_ERROR_ON_MSG((output_width < 1 || output_height < 1), "Calculated output dimension size is invalid"); diff --git a/src/cpu/kernels/internal/CpuPool2dAssemblyWrapperKernel.cpp b/src/cpu/kernels/internal/CpuPool2dAssemblyWrapperKernel.cpp index 8610bc7f43..a8c6a5e611 100644 --- a/src/cpu/kernels/internal/CpuPool2dAssemblyWrapperKernel.cpp +++ b/src/cpu/kernels/internal/CpuPool2dAssemblyWrapperKernel.cpp @@ -104,10 +104,7 @@ Status CpuPool2dAssemblyWrapperKernel::validate(const ITensorInfo *src, const IT ARM_COMPUTE_RETURN_ERROR_ON_MSG((info.pool_type != PoolingType::AVG) && (info.pool_type != PoolingType::MAX), "Only AVG and MAX pooling are supported by assembly kernels"); - const auto ps = info.pad_stride_info; - const auto max_padding = std::max({ ps.pad_left(), ps.pad_right(), ps.pad_top(), ps.pad_bottom() }); - const auto min_pool_sz = std::min(info.pool_size.x(), info.pool_size.y()); - ARM_COMPUTE_RETURN_ERROR_ON_MSG(max_padding > min_pool_sz, "Convolution padding greater than pool size is unsupported by assembly kernels"); + ARM_COMPUTE_RETURN_ERROR_ON_MSG(is_pool_region_entirely_outside_input(info), "Pooling region that is entirely outside input tensor is unsupported by assembly kernels"); if(dst->total_size() > 0) { -- cgit v1.2.1