From 7d9a626aaba9837cb82d189a9c4f0bcef58825bb Mon Sep 17 00:00:00 2001 From: Michael Tyler Date: Wed, 1 Feb 2023 16:37:07 +0000 Subject: Update CPU kernels to remove x19 and w19 Resolves: COMPMID-5805 Change-Id: Idf720bbb136474810086f5089c5ed23b3f79835a Signed-off-by: Michael Tyler Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/9081 Benchmark: Arm Jenkins Tested-by: Arm Jenkins Comments-Addressed: Arm Jenkins Reviewed-by: Gunes Bayir Reviewed-by: Viet-Hoa Do --- src/cpu/kernels/activation/generic/neon/lut.cpp | 456 ++++++++++++------------ src/cpu/kernels/activation/generic/sve/lut.cpp | 332 ++++++++--------- 2 files changed, 394 insertions(+), 394 deletions(-) (limited to 'src/cpu/kernels/activation/generic') diff --git a/src/cpu/kernels/activation/generic/neon/lut.cpp b/src/cpu/kernels/activation/generic/neon/lut.cpp index b5c29ce07b..8ceb7d8cbc 100644 --- a/src/cpu/kernels/activation/generic/neon/lut.cpp +++ b/src/cpu/kernels/activation/generic/neon/lut.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022 Arm Limited. + * Copyright (c) 2022-2023 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -45,7 +45,7 @@ void substitute_bytes_neon( __asm__ __volatile__( "ldr q16, [%x[table], #0x0]\n" "ldr q17, [%x[table], #0x10]\n" - "mov x22, #0x0\n" + "mov x23, #0x0\n" "ldr q18, [%x[table], #0x20]\n" "ldr q19, [%x[table], #0x30]\n" "ldr q20, [%x[table], #0x40]\n" @@ -61,351 +61,351 @@ void substitute_bytes_neon( "ldr q30, [%x[table], #0xe0]\n" "ldr q31, [%x[table], #0xf0]\n" "1:" // string loop - "ldr x21, [%x[input], x22, LSL #0x3]\n" - "ldr x20, [%x[output], x22, LSL #0x3]\n" - "movi v12.16b, #0x40\n" - "movi v11.16b, #0x80\n" - "movi v10.16b, #0xc0\n" - "mov x19, %x[string_length]\n" + "ldr x22, [%x[input], x23, LSL #0x3]\n" + "ldr x21, [%x[output], x23, LSL #0x3]\n" + "movi v11.16b, #0x40\n" + "movi v10.16b, #0x80\n" + "movi v9.16b, #0xc0\n" + "mov x20, %x[string_length]\n" "2:" // 4 rounds: width loop - "cmp x19, #0x30\n" + "cmp x20, #0x30\n" "bge 27f\n" - "tbz x19, #5, 10f\n" - "ld1 { v9.16b }, [x21], #0x10\n" - "ld1 { v13.16b }, [x21], #0x10\n" - "tbz x19, #3, 6f\n" - "ldr d14, [x21], #0x8\n" - "tbz x19, #2, 4f\n" - "ld1 { v14.s }[2], [x21], #0x4\n" - "tbz x19, #1, 3f\n" - "ld1 { v14.h }[6], [x21], #0x2\n" - "tbz x19, #0, 26f\n" - "ld1 { v14.b }[14], [x21]\n" + "tbz x20, #5, 10f\n" + "ld1 { v8.16b }, [x22], #0x10\n" + "ld1 { v13.16b }, [x22], #0x10\n" + "tbz x20, #3, 6f\n" + "ldr d12, [x22], #0x8\n" + "tbz x20, #2, 4f\n" + "ld1 { v12.s }[2], [x22], #0x4\n" + "tbz x20, #1, 3f\n" + "ld1 { v12.h }[6], [x22], #0x2\n" + "tbz x20, #0, 26f\n" + "ld1 { v12.b }[14], [x22]\n" "b 26f\n" "3:" // 4 rounds: Partial load: partial_1_44 - "tbz x19, #0, 26f\n" - "ld1 { v14.b }[12], [x21]\n" + "tbz x20, #0, 26f\n" + "ld1 { v12.b }[12], [x22]\n" "b 26f\n" "4:" // 4 rounds: Partial load: partial_2_40 - "tbz x19, #1, 5f\n" - "ld1 { v14.h }[4], [x21], #0x2\n" - "tbz x19, #0, 26f\n" - "ld1 { v14.b }[10], [x21]\n" + "tbz x20, #1, 5f\n" + "ld1 { v12.h }[4], [x22], #0x2\n" + "tbz x20, #0, 26f\n" + "ld1 { v12.b }[10], [x22]\n" "b 26f\n" "5:" // 4 rounds: Partial load: partial_1_40 - "tbz x19, #0, 26f\n" - "ld1 { v14.b }[8], [x21]\n" + "tbz x20, #0, 26f\n" + "ld1 { v12.b }[8], [x22]\n" "b 26f\n" "6:" // 4 rounds: Partial load: partial_4_32 - "tbz x19, #2, 8f\n" - "ldr s14, [x21], #0x4\n" - "tbz x19, #1, 7f\n" - "ld1 { v14.h }[2], [x21], #0x2\n" - "tbz x19, #0, 26f\n" - "ld1 { v14.b }[6], [x21]\n" + "tbz x20, #2, 8f\n" + "ldr s12, [x22], #0x4\n" + "tbz x20, #1, 7f\n" + "ld1 { v12.h }[2], [x22], #0x2\n" + "tbz x20, #0, 26f\n" + "ld1 { v12.b }[6], [x22]\n" "b 26f\n" "7:" // 4 rounds: Partial load: partial_1_36 - "tbz x19, #0, 26f\n" - "ld1 { v14.b }[4], [x21]\n" + "tbz x20, #0, 26f\n" + "ld1 { v12.b }[4], [x22]\n" "b 26f\n" "8:" // 4 rounds: Partial load: partial_2_32 - "tbz x19, #1, 9f\n" - "ldr h14, [x21], #0x2\n" - "tbz x19, #0, 26f\n" - "ld1 { v14.b }[2], [x21]\n" + "tbz x20, #1, 9f\n" + "ldr h12, [x22], #0x2\n" + "tbz x20, #0, 26f\n" + "ld1 { v12.b }[2], [x22]\n" "b 26f\n" "9:" // 4 rounds: Partial load: partial_1_32 - "tbz x19, #0, 26f\n" - "ldr b14, [x21, #0x0]\n" + "tbz x20, #0, 26f\n" + "ldr b12, [x22, #0x0]\n" "b 26f\n" "10:" // 4 rounds: Partial load: partial_16_0 - "tbz x19, #4, 18f\n" - "ld1 { v9.16b }, [x21], #0x10\n" - "tbz x19, #3, 14f\n" - "ldr d13, [x21], #0x8\n" - "tbz x19, #2, 12f\n" - "ld1 { v13.s }[2], [x21], #0x4\n" - "tbz x19, #1, 11f\n" - "ld1 { v13.h }[6], [x21], #0x2\n" - "tbz x19, #0, 26f\n" - "ld1 { v13.b }[14], [x21]\n" + "tbz x20, #4, 18f\n" + "ld1 { v8.16b }, [x22], #0x10\n" + "tbz x20, #3, 14f\n" + "ldr d13, [x22], #0x8\n" + "tbz x20, #2, 12f\n" + "ld1 { v13.s }[2], [x22], #0x4\n" + "tbz x20, #1, 11f\n" + "ld1 { v13.h }[6], [x22], #0x2\n" + "tbz x20, #0, 26f\n" + "ld1 { v13.b }[14], [x22]\n" "b 26f\n" "11:" // 4 rounds: Partial load: partial_1_28 - "tbz x19, #0, 26f\n" - "ld1 { v13.b }[12], [x21]\n" + "tbz x20, #0, 26f\n" + "ld1 { v13.b }[12], [x22]\n" "b 26f\n" "12:" // 4 rounds: Partial load: partial_2_24 - "tbz x19, #1, 13f\n" - "ld1 { v13.h }[4], [x21], #0x2\n" - "tbz x19, #0, 26f\n" - "ld1 { v13.b }[10], [x21]\n" + "tbz x20, #1, 13f\n" + "ld1 { v13.h }[4], [x22], #0x2\n" + "tbz x20, #0, 26f\n" + "ld1 { v13.b }[10], [x22]\n" "b 26f\n" "13:" // 4 rounds: Partial load: partial_1_24 - "tbz x19, #0, 26f\n" - "ld1 { v13.b }[8], [x21]\n" + "tbz x20, #0, 26f\n" + "ld1 { v13.b }[8], [x22]\n" "b 26f\n" "14:" // 4 rounds: Partial load: partial_4_16 - "tbz x19, #2, 16f\n" - "ldr s13, [x21], #0x4\n" - "tbz x19, #1, 15f\n" - "ld1 { v13.h }[2], [x21], #0x2\n" - "tbz x19, #0, 26f\n" - "ld1 { v13.b }[6], [x21]\n" + "tbz x20, #2, 16f\n" + "ldr s13, [x22], #0x4\n" + "tbz x20, #1, 15f\n" + "ld1 { v13.h }[2], [x22], #0x2\n" + "tbz x20, #0, 26f\n" + "ld1 { v13.b }[6], [x22]\n" "b 26f\n" "15:" // 4 rounds: Partial load: partial_1_20 - "tbz x19, #0, 26f\n" - "ld1 { v13.b }[4], [x21]\n" + "tbz x20, #0, 26f\n" + "ld1 { v13.b }[4], [x22]\n" "b 26f\n" "16:" // 4 rounds: Partial load: partial_2_16 - "tbz x19, #1, 17f\n" - "ldr h13, [x21], #0x2\n" - "tbz x19, #0, 26f\n" - "ld1 { v13.b }[2], [x21]\n" + "tbz x20, #1, 17f\n" + "ldr h13, [x22], #0x2\n" + "tbz x20, #0, 26f\n" + "ld1 { v13.b }[2], [x22]\n" "b 26f\n" "17:" // 4 rounds: Partial load: partial_1_16 - "tbz x19, #0, 26f\n" - "ldr b13, [x21, #0x0]\n" + "tbz x20, #0, 26f\n" + "ldr b13, [x22, #0x0]\n" "b 26f\n" "18:" // 4 rounds: Partial load: partial_8_0 - "tbz x19, #3, 22f\n" - "ldr d9, [x21], #0x8\n" - "tbz x19, #2, 20f\n" - "ld1 { v9.s }[2], [x21], #0x4\n" - "tbz x19, #1, 19f\n" - "ld1 { v9.h }[6], [x21], #0x2\n" - "tbz x19, #0, 26f\n" - "ld1 { v9.b }[14], [x21]\n" + "tbz x20, #3, 22f\n" + "ldr d8, [x22], #0x8\n" + "tbz x20, #2, 20f\n" + "ld1 { v8.s }[2], [x22], #0x4\n" + "tbz x20, #1, 19f\n" + "ld1 { v8.h }[6], [x22], #0x2\n" + "tbz x20, #0, 26f\n" + "ld1 { v8.b }[14], [x22]\n" "b 26f\n" "19:" // 4 rounds: Partial load: partial_1_12 - "tbz x19, #0, 26f\n" - "ld1 { v9.b }[12], [x21]\n" + "tbz x20, #0, 26f\n" + "ld1 { v8.b }[12], [x22]\n" "b 26f\n" "20:" // 4 rounds: Partial load: partial_2_8 - "tbz x19, #1, 21f\n" - "ld1 { v9.h }[4], [x21], #0x2\n" - "tbz x19, #0, 26f\n" - "ld1 { v9.b }[10], [x21]\n" + "tbz x20, #1, 21f\n" + "ld1 { v8.h }[4], [x22], #0x2\n" + "tbz x20, #0, 26f\n" + "ld1 { v8.b }[10], [x22]\n" "b 26f\n" "21:" // 4 rounds: Partial load: partial_1_8 - "tbz x19, #0, 26f\n" - "ld1 { v9.b }[8], [x21]\n" + "tbz x20, #0, 26f\n" + "ld1 { v8.b }[8], [x22]\n" "b 26f\n" "22:" // 4 rounds: Partial load: partial_4_0 - "tbz x19, #2, 24f\n" - "ldr s9, [x21], #0x4\n" - "tbz x19, #1, 23f\n" - "ld1 { v9.h }[2], [x21], #0x2\n" - "tbz x19, #0, 26f\n" - "ld1 { v9.b }[6], [x21]\n" + "tbz x20, #2, 24f\n" + "ldr s8, [x22], #0x4\n" + "tbz x20, #1, 23f\n" + "ld1 { v8.h }[2], [x22], #0x2\n" + "tbz x20, #0, 26f\n" + "ld1 { v8.b }[6], [x22]\n" "b 26f\n" "23:" // 4 rounds: Partial load: partial_1_4 - "tbz x19, #0, 26f\n" - "ld1 { v9.b }[4], [x21]\n" + "tbz x20, #0, 26f\n" + "ld1 { v8.b }[4], [x22]\n" "b 26f\n" "24:" // 4 rounds: Partial load: partial_2_0 - "tbz x19, #1, 25f\n" - "ldr h9, [x21], #0x2\n" - "tbz x19, #0, 26f\n" - "ld1 { v9.b }[2], [x21]\n" + "tbz x20, #1, 25f\n" + "ldr h8, [x22], #0x2\n" + "tbz x20, #0, 26f\n" + "ld1 { v8.b }[2], [x22]\n" "b 26f\n" "25:" // 4 rounds: Partial load: partial_1_0 - "ldr b9, [x21, #0x0]\n" + "ldr b8, [x22, #0x0]\n" "26:" // 4 rounds: Partial load: Done "b 28f\n" "27:" // 4 rounds: Full load - "ldr q9, [x21, #0x0]\n" - "ldr q13, [x21, #0x10]\n" - "ldr q14, [x21, #0x20]\n" - "add x21, x21, #0x30\n" + "ldr q8, [x22, #0x0]\n" + "ldr q13, [x22, #0x10]\n" + "ldr q12, [x22, #0x20]\n" + "add x22, x22, #0x30\n" "28:" // 4 rounds: Load done - "sub v8.16b, v9.16b, v12.16b\n" - "sub v7.16b, v9.16b, v11.16b\n" - "tbl v8.16b, { v20.16b, v21.16b, v22.16b, v23.16b }, v8.16b\n" - "sub v6.16b, v9.16b, v10.16b\n" - "sub v5.16b, v13.16b, v12.16b\n" - "tbl v9.16b, { v16.16b, v17.16b, v18.16b, v19.16b }, v9.16b\n" - "sub v4.16b, v13.16b, v11.16b\n" - "sub v3.16b, v13.16b, v10.16b\n" + "sub v0.16b, v8.16b, v11.16b\n" + "sub v7.16b, v8.16b, v10.16b\n" + "tbl v0.16b, { v20.16b, v21.16b, v22.16b, v23.16b }, v0.16b\n" + "sub v6.16b, v8.16b, v9.16b\n" + "sub v5.16b, v13.16b, v11.16b\n" + "tbl v8.16b, { v16.16b, v17.16b, v18.16b, v19.16b }, v8.16b\n" + "sub v4.16b, v13.16b, v10.16b\n" + "sub v3.16b, v13.16b, v9.16b\n" "tbl v7.16b, { v24.16b, v25.16b, v26.16b, v27.16b }, v7.16b\n" - "sub v2.16b, v14.16b, v12.16b\n" - "sub v1.16b, v14.16b, v11.16b\n" + "sub v2.16b, v12.16b, v11.16b\n" + "sub v1.16b, v12.16b, v10.16b\n" "tbl v6.16b, { v28.16b, v29.16b, v30.16b, v31.16b }, v6.16b\n" - "sub v0.16b, v14.16b, v10.16b\n" "tbl v13.16b, { v16.16b, v17.16b, v18.16b, v19.16b }, v13.16b\n" "tbl v5.16b, { v20.16b, v21.16b, v22.16b, v23.16b }, v5.16b\n" + "orr v8.16b, v8.16b, v0.16b\n" + "sub v0.16b, v12.16b, v9.16b\n" "tbl v4.16b, { v24.16b, v25.16b, v26.16b, v27.16b }, v4.16b\n" "tbl v3.16b, { v28.16b, v29.16b, v30.16b, v31.16b }, v3.16b\n" - "orr v9.16b, v9.16b, v8.16b\n" - "tbl v14.16b, { v16.16b, v17.16b, v18.16b, v19.16b }, v14.16b\n" + "tbl v12.16b, { v16.16b, v17.16b, v18.16b, v19.16b }, v12.16b\n" "tbl v2.16b, { v20.16b, v21.16b, v22.16b, v23.16b }, v2.16b\n" "orr v7.16b, v7.16b, v6.16b\n" "tbl v1.16b, { v24.16b, v25.16b, v26.16b, v27.16b }, v1.16b\n" "tbl v0.16b, { v28.16b, v29.16b, v30.16b, v31.16b }, v0.16b\n" "orr v13.16b, v13.16b, v5.16b\n" "orr v4.16b, v4.16b, v3.16b\n" - "orr v14.16b, v14.16b, v2.16b\n" - "cmp x19, #0x30\n" + "orr v12.16b, v12.16b, v2.16b\n" + "cmp x20, #0x30\n" "orr v1.16b, v1.16b, v0.16b\n" - "orr v9.16b, v9.16b, v7.16b\n" + "orr v8.16b, v8.16b, v7.16b\n" "orr v13.16b, v13.16b, v4.16b\n" - "orr v14.16b, v14.16b, v1.16b\n" + "orr v12.16b, v12.16b, v1.16b\n" "bge 53f\n" - "tbz x19, #5, 36f\n" - "st1 { v9.16b }, [x20], #0x10\n" - "st1 { v13.16b }, [x20], #0x10\n" - "tbz x19, #3, 32f\n" - "str d14, [x20], #0x8\n" - "tbz x19, #2, 30f\n" - "st1 { v14.s }[2], [x20], #0x4\n" - "tbz x19, #1, 29f\n" - "st1 { v14.h }[6], [x20], #0x2\n" - "tbz x19, #0, 52f\n" - "st1 { v14.b }[14], [x20]\n" + "tbz x20, #5, 36f\n" + "st1 { v8.16b }, [x21], #0x10\n" + "st1 { v13.16b }, [x21], #0x10\n" + "tbz x20, #3, 32f\n" + "str d12, [x21], #0x8\n" + "tbz x20, #2, 30f\n" + "st1 { v12.s }[2], [x21], #0x4\n" + "tbz x20, #1, 29f\n" + "st1 { v12.h }[6], [x21], #0x2\n" + "tbz x20, #0, 52f\n" + "st1 { v12.b }[14], [x21]\n" "b 52f\n" "29:" // 4 rounds: Partial writeback: partial_1_44 - "tbz x19, #0, 52f\n" - "st1 { v14.b }[12], [x20]\n" + "tbz x20, #0, 52f\n" + "st1 { v12.b }[12], [x21]\n" "b 52f\n" "30:" // 4 rounds: Partial writeback: partial_2_40 - "tbz x19, #1, 31f\n" - "st1 { v14.h }[4], [x20], #0x2\n" - "tbz x19, #0, 52f\n" - "st1 { v14.b }[10], [x20]\n" + "tbz x20, #1, 31f\n" + "st1 { v12.h }[4], [x21], #0x2\n" + "tbz x20, #0, 52f\n" + "st1 { v12.b }[10], [x21]\n" "b 52f\n" "31:" // 4 rounds: Partial writeback: partial_1_40 - "tbz x19, #0, 52f\n" - "st1 { v14.b }[8], [x20]\n" + "tbz x20, #0, 52f\n" + "st1 { v12.b }[8], [x21]\n" "b 52f\n" "32:" // 4 rounds: Partial writeback: partial_4_32 - "tbz x19, #2, 34f\n" - "str s14, [x20], #0x4\n" - "tbz x19, #1, 33f\n" - "st1 { v14.h }[2], [x20], #0x2\n" - "tbz x19, #0, 52f\n" - "st1 { v14.b }[6], [x20]\n" + "tbz x20, #2, 34f\n" + "str s12, [x21], #0x4\n" + "tbz x20, #1, 33f\n" + "st1 { v12.h }[2], [x21], #0x2\n" + "tbz x20, #0, 52f\n" + "st1 { v12.b }[6], [x21]\n" "b 52f\n" "33:" // 4 rounds: Partial writeback: partial_1_36 - "tbz x19, #0, 52f\n" - "st1 { v14.b }[4], [x20]\n" + "tbz x20, #0, 52f\n" + "st1 { v12.b }[4], [x21]\n" "b 52f\n" "34:" // 4 rounds: Partial writeback: partial_2_32 - "tbz x19, #1, 35f\n" - "str h14, [x20], #0x2\n" - "tbz x19, #0, 52f\n" - "st1 { v14.b }[2], [x20]\n" + "tbz x20, #1, 35f\n" + "str h12, [x21], #0x2\n" + "tbz x20, #0, 52f\n" + "st1 { v12.b }[2], [x21]\n" "b 52f\n" "35:" // 4 rounds: Partial writeback: partial_1_32 - "tbz x19, #0, 52f\n" - "str b14, [x20, #0x0]\n" + "tbz x20, #0, 52f\n" + "str b12, [x21, #0x0]\n" "b 52f\n" "36:" // 4 rounds: Partial writeback: partial_16_0 - "tbz x19, #4, 44f\n" - "st1 { v9.16b }, [x20], #0x10\n" - "tbz x19, #3, 40f\n" - "str d13, [x20], #0x8\n" - "tbz x19, #2, 38f\n" - "st1 { v13.s }[2], [x20], #0x4\n" - "tbz x19, #1, 37f\n" - "st1 { v13.h }[6], [x20], #0x2\n" - "tbz x19, #0, 52f\n" - "st1 { v13.b }[14], [x20]\n" + "tbz x20, #4, 44f\n" + "st1 { v8.16b }, [x21], #0x10\n" + "tbz x20, #3, 40f\n" + "str d13, [x21], #0x8\n" + "tbz x20, #2, 38f\n" + "st1 { v13.s }[2], [x21], #0x4\n" + "tbz x20, #1, 37f\n" + "st1 { v13.h }[6], [x21], #0x2\n" + "tbz x20, #0, 52f\n" + "st1 { v13.b }[14], [x21]\n" "b 52f\n" "37:" // 4 rounds: Partial writeback: partial_1_28 - "tbz x19, #0, 52f\n" - "st1 { v13.b }[12], [x20]\n" + "tbz x20, #0, 52f\n" + "st1 { v13.b }[12], [x21]\n" "b 52f\n" "38:" // 4 rounds: Partial writeback: partial_2_24 - "tbz x19, #1, 39f\n" - "st1 { v13.h }[4], [x20], #0x2\n" - "tbz x19, #0, 52f\n" - "st1 { v13.b }[10], [x20]\n" + "tbz x20, #1, 39f\n" + "st1 { v13.h }[4], [x21], #0x2\n" + "tbz x20, #0, 52f\n" + "st1 { v13.b }[10], [x21]\n" "b 52f\n" "39:" // 4 rounds: Partial writeback: partial_1_24 - "tbz x19, #0, 52f\n" - "st1 { v13.b }[8], [x20]\n" + "tbz x20, #0, 52f\n" + "st1 { v13.b }[8], [x21]\n" "b 52f\n" "40:" // 4 rounds: Partial writeback: partial_4_16 - "tbz x19, #2, 42f\n" - "str s13, [x20], #0x4\n" - "tbz x19, #1, 41f\n" - "st1 { v13.h }[2], [x20], #0x2\n" - "tbz x19, #0, 52f\n" - "st1 { v13.b }[6], [x20]\n" + "tbz x20, #2, 42f\n" + "str s13, [x21], #0x4\n" + "tbz x20, #1, 41f\n" + "st1 { v13.h }[2], [x21], #0x2\n" + "tbz x20, #0, 52f\n" + "st1 { v13.b }[6], [x21]\n" "b 52f\n" "41:" // 4 rounds: Partial writeback: partial_1_20 - "tbz x19, #0, 52f\n" - "st1 { v13.b }[4], [x20]\n" + "tbz x20, #0, 52f\n" + "st1 { v13.b }[4], [x21]\n" "b 52f\n" "42:" // 4 rounds: Partial writeback: partial_2_16 - "tbz x19, #1, 43f\n" - "str h13, [x20], #0x2\n" - "tbz x19, #0, 52f\n" - "st1 { v13.b }[2], [x20]\n" + "tbz x20, #1, 43f\n" + "str h13, [x21], #0x2\n" + "tbz x20, #0, 52f\n" + "st1 { v13.b }[2], [x21]\n" "b 52f\n" "43:" // 4 rounds: Partial writeback: partial_1_16 - "tbz x19, #0, 52f\n" - "str b13, [x20, #0x0]\n" + "tbz x20, #0, 52f\n" + "str b13, [x21, #0x0]\n" "b 52f\n" "44:" // 4 rounds: Partial writeback: partial_8_0 - "tbz x19, #3, 48f\n" - "str d9, [x20], #0x8\n" - "tbz x19, #2, 46f\n" - "st1 { v9.s }[2], [x20], #0x4\n" - "tbz x19, #1, 45f\n" - "st1 { v9.h }[6], [x20], #0x2\n" - "tbz x19, #0, 52f\n" - "st1 { v9.b }[14], [x20]\n" + "tbz x20, #3, 48f\n" + "str d8, [x21], #0x8\n" + "tbz x20, #2, 46f\n" + "st1 { v8.s }[2], [x21], #0x4\n" + "tbz x20, #1, 45f\n" + "st1 { v8.h }[6], [x21], #0x2\n" + "tbz x20, #0, 52f\n" + "st1 { v8.b }[14], [x21]\n" "b 52f\n" "45:" // 4 rounds: Partial writeback: partial_1_12 - "tbz x19, #0, 52f\n" - "st1 { v9.b }[12], [x20]\n" + "tbz x20, #0, 52f\n" + "st1 { v8.b }[12], [x21]\n" "b 52f\n" "46:" // 4 rounds: Partial writeback: partial_2_8 - "tbz x19, #1, 47f\n" - "st1 { v9.h }[4], [x20], #0x2\n" - "tbz x19, #0, 52f\n" - "st1 { v9.b }[10], [x20]\n" + "tbz x20, #1, 47f\n" + "st1 { v8.h }[4], [x21], #0x2\n" + "tbz x20, #0, 52f\n" + "st1 { v8.b }[10], [x21]\n" "b 52f\n" "47:" // 4 rounds: Partial writeback: partial_1_8 - "tbz x19, #0, 52f\n" - "st1 { v9.b }[8], [x20]\n" + "tbz x20, #0, 52f\n" + "st1 { v8.b }[8], [x21]\n" "b 52f\n" "48:" // 4 rounds: Partial writeback: partial_4_0 - "tbz x19, #2, 50f\n" - "str s9, [x20], #0x4\n" - "tbz x19, #1, 49f\n" - "st1 { v9.h }[2], [x20], #0x2\n" - "tbz x19, #0, 52f\n" - "st1 { v9.b }[6], [x20]\n" + "tbz x20, #2, 50f\n" + "str s8, [x21], #0x4\n" + "tbz x20, #1, 49f\n" + "st1 { v8.h }[2], [x21], #0x2\n" + "tbz x20, #0, 52f\n" + "st1 { v8.b }[6], [x21]\n" "b 52f\n" "49:" // 4 rounds: Partial writeback: partial_1_4 - "tbz x19, #0, 52f\n" - "st1 { v9.b }[4], [x20]\n" + "tbz x20, #0, 52f\n" + "st1 { v8.b }[4], [x21]\n" "b 52f\n" "50:" // 4 rounds: Partial writeback: partial_2_0 - "tbz x19, #1, 51f\n" - "str h9, [x20], #0x2\n" - "tbz x19, #0, 52f\n" - "st1 { v9.b }[2], [x20]\n" + "tbz x20, #1, 51f\n" + "str h8, [x21], #0x2\n" + "tbz x20, #0, 52f\n" + "st1 { v8.b }[2], [x21]\n" "b 52f\n" "51:" // 4 rounds: Partial writeback: partial_1_0 - "str b9, [x20, #0x0]\n" + "str b8, [x21, #0x0]\n" "52:" // 4 rounds: Partial writeback: Done "b 54f\n" "53:" // 4 rounds: Full writeback - "str q9, [x20, #0x0]\n" - "str q13, [x20, #0x10]\n" - "str q14, [x20, #0x20]\n" - "add x20, x20, #0x30\n" + "str q8, [x21, #0x0]\n" + "str q13, [x21, #0x10]\n" + "str q12, [x21, #0x20]\n" + "add x21, x21, #0x30\n" "54:" // 4 rounds: Writeback done - "subs x19, x19, #0x30\n" + "subs x20, x20, #0x30\n" "bgt 2b\n" - "add x22, x22, #0x1\n" - "cmp x22, %x[num_strings]\n" + "add x23, x23, #0x1\n" + "cmp x23, %x[num_strings]\n" "bne 1b\n" : : [input] "r"(input), [num_strings] "r"(num_strings), [output] "r"(output), [string_length] "r"(string_length), [table] "r"(table) - : "cc", "memory", "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x19", "x20", "x21", "x22"); + : "cc", "memory", "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x20", "x21", "x22", "x23"); } #endif // __aarch64__ @@ -415,8 +415,8 @@ void substitute_bytes_neon( void neon_q8_activation_lut(const ITensor *src, ITensor *dst, const ActivationLayerInfo &act_info, const Window &window) { ARM_COMPUTE_ERROR_ON(!ActivationLayerInfo::is_lut_supported(act_info.activation(), src->info()->data_type())); - const auto window_end_x = window.x().end(); - Window win_collapsed = window.collapse_if_possible(window, Window::DimZ); + const auto window_end_x = window.x().end(); + Window win_collapsed = window.collapse_if_possible(window, Window::DimZ); win_collapsed.set(Window::DimX, Window::Dimension(0, 1, 1)); Iterator input(src, win_collapsed); Iterator output(dst, win_collapsed); diff --git a/src/cpu/kernels/activation/generic/sve/lut.cpp b/src/cpu/kernels/activation/generic/sve/lut.cpp index a31c0020a6..b73c87e319 100644 --- a/src/cpu/kernels/activation/generic/sve/lut.cpp +++ b/src/cpu/kernels/activation/generic/sve/lut.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022 Arm Limited. + * Copyright (c) 2022-2023 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -43,20 +43,20 @@ void substitute_bytes_sve( { __asm__ __volatile__( "ptrue p0.b\n" - "cntd x24\n" + "cntd x25\n" "addvl %x[table], %x[table], #8\n" "ld1b { z16.b }, p0/Z, [%x[table], #-8, MUL VL]\n" - "tbnz x24, #5, 1f\n" + "tbnz x25, #5, 1f\n" "ld1b { z17.b }, p0/Z, [%x[table], #-7, MUL VL]\n" - "tbnz x24, #4, 1f\n" + "tbnz x25, #4, 1f\n" "ld1b { z18.b }, p0/Z, [%x[table], #-6, MUL VL]\n" "ld1b { z19.b }, p0/Z, [%x[table], #-5, MUL VL]\n" - "tbnz x24, #3, 1f\n" + "tbnz x25, #3, 1f\n" "ld1b { z20.b }, p0/Z, [%x[table], #-4, MUL VL]\n" "ld1b { z21.b }, p0/Z, [%x[table], #-3, MUL VL]\n" "ld1b { z22.b }, p0/Z, [%x[table], #-2, MUL VL]\n" "ld1b { z23.b }, p0/Z, [%x[table], #-1, MUL VL]\n" - "tbnz x24, #2, 1f\n" + "tbnz x25, #2, 1f\n" "ld1b { z24.b }, p0/Z, [%x[table]]\n" "ld1b { z25.b }, p0/Z, [%x[table], #1, MUL VL]\n" "ld1b { z26.b }, p0/Z, [%x[table], #2, MUL VL]\n" @@ -66,16 +66,16 @@ void substitute_bytes_sve( "ld1b { z30.b }, p0/Z, [%x[table], #6, MUL VL]\n" "ld1b { z31.b }, p0/Z, [%x[table], #7, MUL VL]\n" "1:" // Table load done - "mov x23, #0x0\n" + "mov x24, #0x0\n" "2:" // string loop - "ldr x22, [%x[input], x23, LSL #0x3]\n" - "ldr x21, [%x[output], x23, LSL #0x3]\n" - "tbnz x24, #5, 14f\n" - "tbnz x24, #4, 11f\n" - "tbnz x24, #3, 8f\n" - "tbnz x24, #2, 5f\n" + "ldr x23, [%x[input], x24, LSL #0x3]\n" + "ldr x22, [%x[output], x24, LSL #0x3]\n" + "tbnz x25, #5, 14f\n" + "tbnz x25, #4, 11f\n" + "tbnz x25, #3, 8f\n" + "tbnz x25, #2, 5f\n" "mov z12.b, #0x10\n" - "mov x20, %x[string_length]\n" + "mov x21, %x[string_length]\n" "ptrue p5.b\n" "ptrue p4.b\n" "ptrue p3.b\n" @@ -83,30 +83,30 @@ void substitute_bytes_sve( "ptrue p1.b\n" "ptrue p0.b\n" "3:" // 16 rounds: width loop - "addvl x19, x20, #-6\n" - "cmp x19, XZR\n" + "addvl x20, x21, #-6\n" + "cmp x20, XZR\n" "bge 4f\n" - "mov x19, #0x0\n" - "addvl x19, x19, #1\n" - "whilelt p5.b, XZR, x20\n" - "whilelt p4.b, x19, x20\n" - "addvl x19, x19, #1\n" - "whilelt p3.b, x19, x20\n" - "addvl x19, x19, #1\n" - "whilelt p2.b, x19, x20\n" - "addvl x19, x19, #1\n" - "whilelt p1.b, x19, x20\n" - "addvl x19, x19, #1\n" - "whilelt p0.b, x19, x20\n" + "mov x20, #0x0\n" + "addvl x20, x20, #1\n" + "whilelt p5.b, XZR, x21\n" + "whilelt p4.b, x20, x21\n" + "addvl x20, x20, #1\n" + "whilelt p3.b, x20, x21\n" + "addvl x20, x20, #1\n" + "whilelt p2.b, x20, x21\n" + "addvl x20, x20, #1\n" + "whilelt p1.b, x20, x21\n" + "addvl x20, x20, #1\n" + "whilelt p0.b, x20, x21\n" "4:" // 16 rounds: predicate OK - "ld1b { z11.b }, p5/Z, [x22]\n" - "ld1b { z10.b }, p4/Z, [x22, #1, MUL VL]\n" + "ld1b { z11.b }, p5/Z, [x23]\n" + "ld1b { z10.b }, p4/Z, [x23, #1, MUL VL]\n" "tbl z9.b, { z16.b }, z11.b\n" - "ld1b { z8.b }, p3/Z, [x22, #2, MUL VL]\n" - "ld1b { z7.b }, p2/Z, [x22, #3, MUL VL]\n" + "ld1b { z8.b }, p3/Z, [x23, #2, MUL VL]\n" + "ld1b { z7.b }, p2/Z, [x23, #3, MUL VL]\n" "sub z11.b, z11.b, z12.b\n" - "ld1b { z6.b }, p1/Z, [x22, #4, MUL VL]\n" - "ld1b { z5.b }, p0/Z, [x22, #5, MUL VL]\n" + "ld1b { z6.b }, p1/Z, [x23, #4, MUL VL]\n" + "ld1b { z5.b }, p0/Z, [x23, #5, MUL VL]\n" "tbl z4.b, { z16.b }, z10.b\n" "sub z10.b, z10.b, z12.b\n" "tbl z3.b, { z16.b }, z8.b\n" @@ -273,7 +273,7 @@ void substitute_bytes_sve( "sub z6.b, z6.b, z12.b\n" ".inst 0x05252fa0 // tbx z0.b, z29.b, z5.b\n" "sub z5.b, z5.b, z12.b\n" - "addvl x20, x20, #-6\n" + "addvl x21, x21, #-6\n" ".inst 0x052b2fc9 // tbx z9.b, z30.b, z11.b\n" "sub z11.b, z11.b, z12.b\n" ".inst 0x052a2fc4 // tbx z4.b, z30.b, z10.b\n" @@ -286,26 +286,26 @@ void substitute_bytes_sve( "sub z6.b, z6.b, z12.b\n" ".inst 0x05252fc0 // tbx z0.b, z30.b, z5.b\n" "sub z5.b, z5.b, z12.b\n" - "cmp x20, XZR\n" + "cmp x21, XZR\n" ".inst 0x052b2fe9 // tbx z9.b, z31.b, z11.b\n" ".inst 0x052a2fe4 // tbx z4.b, z31.b, z10.b\n" ".inst 0x05282fe3 // tbx z3.b, z31.b, z8.b\n" - "st1b { z9.b }, p5, [x21]\n" + "st1b { z9.b }, p5, [x22]\n" ".inst 0x05272fe2 // tbx z2.b, z31.b, z7.b\n" ".inst 0x05262fe1 // tbx z1.b, z31.b, z6.b\n" - "st1b { z4.b }, p4, [x21, #1, MUL VL]\n" + "st1b { z4.b }, p4, [x22, #1, MUL VL]\n" ".inst 0x05252fe0 // tbx z0.b, z31.b, z5.b\n" - "st1b { z3.b }, p3, [x21, #2, MUL VL]\n" + "st1b { z3.b }, p3, [x22, #2, MUL VL]\n" + "addvl x23, x23, #6\n" + "st1b { z2.b }, p2, [x22, #3, MUL VL]\n" + "st1b { z1.b }, p1, [x22, #4, MUL VL]\n" + "st1b { z0.b }, p0, [x22, #5, MUL VL]\n" "addvl x22, x22, #6\n" - "st1b { z2.b }, p2, [x21, #3, MUL VL]\n" - "st1b { z1.b }, p1, [x21, #4, MUL VL]\n" - "st1b { z0.b }, p0, [x21, #5, MUL VL]\n" - "addvl x21, x21, #6\n" "bgt 3b\n" "b 17f\n" "5:" // 256 bits "mov z12.b, #0x20\n" - "mov x20, %x[string_length]\n" + "mov x21, %x[string_length]\n" "ptrue p5.b\n" "ptrue p4.b\n" "ptrue p3.b\n" @@ -313,30 +313,30 @@ void substitute_bytes_sve( "ptrue p1.b\n" "ptrue p0.b\n" "6:" // 8 rounds: width loop - "addvl x19, x20, #-6\n" - "cmp x19, XZR\n" + "addvl x20, x21, #-6\n" + "cmp x20, XZR\n" "bge 7f\n" - "mov x19, #0x0\n" - "addvl x19, x19, #1\n" - "whilelt p5.b, XZR, x20\n" - "whilelt p4.b, x19, x20\n" - "addvl x19, x19, #1\n" - "whilelt p3.b, x19, x20\n" - "addvl x19, x19, #1\n" - "whilelt p2.b, x19, x20\n" - "addvl x19, x19, #1\n" - "whilelt p1.b, x19, x20\n" - "addvl x19, x19, #1\n" - "whilelt p0.b, x19, x20\n" + "mov x20, #0x0\n" + "addvl x20, x20, #1\n" + "whilelt p5.b, XZR, x21\n" + "whilelt p4.b, x20, x21\n" + "addvl x20, x20, #1\n" + "whilelt p3.b, x20, x21\n" + "addvl x20, x20, #1\n" + "whilelt p2.b, x20, x21\n" + "addvl x20, x20, #1\n" + "whilelt p1.b, x20, x21\n" + "addvl x20, x20, #1\n" + "whilelt p0.b, x20, x21\n" "7:" // 8 rounds: predicate OK - "ld1b { z11.b }, p5/Z, [x22]\n" - "ld1b { z10.b }, p4/Z, [x22, #1, MUL VL]\n" + "ld1b { z11.b }, p5/Z, [x23]\n" + "ld1b { z10.b }, p4/Z, [x23, #1, MUL VL]\n" "tbl z9.b, { z16.b }, z11.b\n" - "ld1b { z8.b }, p3/Z, [x22, #2, MUL VL]\n" - "ld1b { z7.b }, p2/Z, [x22, #3, MUL VL]\n" + "ld1b { z8.b }, p3/Z, [x23, #2, MUL VL]\n" + "ld1b { z7.b }, p2/Z, [x23, #3, MUL VL]\n" "sub z11.b, z11.b, z12.b\n" - "ld1b { z6.b }, p1/Z, [x22, #4, MUL VL]\n" - "ld1b { z5.b }, p0/Z, [x22, #5, MUL VL]\n" + "ld1b { z6.b }, p1/Z, [x23, #4, MUL VL]\n" + "ld1b { z5.b }, p0/Z, [x23, #5, MUL VL]\n" "tbl z4.b, { z16.b }, z10.b\n" "sub z10.b, z10.b, z12.b\n" "tbl z3.b, { z16.b }, z8.b\n" @@ -407,7 +407,7 @@ void substitute_bytes_sve( "sub z6.b, z6.b, z12.b\n" ".inst 0x05252ea0 // tbx z0.b, z21.b, z5.b\n" "sub z5.b, z5.b, z12.b\n" - "addvl x20, x20, #-6\n" + "addvl x21, x21, #-6\n" ".inst 0x052b2ec9 // tbx z9.b, z22.b, z11.b\n" "sub z11.b, z11.b, z12.b\n" ".inst 0x052a2ec4 // tbx z4.b, z22.b, z10.b\n" @@ -420,26 +420,26 @@ void substitute_bytes_sve( "sub z6.b, z6.b, z12.b\n" ".inst 0x05252ec0 // tbx z0.b, z22.b, z5.b\n" "sub z5.b, z5.b, z12.b\n" - "cmp x20, XZR\n" + "cmp x21, XZR\n" ".inst 0x052b2ee9 // tbx z9.b, z23.b, z11.b\n" ".inst 0x052a2ee4 // tbx z4.b, z23.b, z10.b\n" ".inst 0x05282ee3 // tbx z3.b, z23.b, z8.b\n" - "st1b { z9.b }, p5, [x21]\n" + "st1b { z9.b }, p5, [x22]\n" ".inst 0x05272ee2 // tbx z2.b, z23.b, z7.b\n" ".inst 0x05262ee1 // tbx z1.b, z23.b, z6.b\n" - "st1b { z4.b }, p4, [x21, #1, MUL VL]\n" + "st1b { z4.b }, p4, [x22, #1, MUL VL]\n" ".inst 0x05252ee0 // tbx z0.b, z23.b, z5.b\n" - "st1b { z3.b }, p3, [x21, #2, MUL VL]\n" + "st1b { z3.b }, p3, [x22, #2, MUL VL]\n" + "addvl x23, x23, #6\n" + "st1b { z2.b }, p2, [x22, #3, MUL VL]\n" + "st1b { z1.b }, p1, [x22, #4, MUL VL]\n" + "st1b { z0.b }, p0, [x22, #5, MUL VL]\n" "addvl x22, x22, #6\n" - "st1b { z2.b }, p2, [x21, #3, MUL VL]\n" - "st1b { z1.b }, p1, [x21, #4, MUL VL]\n" - "st1b { z0.b }, p0, [x21, #5, MUL VL]\n" - "addvl x21, x21, #6\n" "bgt 6b\n" "b 17f\n" "8:" // 512 bits "mov z12.b, #0x40\n" - "mov x20, %x[string_length]\n" + "mov x21, %x[string_length]\n" "ptrue p5.b\n" "ptrue p4.b\n" "ptrue p3.b\n" @@ -447,30 +447,30 @@ void substitute_bytes_sve( "ptrue p1.b\n" "ptrue p0.b\n" "9:" // 4 rounds: width loop - "addvl x19, x20, #-6\n" - "cmp x19, XZR\n" + "addvl x20, x21, #-6\n" + "cmp x20, XZR\n" "bge 10f\n" - "mov x19, #0x0\n" - "addvl x19, x19, #1\n" - "whilelt p5.b, XZR, x20\n" - "whilelt p4.b, x19, x20\n" - "addvl x19, x19, #1\n" - "whilelt p3.b, x19, x20\n" - "addvl x19, x19, #1\n" - "whilelt p2.b, x19, x20\n" - "addvl x19, x19, #1\n" - "whilelt p1.b, x19, x20\n" - "addvl x19, x19, #1\n" - "whilelt p0.b, x19, x20\n" + "mov x20, #0x0\n" + "addvl x20, x20, #1\n" + "whilelt p5.b, XZR, x21\n" + "whilelt p4.b, x20, x21\n" + "addvl x20, x20, #1\n" + "whilelt p3.b, x20, x21\n" + "addvl x20, x20, #1\n" + "whilelt p2.b, x20, x21\n" + "addvl x20, x20, #1\n" + "whilelt p1.b, x20, x21\n" + "addvl x20, x20, #1\n" + "whilelt p0.b, x20, x21\n" "10:" // 4 rounds: predicate OK - "ld1b { z11.b }, p5/Z, [x22]\n" - "ld1b { z10.b }, p4/Z, [x22, #1, MUL VL]\n" + "ld1b { z11.b }, p5/Z, [x23]\n" + "ld1b { z10.b }, p4/Z, [x23, #1, MUL VL]\n" "tbl z9.b, { z16.b }, z11.b\n" - "ld1b { z8.b }, p3/Z, [x22, #2, MUL VL]\n" - "ld1b { z7.b }, p2/Z, [x22, #3, MUL VL]\n" + "ld1b { z8.b }, p3/Z, [x23, #2, MUL VL]\n" + "ld1b { z7.b }, p2/Z, [x23, #3, MUL VL]\n" "sub z11.b, z11.b, z12.b\n" - "ld1b { z6.b }, p1/Z, [x22, #4, MUL VL]\n" - "ld1b { z5.b }, p0/Z, [x22, #5, MUL VL]\n" + "ld1b { z6.b }, p1/Z, [x23, #4, MUL VL]\n" + "ld1b { z5.b }, p0/Z, [x23, #5, MUL VL]\n" "tbl z4.b, { z16.b }, z10.b\n" "sub z10.b, z10.b, z12.b\n" "tbl z3.b, { z16.b }, z8.b\n" @@ -493,7 +493,7 @@ void substitute_bytes_sve( "sub z6.b, z6.b, z12.b\n" ".inst 0x05252e20 // tbx z0.b, z17.b, z5.b\n" "sub z5.b, z5.b, z12.b\n" - "addvl x20, x20, #-6\n" + "addvl x21, x21, #-6\n" ".inst 0x052b2e49 // tbx z9.b, z18.b, z11.b\n" "sub z11.b, z11.b, z12.b\n" ".inst 0x052a2e44 // tbx z4.b, z18.b, z10.b\n" @@ -506,26 +506,26 @@ void substitute_bytes_sve( "sub z6.b, z6.b, z12.b\n" ".inst 0x05252e40 // tbx z0.b, z18.b, z5.b\n" "sub z5.b, z5.b, z12.b\n" - "cmp x20, XZR\n" + "cmp x21, XZR\n" ".inst 0x052b2e69 // tbx z9.b, z19.b, z11.b\n" ".inst 0x052a2e64 // tbx z4.b, z19.b, z10.b\n" ".inst 0x05282e63 // tbx z3.b, z19.b, z8.b\n" - "st1b { z9.b }, p5, [x21]\n" + "st1b { z9.b }, p5, [x22]\n" ".inst 0x05272e62 // tbx z2.b, z19.b, z7.b\n" ".inst 0x05262e61 // tbx z1.b, z19.b, z6.b\n" - "st1b { z4.b }, p4, [x21, #1, MUL VL]\n" + "st1b { z4.b }, p4, [x22, #1, MUL VL]\n" ".inst 0x05252e60 // tbx z0.b, z19.b, z5.b\n" - "st1b { z3.b }, p3, [x21, #2, MUL VL]\n" + "st1b { z3.b }, p3, [x22, #2, MUL VL]\n" + "addvl x23, x23, #6\n" + "st1b { z2.b }, p2, [x22, #3, MUL VL]\n" + "st1b { z1.b }, p1, [x22, #4, MUL VL]\n" + "st1b { z0.b }, p0, [x22, #5, MUL VL]\n" "addvl x22, x22, #6\n" - "st1b { z2.b }, p2, [x21, #3, MUL VL]\n" - "st1b { z1.b }, p1, [x21, #4, MUL VL]\n" - "st1b { z0.b }, p0, [x21, #5, MUL VL]\n" - "addvl x21, x21, #6\n" "bgt 9b\n" "b 17f\n" "11:" // 1024 bits "mov z12.b, #0x80\n" - "mov x20, %x[string_length]\n" + "mov x21, %x[string_length]\n" "ptrue p5.b\n" "ptrue p4.b\n" "ptrue p3.b\n" @@ -533,30 +533,30 @@ void substitute_bytes_sve( "ptrue p1.b\n" "ptrue p0.b\n" "12:" // 2 rounds: width loop - "addvl x19, x20, #-6\n" - "cmp x19, XZR\n" + "addvl x20, x21, #-6\n" + "cmp x20, XZR\n" "bge 13f\n" - "mov x19, #0x0\n" - "addvl x19, x19, #1\n" - "whilelt p5.b, XZR, x20\n" - "whilelt p4.b, x19, x20\n" - "addvl x19, x19, #1\n" - "whilelt p3.b, x19, x20\n" - "addvl x19, x19, #1\n" - "whilelt p2.b, x19, x20\n" - "addvl x19, x19, #1\n" - "whilelt p1.b, x19, x20\n" - "addvl x19, x19, #1\n" - "whilelt p0.b, x19, x20\n" + "mov x20, #0x0\n" + "addvl x20, x20, #1\n" + "whilelt p5.b, XZR, x21\n" + "whilelt p4.b, x20, x21\n" + "addvl x20, x20, #1\n" + "whilelt p3.b, x20, x21\n" + "addvl x20, x20, #1\n" + "whilelt p2.b, x20, x21\n" + "addvl x20, x20, #1\n" + "whilelt p1.b, x20, x21\n" + "addvl x20, x20, #1\n" + "whilelt p0.b, x20, x21\n" "13:" // 2 rounds: predicate OK - "ld1b { z11.b }, p5/Z, [x22]\n" - "ld1b { z10.b }, p4/Z, [x22, #1, MUL VL]\n" - "addvl x20, x20, #-6\n" - "ld1b { z8.b }, p3/Z, [x22, #2, MUL VL]\n" - "ld1b { z7.b }, p2/Z, [x22, #3, MUL VL]\n" + "ld1b { z11.b }, p5/Z, [x23]\n" + "ld1b { z10.b }, p4/Z, [x23, #1, MUL VL]\n" + "addvl x21, x21, #-6\n" + "ld1b { z8.b }, p3/Z, [x23, #2, MUL VL]\n" + "ld1b { z7.b }, p2/Z, [x23, #3, MUL VL]\n" "tbl z9.b, { z16.b }, z11.b\n" - "ld1b { z6.b }, p1/Z, [x22, #4, MUL VL]\n" - "ld1b { z5.b }, p0/Z, [x22, #5, MUL VL]\n" + "ld1b { z6.b }, p1/Z, [x23, #4, MUL VL]\n" + "ld1b { z5.b }, p0/Z, [x23, #5, MUL VL]\n" "sub z11.b, z11.b, z12.b\n" "tbl z4.b, { z16.b }, z10.b\n" "sub z10.b, z10.b, z12.b\n" @@ -568,25 +568,25 @@ void substitute_bytes_sve( "sub z6.b, z6.b, z12.b\n" "tbl z0.b, { z16.b }, z5.b\n" "sub z5.b, z5.b, z12.b\n" - "cmp x20, XZR\n" + "cmp x21, XZR\n" ".inst 0x052b2e29 // tbx z9.b, z17.b, z11.b\n" ".inst 0x052a2e24 // tbx z4.b, z17.b, z10.b\n" ".inst 0x05282e23 // tbx z3.b, z17.b, z8.b\n" - "st1b { z9.b }, p5, [x21]\n" + "st1b { z9.b }, p5, [x22]\n" ".inst 0x05272e22 // tbx z2.b, z17.b, z7.b\n" ".inst 0x05262e21 // tbx z1.b, z17.b, z6.b\n" - "st1b { z4.b }, p4, [x21, #1, MUL VL]\n" + "st1b { z4.b }, p4, [x22, #1, MUL VL]\n" ".inst 0x05252e20 // tbx z0.b, z17.b, z5.b\n" - "st1b { z3.b }, p3, [x21, #2, MUL VL]\n" + "st1b { z3.b }, p3, [x22, #2, MUL VL]\n" + "addvl x23, x23, #6\n" + "st1b { z2.b }, p2, [x22, #3, MUL VL]\n" + "st1b { z1.b }, p1, [x22, #4, MUL VL]\n" + "st1b { z0.b }, p0, [x22, #5, MUL VL]\n" "addvl x22, x22, #6\n" - "st1b { z2.b }, p2, [x21, #3, MUL VL]\n" - "st1b { z1.b }, p1, [x21, #4, MUL VL]\n" - "st1b { z0.b }, p0, [x21, #5, MUL VL]\n" - "addvl x21, x21, #6\n" "bgt 12b\n" "b 17f\n" "14:" // 2048 bits - "mov x20, %x[string_length]\n" + "mov x21, %x[string_length]\n" "ptrue p5.b\n" "ptrue p4.b\n" "ptrue p3.b\n" @@ -594,52 +594,52 @@ void substitute_bytes_sve( "ptrue p1.b\n" "ptrue p0.b\n" "15:" // 1 rounds: width loop - "addvl x19, x20, #-6\n" - "cmp x19, XZR\n" + "addvl x20, x21, #-6\n" + "cmp x20, XZR\n" "bge 16f\n" - "mov x19, #0x0\n" - "addvl x19, x19, #1\n" - "whilelt p5.b, XZR, x20\n" - "whilelt p4.b, x19, x20\n" - "addvl x19, x19, #1\n" - "whilelt p3.b, x19, x20\n" - "addvl x19, x19, #1\n" - "whilelt p2.b, x19, x20\n" - "addvl x19, x19, #1\n" - "whilelt p1.b, x19, x20\n" - "addvl x19, x19, #1\n" - "whilelt p0.b, x19, x20\n" + "mov x20, #0x0\n" + "addvl x20, x20, #1\n" + "whilelt p5.b, XZR, x21\n" + "whilelt p4.b, x20, x21\n" + "addvl x20, x20, #1\n" + "whilelt p3.b, x20, x21\n" + "addvl x20, x20, #1\n" + "whilelt p2.b, x20, x21\n" + "addvl x20, x20, #1\n" + "whilelt p1.b, x20, x21\n" + "addvl x20, x20, #1\n" + "whilelt p0.b, x20, x21\n" "16:" // 1 rounds: predicate OK - "addvl x20, x20, #-6\n" - "ld1b { z11.b }, p5/Z, [x22]\n" - "ld1b { z10.b }, p4/Z, [x22, #1, MUL VL]\n" - "ld1b { z8.b }, p3/Z, [x22, #2, MUL VL]\n" - "ld1b { z7.b }, p2/Z, [x22, #3, MUL VL]\n" - "cmp x20, XZR\n" - "ld1b { z6.b }, p1/Z, [x22, #4, MUL VL]\n" - "ld1b { z5.b }, p0/Z, [x22, #5, MUL VL]\n" + "addvl x21, x21, #-6\n" + "ld1b { z11.b }, p5/Z, [x23]\n" + "ld1b { z10.b }, p4/Z, [x23, #1, MUL VL]\n" + "ld1b { z8.b }, p3/Z, [x23, #2, MUL VL]\n" + "ld1b { z7.b }, p2/Z, [x23, #3, MUL VL]\n" + "cmp x21, XZR\n" + "ld1b { z6.b }, p1/Z, [x23, #4, MUL VL]\n" + "ld1b { z5.b }, p0/Z, [x23, #5, MUL VL]\n" "tbl z9.b, { z16.b }, z11.b\n" "tbl z4.b, { z16.b }, z10.b\n" "tbl z3.b, { z16.b }, z8.b\n" - "st1b { z9.b }, p5, [x21]\n" + "st1b { z9.b }, p5, [x22]\n" "tbl z2.b, { z16.b }, z7.b\n" "tbl z1.b, { z16.b }, z6.b\n" - "st1b { z4.b }, p4, [x21, #1, MUL VL]\n" + "st1b { z4.b }, p4, [x22, #1, MUL VL]\n" "tbl z0.b, { z16.b }, z5.b\n" - "st1b { z3.b }, p3, [x21, #2, MUL VL]\n" + "st1b { z3.b }, p3, [x22, #2, MUL VL]\n" + "addvl x23, x23, #6\n" + "st1b { z2.b }, p2, [x22, #3, MUL VL]\n" + "st1b { z1.b }, p1, [x22, #4, MUL VL]\n" + "st1b { z0.b }, p0, [x22, #5, MUL VL]\n" "addvl x22, x22, #6\n" - "st1b { z2.b }, p2, [x21, #3, MUL VL]\n" - "st1b { z1.b }, p1, [x21, #4, MUL VL]\n" - "st1b { z0.b }, p0, [x21, #5, MUL VL]\n" - "addvl x21, x21, #6\n" "bgt 15b\n" "17:" // SVE body done - "add x23, x23, #0x1\n" - "cmp x23, %x[num_strings]\n" + "add x24, x24, #0x1\n" + "cmp x24, %x[num_strings]\n" "bne 2b\n" : [table] "+&r"(table) : [input] "r"(input), [num_strings] "r"(num_strings), [output] "r"(output), [string_length] "r"(string_length) - : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "x19", "x20", "x21", "x22", "x23", "x24", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"); + : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "x20", "x21", "x22", "x23", "x24", "x25", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"); } #endif // __aarch64__ } // namespace -- cgit v1.2.1