From 20fca524baf99402f742ce38c538f2fd07d5fff9 Mon Sep 17 00:00:00 2001 From: Michalis Spyrou Date: Mon, 7 Jun 2021 14:23:57 +0100 Subject: Create core library using high priority operators A smaller core library is created using a subset of the operators. Changed the structure of filelist.json in order to include more information about the kernels and make the selection easier. Resolves: COMPMID-4514 Change-Id: I079ca7d8e64346174eebdd13b834e1dd4dc36ca2 Signed-off-by: Michalis Spyrou Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/5786 Tested-by: Arm Jenkins Reviewed-by: Georgios Pinitas Comments-Addressed: Arm Jenkins --- src/core/NEON/SVEAsymm.h | 6 +-- src/core/NEON/SVEAsymm.inl | 6 +-- src/core/NEON/SVEMath.h | 4 +- src/core/NEON/SVEMath.inl | 56 +++++++++++----------- src/core/NEON/SVESymm.h | 6 +-- .../kernels/NEBatchNormalizationLayerKernel.cpp | 19 ++++---- .../kernels/arm_conv/depthwise/depthwise_fp16.cpp | 23 +++++---- .../kernels/arm_conv/depthwise/depthwise_fp32.cpp | 31 +++++++----- .../depthwise_implementation_constraints.hpp | 12 +++++ .../kernels/arm_conv/depthwise/depthwise_s8q.cpp | 29 ++++++----- .../kernels/arm_conv/depthwise/depthwise_u8q.cpp | 26 ++++++---- .../arm_conv/depthwise/depthwise_u8s8u8q.cpp | 17 ++++--- .../arm_conv/depthwise/interleaves/8b_mla.cpp | 4 +- .../arm_conv/depthwise/interleaves/list.hpp | 4 +- .../depthwise/interleaves/sve_s8q_3x3_dot.cpp | 4 +- .../depthwise/interleaves/sve_u8q_3x3_dot.cpp | 4 +- ...e_fp16_nhwc_3x3_s1_output2x2_mla_depthfirst.hpp | 4 +- .../generic_direct.cpp | 4 +- .../generic_indirect.cpp | 4 +- ...e_fp16_nhwc_3x3_s1_output3x3_mla_depthfirst.hpp | 4 +- .../generic_direct.cpp | 4 +- .../generic_indirect.cpp | 4 +- ...e_fp16_nhwc_3x3_s1_output4x4_mla_depthfirst.hpp | 4 +- .../generic_direct.cpp | 4 +- .../generic_indirect.cpp | 4 +- ...e_fp16_nhwc_3x3_s2_output2x2_mla_depthfirst.hpp | 4 +- .../generic_direct.cpp | 4 +- .../generic_indirect.cpp | 4 +- ...e_fp16_nhwc_5x5_s1_output2x2_mla_depthfirst.hpp | 4 +- .../generic_direct.cpp | 4 +- .../generic_indirect.cpp | 4 +- ...e_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst.hpp | 4 +- .../generic.cpp | 4 +- .../generic_direct.cpp | 4 +- .../generic_indirect.cpp | 4 +- ...hwc_3x3_s1_output2x2_mla_depthfirst_strided.hpp | 4 +- .../generic.cpp | 4 +- ...e_fp32_nhwc_3x3_s1_output3x3_mla_depthfirst.hpp | 4 +- .../generic_direct.cpp | 4 +- .../generic_indirect.cpp | 4 +- ...e_fp32_nhwc_3x3_s1_output4x4_mla_depthfirst.hpp | 4 +- .../generic_direct.cpp | 4 +- .../generic_indirect.cpp | 4 +- ...e_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst.hpp | 4 +- .../generic_direct.cpp | 4 +- .../generic_indirect.cpp | 4 +- ...e_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst.hpp | 4 +- .../generic_direct.cpp | 4 +- .../generic_indirect.cpp | 4 +- ...ve_fp32_nhwc_generic_output9_mla_depthfirst.hpp | 4 +- .../generic.cpp | 4 +- ...s2_with_multiplier_output3x3_mla_depthfirst.hpp | 4 +- .../generic.cpp | 4 +- ...s1_with_multiplier_output2x4_mla_depthfirst.hpp | 4 +- .../generic.cpp | 4 +- ...ic_with_multiplier_output2x8_mla_depthfirst.hpp | 4 +- .../generic.cpp | 4 +- ...ve_s8q_nhwc_3x3_s1_output2x2_dot_depthfirst.hpp | 4 +- .../generic.cpp | 4 +- ...ve_s8q_nhwc_3x3_s1_output2x2_mla_depthfirst.hpp | 4 +- .../generic.cpp | 4 +- ...ve_s8q_nhwc_3x3_s2_output2x2_mla_depthfirst.hpp | 4 +- .../generic.cpp | 4 +- ...ve_s8q_nhwc_5x5_s1_output2x2_mla_depthfirst.hpp | 4 +- .../generic.cpp | 4 +- ...s2_with_multiplier_output2x4_dot_depthfirst.hpp | 4 +- .../generic.cpp | 4 +- ...s1_with_multiplier_output4x2_dot_depthfirst.hpp | 4 +- .../generic.cpp | 4 +- ...e_s8qs_nhwc_3x3_s1_output2x2_dot_depthfirst.hpp | 4 +- .../generic.cpp | 4 +- ...ve_u8q_nhwc_3x3_s1_output2x2_dot_depthfirst.hpp | 4 +- .../generic.cpp | 4 +- ...ve_u8q_nhwc_3x3_s1_output2x2_mla_depthfirst.hpp | 4 +- .../generic.cpp | 4 +- ...ve_u8q_nhwc_3x3_s2_output2x2_mla_depthfirst.hpp | 4 +- .../generic.cpp | 4 +- ...ve_u8q_nhwc_5x5_s1_output2x2_mla_depthfirst.hpp | 4 +- .../generic.cpp | 4 +- ...s2_with_multiplier_output2x4_dot_depthfirst.hpp | 4 +- .../generic.cpp | 4 +- ...s1_with_multiplier_output4x2_dot_depthfirst.hpp | 4 +- .../generic.cpp | 4 +- ...8s8u8q_nhwc_3x3_s1_output2x2_mla_depthfirst.hpp | 4 +- .../generic.cpp | 4 +- ...8s8u8q_nhwc_3x3_s2_output2x2_mla_depthfirst.hpp | 4 +- .../generic.cpp | 4 +- ...8s8u8q_nhwc_5x5_s1_output2x2_mla_depthfirst.hpp | 4 +- .../generic.cpp | 4 +- ...e_fp16_nhwc_avg_3x3_s1_output2x2_depthfirst.hpp | 4 +- .../generic.cpp | 4 +- .../sve_fp16_nhwc_avg_generic_depthfirst.hpp | 4 +- .../generic.cpp | 4 +- ...e_fp16_nhwc_max_2x2_s1_output2x2_depthfirst.hpp | 4 +- .../generic.cpp | 4 +- .../sve_fp16_nhwc_max_generic_depthfirst.hpp | 4 +- .../generic.cpp | 4 +- ...e_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst.hpp | 4 +- .../generic.cpp | 4 +- .../sve_fp32_nhwc_avg_generic_depthfirst.hpp | 4 +- .../generic.cpp | 4 +- ...e_fp32_nhwc_max_2x2_s1_output2x2_depthfirst.hpp | 4 +- .../generic.cpp | 4 +- .../sve_fp32_nhwc_max_generic_depthfirst.hpp | 4 +- .../generic.cpp | 4 +- .../kernels/sve_s8_nhwc_avg_generic_depthfirst.hpp | 4 +- .../sve_s8_nhwc_avg_generic_depthfirst/generic.cpp | 4 +- ...sve_s8_nhwc_max_2x2_s1_output2x2_depthfirst.hpp | 4 +- .../generic.cpp | 4 +- .../kernels/sve_s8_nhwc_max_generic_depthfirst.hpp | 4 +- .../sve_s8_nhwc_max_generic_depthfirst/generic.cpp | 4 +- .../sve_s8q_nhwc_avg_generic_depthfirst.hpp | 4 +- .../generic.cpp | 4 +- .../sve_s8q_nhwc_max_generic_depthfirst.hpp | 4 +- .../generic.cpp | 4 +- .../kernels/sve_u8_nhwc_avg_generic_depthfirst.hpp | 4 +- .../sve_u8_nhwc_avg_generic_depthfirst/generic.cpp | 4 +- ...sve_u8_nhwc_max_2x2_s1_output2x2_depthfirst.hpp | 4 +- .../generic.cpp | 4 +- .../kernels/sve_u8_nhwc_max_generic_depthfirst.hpp | 4 +- .../sve_u8_nhwc_max_generic_depthfirst/generic.cpp | 4 +- .../sve_u8q_nhwc_avg_generic_depthfirst.hpp | 4 +- .../generic.cpp | 4 +- .../sve_u8q_nhwc_max_generic_depthfirst.hpp | 4 +- .../generic.cpp | 4 +- .../NEON/kernels/arm_conv/pooling/pooling_fp16.cpp | 32 ++++++++----- .../NEON/kernels/arm_conv/pooling/pooling_fp32.cpp | 24 ++++++---- .../NEON/kernels/arm_conv/pooling/pooling_s8.cpp | 24 +++++----- .../NEON/kernels/arm_conv/pooling/pooling_s8q.cpp | 12 ++--- .../NEON/kernels/arm_conv/pooling/pooling_u8.cpp | 24 +++++----- .../NEON/kernels/arm_conv/pooling/pooling_u8q.cpp | 12 ++--- src/core/NEON/kernels/arm_gemm/gemm_bf16.cpp | 18 +++---- src/core/NEON/kernels/arm_gemm/gemm_fp16.cpp | 2 +- src/core/NEON/kernels/arm_gemm/gemm_fp32.cpp | 16 +++---- src/core/NEON/kernels/arm_gemm/gemm_int8.cpp | 14 +++--- src/core/NEON/kernels/arm_gemm/gemm_qint8.cpp | 22 ++++----- src/core/NEON/kernels/arm_gemm/gemm_quint8.cpp | 16 +++---- src/core/NEON/kernels/arm_gemm/gemm_uint8.cpp | 10 ++-- .../NEON/kernels/arm_gemm/interleave_indirect.cpp | 16 +++---- .../kernels/sve_gemv_fp32_mla_8VL/generic.cpp | 2 +- .../kernels/sve_hybrid_bf16fp32_dot_6x4VL.hpp | 4 +- .../sve_hybrid_bf16fp32_dot_6x4VL/generic.cpp | 4 +- .../arm_gemm/kernels/sve_hybrid_fp16_mla_6x4VL.hpp | 4 +- .../kernels/sve_hybrid_fp16_mla_6x4VL/generic.cpp | 4 +- .../arm_gemm/kernels/sve_hybrid_fp32_mla_6x4VL.hpp | 4 +- .../kernels/sve_hybrid_fp32_mla_6x4VL/generic.cpp | 4 +- .../arm_gemm/kernels/sve_hybrid_fp32_mla_8x1VL.hpp | 4 +- .../kernels/sve_hybrid_fp32_mla_8x1VL/generic.cpp | 4 +- .../arm_gemm/kernels/sve_hybrid_s8qa_dot_4x4VL.hpp | 4 +- .../kernels/sve_hybrid_s8qa_dot_4x4VL/generic.cpp | 4 +- .../arm_gemm/kernels/sve_hybrid_s8qs_dot_6x4VL.hpp | 4 +- .../kernels/sve_hybrid_s8qs_dot_6x4VL/generic.cpp | 4 +- .../kernels/sve_hybrid_s8s32_dot_6x4VL.hpp | 4 +- .../kernels/sve_hybrid_s8s32_dot_6x4VL/generic.cpp | 4 +- .../arm_gemm/kernels/sve_hybrid_u8qa_dot_4x4VL.hpp | 4 +- .../kernels/sve_hybrid_u8qa_dot_4x4VL/generic.cpp | 4 +- .../kernels/sve_hybrid_u8u32_dot_6x4VL.hpp | 4 +- .../kernels/sve_hybrid_u8u32_dot_6x4VL/generic.cpp | 4 +- .../kernels/sve_interleaved_bf16fp32_dot_8x3VL.hpp | 4 +- .../sve_interleaved_bf16fp32_dot_8x3VL/generic.cpp | 4 +- .../sve_interleaved_bf16fp32_mmla_8x3VL.hpp | 4 +- .../generic.cpp | 4 +- .../kernels/sve_interleaved_fp16_mla_8x3VL.hpp | 4 +- .../sve_interleaved_fp16_mla_8x3VL/generic.cpp | 4 +- .../kernels/sve_interleaved_fp32_mla_8x3VL.hpp | 4 +- .../sve_interleaved_fp32_mla_8x3VL/generic.cpp | 4 +- .../kernels/sve_interleaved_fp32_mmla_8x3VL.hpp | 4 +- .../sve_interleaved_fp32_mmla_8x3VL/generic.cpp | 4 +- .../kernels/sve_interleaved_s8s32_dot_8x3VL.hpp | 4 +- .../sve_interleaved_s8s32_dot_8x3VL/generic.cpp | 4 +- .../kernels/sve_interleaved_s8s32_mmla_8x3VL.hpp | 4 +- .../sve_interleaved_s8s32_mmla_8x3VL/generic.cpp | 4 +- .../kernels/sve_interleaved_u8u32_dot_8x3VL.hpp | 4 +- .../sve_interleaved_u8u32_dot_8x3VL/generic.cpp | 4 +- .../kernels/sve_interleaved_u8u32_mmla_8x3VL.hpp | 4 +- .../sve_interleaved_u8u32_mmla_8x3VL/generic.cpp | 4 +- .../kernels/sve_smallK_hybrid_fp32_mla_8x1VL.hpp | 4 +- .../sve_smallK_hybrid_fp32_mla_8x1VL/generic.cpp | 4 +- .../kernels/sve_smallK_hybrid_s8s32_dot_8x1VL.hpp | 4 +- .../sve_smallK_hybrid_s8s32_dot_8x1VL/generic.cpp | 4 +- .../kernels/sve_smallK_hybrid_u8u32_dot_8x1VL.hpp | 4 +- .../sve_smallK_hybrid_u8u32_dot_8x1VL/generic.cpp | 4 +- .../NEON/kernels/arm_gemm/mergeresults-sve.cpp | 41 ++++++++++++++++ src/core/NEON/kernels/arm_gemm/mergeresults.cpp | 6 ++- src/core/NEON/kernels/arm_gemm/merges/list-sve.hpp | 28 +++++++++++ src/core/NEON/kernels/arm_gemm/merges/list.hpp | 6 +-- .../arm_gemm/merges/sve_merge_fp16_3VLx8.hpp | 4 +- .../arm_gemm/merges/sve_merge_fp32_3VLx8.hpp | 4 +- .../arm_gemm/merges/sve_merge_s32_3VLx8.hpp | 4 +- .../arm_gemm/merges/sve_merge_u32_3VLx8.hpp | 4 +- src/core/NEON/kernels/arm_gemm/utils.hpp | 50 +++++++------------ .../kernels/batchnormalization/impl/SVE/fp16.cpp | 2 +- .../kernels/batchnormalization/impl/SVE/fp32.cpp | 2 +- src/core/NEON/wrapper/svtraits.h | 4 +- src/core/NEON/wrapper/traits.h | 8 ++-- 195 files changed, 687 insertions(+), 575 deletions(-) create mode 100644 src/core/NEON/kernels/arm_gemm/mergeresults-sve.cpp create mode 100644 src/core/NEON/kernels/arm_gemm/merges/list-sve.hpp (limited to 'src/core/NEON') diff --git a/src/core/NEON/SVEAsymm.h b/src/core/NEON/SVEAsymm.h index 4b0ecd9eea..40b8e64b67 100644 --- a/src/core/NEON/SVEAsymm.h +++ b/src/core/NEON/SVEAsymm.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020 Arm Limited. + * Copyright (c) 2020-2021 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -24,7 +24,7 @@ #ifndef ARM_COMPUTE_SVEASYMM_H #define ARM_COMPUTE_SVEASYMM_H -#if defined(__ARM_FEATURE_SVE2) +#if defined(ARM_COMPUTE_ENABLE_SVE2) #include "src/core/NEON/SVEMath.h" #include @@ -258,5 +258,5 @@ inline svuint16x2_t svquantize_qasymm16_z(svbool_t pg, const svfloat32x4_t qv, c } } // namespace arm_compute #include "src/core/NEON/SVEAsymm.inl" -#endif /* defined(__ARM_FEATURE_SVE2) */ +#endif /* defined(ARM_COMPUTE_ENABLE_SVE2) */ #endif // ARM_COMPUTE_NEASYMM_H diff --git a/src/core/NEON/SVEAsymm.inl b/src/core/NEON/SVEAsymm.inl index edf5733c36..e85cacd721 100644 --- a/src/core/NEON/SVEAsymm.inl +++ b/src/core/NEON/SVEAsymm.inl @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020 Arm Limited. + * Copyright (c) 2020-2021 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -23,7 +23,7 @@ */ namespace arm_compute { -#if defined(__ARM_FEATURE_SVE2) +#if defined(ARM_COMPUTE_ENABLE_SVE2) inline svuint8_t svmla_qasymm8_z(svbool_t pg, svuint8_t vd, svfloat32_t vs, svfloat32_t vo) { // Convert uint8 vectors to uint16 vectors @@ -101,5 +101,5 @@ inline svint8_t svmla_qasymm8_signed_z(svbool_t pg, svint8_t vd, svfloat32_t vs, const auto res = svqxtnt_s16(svqxtnb_s16(vd_low_s16), vd_high_s16); return res; } -#endif /* (__ARM_FEATURE_SVE2) */ +#endif /* (ARM_COMPUTE_ENABLE_SVE2) */ } // namespace arm_compute diff --git a/src/core/NEON/SVEMath.h b/src/core/NEON/SVEMath.h index dde75e8088..5ada7ae0ff 100644 --- a/src/core/NEON/SVEMath.h +++ b/src/core/NEON/SVEMath.h @@ -24,7 +24,7 @@ #ifndef ARM_COMPUTE_SVEMATH_H #define ARM_COMPUTE_SVEMATH_H -#if defined(ENABLE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) #include "src/core/NEON/wrapper/intrinsics/svcvt.h" #include "src/core/NEON/wrapper/intrinsics/svdup_n.h" #include "src/core/NEON/wrapper/intrinsics/svreinterpret.h" @@ -185,5 +185,5 @@ int_vec_type convert_float_to_int(const svfloat32_t &in_0, const svfloat32_t &in } // namespace arm_compute #include "src/core/NEON/SVEMath.inl" -#endif /* defined(ENABLE_SVE) */ +#endif /* defined(ARM_COMPUTE_ENABLE_SVE) */ #endif /* ARM_COMPUTE_SVEMATH_H */ \ No newline at end of file diff --git a/src/core/NEON/SVEMath.inl b/src/core/NEON/SVEMath.inl index 7625e5be34..5ebef5ad6a 100644 --- a/src/core/NEON/SVEMath.inl +++ b/src/core/NEON/SVEMath.inl @@ -24,7 +24,7 @@ #include #include -#if defined(__ARM_FEATURE_SVE) && defined(ENABLE_SVE) +#if defined(__ARM_FEATURE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE) #ifndef M_PI #define M_PI (3.14159265358979323846) @@ -117,22 +117,22 @@ inline svfloat32_t svexp_f32_z(svbool_t pg, svfloat32_t x) inline svfloat16_t svexp_f16_z(svbool_t pg, svfloat16_t x) { auto bottom = svcvt_f32_z(pg, x); -#if defined(__ARM_FEATURE_SVE2) +#if defined(ARM_COMPUTE_ENABLE_SVE2) auto top = svcvtlt_f32_x(pg, x); auto pg_top = pg; -#else /* defined(__ARM_FEATURE_SVE2) */ +#else /* defined(ARM_COMPUTE_ENABLE_SVE2) */ auto pg_top = svptrue_b16(); auto top = svcvt_f32_z(pg_top, svreinterpret_f16(svrevh_z(svptrue_b16(), svreinterpret_u32(x)))); -#endif /* defined(__ARM_FEATURE_SVE2) */ +#endif /* defined(ARM_COMPUTE_ENABLE_SVE2) */ bottom = svexp_f32_z(pg, bottom); top = svexp_f32_z(pg_top, top); -#if defined(__ARM_FEATURE_SVE2) +#if defined(ARM_COMPUTE_ENABLE_SVE2) return svcvtnt_f16_m(svcvt_f16_z(pg, bottom), pg_top, top); -#else /* defined(__ARM_FEATURE_SVE2) */ +#else /* defined(ARM_COMPUTE_ENABLE_SVE2) */ return svtrn1(svcvt_f16_z(pg, bottom), svcvt_f16_z(pg_top, top)); -#endif /* defined(__ARM_FEATURE_SVE2) */ +#endif /* defined(ARM_COMPUTE_ENABLE_SVE2) */ } inline svfloat32_t svtanh_f32_z(svbool_t pg, svfloat32_t val) @@ -196,22 +196,22 @@ inline svfloat32_t svlog_f32_z(svbool_t pg, svfloat32_t x) inline svfloat16_t svlog_f16_z(svbool_t pg, svfloat16_t x) { auto bottom = svcvt_f32_z(pg, x); -#if defined(__ARM_FEATURE_SVE2) +#if defined(ARM_COMPUTE_ENABLE_SVE2) auto top = svcvtlt_f32_x(pg, x); auto pg_top = pg; -#else /* defined(__ARM_FEATURE_SVE2) */ +#else /* defined(ARM_COMPUTE_ENABLE_SVE2) */ auto pg_top = svptrue_b16(); auto top = svcvt_f32_z(pg_top, svreinterpret_f16(svrevh_z(svptrue_b16(), svreinterpret_u32(x)))); -#endif /* defined(__ARM_FEATURE_SVE2) */ +#endif /* defined(ARM_COMPUTE_ENABLE_SVE2) */ bottom = svlog_f32_z(pg, bottom); top = svlog_f32_z(pg_top, top); -#if defined(__ARM_FEATURE_SVE2) +#if defined(ARM_COMPUTE_ENABLE_SVE2) return svcvtnt_f16_m(svcvt_f16_z(pg, bottom), pg_top, top); -#else /* defined(__ARM_FEATURE_SVE2) */ +#else /* defined(ARM_COMPUTE_ENABLE_SVE2) */ return svtrn1(svcvt_f16_z(pg, bottom), svcvt_f16_z(pg_top, top)); -#endif /* defined(__ARM_FEATURE_SVE2) */ +#endif /* defined(ARM_COMPUTE_ENABLE_SVE2) */ } inline svfloat32_t svsin_f32_z(svbool_t pg, svfloat32_t val) @@ -269,22 +269,22 @@ inline svfloat32_t svsin_f32_z(svbool_t pg, svfloat32_t val) inline svfloat16_t svsin_f16_z(svbool_t pg, svfloat16_t val) { auto bottom = svcvt_f32_z(pg, val); -#if defined(__ARM_FEATURE_SVE2) +#if defined(ARM_COMPUTE_ENABLE_SVE2) auto top = svcvtlt_f32_x(pg, val); auto pg_top = pg; -#else /* defined(__ARM_FEATURE_SVE2) */ +#else /* defined(ARM_COMPUTE_ENABLE_SVE2) */ auto pg_top = svptrue_b16(); auto top = svcvt_f32_z(pg_top, svreinterpret_f16(svrevh_z(svptrue_b16(), svreinterpret_u32(val)))); -#endif /* defined(__ARM_FEATURE_SVE2) */ +#endif /* defined(ARM_COMPUTE_ENABLE_SVE2) */ bottom = svsin_f32_z(pg, bottom); top = svsin_f32_z(pg_top, top); -#if defined(__ARM_FEATURE_SVE2) +#if defined(ARM_COMPUTE_ENABLE_SVE2) return svcvtnt_f16_m(svcvt_f16_z(pg, bottom), pg_top, top); -#else /* defined(__ARM_FEATURE_SVE2) */ +#else /* defined(ARM_COMPUTE_ENABLE_SVE2) */ return svtrn1(svcvt_f16_z(pg, bottom), svcvt_f16_z(pg_top, top)); -#endif /* defined(__ARM_FEATURE_SVE2) */ +#endif /* defined(ARM_COMPUTE_ENABLE_SVE2) */ } inline svfloat32_t svpow_f32_z(svbool_t pg, svfloat32_t a, svfloat32_t b) @@ -297,27 +297,27 @@ inline svfloat16_t svpow_f16_z(svbool_t pg, svfloat16_t a, svfloat16_t b) auto a_bottom = svcvt_f32_z(pg, a); auto b_bottom = svcvt_f32_z(pg, b); -#if defined(__ARM_FEATURE_SVE2) +#if defined(ARM_COMPUTE_ENABLE_SVE2) auto pg_top = pg; auto a_top = svcvtlt_f32_x(pg, a); auto b_top = svcvtlt_f32_x(pg, b); -#else /* defined(__ARM_FEATURE_SVE2) */ +#else /* defined(ARM_COMPUTE_ENABLE_SVE2) */ auto pg_top = svptrue_b16(); auto a_top = svcvt_f32_z(pg_top, svreinterpret_f16(svrevh_z(svptrue_b16(), svreinterpret_u32(a)))); auto b_top = svcvt_f32_z(pg_top, svreinterpret_f16(svrevh_z(svptrue_b16(), svreinterpret_u32(b)))); -#endif /* defined(__ARM_FEATURE_SVE2) */ +#endif /* defined(ARM_COMPUTE_ENABLE_SVE2) */ auto res_bottom = svpow_f32_z(pg, a_bottom, b_bottom); auto res_top = svpow_f32_z(pg_top, a_top, b_top); -#if defined(__ARM_FEATURE_SVE2) +#if defined(ARM_COMPUTE_ENABLE_SVE2) return svcvtnt_f16_m(svcvt_f16_z(pg, res_bottom), pg_top, res_top); -#else /* defined(__ARM_FEATURE_SVE2) */ +#else /* defined(ARM_COMPUTE_ENABLE_SVE2) */ return svtrn1(svcvt_f16_z(pg, res_bottom), svcvt_f16_z(pg_top, res_top)); -#endif /* defined(__ARM_FEATURE_SVE2) */ +#endif /* defined(ARM_COMPUTE_ENABLE_SVE2) */ } -#if defined(__ARM_FEATURE_SVE2) +#if defined(ARM_COMPUTE_ENABLE_SVE2) template <> inline svuint8_t convert_float_to_int(const svfloat32_t &in_0, const svfloat32_t &in_1, const svfloat32_t &in_2, const svfloat32_t &in_3) { @@ -385,7 +385,7 @@ inline svint8_t convert_float_to_int(const svfloat32_t &in_0, const sv return out; } -#endif /* defined(__ARM_FEATURE_SVE2) */ +#endif /* defined(ARM_COMPUTE_ENABLE_SVE2) */ } // namespace arm_compute -#endif /* defined(ENABLE_SVE) */ +#endif /* defined(ARM_COMPUTE_ENABLE_SVE) */ diff --git a/src/core/NEON/SVESymm.h b/src/core/NEON/SVESymm.h index 30e1e172a3..c71d273b67 100644 --- a/src/core/NEON/SVESymm.h +++ b/src/core/NEON/SVESymm.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020 Arm Limited. + * Copyright (c) 2020-2021 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -26,7 +26,7 @@ #include "arm_compute/core/utils/quantization/AsymmHelpers.h" -#if defined(__ARM_FEATURE_SVE2) +#if defined(ARM_COMPUTE_ENABLE_SVE2) #include "src/core/NEON/SVEMath.h" #include @@ -123,5 +123,5 @@ inline svint16x2_t svquantize_qsymm16_z(svbool_t pg, const svfloat32x4_t qv, con } } // namespace arm_compute -#endif /* defined(__ARM_FEATURE_SVE2) */ +#endif /* defined(ARM_COMPUTE_ENABLE_SVE2) */ #endif // ARM_COMPUTE_NESYMM_H \ No newline at end of file diff --git a/src/core/NEON/kernels/NEBatchNormalizationLayerKernel.cpp b/src/core/NEON/kernels/NEBatchNormalizationLayerKernel.cpp index 92000bb2f6..46551553c9 100644 --- a/src/core/NEON/kernels/NEBatchNormalizationLayerKernel.cpp +++ b/src/core/NEON/kernels/NEBatchNormalizationLayerKernel.cpp @@ -48,7 +48,8 @@ namespace { struct BatchNormalizationSelectorData { - DataType dt; + DataType dt; + const CPUInfo &ci; }; using BatchNormalizationSelectorPtr = std::add_pointer::type; using BatchNormalizationKernelPtr = std::add_pointerdata_type() }); + const auto *uk = get_implementation(BatchNormalizationSelectorData{ input->data_type(), CPUInfo::get() }); ARM_COMPUTE_RETURN_ERROR_ON(uk == nullptr || uk->ukernel == nullptr); if(act_info.enabled()) @@ -387,7 +388,7 @@ void NEBatchNormalizationLayerKernel::run(const Window &window, const ThreadInfo } else { - const auto *uk = get_implementation(BatchNormalizationSelectorData{ _input->info()->data_type() }); + const auto *uk = get_implementation(BatchNormalizationSelectorData{ _input->info()->data_type(), CPUInfo::get() }); uk->ukernel(_input, _output, _mean, _var, _beta, _gamma, _epsilon, _act_info, window); } } diff --git a/src/core/NEON/kernels/arm_conv/depthwise/depthwise_fp16.cpp b/src/core/NEON/kernels/arm_conv/depthwise/depthwise_fp16.cpp index fdb36fc1d1..6ba7c78e97 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/depthwise_fp16.cpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/depthwise_fp16.cpp @@ -33,13 +33,13 @@ #include "depthwise_implementation_constraints.hpp" #if defined(__aarch64__) -#if defined(__ARM_FEATURE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) #include "kernels/sve_fp16_nhwc_3x3_s1_output4x4_mla_depthfirst.hpp" #include "kernels/sve_fp16_nhwc_3x3_s1_output3x3_mla_depthfirst.hpp" #include "kernels/sve_fp16_nhwc_3x3_s1_output2x2_mla_depthfirst.hpp" #include "kernels/sve_fp16_nhwc_3x3_s2_output2x2_mla_depthfirst.hpp" #include "kernels/sve_fp16_nhwc_5x5_s1_output2x2_mla_depthfirst.hpp" -#endif // defined(__ARM_FEATURE_SVE) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) #include "kernels/a64_fp16_nhwc_3x3_s1_output4x4_mla_depthfirst.hpp" #include "kernels/a64_fp16_nhwc_3x3_s1_output3x3_mla_depthfirst.hpp" #include "kernels/a64_fp16_nhwc_3x3_s1_output2x2_mla_depthfirst.hpp" @@ -83,12 +83,13 @@ namespace static const DepthwiseImplementation<__fp16, __fp16> depthwise_fp16_methods[] = { #if defined(__aarch64__) -#if defined(__ARM_FEATURE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) { DepthwiseMethod::DEPTHFIRST, "sve_fp16_nhwc_3x3_s1_output4x4_mla_depthfirst", constraint(is_supported, - has_no_channel_multiplier), + has_no_channel_multiplier, + cpu_has_sve), cycle_estimate, [] (const DepthwiseArgs &args, const Nothing &) -> DepthwiseCommon<__fp16, __fp16, __fp16> * { return new DepthwiseDepthfirst(args); @@ -98,7 +99,8 @@ static const DepthwiseImplementation<__fp16, __fp16> depthwise_fp16_methods[] = DepthwiseMethod::DEPTHFIRST, "sve_fp16_nhwc_3x3_s1_output3x3_mla_depthfirst", constraint(is_supported, - has_no_channel_multiplier), + has_no_channel_multiplier, + cpu_has_sve), cycle_estimate, [] (const DepthwiseArgs &args, const Nothing &) -> DepthwiseCommon<__fp16, __fp16, __fp16> * { return new DepthwiseDepthfirst(args); @@ -108,7 +110,8 @@ static const DepthwiseImplementation<__fp16, __fp16> depthwise_fp16_methods[] = DepthwiseMethod::DEPTHFIRST, "sve_fp16_nhwc_3x3_s1_output2x2_mla_depthfirst", constraint(is_supported, - has_no_channel_multiplier), + has_no_channel_multiplier, + cpu_has_sve), cycle_estimate, [] (const DepthwiseArgs &args, const Nothing &) -> DepthwiseCommon<__fp16, __fp16, __fp16> * { return new DepthwiseDepthfirst(args); @@ -118,7 +121,8 @@ static const DepthwiseImplementation<__fp16, __fp16> depthwise_fp16_methods[] = DepthwiseMethod::DEPTHFIRST, "sve_fp16_nhwc_3x3_s2_output2x2_mla_depthfirst", constraint(is_supported, - has_no_channel_multiplier), + has_no_channel_multiplier, + cpu_has_sve), cycle_estimate, [] (const DepthwiseArgs &args, const Nothing &) -> DepthwiseCommon<__fp16, __fp16, __fp16> * { return new DepthwiseDepthfirst(args); @@ -128,13 +132,14 @@ static const DepthwiseImplementation<__fp16, __fp16> depthwise_fp16_methods[] = DepthwiseMethod::DEPTHFIRST, "sve_fp16_nhwc_5x5_s1_output2x2_mla_depthfirst", constraint(is_supported, - has_no_channel_multiplier), + has_no_channel_multiplier, + cpu_has_sve), cycle_estimate, [] (const DepthwiseArgs &args, const Nothing &) -> DepthwiseCommon<__fp16, __fp16, __fp16> * { return new DepthwiseDepthfirst(args); }, }, -#endif // defined(__ARM_FEATURE_SVE) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) #if defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC) { DepthwiseMethod::DEPTHFIRST, diff --git a/src/core/NEON/kernels/arm_conv/depthwise/depthwise_fp32.cpp b/src/core/NEON/kernels/arm_conv/depthwise/depthwise_fp32.cpp index aea750a475..ac43df979c 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/depthwise_fp32.cpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/depthwise_fp32.cpp @@ -33,7 +33,7 @@ #include "depthwise_implementation_constraints.hpp" #if defined(__aarch64__) -#if defined(__ARM_FEATURE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) #include "kernels/sve_fp32_nhwc_3x3_s1_output4x4_mla_depthfirst.hpp" #include "kernels/sve_fp32_nhwc_3x3_s1_output3x3_mla_depthfirst.hpp" #include "kernels/sve_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst.hpp" @@ -43,7 +43,7 @@ #include "kernels/sve_fp32_packed_to_nhwc_3x3_s2_with_multiplier_output3x3_mla_depthfirst.hpp" #include "kernels/sve_fp32_packed_to_nhwc_5x5_s1_with_multiplier_output2x4_mla_depthfirst.hpp" #include "kernels/sve_fp32_packed_to_nhwc_generic_with_multiplier_output2x8_mla_depthfirst.hpp" -#endif // defined(__ARM_FEATURE_SVE) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) #include "kernels/a64_fp32_nhwc_3x3_s1_output4x4_mla_depthfirst.hpp" #include "kernels/a64_fp32_nhwc_3x3_s1_output3x3_mla_depthfirst.hpp" #include "kernels/a64_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst.hpp" @@ -85,12 +85,13 @@ namespace static const DepthwiseImplementation depthwise_fp32_methods[] = { #if defined(__aarch64__) -#if defined(__ARM_FEATURE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) { DepthwiseMethod::DEPTHFIRST, "sve_fp32_nhwc_3x3_s1_output4x4_mla_depthfirst", constraint(is_supported, - has_no_channel_multiplier), + has_no_channel_multiplier, + cpu_has_sve), cycle_estimate, [] (const DepthwiseArgs &args, const Nothing &) -> DepthwiseCommon * { return new DepthwiseDepthfirst(args); @@ -100,7 +101,8 @@ static const DepthwiseImplementation depthwise_fp32_methods[] = { DepthwiseMethod::DEPTHFIRST, "sve_fp32_nhwc_3x3_s1_output3x3_mla_depthfirst", constraint(is_supported, - has_no_channel_multiplier), + has_no_channel_multiplier, + cpu_has_sve), cycle_estimate, [] (const DepthwiseArgs &args, const Nothing &) -> DepthwiseCommon * { return new DepthwiseDepthfirst(args); @@ -110,7 +112,8 @@ static const DepthwiseImplementation depthwise_fp32_methods[] = { DepthwiseMethod::DEPTHFIRST, "sve_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst", constraint(is_supported, - has_no_channel_multiplier), + has_no_channel_multiplier, + cpu_has_sve), cycle_estimate, [] (const DepthwiseArgs &args, const Nothing &) -> DepthwiseCommon * { return new DepthwiseDepthfirst(args); @@ -120,7 +123,8 @@ static const DepthwiseImplementation depthwise_fp32_methods[] = { DepthwiseMethod::DEPTHFIRST, "sve_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst", constraint(is_supported, - has_no_channel_multiplier), + has_no_channel_multiplier, + cpu_has_sve), cycle_estimate, [] (const DepthwiseArgs &args, const Nothing &) -> DepthwiseCommon * { return new DepthwiseDepthfirst(args); @@ -130,7 +134,8 @@ static const DepthwiseImplementation depthwise_fp32_methods[] = { DepthwiseMethod::DEPTHFIRST, "sve_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst", constraint(is_supported, - has_no_channel_multiplier), + has_no_channel_multiplier, + cpu_has_sve), cycle_estimate, [] (const DepthwiseArgs &args, const Nothing &) -> DepthwiseCommon * { return new DepthwiseDepthfirst(args); @@ -139,7 +144,7 @@ static const DepthwiseImplementation depthwise_fp32_methods[] = { { DepthwiseMethod::DEPTHFIRST, "sve_fp32_nhwc_generic_output3x3_mla_depthfirst", - constraint(has_no_channel_multiplier), + constraint(has_no_channel_multiplier, cpu_has_sve), not_preferred, [] (const DepthwiseArgs &args, const Nothing &) -> DepthwiseCommon * { return new DepthwiseDepthfirstGeneric(args); @@ -148,7 +153,7 @@ static const DepthwiseImplementation depthwise_fp32_methods[] = { { DepthwiseMethod::DEPTHFIRST, "sve_fp32_nhwc_3x3_s2_with_multiplier_output3x3_mla_depthfirst", - constraint(is_supported), + constraint(is_supported, cpu_has_sve), not_preferred_if_no_multiplier, [] (const DepthwiseArgs &args, const Nothing &) -> DepthwiseCommon * { return new DepthwiseDepthfirstWithMultiplier(args); @@ -157,7 +162,7 @@ static const DepthwiseImplementation depthwise_fp32_methods[] = { { DepthwiseMethod::DEPTHFIRST, "sve_fp32_nhwc_5x5_s1_with_multiplier_output2x4_mla_depthfirst", - constraint(is_supported), + constraint(is_supported, cpu_has_sve), not_preferred_if_no_multiplier, [] (const DepthwiseArgs &args, const Nothing &) -> DepthwiseCommon * { return new DepthwiseDepthfirstWithMultiplier(args); @@ -166,13 +171,13 @@ static const DepthwiseImplementation depthwise_fp32_methods[] = { { DepthwiseMethod::DEPTHFIRST, "sve_fp32_nhwc_generic_with_multiplier_output2x8_mla_depthfirst", - nullptr, + constraint(cpu_has_sve), not_preferred_if_no_multiplier, [] (const DepthwiseArgs &args, const Nothing &) -> DepthwiseCommon * { return new DepthwiseDepthfirstGenericWithMultiplier(args); }, }, -#endif // defined(__ARM_FEATURE_SVE) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) { DepthwiseMethod::DEPTHFIRST, "a64_fp32_nhwc_3x3_s1_output4x4_mla_depthfirst", diff --git a/src/core/NEON/kernels/arm_conv/depthwise/depthwise_implementation_constraints.hpp b/src/core/NEON/kernels/arm_conv/depthwise/depthwise_implementation_constraints.hpp index b4814bef92..6526d001b3 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/depthwise_implementation_constraints.hpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/depthwise_implementation_constraints.hpp @@ -85,6 +85,18 @@ bool cpu_has_dot_product(const DepthwiseArgs &args, const void *) return args.cpu_info->has_dotprod(); } +bool cpu_has_sve(const DepthwiseArgs &args, const void *) __attribute__ ((unused)); +bool cpu_has_sve(const DepthwiseArgs &args, const void *) +{ + return args.cpu_info->has_sve(); +} + +bool cpu_has_sve2(const DepthwiseArgs &args, const void *) __attribute__ ((unused)); +bool cpu_has_sve2(const DepthwiseArgs &args, const void *) +{ + return args.cpu_info->has_sve2(); +} + bool has_no_channel_multiplier(const DepthwiseArgs &args, const void *) __attribute__ ((unused)); bool has_no_channel_multiplier(const DepthwiseArgs &args, const void *) { diff --git a/src/core/NEON/kernels/arm_conv/depthwise/depthwise_s8q.cpp b/src/core/NEON/kernels/arm_conv/depthwise/depthwise_s8q.cpp index 40370fe59e..f38912d257 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/depthwise_s8q.cpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/depthwise_s8q.cpp @@ -33,7 +33,7 @@ #include "depthwise_implementation_constraints.hpp" #if defined(__aarch64__) -#if defined(__ARM_FEATURE_SVE) && defined(SVE2) +#if defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) #include "kernels/sve_s8qs_nhwc_3x3_s1_output2x2_dot_depthfirst.hpp" #include "kernels/sve_s8q_nhwc_3x3_s1_output2x2_dot_depthfirst.hpp" #include "kernels/sve_s8q_nhwc_3x3_s1_output2x2_mla_depthfirst.hpp" @@ -41,7 +41,7 @@ #include "kernels/sve_s8q_nhwc_5x5_s1_output2x2_mla_depthfirst.hpp" #include "kernels/sve_s8q_packed_to_nhwc_3x3_s2_with_multiplier_output2x4_dot_depthfirst.hpp" #include "kernels/sve_s8q_packed_to_nhwc_5x5_s1_with_multiplier_output4x2_dot_depthfirst.hpp" -#endif // defined(__ARM_FEATURE_SVE) && defined(SVE2) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) #include "kernels/a64_s8qs_nhwc_3x3_s1_output2x2_dot_depthfirst.hpp" #include "kernels/a64_s8q_nhwc_3x3_s1_output2x2_dot_depthfirst.hpp" #include "kernels/a64_s8q_nhwc_3x3_s1_output2x2_mla_depthfirst.hpp" @@ -73,14 +73,15 @@ bool qp_weights_are_symmetric(const DepthwiseArgs &, const void *_qp) static const DepthwiseImplementation depthwise_s8q_methods[] = { #if defined(__aarch64__) -#if defined(__ARM_FEATURE_SVE) && defined(SVE2) +#if defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) { DepthwiseMethod::DEPTHFIRST, "sve_s8qs_nhwc_3x3_s1_output2x2_dot_depthfirst", constraint(is_supported, has_no_channel_multiplier, qp_has_no_left_shift, - qp_weights_are_symmetric), + qp_weights_are_symmetric, + cpu_has_sve2), nullptr, [] (const DepthwiseArgs &args, const Requantize32 &qp) -> DepthwiseCommon * { return new DepthwiseDepthfirstQuantized(args, qp); @@ -91,7 +92,8 @@ static const DepthwiseImplementation depth "sve_s8q_nhwc_3x3_s1_output2x2_dot_depthfirst", constraint(is_supported, has_no_channel_multiplier, - qp_has_no_left_shift), + qp_has_no_left_shift, + cpu_has_sve2), nullptr, [] (const DepthwiseArgs &args, const Requantize32 &qp) -> DepthwiseCommon * { return new DepthwiseDepthfirstQuantized(args, qp); @@ -102,7 +104,8 @@ static const DepthwiseImplementation depth "sve_s8q_nhwc_3x3_s1_output2x2_mla_depthfirst", constraint(is_supported, has_no_channel_multiplier, - qp_has_no_left_shift), + qp_has_no_left_shift, + cpu_has_sve2), nullptr, [] (const DepthwiseArgs &args, const Requantize32 &qp) -> DepthwiseCommon * { return new DepthwiseDepthfirstQuantized(args, qp); @@ -113,7 +116,8 @@ static const DepthwiseImplementation depth "sve_s8q_nhwc_3x3_s2_output2x2_mla_depthfirst", constraint(is_supported, has_no_channel_multiplier, - qp_has_no_left_shift), + qp_has_no_left_shift, + cpu_has_sve2), nullptr, [] (const DepthwiseArgs &args, const Requantize32 &qp) -> DepthwiseCommon * { return new DepthwiseDepthfirstQuantized(args, qp); @@ -124,7 +128,8 @@ static const DepthwiseImplementation depth "sve_s8q_nhwc_5x5_s1_output2x2_mla_depthfirst", constraint(is_supported, has_no_channel_multiplier, - qp_has_no_left_shift), + qp_has_no_left_shift, + cpu_has_sve2), nullptr, [] (const DepthwiseArgs &args, const Requantize32 &qp) -> DepthwiseCommon * { return new DepthwiseDepthfirstQuantized(args, qp); @@ -134,7 +139,8 @@ static const DepthwiseImplementation depth DepthwiseMethod::DEPTHFIRST, "sve_s8q_packed_to_nhwc_3x3_s2_with_multiplier_output2x4_dot_depthfirst", constraint(is_supported, - qp_has_no_left_shift), + qp_has_no_left_shift, + cpu_has_sve2), nullptr, [] (const DepthwiseArgs &args, const Requantize32 &qp) -> DepthwiseCommon * { return new DepthwiseDepthfirstWithMultiplierQuantized(args, qp); @@ -144,13 +150,14 @@ static const DepthwiseImplementation depth DepthwiseMethod::DEPTHFIRST, "sve_s8q_packed_to_nhwc_5x5_s1_with_multiplier_output4x2_dot_depthfirst", constraint(is_supported, - qp_has_no_left_shift), + qp_has_no_left_shift, + cpu_has_sve2), nullptr, [] (const DepthwiseArgs &args, const Requantize32 &qp) -> DepthwiseCommon * { return new DepthwiseDepthfirstWithMultiplierQuantized(args, qp); }, }, -#endif // defined(__ARM_FEATURE_SVE) && defined(SVE2) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) { DepthwiseMethod::DEPTHFIRST, "a64_s8qs_nhwc_3x3_s1_output2x2_dot_depthfirst", diff --git a/src/core/NEON/kernels/arm_conv/depthwise/depthwise_u8q.cpp b/src/core/NEON/kernels/arm_conv/depthwise/depthwise_u8q.cpp index 3e190d242a..67713c5bcc 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/depthwise_u8q.cpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/depthwise_u8q.cpp @@ -33,14 +33,14 @@ #include "depthwise_implementation_constraints.hpp" #if defined(__aarch64__) -#if defined(__ARM_FEATURE_SVE) && defined(SVE2) +#if defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) #include "kernels/sve_u8q_nhwc_3x3_s1_output2x2_dot_depthfirst.hpp" #include "kernels/sve_u8q_nhwc_3x3_s1_output2x2_mla_depthfirst.hpp" #include "kernels/sve_u8q_nhwc_3x3_s2_output2x2_mla_depthfirst.hpp" #include "kernels/sve_u8q_nhwc_5x5_s1_output2x2_mla_depthfirst.hpp" #include "kernels/sve_u8q_packed_to_nhwc_3x3_s2_with_multiplier_output2x4_dot_depthfirst.hpp" #include "kernels/sve_u8q_packed_to_nhwc_5x5_s1_with_multiplier_output4x2_dot_depthfirst.hpp" -#endif // defined(__ARM_FEATURE_SVE) && defined(SVE2) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) #include "kernels/a64_u8q_nhwc_3x3_s1_output2x2_dot_depthfirst.hpp" #include "kernels/a64_u8q_nhwc_3x3_s1_output2x2_mla_depthfirst.hpp" #include "kernels/a64_u8q_nhwc_3x3_s2_output2x2_mla_depthfirst.hpp" @@ -60,13 +60,14 @@ namespace depthwise { static const DepthwiseImplementation depthwise_u8q_methods[] = { #if defined(__aarch64__) -#if defined(__ARM_FEATURE_SVE) && defined(SVE2) +#if defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) { DepthwiseMethod::DEPTHFIRST, "sve_u8q_nhwc_3x3_s1_output2x2_dot_depthfirst", constraint(is_supported, has_no_channel_multiplier, - qp_has_no_left_shift), + qp_has_no_left_shift, + cpu_has_sve2), nullptr, [] (const DepthwiseArgs &args, const Requantize32 &qp) -> DepthwiseCommon * { return new DepthwiseDepthfirstQuantized(args, qp); @@ -77,7 +78,8 @@ static const DepthwiseImplementation de "sve_u8q_nhwc_3x3_s1_output2x2_mla_depthfirst", constraint(is_supported, has_no_channel_multiplier, - qp_has_no_left_shift), + qp_has_no_left_shift, + cpu_has_sve2), nullptr, [] (const DepthwiseArgs &args, const Requantize32 &qp) -> DepthwiseCommon * { return new DepthwiseDepthfirstQuantized(args, qp); @@ -88,7 +90,8 @@ static const DepthwiseImplementation de "sve_u8q_nhwc_3x3_s2_output2x2_mla_depthfirst", constraint(is_supported, has_no_channel_multiplier, - qp_has_no_left_shift), + qp_has_no_left_shift, + cpu_has_sve2), nullptr, [] (const DepthwiseArgs &args, const Requantize32 &qp) -> DepthwiseCommon * { return new DepthwiseDepthfirstQuantized(args, qp); @@ -99,7 +102,8 @@ static const DepthwiseImplementation de "sve_u8q_nhwc_5x5_s1_output2x2_mla_depthfirst", constraint(is_supported, has_no_channel_multiplier, - qp_has_no_left_shift), + qp_has_no_left_shift, + cpu_has_sve2), nullptr, [] (const DepthwiseArgs &args, const Requantize32 &qp) -> DepthwiseCommon * { return new DepthwiseDepthfirstQuantized(args, qp); @@ -109,7 +113,8 @@ static const DepthwiseImplementation de DepthwiseMethod::DEPTHFIRST, "sve_u8q_packed_to_nhwc_3x3_s2_with_multiplier_output2x4_dot_depthfirst", constraint(is_supported, - qp_has_no_left_shift), + qp_has_no_left_shift, + cpu_has_sve2), nullptr, [] (const DepthwiseArgs &args, const Requantize32 &qp) -> DepthwiseCommon * { return new DepthwiseDepthfirstWithMultiplierQuantized(args, qp); @@ -119,13 +124,14 @@ static const DepthwiseImplementation de DepthwiseMethod::DEPTHFIRST, "sve_u8q_packed_to_nhwc_5x5_s1_with_multiplier_output4x2_dot_depthfirst", constraint(is_supported, - qp_has_no_left_shift), + qp_has_no_left_shift, + cpu_has_sve2), nullptr, [] (const DepthwiseArgs &args, const Requantize32 &qp) -> DepthwiseCommon * { return new DepthwiseDepthfirstWithMultiplierQuantized(args, qp); }, }, -#endif // defined(__ARM_FEATURE_SVE) && defined(SVE2) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) { DepthwiseMethod::DEPTHFIRST, "a64_u8q_nhwc_3x3_s1_output2x2_dot_depthfirst", diff --git a/src/core/NEON/kernels/arm_conv/depthwise/depthwise_u8s8u8q.cpp b/src/core/NEON/kernels/arm_conv/depthwise/depthwise_u8s8u8q.cpp index 537a7c5e01..af4426b69f 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/depthwise_u8s8u8q.cpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/depthwise_u8s8u8q.cpp @@ -33,11 +33,11 @@ #include "depthwise_implementation_constraints.hpp" #if defined(__aarch64__) -#if defined(__ARM_FEATURE_SVE) && defined(SVE2) +#if defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) #include "kernels/sve_u8s8u8q_nhwc_3x3_s1_output2x2_mla_depthfirst.hpp" #include "kernels/sve_u8s8u8q_nhwc_3x3_s2_output2x2_mla_depthfirst.hpp" #include "kernels/sve_u8s8u8q_nhwc_5x5_s1_output2x2_mla_depthfirst.hpp" -#endif // defined(__ARM_FEATURE_SVE) && defined(SVE2) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) #include "kernels/a64_u8s8u8q_nhwc_3x3_s1_output2x2_mla_depthfirst.hpp" #include "kernels/a64_u8s8u8q_nhwc_3x3_s2_output2x2_mla_depthfirst.hpp" #include "kernels/a64_u8s8u8q_nhwc_5x5_s1_output2x2_mla_depthfirst.hpp" @@ -54,13 +54,14 @@ namespace depthwise { static const DepthwiseImplementation depthwise_u8q_methods[] = { #if defined(__aarch64__) -#if defined(__ARM_FEATURE_SVE) && defined(SVE2) +#if defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) { DepthwiseMethod::DEPTHFIRST, "sve_u8s8u8q_nhwc_3x3_s1_output2x2_mla_depthfirst", constraint(is_supported, has_no_channel_multiplier, - qp_has_no_left_shift), + qp_has_no_left_shift, + cpu_has_sve2), nullptr, [] (const DepthwiseArgs &args, const Requantize32 &qp) -> DepthwiseCommon * { return new DepthwiseDepthfirstQuantized(args, qp); @@ -71,7 +72,8 @@ static const DepthwiseImplementation dep "sve_u8s8u8q_nhwc_3x3_s2_output2x2_mla_depthfirst", constraint(is_supported, has_no_channel_multiplier, - qp_has_no_left_shift), + qp_has_no_left_shift, + cpu_has_sve2), nullptr, [] (const DepthwiseArgs &args, const Requantize32 &qp) -> DepthwiseCommon * { return new DepthwiseDepthfirstQuantized(args, qp); @@ -82,13 +84,14 @@ static const DepthwiseImplementation dep "sve_u8s8u8q_nhwc_5x5_s1_output2x2_mla_depthfirst", constraint(is_supported, has_no_channel_multiplier, - qp_has_no_left_shift), + qp_has_no_left_shift, + cpu_has_sve2), nullptr, [] (const DepthwiseArgs &args, const Requantize32 &qp) -> DepthwiseCommon * { return new DepthwiseDepthfirstQuantized(args, qp); }, }, -#endif // defined(__ARM_FEATURE_SVE) && defined(SVE2) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) { DepthwiseMethod::DEPTHFIRST, "a64_u8s8u8q_nhwc_3x3_s1_output2x2_mla_depthfirst", diff --git a/src/core/NEON/kernels/arm_conv/depthwise/interleaves/8b_mla.cpp b/src/core/NEON/kernels/arm_conv/depthwise/interleaves/8b_mla.cpp index 6c5ef23684..04b904275c 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/interleaves/8b_mla.cpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/interleaves/8b_mla.cpp @@ -110,14 +110,14 @@ void interleave_ ## ARCH ## _ ## TYPENAME ## _ ## KERN_ROWS ## x ## KERN_COLS # namespace arm_conv { namespace depthwise { -#if defined(__ARM_FEATURE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) ADD_IMPLEMENTATION(sve, s8q, int8_t, SVE, 2, 3, 3) ADD_IMPLEMENTATION(sve, s8q, int8_t, SVE, 2, 5, 5) ADD_IMPLEMENTATION(sve, u8q, uint8_t, SVE, 2, 3, 3) ADD_IMPLEMENTATION(sve, u8q, uint8_t, SVE, 2, 5, 5) -#endif // defined(__ARM_FEATURE_SVE) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) ADD_IMPLEMENTATION(a64, s8q, int8_t, None, 2, 3, 3) ADD_IMPLEMENTATION(a64, s8q, int8_t, None, 2, 5, 5) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/interleaves/list.hpp b/src/core/NEON/kernels/arm_conv/depthwise/interleaves/list.hpp index 41f0495acf..cb49a243af 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/interleaves/list.hpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/interleaves/list.hpp @@ -27,7 +27,7 @@ namespace arm_conv { namespace depthwise { -#if defined(__ARM_FEATURE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) class interleave_sve_u8q_3x3_dot { @@ -71,7 +71,7 @@ class interleave_sve_s8q_5x5_mla static size_t get_packed_size(const DepthwiseArgs &); }; -#endif // defined(__ARM_FEATURE_SVE) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) class interleave_a64_u8q_3x3_dot { diff --git a/src/core/NEON/kernels/arm_conv/depthwise/interleaves/sve_s8q_3x3_dot.cpp b/src/core/NEON/kernels/arm_conv/depthwise/interleaves/sve_s8q_3x3_dot.cpp index ea0c35b7ce..dfb6457ed9 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/interleaves/sve_s8q_3x3_dot.cpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/interleaves/sve_s8q_3x3_dot.cpp @@ -22,7 +22,7 @@ * SOFTWARE. */ -#if defined(__ARM_FEATURE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) #include "arm_gemm.hpp" #include "src/core/NEON/kernels/arm_gemm/utils.hpp" @@ -133,4 +133,4 @@ void interleave_sve_s8q_3x3_dot::pack_parameters(unsigned int n_channels, void * } // namespace depthwise } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/interleaves/sve_u8q_3x3_dot.cpp b/src/core/NEON/kernels/arm_conv/depthwise/interleaves/sve_u8q_3x3_dot.cpp index edd32a43f5..6c16bdc2fb 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/interleaves/sve_u8q_3x3_dot.cpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/interleaves/sve_u8q_3x3_dot.cpp @@ -22,7 +22,7 @@ * SOFTWARE. */ -#if defined(__ARM_FEATURE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) #include "arm_gemm.hpp" #include "src/core/NEON/kernels/arm_gemm/utils.hpp" @@ -133,4 +133,4 @@ void interleave_sve_u8q_3x3_dot::pack_parameters(unsigned int n_channels, void * } // namespace depthwise } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp16_nhwc_3x3_s1_output2x2_mla_depthfirst.hpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp16_nhwc_3x3_s1_output2x2_mla_depthfirst.hpp index c444472c68..b8e59306d5 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp16_nhwc_3x3_s1_output2x2_mla_depthfirst.hpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp16_nhwc_3x3_s1_output2x2_mla_depthfirst.hpp @@ -28,7 +28,7 @@ #pragma once -#if defined(__ARM_FEATURE_SVE) && defined(__ARM_FP16_ARGS) +#if defined(ARM_COMPUTE_ENABLE_SVE) && defined(__ARM_FP16_ARGS) namespace arm_conv { namespace depthwise { @@ -69,4 +69,4 @@ struct sve_fp16_nhwc_3x3_s1_output2x2_mla_depthfirst } // namespace depthwise } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) && defined(__ARM_FP16_ARGS) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) && defined(__ARM_FP16_ARGS) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp16_nhwc_3x3_s1_output2x2_mla_depthfirst/generic_direct.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp16_nhwc_3x3_s1_output2x2_mla_depthfirst/generic_direct.cpp index b788c705e5..a4c1a40100 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp16_nhwc_3x3_s1_output2x2_mla_depthfirst/generic_direct.cpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp16_nhwc_3x3_s1_output2x2_mla_depthfirst/generic_direct.cpp @@ -25,7 +25,7 @@ #include #include -#if defined(__ARM_FEATURE_SVE) && defined(__ARM_FP16_ARGS) +#if defined(ARM_COMPUTE_ENABLE_SVE) && defined(__ARM_FP16_ARGS) namespace arm_conv { namespace depthwise { @@ -321,4 +321,4 @@ void sve_fp16_nhwc_3x3_s1_output2x2_mla_depthfirst_direct_impl( } // namespace depthwise } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) && defined(__ARM_FP16_ARGS) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) && defined(__ARM_FP16_ARGS) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp16_nhwc_3x3_s1_output2x2_mla_depthfirst/generic_indirect.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp16_nhwc_3x3_s1_output2x2_mla_depthfirst/generic_indirect.cpp index d8f905b33a..a845e7c0c6 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp16_nhwc_3x3_s1_output2x2_mla_depthfirst/generic_indirect.cpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp16_nhwc_3x3_s1_output2x2_mla_depthfirst/generic_indirect.cpp @@ -25,7 +25,7 @@ #include #include -#if defined(__ARM_FEATURE_SVE) && defined(__ARM_FP16_ARGS) +#if defined(ARM_COMPUTE_ENABLE_SVE) && defined(__ARM_FP16_ARGS) namespace arm_conv { namespace depthwise { @@ -281,4 +281,4 @@ void sve_fp16_nhwc_3x3_s1_output2x2_mla_depthfirst_indirect_impl( } // namespace depthwise } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) && defined(__ARM_FP16_ARGS) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) && defined(__ARM_FP16_ARGS) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp16_nhwc_3x3_s1_output3x3_mla_depthfirst.hpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp16_nhwc_3x3_s1_output3x3_mla_depthfirst.hpp index f5d31e63f8..e1f23aae66 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp16_nhwc_3x3_s1_output3x3_mla_depthfirst.hpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp16_nhwc_3x3_s1_output3x3_mla_depthfirst.hpp @@ -28,7 +28,7 @@ #pragma once -#if defined(__ARM_FEATURE_SVE) && defined(__ARM_FP16_ARGS) +#if defined(ARM_COMPUTE_ENABLE_SVE) && defined(__ARM_FP16_ARGS) namespace arm_conv { namespace depthwise { @@ -69,4 +69,4 @@ struct sve_fp16_nhwc_3x3_s1_output3x3_mla_depthfirst } // namespace depthwise } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) && defined(__ARM_FP16_ARGS) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) && defined(__ARM_FP16_ARGS) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp16_nhwc_3x3_s1_output3x3_mla_depthfirst/generic_direct.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp16_nhwc_3x3_s1_output3x3_mla_depthfirst/generic_direct.cpp index aebf0bf7ac..0708f578a8 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp16_nhwc_3x3_s1_output3x3_mla_depthfirst/generic_direct.cpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp16_nhwc_3x3_s1_output3x3_mla_depthfirst/generic_direct.cpp @@ -25,7 +25,7 @@ #include #include -#if defined(__ARM_FEATURE_SVE) && defined(__ARM_FP16_ARGS) +#if defined(ARM_COMPUTE_ENABLE_SVE) && defined(__ARM_FP16_ARGS) namespace arm_conv { namespace depthwise { @@ -475,4 +475,4 @@ void sve_fp16_nhwc_3x3_s1_output3x3_mla_depthfirst_direct_impl( } // namespace depthwise } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) && defined(__ARM_FP16_ARGS) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) && defined(__ARM_FP16_ARGS) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp16_nhwc_3x3_s1_output3x3_mla_depthfirst/generic_indirect.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp16_nhwc_3x3_s1_output3x3_mla_depthfirst/generic_indirect.cpp index 65ecb6d218..770576c5da 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp16_nhwc_3x3_s1_output3x3_mla_depthfirst/generic_indirect.cpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp16_nhwc_3x3_s1_output3x3_mla_depthfirst/generic_indirect.cpp @@ -25,7 +25,7 @@ #include #include -#if defined(__ARM_FEATURE_SVE) && defined(__ARM_FP16_ARGS) +#if defined(ARM_COMPUTE_ENABLE_SVE) && defined(__ARM_FP16_ARGS) namespace arm_conv { namespace depthwise { @@ -492,4 +492,4 @@ void sve_fp16_nhwc_3x3_s1_output3x3_mla_depthfirst_indirect_impl( } // namespace depthwise } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) && defined(__ARM_FP16_ARGS) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) && defined(__ARM_FP16_ARGS) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp16_nhwc_3x3_s1_output4x4_mla_depthfirst.hpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp16_nhwc_3x3_s1_output4x4_mla_depthfirst.hpp index f976842b7a..7d035f0571 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp16_nhwc_3x3_s1_output4x4_mla_depthfirst.hpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp16_nhwc_3x3_s1_output4x4_mla_depthfirst.hpp @@ -28,7 +28,7 @@ #pragma once -#if defined(__ARM_FEATURE_SVE) && defined(__ARM_FP16_ARGS) +#if defined(ARM_COMPUTE_ENABLE_SVE) && defined(__ARM_FP16_ARGS) namespace arm_conv { namespace depthwise { @@ -69,4 +69,4 @@ struct sve_fp16_nhwc_3x3_s1_output4x4_mla_depthfirst } // namespace depthwise } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) && defined(__ARM_FP16_ARGS) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) && defined(__ARM_FP16_ARGS) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp16_nhwc_3x3_s1_output4x4_mla_depthfirst/generic_direct.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp16_nhwc_3x3_s1_output4x4_mla_depthfirst/generic_direct.cpp index 8f0fce7e96..93e1908df7 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp16_nhwc_3x3_s1_output4x4_mla_depthfirst/generic_direct.cpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp16_nhwc_3x3_s1_output4x4_mla_depthfirst/generic_direct.cpp @@ -25,7 +25,7 @@ #include #include -#if defined(__ARM_FEATURE_SVE) && defined(__ARM_FP16_ARGS) +#if defined(ARM_COMPUTE_ENABLE_SVE) && defined(__ARM_FP16_ARGS) namespace arm_conv { namespace depthwise { @@ -685,4 +685,4 @@ void sve_fp16_nhwc_3x3_s1_output4x4_mla_depthfirst_direct_impl( } // namespace depthwise } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) && defined(__ARM_FP16_ARGS) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) && defined(__ARM_FP16_ARGS) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp16_nhwc_3x3_s1_output4x4_mla_depthfirst/generic_indirect.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp16_nhwc_3x3_s1_output4x4_mla_depthfirst/generic_indirect.cpp index 8148353f1a..8eaf0a46d6 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp16_nhwc_3x3_s1_output4x4_mla_depthfirst/generic_indirect.cpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp16_nhwc_3x3_s1_output4x4_mla_depthfirst/generic_indirect.cpp @@ -25,7 +25,7 @@ #include #include -#if defined(__ARM_FEATURE_SVE) && defined(__ARM_FP16_ARGS) +#if defined(ARM_COMPUTE_ENABLE_SVE) && defined(__ARM_FP16_ARGS) namespace arm_conv { namespace depthwise { @@ -743,4 +743,4 @@ void sve_fp16_nhwc_3x3_s1_output4x4_mla_depthfirst_indirect_impl( } // namespace depthwise } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) && defined(__ARM_FP16_ARGS) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) && defined(__ARM_FP16_ARGS) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp16_nhwc_3x3_s2_output2x2_mla_depthfirst.hpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp16_nhwc_3x3_s2_output2x2_mla_depthfirst.hpp index 98f50f8436..a6a4afb3b5 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp16_nhwc_3x3_s2_output2x2_mla_depthfirst.hpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp16_nhwc_3x3_s2_output2x2_mla_depthfirst.hpp @@ -28,7 +28,7 @@ #pragma once -#if defined(__ARM_FEATURE_SVE) && defined(__ARM_FP16_ARGS) +#if defined(ARM_COMPUTE_ENABLE_SVE) && defined(__ARM_FP16_ARGS) namespace arm_conv { namespace depthwise { @@ -69,4 +69,4 @@ struct sve_fp16_nhwc_3x3_s2_output2x2_mla_depthfirst } // namespace depthwise } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) && defined(__ARM_FP16_ARGS) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) && defined(__ARM_FP16_ARGS) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp16_nhwc_3x3_s2_output2x2_mla_depthfirst/generic_direct.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp16_nhwc_3x3_s2_output2x2_mla_depthfirst/generic_direct.cpp index e620604a16..2238bf08cd 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp16_nhwc_3x3_s2_output2x2_mla_depthfirst/generic_direct.cpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp16_nhwc_3x3_s2_output2x2_mla_depthfirst/generic_direct.cpp @@ -25,7 +25,7 @@ #include #include -#if defined(__ARM_FEATURE_SVE) && defined(__ARM_FP16_ARGS) +#if defined(ARM_COMPUTE_ENABLE_SVE) && defined(__ARM_FP16_ARGS) namespace arm_conv { namespace depthwise { @@ -342,4 +342,4 @@ void sve_fp16_nhwc_3x3_s2_output2x2_mla_depthfirst_direct_impl( } // namespace depthwise } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) && defined(__ARM_FP16_ARGS) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) && defined(__ARM_FP16_ARGS) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp16_nhwc_3x3_s2_output2x2_mla_depthfirst/generic_indirect.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp16_nhwc_3x3_s2_output2x2_mla_depthfirst/generic_indirect.cpp index 3ed743e3ed..0d5d4176aa 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp16_nhwc_3x3_s2_output2x2_mla_depthfirst/generic_indirect.cpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp16_nhwc_3x3_s2_output2x2_mla_depthfirst/generic_indirect.cpp @@ -25,7 +25,7 @@ #include #include -#if defined(__ARM_FEATURE_SVE) && defined(__ARM_FP16_ARGS) +#if defined(ARM_COMPUTE_ENABLE_SVE) && defined(__ARM_FP16_ARGS) namespace arm_conv { namespace depthwise { @@ -342,4 +342,4 @@ void sve_fp16_nhwc_3x3_s2_output2x2_mla_depthfirst_indirect_impl( } // namespace depthwise } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) && defined(__ARM_FP16_ARGS) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) && defined(__ARM_FP16_ARGS) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp16_nhwc_5x5_s1_output2x2_mla_depthfirst.hpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp16_nhwc_5x5_s1_output2x2_mla_depthfirst.hpp index 20f3ee0329..236f9bf43a 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp16_nhwc_5x5_s1_output2x2_mla_depthfirst.hpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp16_nhwc_5x5_s1_output2x2_mla_depthfirst.hpp @@ -28,7 +28,7 @@ #pragma once -#if defined(__ARM_FEATURE_SVE) && defined(__ARM_FP16_ARGS) +#if defined(ARM_COMPUTE_ENABLE_SVE) && defined(__ARM_FP16_ARGS) namespace arm_conv { namespace depthwise { @@ -69,4 +69,4 @@ struct sve_fp16_nhwc_5x5_s1_output2x2_mla_depthfirst } // namespace depthwise } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) && defined(__ARM_FP16_ARGS) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) && defined(__ARM_FP16_ARGS) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp16_nhwc_5x5_s1_output2x2_mla_depthfirst/generic_direct.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp16_nhwc_5x5_s1_output2x2_mla_depthfirst/generic_direct.cpp index f1ee5c53ce..6b1564e6c9 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp16_nhwc_5x5_s1_output2x2_mla_depthfirst/generic_direct.cpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp16_nhwc_5x5_s1_output2x2_mla_depthfirst/generic_direct.cpp @@ -25,7 +25,7 @@ #include #include -#if defined(__ARM_FEATURE_SVE) && defined(__ARM_FP16_ARGS) +#if defined(ARM_COMPUTE_ENABLE_SVE) && defined(__ARM_FP16_ARGS) namespace arm_conv { namespace depthwise { @@ -528,4 +528,4 @@ void sve_fp16_nhwc_5x5_s1_output2x2_mla_depthfirst_direct_impl( } // namespace depthwise } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) && defined(__ARM_FP16_ARGS) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) && defined(__ARM_FP16_ARGS) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp16_nhwc_5x5_s1_output2x2_mla_depthfirst/generic_indirect.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp16_nhwc_5x5_s1_output2x2_mla_depthfirst/generic_indirect.cpp index caa15a9816..be128b4aff 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp16_nhwc_5x5_s1_output2x2_mla_depthfirst/generic_indirect.cpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp16_nhwc_5x5_s1_output2x2_mla_depthfirst/generic_indirect.cpp @@ -25,7 +25,7 @@ #include #include -#if defined(__ARM_FEATURE_SVE) && defined(__ARM_FP16_ARGS) +#if defined(ARM_COMPUTE_ENABLE_SVE) && defined(__ARM_FP16_ARGS) namespace arm_conv { namespace depthwise { @@ -556,4 +556,4 @@ void sve_fp16_nhwc_5x5_s1_output2x2_mla_depthfirst_indirect_impl( } // namespace depthwise } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) && defined(__ARM_FP16_ARGS) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) && defined(__ARM_FP16_ARGS) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst.hpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst.hpp index 74716ddf1f..05e82d4e76 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst.hpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst.hpp @@ -28,7 +28,7 @@ #pragma once -#if defined(__ARM_FEATURE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) namespace arm_conv { namespace depthwise { @@ -69,4 +69,4 @@ struct sve_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst } // namespace depthwise } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst/generic.cpp index d443855758..eddcffc196 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst/generic.cpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst/generic.cpp @@ -25,7 +25,7 @@ #include #include -#if defined(__ARM_FEATURE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) namespace arm_conv { namespace depthwise { @@ -252,4 +252,4 @@ void sve_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst_impl( } // namespace depthwise } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst/generic_direct.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst/generic_direct.cpp index d899255e84..eb632eb4fe 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst/generic_direct.cpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst/generic_direct.cpp @@ -25,7 +25,7 @@ #include #include -#if defined(__ARM_FEATURE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) namespace arm_conv { namespace depthwise { @@ -361,4 +361,4 @@ void sve_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst_direct_impl( } // namespace depthwise } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst/generic_indirect.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst/generic_indirect.cpp index e8a1539437..fb41ca0754 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst/generic_indirect.cpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst/generic_indirect.cpp @@ -25,7 +25,7 @@ #include #include -#if defined(__ARM_FEATURE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) namespace arm_conv { namespace depthwise { @@ -315,4 +315,4 @@ void sve_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst_indirect_impl( } // namespace depthwise } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst_strided.hpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst_strided.hpp index 173fc631d8..65cb735bde 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst_strided.hpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst_strided.hpp @@ -26,7 +26,7 @@ #pragma once -#if defined(__ARM_FEATURE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) namespace arm_conv { namespace depthwise { @@ -63,4 +63,4 @@ struct sve_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst_strided } // namespace depthwise } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst_strided/generic.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst_strided/generic.cpp index cecc192c49..97c4d88119 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst_strided/generic.cpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst_strided/generic.cpp @@ -25,7 +25,7 @@ #include #include -#if defined(__ARM_FEATURE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) namespace arm_conv { namespace depthwise { @@ -244,4 +244,4 @@ void sve_fp32_nhwc_3x3_s1_output2x2_mla_depthfirst_strided_impl( } // namespace depthwise } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s1_output3x3_mla_depthfirst.hpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s1_output3x3_mla_depthfirst.hpp index 5ec78aa05f..ef5f4187f9 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s1_output3x3_mla_depthfirst.hpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s1_output3x3_mla_depthfirst.hpp @@ -28,7 +28,7 @@ #pragma once -#if defined(__ARM_FEATURE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) namespace arm_conv { namespace depthwise { @@ -69,4 +69,4 @@ struct sve_fp32_nhwc_3x3_s1_output3x3_mla_depthfirst } // namespace depthwise } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s1_output3x3_mla_depthfirst/generic_direct.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s1_output3x3_mla_depthfirst/generic_direct.cpp index 4d0bd311cc..6bc333be41 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s1_output3x3_mla_depthfirst/generic_direct.cpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s1_output3x3_mla_depthfirst/generic_direct.cpp @@ -25,7 +25,7 @@ #include #include -#if defined(__ARM_FEATURE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) namespace arm_conv { namespace depthwise { @@ -535,4 +535,4 @@ void sve_fp32_nhwc_3x3_s1_output3x3_mla_depthfirst_direct_impl( } // namespace depthwise } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s1_output3x3_mla_depthfirst/generic_indirect.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s1_output3x3_mla_depthfirst/generic_indirect.cpp index 7c6fb306b7..3877ae2f03 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s1_output3x3_mla_depthfirst/generic_indirect.cpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s1_output3x3_mla_depthfirst/generic_indirect.cpp @@ -25,7 +25,7 @@ #include #include -#if defined(__ARM_FEATURE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) namespace arm_conv { namespace depthwise { @@ -544,4 +544,4 @@ void sve_fp32_nhwc_3x3_s1_output3x3_mla_depthfirst_indirect_impl( } // namespace depthwise } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s1_output4x4_mla_depthfirst.hpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s1_output4x4_mla_depthfirst.hpp index a9823e3917..fc9588cd58 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s1_output4x4_mla_depthfirst.hpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s1_output4x4_mla_depthfirst.hpp @@ -28,7 +28,7 @@ #pragma once -#if defined(__ARM_FEATURE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) namespace arm_conv { namespace depthwise { @@ -69,4 +69,4 @@ struct sve_fp32_nhwc_3x3_s1_output4x4_mla_depthfirst } // namespace depthwise } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s1_output4x4_mla_depthfirst/generic_direct.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s1_output4x4_mla_depthfirst/generic_direct.cpp index 4c24ad9c15..7df8e481c0 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s1_output4x4_mla_depthfirst/generic_direct.cpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s1_output4x4_mla_depthfirst/generic_direct.cpp @@ -25,7 +25,7 @@ #include #include -#if defined(__ARM_FEATURE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) namespace arm_conv { namespace depthwise { @@ -685,4 +685,4 @@ void sve_fp32_nhwc_3x3_s1_output4x4_mla_depthfirst_direct_impl( } // namespace depthwise } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s1_output4x4_mla_depthfirst/generic_indirect.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s1_output4x4_mla_depthfirst/generic_indirect.cpp index ac0c4ec4e3..22e12a7b9a 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s1_output4x4_mla_depthfirst/generic_indirect.cpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s1_output4x4_mla_depthfirst/generic_indirect.cpp @@ -25,7 +25,7 @@ #include #include -#if defined(__ARM_FEATURE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) namespace arm_conv { namespace depthwise { @@ -817,4 +817,4 @@ void sve_fp32_nhwc_3x3_s1_output4x4_mla_depthfirst_indirect_impl( } // namespace depthwise } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst.hpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst.hpp index f5b6a4f8ff..2119c06965 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst.hpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst.hpp @@ -28,7 +28,7 @@ #pragma once -#if defined(__ARM_FEATURE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) namespace arm_conv { namespace depthwise { @@ -69,4 +69,4 @@ struct sve_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst } // namespace depthwise } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst/generic_direct.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst/generic_direct.cpp index ad53872630..78e67e1be1 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst/generic_direct.cpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst/generic_direct.cpp @@ -25,7 +25,7 @@ #include #include -#if defined(__ARM_FEATURE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) namespace arm_conv { namespace depthwise { @@ -402,4 +402,4 @@ void sve_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst_direct_impl( } // namespace depthwise } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst/generic_indirect.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst/generic_indirect.cpp index 06b3575d4b..8555cfea7c 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst/generic_indirect.cpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst/generic_indirect.cpp @@ -25,7 +25,7 @@ #include #include -#if defined(__ARM_FEATURE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) namespace arm_conv { namespace depthwise { @@ -394,4 +394,4 @@ void sve_fp32_nhwc_3x3_s2_output2x2_mla_depthfirst_indirect_impl( } // namespace depthwise } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst.hpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst.hpp index d49f7fdceb..6f1f187818 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst.hpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst.hpp @@ -28,7 +28,7 @@ #pragma once -#if defined(__ARM_FEATURE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) namespace arm_conv { namespace depthwise { @@ -69,4 +69,4 @@ struct sve_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst } // namespace depthwise } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst/generic_direct.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst/generic_direct.cpp index f751186dce..edafe82770 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst/generic_direct.cpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst/generic_direct.cpp @@ -25,7 +25,7 @@ #include #include -#if defined(__ARM_FEATURE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) namespace arm_conv { namespace depthwise { @@ -528,4 +528,4 @@ void sve_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst_direct_impl( } // namespace depthwise } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst/generic_indirect.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst/generic_indirect.cpp index 6e35ee86c5..1bfe7eb09c 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst/generic_indirect.cpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst/generic_indirect.cpp @@ -25,7 +25,7 @@ #include #include -#if defined(__ARM_FEATURE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) namespace arm_conv { namespace depthwise { @@ -630,4 +630,4 @@ void sve_fp32_nhwc_5x5_s1_output2x2_mla_depthfirst_indirect_impl( } // namespace depthwise } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_generic_output9_mla_depthfirst.hpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_generic_output9_mla_depthfirst.hpp index dd2c519e3a..bd071d370c 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_generic_output9_mla_depthfirst.hpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_generic_output9_mla_depthfirst.hpp @@ -28,7 +28,7 @@ #pragma once -#if defined(__ARM_FEATURE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) namespace arm_conv { namespace depthwise { @@ -56,4 +56,4 @@ struct sve_fp32_nhwc_generic_output9_mla_depthfirst } // namespace depthwise } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_generic_output9_mla_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_generic_output9_mla_depthfirst/generic.cpp index 370218e1d4..eac77516c2 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_generic_output9_mla_depthfirst/generic.cpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_nhwc_generic_output9_mla_depthfirst/generic.cpp @@ -25,7 +25,7 @@ #include #include -#if defined(__ARM_FEATURE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) namespace arm_conv { namespace depthwise { @@ -163,4 +163,4 @@ void sve_fp32_nhwc_generic_output9_mla_depthfirst_impl( } // namespace depthwise } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_packed_to_nhwc_3x3_s2_with_multiplier_output3x3_mla_depthfirst.hpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_packed_to_nhwc_3x3_s2_with_multiplier_output3x3_mla_depthfirst.hpp index 5cf3314c65..563f0fc59f 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_packed_to_nhwc_3x3_s2_with_multiplier_output3x3_mla_depthfirst.hpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_packed_to_nhwc_3x3_s2_with_multiplier_output3x3_mla_depthfirst.hpp @@ -28,7 +28,7 @@ #pragma once -#if defined(__ARM_FEATURE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) namespace arm_conv { namespace depthwise { @@ -67,4 +67,4 @@ struct sve_fp32_packed_to_nhwc_3x3_s2_with_multiplier_output3x3_mla_depthfirst } // namespace depthwise } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_packed_to_nhwc_3x3_s2_with_multiplier_output3x3_mla_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_packed_to_nhwc_3x3_s2_with_multiplier_output3x3_mla_depthfirst/generic.cpp index ce640a207d..395b112460 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_packed_to_nhwc_3x3_s2_with_multiplier_output3x3_mla_depthfirst/generic.cpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_packed_to_nhwc_3x3_s2_with_multiplier_output3x3_mla_depthfirst/generic.cpp @@ -25,7 +25,7 @@ #include #include -#if defined(__ARM_FEATURE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) namespace arm_conv { namespace depthwise { @@ -256,4 +256,4 @@ void sve_fp32_packed_to_nhwc_3x3_s2_with_multiplier_output3x3_mla_depthfirst_imp } // namespace depthwise } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_packed_to_nhwc_5x5_s1_with_multiplier_output2x4_mla_depthfirst.hpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_packed_to_nhwc_5x5_s1_with_multiplier_output2x4_mla_depthfirst.hpp index 3c2f77156d..e9378c2a12 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_packed_to_nhwc_5x5_s1_with_multiplier_output2x4_mla_depthfirst.hpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_packed_to_nhwc_5x5_s1_with_multiplier_output2x4_mla_depthfirst.hpp @@ -28,7 +28,7 @@ #pragma once -#if defined(__ARM_FEATURE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) namespace arm_conv { namespace depthwise { @@ -67,4 +67,4 @@ struct sve_fp32_packed_to_nhwc_5x5_s1_with_multiplier_output2x4_mla_depthfirst } // namespace depthwise } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_packed_to_nhwc_5x5_s1_with_multiplier_output2x4_mla_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_packed_to_nhwc_5x5_s1_with_multiplier_output2x4_mla_depthfirst/generic.cpp index 453b00c0db..e7193d625f 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_packed_to_nhwc_5x5_s1_with_multiplier_output2x4_mla_depthfirst/generic.cpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_packed_to_nhwc_5x5_s1_with_multiplier_output2x4_mla_depthfirst/generic.cpp @@ -25,7 +25,7 @@ #include #include -#if defined(__ARM_FEATURE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) namespace arm_conv { namespace depthwise { @@ -389,4 +389,4 @@ void sve_fp32_packed_to_nhwc_5x5_s1_with_multiplier_output2x4_mla_depthfirst_imp } // namespace depthwise } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_packed_to_nhwc_generic_with_multiplier_output2x8_mla_depthfirst.hpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_packed_to_nhwc_generic_with_multiplier_output2x8_mla_depthfirst.hpp index 7a4bd1dd1e..6849e562bc 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_packed_to_nhwc_generic_with_multiplier_output2x8_mla_depthfirst.hpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_packed_to_nhwc_generic_with_multiplier_output2x8_mla_depthfirst.hpp @@ -28,7 +28,7 @@ #pragma once -#if defined(__ARM_FEATURE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) namespace arm_conv { namespace depthwise { @@ -59,4 +59,4 @@ struct sve_fp32_packed_to_nhwc_generic_with_multiplier_output2x8_mla_depthfirst } // namespace depthwise } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_packed_to_nhwc_generic_with_multiplier_output2x8_mla_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_packed_to_nhwc_generic_with_multiplier_output2x8_mla_depthfirst/generic.cpp index 0124370067..b23cec8593 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_packed_to_nhwc_generic_with_multiplier_output2x8_mla_depthfirst/generic.cpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp32_packed_to_nhwc_generic_with_multiplier_output2x8_mla_depthfirst/generic.cpp @@ -25,7 +25,7 @@ #include #include -#if defined(__ARM_FEATURE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) namespace arm_conv { namespace depthwise { @@ -451,4 +451,4 @@ void sve_fp32_packed_to_nhwc_generic_with_multiplier_output2x8_mla_depthfirst_im } // namespace depthwise } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_s8q_nhwc_3x3_s1_output2x2_dot_depthfirst.hpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_s8q_nhwc_3x3_s1_output2x2_dot_depthfirst.hpp index 295e1f6450..39974fde88 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_s8q_nhwc_3x3_s1_output2x2_dot_depthfirst.hpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_s8q_nhwc_3x3_s1_output2x2_dot_depthfirst.hpp @@ -29,7 +29,7 @@ #pragma once -#if defined(__ARM_FEATURE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) namespace arm_conv { namespace depthwise { @@ -72,4 +72,4 @@ struct sve_s8q_nhwc_3x3_s1_output2x2_dot_depthfirst } // namespace depthwise } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_s8q_nhwc_3x3_s1_output2x2_dot_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_s8q_nhwc_3x3_s1_output2x2_dot_depthfirst/generic.cpp index 90f924a8ed..8e9e5f4aeb 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_s8q_nhwc_3x3_s1_output2x2_dot_depthfirst/generic.cpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_s8q_nhwc_3x3_s1_output2x2_dot_depthfirst/generic.cpp @@ -22,7 +22,7 @@ * SOFTWARE. */ -#if defined(__ARM_FEATURE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) #include "arm_gemm.hpp" #include @@ -454,4 +454,4 @@ void sve_s8q_nhwc_3x3_s1_output2x2_dot_depthfirst_impl(const int8_t *const *cons } // namespace depthwise } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_s8q_nhwc_3x3_s1_output2x2_mla_depthfirst.hpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_s8q_nhwc_3x3_s1_output2x2_mla_depthfirst.hpp index 7dd241a8cf..f788829572 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_s8q_nhwc_3x3_s1_output2x2_mla_depthfirst.hpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_s8q_nhwc_3x3_s1_output2x2_mla_depthfirst.hpp @@ -29,7 +29,7 @@ #pragma once -#if defined(__aarch64__) && defined(__ARM_FEATURE_SVE) && defined(SVE2) +#if defined(__aarch64__) && defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) namespace arm_conv { namespace depthwise { @@ -72,4 +72,4 @@ struct sve_s8q_nhwc_3x3_s1_output2x2_mla_depthfirst } // namespace depthwise } // namespace arm_conv -#endif // defined(__aarch64__) && defined(__ARM_FEATURE_SVE) && defined(SVE2) +#endif // defined(__aarch64__) && defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_s8q_nhwc_3x3_s1_output2x2_mla_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_s8q_nhwc_3x3_s1_output2x2_mla_depthfirst/generic.cpp index 8bf5badfaf..87387960f1 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_s8q_nhwc_3x3_s1_output2x2_mla_depthfirst/generic.cpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_s8q_nhwc_3x3_s1_output2x2_mla_depthfirst/generic.cpp @@ -27,7 +27,7 @@ #include #include -#if defined(__aarch64__) && defined(__ARM_FEATURE_SVE) && defined(SVE2) +#if defined(__aarch64__) && defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) namespace arm_conv { namespace depthwise { @@ -415,4 +415,4 @@ void sve_s8q_nhwc_3x3_s1_output2x2_mla_depthfirst_impl( } // namespace depthwise } // namespace arm_conv -#endif // defined(__aarch64__) && defined(__ARM_FEATURE_SVE) && defined(SVE2) +#endif // defined(__aarch64__) && defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_s8q_nhwc_3x3_s2_output2x2_mla_depthfirst.hpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_s8q_nhwc_3x3_s2_output2x2_mla_depthfirst.hpp index 89507ef9ea..5c2b4f6f53 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_s8q_nhwc_3x3_s2_output2x2_mla_depthfirst.hpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_s8q_nhwc_3x3_s2_output2x2_mla_depthfirst.hpp @@ -29,7 +29,7 @@ #pragma once -#if defined(__aarch64__) && defined(__ARM_FEATURE_SVE) && defined(SVE2) +#if defined(__aarch64__) && defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) namespace arm_conv { namespace depthwise { @@ -72,4 +72,4 @@ struct sve_s8q_nhwc_3x3_s2_output2x2_mla_depthfirst } // namespace depthwise } // namespace arm_conv -#endif // defined(__aarch64__) && defined(__ARM_FEATURE_SVE) && defined(SVE2) +#endif // defined(__aarch64__) && defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_s8q_nhwc_3x3_s2_output2x2_mla_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_s8q_nhwc_3x3_s2_output2x2_mla_depthfirst/generic.cpp index b773ca1fe6..b4a1026aaa 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_s8q_nhwc_3x3_s2_output2x2_mla_depthfirst/generic.cpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_s8q_nhwc_3x3_s2_output2x2_mla_depthfirst/generic.cpp @@ -27,7 +27,7 @@ #include #include -#if defined(__aarch64__) && defined(__ARM_FEATURE_SVE) && defined(SVE2) +#if defined(__aarch64__) && defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) namespace arm_conv { namespace depthwise { @@ -456,4 +456,4 @@ void sve_s8q_nhwc_3x3_s2_output2x2_mla_depthfirst_impl( } // namespace depthwise } // namespace arm_conv -#endif // defined(__aarch64__) && defined(__ARM_FEATURE_SVE) && defined(SVE2) +#endif // defined(__aarch64__) && defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_s8q_nhwc_5x5_s1_output2x2_mla_depthfirst.hpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_s8q_nhwc_5x5_s1_output2x2_mla_depthfirst.hpp index 54ac1c2e0b..948c5ad2e7 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_s8q_nhwc_5x5_s1_output2x2_mla_depthfirst.hpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_s8q_nhwc_5x5_s1_output2x2_mla_depthfirst.hpp @@ -29,7 +29,7 @@ #pragma once -#if defined(__aarch64__) && defined(__ARM_FEATURE_SVE) && defined(SVE2) +#if defined(__aarch64__) && defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) namespace arm_conv { namespace depthwise { @@ -72,4 +72,4 @@ struct sve_s8q_nhwc_5x5_s1_output2x2_mla_depthfirst } // namespace depthwise } // namespace arm_conv -#endif // defined(__aarch64__) && defined(__ARM_FEATURE_SVE) && defined(SVE2) +#endif // defined(__aarch64__) && defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_s8q_nhwc_5x5_s1_output2x2_mla_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_s8q_nhwc_5x5_s1_output2x2_mla_depthfirst/generic.cpp index c02bb584e5..565c145f92 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_s8q_nhwc_5x5_s1_output2x2_mla_depthfirst/generic.cpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_s8q_nhwc_5x5_s1_output2x2_mla_depthfirst/generic.cpp @@ -27,7 +27,7 @@ #include #include -#if defined(__aarch64__) && defined(__ARM_FEATURE_SVE) && defined(SVE2) +#if defined(__aarch64__) && defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) namespace arm_conv { namespace depthwise { @@ -657,4 +657,4 @@ void sve_s8q_nhwc_5x5_s1_output2x2_mla_depthfirst_impl( } // namespace depthwise } // namespace arm_conv -#endif // defined(__aarch64__) && defined(__ARM_FEATURE_SVE) && defined(SVE2) +#endif // defined(__aarch64__) && defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_s8q_packed_to_nhwc_3x3_s2_with_multiplier_output2x4_dot_depthfirst.hpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_s8q_packed_to_nhwc_3x3_s2_with_multiplier_output2x4_dot_depthfirst.hpp index 7ab83e8659..176c4f878e 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_s8q_packed_to_nhwc_3x3_s2_with_multiplier_output2x4_dot_depthfirst.hpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_s8q_packed_to_nhwc_3x3_s2_with_multiplier_output2x4_dot_depthfirst.hpp @@ -28,7 +28,7 @@ #pragma once -#if defined(__ARM_FEATURE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) namespace arm_conv { namespace depthwise { @@ -67,4 +67,4 @@ struct sve_s8q_packed_to_nhwc_3x3_s2_with_multiplier_output2x4_dot_depthfirst } // namespace depthwise } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_s8q_packed_to_nhwc_3x3_s2_with_multiplier_output2x4_dot_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_s8q_packed_to_nhwc_3x3_s2_with_multiplier_output2x4_dot_depthfirst/generic.cpp index f531912e72..ea7acf5b6e 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_s8q_packed_to_nhwc_3x3_s2_with_multiplier_output2x4_dot_depthfirst/generic.cpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_s8q_packed_to_nhwc_3x3_s2_with_multiplier_output2x4_dot_depthfirst/generic.cpp @@ -27,7 +27,7 @@ #include #include -#if defined(__ARM_FEATURE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) namespace arm_conv { namespace depthwise { @@ -350,4 +350,4 @@ void sve_s8q_packed_to_nhwc_3x3_s2_with_multiplier_output2x4_dot_depthfirst_impl } // namespace depthwise } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_s8q_packed_to_nhwc_5x5_s1_with_multiplier_output4x2_dot_depthfirst.hpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_s8q_packed_to_nhwc_5x5_s1_with_multiplier_output4x2_dot_depthfirst.hpp index 2c33bdcd3a..10eee34d62 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_s8q_packed_to_nhwc_5x5_s1_with_multiplier_output4x2_dot_depthfirst.hpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_s8q_packed_to_nhwc_5x5_s1_with_multiplier_output4x2_dot_depthfirst.hpp @@ -28,7 +28,7 @@ #pragma once -#if defined(__ARM_FEATURE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) namespace arm_conv { namespace depthwise { @@ -67,4 +67,4 @@ struct sve_s8q_packed_to_nhwc_5x5_s1_with_multiplier_output4x2_dot_depthfirst } // namespace depthwise } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_s8q_packed_to_nhwc_5x5_s1_with_multiplier_output4x2_dot_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_s8q_packed_to_nhwc_5x5_s1_with_multiplier_output4x2_dot_depthfirst/generic.cpp index ffa2c6a7bc..6bc5935348 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_s8q_packed_to_nhwc_5x5_s1_with_multiplier_output4x2_dot_depthfirst/generic.cpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_s8q_packed_to_nhwc_5x5_s1_with_multiplier_output4x2_dot_depthfirst/generic.cpp @@ -27,7 +27,7 @@ #include #include -#if defined(__ARM_FEATURE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) namespace arm_conv { namespace depthwise { @@ -425,4 +425,4 @@ void sve_s8q_packed_to_nhwc_5x5_s1_with_multiplier_output4x2_dot_depthfirst_impl } // namespace depthwise } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_s8qs_nhwc_3x3_s1_output2x2_dot_depthfirst.hpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_s8qs_nhwc_3x3_s1_output2x2_dot_depthfirst.hpp index 4098f6f660..b5c6e983ae 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_s8qs_nhwc_3x3_s1_output2x2_dot_depthfirst.hpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_s8qs_nhwc_3x3_s1_output2x2_dot_depthfirst.hpp @@ -29,7 +29,7 @@ #pragma once -#if defined(__ARM_FEATURE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) namespace arm_conv { namespace depthwise { @@ -72,4 +72,4 @@ struct sve_s8qs_nhwc_3x3_s1_output2x2_dot_depthfirst } // namespace depthwise } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_s8qs_nhwc_3x3_s1_output2x2_dot_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_s8qs_nhwc_3x3_s1_output2x2_dot_depthfirst/generic.cpp index 3345449fe1..095c1de8f2 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_s8qs_nhwc_3x3_s1_output2x2_dot_depthfirst/generic.cpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_s8qs_nhwc_3x3_s1_output2x2_dot_depthfirst/generic.cpp @@ -22,7 +22,7 @@ * SOFTWARE. */ -#if defined(__ARM_FEATURE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) #include "arm_gemm.hpp" #include @@ -385,4 +385,4 @@ void sve_s8qs_nhwc_3x3_s1_output2x2_dot_depthfirst_impl(const int8_t *const *con } // namespace depthwise } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_u8q_nhwc_3x3_s1_output2x2_dot_depthfirst.hpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_u8q_nhwc_3x3_s1_output2x2_dot_depthfirst.hpp index 72b26a50a0..a087e801dc 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_u8q_nhwc_3x3_s1_output2x2_dot_depthfirst.hpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_u8q_nhwc_3x3_s1_output2x2_dot_depthfirst.hpp @@ -29,7 +29,7 @@ #pragma once -#if defined(__ARM_FEATURE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) namespace arm_conv { namespace depthwise { @@ -72,4 +72,4 @@ struct sve_u8q_nhwc_3x3_s1_output2x2_dot_depthfirst } // namespace depthwise } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_u8q_nhwc_3x3_s1_output2x2_dot_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_u8q_nhwc_3x3_s1_output2x2_dot_depthfirst/generic.cpp index ca6af57171..0d4b9e6687 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_u8q_nhwc_3x3_s1_output2x2_dot_depthfirst/generic.cpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_u8q_nhwc_3x3_s1_output2x2_dot_depthfirst/generic.cpp @@ -22,7 +22,7 @@ * SOFTWARE. */ -#if defined(__ARM_FEATURE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) #include "arm_gemm.hpp" #include @@ -454,4 +454,4 @@ void sve_u8q_nhwc_3x3_s1_output2x2_dot_depthfirst_impl(const uint8_t *const *con } // namespace depthwise } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_u8q_nhwc_3x3_s1_output2x2_mla_depthfirst.hpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_u8q_nhwc_3x3_s1_output2x2_mla_depthfirst.hpp index 6174dd0e9f..c501c67a5b 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_u8q_nhwc_3x3_s1_output2x2_mla_depthfirst.hpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_u8q_nhwc_3x3_s1_output2x2_mla_depthfirst.hpp @@ -29,7 +29,7 @@ #pragma once -#if defined(__aarch64__) && defined(__ARM_FEATURE_SVE) && defined(SVE2) +#if defined(__aarch64__) && defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) namespace arm_conv { namespace depthwise { @@ -72,4 +72,4 @@ struct sve_u8q_nhwc_3x3_s1_output2x2_mla_depthfirst } // namespace depthwise } // namespace arm_conv -#endif // defined(__aarch64__) && defined(__ARM_FEATURE_SVE) && defined(SVE2) +#endif // defined(__aarch64__) && defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_u8q_nhwc_3x3_s1_output2x2_mla_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_u8q_nhwc_3x3_s1_output2x2_mla_depthfirst/generic.cpp index 2ec7f6e7ea..40220ad84e 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_u8q_nhwc_3x3_s1_output2x2_mla_depthfirst/generic.cpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_u8q_nhwc_3x3_s1_output2x2_mla_depthfirst/generic.cpp @@ -27,7 +27,7 @@ #include #include -#if defined(__aarch64__) && defined(__ARM_FEATURE_SVE) && defined(SVE2) +#if defined(__aarch64__) && defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) namespace arm_conv { namespace depthwise { @@ -415,4 +415,4 @@ void sve_u8q_nhwc_3x3_s1_output2x2_mla_depthfirst_impl( } // namespace depthwise } // namespace arm_conv -#endif // defined(__aarch64__) && defined(__ARM_FEATURE_SVE) && defined(SVE2) +#endif // defined(__aarch64__) && defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_u8q_nhwc_3x3_s2_output2x2_mla_depthfirst.hpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_u8q_nhwc_3x3_s2_output2x2_mla_depthfirst.hpp index 1f470f78aa..981864270d 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_u8q_nhwc_3x3_s2_output2x2_mla_depthfirst.hpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_u8q_nhwc_3x3_s2_output2x2_mla_depthfirst.hpp @@ -29,7 +29,7 @@ #pragma once -#if defined(__aarch64__) && defined(__ARM_FEATURE_SVE) && defined(SVE2) +#if defined(__aarch64__) && defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) namespace arm_conv { namespace depthwise { @@ -72,4 +72,4 @@ struct sve_u8q_nhwc_3x3_s2_output2x2_mla_depthfirst } // namespace depthwise } // namespace arm_conv -#endif // defined(__aarch64__) && defined(__ARM_FEATURE_SVE) && defined(SVE2) +#endif // defined(__aarch64__) && defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_u8q_nhwc_3x3_s2_output2x2_mla_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_u8q_nhwc_3x3_s2_output2x2_mla_depthfirst/generic.cpp index bc8f0ac1d9..39ab3534f5 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_u8q_nhwc_3x3_s2_output2x2_mla_depthfirst/generic.cpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_u8q_nhwc_3x3_s2_output2x2_mla_depthfirst/generic.cpp @@ -27,7 +27,7 @@ #include #include -#if defined(__aarch64__) && defined(__ARM_FEATURE_SVE) && defined(SVE2) +#if defined(__aarch64__) && defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) namespace arm_conv { namespace depthwise { @@ -456,4 +456,4 @@ void sve_u8q_nhwc_3x3_s2_output2x2_mla_depthfirst_impl( } // namespace depthwise } // namespace arm_conv -#endif // defined(__aarch64__) && defined(__ARM_FEATURE_SVE) && defined(SVE2) +#endif // defined(__aarch64__) && defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_u8q_nhwc_5x5_s1_output2x2_mla_depthfirst.hpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_u8q_nhwc_5x5_s1_output2x2_mla_depthfirst.hpp index f025b08a29..b1b16c55d3 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_u8q_nhwc_5x5_s1_output2x2_mla_depthfirst.hpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_u8q_nhwc_5x5_s1_output2x2_mla_depthfirst.hpp @@ -29,7 +29,7 @@ #pragma once -#if defined(__aarch64__) && defined(__ARM_FEATURE_SVE) && defined(SVE2) +#if defined(__aarch64__) && defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) namespace arm_conv { namespace depthwise { @@ -72,4 +72,4 @@ struct sve_u8q_nhwc_5x5_s1_output2x2_mla_depthfirst } // namespace depthwise } // namespace arm_conv -#endif // defined(__aarch64__) && defined(__ARM_FEATURE_SVE) && defined(SVE2) +#endif // defined(__aarch64__) && defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_u8q_nhwc_5x5_s1_output2x2_mla_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_u8q_nhwc_5x5_s1_output2x2_mla_depthfirst/generic.cpp index 95423186b8..7f4272672c 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_u8q_nhwc_5x5_s1_output2x2_mla_depthfirst/generic.cpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_u8q_nhwc_5x5_s1_output2x2_mla_depthfirst/generic.cpp @@ -27,7 +27,7 @@ #include #include -#if defined(__aarch64__) && defined(__ARM_FEATURE_SVE) && defined(SVE2) +#if defined(__aarch64__) && defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) namespace arm_conv { namespace depthwise { @@ -657,4 +657,4 @@ void sve_u8q_nhwc_5x5_s1_output2x2_mla_depthfirst_impl( } // namespace depthwise } // namespace arm_conv -#endif // defined(__aarch64__) && defined(__ARM_FEATURE_SVE) && defined(SVE2) +#endif // defined(__aarch64__) && defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_u8q_packed_to_nhwc_3x3_s2_with_multiplier_output2x4_dot_depthfirst.hpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_u8q_packed_to_nhwc_3x3_s2_with_multiplier_output2x4_dot_depthfirst.hpp index 9226a96662..dbf70c3f8e 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_u8q_packed_to_nhwc_3x3_s2_with_multiplier_output2x4_dot_depthfirst.hpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_u8q_packed_to_nhwc_3x3_s2_with_multiplier_output2x4_dot_depthfirst.hpp @@ -28,7 +28,7 @@ #pragma once -#if defined(__ARM_FEATURE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) namespace arm_conv { namespace depthwise { @@ -67,4 +67,4 @@ struct sve_u8q_packed_to_nhwc_3x3_s2_with_multiplier_output2x4_dot_depthfirst } // namespace depthwise } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_u8q_packed_to_nhwc_3x3_s2_with_multiplier_output2x4_dot_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_u8q_packed_to_nhwc_3x3_s2_with_multiplier_output2x4_dot_depthfirst/generic.cpp index bb9931c20f..1c8b8f9d19 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_u8q_packed_to_nhwc_3x3_s2_with_multiplier_output2x4_dot_depthfirst/generic.cpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_u8q_packed_to_nhwc_3x3_s2_with_multiplier_output2x4_dot_depthfirst/generic.cpp @@ -27,7 +27,7 @@ #include #include -#if defined(__ARM_FEATURE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) namespace arm_conv { namespace depthwise { @@ -350,4 +350,4 @@ void sve_u8q_packed_to_nhwc_3x3_s2_with_multiplier_output2x4_dot_depthfirst_impl } // namespace depthwise } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_u8q_packed_to_nhwc_5x5_s1_with_multiplier_output4x2_dot_depthfirst.hpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_u8q_packed_to_nhwc_5x5_s1_with_multiplier_output4x2_dot_depthfirst.hpp index 3023ed16e5..90fefdcda3 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_u8q_packed_to_nhwc_5x5_s1_with_multiplier_output4x2_dot_depthfirst.hpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_u8q_packed_to_nhwc_5x5_s1_with_multiplier_output4x2_dot_depthfirst.hpp @@ -28,7 +28,7 @@ #pragma once -#if defined(__ARM_FEATURE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) namespace arm_conv { namespace depthwise { @@ -67,4 +67,4 @@ struct sve_u8q_packed_to_nhwc_5x5_s1_with_multiplier_output4x2_dot_depthfirst } // namespace depthwise } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_u8q_packed_to_nhwc_5x5_s1_with_multiplier_output4x2_dot_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_u8q_packed_to_nhwc_5x5_s1_with_multiplier_output4x2_dot_depthfirst/generic.cpp index fc1e23e897..0085bbc6bc 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_u8q_packed_to_nhwc_5x5_s1_with_multiplier_output4x2_dot_depthfirst/generic.cpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_u8q_packed_to_nhwc_5x5_s1_with_multiplier_output4x2_dot_depthfirst/generic.cpp @@ -27,7 +27,7 @@ #include #include -#if defined(__ARM_FEATURE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) namespace arm_conv { namespace depthwise { @@ -425,4 +425,4 @@ void sve_u8q_packed_to_nhwc_5x5_s1_with_multiplier_output4x2_dot_depthfirst_impl } // namespace depthwise } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_u8s8u8q_nhwc_3x3_s1_output2x2_mla_depthfirst.hpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_u8s8u8q_nhwc_3x3_s1_output2x2_mla_depthfirst.hpp index 361f48bfbe..8ab2e5ba2a 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_u8s8u8q_nhwc_3x3_s1_output2x2_mla_depthfirst.hpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_u8s8u8q_nhwc_3x3_s1_output2x2_mla_depthfirst.hpp @@ -29,7 +29,7 @@ #pragma once -#if defined(__aarch64__) && defined(__ARM_FEATURE_SVE) && defined(SVE2) +#if defined(__aarch64__) && defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) namespace arm_conv { namespace depthwise { @@ -72,4 +72,4 @@ struct sve_u8s8u8q_nhwc_3x3_s1_output2x2_mla_depthfirst } // namespace depthwise } // namespace arm_conv -#endif // defined(__aarch64__) && defined(__ARM_FEATURE_SVE) && defined(SVE2) +#endif // defined(__aarch64__) && defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_u8s8u8q_nhwc_3x3_s1_output2x2_mla_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_u8s8u8q_nhwc_3x3_s1_output2x2_mla_depthfirst/generic.cpp index 4fc8999ea1..4b9be8f3e3 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_u8s8u8q_nhwc_3x3_s1_output2x2_mla_depthfirst/generic.cpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_u8s8u8q_nhwc_3x3_s1_output2x2_mla_depthfirst/generic.cpp @@ -27,7 +27,7 @@ #include #include -#if defined(__aarch64__) && defined(__ARM_FEATURE_SVE) && defined(SVE2) +#if defined(__aarch64__) && defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) namespace arm_conv { namespace depthwise { @@ -415,4 +415,4 @@ void sve_u8s8u8q_nhwc_3x3_s1_output2x2_mla_depthfirst_impl( } // namespace depthwise } // namespace arm_conv -#endif // defined(__aarch64__) && defined(__ARM_FEATURE_SVE) && defined(SVE2) +#endif // defined(__aarch64__) && defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_u8s8u8q_nhwc_3x3_s2_output2x2_mla_depthfirst.hpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_u8s8u8q_nhwc_3x3_s2_output2x2_mla_depthfirst.hpp index dc33a3fe3f..f652e48e42 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_u8s8u8q_nhwc_3x3_s2_output2x2_mla_depthfirst.hpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_u8s8u8q_nhwc_3x3_s2_output2x2_mla_depthfirst.hpp @@ -29,7 +29,7 @@ #pragma once -#if defined(__aarch64__) && defined(__ARM_FEATURE_SVE) && defined(SVE2) +#if defined(__aarch64__) && defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) namespace arm_conv { namespace depthwise { @@ -72,4 +72,4 @@ struct sve_u8s8u8q_nhwc_3x3_s2_output2x2_mla_depthfirst } // namespace depthwise } // namespace arm_conv -#endif // defined(__aarch64__) && defined(__ARM_FEATURE_SVE) && defined(SVE2) +#endif // defined(__aarch64__) && defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_u8s8u8q_nhwc_3x3_s2_output2x2_mla_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_u8s8u8q_nhwc_3x3_s2_output2x2_mla_depthfirst/generic.cpp index 63960f08e1..400e62d248 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_u8s8u8q_nhwc_3x3_s2_output2x2_mla_depthfirst/generic.cpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_u8s8u8q_nhwc_3x3_s2_output2x2_mla_depthfirst/generic.cpp @@ -27,7 +27,7 @@ #include #include -#if defined(__aarch64__) && defined(__ARM_FEATURE_SVE) && defined(SVE2) +#if defined(__aarch64__) && defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) namespace arm_conv { namespace depthwise { @@ -456,4 +456,4 @@ void sve_u8s8u8q_nhwc_3x3_s2_output2x2_mla_depthfirst_impl( } // namespace depthwise } // namespace arm_conv -#endif // defined(__aarch64__) && defined(__ARM_FEATURE_SVE) && defined(SVE2) +#endif // defined(__aarch64__) && defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_u8s8u8q_nhwc_5x5_s1_output2x2_mla_depthfirst.hpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_u8s8u8q_nhwc_5x5_s1_output2x2_mla_depthfirst.hpp index 906ef36c8f..f07ea13a03 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_u8s8u8q_nhwc_5x5_s1_output2x2_mla_depthfirst.hpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_u8s8u8q_nhwc_5x5_s1_output2x2_mla_depthfirst.hpp @@ -29,7 +29,7 @@ #pragma once -#if defined(__aarch64__) && defined(__ARM_FEATURE_SVE) && defined(SVE2) +#if defined(__aarch64__) && defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) namespace arm_conv { namespace depthwise { @@ -72,4 +72,4 @@ struct sve_u8s8u8q_nhwc_5x5_s1_output2x2_mla_depthfirst } // namespace depthwise } // namespace arm_conv -#endif // defined(__aarch64__) && defined(__ARM_FEATURE_SVE) && defined(SVE2) +#endif // defined(__aarch64__) && defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_u8s8u8q_nhwc_5x5_s1_output2x2_mla_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_u8s8u8q_nhwc_5x5_s1_output2x2_mla_depthfirst/generic.cpp index 6c321efa29..29582da0f6 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_u8s8u8q_nhwc_5x5_s1_output2x2_mla_depthfirst/generic.cpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_u8s8u8q_nhwc_5x5_s1_output2x2_mla_depthfirst/generic.cpp @@ -27,7 +27,7 @@ #include #include -#if defined(__aarch64__) && defined(__ARM_FEATURE_SVE) && defined(SVE2) +#if defined(__aarch64__) && defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) namespace arm_conv { namespace depthwise { @@ -657,4 +657,4 @@ void sve_u8s8u8q_nhwc_5x5_s1_output2x2_mla_depthfirst_impl( } // namespace depthwise } // namespace arm_conv -#endif // defined(__aarch64__) && defined(__ARM_FEATURE_SVE) && defined(SVE2) +#endif // defined(__aarch64__) && defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp16_nhwc_avg_3x3_s1_output2x2_depthfirst.hpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp16_nhwc_avg_3x3_s1_output2x2_depthfirst.hpp index 8c7a497376..0167d78eb7 100644 --- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp16_nhwc_avg_3x3_s1_output2x2_depthfirst.hpp +++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp16_nhwc_avg_3x3_s1_output2x2_depthfirst.hpp @@ -24,7 +24,7 @@ #pragma once -#if defined(__ARM_FEATURE_SVE) && defined(__ARM_FP16_ARGS) +#if defined(ARM_COMPUTE_ENABLE_SVE) && defined(__ARM_FP16_ARGS) namespace arm_conv { namespace pooling { @@ -57,4 +57,4 @@ struct sve_fp16_nhwc_avg_3x3_s1_output2x2_depthfirst } // namespace pooling } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) && defined(__ARM_FP16_ARGS) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) && defined(__ARM_FP16_ARGS) diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp16_nhwc_avg_3x3_s1_output2x2_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp16_nhwc_avg_3x3_s1_output2x2_depthfirst/generic.cpp index 3c1858633b..a1a530b94e 100644 --- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp16_nhwc_avg_3x3_s1_output2x2_depthfirst/generic.cpp +++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp16_nhwc_avg_3x3_s1_output2x2_depthfirst/generic.cpp @@ -26,7 +26,7 @@ #include #include -#if defined(__ARM_FEATURE_SVE) && defined(__ARM_FP16_ARGS) +#if defined(ARM_COMPUTE_ENABLE_SVE) && defined(__ARM_FP16_ARGS) namespace arm_conv { namespace pooling { @@ -204,4 +204,4 @@ void sve_fp16_nhwc_avg_3x3_s1_output2x2_depthfirst_impl( } // namespace pooling } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) && defined(__ARM_FP16_ARGS) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) && defined(__ARM_FP16_ARGS) diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp16_nhwc_avg_generic_depthfirst.hpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp16_nhwc_avg_generic_depthfirst.hpp index 391d47cf41..02f2ce87a9 100644 --- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp16_nhwc_avg_generic_depthfirst.hpp +++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp16_nhwc_avg_generic_depthfirst.hpp @@ -26,7 +26,7 @@ #pragma once -#if defined(__ARM_FEATURE_SVE) && defined(__ARM_FP16_ARGS) +#if defined(ARM_COMPUTE_ENABLE_SVE) && defined(__ARM_FP16_ARGS) namespace arm_conv { namespace pooling { @@ -51,4 +51,4 @@ struct sve_fp16_nhwc_avg_generic_depthfirst } // namespace pooling } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) && defined(__ARM_FP16_ARGS) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) && defined(__ARM_FP16_ARGS) diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp16_nhwc_avg_generic_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp16_nhwc_avg_generic_depthfirst/generic.cpp index 84a6acf80d..310df11e68 100644 --- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp16_nhwc_avg_generic_depthfirst/generic.cpp +++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp16_nhwc_avg_generic_depthfirst/generic.cpp @@ -24,7 +24,7 @@ #include -#if defined(__ARM_FEATURE_SVE) && defined(__ARM_FP16_ARGS) +#if defined(ARM_COMPUTE_ENABLE_SVE) && defined(__ARM_FP16_ARGS) namespace arm_conv { namespace pooling { @@ -228,4 +228,4 @@ void sve_fp16_nhwc_avg_generic_depthfirst_impl( } // namespace pooling } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) && defined(__ARM_FP16_ARGS) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) && defined(__ARM_FP16_ARGS) diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp16_nhwc_max_2x2_s1_output2x2_depthfirst.hpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp16_nhwc_max_2x2_s1_output2x2_depthfirst.hpp index 5fb297eb49..5e4327d6b7 100644 --- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp16_nhwc_max_2x2_s1_output2x2_depthfirst.hpp +++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp16_nhwc_max_2x2_s1_output2x2_depthfirst.hpp @@ -24,7 +24,7 @@ #pragma once -#if defined(__ARM_FEATURE_SVE) && defined(__ARM_FP16_ARGS) +#if defined(ARM_COMPUTE_ENABLE_SVE) && defined(__ARM_FP16_ARGS) namespace arm_conv { namespace pooling { @@ -57,4 +57,4 @@ struct sve_fp16_nhwc_max_2x2_s1_output2x2_depthfirst } // namespace pooling } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) && defined(__ARM_FP16_ARGS) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) && defined(__ARM_FP16_ARGS) diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp16_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp16_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp index f6e23215b8..9abd0f5c1c 100644 --- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp16_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp +++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp16_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp @@ -26,7 +26,7 @@ #include #include -#if defined(__ARM_FEATURE_SVE) && defined(__ARM_FP16_ARGS) +#if defined(ARM_COMPUTE_ENABLE_SVE) && defined(__ARM_FP16_ARGS) namespace arm_conv { namespace pooling { @@ -143,4 +143,4 @@ void sve_fp16_nhwc_max_2x2_s1_output2x2_depthfirst_impl( } // namespace pooling } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) && defined(__ARM_FP16_ARGS) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) && defined(__ARM_FP16_ARGS) diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp16_nhwc_max_generic_depthfirst.hpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp16_nhwc_max_generic_depthfirst.hpp index 1c17c27619..44cdea31da 100644 --- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp16_nhwc_max_generic_depthfirst.hpp +++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp16_nhwc_max_generic_depthfirst.hpp @@ -26,7 +26,7 @@ #pragma once -#if defined(__ARM_FEATURE_SVE) && defined(__ARM_FP16_ARGS) +#if defined(ARM_COMPUTE_ENABLE_SVE) && defined(__ARM_FP16_ARGS) namespace arm_conv { namespace pooling { @@ -51,4 +51,4 @@ struct sve_fp16_nhwc_max_generic_depthfirst } // namespace pooling } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) && defined(__ARM_FP16_ARGS) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) && defined(__ARM_FP16_ARGS) diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp16_nhwc_max_generic_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp16_nhwc_max_generic_depthfirst/generic.cpp index 58ab915605..fae1f014e7 100644 --- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp16_nhwc_max_generic_depthfirst/generic.cpp +++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp16_nhwc_max_generic_depthfirst/generic.cpp @@ -24,7 +24,7 @@ #include -#if defined(__ARM_FEATURE_SVE) && defined(__ARM_FP16_ARGS) +#if defined(ARM_COMPUTE_ENABLE_SVE) && defined(__ARM_FP16_ARGS) namespace arm_conv { namespace pooling { @@ -220,4 +220,4 @@ void sve_fp16_nhwc_max_generic_depthfirst_impl( } // namespace pooling } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) && defined(__ARM_FP16_ARGS) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) && defined(__ARM_FP16_ARGS) diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst.hpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst.hpp index 9cbdb8a58d..55d2a47655 100644 --- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst.hpp +++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst.hpp @@ -24,7 +24,7 @@ #pragma once -#if defined(__ARM_FEATURE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) namespace arm_conv { namespace pooling { @@ -57,4 +57,4 @@ struct sve_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst } // namespace pooling } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst/generic.cpp index 50f5da4c3d..6cad63ee88 100644 --- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst/generic.cpp +++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst/generic.cpp @@ -26,7 +26,7 @@ #include #include -#if defined(__ARM_FEATURE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) namespace arm_conv { namespace pooling { @@ -204,4 +204,4 @@ void sve_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst_impl( } // namespace pooling } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp32_nhwc_avg_generic_depthfirst.hpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp32_nhwc_avg_generic_depthfirst.hpp index 0daa046a02..0fcdcb23dc 100644 --- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp32_nhwc_avg_generic_depthfirst.hpp +++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp32_nhwc_avg_generic_depthfirst.hpp @@ -26,7 +26,7 @@ #pragma once -#if defined(__ARM_FEATURE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) namespace arm_conv { namespace pooling { @@ -51,4 +51,4 @@ struct sve_fp32_nhwc_avg_generic_depthfirst } // namespace pooling } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp32_nhwc_avg_generic_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp32_nhwc_avg_generic_depthfirst/generic.cpp index c2f5745adc..3e02570a4f 100644 --- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp32_nhwc_avg_generic_depthfirst/generic.cpp +++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp32_nhwc_avg_generic_depthfirst/generic.cpp @@ -24,7 +24,7 @@ #include -#if defined(__ARM_FEATURE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) namespace arm_conv { namespace pooling { @@ -228,4 +228,4 @@ void sve_fp32_nhwc_avg_generic_depthfirst_impl( } // namespace pooling } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp32_nhwc_max_2x2_s1_output2x2_depthfirst.hpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp32_nhwc_max_2x2_s1_output2x2_depthfirst.hpp index 086f49e957..b2c6912565 100644 --- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp32_nhwc_max_2x2_s1_output2x2_depthfirst.hpp +++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp32_nhwc_max_2x2_s1_output2x2_depthfirst.hpp @@ -24,7 +24,7 @@ #pragma once -#if defined(__ARM_FEATURE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) namespace arm_conv { namespace pooling { @@ -57,4 +57,4 @@ struct sve_fp32_nhwc_max_2x2_s1_output2x2_depthfirst } // namespace pooling } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp32_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp32_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp index 250cc24226..786e477050 100644 --- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp32_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp +++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp32_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp @@ -26,7 +26,7 @@ #include #include -#if defined(__ARM_FEATURE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) namespace arm_conv { namespace pooling { @@ -143,4 +143,4 @@ void sve_fp32_nhwc_max_2x2_s1_output2x2_depthfirst_impl( } // namespace pooling } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp32_nhwc_max_generic_depthfirst.hpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp32_nhwc_max_generic_depthfirst.hpp index 17e3e5f0ba..5f65b7f340 100644 --- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp32_nhwc_max_generic_depthfirst.hpp +++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp32_nhwc_max_generic_depthfirst.hpp @@ -26,7 +26,7 @@ #pragma once -#if defined(__ARM_FEATURE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) namespace arm_conv { namespace pooling { @@ -51,4 +51,4 @@ struct sve_fp32_nhwc_max_generic_depthfirst } // namespace pooling } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp32_nhwc_max_generic_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp32_nhwc_max_generic_depthfirst/generic.cpp index 8166379ce4..a2f4398465 100644 --- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp32_nhwc_max_generic_depthfirst/generic.cpp +++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp32_nhwc_max_generic_depthfirst/generic.cpp @@ -24,7 +24,7 @@ #include -#if defined(__ARM_FEATURE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) namespace arm_conv { namespace pooling { @@ -220,4 +220,4 @@ void sve_fp32_nhwc_max_generic_depthfirst_impl( } // namespace pooling } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_s8_nhwc_avg_generic_depthfirst.hpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_s8_nhwc_avg_generic_depthfirst.hpp index 2ae38b5b2f..06582fe5ce 100644 --- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_s8_nhwc_avg_generic_depthfirst.hpp +++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_s8_nhwc_avg_generic_depthfirst.hpp @@ -26,7 +26,7 @@ #pragma once -#if defined(__ARM_FEATURE_SVE) && defined(SVE2) +#if defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) namespace arm_conv { namespace pooling { @@ -51,4 +51,4 @@ struct sve_s8_nhwc_avg_generic_depthfirst } // namespace pooling } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) && defined(SVE2) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_s8_nhwc_avg_generic_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_s8_nhwc_avg_generic_depthfirst/generic.cpp index 2ea5b90561..3581095e8b 100644 --- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_s8_nhwc_avg_generic_depthfirst/generic.cpp +++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_s8_nhwc_avg_generic_depthfirst/generic.cpp @@ -27,7 +27,7 @@ #include -#if defined(__ARM_FEATURE_SVE) && defined(SVE2) +#if defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) namespace arm_conv { namespace pooling { @@ -413,4 +413,4 @@ void sve_s8_nhwc_avg_generic_depthfirst_impl( } // namespace pooling } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) && defined(SVE2) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_s8_nhwc_max_2x2_s1_output2x2_depthfirst.hpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_s8_nhwc_max_2x2_s1_output2x2_depthfirst.hpp index 071e79c93d..46132f2864 100644 --- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_s8_nhwc_max_2x2_s1_output2x2_depthfirst.hpp +++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_s8_nhwc_max_2x2_s1_output2x2_depthfirst.hpp @@ -24,7 +24,7 @@ #pragma once -#if defined(__ARM_FEATURE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) namespace arm_conv { namespace pooling { @@ -57,4 +57,4 @@ struct sve_s8_nhwc_max_2x2_s1_output2x2_depthfirst } // namespace pooling } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_s8_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_s8_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp index bdf3f53292..beabe7b099 100644 --- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_s8_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp +++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_s8_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp @@ -26,7 +26,7 @@ #include #include -#if defined(__ARM_FEATURE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) namespace arm_conv { namespace pooling { @@ -143,4 +143,4 @@ void sve_s8_nhwc_max_2x2_s1_output2x2_depthfirst_impl( } // namespace pooling } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_s8_nhwc_max_generic_depthfirst.hpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_s8_nhwc_max_generic_depthfirst.hpp index 428902ad61..168cbf53c1 100644 --- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_s8_nhwc_max_generic_depthfirst.hpp +++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_s8_nhwc_max_generic_depthfirst.hpp @@ -26,7 +26,7 @@ #pragma once -#if defined(__ARM_FEATURE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) namespace arm_conv { namespace pooling { @@ -51,4 +51,4 @@ struct sve_s8_nhwc_max_generic_depthfirst } // namespace pooling } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_s8_nhwc_max_generic_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_s8_nhwc_max_generic_depthfirst/generic.cpp index 3e88c8729c..11195f59ed 100644 --- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_s8_nhwc_max_generic_depthfirst/generic.cpp +++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_s8_nhwc_max_generic_depthfirst/generic.cpp @@ -24,7 +24,7 @@ #include -#if defined(__ARM_FEATURE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) namespace arm_conv { namespace pooling { @@ -220,4 +220,4 @@ void sve_s8_nhwc_max_generic_depthfirst_impl( } // namespace pooling } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_s8q_nhwc_avg_generic_depthfirst.hpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_s8q_nhwc_avg_generic_depthfirst.hpp index 1242eaf530..637940e957 100644 --- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_s8q_nhwc_avg_generic_depthfirst.hpp +++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_s8q_nhwc_avg_generic_depthfirst.hpp @@ -26,7 +26,7 @@ #pragma once -#if defined(__ARM_FEATURE_SVE) && defined(SVE2) +#if defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) namespace arm_conv { namespace pooling { @@ -51,4 +51,4 @@ struct sve_s8q_nhwc_avg_generic_depthfirst } // namespace pooling } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) && defined(SVE2) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_s8q_nhwc_avg_generic_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_s8q_nhwc_avg_generic_depthfirst/generic.cpp index 928eb412b5..75be96e283 100644 --- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_s8q_nhwc_avg_generic_depthfirst/generic.cpp +++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_s8q_nhwc_avg_generic_depthfirst/generic.cpp @@ -28,7 +28,7 @@ #include -#if defined(__ARM_FEATURE_SVE) && defined(SVE2) +#if defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) namespace arm_conv { namespace pooling { @@ -454,4 +454,4 @@ void sve_s8q_nhwc_avg_generic_depthfirst_impl( } // namespace pooling } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) && defined(SVE2) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_s8q_nhwc_max_generic_depthfirst.hpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_s8q_nhwc_max_generic_depthfirst.hpp index 84aa0d3d6b..5aced30e52 100644 --- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_s8q_nhwc_max_generic_depthfirst.hpp +++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_s8q_nhwc_max_generic_depthfirst.hpp @@ -26,7 +26,7 @@ #pragma once -#if defined(__ARM_FEATURE_SVE) && defined(SVE2) +#if defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) namespace arm_conv { namespace pooling { @@ -51,4 +51,4 @@ struct sve_s8q_nhwc_max_generic_depthfirst } // namespace pooling } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) && defined(SVE2) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_s8q_nhwc_max_generic_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_s8q_nhwc_max_generic_depthfirst/generic.cpp index 3717f8cb30..7f00d46d9d 100644 --- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_s8q_nhwc_max_generic_depthfirst/generic.cpp +++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_s8q_nhwc_max_generic_depthfirst/generic.cpp @@ -25,7 +25,7 @@ #include "pooling.hpp" #include -#if defined(__ARM_FEATURE_SVE) && defined(SVE2) +#if defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) namespace arm_conv { namespace pooling { @@ -383,4 +383,4 @@ void sve_s8q_nhwc_max_generic_depthfirst_impl( } // namespace pooling } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) && defined(SVE2) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_u8_nhwc_avg_generic_depthfirst.hpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_u8_nhwc_avg_generic_depthfirst.hpp index 299e55c9be..a2bfec746b 100644 --- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_u8_nhwc_avg_generic_depthfirst.hpp +++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_u8_nhwc_avg_generic_depthfirst.hpp @@ -26,7 +26,7 @@ #pragma once -#if defined(__ARM_FEATURE_SVE) && defined(SVE2) +#if defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) namespace arm_conv { namespace pooling { @@ -51,4 +51,4 @@ struct sve_u8_nhwc_avg_generic_depthfirst } // namespace pooling } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) && defined(SVE2) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_u8_nhwc_avg_generic_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_u8_nhwc_avg_generic_depthfirst/generic.cpp index 51a69a42be..4c72461dd7 100644 --- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_u8_nhwc_avg_generic_depthfirst/generic.cpp +++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_u8_nhwc_avg_generic_depthfirst/generic.cpp @@ -27,7 +27,7 @@ #include -#if defined(__ARM_FEATURE_SVE) && defined(SVE2) +#if defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) namespace arm_conv { namespace pooling { @@ -413,4 +413,4 @@ void sve_u8_nhwc_avg_generic_depthfirst_impl( } // namespace pooling } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) && defined(SVE2) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_u8_nhwc_max_2x2_s1_output2x2_depthfirst.hpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_u8_nhwc_max_2x2_s1_output2x2_depthfirst.hpp index 06df1515ad..11f485ceea 100644 --- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_u8_nhwc_max_2x2_s1_output2x2_depthfirst.hpp +++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_u8_nhwc_max_2x2_s1_output2x2_depthfirst.hpp @@ -24,7 +24,7 @@ #pragma once -#if defined(__ARM_FEATURE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) namespace arm_conv { namespace pooling { @@ -57,4 +57,4 @@ struct sve_u8_nhwc_max_2x2_s1_output2x2_depthfirst } // namespace pooling } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_u8_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_u8_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp index e921f345d5..92779d0d99 100644 --- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_u8_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp +++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_u8_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp @@ -26,7 +26,7 @@ #include #include -#if defined(__ARM_FEATURE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) namespace arm_conv { namespace pooling { @@ -143,4 +143,4 @@ void sve_u8_nhwc_max_2x2_s1_output2x2_depthfirst_impl( } // namespace pooling } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_u8_nhwc_max_generic_depthfirst.hpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_u8_nhwc_max_generic_depthfirst.hpp index 59cd4b9c78..92be064053 100644 --- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_u8_nhwc_max_generic_depthfirst.hpp +++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_u8_nhwc_max_generic_depthfirst.hpp @@ -26,7 +26,7 @@ #pragma once -#if defined(__ARM_FEATURE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) namespace arm_conv { namespace pooling { @@ -51,4 +51,4 @@ struct sve_u8_nhwc_max_generic_depthfirst } // namespace pooling } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_u8_nhwc_max_generic_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_u8_nhwc_max_generic_depthfirst/generic.cpp index 164847480b..de81d1c54c 100644 --- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_u8_nhwc_max_generic_depthfirst/generic.cpp +++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_u8_nhwc_max_generic_depthfirst/generic.cpp @@ -24,7 +24,7 @@ #include -#if defined(__ARM_FEATURE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) namespace arm_conv { namespace pooling { @@ -220,4 +220,4 @@ void sve_u8_nhwc_max_generic_depthfirst_impl( } // namespace pooling } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_u8q_nhwc_avg_generic_depthfirst.hpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_u8q_nhwc_avg_generic_depthfirst.hpp index f6fc1a58c1..91a9925e14 100644 --- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_u8q_nhwc_avg_generic_depthfirst.hpp +++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_u8q_nhwc_avg_generic_depthfirst.hpp @@ -26,7 +26,7 @@ #pragma once -#if defined(__ARM_FEATURE_SVE) && defined(SVE2) +#if defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) namespace arm_conv { namespace pooling { @@ -51,4 +51,4 @@ struct sve_u8q_nhwc_avg_generic_depthfirst } // namespace pooling } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) && defined(SVE2) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_u8q_nhwc_avg_generic_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_u8q_nhwc_avg_generic_depthfirst/generic.cpp index 373848ad2b..abf911c9d3 100644 --- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_u8q_nhwc_avg_generic_depthfirst/generic.cpp +++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_u8q_nhwc_avg_generic_depthfirst/generic.cpp @@ -28,7 +28,7 @@ #include -#if defined(__ARM_FEATURE_SVE) && defined(SVE2) +#if defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) namespace arm_conv { namespace pooling { @@ -483,4 +483,4 @@ void sve_u8q_nhwc_avg_generic_depthfirst_impl( } // namespace pooling } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) && defined(SVE2) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_u8q_nhwc_max_generic_depthfirst.hpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_u8q_nhwc_max_generic_depthfirst.hpp index c3c0edd0d5..0d04ae5978 100644 --- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_u8q_nhwc_max_generic_depthfirst.hpp +++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_u8q_nhwc_max_generic_depthfirst.hpp @@ -26,7 +26,7 @@ #pragma once -#if defined(__ARM_FEATURE_SVE) && defined(SVE2) +#if defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) namespace arm_conv { namespace pooling { @@ -51,4 +51,4 @@ struct sve_u8q_nhwc_max_generic_depthfirst } // namespace pooling } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) && defined(SVE2) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_u8q_nhwc_max_generic_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_u8q_nhwc_max_generic_depthfirst/generic.cpp index c1c1d29613..b632af9118 100644 --- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_u8q_nhwc_max_generic_depthfirst/generic.cpp +++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_u8q_nhwc_max_generic_depthfirst/generic.cpp @@ -25,7 +25,7 @@ #include "pooling.hpp" #include -#if defined(__ARM_FEATURE_SVE) && defined(SVE2) +#if defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) namespace arm_conv { namespace pooling { @@ -413,4 +413,4 @@ void sve_u8q_nhwc_max_generic_depthfirst_impl( } // namespace pooling } // namespace arm_conv -#endif // defined(__ARM_FEATURE_SVE) && defined(SVE2) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) diff --git a/src/core/NEON/kernels/arm_conv/pooling/pooling_fp16.cpp b/src/core/NEON/kernels/arm_conv/pooling/pooling_fp16.cpp index 094c6aa301..42f23a158e 100644 --- a/src/core/NEON/kernels/arm_conv/pooling/pooling_fp16.cpp +++ b/src/core/NEON/kernels/arm_conv/pooling/pooling_fp16.cpp @@ -33,12 +33,12 @@ #include "kernels/cpp_nhwc_1x1_stride_any_depthfirst.hpp" #if defined(__aarch64__) -#if defined(__ARM_FEATURE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) #include "kernels/sve_fp16_nhwc_max_2x2_s1_output2x2_depthfirst.hpp" #include "kernels/sve_fp16_nhwc_avg_3x3_s1_output2x2_depthfirst.hpp" #include "kernels/sve_fp16_nhwc_avg_generic_depthfirst.hpp" #include "kernels/sve_fp16_nhwc_max_generic_depthfirst.hpp" -#endif // defined(__ARM_FEATURE_SVE) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) #include "kernels/a64_fp16_nhwc_max_2x2_s1_output2x2_depthfirst.hpp" #include "kernels/a64_fp16_nhwc_avg_3x3_s1_output2x2_depthfirst.hpp" #include "kernels/a64_fp16_nhwc_avg_generic_depthfirst.hpp" @@ -74,11 +74,13 @@ static const PoolingImplementation<__fp16, __fp16> pooling_fp16_methods[] = { }, }, #if defined(__aarch64__) -#if defined(__ARM_FEATURE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) { PoolingMethod::DEPTHFIRST, "sve_fp16_nhwc_max_2x2_s1_output2x2_depthfirst", - is_supported, + [] (const PoolingArgs &args, const Nothing &unused) -> bool { + return args.cpu_info->has_sve() && is_supported(args, unused); + }, nullptr, [] (const PoolingArgs &args, const Nothing &) -> PoolingCommon<__fp16, __fp16> * { return new PoolingDepthfirst(args); @@ -87,7 +89,9 @@ static const PoolingImplementation<__fp16, __fp16> pooling_fp16_methods[] = { { PoolingMethod::DEPTHFIRST, "sve_fp16_nhwc_avg_3x3_s1_output2x2_depthfirst", - is_supported, + [] (const PoolingArgs &args, const Nothing &unused) -> bool { + return args.cpu_info->has_sve() && is_supported(args, unused); + }, nullptr, [] (const PoolingArgs &args, const Nothing &) -> PoolingCommon<__fp16, __fp16> * { return new PoolingDepthfirst(args); @@ -96,7 +100,7 @@ static const PoolingImplementation<__fp16, __fp16> pooling_fp16_methods[] = { { PoolingMethod::DEPTHFIRST, "sve_fp16_nhwc_avg_generic_depthfirst", - [] (const PoolingArgs &args, const Nothing &) -> bool { return args.pool_type == PoolingType::AVERAGE; }, + [] (const PoolingArgs &args, const Nothing &) -> bool { return args.cpu_info->has_sve() && args.pool_type == PoolingType::AVERAGE; }, nullptr, [] (const PoolingArgs &args, const Nothing &) -> PoolingCommon<__fp16, __fp16> * { return new PoolingDepthfirstGeneric(args); @@ -105,18 +109,20 @@ static const PoolingImplementation<__fp16, __fp16> pooling_fp16_methods[] = { { PoolingMethod::DEPTHFIRST, "sve_fp16_nhwc_max_generic_depthfirst", - [] (const PoolingArgs &args, const Nothing &) -> bool { return args.pool_type == PoolingType::MAX; }, + [] (const PoolingArgs &args, const Nothing &) -> bool { return args.cpu_info->has_sve() && args.pool_type == PoolingType::MAX; }, nullptr, [] (const PoolingArgs &args, const Nothing &) -> PoolingCommon<__fp16, __fp16> * { return new PoolingDepthfirstGeneric(args); }, }, -#endif // defined(__ARM_FEATURE_SVE) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) #if defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC) { PoolingMethod::DEPTHFIRST, "a64_fp16_nhwc_max_2x2_s1_output2x2_depthfirst", - is_supported, + [] (const PoolingArgs &args, const Nothing &unused) -> bool { + return args.cpu_info->has_fp16() && is_supported(args, unused); + }, nullptr, [] (const PoolingArgs &args, const Nothing &) -> PoolingCommon<__fp16, __fp16> * { return new PoolingDepthfirst(args); @@ -125,7 +131,9 @@ static const PoolingImplementation<__fp16, __fp16> pooling_fp16_methods[] = { { PoolingMethod::DEPTHFIRST, "a64_fp16_nhwc_avg_3x3_s1_output2x2_depthfirst", - is_supported, + [] (const PoolingArgs &args, const Nothing &unused) -> bool { + return args.cpu_info->has_fp16() && is_supported(args, unused); + }, nullptr, [] (const PoolingArgs &args, const Nothing &) -> PoolingCommon<__fp16, __fp16> * { return new PoolingDepthfirst(args); @@ -134,7 +142,7 @@ static const PoolingImplementation<__fp16, __fp16> pooling_fp16_methods[] = { { PoolingMethod::DEPTHFIRST, "a64_fp16_nhwc_avg_generic_depthfirst", - [] (const PoolingArgs &args, const Nothing &) -> bool { return args.pool_type == PoolingType::AVERAGE; }, + [] (const PoolingArgs &args, const Nothing &) -> bool { return args.cpu_info->has_fp16() && args.pool_type == PoolingType::AVERAGE; }, nullptr, [] (const PoolingArgs &args, const Nothing &) -> PoolingCommon<__fp16, __fp16> * { return new PoolingDepthfirstGeneric(args); @@ -143,7 +151,7 @@ static const PoolingImplementation<__fp16, __fp16> pooling_fp16_methods[] = { { PoolingMethod::DEPTHFIRST, "a64_fp16_nhwc_max_generic_depthfirst", - [] (const PoolingArgs &args, const Nothing &) -> bool { return args.pool_type == PoolingType::MAX; }, + [] (const PoolingArgs &args, const Nothing &) -> bool { return args.cpu_info->has_fp16() && args.pool_type == PoolingType::MAX; }, nullptr, [] (const PoolingArgs &args, const Nothing &) -> PoolingCommon<__fp16, __fp16> * { return new PoolingDepthfirstGeneric(args); diff --git a/src/core/NEON/kernels/arm_conv/pooling/pooling_fp32.cpp b/src/core/NEON/kernels/arm_conv/pooling/pooling_fp32.cpp index 002115d78c..1905e1e9d6 100644 --- a/src/core/NEON/kernels/arm_conv/pooling/pooling_fp32.cpp +++ b/src/core/NEON/kernels/arm_conv/pooling/pooling_fp32.cpp @@ -30,12 +30,12 @@ #include "kernels/cpp_nhwc_1x1_stride_any_depthfirst.hpp" #if defined(__aarch64__) -#if defined(__ARM_FEATURE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) #include "kernels/sve_fp32_nhwc_max_2x2_s1_output2x2_depthfirst.hpp" #include "kernels/sve_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst.hpp" #include "kernels/sve_fp32_nhwc_avg_generic_depthfirst.hpp" #include "kernels/sve_fp32_nhwc_max_generic_depthfirst.hpp" -#endif // defined(__ARM_FEATURE_SVE) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) #include "kernels/a64_fp32_nhwc_max_2x2_s1_output2x2_depthfirst.hpp" #include "kernels/a64_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst.hpp" #include "kernels/a64_fp32_nhwc_avg_generic_depthfirst.hpp" @@ -71,11 +71,13 @@ static const PoolingImplementation pooling_fp32_methods[] = { }, }, #if defined(__aarch64__) -#if defined(__ARM_FEATURE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) { PoolingMethod::DEPTHFIRST, "sve_fp32_nhwc_max_2x2_s1_output2x2_depthfirst", - is_supported, + [] (const PoolingArgs &args, const Nothing &unused) -> bool { + return args.cpu_info->has_sve() && is_supported(args, unused); + }, nullptr, [] (const PoolingArgs &args, const Nothing &) -> PoolingCommon * { return new PoolingDepthfirst(args); @@ -84,7 +86,9 @@ static const PoolingImplementation pooling_fp32_methods[] = { { PoolingMethod::DEPTHFIRST, "sve_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst", - is_supported, + [] (const PoolingArgs &args, const Nothing &unused) -> bool { + return args.cpu_info->has_sve() && is_supported(args, unused); + }, nullptr, [] (const PoolingArgs &args, const Nothing &) -> PoolingCommon * { return new PoolingDepthfirst(args); @@ -93,7 +97,9 @@ static const PoolingImplementation pooling_fp32_methods[] = { { PoolingMethod::DEPTHFIRST, "sve_fp32_nhwc_avg_generic_depthfirst", - [] (const PoolingArgs &args, const Nothing &) -> bool { return args.pool_type == PoolingType::AVERAGE; }, + [] (const PoolingArgs &args, const Nothing &) -> bool { + return args.cpu_info->has_sve() && args.pool_type == PoolingType::AVERAGE; + }, nullptr, [] (const PoolingArgs &args, const Nothing &) -> PoolingCommon * { return new PoolingDepthfirstGeneric(args); @@ -102,13 +108,15 @@ static const PoolingImplementation pooling_fp32_methods[] = { { PoolingMethod::DEPTHFIRST, "sve_fp32_nhwc_max_generic_depthfirst", - [] (const PoolingArgs &args, const Nothing &) -> bool { return args.pool_type == PoolingType::MAX; }, + [] (const PoolingArgs &args, const Nothing &) -> bool { + return args.cpu_info->has_sve() && args.pool_type == PoolingType::MAX; + }, nullptr, [] (const PoolingArgs &args, const Nothing &) -> PoolingCommon * { return new PoolingDepthfirstGeneric(args); }, }, -#endif // defined(__ARM_FEATURE_SVE) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) { PoolingMethod::DEPTHFIRST, "a64_fp32_nhwc_max_2x2_s1_output2x2_depthfirst", diff --git a/src/core/NEON/kernels/arm_conv/pooling/pooling_s8.cpp b/src/core/NEON/kernels/arm_conv/pooling/pooling_s8.cpp index 490fc0d863..1cad674e6e 100644 --- a/src/core/NEON/kernels/arm_conv/pooling/pooling_s8.cpp +++ b/src/core/NEON/kernels/arm_conv/pooling/pooling_s8.cpp @@ -30,13 +30,13 @@ #include "kernels/cpp_nhwc_1x1_stride_any_depthfirst.hpp" #if defined(__aarch64__) -#if defined(__ARM_FEATURE_SVE) -#if defined(SVE2) +#if defined(ARM_COMPUTE_ENABLE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE2) #include "kernels/sve_s8_nhwc_avg_generic_depthfirst.hpp" -#endif // defined(SVE2) +#endif // defined(ARM_COMPUTE_ENABLE_SVE2) #include "kernels/sve_s8_nhwc_max_2x2_s1_output2x2_depthfirst.hpp" #include "kernels/sve_s8_nhwc_max_generic_depthfirst.hpp" -#endif // defined(__ARM_FEATURE_SVE) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) #include "kernels/a64_s8_nhwc_max_2x2_s1_output2x2_depthfirst.hpp" #include "kernels/a64_s8_nhwc_avg_generic_depthfirst.hpp" #include "kernels/a64_s8_nhwc_max_generic_depthfirst.hpp" @@ -73,22 +73,24 @@ static const PoolingImplementation pooling_s8_methods[] = { }, }, #if defined(__aarch64__) -#if defined(__ARM_FEATURE_SVE) -#if defined(SVE2) +#if defined(ARM_COMPUTE_ENABLE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE2) { PoolingMethod::DEPTHFIRST, "sve_s8_nhwc_avg_generic_depthfirst", - [] (const PoolingArgs &args, const Nothing &) -> bool { return args.pool_type == PoolingType::AVERAGE; }, + [] (const PoolingArgs &args, const Nothing &) -> bool { return args.cpu_info->has_sve2() && args.pool_type == PoolingType::AVERAGE; }, nullptr, [] (const PoolingArgs &args, const Nothing &) -> PoolingCommon * { return new PoolingDepthfirstGeneric(args); }, }, -#endif // defined(SVE2) +#endif // defined(ARM_COMPUTE_ENABLE_SVE2) { PoolingMethod::DEPTHFIRST, "sve_s8_nhwc_max_2x2_s1_output2x2_depthfirst", - is_supported, + [] (const PoolingArgs &args, const Nothing &unused) -> bool { + return args.cpu_info->has_sve() && is_supported(args, unused); + }, nullptr, [] (const PoolingArgs &args, const Nothing &) -> PoolingCommon * { return new PoolingDepthfirst(args); @@ -97,13 +99,13 @@ static const PoolingImplementation pooling_s8_methods[] = { { PoolingMethod::DEPTHFIRST, "sve_s8_nhwc_max_generic_depthfirst", - [] (const PoolingArgs &args, const Nothing &) -> bool { return args.pool_type == PoolingType::MAX; }, + [] (const PoolingArgs &args, const Nothing &) -> bool { return args.cpu_info->has_sve() && args.pool_type == PoolingType::MAX; }, nullptr, [] (const PoolingArgs &args, const Nothing &) -> PoolingCommon * { return new PoolingDepthfirstGeneric(args); }, }, -#endif // defined(__ARM_FEATURE_SVE) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) { PoolingMethod::DEPTHFIRST, "a64_s8_nhwc_max_2x2_s1_output2x2_depthfirst", diff --git a/src/core/NEON/kernels/arm_conv/pooling/pooling_s8q.cpp b/src/core/NEON/kernels/arm_conv/pooling/pooling_s8q.cpp index fd4e045035..bfc4dc0f15 100644 --- a/src/core/NEON/kernels/arm_conv/pooling/pooling_s8q.cpp +++ b/src/core/NEON/kernels/arm_conv/pooling/pooling_s8q.cpp @@ -28,10 +28,10 @@ #include "pooling_depthfirst_generic_quantized.hpp" #if defined(__aarch64__) -#if defined(__ARM_FEATURE_SVE) && defined(SVE2) +#if defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) #include "kernels/sve_s8q_nhwc_avg_generic_depthfirst.hpp" #include "kernels/sve_s8q_nhwc_max_generic_depthfirst.hpp" -#endif // defined(__ARM_FEATURE_SVE) && defined(SVE2) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) #include "kernels/a64_s8q_nhwc_avg_generic_depthfirst.hpp" #include "kernels/a64_s8q_nhwc_max_generic_depthfirst.hpp" #endif // defined(__aarch64__) @@ -43,12 +43,12 @@ namespace pooling { static const PoolingImplementation pooling_u8_methods[] = { #if defined(__aarch64__) -#if defined(__ARM_FEATURE_SVE) && defined(SVE2) +#if defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) { PoolingMethod::DEPTHFIRST, "sve_s8q_nhwc_avg_generic_depthfirst", [] (const PoolingArgs &args, const Requantize32 &) -> bool { - return args.pool_type == PoolingType::AVERAGE; + return args.cpu_info->has_sve2() && args.pool_type == PoolingType::AVERAGE; }, nullptr, [] (const PoolingArgs &args, const Requantize32 &rq) -> PoolingCommon * { @@ -58,13 +58,13 @@ static const PoolingImplementation pooling_u8_meth { PoolingMethod::DEPTHFIRST, "sve_s8q_nhwc_max_generic_depthfirst", - [] (const PoolingArgs &args, const Requantize32 &) -> bool { return args.pool_type == PoolingType::MAX; }, + [] (const PoolingArgs &args, const Requantize32 &) -> bool { return args.cpu_info->has_sve2() && args.pool_type == PoolingType::MAX; }, nullptr, [] (const PoolingArgs &args, const Requantize32 &rq) -> PoolingCommon * { return new PoolingDepthfirstGenericQuantized(args, rq); }, }, -#endif // defined(__ARM_FEATURE_SVE) && defined(SVE2) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) { PoolingMethod::DEPTHFIRST, "a64_s8q_nhwc_avg_generic_depthfirst", diff --git a/src/core/NEON/kernels/arm_conv/pooling/pooling_u8.cpp b/src/core/NEON/kernels/arm_conv/pooling/pooling_u8.cpp index 052354922e..f6ea98002c 100644 --- a/src/core/NEON/kernels/arm_conv/pooling/pooling_u8.cpp +++ b/src/core/NEON/kernels/arm_conv/pooling/pooling_u8.cpp @@ -30,13 +30,13 @@ #include "kernels/cpp_nhwc_1x1_stride_any_depthfirst.hpp" #if defined(__aarch64__) -#if defined(__ARM_FEATURE_SVE) -#if defined(SVE2) +#if defined(ARM_COMPUTE_ENABLE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE2) #include "kernels/sve_u8_nhwc_avg_generic_depthfirst.hpp" -#endif // defined(SVE2) +#endif // defined(ARM_COMPUTE_ENABLE_SVE2) #include "kernels/sve_u8_nhwc_max_2x2_s1_output2x2_depthfirst.hpp" #include "kernels/sve_u8_nhwc_max_generic_depthfirst.hpp" -#endif // defined(__ARM_FEATURE_SVE) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) #include "kernels/a64_u8_nhwc_max_2x2_s1_output2x2_depthfirst.hpp" #include "kernels/a64_u8_nhwc_avg_generic_depthfirst.hpp" #include "kernels/a64_u8_nhwc_max_generic_depthfirst.hpp" @@ -73,8 +73,8 @@ static const PoolingImplementation pooling_u8_methods[] = { }, }, #if defined(__aarch64__) -#if defined(__ARM_FEATURE_SVE) -#if defined(SVE2) +#if defined(ARM_COMPUTE_ENABLE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE2) { PoolingMethod::DEPTHFIRST, "sve_u8_nhwc_avg_generic_depthfirst", @@ -82,7 +82,7 @@ static const PoolingImplementation pooling_u8_methods[] = { // This kernel can only be used when there is either no padding, or we don't care // about the value of the padding. Otherwise, we would need to pass in the zero-point // for the quantization regime. - return (args.exclude_padding || + return args.cpu_info->has_sve2() && (args.exclude_padding || (args.padding.top == 0 && args.padding.bottom == 0 && args.padding.left == 0 && args.padding.right == 0) ) && args.pool_type == PoolingType::AVERAGE; @@ -92,11 +92,13 @@ static const PoolingImplementation pooling_u8_methods[] = { return new PoolingDepthfirstGeneric(args); }, }, -#endif // defined(SVE2) +#endif // defined(ARM_COMPUTE_ENABLE_SVE2) { PoolingMethod::DEPTHFIRST, "sve_u8_nhwc_max_2x2_s1_output2x2_depthfirst", - is_supported, + [] (const PoolingArgs &args, const Nothing &unused) -> bool { + return args.cpu_info->has_sve() && is_supported(args, unused); + }, nullptr, [] (const PoolingArgs &args, const Nothing &) -> PoolingCommon * { return new PoolingDepthfirst(args); @@ -105,13 +107,13 @@ static const PoolingImplementation pooling_u8_methods[] = { { PoolingMethod::DEPTHFIRST, "sve_u8_nhwc_max_generic_depthfirst", - [] (const PoolingArgs &args, const Nothing &) -> bool { return args.pool_type == PoolingType::MAX; }, + [] (const PoolingArgs &args, const Nothing &) -> bool { return args.cpu_info->has_sve() && args.pool_type == PoolingType::MAX; }, nullptr, [] (const PoolingArgs &args, const Nothing &) -> PoolingCommon * { return new PoolingDepthfirstGeneric(args); }, }, -#endif // defined(__ARM_FEATURE_SVE) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) { PoolingMethod::DEPTHFIRST, "a64_u8_nhwc_max_2x2_s1_output2x2_depthfirst", diff --git a/src/core/NEON/kernels/arm_conv/pooling/pooling_u8q.cpp b/src/core/NEON/kernels/arm_conv/pooling/pooling_u8q.cpp index 41303fb418..647e319c82 100644 --- a/src/core/NEON/kernels/arm_conv/pooling/pooling_u8q.cpp +++ b/src/core/NEON/kernels/arm_conv/pooling/pooling_u8q.cpp @@ -28,10 +28,10 @@ #include "pooling_depthfirst_generic_quantized.hpp" #if defined(__aarch64__) -#if defined(__ARM_FEATURE_SVE) && defined(SVE2) +#if defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) #include "kernels/sve_u8q_nhwc_avg_generic_depthfirst.hpp" #include "kernels/sve_u8q_nhwc_max_generic_depthfirst.hpp" -#endif // defined(__ARM_FEATURE_SVE) && defined(SVE2) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) #include "kernels/a64_u8q_nhwc_avg_generic_depthfirst.hpp" #include "kernels/a64_u8q_nhwc_max_generic_depthfirst.hpp" #endif // defined(__aarch64__) @@ -43,12 +43,12 @@ namespace pooling { static const PoolingImplementation pooling_u8_methods[] = { #if defined(__aarch64__) -#if defined(__ARM_FEATURE_SVE) && defined(SVE2) +#if defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) { PoolingMethod::DEPTHFIRST, "sve_u8q_nhwc_avg_generic_depthfirst", [] (const PoolingArgs &args, const Requantize32 &) -> bool { - return args.pool_type == PoolingType::AVERAGE; + return args.cpu_info->has_sve2() && args.pool_type == PoolingType::AVERAGE; }, nullptr, [] (const PoolingArgs &args, const Requantize32 &rq) -> PoolingCommon * { @@ -58,13 +58,13 @@ static const PoolingImplementation pooling_u8_me { PoolingMethod::DEPTHFIRST, "sve_u8q_nhwc_max_generic_depthfirst", - [] (const PoolingArgs &args, const Requantize32 &) -> bool { return args.pool_type == PoolingType::MAX; }, + [] (const PoolingArgs &args, const Requantize32 &) -> bool { return args.cpu_info->has_sve2() && args.pool_type == PoolingType::MAX; }, nullptr, [] (const PoolingArgs &args, const Requantize32 &rq) -> PoolingCommon * { return new PoolingDepthfirstGenericQuantized(args, rq); }, }, -#endif // defined(__ARM_FEATURE_SVE) && defined(SVE2) +#endif // defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVE2) { PoolingMethod::DEPTHFIRST, "a64_u8q_nhwc_avg_generic_depthfirst", diff --git a/src/core/NEON/kernels/arm_gemm/gemm_bf16.cpp b/src/core/NEON/kernels/arm_gemm/gemm_bf16.cpp index d8134c4bb5..8244523696 100644 --- a/src/core/NEON/kernels/arm_gemm/gemm_bf16.cpp +++ b/src/core/NEON/kernels/arm_gemm/gemm_bf16.cpp @@ -44,26 +44,26 @@ namespace arm_gemm { static const GemmImplementation gemm_bf16_methods[] = { -#ifdef V8P6_BF -#ifdef __ARM_FEATURE_SVE +#ifdef ARM_COMPUTE_ENABLE_BF16 +#ifdef ARM_COMPUTE_ENABLE_SVE { // gemm_bf16_interleaved GemmMethod::GEMM_INTERLEAVED, "sve_interleaved_bf16fp32_mmla_8x3VL", - [](const GemmArgs &args) { return args._ci->has_sve() && (args._Ksize>4); }, + [](const GemmArgs &args) { return args._ci->has_svebf16() && (args._Ksize>4); }, [](const GemmArgs &args) { return args._ci->get_cpu_model() != CPUModel::KLEIN; }, [](const GemmArgs &args) { return new GemmInterleaved(args); } }, { GemmMethod::GEMM_HYBRID, "sve_hybrid_bf16fp32_dot_6x4VL", - [](const GemmArgs &args) { return args._ci->has_sve(); }, + [](const GemmArgs &args) { return args._ci->has_svebf16(); }, [](const GemmArgs &args) { return args._ci->get_cpu_model() != CPUModel::KLEIN && ((args._Ksize <= 128) && (args._Nsize <= 128)); }, [](const GemmArgs &args) { return new GemmHybridIndirect(args); } }, { // gemm_bf16_interleaved GemmMethod::GEMM_INTERLEAVED, "sve_interleaved_bf16fp32_dot_8x3VL", - [](const GemmArgs &args) { return args._ci->has_sve() && (args._Ksize>2); }, + [](const GemmArgs &args) { return args._ci->has_svebf16() && (args._Ksize>2); }, [](const GemmArgs &args) { return args._ci->get_cpu_model() != CPUModel::KLEIN; }, [](const GemmArgs &args) { return new GemmInterleaved(args); } }, @@ -71,25 +71,25 @@ static const GemmImplementation gemm_bf16_methods[] = { // gemm_bf16_interleaved GemmMethod::GEMM_INTERLEAVED, "a64_interleaved_bf16fp32_mmla_8x12", - [](const GemmArgs &args) { return (args._Ksize>4); }, + [](const GemmArgs &args) { return args._ci->has_bf16() && (args._Ksize>4); }, nullptr, [](const GemmArgs &args) { return new GemmInterleaved(args); } }, { GemmMethod::GEMM_HYBRID, "a64_hybrid_bf16fp32_dot_6x16", - nullptr, + [](const GemmArgs &args) { return args._ci->has_bf16(); }, nullptr, [](const GemmArgs &args) { return new GemmHybridIndirect(args); } }, { // gemm_bf16_interleaved GemmMethod::GEMM_INTERLEAVED, "a64_interleaved_bf16fp32_dot_8x12", - [](const GemmArgs &args) { return (args._Ksize>2); }, + [](const GemmArgs &args) { return args._ci->has_bf16() && (args._Ksize>2); }, nullptr, [](const GemmArgs &args) { return new GemmInterleaved(args); } }, -#endif // V8P6_BF +#endif // ARM_COMPUTE_ENABLE_BF16 #ifdef __aarch64__ { GemmMethod::GEMM_INTERLEAVED, diff --git a/src/core/NEON/kernels/arm_gemm/gemm_fp16.cpp b/src/core/NEON/kernels/arm_gemm/gemm_fp16.cpp index 8e355c8f2c..b41d8dd097 100644 --- a/src/core/NEON/kernels/arm_gemm/gemm_fp16.cpp +++ b/src/core/NEON/kernels/arm_gemm/gemm_fp16.cpp @@ -43,7 +43,7 @@ namespace arm_gemm { static const GemmImplementation<__fp16, __fp16> gemm_fp16_methods[] = { -#if defined(__ARM_FEATURE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) { GemmMethod::GEMM_HYBRID, "sve_hybrid_fp16_mla_6x4VL", diff --git a/src/core/NEON/kernels/arm_gemm/gemm_fp32.cpp b/src/core/NEON/kernels/arm_gemm/gemm_fp32.cpp index d94814fb4c..1632e301ac 100644 --- a/src/core/NEON/kernels/arm_gemm/gemm_fp32.cpp +++ b/src/core/NEON/kernels/arm_gemm/gemm_fp32.cpp @@ -59,7 +59,7 @@ static const GemmImplementation gemm_fp32_methods[] = [](const GemmArgs &args) { return new GemvBatched(args); } }, #ifdef __aarch64__ -#ifdef __ARM_FEATURE_SVE +#ifdef ARM_COMPUTE_ENABLE_SVE { GemmMethod::GEMM_HYBRID, "sve_gemv_fp32_mla_8VL", @@ -77,17 +77,17 @@ static const GemmImplementation gemm_fp32_methods[] = }, // MMLA next due to higher throughput (SVE only) -#if defined(__ARM_FEATURE_SVE) && defined(MMLA_FP32) +#if defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVEF32MM) { GemmMethod::GEMM_INTERLEAVED, "sve_interleaved_fp32_mmla_8x3VL", - [](const GemmArgs &args) { return args._ci->has_sve() && (args._Ksize>4); }, + [](const GemmArgs &args) { return args._ci->has_svef32mm() && (args._Ksize>4); }, [](const GemmArgs &args) { return args._ci->get_cpu_model() != CPUModel::KLEIN; }, [](const GemmArgs &args) { return new GemmInterleaved(args); } }, -#endif // __ARM_FEATURE_SVE && MMLA_FP32 +#endif // ARM_COMPUTE_ENABLE_SVE && ARM_COMPUTE_ENABLE_SVEF32MM -#ifdef __ARM_FEATURE_SVE +#ifdef ARM_COMPUTE_ENABLE_SVE // SVE smallk / hybrid methods { GemmMethod::GEMM_HYBRID, @@ -110,7 +110,7 @@ static const GemmImplementation gemm_fp32_methods[] = [](const GemmArgs &args) { return args._ci->get_cpu_model() != CPUModel::KLEIN && (((args._Ksize <= 256) && (args._Nsize <= 256)) || ((args._nmulti > 1) && ((args._Msize / args._maxthreads) < 8))); }, [](const GemmArgs &args) { return new GemmHybridIndirect(args); } }, -#endif // __ARM_FEATURE_SVE +#endif // ARM_COMPUTE_ENABLE_SVE // Cortex-A35 specific kernel - use for any problem on A35, and never in any other cases. { GemmMethod::GEMM_INTERLEAVED, @@ -148,7 +148,7 @@ GemmImplementation::with_estimate( [](const GemmArgs &args) { return GemmHybridIndirect::estimate_cycles(args, cls_a64_hybrid_fp32_mla_6x16::get_performance_parameters(args._ci)); }, [](const GemmArgs &args) { return new GemmHybridIndirect(args); } ), -#ifdef __ARM_FEATURE_SVE +#ifdef ARM_COMPUTE_ENABLE_SVE { GemmMethod::GEMM_INTERLEAVED, "sve_interleaved_fp32_mla_8x3VL", @@ -156,7 +156,7 @@ GemmImplementation::with_estimate( [](const GemmArgs &args) { return args._ci->get_cpu_model() != CPUModel::KLEIN; }, [](const GemmArgs &args) { return new GemmInterleaved(args); } }, -#endif // __ARM_FEATURE_SVE +#endif // ARM_COMPUTE_ENABLE_SVE GemmImplementation::with_estimate( GemmMethod::GEMM_INTERLEAVED, "a64_sgemm_8x12", diff --git a/src/core/NEON/kernels/arm_gemm/gemm_int8.cpp b/src/core/NEON/kernels/arm_gemm/gemm_int8.cpp index 60cf82f9c6..bfb3ca901f 100644 --- a/src/core/NEON/kernels/arm_gemm/gemm_int8.cpp +++ b/src/core/NEON/kernels/arm_gemm/gemm_int8.cpp @@ -46,16 +46,16 @@ namespace arm_gemm { static const GemmImplementation gemm_s8_methods[] = { -#ifdef __ARM_FEATURE_SVE -#ifdef MMLA_INT8 +#ifdef ARM_COMPUTE_ENABLE_SVE +#ifdef ARM_COMPUTE_ENABLE_I8MM { GemmMethod::GEMM_INTERLEAVED, "sve_interleaved_s8s32_mmla_8x3VL", - [](const GemmArgs &args) { return args._ci->has_sve() && (args._Ksize>8); }, + [](const GemmArgs &args) { return args._ci->has_svei8mm() && (args._Ksize>8); }, [](const GemmArgs &args) { return args._ci->get_cpu_model() != CPUModel::KLEIN; }, [](const GemmArgs &args) { return new GemmInterleaved(args); } }, -#endif +#endif // ARM_COMPUTE_ENABLE_I8MM { GemmMethod::GEMM_HYBRID, "sve_smallK_hybrid_s8s32_dot_8x1VL", @@ -78,15 +78,15 @@ static const GemmImplementation gemm_s8_methods[] = { [](const GemmArgs &args) { return new GemmInterleaved(args); } }, #endif // SVE -#ifdef MMLA_INT8 +#ifdef ARM_COMPUTE_ENABLE_I8MM { GemmMethod::GEMM_INTERLEAVED, "a64_interleaved_s8s32_mmla_8x12", - [](const GemmArgs &args) { return (args._Ksize>8); }, + [](const GemmArgs &args) { return args._ci->has_svei8mm() && (args._Ksize>8); }, nullptr, [](const GemmArgs &args) { return new GemmInterleaved(args); } }, -#endif +#endif // ARM_COMPUTE_ENABLE_I8MM { GemmMethod::GEMM_HYBRID, "a64_smallK_hybrid_s8s32_dot_8x4", diff --git a/src/core/NEON/kernels/arm_gemm/gemm_qint8.cpp b/src/core/NEON/kernels/arm_gemm/gemm_qint8.cpp index 094b6fdff4..985567f6f3 100644 --- a/src/core/NEON/kernels/arm_gemm/gemm_qint8.cpp +++ b/src/core/NEON/kernels/arm_gemm/gemm_qint8.cpp @@ -53,16 +53,16 @@ namespace arm_gemm { static const GemmImplementation gemm_qint8_methods[] = { -#ifdef __ARM_FEATURE_SVE -#ifdef MMLA_INT8 +#ifdef ARM_COMPUTE_ENABLE_SVE +#ifdef ARM_COMPUTE_ENABLE_I8MM { GemmMethod::GEMM_INTERLEAVED, "sve_interleaved_s8s32_mmla_8x3VL", - [](const GemmArgs &args, const Requantize32 &) { return args._ci->has_sve() && (args._Ksize>8); }, + [](const GemmArgs &args, const Requantize32 &) { return args._ci->has_svei8mm() && (args._Ksize>8); }, [](const GemmArgs &args, const Requantize32 &) { return args._ci->get_cpu_model() != CPUModel::KLEIN; }, [](const GemmArgs &args, const Requantize32 &qp) { return new GemmInterleavedQuantized(args, qp); } }, -#endif +#endif // ARM_COMPUTE_ENABLE_I8MM { GemmMethod::GEMM_HYBRID_QUANTIZED, "sve_smallK_hybrid_s8s32_dot_8x1VL", @@ -70,22 +70,22 @@ static const GemmImplementation gemm_qint8_methods [](const GemmArgs &args, const Requantize32 &) { return args._ci->get_cpu_model() != CPUModel::KLEIN; }, [](const GemmArgs &args, const Requantize32 &qp) { return new GemmHybridQuantized(args, qp); } }, -#ifdef SVE2 +#ifdef ARM_COMPUTE_ENABLE_SVE2 { GemmMethod::GEMM_HYBRID, "sve_hybrid_s8qs_dot_6x4VL", - [](const GemmArgs &args, const Requantize32 &qp) { return args._ci->has_sve() && quant_hybrid_symmetric(qp); }, + [](const GemmArgs &args, const Requantize32 &qp) { return args._ci->has_sve2() && quant_hybrid_symmetric(qp); }, [](const GemmArgs &args, const Requantize32 &) { return args._ci->get_cpu_model() != CPUModel::KLEIN; }, [](const GemmArgs &args, const Requantize32 &qp) { return new GemmHybridIndirect(args, qp); } }, { GemmMethod::GEMM_HYBRID, "sve_hybrid_s8qa_dot_4x4VL", - [](const GemmArgs &args, const Requantize32 &qp) { return args._ci->has_sve() && quant_hybrid_asymmetric(qp); }, + [](const GemmArgs &args, const Requantize32 &qp) { return args._ci->has_sve2() && quant_hybrid_asymmetric(qp); }, [](const GemmArgs &args, const Requantize32 &) { return args._ci->get_cpu_model() != CPUModel::KLEIN; }, [](const GemmArgs &args, const Requantize32 &qp) { return new GemmHybridIndirect(args, qp); } }, -#endif +#endif // ARM_COMPUTE_ENABLE_SVE2 { GemmMethod::GEMM_HYBRID, "sve_hybrid_s8s32_dot_6x4VL", @@ -101,15 +101,15 @@ static const GemmImplementation gemm_qint8_methods [](const GemmArgs &args, const Requantize32 &qp) { return new GemmInterleavedQuantized(args, qp); } }, #endif // SVE -#ifdef MMLA_INT8 +#ifdef ARM_COMPUTE_ENABLE_I8MM { GemmMethod::GEMM_INTERLEAVED, "a64_interleaved_s8s32_mmla_8x12", - [](const GemmArgs &args, const Requantize32 &) { return (args._Ksize>8); }, + [](const GemmArgs &args, const Requantize32 &) { return args._ci->has_i8mm() && (args._Ksize>8); }, nullptr, [](const GemmArgs &args, const Requantize32 &qp) { return new GemmInterleavedQuantized(args, qp); } }, -#endif +#endif // ARM_COMPUTE_ENABLE_I8MM { GemmMethod::GEMM_HYBRID_QUANTIZED, "a64_smallK_hybrid_s8s32_dot_8x4", diff --git a/src/core/NEON/kernels/arm_gemm/gemm_quint8.cpp b/src/core/NEON/kernels/arm_gemm/gemm_quint8.cpp index be27b3a117..f3f2f335fd 100644 --- a/src/core/NEON/kernels/arm_gemm/gemm_quint8.cpp +++ b/src/core/NEON/kernels/arm_gemm/gemm_quint8.cpp @@ -50,12 +50,12 @@ namespace arm_gemm { static const GemmImplementation gemm_quint8_methods[] = { -#ifdef __ARM_FEATURE_SVE -#ifdef MMLA_INT8 +#ifdef ARM_COMPUTE_ENABLE_SVE +#ifdef ARM_COMPUTE_ENABLE_I8MM { GemmMethod::GEMM_INTERLEAVED, "sve_interleaved_u8u32_mmla_8x3VL", - [](const GemmArgs &args, const Requantize32 &) { return args._ci->has_sve() && (args._Ksize>8); }, + [](const GemmArgs &args, const Requantize32 &) { return args._ci->has_svei8mm() && (args._Ksize>8); }, [](const GemmArgs &args, const Requantize32 &) { return args._ci->get_cpu_model() != CPUModel::KLEIN; }, [](const GemmArgs &args, const Requantize32 &qp) { return new GemmInterleavedQuantized(args, qp); } }, @@ -67,15 +67,15 @@ static const GemmImplementation gemm_quint8_meth [](const GemmArgs &args, const Requantize32 &) { return args._ci->get_cpu_model() != CPUModel::KLEIN; }, [](const GemmArgs &args, const Requantize32 &qp) { return new GemmHybridQuantized(args, qp); } }, -#ifdef SVE2 // Requantizing kernels include some SVE2 only instructions (SQRDMULH, SRSHL) +#ifdef ARM_COMPUTE_ENABLE_SVE2 // Requantizing kernels include some SVE2 only instructions (SQRDMULH, SRSHL) { GemmMethod::GEMM_HYBRID, "sve_hybrid_u8qa_dot_4x4VL", - [](const GemmArgs &args, const Requantize32 &qp) { return args._ci->has_sve() && quant_hybrid_asymmetric(qp); }, + [](const GemmArgs &args, const Requantize32 &qp) { return args._ci->has_sve2() && quant_hybrid_asymmetric(qp); }, [](const GemmArgs &args, const Requantize32 &) { return args._ci->get_cpu_model() != CPUModel::KLEIN; }, [](const GemmArgs &args, const Requantize32 &qp) { return new GemmHybridIndirect(args, qp); } }, -#endif +#endif // ARM_COMPUTE_ENABLE_SVE2 { GemmMethod::GEMM_HYBRID, "sve_hybrid_u8u32_dot_6x4VL", @@ -91,11 +91,11 @@ static const GemmImplementation gemm_quint8_meth [](const GemmArgs &args, const Requantize32 &qp) { return new GemmInterleavedQuantized(args, qp); } }, #endif -#ifdef MMLA_INT8 +#ifdef ARM_COMPUTE_ENABLE_I8MM { GemmMethod::GEMM_INTERLEAVED, "a64_interleaved_u8u32_mmla_8x12", - [](const GemmArgs &args, const Requantize32 &) { return (args._Ksize>8); }, + [](const GemmArgs &args, const Requantize32 &) { return args._ci->has_i8mm() && (args._Ksize>8); }, [](const GemmArgs &args, const Requantize32 &) { return args._ci->get_cpu_model() != CPUModel::KLEIN; }, [](const GemmArgs &args, const Requantize32 &qp) { return new GemmInterleavedQuantized(args, qp); } }, diff --git a/src/core/NEON/kernels/arm_gemm/gemm_uint8.cpp b/src/core/NEON/kernels/arm_gemm/gemm_uint8.cpp index 4de3d2b18a..4c05fd1b73 100644 --- a/src/core/NEON/kernels/arm_gemm/gemm_uint8.cpp +++ b/src/core/NEON/kernels/arm_gemm/gemm_uint8.cpp @@ -46,12 +46,12 @@ namespace arm_gemm { static const GemmImplementation gemm_u8_methods[] = { -#ifdef __ARM_FEATURE_SVE -#ifdef MMLA_INT8 +#ifdef ARM_COMPUTE_ENABLE_SVE +#ifdef ARM_COMPUTE_ENABLE_I8MM { GemmMethod::GEMM_INTERLEAVED, "sve_interleaved_u8u32_mmla_8x3VL", - [](const GemmArgs &args) { return args._ci->has_sve() && (args._Ksize>8); }, + [](const GemmArgs &args) { return args._ci->has_svei8mm() && (args._Ksize>8); }, [](const GemmArgs &args) { return args._ci->get_cpu_model() != CPUModel::KLEIN; }, [](const GemmArgs &args) { return new GemmInterleaved(args); } }, @@ -78,11 +78,11 @@ static const GemmImplementation gemm_u8_methods[] = { [](const GemmArgs &args) { return new GemmInterleaved(args); } }, #endif -#ifdef MMLA_INT8 +#ifdef ARM_COMPUTE_ENABLE_I8MM { GemmMethod::GEMM_INTERLEAVED, "a64_interleaved_u8u32_mmla_8x12", - [](const GemmArgs &args) { return (args._Ksize>8); }, + [](const GemmArgs &args) { return args._ci->has_i8mm() && (args._Ksize>8); }, nullptr, [](const GemmArgs &args) { return new GemmInterleaved(args); } }, diff --git a/src/core/NEON/kernels/arm_gemm/interleave_indirect.cpp b/src/core/NEON/kernels/arm_gemm/interleave_indirect.cpp index 0d56b46e19..a6b1269927 100644 --- a/src/core/NEON/kernels/arm_gemm/interleave_indirect.cpp +++ b/src/core/NEON/kernels/arm_gemm/interleave_indirect.cpp @@ -320,12 +320,12 @@ template void IndirectInterleave<8, 1, VLType::None>(float *, const float * cons template void ConvolutionInterleave<8, 1, VLType::None>(float *, const float *, size_t, const convolver &, unsigned int, unsigned int, unsigned int, unsigned int, unsigned int, bool, int32_t); template void Interleave<8, 1, VLType::None>(float *, const float *, size_t, unsigned int, unsigned int, unsigned int, unsigned int, bool, int32_t); -#if defined(__ARM_FEATURE_SVE) && defined(MMLA_FP32) +#if defined(ARM_COMPUTE_ENABLE_SVE) && defined(ARM_COMPUTE_ENABLE_SVEF32MM) /* FMMLA */ template void IndirectInterleave<8, 2, VLType::None>(float *, const float * const * const *, unsigned int, unsigned int, unsigned int, unsigned int, unsigned int, unsigned int, bool, int32_t); template void ConvolutionInterleave<8, 2, VLType::None>(float *, const float *, size_t, const convolver &, unsigned int, unsigned int, unsigned int, unsigned int, unsigned int, bool, int32_t); template void Interleave<8, 2, VLType::None>(float *, const float *, size_t, unsigned int, unsigned int, unsigned int, unsigned int, bool, int32_t); -#endif // SVE && MMLA_FP32 +#endif // ARM_COMPUTE_ENABLE_SVE && ARM_COMPUTE_ENABLE_SVEF32MM /* FP16 */ #if defined(FP16_KERNELS) || defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC) @@ -340,7 +340,7 @@ template void Interleave<8, 1, VLType::None>(float *, const __fp16 *, size_t, un /* BF16 */ /* Arm® Neon™/SVE BFDOT */ -#ifdef V8P6_BF +#ifdef ARM_COMPUTE_ENABLE_BF16 template void IndirectInterleave<8, 2, VLType::None>(bfloat16 *, const bfloat16 * const * const *, unsigned int, unsigned int, unsigned int, unsigned int, unsigned int, unsigned int, bool, int32_t); template void ConvolutionInterleave<8, 2, VLType::None>(bfloat16 *, const bfloat16 *, size_t, const convolver &, unsigned int, unsigned int, unsigned int, unsigned int, unsigned int, bool, int32_t); template void Interleave<8, 2, VLType::None>(bfloat16 *, const bfloat16 *, size_t, unsigned int, unsigned int, unsigned int, unsigned int, bool, int32_t); @@ -348,7 +348,7 @@ template void Interleave<8, 2, VLType::None>(bfloat16 *, const bfloat16 *, size_ template void IndirectInterleave<8, 4, VLType::None>(bfloat16 *, const bfloat16 * const * const *, unsigned int, unsigned int, unsigned int, unsigned int, unsigned int, unsigned int, bool, int32_t); template void ConvolutionInterleave<8, 4, VLType::None>(bfloat16 *, const bfloat16 *, size_t, const convolver &, unsigned int, unsigned int, unsigned int, unsigned int, unsigned int, bool, int32_t); template void Interleave<8, 4, VLType::None>(bfloat16 *, const bfloat16 *, size_t, unsigned int, unsigned int, unsigned int, unsigned int, bool, int32_t); -#endif // V8P6_BF +#endif // ARM_COMPUTE_ENABLE_BF16 /* Arm® Neon™/SVE using FP32 kernel */ template void IndirectInterleave<8, 1, VLType::None>(float *, const bfloat16 * const * const *, unsigned int, unsigned int, unsigned int, unsigned int, unsigned int, unsigned int, bool, int32_t); @@ -375,12 +375,12 @@ template void IndirectInterleave<8, 4, VLType::None>(int8_t *, const int8_t * co template void ConvolutionInterleave<8, 4, VLType::None>(int8_t *, const int8_t *, size_t, const convolver &, unsigned int, unsigned int, unsigned int, unsigned int, unsigned int, bool, int32_t); template void Interleave<8, 4, VLType::None>(int8_t *, const int8_t *, size_t, unsigned int, unsigned int, unsigned int, unsigned int, bool, int32_t); -#ifdef MMLA_INT8 +#ifdef ARM_COMPUTE_ENABLE_I8MM /* MMLA SMMLA (height 8, block 8) */ template void IndirectInterleave<8, 8, VLType::None>(int8_t *, const int8_t * const * const *, unsigned int, unsigned int, unsigned int y0, unsigned int ymax, unsigned int k0, unsigned int kmax, bool, int32_t); template void ConvolutionInterleave<8, 8, VLType::None>(int8_t *, const int8_t *, size_t, const convolver &, unsigned int, unsigned int, unsigned int, unsigned int, unsigned int, bool, int32_t); template void Interleave<8, 8, VLType::None>(int8_t *, const int8_t *, size_t, unsigned int, unsigned int, unsigned int, unsigned int, bool, int32_t); -#endif // MMLA_INT8 +#endif // ARM_COMPUTE_ENABLE_I8MM /* Arm® Neon™ SDOT (height 8, block 1) */ template void IndirectInterleave<8, 1, VLType::None>(int16_t *, const int8_t * const * const *, unsigned int, unsigned int, unsigned int y0, unsigned int ymax, unsigned int k0, unsigned int kmax, bool, int32_t); @@ -397,12 +397,12 @@ template void IndirectInterleave<8, 4, VLType::None>(uint8_t *, const uint8_t * template void ConvolutionInterleave<8, 4, VLType::None>(uint8_t *, const uint8_t *, size_t, const convolver &, unsigned int, unsigned int, unsigned int, unsigned int, unsigned int, bool, int32_t); template void Interleave<8, 4, VLType::None>(uint8_t *, const uint8_t *, size_t, unsigned int, unsigned int, unsigned int, unsigned int, bool, int32_t); -#ifdef MMLA_INT8 +#ifdef ARM_COMPUTE_ENABLE_I8MM /* MMLA SMMLA (height 8, block 8) */ template void IndirectInterleave<8, 8, VLType::None>(uint8_t *, const uint8_t * const * const *, unsigned int, unsigned int, unsigned int y0, unsigned int ymax, unsigned int k0, unsigned int kmax, bool, int32_t); template void ConvolutionInterleave<8, 8, VLType::None>(uint8_t *, const uint8_t *, size_t, const convolver &, unsigned int, unsigned int, unsigned int, unsigned int, unsigned int, bool, int32_t); template void Interleave<8, 8, VLType::None>(uint8_t *, const uint8_t *, size_t, unsigned int, unsigned int, unsigned int, unsigned int, bool, int32_t); -#endif // MMLA_INT8 +#endif // ARM_COMPUTE_ENABLE_I8MM /* Arm® Neon™ 16-bit (height 8, block 1) */ template void IndirectInterleave<8, 1, VLType::None>(uint16_t *, const uint8_t * const * const *, unsigned int, unsigned int, unsigned int y0, unsigned int ymax, unsigned int k0, unsigned int kmax, bool, int32_t); diff --git a/src/core/NEON/kernels/arm_gemm/kernels/sve_gemv_fp32_mla_8VL/generic.cpp b/src/core/NEON/kernels/arm_gemm/kernels/sve_gemv_fp32_mla_8VL/generic.cpp index c62e31936c..78387de90c 100644 --- a/src/core/NEON/kernels/arm_gemm/kernels/sve_gemv_fp32_mla_8VL/generic.cpp +++ b/src/core/NEON/kernels/arm_gemm/kernels/sve_gemv_fp32_mla_8VL/generic.cpp @@ -21,7 +21,7 @@ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. */ -#ifdef __ARM_FEATURE_SVE +#ifdef ARM_COMPUTE_ENABLE_SVE #include "arm_gemm.hpp" #include "../../utils.hpp" diff --git a/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_bf16fp32_dot_6x4VL.hpp b/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_bf16fp32_dot_6x4VL.hpp index 066bff4602..7b0282fa32 100644 --- a/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_bf16fp32_dot_6x4VL.hpp +++ b/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_bf16fp32_dot_6x4VL.hpp @@ -22,7 +22,7 @@ * IN THE SOFTWARE. */ #pragma once -#ifdef __ARM_FEATURE_SVE +#ifdef ARM_COMPUTE_ENABLE_SVE #include "../std_transforms_sve.hpp" #include "../bfloat.hpp" @@ -81,4 +81,4 @@ public: } // namespace arm_gemm #undef ARGLIST -#endif // __ARM_FEATURE_SVE +#endif // ARM_COMPUTE_ENABLE_SVE diff --git a/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_bf16fp32_dot_6x4VL/generic.cpp b/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_bf16fp32_dot_6x4VL/generic.cpp index 1233a98531..34a657f64f 100644 --- a/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_bf16fp32_dot_6x4VL/generic.cpp +++ b/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_bf16fp32_dot_6x4VL/generic.cpp @@ -21,7 +21,7 @@ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. */ -#ifdef __ARM_FEATURE_SVE +#ifdef ARM_COMPUTE_ENABLE_SVE #include "arm_gemm.hpp" #include "../../utils.hpp" @@ -2153,4 +2153,4 @@ void sve_hybrid_bf16fp32_dot_6x4VL ( } } // namespace arm_gemm -#endif // __ARM_FEATURE_SVE +#endif // ARM_COMPUTE_ENABLE_SVE diff --git a/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_fp16_mla_6x4VL.hpp b/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_fp16_mla_6x4VL.hpp index 5c8563952f..f98ccdc7d3 100644 --- a/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_fp16_mla_6x4VL.hpp +++ b/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_fp16_mla_6x4VL.hpp @@ -22,7 +22,7 @@ * IN THE SOFTWARE. */ #pragma once -#ifdef __ARM_FEATURE_SVE +#ifdef ARM_COMPUTE_ENABLE_SVE #include "../std_transforms_sve.hpp" @@ -80,4 +80,4 @@ public: } // namespace arm_gemm #undef ARGLIST -#endif // __ARM_FEATURE_SVE +#endif // ARM_COMPUTE_ENABLE_SVE diff --git a/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_fp16_mla_6x4VL/generic.cpp b/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_fp16_mla_6x4VL/generic.cpp index 7cc03bbfb5..c151179a1f 100644 --- a/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_fp16_mla_6x4VL/generic.cpp +++ b/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_fp16_mla_6x4VL/generic.cpp @@ -21,7 +21,7 @@ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. */ -#ifdef __ARM_FEATURE_SVE +#ifdef ARM_COMPUTE_ENABLE_SVE #include "arm_gemm.hpp" #include "../../utils.hpp" @@ -3094,4 +3094,4 @@ void sve_hybrid_fp16_mla_6x4VL ( } } // namespace arm_gemm -#endif // __ARM_FEATURE_SVE +#endif // ARM_COMPUTE_ENABLE_SVE diff --git a/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_fp32_mla_6x4VL.hpp b/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_fp32_mla_6x4VL.hpp index b696e73637..4c0a3a11e0 100644 --- a/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_fp32_mla_6x4VL.hpp +++ b/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_fp32_mla_6x4VL.hpp @@ -22,7 +22,7 @@ * IN THE SOFTWARE. */ #pragma once -#ifdef __ARM_FEATURE_SVE +#ifdef ARM_COMPUTE_ENABLE_SVE #include "../std_transforms_sve.hpp" @@ -80,4 +80,4 @@ public: } // namespace arm_gemm #undef ARGLIST -#endif // __ARM_FEATURE_SVE +#endif // ARM_COMPUTE_ENABLE_SVE diff --git a/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_fp32_mla_6x4VL/generic.cpp b/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_fp32_mla_6x4VL/generic.cpp index dee9a107ff..25d65826b9 100644 --- a/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_fp32_mla_6x4VL/generic.cpp +++ b/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_fp32_mla_6x4VL/generic.cpp @@ -21,7 +21,7 @@ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. */ -#ifdef __ARM_FEATURE_SVE +#ifdef ARM_COMPUTE_ENABLE_SVE #include "arm_gemm.hpp" #include "../../utils.hpp" @@ -2152,4 +2152,4 @@ void sve_hybrid_fp32_mla_6x4VL ( } } // namespace arm_gemm -#endif // __ARM_FEATURE_SVE +#endif // ARM_COMPUTE_ENABLE_SVE diff --git a/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_fp32_mla_8x1VL.hpp b/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_fp32_mla_8x1VL.hpp index 2273d97d5f..87f063d224 100644 --- a/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_fp32_mla_8x1VL.hpp +++ b/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_fp32_mla_8x1VL.hpp @@ -22,7 +22,7 @@ * IN THE SOFTWARE. */ #pragma once -#ifdef __ARM_FEATURE_SVE +#ifdef ARM_COMPUTE_ENABLE_SVE #include "../std_transforms_sve.hpp" @@ -80,4 +80,4 @@ public: } // namespace arm_gemm #undef ARGLIST -#endif // __ARM_FEATURE_SVE +#endif // ARM_COMPUTE_ENABLE_SVE diff --git a/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_fp32_mla_8x1VL/generic.cpp b/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_fp32_mla_8x1VL/generic.cpp index 863325f7f5..943e0ac148 100644 --- a/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_fp32_mla_8x1VL/generic.cpp +++ b/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_fp32_mla_8x1VL/generic.cpp @@ -21,7 +21,7 @@ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. */ -#ifdef __ARM_FEATURE_SVE +#ifdef ARM_COMPUTE_ENABLE_SVE #include "arm_gemm.hpp" #include "../../utils.hpp" @@ -1616,4 +1616,4 @@ void sve_hybrid_fp32_mla_8x1VL ( } } // namespace arm_gemm -#endif // __ARM_FEATURE_SVE +#endif // ARM_COMPUTE_ENABLE_SVE diff --git a/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_s8qa_dot_4x4VL.hpp b/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_s8qa_dot_4x4VL.hpp index bc93ced25b..c278b3fc6b 100644 --- a/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_s8qa_dot_4x4VL.hpp +++ b/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_s8qa_dot_4x4VL.hpp @@ -22,7 +22,7 @@ * IN THE SOFTWARE. */ #pragma once -#ifdef __ARM_FEATURE_SVE +#ifdef ARM_COMPUTE_ENABLE_SVE #include "../std_transforms_sve.hpp" @@ -80,4 +80,4 @@ public: } // namespace arm_gemm #undef ARGLIST -#endif // __ARM_FEATURE_SVE +#endif // ARM_COMPUTE_ENABLE_SVE diff --git a/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_s8qa_dot_4x4VL/generic.cpp b/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_s8qa_dot_4x4VL/generic.cpp index 50b9ba524d..8a7465ba6b 100644 --- a/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_s8qa_dot_4x4VL/generic.cpp +++ b/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_s8qa_dot_4x4VL/generic.cpp @@ -21,7 +21,7 @@ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. */ -#ifdef __ARM_FEATURE_SVE +#ifdef ARM_COMPUTE_ENABLE_SVE #include "arm_gemm.hpp" #include "../../utils.hpp" @@ -1529,4 +1529,4 @@ void sve_hybrid_s8qa_dot_4x4VL ( } } // namespace arm_gemm -#endif // __ARM_FEATURE_SVE +#endif // ARM_COMPUTE_ENABLE_SVE diff --git a/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_s8qs_dot_6x4VL.hpp b/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_s8qs_dot_6x4VL.hpp index 61927236ad..57056b4c2a 100644 --- a/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_s8qs_dot_6x4VL.hpp +++ b/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_s8qs_dot_6x4VL.hpp @@ -22,7 +22,7 @@ * IN THE SOFTWARE. */ #pragma once -#ifdef __ARM_FEATURE_SVE +#ifdef ARM_COMPUTE_ENABLE_SVE #include "../std_transforms_sve.hpp" @@ -80,4 +80,4 @@ public: } // namespace arm_gemm #undef ARGLIST -#endif // __ARM_FEATURE_SVE +#endif // ARM_COMPUTE_ENABLE_SVE diff --git a/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_s8qs_dot_6x4VL/generic.cpp b/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_s8qs_dot_6x4VL/generic.cpp index f901a814f9..0328c107e2 100644 --- a/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_s8qs_dot_6x4VL/generic.cpp +++ b/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_s8qs_dot_6x4VL/generic.cpp @@ -21,7 +21,7 @@ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. */ -#ifdef __ARM_FEATURE_SVE +#ifdef ARM_COMPUTE_ENABLE_SVE #include "arm_gemm.hpp" #include "../../utils.hpp" @@ -2665,4 +2665,4 @@ void sve_hybrid_s8qs_dot_6x4VL ( } } // namespace arm_gemm -#endif // __ARM_FEATURE_SVE +#endif // ARM_COMPUTE_ENABLE_SVE diff --git a/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_s8s32_dot_6x4VL.hpp b/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_s8s32_dot_6x4VL.hpp index b2c376196f..37258978d3 100644 --- a/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_s8s32_dot_6x4VL.hpp +++ b/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_s8s32_dot_6x4VL.hpp @@ -22,7 +22,7 @@ * IN THE SOFTWARE. */ #pragma once -#ifdef __ARM_FEATURE_SVE +#ifdef ARM_COMPUTE_ENABLE_SVE #include "../std_transforms_sve.hpp" @@ -80,4 +80,4 @@ public: } // namespace arm_gemm #undef ARGLIST -#endif // __ARM_FEATURE_SVE +#endif // ARM_COMPUTE_ENABLE_SVE diff --git a/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_s8s32_dot_6x4VL/generic.cpp b/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_s8s32_dot_6x4VL/generic.cpp index 8862b3665a..9cddee941e 100644 --- a/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_s8s32_dot_6x4VL/generic.cpp +++ b/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_s8s32_dot_6x4VL/generic.cpp @@ -21,7 +21,7 @@ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. */ -#ifdef __ARM_FEATURE_SVE +#ifdef ARM_COMPUTE_ENABLE_SVE #include "arm_gemm.hpp" #include "../../utils.hpp" @@ -1819,4 +1819,4 @@ void sve_hybrid_s8s32_dot_6x4VL ( } } // namespace arm_gemm -#endif // __ARM_FEATURE_SVE +#endif // ARM_COMPUTE_ENABLE_SVE diff --git a/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_u8qa_dot_4x4VL.hpp b/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_u8qa_dot_4x4VL.hpp index cfb8adfc87..3de8d178cd 100644 --- a/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_u8qa_dot_4x4VL.hpp +++ b/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_u8qa_dot_4x4VL.hpp @@ -22,7 +22,7 @@ * IN THE SOFTWARE. */ #pragma once -#ifdef __ARM_FEATURE_SVE +#ifdef ARM_COMPUTE_ENABLE_SVE #include "../std_transforms_sve.hpp" @@ -80,4 +80,4 @@ public: } // namespace arm_gemm #undef ARGLIST -#endif // __ARM_FEATURE_SVE +#endif // ARM_COMPUTE_ENABLE_SVE diff --git a/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_u8qa_dot_4x4VL/generic.cpp b/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_u8qa_dot_4x4VL/generic.cpp index 373d82930b..0bfc28776f 100644 --- a/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_u8qa_dot_4x4VL/generic.cpp +++ b/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_u8qa_dot_4x4VL/generic.cpp @@ -21,7 +21,7 @@ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. */ -#ifdef __ARM_FEATURE_SVE +#ifdef ARM_COMPUTE_ENABLE_SVE #include "arm_gemm.hpp" #include "../../utils.hpp" @@ -1529,4 +1529,4 @@ void sve_hybrid_u8qa_dot_4x4VL ( } } // namespace arm_gemm -#endif // __ARM_FEATURE_SVE +#endif // ARM_COMPUTE_ENABLE_SVE diff --git a/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_u8u32_dot_6x4VL.hpp b/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_u8u32_dot_6x4VL.hpp index 4ea1d17c4e..a2883bfa30 100644 --- a/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_u8u32_dot_6x4VL.hpp +++ b/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_u8u32_dot_6x4VL.hpp @@ -22,7 +22,7 @@ * IN THE SOFTWARE. */ #pragma once -#ifdef __ARM_FEATURE_SVE +#ifdef ARM_COMPUTE_ENABLE_SVE #include "../std_transforms_sve.hpp" @@ -80,4 +80,4 @@ public: } // namespace arm_gemm #undef ARGLIST -#endif // __ARM_FEATURE_SVE +#endif // ARM_COMPUTE_ENABLE_SVE diff --git a/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_u8u32_dot_6x4VL/generic.cpp b/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_u8u32_dot_6x4VL/generic.cpp index 97f6665d85..413bc65288 100644 --- a/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_u8u32_dot_6x4VL/generic.cpp +++ b/src/core/NEON/kernels/arm_gemm/kernels/sve_hybrid_u8u32_dot_6x4VL/generic.cpp @@ -21,7 +21,7 @@ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. */ -#ifdef __ARM_FEATURE_SVE +#ifdef ARM_COMPUTE_ENABLE_SVE #include "arm_gemm.hpp" #include "../../utils.hpp" @@ -1819,4 +1819,4 @@ void sve_hybrid_u8u32_dot_6x4VL ( } } // namespace arm_gemm -#endif // __ARM_FEATURE_SVE +#endif // ARM_COMPUTE_ENABLE_SVE diff --git a/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_bf16fp32_dot_8x3VL.hpp b/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_bf16fp32_dot_8x3VL.hpp index 12bb758b68..d717b745c9 100644 --- a/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_bf16fp32_dot_8x3VL.hpp +++ b/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_bf16fp32_dot_8x3VL.hpp @@ -23,7 +23,7 @@ */ #pragma once -#ifdef __ARM_FEATURE_SVE +#ifdef ARM_COMPUTE_ENABLE_SVE #include "../bfloat.hpp" #include "../std_transforms_sve.hpp" @@ -69,4 +69,4 @@ public: } // namespace arm_gemm -#endif // __ARM_FEATURE_SVE +#endif // ARM_COMPUTE_ENABLE_SVE diff --git a/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_bf16fp32_dot_8x3VL/generic.cpp b/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_bf16fp32_dot_8x3VL/generic.cpp index adee900337..4f774b133f 100644 --- a/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_bf16fp32_dot_8x3VL/generic.cpp +++ b/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_bf16fp32_dot_8x3VL/generic.cpp @@ -21,7 +21,7 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ -#ifdef __ARM_FEATURE_SVE +#ifdef ARM_COMPUTE_ENABLE_SVE #include "../../bfloat.hpp" #include "../../asmlib.hpp" @@ -326,4 +326,4 @@ void sve_interleaved_bf16fp32_dot_8x3VL(const bfloat16 *Apanel, const bfloat16 * } // namespace arm_gemm -#endif // __ARM_FEATURE_SVE +#endif // ARM_COMPUTE_ENABLE_SVE diff --git a/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_bf16fp32_mmla_8x3VL.hpp b/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_bf16fp32_mmla_8x3VL.hpp index 2889dd7f0f..b7fc515341 100644 --- a/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_bf16fp32_mmla_8x3VL.hpp +++ b/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_bf16fp32_mmla_8x3VL.hpp @@ -23,7 +23,7 @@ */ #pragma once -#ifdef __ARM_FEATURE_SVE +#ifdef ARM_COMPUTE_ENABLE_SVE #include "../bfloat.hpp" #include "../std_transforms_sve.hpp" @@ -69,4 +69,4 @@ public: } // namespace arm_gemm -#endif // __ARM_FEATURE_SVE +#endif // ARM_COMPUTE_ENABLE_SVE diff --git a/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_bf16fp32_mmla_8x3VL/generic.cpp b/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_bf16fp32_mmla_8x3VL/generic.cpp index e43404e608..c720942140 100644 --- a/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_bf16fp32_mmla_8x3VL/generic.cpp +++ b/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_bf16fp32_mmla_8x3VL/generic.cpp @@ -21,7 +21,7 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ -#ifdef __ARM_FEATURE_SVE +#ifdef ARM_COMPUTE_ENABLE_SVE #include "../../bfloat.hpp" #include "../../asmlib.hpp" @@ -394,4 +394,4 @@ void sve_interleaved_bf16fp32_mmla_8x3VL(const bfloat16 *Apanel, const bfloat16 } // namespace arm_gemm -#endif // __ARM_FEATURE_SVE +#endif // ARM_COMPUTE_ENABLE_SVE diff --git a/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_fp16_mla_8x3VL.hpp b/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_fp16_mla_8x3VL.hpp index eb946d9dfa..b797b8bec1 100644 --- a/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_fp16_mla_8x3VL.hpp +++ b/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_fp16_mla_8x3VL.hpp @@ -23,7 +23,7 @@ */ #pragma once -#ifdef __ARM_FEATURE_SVE +#ifdef ARM_COMPUTE_ENABLE_SVE #include "../std_transforms_sve.hpp" @@ -69,4 +69,4 @@ public: } // namespace arm_gemm -#endif // __ARM_FEATURE_SVE +#endif // ARM_COMPUTE_ENABLE_SVE diff --git a/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_fp16_mla_8x3VL/generic.cpp b/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_fp16_mla_8x3VL/generic.cpp index 46b8770409..0f1937acc5 100644 --- a/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_fp16_mla_8x3VL/generic.cpp +++ b/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_fp16_mla_8x3VL/generic.cpp @@ -21,7 +21,7 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ -#ifdef __ARM_FEATURE_SVE +#ifdef ARM_COMPUTE_ENABLE_SVE #include "../../asmlib.hpp" @@ -316,4 +316,4 @@ void sve_interleaved_fp16_mla_8x3VL(const __fp16 *Apanel, const __fp16 *Bpanel, } // namespace arm_gemm -#endif // __ARM_FEATURE_SVE +#endif // ARM_COMPUTE_ENABLE_SVE diff --git a/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_fp32_mla_8x3VL.hpp b/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_fp32_mla_8x3VL.hpp index b84ba83b6a..f4bb809fe8 100644 --- a/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_fp32_mla_8x3VL.hpp +++ b/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_fp32_mla_8x3VL.hpp @@ -23,7 +23,7 @@ */ #pragma once -#ifdef __ARM_FEATURE_SVE +#ifdef ARM_COMPUTE_ENABLE_SVE #include "../std_transforms_sve.hpp" @@ -69,4 +69,4 @@ public: } // namespace arm_gemm -#endif // __ARM_FEATURE_SVE +#endif // ARM_COMPUTE_ENABLE_SVE diff --git a/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_fp32_mla_8x3VL/generic.cpp b/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_fp32_mla_8x3VL/generic.cpp index 1e05a308b5..10feaa130b 100644 --- a/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_fp32_mla_8x3VL/generic.cpp +++ b/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_fp32_mla_8x3VL/generic.cpp @@ -21,7 +21,7 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ -#ifdef __ARM_FEATURE_SVE +#ifdef ARM_COMPUTE_ENABLE_SVE #include "../../asmlib.hpp" @@ -325,4 +325,4 @@ void sve_interleaved_fp32_mla_8x3VL(const float *Apanel, const float *Bpanel, fl } // namespace arm_gemm -#endif // __ARM_FEATURE_SVE +#endif // ARM_COMPUTE_ENABLE_SVE diff --git a/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_fp32_mmla_8x3VL.hpp b/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_fp32_mmla_8x3VL.hpp index 96216960ff..a355262fe2 100644 --- a/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_fp32_mmla_8x3VL.hpp +++ b/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_fp32_mmla_8x3VL.hpp @@ -23,7 +23,7 @@ */ #pragma once -#ifdef __ARM_FEATURE_SVE +#ifdef ARM_COMPUTE_ENABLE_SVE #include "../std_transforms_sve.hpp" @@ -69,4 +69,4 @@ public: } // namespace arm_gemm -#endif // __ARM_FEATURE_SVE +#endif // ARM_COMPUTE_ENABLE_SVE diff --git a/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_fp32_mmla_8x3VL/generic.cpp b/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_fp32_mmla_8x3VL/generic.cpp index 39daf0ff20..a985a91b90 100644 --- a/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_fp32_mmla_8x3VL/generic.cpp +++ b/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_fp32_mmla_8x3VL/generic.cpp @@ -21,7 +21,7 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ -#ifdef __ARM_FEATURE_SVE +#ifdef ARM_COMPUTE_ENABLE_SVE #include "../../asmlib.hpp" @@ -394,4 +394,4 @@ void sve_interleaved_fp32_mmla_8x3VL(const float *Apanel, const float *Bpanel, f } // namespace arm_gemm -#endif // __ARM_FEATURE_SVE +#endif // ARM_COMPUTE_ENABLE_SVE diff --git a/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_s8s32_dot_8x3VL.hpp b/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_s8s32_dot_8x3VL.hpp index 3e16915cd4..aa6d9e7ec8 100644 --- a/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_s8s32_dot_8x3VL.hpp +++ b/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_s8s32_dot_8x3VL.hpp @@ -23,7 +23,7 @@ */ #pragma once -#ifdef __ARM_FEATURE_SVE +#ifdef ARM_COMPUTE_ENABLE_SVE #include #include "../std_transforms_sve.hpp" @@ -70,4 +70,4 @@ public: } // namespace arm_gemm -#endif // __ARM_FEATURE_SVE +#endif // ARM_COMPUTE_ENABLE_SVE diff --git a/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_s8s32_dot_8x3VL/generic.cpp b/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_s8s32_dot_8x3VL/generic.cpp index 674c2400bf..01c0f8cddc 100644 --- a/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_s8s32_dot_8x3VL/generic.cpp +++ b/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_s8s32_dot_8x3VL/generic.cpp @@ -21,7 +21,7 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ -#ifdef __ARM_FEATURE_SVE +#ifdef ARM_COMPUTE_ENABLE_SVE #include #include "../../asmlib.hpp" @@ -326,4 +326,4 @@ void sve_interleaved_s8s32_dot_8x3VL(const int8_t *Apanel, const int8_t *Bpanel, } // namespace arm_gemm -#endif // __ARM_FEATURE_SVE +#endif // ARM_COMPUTE_ENABLE_SVE diff --git a/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_s8s32_mmla_8x3VL.hpp b/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_s8s32_mmla_8x3VL.hpp index 02b3451c54..671946b262 100644 --- a/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_s8s32_mmla_8x3VL.hpp +++ b/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_s8s32_mmla_8x3VL.hpp @@ -23,7 +23,7 @@ */ #pragma once -#ifdef __ARM_FEATURE_SVE +#ifdef ARM_COMPUTE_ENABLE_SVE #include #include "../std_transforms_sve.hpp" @@ -70,4 +70,4 @@ public: } // namespace arm_gemm -#endif // __ARM_FEATURE_SVE +#endif // ARM_COMPUTE_ENABLE_SVE diff --git a/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_s8s32_mmla_8x3VL/generic.cpp b/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_s8s32_mmla_8x3VL/generic.cpp index 578aa01732..9420210aae 100644 --- a/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_s8s32_mmla_8x3VL/generic.cpp +++ b/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_s8s32_mmla_8x3VL/generic.cpp @@ -21,7 +21,7 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ -#ifdef __ARM_FEATURE_SVE +#ifdef ARM_COMPUTE_ENABLE_SVE #include #include "../../asmlib.hpp" @@ -394,4 +394,4 @@ void sve_interleaved_s8s32_mmla_8x3VL(const int8_t *Apanel, const int8_t *Bpanel } // namespace arm_gemm -#endif // __ARM_FEATURE_SVE +#endif // ARM_COMPUTE_ENABLE_SVE diff --git a/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_u8u32_dot_8x3VL.hpp b/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_u8u32_dot_8x3VL.hpp index 832a224199..7d39485164 100644 --- a/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_u8u32_dot_8x3VL.hpp +++ b/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_u8u32_dot_8x3VL.hpp @@ -23,7 +23,7 @@ */ #pragma once -#ifdef __ARM_FEATURE_SVE +#ifdef ARM_COMPUTE_ENABLE_SVE #include #include "../std_transforms_sve.hpp" @@ -70,4 +70,4 @@ public: } // namespace arm_gemm -#endif // __ARM_FEATURE_SVE +#endif // ARM_COMPUTE_ENABLE_SVE diff --git a/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_u8u32_dot_8x3VL/generic.cpp b/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_u8u32_dot_8x3VL/generic.cpp index 891869c767..2139bab69d 100644 --- a/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_u8u32_dot_8x3VL/generic.cpp +++ b/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_u8u32_dot_8x3VL/generic.cpp @@ -21,7 +21,7 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ -#ifdef __ARM_FEATURE_SVE +#ifdef ARM_COMPUTE_ENABLE_SVE #include #include "../../asmlib.hpp" @@ -326,4 +326,4 @@ void sve_interleaved_u8u32_dot_8x3VL(const uint8_t *Apanel, const uint8_t *Bpane } // namespace arm_gemm -#endif // __ARM_FEATURE_SVE +#endif // ARM_COMPUTE_ENABLE_SVE diff --git a/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_u8u32_mmla_8x3VL.hpp b/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_u8u32_mmla_8x3VL.hpp index 4fdaab84bd..ca9cadd6d7 100644 --- a/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_u8u32_mmla_8x3VL.hpp +++ b/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_u8u32_mmla_8x3VL.hpp @@ -23,7 +23,7 @@ */ #pragma once -#ifdef __ARM_FEATURE_SVE +#ifdef ARM_COMPUTE_ENABLE_SVE #include #include "../std_transforms_sve.hpp" @@ -70,4 +70,4 @@ public: } // namespace arm_gemm -#endif // __ARM_FEATURE_SVE +#endif // ARM_COMPUTE_ENABLE_SVE diff --git a/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_u8u32_mmla_8x3VL/generic.cpp b/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_u8u32_mmla_8x3VL/generic.cpp index fa08a9d091..d42385789c 100644 --- a/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_u8u32_mmla_8x3VL/generic.cpp +++ b/src/core/NEON/kernels/arm_gemm/kernels/sve_interleaved_u8u32_mmla_8x3VL/generic.cpp @@ -21,7 +21,7 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ -#ifdef __ARM_FEATURE_SVE +#ifdef ARM_COMPUTE_ENABLE_SVE #include #include "../../asmlib.hpp" @@ -394,4 +394,4 @@ void sve_interleaved_u8u32_mmla_8x3VL(const uint8_t *Apanel, const uint8_t *Bpan } // namespace arm_gemm -#endif // __ARM_FEATURE_SVE +#endif // ARM_COMPUTE_ENABLE_SVE diff --git a/src/core/NEON/kernels/arm_gemm/kernels/sve_smallK_hybrid_fp32_mla_8x1VL.hpp b/src/core/NEON/kernels/arm_gemm/kernels/sve_smallK_hybrid_fp32_mla_8x1VL.hpp index 2097d76a54..ab225589e1 100644 --- a/src/core/NEON/kernels/arm_gemm/kernels/sve_smallK_hybrid_fp32_mla_8x1VL.hpp +++ b/src/core/NEON/kernels/arm_gemm/kernels/sve_smallK_hybrid_fp32_mla_8x1VL.hpp @@ -23,7 +23,7 @@ */ #pragma once -#ifdef __ARM_FEATURE_SVE +#ifdef ARM_COMPUTE_ENABLE_SVE @@ -85,4 +85,4 @@ public: } // namespace arm_gemm -#endif // __ARM_FEATURE_SVE +#endif // ARM_COMPUTE_ENABLE_SVE diff --git a/src/core/NEON/kernels/arm_gemm/kernels/sve_smallK_hybrid_fp32_mla_8x1VL/generic.cpp b/src/core/NEON/kernels/arm_gemm/kernels/sve_smallK_hybrid_fp32_mla_8x1VL/generic.cpp index e07cfa8218..cdad98c5f1 100644 --- a/src/core/NEON/kernels/arm_gemm/kernels/sve_smallK_hybrid_fp32_mla_8x1VL/generic.cpp +++ b/src/core/NEON/kernels/arm_gemm/kernels/sve_smallK_hybrid_fp32_mla_8x1VL/generic.cpp @@ -21,7 +21,7 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ -#ifdef __ARM_FEATURE_SVE +#ifdef ARM_COMPUTE_ENABLE_SVE #include @@ -18804,4 +18804,4 @@ void sve_smallK_hybrid_fp32_mla_8x1VL(const float *A, int lda, const float *B, f } // namespace arm_gemm -#endif // __ARM_FEATURE_SVE +#endif // ARM_COMPUTE_ENABLE_SVE diff --git a/src/core/NEON/kernels/arm_gemm/kernels/sve_smallK_hybrid_s8s32_dot_8x1VL.hpp b/src/core/NEON/kernels/arm_gemm/kernels/sve_smallK_hybrid_s8s32_dot_8x1VL.hpp index e50c05ba39..e735567e95 100644 --- a/src/core/NEON/kernels/arm_gemm/kernels/sve_smallK_hybrid_s8s32_dot_8x1VL.hpp +++ b/src/core/NEON/kernels/arm_gemm/kernels/sve_smallK_hybrid_s8s32_dot_8x1VL.hpp @@ -23,7 +23,7 @@ */ #pragma once -#ifdef __ARM_FEATURE_SVE +#ifdef ARM_COMPUTE_ENABLE_SVE #include @@ -85,4 +85,4 @@ public: } // namespace arm_gemm -#endif // __ARM_FEATURE_SVE +#endif // ARM_COMPUTE_ENABLE_SVE diff --git a/src/core/NEON/kernels/arm_gemm/kernels/sve_smallK_hybrid_s8s32_dot_8x1VL/generic.cpp b/src/core/NEON/kernels/arm_gemm/kernels/sve_smallK_hybrid_s8s32_dot_8x1VL/generic.cpp index 98004e98a5..cd01411722 100644 --- a/src/core/NEON/kernels/arm_gemm/kernels/sve_smallK_hybrid_s8s32_dot_8x1VL/generic.cpp +++ b/src/core/NEON/kernels/arm_gemm/kernels/sve_smallK_hybrid_s8s32_dot_8x1VL/generic.cpp @@ -21,7 +21,7 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ -#ifdef __ARM_FEATURE_SVE +#ifdef ARM_COMPUTE_ENABLE_SVE #include @@ -8968,4 +8968,4 @@ void sve_smallK_hybrid_s8s32_dot_8x1VL(const int8_t *A, int lda, const int8_t *B } // namespace arm_gemm -#endif // __ARM_FEATURE_SVE +#endif // ARM_COMPUTE_ENABLE_SVE diff --git a/src/core/NEON/kernels/arm_gemm/kernels/sve_smallK_hybrid_u8u32_dot_8x1VL.hpp b/src/core/NEON/kernels/arm_gemm/kernels/sve_smallK_hybrid_u8u32_dot_8x1VL.hpp index 60184be043..25dd10019d 100644 --- a/src/core/NEON/kernels/arm_gemm/kernels/sve_smallK_hybrid_u8u32_dot_8x1VL.hpp +++ b/src/core/NEON/kernels/arm_gemm/kernels/sve_smallK_hybrid_u8u32_dot_8x1VL.hpp @@ -23,7 +23,7 @@ */ #pragma once -#ifdef __ARM_FEATURE_SVE +#ifdef ARM_COMPUTE_ENABLE_SVE #include @@ -85,4 +85,4 @@ public: } // namespace arm_gemm -#endif // __ARM_FEATURE_SVE +#endif // ARM_COMPUTE_ENABLE_SVE diff --git a/src/core/NEON/kernels/arm_gemm/kernels/sve_smallK_hybrid_u8u32_dot_8x1VL/generic.cpp b/src/core/NEON/kernels/arm_gemm/kernels/sve_smallK_hybrid_u8u32_dot_8x1VL/generic.cpp index 6a8553216b..99a287b4f5 100644 --- a/src/core/NEON/kernels/arm_gemm/kernels/sve_smallK_hybrid_u8u32_dot_8x1VL/generic.cpp +++ b/src/core/NEON/kernels/arm_gemm/kernels/sve_smallK_hybrid_u8u32_dot_8x1VL/generic.cpp @@ -21,7 +21,7 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ -#ifdef __ARM_FEATURE_SVE +#ifdef ARM_COMPUTE_ENABLE_SVE #include @@ -8968,4 +8968,4 @@ void sve_smallK_hybrid_u8u32_dot_8x1VL(const uint8_t *A, int lda, const uint8_t } // namespace arm_gemm -#endif // __ARM_FEATURE_SVE +#endif // ARM_COMPUTE_ENABLE_SVE diff --git a/src/core/NEON/kernels/arm_gemm/mergeresults-sve.cpp b/src/core/NEON/kernels/arm_gemm/mergeresults-sve.cpp new file mode 100644 index 0000000000..77d86b7dd8 --- /dev/null +++ b/src/core/NEON/kernels/arm_gemm/mergeresults-sve.cpp @@ -0,0 +1,41 @@ +/* + * Copyright (c) 2021 Arm Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ + +/* As some of the merges need these headers, but are all included in the + * arm_gemm namespace, put these headers here. */ +#include + +#include + +#include "arm_gemm.hpp" +#include "asmlib.hpp" +#include "utils.hpp" + +#include "mergeresults.hpp" + +namespace arm_gemm { + +#include "merges/list-sve.hpp" + +} // namespace arm_gemm \ No newline at end of file diff --git a/src/core/NEON/kernels/arm_gemm/mergeresults.cpp b/src/core/NEON/kernels/arm_gemm/mergeresults.cpp index 17566db375..bbfe8f23d9 100644 --- a/src/core/NEON/kernels/arm_gemm/mergeresults.cpp +++ b/src/core/NEON/kernels/arm_gemm/mergeresults.cpp @@ -37,9 +37,13 @@ namespace arm_gemm { template void MergeResults(Tout * out, const Tin * in, int ldc, int y0, int ymax, int x0, int xmax, const Tout *bias, Activation act, bool append) { + // NOTE: The following code is disabled to avoid calling get_vector_length(), so templated MergeResults will not + // be correct for SVE cases. This is OK as we have specialisations for all needed SVE cases anyway. + // // For SVE cases, multiply the width up by the vector length. // Use the *input* type to determine this, since this will be what the kernel operated on. - const int width = twidth * (sve ? get_vector_length() : 1); + // const int width = twidth * (sve ? get_vector_length() : 1); + const int width = twidth; const int full_y_blocks = (ymax - y0) / height; const int y_remainder = (ymax - y0) % height; diff --git a/src/core/NEON/kernels/arm_gemm/merges/list-sve.hpp b/src/core/NEON/kernels/arm_gemm/merges/list-sve.hpp new file mode 100644 index 0000000000..aded4b3b8c --- /dev/null +++ b/src/core/NEON/kernels/arm_gemm/merges/list-sve.hpp @@ -0,0 +1,28 @@ +/* + * Copyright (c) 2021 Arm Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ + +#include "sve_merge_fp16_3VLx8.hpp" +#include "sve_merge_fp32_3VLx8.hpp" +#include "sve_merge_s32_3VLx8.hpp" +#include "sve_merge_u32_3VLx8.hpp" \ No newline at end of file diff --git a/src/core/NEON/kernels/arm_gemm/merges/list.hpp b/src/core/NEON/kernels/arm_gemm/merges/list.hpp index 825c2fd020..dae874ef94 100644 --- a/src/core/NEON/kernels/arm_gemm/merges/list.hpp +++ b/src/core/NEON/kernels/arm_gemm/merges/list.hpp @@ -27,8 +27,4 @@ #include "a64_merge_s32_12x8.hpp" #include "a64_merge_s32_4x4.hpp" #include "a64_merge_u32_12x8.hpp" -#include "a64_merge_u32_4x4.hpp" -#include "sve_merge_fp16_3VLx8.hpp" -#include "sve_merge_fp32_3VLx8.hpp" -#include "sve_merge_s32_3VLx8.hpp" -#include "sve_merge_u32_3VLx8.hpp" +#include "a64_merge_u32_4x4.hpp" \ No newline at end of file diff --git a/src/core/NEON/kernels/arm_gemm/merges/sve_merge_fp16_3VLx8.hpp b/src/core/NEON/kernels/arm_gemm/merges/sve_merge_fp16_3VLx8.hpp index cf1d10329b..4da32b459c 100644 --- a/src/core/NEON/kernels/arm_gemm/merges/sve_merge_fp16_3VLx8.hpp +++ b/src/core/NEON/kernels/arm_gemm/merges/sve_merge_fp16_3VLx8.hpp @@ -23,7 +23,7 @@ */ #pragma once -#ifdef __ARM_FEATURE_SVE +#ifdef ARM_COMPUTE_ENABLE_SVE template<> void MergeResults<3, 8, true>(__fp16 *out, const __fp16 *in, const int ldout, const int y0, const int ymax, const int x0, const int xmax, const __fp16 *bias, Activation act, bool append) @@ -1872,4 +1872,4 @@ void MergeResults<3, 8, true>(__fp16 *out, const __fp16 *in, const int ldout, co } } -#endif // __ARM_FEATURE_SVE +#endif // ARM_COMPUTE_ENABLE_SVE diff --git a/src/core/NEON/kernels/arm_gemm/merges/sve_merge_fp32_3VLx8.hpp b/src/core/NEON/kernels/arm_gemm/merges/sve_merge_fp32_3VLx8.hpp index b0d10c085d..5505f1efe4 100644 --- a/src/core/NEON/kernels/arm_gemm/merges/sve_merge_fp32_3VLx8.hpp +++ b/src/core/NEON/kernels/arm_gemm/merges/sve_merge_fp32_3VLx8.hpp @@ -23,7 +23,7 @@ */ #pragma once -#ifdef __ARM_FEATURE_SVE +#ifdef ARM_COMPUTE_ENABLE_SVE template<> void MergeResults<3, 8, true>(float *out, const float *in, const int ldout, const int y0, const int ymax, const int x0, const int xmax, const float *bias, Activation act, bool append) @@ -1872,4 +1872,4 @@ void MergeResults<3, 8, true>(float *out, const float *in, const int ldout, cons } } -#endif // __ARM_FEATURE_SVE +#endif // ARM_COMPUTE_ENABLE_SVE diff --git a/src/core/NEON/kernels/arm_gemm/merges/sve_merge_s32_3VLx8.hpp b/src/core/NEON/kernels/arm_gemm/merges/sve_merge_s32_3VLx8.hpp index 34b6fe3ef5..c009881254 100644 --- a/src/core/NEON/kernels/arm_gemm/merges/sve_merge_s32_3VLx8.hpp +++ b/src/core/NEON/kernels/arm_gemm/merges/sve_merge_s32_3VLx8.hpp @@ -23,7 +23,7 @@ */ #pragma once -#ifdef __ARM_FEATURE_SVE +#ifdef ARM_COMPUTE_ENABLE_SVE template<> void MergeResults<3, 8, true>(int32_t *out, const int32_t *in, const int ldout, const int y0, const int ymax, const int x0, const int xmax, const int32_t *bias, Activation , bool append) @@ -1394,4 +1394,4 @@ void MergeResults<3, 8, true>(int32_t *out, const int32_t *in, const int ldout, } } -#endif // __ARM_FEATURE_SVE +#endif // ARM_COMPUTE_ENABLE_SVE diff --git a/src/core/NEON/kernels/arm_gemm/merges/sve_merge_u32_3VLx8.hpp b/src/core/NEON/kernels/arm_gemm/merges/sve_merge_u32_3VLx8.hpp index c4b2bb56d6..e992f6722c 100644 --- a/src/core/NEON/kernels/arm_gemm/merges/sve_merge_u32_3VLx8.hpp +++ b/src/core/NEON/kernels/arm_gemm/merges/sve_merge_u32_3VLx8.hpp @@ -23,7 +23,7 @@ */ #pragma once -#ifdef __ARM_FEATURE_SVE +#ifdef ARM_COMPUTE_ENABLE_SVE template<> void MergeResults<3, 8, true>(uint32_t *out, const uint32_t *in, const int ldout, const int y0, const int ymax, const int x0, const int xmax, const uint32_t *bias, Activation , bool append) @@ -1394,4 +1394,4 @@ void MergeResults<3, 8, true>(uint32_t *out, const uint32_t *in, const int ldout } } -#endif // __ARM_FEATURE_SVE +#endif // ARM_COMPUTE_ENABLE_SVE diff --git a/src/core/NEON/kernels/arm_gemm/utils.hpp b/src/core/NEON/kernels/arm_gemm/utils.hpp index 1269ef62a6..e648ce2fb5 100644 --- a/src/core/NEON/kernels/arm_gemm/utils.hpp +++ b/src/core/NEON/kernels/arm_gemm/utils.hpp @@ -141,52 +141,36 @@ struct IndirectInputArg { }; namespace utils { -namespace { - -#ifdef __ARM_FEATURE_SVE -template -inline unsigned long get_vector_length_sz() { - unsigned long v; - - __asm ( - "cntb %0" - : "=r" (v) - ); - - return v / sz; -} - -#define VEC_LEN_SPEC(sz, opcode) template <> inline unsigned long get_vector_length_sz() { unsigned long v; __asm ( opcode " %0" : "=r" (v)); return v; } - -VEC_LEN_SPEC(8, "cntd") -VEC_LEN_SPEC(4, "cntw") -VEC_LEN_SPEC(2, "cnth") -VEC_LEN_SPEC(1, "cntb") -#endif - -} // anonymous namespace - template inline unsigned long get_vector_length() { -#ifdef __ARM_FEATURE_SVE - return get_vector_length_sz(); -#else +#if defined(ARM_COMPUTE_ENABLE_SVE) + uint64_t vl; + + __asm __volatile ( + ".inst 0x0420e3e0\n" // CNTB X0, ALL, MUL #1 + "mov %0, X0\n" + : "=r" (vl) + : + : "x0" + ); + + return vl / sizeof(T); +#else // !defined(ARM_COMPUTE_ENABLE_SVE) return 16 / sizeof(T); -#endif +#endif // defined(ARM_COMPUTE_ENABLE_SVE) } template inline unsigned long get_vector_length(VLType vl_type) { switch (vl_type) { -#ifdef __ARM_FEATURE_SVE +#if defined(ARM_COMPUTE_ENABLE_SVE) case VLType::SVE: - return get_vector_length_sz(); -#endif + return get_vector_length(); +#endif // defined(ARM_COMPUTE_ENABLE_SVE) default: return 16 / sizeof(T); } } - } // utils namespace } // arm_gemm namespace diff --git a/src/core/NEON/kernels/batchnormalization/impl/SVE/fp16.cpp b/src/core/NEON/kernels/batchnormalization/impl/SVE/fp16.cpp index a715b9d3ee..c7cfd7457d 100644 --- a/src/core/NEON/kernels/batchnormalization/impl/SVE/fp16.cpp +++ b/src/core/NEON/kernels/batchnormalization/impl/SVE/fp16.cpp @@ -29,7 +29,7 @@ #include #include -#if defined(ENABLE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) #include namespace arm_compute diff --git a/src/core/NEON/kernels/batchnormalization/impl/SVE/fp32.cpp b/src/core/NEON/kernels/batchnormalization/impl/SVE/fp32.cpp index 7cc570d8aa..b8a540158b 100644 --- a/src/core/NEON/kernels/batchnormalization/impl/SVE/fp32.cpp +++ b/src/core/NEON/kernels/batchnormalization/impl/SVE/fp32.cpp @@ -29,7 +29,7 @@ #include #include -#if defined(ENABLE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) #include namespace arm_compute diff --git a/src/core/NEON/wrapper/svtraits.h b/src/core/NEON/wrapper/svtraits.h index 8d2d660659..1d599a246c 100644 --- a/src/core/NEON/wrapper/svtraits.h +++ b/src/core/NEON/wrapper/svtraits.h @@ -23,7 +23,7 @@ */ #ifndef SRC_CORE_NEON_WRAPPER_SVTRAITS_H #define SRC_CORE_NEON_WRAPPER_SVTRAITS_H -#if defined(ENABLE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) #include "src/core/NEON/SVEMath.h" #include @@ -66,5 +66,5 @@ DEFINE_TYPES(bfloat16_t) } // namespace wrapper } // namespace arm_compute -#endif /* defined(ENABLE_SVE) */ +#endif /* defined(ARM_COMPUTE_ENABLE_SVE) */ #endif /* #ifndef SRC_CORE_NEON_WRAPPER_SVTRAITS_H */ diff --git a/src/core/NEON/wrapper/traits.h b/src/core/NEON/wrapper/traits.h index 81685140f1..ebb64d9d76 100644 --- a/src/core/NEON/wrapper/traits.h +++ b/src/core/NEON/wrapper/traits.h @@ -26,9 +26,9 @@ #include -#if defined(ENABLE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) #include -#endif /* defined(ENABLE_SVE) */ +#endif /* defined(ARM_COMPUTE_ENABLE_SVE) */ namespace arm_compute { @@ -116,13 +116,13 @@ template <> struct neon_bitvector{ using type = float #endif // __ARM_FEATURE_FP16_VECTOR_ARITHMETIC -#if defined(ENABLE_SVE) +#if defined(ARM_COMPUTE_ENABLE_SVE) /** Create the appropriate SVE vector given its type */ template struct sve_vector; template <> struct sve_vector{ using scalar_type = uint8_t; using type = svuint8_t; }; template <> struct sve_vector{ using scalar_type = int8_t; using type = svint8_t; }; -#endif /* defined(ENABLE_SVE) */ +#endif /* defined(ARM_COMPUTE_ENABLE_SVE) */ #endif /* DOXYGEN_SKIP_THIS */ -- cgit v1.2.1