From 0fa92b849fd4892a341a3cda5e2ff9092093f841 Mon Sep 17 00:00:00 2001 From: David Mansell Date: Tue, 17 Oct 2023 13:33:24 +0100 Subject: arm_gemm: Add SME2 FP16 GEMV using FP16->FP32 dot product. Signed-off-by: David Mansell Change-Id: If02f7809f9b6e84979121698c5e7a62cbb41e2c3 Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/10487 Benchmark: Arm Jenkins Tested-by: Arm Jenkins Reviewed-by: Viet-Hoa Do Comments-Addressed: Arm Jenkins --- src/core/NEON/kernels/arm_gemm/gemm_fp16.cpp | 9 + .../kernels/sme2_gemv_fp16fp32fp16_dot_16VL.hpp | 85 +++ .../sme2_gemv_fp16fp32fp16_dot_16VL/generic.cpp | 592 +++++++++++++++++++++ .../sme_transpose_interleave_16VL_2x2.hpp | 157 +++--- 4 files changed, 771 insertions(+), 72 deletions(-) create mode 100644 src/core/NEON/kernels/arm_gemm/kernels/sme2_gemv_fp16fp32fp16_dot_16VL.hpp create mode 100644 src/core/NEON/kernels/arm_gemm/kernels/sme2_gemv_fp16fp32fp16_dot_16VL/generic.cpp (limited to 'src/core/NEON/kernels') diff --git a/src/core/NEON/kernels/arm_gemm/gemm_fp16.cpp b/src/core/NEON/kernels/arm_gemm/gemm_fp16.cpp index efdaeeb170..3b444ae333 100644 --- a/src/core/NEON/kernels/arm_gemm/gemm_fp16.cpp +++ b/src/core/NEON/kernels/arm_gemm/gemm_fp16.cpp @@ -32,6 +32,7 @@ #include "gemm_hybrid_indirect.hpp" #include "gemm_implementation.hpp" #include "gemm_interleaved.hpp" +#include "gemv_pretransposed.hpp" #include "kernels/a32_sgemm_8x6.hpp" #ifdef ARM_COMPUTE_ENABLE_FIXED_FORMAT_KERNELS @@ -42,6 +43,7 @@ #include "kernels/a64_hybrid_fp16_mla_6x32.hpp" #include "kernels/a64_sgemm_8x12.hpp" #ifdef ARM_COMPUTE_ENABLE_SME2 +#include "kernels/sme2_gemv_fp16fp32fp16_dot_16VL.hpp" #include "kernels/sme2_interleaved_nomerge_fp16fp32fp16_mopa_1VLx4VL.hpp" #include "kernels/sme2_interleaved_nomerge_fp16fp32fp16_mopa_2VLx2VL.hpp" #include "kernels/sme2_interleaved_nomerge_fp16fp32fp16_mopa_4VLx1VL.hpp" @@ -58,6 +60,13 @@ namespace arm_gemm { static const GemmImplementation<__fp16, __fp16> gemm_fp16_methods[] = { #ifdef ARM_COMPUTE_ENABLE_SVE #ifdef ARM_COMPUTE_ENABLE_SME2 +{ + GemmMethod::GEMM_HYBRID, + "sme2_gemv_fp16fp32fp16_dot_16VL", + [](const GemmArgs &args) { return args._ci->has_sme2() && args._Msize==1 && args._nbatches==1 && !args._indirect_input; }, + nullptr, + [](const GemmArgs &args) { return new GemvPretransposed(args); } +}, { GemmMethod::GEMM_INTERLEAVED, "sme2_interleaved_nomerge_fp16fp32fp16_mopa_4VLx1VL", diff --git a/src/core/NEON/kernels/arm_gemm/kernels/sme2_gemv_fp16fp32fp16_dot_16VL.hpp b/src/core/NEON/kernels/arm_gemm/kernels/sme2_gemv_fp16fp32fp16_dot_16VL.hpp new file mode 100644 index 0000000000..50013e581c --- /dev/null +++ b/src/core/NEON/kernels/arm_gemm/kernels/sme2_gemv_fp16fp32fp16_dot_16VL.hpp @@ -0,0 +1,85 @@ +/* + * Copyright (c) 2023 Arm Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#pragma once +#if defined(ARM_COMPUTE_ENABLE_SME2) +#include "../std_transforms_sme.hpp" + +#define ARGLIST \ + const __fp16 *, const __fp16 *, \ + __fp16 *, size_t, size_t, \ + const __fp16 *, Activation, bool + +namespace arm_gemm +{ +void sme2_gemv_fp16fp32fp16_dot_16VL( ARGLIST ); + +class cls_sme2_gemv_fp16fp32fp16_dot_16VL +{ +public: + typedef __fp16 operand_type; + typedef __fp16 result_type; + + typedef void (*kern_type)( ARGLIST ); + + static unsigned int out_width() + { + return sme::get_vector_length() * 16; + } + + static constexpr unsigned int k_unroll() + { + return 2; + } + + static constexpr bool supports_accumulate() + { + return false; + } + + static constexpr bool supports_bias() + { + return true; + } + + static constexpr bool supports_activation() + { + return true; + } + + + StdTransformsSME transforms = {}; + + + // Default to the generic kernel + kern_type kernel=sme2_gemv_fp16fp32fp16_dot_16VL; + cls_sme2_gemv_fp16fp32fp16_dot_16VL(const CPUInfo *) + { + } +}; + +} // namespace arm_gemm + +#undef ARGLIST + +#endif // defined(ARM_COMPUTE_ENABLE_SME2) diff --git a/src/core/NEON/kernels/arm_gemm/kernels/sme2_gemv_fp16fp32fp16_dot_16VL/generic.cpp b/src/core/NEON/kernels/arm_gemm/kernels/sme2_gemv_fp16fp32fp16_dot_16VL/generic.cpp new file mode 100644 index 0000000000..1067a8548a --- /dev/null +++ b/src/core/NEON/kernels/arm_gemm/kernels/sme2_gemv_fp16fp32fp16_dot_16VL/generic.cpp @@ -0,0 +1,592 @@ +/* + * Copyright (c) 2023 Arm Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ + +#if defined(ARM_COMPUTE_ENABLE_SME2) + +#include "arm_gemm.hpp" +#include "../../utils.hpp" + +#include +#include + +namespace arm_gemm { + +void sme2_gemv_fp16fp32fp16_dot_16VL ( + const __fp16 *A_ptr, const __fp16 *B_ptr, __fp16 *output_ptr, + size_t N, size_t K, + const __fp16 *bias, Activation act, bool +) +{ + struct KernelArgs { + __fp16 maxval = static_cast<__fp16>(std::numeric_limits::infinity()); + __fp16 minval = - static_cast<__fp16>(std::numeric_limits::infinity()); + const __fp16 *B_ptr = {}; + size_t output_offset = {}; + unsigned int input_initial_col = {}; + } ka; + + unsigned long flags=0; + ka.B_ptr = B_ptr; + switch(act.type) { + default: + case Activation::Type::None: + break; + case Activation::Type::BoundedReLU: + ka.maxval = static_cast<__fp16>(act.param1); + /* fall through */ + case Activation::Type::ReLU: + ka.minval = 0; + flags |= 0x2; + break; + } + __asm__ __volatile__( + "ptrue p8.b\n" + ".inst 0xd503477f // SMSTART ZA\n" + "mov x9, #0x0\n" + "cntw x28, ALL, MUL #4\n" + "mov x27, %x[B_ptr]\n" + "add x26, %x[N], x28\n" + "mov x25, %x[output_ptr]\n" + "sub x26, x26, #0x1\n" + "ptrue p1.b\n" + "udiv x26, x26, x28\n" + ".inst 0x25207811 // ptrue pn9.b\n" + "add x22, x26, #0x3\n" + "mov x21, #0x1\n" + "and x22, x22, #0xfffffffffffffffc\n" + "mul x22, x22, x28\n" + "mul x22, x22, %x[K]\n" + "lsl x22, x22, #0x1\n" + "1:" // RHS size check loop + "cmp x22, #0x200000\n" + "blt 2f\n" + "tbnz x22, #0, 3f\n" + "lsr x22, x22, #0x1\n" + "lsl x21, x21, #0x1\n" + "b 1b\n" + "2:" // RHS do prefetch + "lsl x20, x22, #0x26\n" + "sub x21, x21, #0x1\n" + "lsl x21, x21, #0x16\n" + "orr x22, x22, x20\n" + "orr x22, x22, x21\n" + ".inst 0xf8b64b7a // rprfm pldonce, x22, [x27]\n" + "3:" // RHS prefetch exit + "mov x24, %x[bias]\n" + "4:" // Column loop + "cmp x26, #0x4\n" + "bge 28f\n" + "cmp x26, #0x2\n" + "bgt 20f\n" + "beq 12f\n" + "mov x23, %x[A_ptr]\n" + "lsl x21, %x[K], #0x1\n" + "mov x20, %x[N]\n" + "mov x22, %x[K]\n" + ".inst 0xf8b54af8 // rprfm pldmany, x21, [x23]\n" + ".inst 0x257467f0 // whilelt p8.h, XZR, x20, VLx4\n" + "cbz x24, 5f\n" + ".inst 0xa040c700 // ld1w { z0.s-z3.s }, pn9.b/Z, [x24]\n" + ".inst 0xc0042c00 // mova za.d[x9, #0], { z0.d-z3.d }\n" + "b 6f\n" + "5:" // Width 1: no bias + ".inst 0xc00800ff // zero { zad0, zad1, zad2, zad3, zad4, zad5, zad6, zad7 }\n" + "6:" // Width 1: setup done + "cmp x22, #0x8\n" + "ble 8f\n" + "7:" // Width 1: Multiply loop: Main loop head + "whilelt p0.h, XZR, x22\n" + ".inst 0xa040a779 // ldnt1h { z24.h-z27.h }, pn9.b/Z, [x27]\n" + "addvl x27, x27, #16\n" + "ld1rqh { z14.h }, p0/Z, [x23]\n" + "sub x22, x22, #0x8\n" + "add x23, x23, #0x10\n" + ".inst 0xa040a771 // ldnt1h { z16.h-z19.h }, pn9.b/Z, [x27]\n" + "addvl x27, x27, #16\n" + "cmp x22, #0x8\n" + ".inst 0xa040a761 // ldnt1h { z0.h-z3.h }, pn9.b/Z, [x27]\n" + "addvl x27, x27, #16\n" + ".inst 0xc15eb308 // fdot za.s[x9, 0], { z24.h-z27.h }, z14.h[0]\n" + ".inst 0xa040a77d // ldnt1h { z28.h-z31.h }, pn9.b/Z, [x27]\n" + "addvl x27, x27, #16\n" + ".inst 0xc15eb608 // fdot za.s[x9, 0], { z16.h-z19.h }, z14.h[1]\n" + ".inst 0xc15eb808 // fdot za.s[x9, 0], { z0.h-z3.h }, z14.h[2]\n" + ".inst 0xc15ebf88 // fdot za.s[x9, 0], { z28.h-z31.h }, z14.h[3]\n" + "bgt 7b\n" + "8:" // Width 1: Multiply loop: Single iteration only + "whilelt p0.h, XZR, x22\n" + ".inst 0xa040a77d // ldnt1h { z28.h-z31.h }, pn9.b/Z, [x27]\n" + "subs x22, x22, #0x2\n" + "ld1rqh { z7.h }, p0/Z, [x23]\n" + "add x23, x23, #0x10\n" + "addvl x27, x27, #16\n" + ".inst 0xc157b388 // fdot za.s[x9, 0], { z28.h-z31.h }, z7.h[0]\n" + "ble 9f\n" + ".inst 0xa040a769 // ldnt1h { z8.h-z11.h }, pn9.b/Z, [x27]\n" + "subs x22, x22, #0x2\n" + "addvl x27, x27, #16\n" + ".inst 0xc157b508 // fdot za.s[x9, 0], { z8.h-z11.h }, z7.h[1]\n" + "ble 9f\n" + ".inst 0xa040a76d // ldnt1h { z12.h-z15.h }, pn9.b/Z, [x27]\n" + "subs x22, x22, #0x2\n" + "addvl x27, x27, #16\n" + ".inst 0xc157b988 // fdot za.s[x9, 0], { z12.h-z15.h }, z7.h[2]\n" + "ble 9f\n" + ".inst 0xa040a769 // ldnt1h { z8.h-z11.h }, pn9.b/Z, [x27]\n" + "addvl x27, x27, #16\n" + ".inst 0xc157bd08 // fdot za.s[x9, 0], { z8.h-z11.h }, z7.h[3]\n" + "9:" // Width 1: Multiply loop: multiply skip + "tbz %x[flags], #1, 10f\n" + ".inst 0xc0062c10 // mova { z16.d-z19.d }, za.d[x9, #0]\n" + "add x21, %x[args_ptr], %[offset_min]\n" + "add x20, %x[args_ptr], %[offset_max]\n" + "ld1rh { z2.h }, p1/Z, [x21]\n" + "ld1rh { z1.h }, p1/Z, [x20]\n" + ".inst 0xc120e210 // fcvt z16.h, { z16.s-z17.s }\n" + ".inst 0xc120e251 // fcvt z17.h, { z18.s-z19.s }\n" + ".inst 0xc161c050 // fclamp { z16.h-z17.h }, z2.h, z1.h\n" + ".inst 0xa0602330 // st1h { z16.h-z17.h }, p8, [x25]\n" + "addvl x25, x25, #2\n" + "b 11f\n" + "10:" // Width 1: No activation + ".inst 0xc0062c04 // mova { z4.d-z7.d }, za.d[x9, #0]\n" + ".inst 0xc120e09e // fcvt z30.h, { z4.s-z5.s }\n" + ".inst 0xc120e0df // fcvt z31.h, { z6.s-z7.s }\n" + ".inst 0xa060233e // st1h { z30.h-z31.h }, p8, [x25]\n" + "addvl x25, x25, #2\n" + "11:" // Width 1: Output done + "b 36f\n" + "12:" // Width 2 + "mov x23, %x[A_ptr]\n" + "lsl x21, %x[K], #0x1\n" + "sub x20, %x[N], x28\n" + "mov x22, %x[K]\n" + ".inst 0xf8b54af8 // rprfm pldmany, x21, [x23]\n" + ".inst 0x257467f0 // whilelt p8.h, XZR, x20, VLx4\n" + "cbz x24, 13f\n" + ".inst 0xa040c71c // ld1w { z28.s-z31.s }, pn9.b/Z, [x24]\n" + ".inst 0xa041c700 // ld1w { z0.s-z3.s }, pn9.b/Z, [x24, #0x4, MUL VL]\n" + ".inst 0xc0042f80 // mova za.d[x9, #0], { z28.d-z31.d }\n" + ".inst 0xc0042c01 // mova za.d[x9, #1], { z0.d-z3.d }\n" + "b 14f\n" + "13:" // Width 2: no bias + ".inst 0xc00800ff // zero { zad0, zad1, zad2, zad3, zad4, zad5, zad6, zad7 }\n" + "14:" // Width 2: setup done + "cmp x22, #0x8\n" + "ble 16f\n" + "15:" // Width 2: Multiply loop: Main loop head + "whilelt p0.h, XZR, x22\n" + ".inst 0xa040a779 // ldnt1h { z24.h-z27.h }, pn9.b/Z, [x27]\n" + "sub x22, x22, #0x8\n" + "ld1rqh { z1.h }, p0/Z, [x23]\n" + "cmp x22, #0x8\n" + "add x23, x23, #0x10\n" + ".inst 0xa041a775 // ldnt1h { z20.h-z23.h }, pn9.b/Z, [x27, #0x4, MUL VL]\n" + "addvl x27, x27, #16\n" + ".inst 0xa040a765 // ldnt1h { z4.h-z7.h }, pn9.b/Z, [x27]\n" + ".inst 0xc151b308 // fdot za.s[x9, 0], { z24.h-z27.h }, z1.h[0]\n" + ".inst 0xa041a76d // ldnt1h { z12.h-z15.h }, pn9.b/Z, [x27, #0x4, MUL VL]\n" + "addvl x27, x27, #16\n" + ".inst 0xc151b289 // fdot za.s[x9, 1], { z20.h-z23.h }, z1.h[0]\n" + ".inst 0xa040a77d // ldnt1h { z28.h-z31.h }, pn9.b/Z, [x27]\n" + ".inst 0xa041a769 // ldnt1h { z8.h-z11.h }, pn9.b/Z, [x27, #0x4, MUL VL]\n" + "addvl x27, x27, #16\n" + ".inst 0xc151b488 // fdot za.s[x9, 0], { z4.h-z7.h }, z1.h[1]\n" + ".inst 0xa040a765 // ldnt1h { z4.h-z7.h }, pn9.b/Z, [x27]\n" + ".inst 0xc151b589 // fdot za.s[x9, 1], { z12.h-z15.h }, z1.h[1]\n" + ".inst 0xa041a76d // ldnt1h { z12.h-z15.h }, pn9.b/Z, [x27, #0x4, MUL VL]\n" + "addvl x27, x27, #16\n" + ".inst 0xc151bb88 // fdot za.s[x9, 0], { z28.h-z31.h }, z1.h[2]\n" + ".inst 0xc151b909 // fdot za.s[x9, 1], { z8.h-z11.h }, z1.h[2]\n" + ".inst 0xc151bc88 // fdot za.s[x9, 0], { z4.h-z7.h }, z1.h[3]\n" + ".inst 0xc151bd89 // fdot za.s[x9, 1], { z12.h-z15.h }, z1.h[3]\n" + "bgt 15b\n" + "16:" // Width 2: Multiply loop: Single iteration only + "whilelt p0.h, XZR, x22\n" + ".inst 0xa040a769 // ldnt1h { z8.h-z11.h }, pn9.b/Z, [x27]\n" + "subs x22, x22, #0x2\n" + "ld1rqh { z7.h }, p0/Z, [x23]\n" + "add x23, x23, #0x10\n" + ".inst 0xa041a779 // ldnt1h { z24.h-z27.h }, pn9.b/Z, [x27, #0x4, MUL VL]\n" + "addvl x27, x27, #16\n" + ".inst 0xc157b108 // fdot za.s[x9, 0], { z8.h-z11.h }, z7.h[0]\n" + ".inst 0xc157b309 // fdot za.s[x9, 1], { z24.h-z27.h }, z7.h[0]\n" + "ble 17f\n" + ".inst 0xa040a779 // ldnt1h { z24.h-z27.h }, pn9.b/Z, [x27]\n" + "subs x22, x22, #0x2\n" + ".inst 0xa041a775 // ldnt1h { z20.h-z23.h }, pn9.b/Z, [x27, #0x4, MUL VL]\n" + "addvl x27, x27, #16\n" + ".inst 0xc157b708 // fdot za.s[x9, 0], { z24.h-z27.h }, z7.h[1]\n" + ".inst 0xc157b689 // fdot za.s[x9, 1], { z20.h-z23.h }, z7.h[1]\n" + "ble 17f\n" + ".inst 0xa040a761 // ldnt1h { z0.h-z3.h }, pn9.b/Z, [x27]\n" + "subs x22, x22, #0x2\n" + ".inst 0xa041a771 // ldnt1h { z16.h-z19.h }, pn9.b/Z, [x27, #0x4, MUL VL]\n" + "addvl x27, x27, #16\n" + ".inst 0xc157b808 // fdot za.s[x9, 0], { z0.h-z3.h }, z7.h[2]\n" + ".inst 0xc157ba09 // fdot za.s[x9, 1], { z16.h-z19.h }, z7.h[2]\n" + "ble 17f\n" + ".inst 0xa040a76d // ldnt1h { z12.h-z15.h }, pn9.b/Z, [x27]\n" + ".inst 0xa041a77d // ldnt1h { z28.h-z31.h }, pn9.b/Z, [x27, #0x4, MUL VL]\n" + "addvl x27, x27, #16\n" + ".inst 0xc157bd88 // fdot za.s[x9, 0], { z12.h-z15.h }, z7.h[3]\n" + ".inst 0xc157bf89 // fdot za.s[x9, 1], { z28.h-z31.h }, z7.h[3]\n" + "17:" // Width 2: Multiply loop: multiply skip + "tbz %x[flags], #1, 18f\n" + ".inst 0xc0062c1c // mova { z28.d-z31.d }, za.d[x9, #0]\n" + "add x21, %x[args_ptr], %[offset_min]\n" + "add x20, %x[args_ptr], %[offset_max]\n" + ".inst 0xc0062c30 // mova { z16.d-z19.d }, za.d[x9, #1]\n" + "ld1rh { z13.h }, p1/Z, [x21]\n" + "ld1rh { z0.h }, p1/Z, [x20]\n" + ".inst 0xc120e38e // fcvt z14.h, { z28.s-z29.s }\n" + ".inst 0xc120e3cf // fcvt z15.h, { z30.s-z31.s }\n" + ".inst 0xc120e218 // fcvt z24.h, { z16.s-z17.s }\n" + ".inst 0xc120e259 // fcvt z25.h, { z18.s-z19.s }\n" + ".inst 0xc160c1ae // fclamp { z14.h-z15.h }, z13.h, z0.h\n" + ".inst 0xc160c1b8 // fclamp { z24.h-z25.h }, z13.h, z0.h\n" + ".inst 0xa060272e // st1h { z14.h-z15.h }, pn9.b, [x25]\n" + ".inst 0xa0612338 // st1h { z24.h-z25.h }, p8, [x25, #0x2, MUL VL]\n" + "addvl x25, x25, #4\n" + "b 19f\n" + "18:" // Width 2: No activation + ".inst 0xc0062c10 // mova { z16.d-z19.d }, za.d[x9, #0]\n" + ".inst 0xc0062c38 // mova { z24.d-z27.d }, za.d[x9, #1]\n" + ".inst 0xc120e205 // fcvt z5.h, { z16.s-z17.s }\n" + ".inst 0xc120e24d // fcvt z13.h, { z18.s-z19.s }\n" + ".inst 0xa1602725 // st1h { z5.h, z13.h }, pn9.b, [x25]\n" + ".inst 0xc120e316 // fcvt z22.h, { z24.s-z25.s }\n" + ".inst 0xc120e35e // fcvt z30.h, { z26.s-z27.s }\n" + ".inst 0xa1612336 // st1h { z22.h, z30.h }, p8, [x25, #0x2, MUL VL]\n" + "addvl x25, x25, #4\n" + "19:" // Width 2: Output done + "b 36f\n" + "20:" // Width 3 + "mov x20, #0x2\n" + "mov x23, %x[A_ptr]\n" + "lsl x21, %x[K], #0x1\n" + "msub x20, x28, x20, %x[N]\n" + "mov x22, %x[K]\n" + ".inst 0xf8b54af8 // rprfm pldmany, x21, [x23]\n" + ".inst 0x257467f0 // whilelt p8.h, XZR, x20, VLx4\n" + "cbz x24, 21f\n" + ".inst 0xa040c718 // ld1w { z24.s-z27.s }, pn9.b/Z, [x24]\n" + ".inst 0xa041c70c // ld1w { z12.s-z15.s }, pn9.b/Z, [x24, #0x4, MUL VL]\n" + ".inst 0xa042c708 // ld1w { z8.s-z11.s }, pn9.b/Z, [x24, #0x8, MUL VL]\n" + ".inst 0xc0042f00 // mova za.d[x9, #0], { z24.d-z27.d }\n" + ".inst 0xc0042d81 // mova za.d[x9, #1], { z12.d-z15.d }\n" + ".inst 0xc0042d02 // mova za.d[x9, #2], { z8.d-z11.d }\n" + "b 22f\n" + "21:" // Width 3: no bias + ".inst 0xc00800ff // zero { zad0, zad1, zad2, zad3, zad4, zad5, zad6, zad7 }\n" + "22:" // Width 3: setup done + "cmp x22, #0x8\n" + "ble 24f\n" + "23:" // Width 3: Multiply loop: Main loop head + "whilelt p0.h, XZR, x22\n" + ".inst 0xa040a76d // ldnt1h { z12.h-z15.h }, pn9.b/Z, [x27]\n" + "sub x22, x22, #0x8\n" + "ld1rqh { z7.h }, p0/Z, [x23]\n" + "cmp x22, #0x8\n" + "add x23, x23, #0x10\n" + ".inst 0xa041a779 // ldnt1h { z24.h-z27.h }, pn9.b/Z, [x27, #0x4, MUL VL]\n" + ".inst 0xa042a77d // ldnt1h { z28.h-z31.h }, pn9.b/Z, [x27, #0x8, MUL VL]\n" + "addvl x27, x27, #16\n" + ".inst 0xc157b188 // fdot za.s[x9, 0], { z12.h-z15.h }, z7.h[0]\n" + ".inst 0xa040a761 // ldnt1h { z0.h-z3.h }, pn9.b/Z, [x27]\n" + ".inst 0xc157b309 // fdot za.s[x9, 1], { z24.h-z27.h }, z7.h[0]\n" + ".inst 0xa041a771 // ldnt1h { z16.h-z19.h }, pn9.b/Z, [x27, #0x4, MUL VL]\n" + ".inst 0xc157b38a // fdot za.s[x9, 2], { z28.h-z31.h }, z7.h[0]\n" + ".inst 0xa042a76d // ldnt1h { z12.h-z15.h }, pn9.b/Z, [x27, #0x8, MUL VL]\n" + "addvl x27, x27, #16\n" + ".inst 0xc157b408 // fdot za.s[x9, 0], { z0.h-z3.h }, z7.h[1]\n" + ".inst 0xa040a77d // ldnt1h { z28.h-z31.h }, pn9.b/Z, [x27]\n" + ".inst 0xc157b609 // fdot za.s[x9, 1], { z16.h-z19.h }, z7.h[1]\n" + ".inst 0xa041a769 // ldnt1h { z8.h-z11.h }, pn9.b/Z, [x27, #0x4, MUL VL]\n" + ".inst 0xc157b58a // fdot za.s[x9, 2], { z12.h-z15.h }, z7.h[1]\n" + ".inst 0xa042a761 // ldnt1h { z0.h-z3.h }, pn9.b/Z, [x27, #0x8, MUL VL]\n" + "addvl x27, x27, #16\n" + ".inst 0xc157bb88 // fdot za.s[x9, 0], { z28.h-z31.h }, z7.h[2]\n" + ".inst 0xa040a76d // ldnt1h { z12.h-z15.h }, pn9.b/Z, [x27]\n" + ".inst 0xc157b909 // fdot za.s[x9, 1], { z8.h-z11.h }, z7.h[2]\n" + ".inst 0xa041a771 // ldnt1h { z16.h-z19.h }, pn9.b/Z, [x27, #0x4, MUL VL]\n" + ".inst 0xc157b80a // fdot za.s[x9, 2], { z0.h-z3.h }, z7.h[2]\n" + ".inst 0xa042a775 // ldnt1h { z20.h-z23.h }, pn9.b/Z, [x27, #0x8, MUL VL]\n" + "addvl x27, x27, #16\n" + ".inst 0xc157bd88 // fdot za.s[x9, 0], { z12.h-z15.h }, z7.h[3]\n" + ".inst 0xc157be09 // fdot za.s[x9, 1], { z16.h-z19.h }, z7.h[3]\n" + ".inst 0xc157be8a // fdot za.s[x9, 2], { z20.h-z23.h }, z7.h[3]\n" + "bgt 23b\n" + "24:" // Width 3: Multiply loop: Single iteration only + "whilelt p0.h, XZR, x22\n" + ".inst 0xa040a76d // ldnt1h { z12.h-z15.h }, pn9.b/Z, [x27]\n" + "subs x22, x22, #0x2\n" + "ld1rqh { z7.h }, p0/Z, [x23]\n" + "add x23, x23, #0x10\n" + ".inst 0xa041a771 // ldnt1h { z16.h-z19.h }, pn9.b/Z, [x27, #0x4, MUL VL]\n" + ".inst 0xa042a769 // ldnt1h { z8.h-z11.h }, pn9.b/Z, [x27, #0x8, MUL VL]\n" + "addvl x27, x27, #16\n" + ".inst 0xc157b188 // fdot za.s[x9, 0], { z12.h-z15.h }, z7.h[0]\n" + ".inst 0xc157b209 // fdot za.s[x9, 1], { z16.h-z19.h }, z7.h[0]\n" + ".inst 0xc157b10a // fdot za.s[x9, 2], { z8.h-z11.h }, z7.h[0]\n" + "ble 25f\n" + ".inst 0xa040a771 // ldnt1h { z16.h-z19.h }, pn9.b/Z, [x27]\n" + "subs x22, x22, #0x2\n" + ".inst 0xa041a761 // ldnt1h { z0.h-z3.h }, pn9.b/Z, [x27, #0x4, MUL VL]\n" + ".inst 0xa042a775 // ldnt1h { z20.h-z23.h }, pn9.b/Z, [x27, #0x8, MUL VL]\n" + "addvl x27, x27, #16\n" + ".inst 0xc157b608 // fdot za.s[x9, 0], { z16.h-z19.h }, z7.h[1]\n" + ".inst 0xc157b409 // fdot za.s[x9, 1], { z0.h-z3.h }, z7.h[1]\n" + ".inst 0xc157b68a // fdot za.s[x9, 2], { z20.h-z23.h }, z7.h[1]\n" + "ble 25f\n" + ".inst 0xa040a779 // ldnt1h { z24.h-z27.h }, pn9.b/Z, [x27]\n" + "subs x22, x22, #0x2\n" + ".inst 0xa041a775 // ldnt1h { z20.h-z23.h }, pn9.b/Z, [x27, #0x4, MUL VL]\n" + ".inst 0xa042a769 // ldnt1h { z8.h-z11.h }, pn9.b/Z, [x27, #0x8, MUL VL]\n" + "addvl x27, x27, #16\n" + ".inst 0xc157bb08 // fdot za.s[x9, 0], { z24.h-z27.h }, z7.h[2]\n" + ".inst 0xc157ba89 // fdot za.s[x9, 1], { z20.h-z23.h }, z7.h[2]\n" + ".inst 0xc157b90a // fdot za.s[x9, 2], { z8.h-z11.h }, z7.h[2]\n" + "ble 25f\n" + ".inst 0xa040a761 // ldnt1h { z0.h-z3.h }, pn9.b/Z, [x27]\n" + ".inst 0xa041a77d // ldnt1h { z28.h-z31.h }, pn9.b/Z, [x27, #0x4, MUL VL]\n" + ".inst 0xa042a76d // ldnt1h { z12.h-z15.h }, pn9.b/Z, [x27, #0x8, MUL VL]\n" + "addvl x27, x27, #16\n" + ".inst 0xc157bc08 // fdot za.s[x9, 0], { z0.h-z3.h }, z7.h[3]\n" + ".inst 0xc157bf89 // fdot za.s[x9, 1], { z28.h-z31.h }, z7.h[3]\n" + ".inst 0xc157bd8a // fdot za.s[x9, 2], { z12.h-z15.h }, z7.h[3]\n" + "25:" // Width 3: Multiply loop: multiply skip + "tbz %x[flags], #1, 26f\n" + ".inst 0xc0062c0c // mova { z12.d-z15.d }, za.d[x9, #0]\n" + "add x21, %x[args_ptr], %[offset_min]\n" + "add x20, %x[args_ptr], %[offset_max]\n" + ".inst 0xc0062c24 // mova { z4.d-z7.d }, za.d[x9, #1]\n" + "ld1rh { z17.h }, p1/Z, [x21]\n" + ".inst 0xc0062c40 // mova { z0.d-z3.d }, za.d[x9, #2]\n" + "ld1rh { z16.h }, p1/Z, [x20]\n" + ".inst 0xc120e18c // fcvt z12.h, { z12.s-z13.s }\n" + ".inst 0xc120e1cd // fcvt z13.h, { z14.s-z15.s }\n" + ".inst 0xc120e092 // fcvt z18.h, { z4.s-z5.s }\n" + ".inst 0xc120e0d3 // fcvt z19.h, { z6.s-z7.s }\n" + ".inst 0xc170c22c // fclamp { z12.h-z13.h }, z17.h, z16.h\n" + ".inst 0xc170c232 // fclamp { z18.h-z19.h }, z17.h, z16.h\n" + ".inst 0xc120e00e // fcvt z14.h, { z0.s-z1.s }\n" + ".inst 0xc120e04f // fcvt z15.h, { z2.s-z3.s }\n" + ".inst 0xc170c22e // fclamp { z14.h-z15.h }, z17.h, z16.h\n" + ".inst 0xa060272c // st1h { z12.h-z13.h }, pn9.b, [x25]\n" + ".inst 0xa0612732 // st1h { z18.h-z19.h }, pn9.b, [x25, #0x2, MUL VL]\n" + ".inst 0xa062232e // st1h { z14.h-z15.h }, p8, [x25, #0x4, MUL VL]\n" + "addvl x25, x25, #6\n" + "b 27f\n" + "26:" // Width 3: No activation + ".inst 0xc0062c04 // mova { z4.d-z7.d }, za.d[x9, #0]\n" + ".inst 0xc0062c20 // mova { z0.d-z3.d }, za.d[x9, #1]\n" + ".inst 0xc0062c48 // mova { z8.d-z11.d }, za.d[x9, #2]\n" + ".inst 0xc120e091 // fcvt z17.h, { z4.s-z5.s }\n" + ".inst 0xc120e0d9 // fcvt z25.h, { z6.s-z7.s }\n" + ".inst 0xa1602731 // st1h { z17.h, z25.h }, pn9.b, [x25]\n" + ".inst 0xc120e012 // fcvt z18.h, { z0.s-z1.s }\n" + ".inst 0xc120e053 // fcvt z19.h, { z2.s-z3.s }\n" + ".inst 0xa0612732 // st1h { z18.h-z19.h }, pn9.b, [x25, #0x2, MUL VL]\n" + ".inst 0xc120e111 // fcvt z17.h, { z8.s-z9.s }\n" + ".inst 0xc120e159 // fcvt z25.h, { z10.s-z11.s }\n" + ".inst 0xa1622331 // st1h { z17.h, z25.h }, p8, [x25, #0x4, MUL VL]\n" + "addvl x25, x25, #6\n" + "27:" // Width 3: Output done + "b 36f\n" + "28:" // Width 4 + "mov x20, #0x3\n" + "mov x23, %x[A_ptr]\n" + "lsl x21, %x[K], #0x1\n" + "msub x20, x28, x20, %x[N]\n" + "mov x22, %x[K]\n" + ".inst 0xf8b54af8 // rprfm pldmany, x21, [x23]\n" + ".inst 0x257467f0 // whilelt p8.h, XZR, x20, VLx4\n" + "cbz x24, 29f\n" + ".inst 0xa040c704 // ld1w { z4.s-z7.s }, pn9.b/Z, [x24]\n" + ".inst 0xa041c710 // ld1w { z16.s-z19.s }, pn9.b/Z, [x24, #0x4, MUL VL]\n" + ".inst 0xa042c708 // ld1w { z8.s-z11.s }, pn9.b/Z, [x24, #0x8, MUL VL]\n" + ".inst 0xa043c71c // ld1w { z28.s-z31.s }, pn9.b/Z, [x24, #0xc, MUL VL]\n" + ".inst 0xc0042c80 // mova za.d[x9, #0], { z4.d-z7.d }\n" + "addvl x24, x24, #16\n" + ".inst 0xc0042e01 // mova za.d[x9, #1], { z16.d-z19.d }\n" + ".inst 0xc0042d02 // mova za.d[x9, #2], { z8.d-z11.d }\n" + ".inst 0xc0042f83 // mova za.d[x9, #3], { z28.d-z31.d }\n" + "b 30f\n" + "29:" // Width 4: no bias + ".inst 0xc00800ff // zero { zad0, zad1, zad2, zad3, zad4, zad5, zad6, zad7 }\n" + "30:" // Width 4: setup done + "cmp x22, #0x8\n" + "ble 32f\n" + "31:" // Width 4: Multiply loop: Main loop head + "whilelt p0.h, XZR, x22\n" + ".inst 0xa040a775 // ldnt1h { z20.h-z23.h }, pn9.b/Z, [x27]\n" + "sub x22, x22, #0x8\n" + "ld1rqh { z7.h }, p0/Z, [x23]\n" + "cmp x22, #0x8\n" + "add x23, x23, #0x10\n" + ".inst 0xa041a76d // ldnt1h { z12.h-z15.h }, pn9.b/Z, [x27, #0x4, MUL VL]\n" + ".inst 0xa042a77d // ldnt1h { z28.h-z31.h }, pn9.b/Z, [x27, #0x8, MUL VL]\n" + ".inst 0xa043a769 // ldnt1h { z8.h-z11.h }, pn9.b/Z, [x27, #0xc, MUL VL]\n" + ".inst 0xc157b288 // fdot za.s[x9, 0], { z20.h-z23.h }, z7.h[0]\n" + "addvl x27, x27, #16\n" + ".inst 0xc157b189 // fdot za.s[x9, 1], { z12.h-z15.h }, z7.h[0]\n" + ".inst 0xa040a76d // ldnt1h { z12.h-z15.h }, pn9.b/Z, [x27]\n" + ".inst 0xc157b38a // fdot za.s[x9, 2], { z28.h-z31.h }, z7.h[0]\n" + ".inst 0xa041a761 // ldnt1h { z0.h-z3.h }, pn9.b/Z, [x27, #0x4, MUL VL]\n" + ".inst 0xc157b10b // fdot za.s[x9, 3], { z8.h-z11.h }, z7.h[0]\n" + ".inst 0xa042a769 // ldnt1h { z8.h-z11.h }, pn9.b/Z, [x27, #0x8, MUL VL]\n" + ".inst 0xa043a779 // ldnt1h { z24.h-z27.h }, pn9.b/Z, [x27, #0xc, MUL VL]\n" + ".inst 0xc157b588 // fdot za.s[x9, 0], { z12.h-z15.h }, z7.h[1]\n" + "addvl x27, x27, #16\n" + ".inst 0xc157b409 // fdot za.s[x9, 1], { z0.h-z3.h }, z7.h[1]\n" + ".inst 0xa040a761 // ldnt1h { z0.h-z3.h }, pn9.b/Z, [x27]\n" + ".inst 0xc157b50a // fdot za.s[x9, 2], { z8.h-z11.h }, z7.h[1]\n" + ".inst 0xa041a769 // ldnt1h { z8.h-z11.h }, pn9.b/Z, [x27, #0x4, MUL VL]\n" + ".inst 0xc157b70b // fdot za.s[x9, 3], { z24.h-z27.h }, z7.h[1]\n" + ".inst 0xa042a76d // ldnt1h { z12.h-z15.h }, pn9.b/Z, [x27, #0x8, MUL VL]\n" + ".inst 0xa043a779 // ldnt1h { z24.h-z27.h }, pn9.b/Z, [x27, #0xc, MUL VL]\n" + ".inst 0xc157b808 // fdot za.s[x9, 0], { z0.h-z3.h }, z7.h[2]\n" + "addvl x27, x27, #16\n" + ".inst 0xc157b909 // fdot za.s[x9, 1], { z8.h-z11.h }, z7.h[2]\n" + ".inst 0xa040a77d // ldnt1h { z28.h-z31.h }, pn9.b/Z, [x27]\n" + ".inst 0xc157b98a // fdot za.s[x9, 2], { z12.h-z15.h }, z7.h[2]\n" + ".inst 0xa041a761 // ldnt1h { z0.h-z3.h }, pn9.b/Z, [x27, #0x4, MUL VL]\n" + ".inst 0xc157bb0b // fdot za.s[x9, 3], { z24.h-z27.h }, z7.h[2]\n" + ".inst 0xa042a769 // ldnt1h { z8.h-z11.h }, pn9.b/Z, [x27, #0x8, MUL VL]\n" + ".inst 0xa043a76d // ldnt1h { z12.h-z15.h }, pn9.b/Z, [x27, #0xc, MUL VL]\n" + ".inst 0xc157bf88 // fdot za.s[x9, 0], { z28.h-z31.h }, z7.h[3]\n" + "addvl x27, x27, #16\n" + ".inst 0xc157bc09 // fdot za.s[x9, 1], { z0.h-z3.h }, z7.h[3]\n" + ".inst 0xc157bd0a // fdot za.s[x9, 2], { z8.h-z11.h }, z7.h[3]\n" + ".inst 0xc157bd8b // fdot za.s[x9, 3], { z12.h-z15.h }, z7.h[3]\n" + "bgt 31b\n" + "32:" // Width 4: Multiply loop: Single iteration only + "whilelt p0.h, XZR, x22\n" + ".inst 0xa040a769 // ldnt1h { z8.h-z11.h }, pn9.b/Z, [x27]\n" + "subs x22, x22, #0x2\n" + "ld1rqh { z7.h }, p0/Z, [x23]\n" + "add x23, x23, #0x10\n" + ".inst 0xa041a761 // ldnt1h { z0.h-z3.h }, pn9.b/Z, [x27, #0x4, MUL VL]\n" + ".inst 0xa042a771 // ldnt1h { z16.h-z19.h }, pn9.b/Z, [x27, #0x8, MUL VL]\n" + ".inst 0xa043a76d // ldnt1h { z12.h-z15.h }, pn9.b/Z, [x27, #0xc, MUL VL]\n" + ".inst 0xc157b108 // fdot za.s[x9, 0], { z8.h-z11.h }, z7.h[0]\n" + "addvl x27, x27, #16\n" + ".inst 0xc157b009 // fdot za.s[x9, 1], { z0.h-z3.h }, z7.h[0]\n" + ".inst 0xc157b20a // fdot za.s[x9, 2], { z16.h-z19.h }, z7.h[0]\n" + ".inst 0xc157b18b // fdot za.s[x9, 3], { z12.h-z15.h }, z7.h[0]\n" + "ble 33f\n" + ".inst 0xa040a769 // ldnt1h { z8.h-z11.h }, pn9.b/Z, [x27]\n" + "subs x22, x22, #0x2\n" + ".inst 0xa041a77d // ldnt1h { z28.h-z31.h }, pn9.b/Z, [x27, #0x4, MUL VL]\n" + ".inst 0xa042a761 // ldnt1h { z0.h-z3.h }, pn9.b/Z, [x27, #0x8, MUL VL]\n" + ".inst 0xa043a775 // ldnt1h { z20.h-z23.h }, pn9.b/Z, [x27, #0xc, MUL VL]\n" + ".inst 0xc157b508 // fdot za.s[x9, 0], { z8.h-z11.h }, z7.h[1]\n" + "addvl x27, x27, #16\n" + ".inst 0xc157b789 // fdot za.s[x9, 1], { z28.h-z31.h }, z7.h[1]\n" + ".inst 0xc157b40a // fdot za.s[x9, 2], { z0.h-z3.h }, z7.h[1]\n" + ".inst 0xc157b68b // fdot za.s[x9, 3], { z20.h-z23.h }, z7.h[1]\n" + "ble 33f\n" + ".inst 0xa040a769 // ldnt1h { z8.h-z11.h }, pn9.b/Z, [x27]\n" + "subs x22, x22, #0x2\n" + ".inst 0xa041a76d // ldnt1h { z12.h-z15.h }, pn9.b/Z, [x27, #0x4, MUL VL]\n" + ".inst 0xa042a77d // ldnt1h { z28.h-z31.h }, pn9.b/Z, [x27, #0x8, MUL VL]\n" + ".inst 0xa043a771 // ldnt1h { z16.h-z19.h }, pn9.b/Z, [x27, #0xc, MUL VL]\n" + ".inst 0xc157b908 // fdot za.s[x9, 0], { z8.h-z11.h }, z7.h[2]\n" + "addvl x27, x27, #16\n" + ".inst 0xc157b989 // fdot za.s[x9, 1], { z12.h-z15.h }, z7.h[2]\n" + ".inst 0xc157bb8a // fdot za.s[x9, 2], { z28.h-z31.h }, z7.h[2]\n" + ".inst 0xc157ba0b // fdot za.s[x9, 3], { z16.h-z19.h }, z7.h[2]\n" + "ble 33f\n" + ".inst 0xa040a769 // ldnt1h { z8.h-z11.h }, pn9.b/Z, [x27]\n" + ".inst 0xa041a77d // ldnt1h { z28.h-z31.h }, pn9.b/Z, [x27, #0x4, MUL VL]\n" + ".inst 0xa042a76d // ldnt1h { z12.h-z15.h }, pn9.b/Z, [x27, #0x8, MUL VL]\n" + ".inst 0xa043a775 // ldnt1h { z20.h-z23.h }, pn9.b/Z, [x27, #0xc, MUL VL]\n" + ".inst 0xc157bd08 // fdot za.s[x9, 0], { z8.h-z11.h }, z7.h[3]\n" + "addvl x27, x27, #16\n" + ".inst 0xc157bf89 // fdot za.s[x9, 1], { z28.h-z31.h }, z7.h[3]\n" + ".inst 0xc157bd8a // fdot za.s[x9, 2], { z12.h-z15.h }, z7.h[3]\n" + ".inst 0xc157be8b // fdot za.s[x9, 3], { z20.h-z23.h }, z7.h[3]\n" + "33:" // Width 4: Multiply loop: multiply skip + "tbz %x[flags], #1, 34f\n" + ".inst 0xc0062c1c // mova { z28.d-z31.d }, za.d[x9, #0]\n" + "add x21, %x[args_ptr], %[offset_min]\n" + "add x20, %x[args_ptr], %[offset_max]\n" + ".inst 0xc0062c2c // mova { z12.d-z15.d }, za.d[x9, #1]\n" + "ld1rh { z19.h }, p1/Z, [x21]\n" + ".inst 0xc0062c40 // mova { z0.d-z3.d }, za.d[x9, #2]\n" + "ld1rh { z18.h }, p1/Z, [x20]\n" + ".inst 0xc0062c64 // mova { z4.d-z7.d }, za.d[x9, #3]\n" + ".inst 0xc120e38a // fcvt z10.h, { z28.s-z29.s }\n" + ".inst 0xc120e3cb // fcvt z11.h, { z30.s-z31.s }\n" + ".inst 0xc120e18c // fcvt z12.h, { z12.s-z13.s }\n" + ".inst 0xc120e1cd // fcvt z13.h, { z14.s-z15.s }\n" + ".inst 0xc172c26a // fclamp { z10.h-z11.h }, z19.h, z18.h\n" + ".inst 0xc172c26c // fclamp { z12.h-z13.h }, z19.h, z18.h\n" + ".inst 0xc120e00e // fcvt z14.h, { z0.s-z1.s }\n" + ".inst 0xc120e04f // fcvt z15.h, { z2.s-z3.s }\n" + ".inst 0xc172c26e // fclamp { z14.h-z15.h }, z19.h, z18.h\n" + ".inst 0xc120e090 // fcvt z16.h, { z4.s-z5.s }\n" + ".inst 0xc120e0d1 // fcvt z17.h, { z6.s-z7.s }\n" + ".inst 0xc172c270 // fclamp { z16.h-z17.h }, z19.h, z18.h\n" + ".inst 0xa060272a // st1h { z10.h-z11.h }, pn9.b, [x25]\n" + ".inst 0xa061272c // st1h { z12.h-z13.h }, pn9.b, [x25, #0x2, MUL VL]\n" + ".inst 0xa062272e // st1h { z14.h-z15.h }, pn9.b, [x25, #0x4, MUL VL]\n" + ".inst 0xa0632330 // st1h { z16.h-z17.h }, p8, [x25, #0x6, MUL VL]\n" + "addvl x25, x25, #8\n" + "b 35f\n" + "34:" // Width 4: No activation + ".inst 0xc0062c0c // mova { z12.d-z15.d }, za.d[x9, #0]\n" + ".inst 0xc0062c30 // mova { z16.d-z19.d }, za.d[x9, #1]\n" + ".inst 0xc0062c5c // mova { z28.d-z31.d }, za.d[x9, #2]\n" + ".inst 0xc0062c68 // mova { z8.d-z11.d }, za.d[x9, #3]\n" + ".inst 0xc120e187 // fcvt z7.h, { z12.s-z13.s }\n" + ".inst 0xc120e1cf // fcvt z15.h, { z14.s-z15.s }\n" + ".inst 0xa1602727 // st1h { z7.h, z15.h }, pn9.b, [x25]\n" + ".inst 0xc120e207 // fcvt z7.h, { z16.s-z17.s }\n" + ".inst 0xc120e24f // fcvt z15.h, { z18.s-z19.s }\n" + ".inst 0xa1612727 // st1h { z7.h, z15.h }, pn9.b, [x25, #0x2, MUL VL]\n" + ".inst 0xc120e38e // fcvt z14.h, { z28.s-z29.s }\n" + ".inst 0xc120e3cf // fcvt z15.h, { z30.s-z31.s }\n" + ".inst 0xa062272e // st1h { z14.h-z15.h }, pn9.b, [x25, #0x4, MUL VL]\n" + ".inst 0xc120e112 // fcvt z18.h, { z8.s-z9.s }\n" + ".inst 0xc120e15a // fcvt z26.h, { z10.s-z11.s }\n" + ".inst 0xa1632332 // st1h { z18.h, z26.h }, p8, [x25, #0x6, MUL VL]\n" + "addvl x25, x25, #8\n" + "35:" // Width 4: Output done + "subs x26, x26, #0x4\n" + "sub %x[N], %x[N], x28, LSL #2\n" + "bgt 4b\n" + "36:" // Exit + ".inst 0xd503467f // SMSTOP\n" + "ptrue p8.b\n" + : [N] "+&r" (N) + : [A_ptr] "r" (A_ptr), [B_ptr] "r" (B_ptr), [K] "r" (K), [args_ptr] "r" (&ka), [bias] "r" (bias), [flags] "r" (flags), [offset_max] "I" (offsetof(KernelArgs, maxval)), [offset_min] "I" (offsetof(KernelArgs, minval)), [output_ptr] "r" (output_ptr) + : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x9", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31" + ); +} + +} // namespace arm_gemm + +#endif // defined(ARM_COMPUTE_ENABLE_SME2) diff --git a/src/core/NEON/kernels/arm_gemm/transforms/sme_transpose_interleave_16VL_2x2.hpp b/src/core/NEON/kernels/arm_gemm/transforms/sme_transpose_interleave_16VL_2x2.hpp index 9c6f5c83a1..dac6b06f1e 100644 --- a/src/core/NEON/kernels/arm_gemm/transforms/sme_transpose_interleave_16VL_2x2.hpp +++ b/src/core/NEON/kernels/arm_gemm/transforms/sme_transpose_interleave_16VL_2x2.hpp @@ -40,88 +40,88 @@ void sme_transpose_interleave_16VL_2x2(uint16_t *out, const uint16_t *in, size_t __asm__ __volatile__( ".inst 0xd503477f // SMSTART ZA\n" - "ptrue p5.b\n" + "ptrue p6.b\n" "1:" // Main row loop: Head - "mov x24, %x[in]\n" - "add x23, x24, %x[in_stride]\n" + "mov x25, %x[in]\n" "cmp %x[height], #0x1\n" - "add %x[in], x23, %x[in_stride]\n" - "mov x22, %x[out]\n" - "csel x23, x23, %x[pad_row], GT\n" + "add x24, x25, %x[in_stride]\n" + "mov x23, %x[out]\n" + "add %x[in], x24, %x[in_stride]\n" + "csel x24, x24, %x[pad_row], GT\n" "sub %x[height], %x[height], #0x2\n" - "mov x21, %x[width]\n" + "mov x22, %x[width]\n" "2:" // Main row loop: Column loop - "mov x20, x21\n" - "whilelt p2.h, XZR, x20\n" - "ld1h { z17.h }, p2/Z, [x24]\n" - "dech x20\n" - "whilelt p1.h, XZR, x20\n" - "ld1h { z19.h }, p1/Z, [x24, #1, MUL VL]\n" - "dech x20\n" - "whilelt p0.h, XZR, x20\n" - "ld1h { z21.h }, p0/Z, [x24, #2, MUL VL]\n" - "dech x20\n" - "whilelt p4.h, XZR, x20\n" - "ld1h { z20.h }, p4/Z, [x24, #3, MUL VL]\n" - "dech x20\n" - "whilelt p3.h, XZR, x20\n" - "ld1h { z16.h }, p2/Z, [x23]\n" - "zip1 z0.h, z17.h, z16.h\n" - "dech x20\n" - "whilelt p2.h, XZR, x20\n" - "ld1h { z18.h }, p1/Z, [x23, #1, MUL VL]\n" - "zip2 z31.h, z17.h, z16.h\n" - "dech x20\n" - "whilelt p1.h, XZR, x20\n" - "ld1h { z17.h }, p0/Z, [x23, #2, MUL VL]\n" - "zip1 z30.h, z19.h, z18.h\n" - "dech x20\n" - "whilelt p0.h, XZR, x20\n" - "ld1h { z16.h }, p4/Z, [x23, #3, MUL VL]\n" - "zip2 z29.h, z19.h, z18.h\n" + "mov x21, x22\n" + "mov x20, x23\n" + "whilelt p1.h, XZR, x21\n" + "dech x21\n" + "whilelt p0.h, XZR, x21\n" + "dech x21\n" + "ld1h { z21.h }, p1/Z, [x25]\n" + "whilelt p5.h, XZR, x21\n" + "dech x21\n" + "ld1h { z20.h }, p0/Z, [x25, #1, MUL VL]\n" + "whilelt p4.h, XZR, x21\n" + "dech x21\n" + "ld1h { z25.h }, p5/Z, [x25, #2, MUL VL]\n" + "whilelt p3.h, XZR, x21\n" + "dech x21\n" + "ld1h { z24.h }, p4/Z, [x25, #3, MUL VL]\n" + "whilelt p2.h, XZR, x21\n" + "dech x21\n" + "ld1h { z19.h }, p1/Z, [x24]\n" + "whilelt p1.h, XZR, x21\n" + "dech x21\n" + "ld1h { z18.h }, p0/Z, [x24, #1, MUL VL]\n" + "whilelt p0.h, XZR, x21\n" + "ld1h { z17.h }, p5/Z, [x24, #2, MUL VL]\n" + "decw x22, ALL, MUL #16\n" + "ld1h { z16.h }, p4/Z, [x24, #3, MUL VL]\n" + "zip1 z23.h, z21.h, z19.h\n" + "zip2 z22.h, z21.h, z19.h\n" + "cmp x22, #0x0\n" + "ld1h { z21.h }, p3/Z, [x25, #4, MUL VL]\n" + "zip1 z31.h, z20.h, z18.h\n" + "zip2 z30.h, z20.h, z18.h\n" + "add x23, x23, %x[out_stride]\n" + "ld1h { z20.h }, p2/Z, [x25, #5, MUL VL]\n" + "zip1 z29.h, z25.h, z17.h\n" + "zip2 z28.h, z25.h, z17.h\n" + "ld1h { z27.h }, p1/Z, [x25, #6, MUL VL]\n" + "zip1 z26.h, z24.h, z16.h\n" + "zip2 z25.h, z24.h, z16.h\n" + "ld1h { z24.h }, p0/Z, [x25, #7, MUL VL]\n" + "addvl x25, x25, #8\n" "ld1h { z19.h }, p3/Z, [x24, #4, MUL VL]\n" - "mov x20, x22\n" - "decw x21, ALL, MUL #16\n" - "zip1 z28.h, z21.h, z17.h\n" "ld1h { z18.h }, p2/Z, [x24, #5, MUL VL]\n" - "zip2 z27.h, z21.h, z17.h\n" - "zip1 z26.h, z20.h, z16.h\n" - "cmp x21, #0x0\n" "ld1h { z17.h }, p1/Z, [x24, #6, MUL VL]\n" - "zip2 z25.h, z20.h, z16.h\n" - "add x22, x22, %x[out_stride]\n" - "ld1h { z24.h }, p0/Z, [x24, #7, MUL VL]\n" + "ld1h { z16.h }, p0/Z, [x24, #7, MUL VL]\n" + "st1h { z23.h }, p6, [x20]\n" "addvl x24, x24, #8\n" - "ld1h { z16.h }, p3/Z, [x23, #4, MUL VL]\n" - "zip1 z23.h, z19.h, z16.h\n" - "zip2 z22.h, z19.h, z16.h\n" - "ld1h { z16.h }, p2/Z, [x23, #5, MUL VL]\n" - "zip1 z21.h, z18.h, z16.h\n" - "zip2 z20.h, z18.h, z16.h\n" - "ld1h { z16.h }, p1/Z, [x23, #6, MUL VL]\n" - "zip1 z19.h, z17.h, z16.h\n" - "zip2 z18.h, z17.h, z16.h\n" - "ld1h { z16.h }, p0/Z, [x23, #7, MUL VL]\n" - "st1h { z0.h }, p5, [x20]\n" - "addvl x23, x23, #8\n" + "zip1 z23.h, z21.h, z19.h\n" + "st1h { z22.h }, p6, [x20, #1, MUL VL]\n" + "zip2 z22.h, z21.h, z19.h\n" + "zip1 z21.h, z20.h, z18.h\n" + "st1h { z31.h }, p6, [x20, #2, MUL VL]\n" + "zip2 z20.h, z20.h, z18.h\n" + "zip1 z19.h, z27.h, z17.h\n" + "st1h { z30.h }, p6, [x20, #3, MUL VL]\n" + "zip2 z18.h, z27.h, z17.h\n" "zip1 z17.h, z24.h, z16.h\n" - "st1h { z31.h }, p5, [x20, #1, MUL VL]\n" + "st1h { z29.h }, p6, [x20, #4, MUL VL]\n" "zip2 z16.h, z24.h, z16.h\n" - "st1h { z30.h }, p5, [x20, #2, MUL VL]\n" - "st1h { z29.h }, p5, [x20, #3, MUL VL]\n" - "st1h { z28.h }, p5, [x20, #4, MUL VL]\n" - "st1h { z27.h }, p5, [x20, #5, MUL VL]\n" - "st1h { z26.h }, p5, [x20, #6, MUL VL]\n" - "st1h { z25.h }, p5, [x20, #7, MUL VL]\n" + "st1h { z28.h }, p6, [x20, #5, MUL VL]\n" + "st1h { z26.h }, p6, [x20, #6, MUL VL]\n" + "st1h { z25.h }, p6, [x20, #7, MUL VL]\n" "addvl x20, x20, #16\n" - "st1h { z23.h }, p5, [x20, #-8, MUL VL]\n" - "st1h { z22.h }, p5, [x20, #-7, MUL VL]\n" - "st1h { z21.h }, p5, [x20, #-6, MUL VL]\n" - "st1h { z20.h }, p5, [x20, #-5, MUL VL]\n" - "st1h { z19.h }, p5, [x20, #-4, MUL VL]\n" - "st1h { z18.h }, p5, [x20, #-3, MUL VL]\n" - "st1h { z17.h }, p5, [x20, #-2, MUL VL]\n" - "st1h { z16.h }, p5, [x20, #-1, MUL VL]\n" + "st1h { z23.h }, p6, [x20, #-8, MUL VL]\n" + "st1h { z22.h }, p6, [x20, #-7, MUL VL]\n" + "st1h { z21.h }, p6, [x20, #-6, MUL VL]\n" + "st1h { z20.h }, p6, [x20, #-5, MUL VL]\n" + "st1h { z19.h }, p6, [x20, #-4, MUL VL]\n" + "st1h { z18.h }, p6, [x20, #-3, MUL VL]\n" + "st1h { z17.h }, p6, [x20, #-2, MUL VL]\n" + "st1h { z16.h }, p6, [x20, #-1, MUL VL]\n" "bgt 2b\n" "3:" // Main row loop: Column loop skip "cmp %x[height], #0x1\n" @@ -130,7 +130,7 @@ void sme_transpose_interleave_16VL_2x2(uint16_t *out, const uint16_t *in, size_t ".inst 0xd503467f // SMSTOP\n" : [height] "+&r" (height), [in] "+&r" (in), [out] "+&r" (out) : [in_stride] "r" (in_stride), [out_stride] "r" (out_stride), [pad_row] "r" (pad_row), [width] "r" (width) - : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x20", "x21", "x22", "x23", "x24", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31" + : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x20", "x21", "x22", "x23", "x24", "x25", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31" ); } @@ -149,5 +149,18 @@ void Transform<16, 2, true, VLType::SME>( ); } +template<> +void Transform<16, 2, true, VLType::SME>( + __fp16 *out, const __fp16 *in, int stride, int x0, int xmax, int k0, int kmax) +{ + sme_transpose_interleave_16VL_2x2( + reinterpret_cast(out), + reinterpret_cast(in + k0 * stride + x0), + (xmax-x0) * sizeof(__fp16) / 2, + stride * sizeof(__fp16), + (kmax-k0) + ); +} + #endif // defined(ARM_COMPUTE_ENABLE_SME) -- cgit v1.2.1