From 68dd25fbe6e4d3c3513fa5993863419769aa08fc Mon Sep 17 00:00:00 2001 From: Sang-Hoon Park Date: Mon, 19 Oct 2020 16:00:11 +0100 Subject: COMPMID-3637: Move utility headers from arm_compute to src Signed-off-by: Georgios Pinitas Change-Id: If9d6fa8c900b68c4b6fd373f2fc1f9abb83ea917 Signed-off-by: Michalis Spyrou Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4145 Tested-by: Arm Jenkins Reviewed-by: Sang-Hoon Park Comments-Addressed: Arm Jenkins --- .../NEON/kernels/assembly/INEGEMMWrapperKernel.cpp | 4 +- .../NEON/kernels/assembly/INEGEMMWrapperKernel.h | 108 +++++++++++++++++++++ .../NEDepthwiseConvolutionAssemblyKernelWrapper.h | 88 +++++++++++++++++ src/core/NEON/kernels/assembly/arm_gemm_local.hpp | 34 +++++++ 4 files changed, 232 insertions(+), 2 deletions(-) create mode 100644 src/core/NEON/kernels/assembly/INEGEMMWrapperKernel.h create mode 100644 src/core/NEON/kernels/assembly/NEDepthwiseConvolutionAssemblyKernelWrapper.h create mode 100644 src/core/NEON/kernels/assembly/arm_gemm_local.hpp (limited to 'src/core/NEON/kernels/assembly') diff --git a/src/core/NEON/kernels/assembly/INEGEMMWrapperKernel.cpp b/src/core/NEON/kernels/assembly/INEGEMMWrapperKernel.cpp index b071be3749..760274dba1 100644 --- a/src/core/NEON/kernels/assembly/INEGEMMWrapperKernel.cpp +++ b/src/core/NEON/kernels/assembly/INEGEMMWrapperKernel.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018-2019 Arm Limited. + * Copyright (c) 2018-2020 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -22,7 +22,7 @@ * SOFTWARE. */ -#include "arm_compute/core/NEON/kernels/assembly/INEGEMMWrapperKernel.h" +#include "src/core/NEON/kernels/assembly/INEGEMMWrapperKernel.h" #include "arm_compute/core/Error.h" #include "arm_compute/core/Helpers.h" diff --git a/src/core/NEON/kernels/assembly/INEGEMMWrapperKernel.h b/src/core/NEON/kernels/assembly/INEGEMMWrapperKernel.h new file mode 100644 index 0000000000..030f1aad12 --- /dev/null +++ b/src/core/NEON/kernels/assembly/INEGEMMWrapperKernel.h @@ -0,0 +1,108 @@ +/* + * Copyright (c) 2018-2020 Arm Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#ifndef SRC_INEGEMMWRAPPERKERNEL_H +#define SRC_INEGEMMWRAPPERKERNEL_H + +#include "arm_compute/core/NEON/INEKernel.h" + +namespace arm_compute +{ +class ITensor; + +/** Common interface for all the arm_gemm Gemms + */ +class INEGEMMWrapperKernel : public INEKernel +{ +public: + /** Parameters defining the dimensions of the matrices being multiplied */ + struct Params + { + unsigned int M{ 0 }; /**< Rows in output matrix C (and input matrix A). */ + unsigned int N{ 0 }; /**< Columns in output matrix C (and input matrix B). */ + unsigned int K{ 0 }; /**< Columns of input matrix A (= rows of input matrix B). */ + unsigned int batches{ 0 }; /**< Number of "batched" GEMMs (unique A and C, shared B). */ + unsigned int multis{ 0 }; /**< Number of "multi" GEMMs (unique A, B and C). */ + }; + + static Params extract_parameters(const ITensor *a, const ITensor *b, const ITensor *c, const GEMMInfo &gemm_info); + + /** Constructor */ + INEGEMMWrapperKernel(); + /** Prevent instances of this class from being copied */ + INEGEMMWrapperKernel(const INEGEMMWrapperKernel &) = delete; + /** Prevent instances of this class from being copied */ + INEGEMMWrapperKernel &operator=(const INEGEMMWrapperKernel &) = delete; + /** Allow instances of this class to be moved */ + INEGEMMWrapperKernel(INEGEMMWrapperKernel &&) = default; + /** Allow instances of this class to be moved */ + INEGEMMWrapperKernel &operator=(INEGEMMWrapperKernel &&) = default; + /** Initialise the kernel's input and output. + * + * @note The input and output tensor must have the same dimensions + * + * @param[in] a Input tensor (Matrix A) + * @param[in] b Input tensor (Matrix B) + * @param[out] c Output tensor to store the result of matrix multiplication. Data type supported: same as @p input0. + * @param[in] alpha Scalar multiplier to apply to AB matrix product. + * @param[in] beta Scalar multiplier to apply to input C matrix before adding product. + * @param[in] gemm_info GEMM meta-data + */ + void configure(const ITensor *a, const ITensor *b, ITensor *c, float alpha, float beta, const GEMMInfo &gemm_info); + + // Inherited methods overridden: + void run(const Window &window, const ThreadInfo &info) override; + +protected: + /** Called as part of configure() after _a, _b, _c and _params have been set. + * + * @param[in] alpha Scalar multiplier to apply to AB matrix product. + * @param[in] beta Scalar multiplier to apply to input C matrix before adding product. + * + * @return A 3D execution window. + */ + virtual Window configure_internal(float alpha, float beta) = 0; + + /** Run the kernel from the start to the end offset in window. + * + * @param[in] window Window to use for the iteration + * @param[in] start_offset Where to start iterating from (In Window coordinates) + * @param[in] end_offset Where to stop iterating (In Window coordinates). + * @param[in] info Info about executing thread and CPU. + */ + virtual void run_internal(const Window &window, const Coordinates &start_offset, const Coordinates &end_offset, const ThreadInfo &info) = 0; + + const ITensor *_a; + const ITensor *_b; + ITensor *_c; + Params _params; + GEMMInfo _gemm_info; + +private: + Window _window3d; + TensorShape _window_shape; +}; + +} // namespace arm_compute + +#endif /* SRC_INEGEMMRAPPERKERNEL_H */ diff --git a/src/core/NEON/kernels/assembly/NEDepthwiseConvolutionAssemblyKernelWrapper.h b/src/core/NEON/kernels/assembly/NEDepthwiseConvolutionAssemblyKernelWrapper.h new file mode 100644 index 0000000000..a2f7e3bd59 --- /dev/null +++ b/src/core/NEON/kernels/assembly/NEDepthwiseConvolutionAssemblyKernelWrapper.h @@ -0,0 +1,88 @@ +/* + * Copyright (c) 2019-2020 Arm Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#ifndef SRC_ASSEMBLY_DEPTHWISE_CONVOLUTION_ASSEMBLY_WRAPPER_KERNEL_H +#define SRC_ASSEMBLY_DEPTHWISE_CONVOLUTION_ASSEMBLY_WRAPPER_KERNEL_H + +#include "arm_compute/core/NEON/INEKernel.h" +#include "arm_compute/core/Utils.h" +#include "arm_compute/core/Validate.h" + +#include "src/core/NEON/kernels/convolution/depthwise/depthwise.hpp" + +namespace arm_compute +{ +// Forward declarations +class ITensor; + +/** This class is a wrapper for the depthwise convolution assembly kernels. */ +class NEDepthwiseConvolutionAssemblyKernelWrapper final : public INEKernel +{ +public: + const char *name() const override + { + return "NEDepthwiseConvolutionAssemblyKernelWrapper"; + } + + /** Default constructor */ + NEDepthwiseConvolutionAssemblyKernelWrapper() + : _kernel(nullptr) + { + } + /** Prevent instances of this class from being copied (As this class contains pointers) */ + NEDepthwiseConvolutionAssemblyKernelWrapper(const NEDepthwiseConvolutionAssemblyKernelWrapper &) = delete; + /** Prevent instances of this class from being copied (As this class contains pointers) */ + NEDepthwiseConvolutionAssemblyKernelWrapper &operator=(const NEDepthwiseConvolutionAssemblyKernelWrapper &) = delete; + /** Default Move Constructor. */ + NEDepthwiseConvolutionAssemblyKernelWrapper(NEDepthwiseConvolutionAssemblyKernelWrapper &&) = default; + /** Default move assignment operator */ + NEDepthwiseConvolutionAssemblyKernelWrapper &operator=(NEDepthwiseConvolutionAssemblyKernelWrapper &&) = default; + + /** Initialise the kernel's input and output. + * + * @param[in] kernel Pointer to an assembly kernel implementation. + */ + void configure(depthwise::IDepthwiseConvolution *kernel) + { + ARM_COMPUTE_ERROR_ON_NULLPTR((reinterpret_cast(kernel))); + _kernel = kernel; + Window win; + win.set(Window::DimX, Window::Dimension(0, _kernel->get_window(), 1)); + INEKernel::configure(win); + } + + // Inherited methods overridden: + void run(const Window &window, const ThreadInfo &info) override + { + ARM_COMPUTE_ERROR_ON_NULLPTR((reinterpret_cast(_kernel))); + ARM_COMPUTE_ERROR_ON_UNCONFIGURED_KERNEL(this); + auto first = window.x().start(); + auto last = window.x().end(); + _kernel->run(first, last, info.thread_id); + } + +private: + depthwise::IDepthwiseConvolution *_kernel; +}; +} // namespace arm_compute +#endif /* SRC_ASSEMBLY_DEPTHWISE_CONVOLUTION_ASSEMBLY_WRAPPER_KERNEL_H */ diff --git a/src/core/NEON/kernels/assembly/arm_gemm_local.hpp b/src/core/NEON/kernels/assembly/arm_gemm_local.hpp new file mode 100644 index 0000000000..4715f2500a --- /dev/null +++ b/src/core/NEON/kernels/assembly/arm_gemm_local.hpp @@ -0,0 +1,34 @@ +/* + * Copyright (c) 2018-2020 Arm Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#pragma once + +/* This file is used to configure integration-specific aspects of arm_gemm into ACL */ + +#include "arm_compute/core/CPP/CPPTypes.h" + +namespace arm_gemm +{ +using CPUModel = arm_compute::CPUModel; +using CPUInfo = arm_compute::CPUInfo; +} // namespace arm_compute -- cgit v1.2.1