From 7d9a626aaba9837cb82d189a9c4f0bcef58825bb Mon Sep 17 00:00:00 2001 From: Michael Tyler Date: Wed, 1 Feb 2023 16:37:07 +0000 Subject: Update CPU kernels to remove x19 and w19 Resolves: COMPMID-5805 Change-Id: Idf720bbb136474810086f5089c5ed23b3f79835a Signed-off-by: Michael Tyler Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/9081 Benchmark: Arm Jenkins Tested-by: Arm Jenkins Comments-Addressed: Arm Jenkins Reviewed-by: Gunes Bayir Reviewed-by: Viet-Hoa Do --- .../transforms/sme_transpose_interleave_2VL.hpp | 222 ++++++++++----------- 1 file changed, 111 insertions(+), 111 deletions(-) (limited to 'src/core/NEON/kernels/arm_gemm/transforms/sme_transpose_interleave_2VL.hpp') diff --git a/src/core/NEON/kernels/arm_gemm/transforms/sme_transpose_interleave_2VL.hpp b/src/core/NEON/kernels/arm_gemm/transforms/sme_transpose_interleave_2VL.hpp index 334115907d..a057fd514e 100644 --- a/src/core/NEON/kernels/arm_gemm/transforms/sme_transpose_interleave_2VL.hpp +++ b/src/core/NEON/kernels/arm_gemm/transforms/sme_transpose_interleave_2VL.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2022 Arm Limited. + * Copyright (c) 2022-2023 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -10,16 +10,16 @@ * sell copies of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. */ #pragma once @@ -39,89 +39,89 @@ void sme_transpose_interleave_2VL(uint16_t *out, const uint16_t *in, size_t widt "ptrue p2.b\n" "blt 6f\n" "1:" // Main row loop: Head - "mov x25, %x[in]\n" + "mov x26, %x[in]\n" + "add x25, x26, %x[in_stride]\n" "add x24, x25, %x[in_stride]\n" - "add x23, x24, %x[in_stride]\n" - "mov x22, %x[width]\n" - "cnth x19, ALL, MUL #4\n" - "add x20, x23, %x[in_stride]\n" - "cmp x22, x19\n" - "add %x[in], x20, %x[in_stride]\n" - "mov x21, %x[out]\n" + "mov x23, %x[width]\n" + "cnth x20, ALL, MUL #4\n" + "add x21, x24, %x[in_stride]\n" + "cmp x23, x20\n" + "add %x[in], x21, %x[in_stride]\n" + "mov x22, %x[out]\n" "sub %x[height], %x[height], #0x4\n" "blt 3f\n" "2:" // Main row loop: Unroll column loop - "sub x22, x22, x19\n" - "ld1h { z31.h }, p2/Z, [x25]\n" - "cmp x22, x19\n" - "ld1h { z30.h }, p2/Z, [x25, #1, MUL VL]\n" - "ld1h { z29.h }, p2/Z, [x25, #2, MUL VL]\n" - "ld1h { z28.h }, p2/Z, [x25, #3, MUL VL]\n" + "sub x23, x23, x20\n" + "ld1h { z31.h }, p2/Z, [x26]\n" + "cmp x23, x20\n" + "ld1h { z30.h }, p2/Z, [x26, #1, MUL VL]\n" + "ld1h { z29.h }, p2/Z, [x26, #2, MUL VL]\n" + "ld1h { z28.h }, p2/Z, [x26, #3, MUL VL]\n" + "addvl x26, x26, #4\n" + "ld1h { z27.h }, p2/Z, [x25]\n" + "ld1h { z26.h }, p2/Z, [x25, #1, MUL VL]\n" + "ld1h { z25.h }, p2/Z, [x25, #2, MUL VL]\n" + "ld1h { z24.h }, p2/Z, [x25, #3, MUL VL]\n" "addvl x25, x25, #4\n" - "ld1h { z27.h }, p2/Z, [x24]\n" - "ld1h { z26.h }, p2/Z, [x24, #1, MUL VL]\n" - "ld1h { z25.h }, p2/Z, [x24, #2, MUL VL]\n" - "ld1h { z24.h }, p2/Z, [x24, #3, MUL VL]\n" + "ld1h { z23.h }, p2/Z, [x24]\n" + "ld1h { z22.h }, p2/Z, [x24, #1, MUL VL]\n" + "ld1h { z21.h }, p2/Z, [x24, #2, MUL VL]\n" + "ld1h { z20.h }, p2/Z, [x24, #3, MUL VL]\n" "addvl x24, x24, #4\n" - "ld1h { z23.h }, p2/Z, [x23]\n" - "ld1h { z22.h }, p2/Z, [x23, #1, MUL VL]\n" - "ld1h { z21.h }, p2/Z, [x23, #2, MUL VL]\n" - "ld1h { z20.h }, p2/Z, [x23, #3, MUL VL]\n" - "addvl x23, x23, #4\n" - "ld1h { z19.h }, p2/Z, [x20]\n" - "ld1h { z18.h }, p2/Z, [x20, #1, MUL VL]\n" - "ld1h { z17.h }, p2/Z, [x20, #2, MUL VL]\n" - "ld1h { z16.h }, p2/Z, [x20, #3, MUL VL]\n" - "st1h { z31.h }, p2, [x21]\n" - "addvl x20, x20, #4\n" - "st1h { z30.h }, p2, [x21, #1, MUL VL]\n" - "st1h { z27.h }, p2, [x21, #2, MUL VL]\n" - "st1h { z26.h }, p2, [x21, #3, MUL VL]\n" - "st1h { z23.h }, p2, [x21, #4, MUL VL]\n" - "st1h { z22.h }, p2, [x21, #5, MUL VL]\n" - "st1h { z19.h }, p2, [x21, #6, MUL VL]\n" - "st1h { z18.h }, p2, [x21, #7, MUL VL]\n" - "add x21, x21, %x[out_stride]\n" - "st1h { z29.h }, p2, [x21]\n" - "st1h { z28.h }, p2, [x21, #1, MUL VL]\n" - "st1h { z25.h }, p2, [x21, #2, MUL VL]\n" - "st1h { z24.h }, p2, [x21, #3, MUL VL]\n" - "st1h { z21.h }, p2, [x21, #4, MUL VL]\n" - "st1h { z20.h }, p2, [x21, #5, MUL VL]\n" - "st1h { z17.h }, p2, [x21, #6, MUL VL]\n" - "st1h { z16.h }, p2, [x21, #7, MUL VL]\n" - "add x21, x21, %x[out_stride]\n" + "ld1h { z19.h }, p2/Z, [x21]\n" + "ld1h { z18.h }, p2/Z, [x21, #1, MUL VL]\n" + "ld1h { z17.h }, p2/Z, [x21, #2, MUL VL]\n" + "ld1h { z16.h }, p2/Z, [x21, #3, MUL VL]\n" + "st1h { z31.h }, p2, [x22]\n" + "addvl x21, x21, #4\n" + "st1h { z30.h }, p2, [x22, #1, MUL VL]\n" + "st1h { z27.h }, p2, [x22, #2, MUL VL]\n" + "st1h { z26.h }, p2, [x22, #3, MUL VL]\n" + "st1h { z23.h }, p2, [x22, #4, MUL VL]\n" + "st1h { z22.h }, p2, [x22, #5, MUL VL]\n" + "st1h { z19.h }, p2, [x22, #6, MUL VL]\n" + "st1h { z18.h }, p2, [x22, #7, MUL VL]\n" + "add x22, x22, %x[out_stride]\n" + "st1h { z29.h }, p2, [x22]\n" + "st1h { z28.h }, p2, [x22, #1, MUL VL]\n" + "st1h { z25.h }, p2, [x22, #2, MUL VL]\n" + "st1h { z24.h }, p2, [x22, #3, MUL VL]\n" + "st1h { z21.h }, p2, [x22, #4, MUL VL]\n" + "st1h { z20.h }, p2, [x22, #5, MUL VL]\n" + "st1h { z17.h }, p2, [x22, #6, MUL VL]\n" + "st1h { z16.h }, p2, [x22, #7, MUL VL]\n" + "add x22, x22, %x[out_stride]\n" "bge 2b\n" "3:" // Main row loop: Unroll column loop skip - "cbz x22, 5f\n" + "cbz x23, 5f\n" "4:" // Main row loop: Column loop - "mov x19, x22\n" - "whilelt p1.h, XZR, x19\n" - "ld1h { z23.h }, p1/Z, [x25]\n" - "dech x19\n" - "dech x22, ALL, MUL #2\n" - "ld1h { z22.h }, p1/Z, [x24]\n" - "whilelt p0.h, XZR, x19\n" - "cmp x22, #0x0\n" - "ld1h { z21.h }, p0/Z, [x25, #1, MUL VL]\n" + "mov x20, x23\n" + "whilelt p1.h, XZR, x20\n" + "ld1h { z23.h }, p1/Z, [x26]\n" + "dech x20\n" + "dech x23, ALL, MUL #2\n" + "ld1h { z22.h }, p1/Z, [x25]\n" + "whilelt p0.h, XZR, x20\n" + "cmp x23, #0x0\n" + "ld1h { z21.h }, p0/Z, [x26, #1, MUL VL]\n" + "addvl x26, x26, #2\n" + "ld1h { z20.h }, p0/Z, [x25, #1, MUL VL]\n" "addvl x25, x25, #2\n" - "ld1h { z20.h }, p0/Z, [x24, #1, MUL VL]\n" + "ld1h { z19.h }, p1/Z, [x24]\n" + "ld1h { z18.h }, p0/Z, [x24, #1, MUL VL]\n" "addvl x24, x24, #2\n" - "ld1h { z19.h }, p1/Z, [x23]\n" - "ld1h { z18.h }, p0/Z, [x23, #1, MUL VL]\n" - "addvl x23, x23, #2\n" - "ld1h { z17.h }, p1/Z, [x20]\n" - "ld1h { z16.h }, p0/Z, [x20, #1, MUL VL]\n" - "addvl x20, x20, #2\n" - "st1h { z23.h }, p2, [x21]\n" - "st1h { z21.h }, p2, [x21, #1, MUL VL]\n" - "st1h { z22.h }, p2, [x21, #2, MUL VL]\n" - "st1h { z20.h }, p2, [x21, #3, MUL VL]\n" - "st1h { z19.h }, p2, [x21, #4, MUL VL]\n" - "st1h { z18.h }, p2, [x21, #5, MUL VL]\n" - "st1h { z17.h }, p2, [x21, #6, MUL VL]\n" - "st1h { z16.h }, p2, [x21, #7, MUL VL]\n" - "add x21, x21, %x[out_stride]\n" + "ld1h { z17.h }, p1/Z, [x21]\n" + "ld1h { z16.h }, p0/Z, [x21, #1, MUL VL]\n" + "addvl x21, x21, #2\n" + "st1h { z23.h }, p2, [x22]\n" + "st1h { z21.h }, p2, [x22, #1, MUL VL]\n" + "st1h { z22.h }, p2, [x22, #2, MUL VL]\n" + "st1h { z20.h }, p2, [x22, #3, MUL VL]\n" + "st1h { z19.h }, p2, [x22, #4, MUL VL]\n" + "st1h { z18.h }, p2, [x22, #5, MUL VL]\n" + "st1h { z17.h }, p2, [x22, #6, MUL VL]\n" + "st1h { z16.h }, p2, [x22, #7, MUL VL]\n" + "add x22, x22, %x[out_stride]\n" "bgt 4b\n" "5:" // Main row loop: Column loop skip "cmp %x[height], #0x4\n" @@ -130,44 +130,44 @@ void sme_transpose_interleave_2VL(uint16_t *out, const uint16_t *in, size_t widt "cbz %x[height], 12f\n" "6:" // Main loop skip "7:" // Tail row loop: Head - "mov x20, %x[width]\n" - "cnth x19, ALL, MUL #4\n" - "mov x25, %x[in]\n" - "cmp x20, x19\n" - "add %x[in], x25, %x[in_stride]\n" - "mov x21, %x[out]\n" + "mov x21, %x[width]\n" + "cnth x20, ALL, MUL #4\n" + "mov x26, %x[in]\n" + "cmp x21, x20\n" + "add %x[in], x26, %x[in_stride]\n" + "mov x22, %x[out]\n" "sub %x[height], %x[height], #0x1\n" "blt 9f\n" "8:" // Tail row loop: Unroll column loop - "sub x20, x20, x19\n" - "ld1h { z19.h }, p2/Z, [x25]\n" - "cmp x20, x19\n" - "ld1h { z18.h }, p2/Z, [x25, #1, MUL VL]\n" - "ld1h { z17.h }, p2/Z, [x25, #2, MUL VL]\n" - "ld1h { z16.h }, p2/Z, [x25, #3, MUL VL]\n" - "st1h { z19.h }, p2, [x21]\n" - "addvl x25, x25, #4\n" - "st1h { z18.h }, p2, [x21, #1, MUL VL]\n" - "add x21, x21, %x[out_stride]\n" - "st1h { z17.h }, p2, [x21]\n" - "st1h { z16.h }, p2, [x21, #1, MUL VL]\n" - "add x21, x21, %x[out_stride]\n" + "sub x21, x21, x20\n" + "ld1h { z19.h }, p2/Z, [x26]\n" + "cmp x21, x20\n" + "ld1h { z18.h }, p2/Z, [x26, #1, MUL VL]\n" + "ld1h { z17.h }, p2/Z, [x26, #2, MUL VL]\n" + "ld1h { z16.h }, p2/Z, [x26, #3, MUL VL]\n" + "st1h { z19.h }, p2, [x22]\n" + "addvl x26, x26, #4\n" + "st1h { z18.h }, p2, [x22, #1, MUL VL]\n" + "add x22, x22, %x[out_stride]\n" + "st1h { z17.h }, p2, [x22]\n" + "st1h { z16.h }, p2, [x22, #1, MUL VL]\n" + "add x22, x22, %x[out_stride]\n" "bge 8b\n" "9:" // Tail row loop: Unroll column loop skip - "cbz x20, 11f\n" + "cbz x21, 11f\n" "10:" // Tail row loop: Column loop - "mov x19, x20\n" - "whilelt p0.h, XZR, x19\n" - "ld1h { z17.h }, p0/Z, [x25]\n" - "dech x19\n" - "dech x20, ALL, MUL #2\n" - "whilelt p0.h, XZR, x19\n" - "cmp x20, #0x0\n" - "ld1h { z16.h }, p0/Z, [x25, #1, MUL VL]\n" - "st1h { z17.h }, p2, [x21]\n" - "addvl x25, x25, #2\n" - "st1h { z16.h }, p2, [x21, #1, MUL VL]\n" - "add x21, x21, %x[out_stride]\n" + "mov x20, x21\n" + "whilelt p0.h, XZR, x20\n" + "ld1h { z17.h }, p0/Z, [x26]\n" + "dech x20\n" + "dech x21, ALL, MUL #2\n" + "whilelt p0.h, XZR, x20\n" + "cmp x21, #0x0\n" + "ld1h { z16.h }, p0/Z, [x26, #1, MUL VL]\n" + "st1h { z17.h }, p2, [x22]\n" + "addvl x26, x26, #2\n" + "st1h { z16.h }, p2, [x22, #1, MUL VL]\n" + "add x22, x22, %x[out_stride]\n" "bgt 10b\n" "11:" // Tail row loop: Column loop skip "cmp %x[height], #0x1\n" @@ -177,7 +177,7 @@ void sme_transpose_interleave_2VL(uint16_t *out, const uint16_t *in, size_t widt ".inst 0xd503467f // SMSTOP\n" : [height] "+&r" (height), [in] "+&r" (in), [out] "+&r" (out) : [in_stride] "r" (in_stride), [out_stride] "r" (out_stride), [width] "r" (width) - : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31" + : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31" ); } -- cgit v1.2.1