From 74921eee924625426429044decefe3673561b174 Mon Sep 17 00:00:00 2001 From: Michael Tyler Date: Wed, 12 Apr 2023 17:43:17 +0100 Subject: Update CPU kernel implementations and guard directives Resolves COMPMID-6023 Change-Id: I868975d14c4f98af6716726feda22405a6a4c891 Signed-off-by: Michael Tyler Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/9686 Tested-by: Arm Jenkins Reviewed-by: Viet-Hoa Do Comments-Addressed: Arm Jenkins Benchmark: Arm Jenkins --- .../sve_ffinterleaved_fp16_mla_8x3VL/generic.cpp | 146 ++++++++++----------- 1 file changed, 73 insertions(+), 73 deletions(-) (limited to 'src/core/NEON/kernels/arm_gemm/kernels/sve_ffinterleaved_fp16_mla_8x3VL/generic.cpp') diff --git a/src/core/NEON/kernels/arm_gemm/kernels/sve_ffinterleaved_fp16_mla_8x3VL/generic.cpp b/src/core/NEON/kernels/arm_gemm/kernels/sve_ffinterleaved_fp16_mla_8x3VL/generic.cpp index de219aa2bf..23503fa108 100644 --- a/src/core/NEON/kernels/arm_gemm/kernels/sve_ffinterleaved_fp16_mla_8x3VL/generic.cpp +++ b/src/core/NEON/kernels/arm_gemm/kernels/sve_ffinterleaved_fp16_mla_8x3VL/generic.cpp @@ -52,26 +52,26 @@ void sve_ffinterleaved_fp16_mla_8x3VL( __asm__ __volatile__( "ptrue p0.b\n" "1:" // Height loop - "ldr x26, [%x[args_ptr], %[offsetof_Bpanel]]\n" - "ldr x25, [%x[args_ptr], %[offsetof_N]]\n" - "str x26, [%x[args_ptr], %[offsetof_cur_B_ptr]]\n" - "mov x24, %x[Apanel]\n" + "ldr x20, [%x[args_ptr], %[offsetof_Bpanel]]\n" + "ldr x26, [%x[args_ptr], %[offsetof_N]]\n" + "str x20, [%x[args_ptr], %[offsetof_cur_B_ptr]]\n" + "mov x25, %x[Apanel]\n" "2:" // Width loop - "ldr x26, [%x[args_ptr], %[offsetof_cur_B_ptr]]\n" + "ldr x24, [%x[args_ptr], %[offsetof_cur_B_ptr]]\n" "ldr x20, [%x[args_ptr], %[offsetof_B_stride]]\n" "cnth x23, ALL, MUL #2\n" - "add x22, x26, x20, LSL #1\n" + "add x22, x24, x20, LSL #1\n" "add x21, x22, x20, LSL #1\n" "add x20, x21, x20, LSL #1\n" - "cmp x25, x23\n" + "cmp x26, x23\n" "str x20, [%x[args_ptr], %[offsetof_cur_B_ptr]]\n" - "mov %x[Apanel], x24\n" + "mov %x[Apanel], x25\n" "bgt 3f\n" "dech x23\n" - "cmp x25, x23\n" - "mov x21, x26\n" + "cmp x26, x23\n" + "mov x21, x24\n" "bgt 3f\n" - "mov x22, x26\n" + "mov x22, x24\n" "3:" // B setup done "ldr x20, [%x[args_ptr], %[offsetof_K]]\n" "cmp x20, #0x2\n" @@ -81,7 +81,7 @@ void sve_ffinterleaved_fp16_mla_8x3VL( "ld1rqh { z0.h }, p0/Z, [%x[Apanel]]\n" "mov z11.b, #0x0\n" "mov z12.b, #0x0\n" - "ld1h { z2.h }, p0/Z, [x26]\n" + "ld1h { z2.h }, p0/Z, [x24]\n" "mov z13.b, #0x0\n" "mov z14.b, #0x0\n" "ld1h { z3.h }, p0/Z, [x22]\n" @@ -107,19 +107,19 @@ void sve_ffinterleaved_fp16_mla_8x3VL( "4:" // main loop head "fmla z8.h, z2.h, z0.h[0]\n" "fmla z11.h, z2.h, z0.h[1]\n" - "ld1rqh { z1.h }, p0/Z, [%x[Apanel], #16]\n" + "ld1rqh { z7.h }, p0/Z, [%x[Apanel], #16]\n" "fmla z14.h, z2.h, z0.h[2]\n" "fmla z17.h, z2.h, z0.h[3]\n" - "ld1h { z5.h }, p0/Z, [x26, #1, MUL VL]\n" + "ld1h { z6.h }, p0/Z, [x24, #1, MUL VL]\n" "fmla z20.h, z2.h, z0.h[4]\n" "fmla z23.h, z2.h, z0.h[5]\n" - "ld1h { z6.h }, p0/Z, [x22, #1, MUL VL]\n" + "ld1h { z5.h }, p0/Z, [x22, #1, MUL VL]\n" "fmla z26.h, z2.h, z0.h[6]\n" "fmla z29.h, z2.h, z0.h[7]\n" - "ld1h { z7.h }, p0/Z, [x21, #1, MUL VL]\n" + "ld1h { z1.h }, p0/Z, [x21, #1, MUL VL]\n" "fmla z9.h, z3.h, z0.h[0]\n" "fmla z12.h, z3.h, z0.h[1]\n" - "addvl x26, x26, #2\n" + "addvl x24, x24, #2\n" "fmla z15.h, z3.h, z0.h[2]\n" "fmla z18.h, z3.h, z0.h[3]\n" "addvl x22, x22, #2\n" @@ -137,36 +137,36 @@ void sve_ffinterleaved_fp16_mla_8x3VL( "add %x[Apanel], %x[Apanel], #0x20\n" "fmla z22.h, z4.h, z0.h[4]\n" "fmla z25.h, z4.h, z0.h[5]\n" - "ld1h { z2.h }, p0/Z, [x26]\n" + "ld1h { z2.h }, p0/Z, [x24]\n" "fmla z28.h, z4.h, z0.h[6]\n" "fmla z31.h, z4.h, z0.h[7]\n" "ld1rqh { z0.h }, p0/Z, [%x[Apanel]]\n" - "fmla z8.h, z5.h, z1.h[0]\n" - "fmla z11.h, z5.h, z1.h[1]\n" + "fmla z8.h, z6.h, z7.h[0]\n" + "fmla z11.h, z6.h, z7.h[1]\n" "ld1h { z3.h }, p0/Z, [x22]\n" - "fmla z14.h, z5.h, z1.h[2]\n" - "fmla z17.h, z5.h, z1.h[3]\n" + "fmla z14.h, z6.h, z7.h[2]\n" + "fmla z17.h, z6.h, z7.h[3]\n" "ld1h { z4.h }, p0/Z, [x21]\n" - "fmla z20.h, z5.h, z1.h[4]\n" - "fmla z23.h, z5.h, z1.h[5]\n" - "fmla z26.h, z5.h, z1.h[6]\n" - "fmla z29.h, z5.h, z1.h[7]\n" - "fmla z9.h, z6.h, z1.h[0]\n" - "fmla z12.h, z6.h, z1.h[1]\n" - "fmla z15.h, z6.h, z1.h[2]\n" - "fmla z18.h, z6.h, z1.h[3]\n" - "fmla z21.h, z6.h, z1.h[4]\n" - "fmla z24.h, z6.h, z1.h[5]\n" - "fmla z27.h, z6.h, z1.h[6]\n" - "fmla z30.h, z6.h, z1.h[7]\n" - "fmla z10.h, z7.h, z1.h[0]\n" - "fmla z13.h, z7.h, z1.h[1]\n" - "fmla z16.h, z7.h, z1.h[2]\n" - "fmla z19.h, z7.h, z1.h[3]\n" - "fmla z22.h, z7.h, z1.h[4]\n" - "fmla z25.h, z7.h, z1.h[5]\n" - "fmla z28.h, z7.h, z1.h[6]\n" - "fmla z31.h, z7.h, z1.h[7]\n" + "fmla z20.h, z6.h, z7.h[4]\n" + "fmla z23.h, z6.h, z7.h[5]\n" + "fmla z26.h, z6.h, z7.h[6]\n" + "fmla z29.h, z6.h, z7.h[7]\n" + "fmla z9.h, z5.h, z7.h[0]\n" + "fmla z12.h, z5.h, z7.h[1]\n" + "fmla z15.h, z5.h, z7.h[2]\n" + "fmla z18.h, z5.h, z7.h[3]\n" + "fmla z21.h, z5.h, z7.h[4]\n" + "fmla z24.h, z5.h, z7.h[5]\n" + "fmla z27.h, z5.h, z7.h[6]\n" + "fmla z30.h, z5.h, z7.h[7]\n" + "fmla z10.h, z1.h, z7.h[0]\n" + "fmla z13.h, z1.h, z7.h[1]\n" + "fmla z16.h, z1.h, z7.h[2]\n" + "fmla z19.h, z1.h, z7.h[3]\n" + "fmla z22.h, z1.h, z7.h[4]\n" + "fmla z25.h, z1.h, z7.h[5]\n" + "fmla z28.h, z1.h, z7.h[6]\n" + "fmla z31.h, z1.h, z7.h[7]\n" "bge 4b\n" "5:" // main loop skip "fmla z8.h, z2.h, z0.h[0]\n" @@ -174,7 +174,7 @@ void sve_ffinterleaved_fp16_mla_8x3VL( "add %x[Apanel], %x[Apanel], #0x10\n" "fmla z14.h, z2.h, z0.h[2]\n" "fmla z17.h, z2.h, z0.h[3]\n" - "addvl x26, x26, #1\n" + "addvl x24, x24, #1\n" "fmla z20.h, z2.h, z0.h[4]\n" "fmla z23.h, z2.h, z0.h[5]\n" "addvl x22, x22, #1\n" @@ -198,39 +198,39 @@ void sve_ffinterleaved_fp16_mla_8x3VL( "fmla z28.h, z4.h, z0.h[6]\n" "fmla z31.h, z4.h, z0.h[7]\n" "cbz x20, 6f\n" - "ld1rqh { z0.h }, p0/Z, [%x[Apanel]]\n" - "ld1h { z5.h }, p0/Z, [x26]\n" - "fmla z8.h, z5.h, z0.h[0]\n" - "ld1h { z6.h }, p0/Z, [x22]\n" - "ld1h { z7.h }, p0/Z, [x21]\n" - "fmla z11.h, z5.h, z0.h[1]\n" - "fmla z14.h, z5.h, z0.h[2]\n" - "fmla z17.h, z5.h, z0.h[3]\n" + "ld1rqh { z3.h }, p0/Z, [%x[Apanel]]\n" + "ld1h { z2.h }, p0/Z, [x24]\n" + "fmla z8.h, z2.h, z3.h[0]\n" + "ld1h { z1.h }, p0/Z, [x22]\n" + "ld1h { z0.h }, p0/Z, [x21]\n" + "fmla z11.h, z2.h, z3.h[1]\n" + "fmla z14.h, z2.h, z3.h[2]\n" + "fmla z17.h, z2.h, z3.h[3]\n" "add %x[Apanel], %x[Apanel], #0x10\n" - "fmla z20.h, z5.h, z0.h[4]\n" - "fmla z23.h, z5.h, z0.h[5]\n" - "fmla z26.h, z5.h, z0.h[6]\n" - "fmla z29.h, z5.h, z0.h[7]\n" - "fmla z9.h, z6.h, z0.h[0]\n" - "fmla z12.h, z6.h, z0.h[1]\n" - "fmla z15.h, z6.h, z0.h[2]\n" - "fmla z18.h, z6.h, z0.h[3]\n" - "fmla z21.h, z6.h, z0.h[4]\n" - "fmla z24.h, z6.h, z0.h[5]\n" - "fmla z27.h, z6.h, z0.h[6]\n" - "fmla z30.h, z6.h, z0.h[7]\n" - "fmla z10.h, z7.h, z0.h[0]\n" - "fmla z13.h, z7.h, z0.h[1]\n" - "fmla z16.h, z7.h, z0.h[2]\n" - "fmla z19.h, z7.h, z0.h[3]\n" - "fmla z22.h, z7.h, z0.h[4]\n" - "fmla z25.h, z7.h, z0.h[5]\n" - "fmla z28.h, z7.h, z0.h[6]\n" - "fmla z31.h, z7.h, z0.h[7]\n" + "fmla z20.h, z2.h, z3.h[4]\n" + "fmla z23.h, z2.h, z3.h[5]\n" + "fmla z26.h, z2.h, z3.h[6]\n" + "fmla z29.h, z2.h, z3.h[7]\n" + "fmla z9.h, z1.h, z3.h[0]\n" + "fmla z12.h, z1.h, z3.h[1]\n" + "fmla z15.h, z1.h, z3.h[2]\n" + "fmla z18.h, z1.h, z3.h[3]\n" + "fmla z21.h, z1.h, z3.h[4]\n" + "fmla z24.h, z1.h, z3.h[5]\n" + "fmla z27.h, z1.h, z3.h[6]\n" + "fmla z30.h, z1.h, z3.h[7]\n" + "fmla z10.h, z0.h, z3.h[0]\n" + "fmla z13.h, z0.h, z3.h[1]\n" + "fmla z16.h, z0.h, z3.h[2]\n" + "fmla z19.h, z0.h, z3.h[3]\n" + "fmla z22.h, z0.h, z3.h[4]\n" + "fmla z25.h, z0.h, z3.h[5]\n" + "fmla z28.h, z0.h, z3.h[6]\n" + "fmla z31.h, z0.h, z3.h[7]\n" "6:" // multiply loop done - "dech x25, ALL, MUL #3\n" + "dech x26, ALL, MUL #3\n" "st1h { z8.h }, p0, [%x[Cpanel]]\n" - "cmp x25, XZR\n" + "cmp x26, XZR\n" "st1h { z9.h }, p0, [%x[Cpanel], #1, MUL VL]\n" "st1h { z10.h }, p0, [%x[Cpanel], #2, MUL VL]\n" "st1h { z11.h }, p0, [%x[Cpanel], #3, MUL VL]\n" -- cgit v1.2.1