From e28cf395b57a091d0850cd28cecc81046153b843 Mon Sep 17 00:00:00 2001 From: Georgios Pinitas Date: Sun, 31 Jan 2021 05:18:43 +0000 Subject: Regenerate kernels and update A55 versions Signed-off-by: Georgios Pinitas Change-Id: I9eae76c77db03b8806af65729da34ab2d77f95f2 Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4965 Tested-by: Arm Jenkins Reviewed-by: Michele Di Giorgio Comments-Addressed: Arm Jenkins --- .../a64_interleave8_block1_s8_s16_summing.hpp | 240 ++++++++++----------- 1 file changed, 120 insertions(+), 120 deletions(-) (limited to 'src/core/NEON/kernels/arm_gemm/indirect-interleaves/a64_interleave8_block1_s8_s16_summing.hpp') diff --git a/src/core/NEON/kernels/arm_gemm/indirect-interleaves/a64_interleave8_block1_s8_s16_summing.hpp b/src/core/NEON/kernels/arm_gemm/indirect-interleaves/a64_interleave8_block1_s8_s16_summing.hpp index 35dc3dc0d4..b710861417 100644 --- a/src/core/NEON/kernels/arm_gemm/indirect-interleaves/a64_interleave8_block1_s8_s16_summing.hpp +++ b/src/core/NEON/kernels/arm_gemm/indirect-interleaves/a64_interleave8_block1_s8_s16_summing.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2020 Arm Limited. + * Copyright (c) 2019-2021 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -96,72 +96,72 @@ void interleave_block<8, 1, VLType::None, true>( "movi v1.8h, #0x0\n" "4:" // no_accumulate_16 "ldr d30, [x27], #0x8\n" - "prfm pldl1keep, [x27, #0x70]\n" + "sshll v30.8h, v30.8b, #0x0\n" "ldr d29, [x26], #0x8\n" + "add x19, x19, #0x1\n" + "sshll v29.8h, v29.8b, #0x0\n" "ldr d28, [x25], #0x8\n" - "prfm pldl1keep, [x26, #0x70]\n" + "subs %x[width], %x[width], #0x8\n" + "sshll v28.8h, v28.8b, #0x0\n" "ldr d27, [x24], #0x8\n" + "cmp %x[width], #0x8\n" + "sshll v27.8h, v27.8b, #0x0\n" + "ldr d24, [x23], #0x8\n" + "ldr d23, [x22], #0x8\n" + "sshll v24.8h, v24.8b, #0x0\n" + "ldr d21, [x21], #0x8\n" + "sshll v23.8h, v23.8b, #0x0\n" + "ldr d26, [x20], #0x8\n" + "zip1 v20.8h, v30.8h, v24.8h\n" + "prfm pldl1keep, [x27, #0x70]\n" + "zip1 v25.8h, v29.8h, v23.8h\n" + "prfm pldl1keep, [x26, #0x70]\n" + "zip2 v24.8h, v30.8h, v24.8h\n" "prfm pldl1keep, [x25, #0x70]\n" - "ldr d23, [x23], #0x8\n" - "ldr d21, [x22], #0x8\n" + "zip2 v23.8h, v29.8h, v23.8h\n" "prfm pldl1keep, [x24, #0x70]\n" - "ldr d26, [x21], #0x8\n" - "ldr d25, [x20], #0x8\n" + "sshll v21.8h, v21.8b, #0x0\n" "prfm pldl1keep, [x23, #0x70]\n" + "zip1 v19.8h, v28.8h, v21.8h\n" "prfm pldl1keep, [x22, #0x70]\n" - "sshll v30.8h, v30.8b, #0x0\n" - "sshll v29.8h, v29.8b, #0x0\n" + "zip1 v22.8h, v20.8h, v19.8h\n" "prfm pldl1keep, [x21, #0x70]\n" - "sshll v28.8h, v28.8b, #0x0\n" + "zip2 v19.8h, v20.8h, v19.8h\n" "prfm pldl1keep, [x20, #0x70]\n" - "sshll v27.8h, v27.8b, #0x0\n" - "sshll v23.8h, v23.8b, #0x0\n" - "zip1 v24.8h, v30.8h, v23.8h\n" - "sshll v21.8h, v21.8b, #0x0\n" - "zip2 v23.8h, v30.8h, v23.8h\n" + "zip2 v20.8h, v28.8h, v21.8h\n" + "zip1 v21.8h, v24.8h, v20.8h\n" + "zip2 v20.8h, v24.8h, v20.8h\n" "sshll v26.8h, v26.8b, #0x0\n" - "sshll v25.8h, v25.8b, #0x0\n" - "zip1 v22.8h, v29.8h, v21.8h\n" - "add x19, x19, #0x1\n" - "zip2 v21.8h, v29.8h, v21.8h\n" - "subs %x[width], %x[width], #0x8\n" - "zip1 v20.8h, v28.8h, v26.8h\n" - "cmp %x[width], #0x8\n" - "zip1 v18.8h, v24.8h, v20.8h\n" - "zip1 v19.8h, v27.8h, v25.8h\n" - "zip1 v17.8h, v22.8h, v19.8h\n" - "zip1 v16.8h, v18.8h, v17.8h\n" + "zip1 v18.8h, v27.8h, v26.8h\n" + "zip1 v17.8h, v25.8h, v18.8h\n" + "zip1 v16.8h, v22.8h, v17.8h\n" "str q16, [%x[out_ptr], #0x0]\n" "add v1.8h, v1.8h, v16.8h\n" - "zip2 v16.8h, v18.8h, v17.8h\n" - "str q16, [%x[out_ptr], #0x10]\n" - "zip2 v18.8h, v24.8h, v20.8h\n" - "add v1.8h, v1.8h, v16.8h\n" - "zip2 v17.8h, v22.8h, v19.8h\n" - "zip1 v16.8h, v18.8h, v17.8h\n" - "str q16, [%x[out_ptr], #0x20]\n" - "add v1.8h, v1.8h, v16.8h\n" - "zip2 v16.8h, v18.8h, v17.8h\n" + "zip2 v17.8h, v22.8h, v17.8h\n" + "str q17, [%x[out_ptr], #0x10]\n" + "zip2 v16.8h, v25.8h, v18.8h\n" + "add v1.8h, v1.8h, v17.8h\n" + "zip1 v17.8h, v19.8h, v16.8h\n" + "str q17, [%x[out_ptr], #0x20]\n" + "zip2 v16.8h, v19.8h, v16.8h\n" "str q16, [%x[out_ptr], #0x30]\n" - "zip2 v20.8h, v28.8h, v26.8h\n" + "add v1.8h, v1.8h, v17.8h\n" + "zip2 v19.8h, v27.8h, v26.8h\n" + "zip1 v17.8h, v23.8h, v19.8h\n" "add v1.8h, v1.8h, v16.8h\n" - "zip1 v18.8h, v23.8h, v20.8h\n" - "zip2 v19.8h, v27.8h, v25.8h\n" - "zip1 v17.8h, v21.8h, v19.8h\n" - "zip1 v16.8h, v18.8h, v17.8h\n" + "zip1 v16.8h, v21.8h, v17.8h\n" "str q16, [%x[out_ptr], #0x40]\n" + "zip2 v18.8h, v21.8h, v17.8h\n" + "str q18, [%x[out_ptr], #0x50]\n" "add v1.8h, v1.8h, v16.8h\n" - "zip2 v16.8h, v18.8h, v17.8h\n" - "str q16, [%x[out_ptr], #0x50]\n" - "zip2 v18.8h, v23.8h, v20.8h\n" - "add v1.8h, v1.8h, v16.8h\n" - "zip2 v17.8h, v21.8h, v19.8h\n" - "zip1 v16.8h, v18.8h, v17.8h\n" - "str q16, [%x[out_ptr], #0x60]\n" - "add v1.8h, v1.8h, v16.8h\n" - "zip2 v16.8h, v18.8h, v17.8h\n" + "zip2 v16.8h, v23.8h, v19.8h\n" + "zip1 v17.8h, v20.8h, v16.8h\n" + "str q17, [%x[out_ptr], #0x60]\n" + "add v1.8h, v1.8h, v18.8h\n" + "zip2 v16.8h, v20.8h, v16.8h\n" "str q16, [%x[out_ptr], #0x70]\n" "add %x[out_ptr], %x[out_ptr], #0x80\n" + "add v1.8h, v1.8h, v17.8h\n" "add v1.8h, v1.8h, v16.8h\n" "bge 3b\n" "5:" // Main loop skip @@ -171,148 +171,148 @@ void interleave_block<8, 1, VLType::None, true>( "ldr s29, [x26], #0x4\n" "ldr s28, [x25], #0x4\n" "ldr s27, [x24], #0x4\n" - "ldr s23, [x23], #0x4\n" - "ldr s21, [x22], #0x4\n" - "ldr s26, [x21], #0x4\n" - "ldr s25, [x20], #0x4\n" + "ldr s24, [x23], #0x4\n" + "ldr s23, [x22], #0x4\n" + "ldr s21, [x21], #0x4\n" + "ldr s26, [x20], #0x4\n" "tbz %x[width], #1, 6f\n" "ld1 { v30.h }[2], [x27], #0x2\n" + "mov x19, #0x6\n" "ld1 { v29.h }[2], [x26], #0x2\n" "ld1 { v28.h }[2], [x25], #0x2\n" "ld1 { v27.h }[2], [x24], #0x2\n" - "ld1 { v23.h }[2], [x23], #0x2\n" - "ld1 { v21.h }[2], [x22], #0x2\n" - "ld1 { v26.h }[2], [x21], #0x2\n" - "ld1 { v25.h }[2], [x20], #0x2\n" - "mov x19, #0x6\n" + "ld1 { v24.h }[2], [x23], #0x2\n" + "ld1 { v23.h }[2], [x22], #0x2\n" + "ld1 { v21.h }[2], [x21], #0x2\n" + "ld1 { v26.h }[2], [x20], #0x2\n" "tbz %x[width], #0, 9f\n" "ld1 { v30.b }[6], [x27]\n" + "mov x19, #0x7\n" "ld1 { v29.b }[6], [x26]\n" "ld1 { v28.b }[6], [x25]\n" "ld1 { v27.b }[6], [x24]\n" - "ld1 { v23.b }[6], [x23]\n" - "ld1 { v21.b }[6], [x22]\n" - "ld1 { v26.b }[6], [x21]\n" - "ld1 { v25.b }[6], [x20]\n" - "mov x19, #0x7\n" + "ld1 { v24.b }[6], [x23]\n" + "ld1 { v23.b }[6], [x22]\n" + "ld1 { v21.b }[6], [x21]\n" + "ld1 { v26.b }[6], [x20]\n" "b 9f\n" "6:" // odd_loads_1_4 "mov x19, #0x4\n" "tbz %x[width], #0, 9f\n" "ld1 { v30.b }[4], [x27]\n" "ld1 { v29.b }[4], [x26]\n" + "mov x19, #0x5\n" "ld1 { v28.b }[4], [x25]\n" "ld1 { v27.b }[4], [x24]\n" - "ld1 { v23.b }[4], [x23]\n" - "ld1 { v21.b }[4], [x22]\n" - "ld1 { v26.b }[4], [x21]\n" - "ld1 { v25.b }[4], [x20]\n" - "mov x19, #0x5\n" + "ld1 { v24.b }[4], [x23]\n" + "ld1 { v23.b }[4], [x22]\n" + "ld1 { v21.b }[4], [x21]\n" + "ld1 { v26.b }[4], [x20]\n" "b 9f\n" "7:" // odd_loads_2_0 "tbz %x[width], #1, 8f\n" "ldr h30, [x27], #0x2\n" "ldr h29, [x26], #0x2\n" + "mov x19, #0x2\n" "ldr h28, [x25], #0x2\n" "ldr h27, [x24], #0x2\n" - "ldr h23, [x23], #0x2\n" - "ldr h21, [x22], #0x2\n" - "ldr h26, [x21], #0x2\n" - "ldr h25, [x20], #0x2\n" - "mov x19, #0x2\n" + "ldr h24, [x23], #0x2\n" + "ldr h23, [x22], #0x2\n" + "ldr h21, [x21], #0x2\n" + "ldr h26, [x20], #0x2\n" "tbz %x[width], #0, 9f\n" "ld1 { v30.b }[2], [x27]\n" + "mov x19, #0x3\n" "ld1 { v29.b }[2], [x26]\n" "ld1 { v28.b }[2], [x25]\n" "ld1 { v27.b }[2], [x24]\n" - "ld1 { v23.b }[2], [x23]\n" - "ld1 { v21.b }[2], [x22]\n" - "ld1 { v26.b }[2], [x21]\n" - "ld1 { v25.b }[2], [x20]\n" - "mov x19, #0x3\n" + "ld1 { v24.b }[2], [x23]\n" + "ld1 { v23.b }[2], [x22]\n" + "ld1 { v21.b }[2], [x21]\n" + "ld1 { v26.b }[2], [x20]\n" "b 9f\n" "8:" // odd_loads_1_0 "ldr b30, [x27, #0x0]\n" + "mov x19, #0x1\n" "ldr b29, [x26, #0x0]\n" "ldr b28, [x25, #0x0]\n" "ldr b27, [x24, #0x0]\n" - "ldr b23, [x23, #0x0]\n" - "ldr b21, [x22, #0x0]\n" - "ldr b26, [x21, #0x0]\n" - "ldr b25, [x20, #0x0]\n" - "mov x19, #0x1\n" + "ldr b24, [x23, #0x0]\n" + "ldr b23, [x22, #0x0]\n" + "ldr b21, [x21, #0x0]\n" + "ldr b26, [x20, #0x0]\n" "9:" // Odd load end "sshll v30.8h, v30.8b, #0x0\n" + "subs x19, x19, #0x1\n" "sshll v29.8h, v29.8b, #0x0\n" "sshll v28.8h, v28.8b, #0x0\n" "sshll v27.8h, v27.8b, #0x0\n" + "sshll v24.8h, v24.8b, #0x0\n" + "zip1 v20.8h, v30.8h, v24.8h\n" "sshll v23.8h, v23.8b, #0x0\n" - "zip1 v24.8h, v30.8h, v23.8h\n" + "zip1 v25.8h, v29.8h, v23.8h\n" "sshll v21.8h, v21.8b, #0x0\n" + "zip1 v19.8h, v28.8h, v21.8h\n" + "zip1 v22.8h, v20.8h, v19.8h\n" "sshll v26.8h, v26.8b, #0x0\n" - "zip1 v20.8h, v28.8h, v26.8h\n" - "sshll v25.8h, v25.8b, #0x0\n" - "zip1 v22.8h, v29.8h, v21.8h\n" - "subs x19, x19, #0x1\n" - "zip1 v18.8h, v24.8h, v20.8h\n" - "zip1 v19.8h, v27.8h, v25.8h\n" - "zip1 v17.8h, v22.8h, v19.8h\n" - "zip1 v16.8h, v18.8h, v17.8h\n" + "zip1 v18.8h, v27.8h, v26.8h\n" + "zip1 v17.8h, v25.8h, v18.8h\n" + "zip1 v16.8h, v22.8h, v17.8h\n" "str q16, [%x[out_ptr], #0x0]\n" - "add v1.8h, v1.8h, v16.8h\n" "add %x[out_ptr], %x[out_ptr], #0x10\n" + "add v1.8h, v1.8h, v16.8h\n" "beq 10f\n" - "zip2 v16.8h, v18.8h, v17.8h\n" + "zip2 v17.8h, v22.8h, v17.8h\n" + "str q17, [%x[out_ptr], #0x0]\n" "subs x19, x19, #0x1\n" - "add v1.8h, v1.8h, v16.8h\n" - "str q16, [%x[out_ptr], #0x0]\n" + "add v1.8h, v1.8h, v17.8h\n" "add %x[out_ptr], %x[out_ptr], #0x10\n" "beq 10f\n" - "zip2 v18.8h, v24.8h, v20.8h\n" - "zip2 v17.8h, v22.8h, v19.8h\n" + "zip2 v19.8h, v20.8h, v19.8h\n" + "zip2 v16.8h, v25.8h, v18.8h\n" "subs x19, x19, #0x1\n" - "zip1 v16.8h, v18.8h, v17.8h\n" - "str q16, [%x[out_ptr], #0x0]\n" - "add v1.8h, v1.8h, v16.8h\n" + "zip1 v17.8h, v19.8h, v16.8h\n" + "str q17, [%x[out_ptr], #0x0]\n" "add %x[out_ptr], %x[out_ptr], #0x10\n" + "add v1.8h, v1.8h, v17.8h\n" "beq 10f\n" - "zip2 v16.8h, v18.8h, v17.8h\n" + "zip2 v16.8h, v19.8h, v16.8h\n" + "str q16, [%x[out_ptr], #0x0]\n" "subs x19, x19, #0x1\n" "add v1.8h, v1.8h, v16.8h\n" - "str q16, [%x[out_ptr], #0x0]\n" "add %x[out_ptr], %x[out_ptr], #0x10\n" "beq 10f\n" - "zip2 v23.8h, v30.8h, v23.8h\n" - "zip2 v20.8h, v28.8h, v26.8h\n" + "zip2 v24.8h, v30.8h, v24.8h\n" + "zip2 v20.8h, v28.8h, v21.8h\n" "subs x19, x19, #0x1\n" - "zip1 v18.8h, v23.8h, v20.8h\n" - "zip2 v21.8h, v29.8h, v21.8h\n" - "zip2 v19.8h, v27.8h, v25.8h\n" - "zip1 v17.8h, v21.8h, v19.8h\n" - "zip1 v16.8h, v18.8h, v17.8h\n" + "zip1 v21.8h, v24.8h, v20.8h\n" + "zip2 v23.8h, v29.8h, v23.8h\n" + "zip2 v19.8h, v27.8h, v26.8h\n" + "zip1 v17.8h, v23.8h, v19.8h\n" + "zip1 v16.8h, v21.8h, v17.8h\n" "str q16, [%x[out_ptr], #0x0]\n" - "add v1.8h, v1.8h, v16.8h\n" "add %x[out_ptr], %x[out_ptr], #0x10\n" + "add v1.8h, v1.8h, v16.8h\n" "beq 10f\n" - "zip2 v16.8h, v18.8h, v17.8h\n" + "zip2 v18.8h, v21.8h, v17.8h\n" + "str q18, [%x[out_ptr], #0x0]\n" "subs x19, x19, #0x1\n" - "add v1.8h, v1.8h, v16.8h\n" - "str q16, [%x[out_ptr], #0x0]\n" + "add v1.8h, v1.8h, v18.8h\n" "add %x[out_ptr], %x[out_ptr], #0x10\n" "beq 10f\n" - "zip2 v18.8h, v23.8h, v20.8h\n" - "zip2 v17.8h, v21.8h, v19.8h\n" - "zip1 v16.8h, v18.8h, v17.8h\n" - "str q16, [%x[out_ptr], #0x0]\n" - "add v1.8h, v1.8h, v16.8h\n" + "zip2 v20.8h, v24.8h, v20.8h\n" + "zip2 v16.8h, v23.8h, v19.8h\n" + "zip1 v17.8h, v20.8h, v16.8h\n" + "str q17, [%x[out_ptr], #0x0]\n" "add %x[out_ptr], %x[out_ptr], #0x10\n" + "add v1.8h, v1.8h, v17.8h\n" "10:" // Odds skip "saddw v0.4s, v0.4s, v1.4h\n" "str q0, [%x[out_ptr], #0x0]\n" "saddw2 v31.4s, v31.4s, v1.8h\n" "str q31, [%x[out_ptr], #0x10]\n" "add %x[out_ptr], %x[out_ptr], #0x20\n" - : [out_ptr] "+r" (out_ptr), [width] "+r" (width) + : [out_ptr] "+&r" (out_ptr), [width] "+&r" (width) : [first] "r" (first), [height] "r" (height), [in] "r" (in), [row_offset] "r" (row_offset) : "cc", "memory", "v0", "v1", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27" ); -- cgit v1.2.1