From cfa2bba98169cb5ab1945462514be1b6badf7d98 Mon Sep 17 00:00:00 2001
From: Georgios Pinitas <georgios.pinitas@arm.com>
Date: Thu, 27 Jun 2019 17:00:52 +0100
Subject: COMPMID-2178: Update GEMM assembly code.

Perform offset reduction and requantization within the assembly wrapper.

Change-Id: I5d5b3e1f6f9ef4c71805362c57f88ff199c027a3
Signed-off-by: Georgios Pinitas <georgios.pinitas@arm.com>
Reviewed-on: https://review.mlplatform.org/c/1541
Comments-Addressed: Pablo Marquez <pablo.tello@arm.com>
Reviewed-by: Gian Marco Iodice <gianmarco.iodice@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
---
 src/core/NEON/kernels/arm_gemm/barrier.hpp | 83 ++++++++++++++++++++++++++++++
 1 file changed, 83 insertions(+)
 create mode 100644 src/core/NEON/kernels/arm_gemm/barrier.hpp

(limited to 'src/core/NEON/kernels/arm_gemm/barrier.hpp')

diff --git a/src/core/NEON/kernels/arm_gemm/barrier.hpp b/src/core/NEON/kernels/arm_gemm/barrier.hpp
new file mode 100644
index 0000000000..cfd1079f74
--- /dev/null
+++ b/src/core/NEON/kernels/arm_gemm/barrier.hpp
@@ -0,0 +1,83 @@
+/*
+ * Copyright (c) 2019 ARM Limited.
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to
+ * deal in the Software without restriction, including without limitation the
+ * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+#pragma once
+
+#ifndef NO_MULTI_THREADING
+
+#include <atomic>
+
+namespace arm_gemm {
+
+class barrier {
+private:
+    unsigned int        m_threads;
+
+    std::atomic<unsigned int> m_waiters;
+    std::atomic<unsigned int> m_leavers;
+
+public:
+    barrier(unsigned int threads) : m_threads(threads), m_waiters(0), m_leavers(0) { }
+
+    /* This isn't safe if any thread is waiting... */
+    void set_nthreads(unsigned int nthreads) {
+        m_threads = nthreads;
+    }
+
+    void arrive_and_wait() {
+        m_waiters++;
+
+        while (m_waiters != m_threads) {
+            ; /* spin */
+        }
+
+        unsigned int v = m_leavers.fetch_add(1);
+
+        if (v == (m_threads - 1)) {
+            m_waiters -= m_threads;
+            m_leavers = 0;
+        } else {
+            while (m_leavers > 0) {
+                ; /* spin */
+            }
+        }
+    }
+};
+
+} // namespace arm_gemm
+
+#else
+
+namespace arm_gemm {
+
+class barrier {
+public:
+    barrier(unsigned int) { }
+
+    void arrive_and_wait() { }
+    void set_nthreads(unsigned int ) { }
+};
+
+} // namespace arm_gemm
+
+#endif
-- 
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