From ba209750abc1ac7e42bab9fef5db284384d70fb3 Mon Sep 17 00:00:00 2001
From: Michael Tyler <michael.tyler@arm.com>
Date: Thu, 15 Dec 2022 12:39:29 +0000
Subject: Update CPU kernels to remove x19

Resolves: COMPMID-5805
Signed-off-by: Michael Tyler <michael.tyler@arm.com>
Change-Id: I250f64531e209625e4ff176dd5a552c1c34bc484
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/8909
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Gunes Bayir <gunes.bayir@arm.com>
Reviewed-by: Viet-Hoa Do <viet-hoa.do@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
---
 .../generic.cpp                                    | 192 ++++----
 .../generic.cpp                                    | 396 ++++++++--------
 .../generic.cpp                                    | 156 +++----
 .../generic.cpp                                    | 392 ++++++++--------
 .../generic.cpp                                    | 192 ++++----
 .../generic.cpp                                    | 348 +++++++-------
 .../generic.cpp                                    | 156 +++----
 .../generic.cpp                                    | 344 +++++++-------
 .../a64_s8_nhwc_avg_generic_depthfirst/generic.cpp | 246 +++++-----
 .../generic.cpp                                    | 156 +++----
 .../a64_s8_nhwc_max_generic_depthfirst/generic.cpp | 478 +++++++++----------
 .../generic.cpp                                    | 252 +++++-----
 .../generic.cpp                                    | 496 ++++++++++----------
 .../a64_u8_nhwc_avg_generic_depthfirst/generic.cpp | 246 +++++-----
 .../generic.cpp                                    | 156 +++----
 .../a64_u8_nhwc_max_generic_depthfirst/generic.cpp | 478 +++++++++----------
 .../generic.cpp                                    | 264 +++++------
 .../generic.cpp                                    | 518 ++++++++++-----------
 .../generic.cpp                                    | 146 +++---
 .../generic.cpp                                    | 188 ++++----
 .../generic.cpp                                    | 126 ++---
 .../generic.cpp                                    | 186 ++++----
 .../generic.cpp                                    | 146 +++---
 .../generic.cpp                                    | 188 ++++----
 .../generic.cpp                                    | 126 ++---
 .../generic.cpp                                    | 186 ++++----
 .../sme_s8_nhwc_avg_generic_depthfirst/generic.cpp | 147 +++---
 .../generic.cpp                                    | 126 ++---
 .../sme_s8_nhwc_max_generic_depthfirst/generic.cpp | 186 ++++----
 .../generic.cpp                                    | 149 +++---
 .../generic.cpp                                    | 212 ++++-----
 .../sme_u8_nhwc_avg_generic_depthfirst/generic.cpp | 147 +++---
 .../generic.cpp                                    | 126 ++---
 .../sme_u8_nhwc_max_generic_depthfirst/generic.cpp | 186 ++++----
 .../generic.cpp                                    | 155 +++---
 .../generic.cpp                                    | 228 ++++-----
 .../generic.cpp                                    | 146 +++---
 .../generic.cpp                                    | 188 ++++----
 .../generic.cpp                                    | 120 ++---
 .../generic.cpp                                    | 186 ++++----
 .../generic.cpp                                    | 146 +++---
 .../generic.cpp                                    | 188 ++++----
 .../generic.cpp                                    | 120 ++---
 .../generic.cpp                                    | 186 ++++----
 .../sve_s8_nhwc_avg_generic_depthfirst/generic.cpp | 140 +++---
 .../generic.cpp                                    | 120 ++---
 .../sve_s8_nhwc_max_generic_depthfirst/generic.cpp | 186 ++++----
 .../generic.cpp                                    | 140 +++---
 .../generic.cpp                                    | 212 ++++-----
 .../sve_u8_nhwc_avg_generic_depthfirst/generic.cpp | 140 +++---
 .../generic.cpp                                    | 120 ++---
 .../sve_u8_nhwc_max_generic_depthfirst/generic.cpp | 186 ++++----
 .../generic.cpp                                    | 148 +++---
 .../generic.cpp                                    | 228 ++++-----
 54 files changed, 5662 insertions(+), 5658 deletions(-)

(limited to 'src/core/NEON/kernels/arm_conv/pooling/kernels')

diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_fp16_nhwc_avg_3x3_s1_output2x2_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_fp16_nhwc_avg_3x3_s1_output2x2_depthfirst/generic.cpp
index 4d71f94f1a..647103d3a4 100644
--- a/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_fp16_nhwc_avg_3x3_s1_output2x2_depthfirst/generic.cpp
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_fp16_nhwc_avg_3x3_s1_output2x2_depthfirst/generic.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2021-2022 Arm Limited.
+ * Copyright (c) 2021-2023 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -82,90 +82,90 @@ void a64_fp16_nhwc_avg_3x3_s1_output2x2_depthfirst_impl(
                         pad_left, pad_top, pad_right, pad_bottom);
 
   __asm__ __volatile__(
-    "ldr x4, [%x[args], %[offsetof_n_channels]]\n"
-    "ldr x20, [%x[args], %[offsetof_outptrs]]\n"
-    "cmp x4, #0x8\n"
-    "mov x5, #0x0\n"
-    "ldr x19, [%x[args], %[offsetof_inptrs]]\n"
-    "ldp x6, x7, [x20, #0x0]\n"
-    "mov x8, #0x0\n"
-    "ldp x17, x16, [x20, #0x10]\n"
-    "ldp x15, x14, [x19, #0x0]\n"
-    "ldp x13, x12, [x19, #0x10]\n"
-    "ldp x11, x10, [x19, #0x20]\n"
-    "ldp x9, x28, [x19, #0x30]\n"
-    "ldp x27, x26, [x19, #0x40]\n"
-    "ldp x25, x24, [x19, #0x50]\n"
-    "ldp x23, x22, [x19, #0x60]\n"
-    "ldp x21, x20, [x19, #0x70]\n"
     "ldr d7, [%x[args], %[offsetof_rescale]]\n"
+    "ldr x3, [%x[args], %[offsetof_n_channels]]\n"
+    "cmp x3, #0x8\n"
+    "mov x4, #0x0\n"
+    "ldr x21, [%x[args], %[offsetof_outptrs]]\n"
+    "ldr x20, [%x[args], %[offsetof_inptrs]]\n"
+    "mov x5, #0x0\n"
+    "ldp x6, x7, [x21, #0x0]\n"
+    "ldp x8, x17, [x21, #0x10]\n"
+    "ldp x16, x15, [x20, #0x0]\n"
+    "ldp x14, x13, [x20, #0x10]\n"
+    "ldp x12, x11, [x20, #0x20]\n"
+    "ldp x10, x9, [x20, #0x30]\n"
+    "ldp x28, x27, [x20, #0x40]\n"
+    "ldp x26, x25, [x20, #0x50]\n"
+    "ldp x24, x23, [x20, #0x60]\n"
+    "ldp x22, x21, [x20, #0x70]\n"
     "blt 3f\n"
-    "lsr x19, x4, #0x3\n"
-    "sub x4, x4, x19, LSL #3\n"
-    "ldr q6, [x10, x5]\n"
-    "ldr q5, [x9, x5]\n"
-    "subs x19, x19, #0x1\n"
-    "ldr q4, [x26, x5]\n"
-    "ldr q3, [x25, x5]\n"
-    "ldr q2, [x14, x5]\n"
-    "ldr q1, [x13, x5]\n"
-    "ldr q0, [x11, x5]\n"
-    "ldr q31, [x27, x5]\n"
-    "ldr q30, [x28, x5]\n"
-    "ldr q29, [x24, x5]\n"
-    "ldr q28, [x22, x5]\n"
-    "ldr q27, [x21, x5]\n"
-    "ldr q26, [x15, x5]\n"
-    "ldr q25, [x12, x5]\n"
-    "ldr q24, [x23, x5]\n"
-    "ldr q23, [x20, x5]\n"
-    "add x5, x5, #0x10\n"
+    "ldr q6, [x11, x4]\n"
+    "ldr q5, [x10, x4]\n"
+    "lsr x20, x3, #0x3\n"
+    "sub x3, x3, x20, LSL #3\n"
+    "ldr q4, [x27, x4]\n"
+    "ldr q3, [x26, x4]\n"
+    "subs x20, x20, #0x1\n"
+    "ldr q2, [x15, x4]\n"
+    "ldr q1, [x14, x4]\n"
+    "ldr q0, [x12, x4]\n"
+    "ldr q31, [x28, x4]\n"
+    "ldr q30, [x9, x4]\n"
+    "ldr q29, [x25, x4]\n"
+    "ldr q28, [x23, x4]\n"
+    "ldr q27, [x22, x4]\n"
+    "ldr q26, [x16, x4]\n"
+    "ldr q25, [x13, x4]\n"
+    "ldr q24, [x24, x4]\n"
+    "ldr q23, [x21, x4]\n"
+    "add x4, x4, #0x10\n"
     "beq 2f\n"
     "1:"  // Vector: Loop
     "fadd v17.8h, v6.8h, v5.8h\n"
+    "ldr q6, [x11, x4]\n"
+    "ldr q5, [x10, x4]\n"
     "fadd v16.8h, v4.8h, v3.8h\n"
-    "subs x19, x19, #0x1\n"
-    "ldr q6, [x10, x5]\n"
+    "ldr q4, [x27, x4]\n"
+    "ldr q3, [x26, x4]\n"
     "fadd v19.8h, v17.8h, v16.8h\n"
     "fadd v18.8h, v2.8h, v1.8h\n"
-    "ldr q5, [x9, x5]\n"
-    "ldr q4, [x26, x5]\n"
+    "ldr q2, [x15, x4]\n"
+    "ldr q1, [x14, x4]\n"
     "fadd v17.8h, v0.8h, v31.8h\n"
     "fadd v22.8h, v30.8h, v29.8h\n"
-    "ldr q3, [x25, x5]\n"
-    "ldr q2, [x14, x5]\n"
+    "ldr q0, [x12, x4]\n"
+    "ldr q31, [x28, x4]\n"
     "fadd v16.8h, v28.8h, v27.8h\n"
     "fadd v21.8h, v18.8h, v19.8h\n"
-    "ldr q1, [x13, x5]\n"
-    "ldr q0, [x11, x5]\n"
+    "ldr q30, [x9, x4]\n"
+    "ldr q29, [x25, x4]\n"
     "fadd v20.8h, v16.8h, v19.8h\n"
     "fadd v19.8h, v26.8h, v17.8h\n"
-    "ldr q31, [x27, x5]\n"
-    "ldr q30, [x28, x5]\n"
+    "ldr q28, [x23, x4]\n"
+    "ldr q27, [x22, x4]\n"
     "fadd v18.8h, v25.8h, v22.8h\n"
     "fadd v17.8h, v24.8h, v17.8h\n"
-    "ldr q29, [x24, x5]\n"
-    "ldr q28, [x22, x5]\n"
+    "ldr q26, [x16, x4]\n"
+    "ldr q25, [x13, x4]\n"
     "fadd v16.8h, v23.8h, v22.8h\n"
-    "fadd v19.8h, v19.8h, v21.8h\n"
-    "ldr q27, [x21, x5]\n"
-    "ldr q26, [x15, x5]\n"
-    "fadd v18.8h, v18.8h, v21.8h\n"
+    "fadd v19.8h, v21.8h, v19.8h\n"
+    "ldr q24, [x24, x4]\n"
+    "ldr q23, [x21, x4]\n"
+    "fadd v18.8h, v21.8h, v18.8h\n"
     "fadd v17.8h, v17.8h, v20.8h\n"
-    "ldr q25, [x12, x5]\n"
-    "ldr q24, [x23, x5]\n"
     "fadd v16.8h, v16.8h, v20.8h\n"
+    "subs x20, x20, #0x1\n"
     "fmul v19.8h, v19.8h, v7.h[0]\n"
-    "ldr q23, [x20, x5]\n"
-    "add x5, x5, #0x10\n"
+    "add x4, x4, #0x10\n"
     "fmul v18.8h, v18.8h, v7.h[1]\n"
     "fmul v17.8h, v17.8h, v7.h[2]\n"
-    "str q19, [x6, x8]\n"
+    "str q19, [x6, x5]\n"
     "fmul v16.8h, v16.8h, v7.h[3]\n"
-    "str q18, [x7, x8]\n"
-    "str q17, [x17, x8]\n"
-    "str q16, [x16, x8]\n"
-    "add x8, x8, #0x10\n"
+    "str q18, [x7, x5]\n"
+    "str q17, [x8, x5]\n"
+    "str q16, [x17, x5]\n"
+    "add x5, x5, #0x10\n"
     "bgt 1b\n"
     "2:"  // Vector: Tail
     "fadd v17.8h, v6.8h, v5.8h\n"
@@ -181,70 +181,70 @@ void a64_fp16_nhwc_avg_3x3_s1_output2x2_depthfirst_impl(
     "fadd v18.8h, v25.8h, v22.8h\n"
     "fadd v17.8h, v24.8h, v17.8h\n"
     "fadd v16.8h, v23.8h, v22.8h\n"
-    "fadd v19.8h, v19.8h, v21.8h\n"
-    "fadd v18.8h, v18.8h, v21.8h\n"
+    "fadd v19.8h, v21.8h, v19.8h\n"
+    "fadd v18.8h, v21.8h, v18.8h\n"
     "fadd v17.8h, v17.8h, v20.8h\n"
     "fadd v16.8h, v16.8h, v20.8h\n"
     "fmul v19.8h, v19.8h, v7.h[0]\n"
-    "str q19, [x6, x8]\n"
+    "str q19, [x6, x5]\n"
     "fmul v18.8h, v18.8h, v7.h[1]\n"
     "fmul v17.8h, v17.8h, v7.h[2]\n"
-    "str q18, [x7, x8]\n"
+    "str q18, [x7, x5]\n"
     "fmul v16.8h, v16.8h, v7.h[3]\n"
-    "str q17, [x17, x8]\n"
-    "str q16, [x16, x8]\n"
-    "add x8, x8, #0x10\n"
-    "cbz x4, 4f\n"
+    "str q17, [x8, x5]\n"
+    "str q16, [x17, x5]\n"
+    "add x5, x5, #0x10\n"
+    "cbz x3, 4f\n"
     "3:"  // Oddments
-    "ldr h6, [x10, x5]\n"
-    "ldr h5, [x9, x5]\n"
+    "ldr h6, [x11, x4]\n"
+    "ldr h5, [x10, x4]\n"
     "fadd v17.8h, v6.8h, v5.8h\n"
-    "subs x4, x4, #0x1\n"
-    "ldr h4, [x26, x5]\n"
-    "ldr h3, [x25, x5]\n"
+    "subs x3, x3, #0x1\n"
+    "ldr h4, [x27, x4]\n"
+    "ldr h3, [x26, x4]\n"
     "fadd v16.8h, v4.8h, v3.8h\n"
     "fadd v19.8h, v17.8h, v16.8h\n"
-    "ldr h2, [x14, x5]\n"
-    "ldr h1, [x13, x5]\n"
+    "ldr h2, [x15, x4]\n"
+    "ldr h1, [x14, x4]\n"
     "fadd v18.8h, v2.8h, v1.8h\n"
     "fadd v21.8h, v18.8h, v19.8h\n"
-    "ldr h0, [x11, x5]\n"
-    "ldr h31, [x27, x5]\n"
+    "ldr h0, [x12, x4]\n"
+    "ldr h31, [x28, x4]\n"
     "fadd v17.8h, v0.8h, v31.8h\n"
-    "ldr h30, [x28, x5]\n"
-    "ldr h29, [x24, x5]\n"
+    "ldr h30, [x9, x4]\n"
+    "ldr h29, [x25, x4]\n"
     "fadd v22.8h, v30.8h, v29.8h\n"
-    "ldr h28, [x22, x5]\n"
-    "ldr h27, [x21, x5]\n"
+    "ldr h28, [x23, x4]\n"
+    "ldr h27, [x22, x4]\n"
     "fadd v16.8h, v28.8h, v27.8h\n"
     "fadd v20.8h, v16.8h, v19.8h\n"
-    "ldr h26, [x15, x5]\n"
-    "ldr h25, [x12, x5]\n"
+    "ldr h26, [x16, x4]\n"
+    "ldr h25, [x13, x4]\n"
     "fadd v19.8h, v26.8h, v17.8h\n"
     "fadd v18.8h, v25.8h, v22.8h\n"
-    "ldr h24, [x23, x5]\n"
-    "ldr h23, [x20, x5]\n"
+    "ldr h24, [x24, x4]\n"
+    "ldr h23, [x21, x4]\n"
     "fadd v17.8h, v24.8h, v17.8h\n"
     "fadd v16.8h, v23.8h, v22.8h\n"
-    "fadd v19.8h, v19.8h, v21.8h\n"
-    "fadd v18.8h, v18.8h, v21.8h\n"
-    "add x5, x5, #0x2\n"
+    "fadd v19.8h, v21.8h, v19.8h\n"
+    "fadd v18.8h, v21.8h, v18.8h\n"
+    "add x4, x4, #0x2\n"
     "fadd v17.8h, v17.8h, v20.8h\n"
     "fadd v16.8h, v16.8h, v20.8h\n"
     "fmul v19.8h, v19.8h, v7.h[0]\n"
     "fmul v18.8h, v18.8h, v7.h[1]\n"
-    "str h19, [x6, x8]\n"
+    "str h19, [x6, x5]\n"
     "fmul v17.8h, v17.8h, v7.h[2]\n"
     "fmul v16.8h, v16.8h, v7.h[3]\n"
-    "str h18, [x7, x8]\n"
-    "str h17, [x17, x8]\n"
-    "str h16, [x16, x8]\n"
-    "add x8, x8, #0x2\n"
+    "str h18, [x7, x5]\n"
+    "str h17, [x8, x5]\n"
+    "str h16, [x17, x5]\n"
+    "add x5, x5, #0x2\n"
     "bgt 3b\n"
     "4:"  // End
     :
     : [args] "r" (&args), [offsetof_inptrs] "I" (offsetof(KernelArgs, inptrs)), [offsetof_n_channels] "I" (offsetof(KernelArgs, n_channels)), [offsetof_outptrs] "I" (offsetof(KernelArgs, outptrs)), [offsetof_rescale] "I" (offsetof(KernelArgs, rescale_vals))
-    : "cc", "memory", "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x4", "x5", "x6", "x7", "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x17", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28"
+    : "cc", "memory", "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x3", "x4", "x5", "x6", "x7", "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x17", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28"
   );
 }
 
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_fp16_nhwc_avg_generic_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_fp16_nhwc_avg_generic_depthfirst/generic.cpp
index fe6f4c20f4..44adb4ffcf 100644
--- a/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_fp16_nhwc_avg_generic_depthfirst/generic.cpp
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_fp16_nhwc_avg_generic_depthfirst/generic.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2021-2022 Arm Limited.
+ * Copyright (c) 2021-2023 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -43,306 +43,306 @@ void a64_fp16_nhwc_avg_generic_depthfirst_impl(
   const auto rescale_value = static_cast<__fp16>(1.0f / static_cast<float>(window_cells));
 
   __asm__ __volatile__(
+    "ld1r { v9.8h }, [%x[rescale_ptr]]\n"
     "cmp %x[n_channels], #0x20\n"
-    "ld1r { v7.8h }, [%x[rescale_ptr]]\n"
-    "mov x28, #0x0\n"
-    "mov x27, #0x10\n"  // cntb _, ALL, #1
-    "mov x26, #0x20\n"  // cntb _, ALL, #2
-    "mov x25, #0x30\n"  // cntb _, ALL, #3
+    "mov x9, #0x0\n"
+    "mov x28, #0x10\n"  // cntb _, ALL, #1
+    "mov x27, #0x20\n"  // cntb _, ALL, #2
+    "mov x26, #0x30\n"  // cntb _, ALL, #3
     "blt 7f\n"
     "1:"  // 4-vectors of channels
-    "lsr x24, %x[n_valid_cells], #0x2\n"
+    "lsr x25, %x[n_valid_cells], #0x2\n"
+    "movi v8.16b, #0x0\n"
+    "movi v7.16b, #0x0\n"
+    "mov x20, %x[inptrs]\n"
     "movi v6.16b, #0x0\n"
     "movi v5.16b, #0x0\n"
-    "mov x19, %x[inptrs]\n"
-    "movi v4.16b, #0x0\n"
-    "movi v3.16b, #0x0\n"
-    "cbz x24, 4f\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
-    "subs x24, x24, #0x1\n"
-    "add x19, x19, #0x20\n"
-    "ldr q2, [x23, x28]\n"
-    "ldr q1, [x22, x28]\n"
-    "ldr q0, [x21, x28]\n"
-    "ldr q31, [x20, x28]\n"
-    "ldr q30, [x23, x27]\n"
-    "ldr q22, [x22, x27]\n"
-    "ldr q29, [x21, x27]\n"
-    "ldr q28, [x20, x27]\n"
-    "ldr q27, [x23, x26]\n"
-    "ldr q21, [x22, x26]\n"
-    "ldr q26, [x21, x26]\n"
-    "ldr q17, [x20, x26]\n"
-    "ldr q25, [x23, x25]\n"
-    "ldr q20, [x22, x25]\n"
-    "ldr q24, [x21, x25]\n"
-    "ldr q16, [x20, x25]\n"
+    "cbz x25, 4f\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "ldr q4, [x24, x9]\n"
+    "subs x25, x25, #0x1\n"
+    "ldr q3, [x23, x9]\n"
+    "ldr q2, [x24, x28]\n"
+    "ldr q1, [x23, x28]\n"
+    "ldr q0, [x24, x27]\n"
+    "ldr q31, [x23, x27]\n"
+    "ldr q30, [x24, x26]\n"
+    "ldr q29, [x23, x26]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "add x20, x20, #0x20\n"
+    "ldr q28, [x22, x9]\n"
+    "ldr q22, [x21, x9]\n"
+    "ldr q27, [x22, x28]\n"
+    "ldr q21, [x21, x28]\n"
+    "ldr q26, [x22, x27]\n"
+    "ldr q20, [x21, x27]\n"
+    "ldr q25, [x22, x26]\n"
+    "ldr q24, [x21, x26]\n"
     "beq 3f\n"
     "2:"  // 4-vectors of channels: 4 inputs loop
-    "fadd v23.8h, v2.8h, v1.8h\n"
-    "fadd v19.8h, v0.8h, v31.8h\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
-    "fadd v22.8h, v30.8h, v22.8h\n"
-    "fadd v18.8h, v29.8h, v28.8h\n"
-    "subs x24, x24, #0x1\n"
-    "add x19, x19, #0x20\n"
-    "fadd v21.8h, v27.8h, v21.8h\n"
-    "fadd v17.8h, v26.8h, v17.8h\n"
-    "ldr q2, [x23, x28]\n"
-    "ldr q1, [x22, x28]\n"
-    "fadd v20.8h, v25.8h, v20.8h\n"
-    "fadd v16.8h, v24.8h, v16.8h\n"
-    "ldr q0, [x21, x28]\n"
-    "ldr q31, [x20, x28]\n"
+    "fadd v23.8h, v4.8h, v3.8h\n"
+    "fadd v19.8h, v28.8h, v22.8h\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "ldr q4, [x24, x9]\n"
+    "ldr q3, [x23, x9]\n"
+    "fadd v22.8h, v2.8h, v1.8h\n"
+    "ldr q2, [x24, x28]\n"
+    "fadd v18.8h, v27.8h, v21.8h\n"
+    "ldr q1, [x23, x28]\n"
+    "fadd v21.8h, v0.8h, v31.8h\n"
+    "ldr q0, [x24, x27]\n"
+    "fadd v17.8h, v26.8h, v20.8h\n"
+    "ldr q31, [x23, x27]\n"
+    "fadd v20.8h, v30.8h, v29.8h\n"
+    "ldr q30, [x24, x26]\n"
+    "fadd v16.8h, v25.8h, v24.8h\n"
+    "ldr q29, [x23, x26]\n"
     "fadd v19.8h, v23.8h, v19.8h\n"
     "fadd v18.8h, v22.8h, v18.8h\n"
-    "ldr q30, [x23, x27]\n"
-    "ldr q22, [x22, x27]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "ldr q28, [x22, x9]\n"
+    "ldr q22, [x21, x9]\n"
     "fadd v17.8h, v21.8h, v17.8h\n"
     "fadd v16.8h, v20.8h, v16.8h\n"
-    "ldr q29, [x21, x27]\n"
-    "ldr q28, [x20, x27]\n"
-    "fadd v6.8h, v6.8h, v19.8h\n"
-    "fadd v5.8h, v5.8h, v18.8h\n"
-    "ldr q27, [x23, x26]\n"
-    "ldr q21, [x22, x26]\n"
-    "fadd v4.8h, v4.8h, v17.8h\n"
-    "fadd v3.8h, v3.8h, v16.8h\n"
-    "ldr q26, [x21, x26]\n"
-    "ldr q17, [x20, x26]\n"
-    "ldr q25, [x23, x25]\n"
-    "ldr q20, [x22, x25]\n"
-    "ldr q24, [x21, x25]\n"
-    "ldr q16, [x20, x25]\n"
+    "ldr q27, [x22, x28]\n"
+    "ldr q21, [x21, x28]\n"
+    "subs x25, x25, #0x1\n"
+    "fadd v8.8h, v8.8h, v19.8h\n"
+    "ldr q26, [x22, x27]\n"
+    "ldr q20, [x21, x27]\n"
+    "fadd v7.8h, v7.8h, v18.8h\n"
+    "fadd v6.8h, v6.8h, v17.8h\n"
+    "ldr q25, [x22, x26]\n"
+    "ldr q24, [x21, x26]\n"
+    "fadd v5.8h, v5.8h, v16.8h\n"
+    "add x20, x20, #0x20\n"
     "bgt 2b\n"
     "3:"  // 4-vectors of channels: 4 inputs tail
-    "fadd v23.8h, v2.8h, v1.8h\n"
-    "fadd v19.8h, v0.8h, v31.8h\n"
-    "fadd v22.8h, v30.8h, v22.8h\n"
-    "fadd v18.8h, v29.8h, v28.8h\n"
-    "fadd v21.8h, v27.8h, v21.8h\n"
-    "fadd v17.8h, v26.8h, v17.8h\n"
-    "fadd v20.8h, v25.8h, v20.8h\n"
-    "fadd v16.8h, v24.8h, v16.8h\n"
+    "fadd v23.8h, v4.8h, v3.8h\n"
+    "fadd v19.8h, v28.8h, v22.8h\n"
+    "fadd v22.8h, v2.8h, v1.8h\n"
+    "fadd v18.8h, v27.8h, v21.8h\n"
+    "fadd v21.8h, v0.8h, v31.8h\n"
+    "fadd v17.8h, v26.8h, v20.8h\n"
+    "fadd v20.8h, v30.8h, v29.8h\n"
+    "fadd v16.8h, v25.8h, v24.8h\n"
     "fadd v19.8h, v23.8h, v19.8h\n"
     "fadd v18.8h, v22.8h, v18.8h\n"
     "fadd v17.8h, v21.8h, v17.8h\n"
     "fadd v16.8h, v20.8h, v16.8h\n"
-    "fadd v6.8h, v6.8h, v19.8h\n"
-    "fadd v5.8h, v5.8h, v18.8h\n"
-    "fadd v4.8h, v4.8h, v17.8h\n"
-    "fadd v3.8h, v3.8h, v16.8h\n"
+    "fadd v8.8h, v8.8h, v19.8h\n"
+    "fadd v7.8h, v7.8h, v18.8h\n"
+    "fadd v6.8h, v6.8h, v17.8h\n"
+    "fadd v5.8h, v5.8h, v16.8h\n"
     "4:"  // 4-vectors of channels: After loop
-    "ands x20, %x[n_valid_cells], #0x3\n"
+    "ands x21, %x[n_valid_cells], #0x3\n"
     "beq 6f\n"
     "5:"  // 4-vectors of channels: Single input loop
-    "ldr x23, [x19], #0x8\n"
-    "ldr q2, [x23, x28]\n"
-    "subs x20, x20, #0x1\n"
-    "fadd v6.8h, v6.8h, v2.8h\n"
-    "ldr q30, [x23, x27]\n"
-    "ldr q27, [x23, x26]\n"
+    "ldr x24, [x20], #0x8\n"
+    "ldr q4, [x24, x9]\n"
+    "subs x21, x21, #0x1\n"
+    "fadd v8.8h, v8.8h, v4.8h\n"
+    "ldr q2, [x24, x28]\n"
+    "ldr q0, [x24, x27]\n"
+    "fadd v7.8h, v7.8h, v2.8h\n"
+    "fadd v6.8h, v6.8h, v0.8h\n"
+    "ldr q30, [x24, x26]\n"
     "fadd v5.8h, v5.8h, v30.8h\n"
-    "fadd v4.8h, v4.8h, v27.8h\n"
-    "ldr q25, [x23, x25]\n"
-    "fadd v3.8h, v3.8h, v25.8h\n"
     "bgt 5b\n"
     "6:"  // 4-vectors of channels: Single input loop: End
     "sub %x[n_channels], %x[n_channels], #0x20\n"
     "cmp %x[n_channels], #0x20\n"
-    "fmul v6.8h, v6.8h, v7.8h\n"
-    "fmul v5.8h, v5.8h, v7.8h\n"
-    "fmul v4.8h, v4.8h, v7.8h\n"
-    "fmul v3.8h, v3.8h, v7.8h\n"
-    "str q6, [%x[outptr], x28]\n"
+    "fmul v8.8h, v8.8h, v9.8h\n"
+    "fmul v7.8h, v7.8h, v9.8h\n"
+    "fmul v6.8h, v6.8h, v9.8h\n"
+    "fmul v5.8h, v5.8h, v9.8h\n"
+    "str q8, [%x[outptr], x9]\n"
+    "add x9, x9, #0x40\n"
+    "str q7, [%x[outptr], x28]\n"
     "add x28, x28, #0x40\n"
-    "str q5, [%x[outptr], x27]\n"
+    "str q6, [%x[outptr], x27]\n"
     "add x27, x27, #0x40\n"
-    "str q4, [%x[outptr], x26]\n"
+    "str q5, [%x[outptr], x26]\n"
     "add x26, x26, #0x40\n"
-    "str q3, [%x[outptr], x25]\n"
-    "add x25, x25, #0x40\n"
     "bge 1b\n"
     "cbz %x[n_channels], 31f\n"
     "7:"  // Single vector of channels
     "cmp %x[n_channels], #0x8\n"
     "blt 14f\n"
     "8:"  // Single vector of channels: Loop
-    "lsr x24, %x[n_valid_cells], #0x2\n"
-    "movi v6.16b, #0x0\n"
-    "mov x19, %x[inptrs]\n"
-    "cbz x24, 11f\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
-    "subs x24, x24, #0x1\n"
-    "add x19, x19, #0x20\n"
-    "ldr q2, [x23, x28]\n"
-    "ldr q1, [x22, x28]\n"
-    "ldr q0, [x21, x28]\n"
-    "ldr q31, [x20, x28]\n"
+    "lsr x25, %x[n_valid_cells], #0x2\n"
+    "movi v8.16b, #0x0\n"
+    "mov x20, %x[inptrs]\n"
+    "cbz x25, 11f\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "ldr q4, [x24, x9]\n"
+    "subs x25, x25, #0x1\n"
+    "ldr q3, [x23, x9]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "add x20, x20, #0x20\n"
+    "ldr q28, [x22, x9]\n"
+    "ldr q22, [x21, x9]\n"
     "beq 10f\n"
     "9:"  // Single vector of channels: Loop: 4 inputs loop
-    "fadd v23.8h, v2.8h, v1.8h\n"
-    "fadd v19.8h, v0.8h, v31.8h\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
+    "fadd v23.8h, v4.8h, v3.8h\n"
+    "fadd v19.8h, v28.8h, v22.8h\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "ldr q4, [x24, x9]\n"
+    "ldr q3, [x23, x9]\n"
     "fadd v19.8h, v23.8h, v19.8h\n"
-    "subs x24, x24, #0x1\n"
-    "fadd v6.8h, v6.8h, v19.8h\n"
-    "add x19, x19, #0x20\n"
-    "ldr q2, [x23, x28]\n"
-    "ldr q1, [x22, x28]\n"
-    "ldr q0, [x21, x28]\n"
-    "ldr q31, [x20, x28]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "subs x25, x25, #0x1\n"
+    "ldr q28, [x22, x9]\n"
+    "ldr q22, [x21, x9]\n"
+    "fadd v8.8h, v8.8h, v19.8h\n"
+    "add x20, x20, #0x20\n"
     "bgt 9b\n"
     "10:"  // Single vector of channels: Loop: 4 inputs tail
-    "fadd v23.8h, v2.8h, v1.8h\n"
-    "fadd v19.8h, v0.8h, v31.8h\n"
+    "fadd v23.8h, v4.8h, v3.8h\n"
+    "fadd v19.8h, v28.8h, v22.8h\n"
     "fadd v19.8h, v23.8h, v19.8h\n"
-    "fadd v6.8h, v6.8h, v19.8h\n"
+    "fadd v8.8h, v8.8h, v19.8h\n"
     "11:"  // Single vector of channels: Loop: After loop
-    "ands x20, %x[n_valid_cells], #0x3\n"
+    "ands x21, %x[n_valid_cells], #0x3\n"
     "beq 13f\n"
     "12:"  // Single vector of channels: Loop: Single input loop
-    "ldr x23, [x19], #0x8\n"
-    "ldr q2, [x23, x28]\n"
-    "subs x20, x20, #0x1\n"
-    "fadd v6.8h, v6.8h, v2.8h\n"
+    "ldr x24, [x20], #0x8\n"
+    "ldr q4, [x24, x9]\n"
+    "subs x21, x21, #0x1\n"
+    "fadd v8.8h, v8.8h, v4.8h\n"
     "bgt 12b\n"
     "13:"  // Single vector of channels: Loop: Single input loop: End
     "sub %x[n_channels], %x[n_channels], #0x8\n"
     "cmp %x[n_channels], #0x8\n"
-    "fmul v6.8h, v6.8h, v7.8h\n"
-    "str q6, [%x[outptr], x28]\n"
-    "add x28, x28, #0x10\n"
+    "fmul v8.8h, v8.8h, v9.8h\n"
+    "str q8, [%x[outptr], x9]\n"
+    "add x9, x9, #0x10\n"
     "bge 8b\n"
     "cbz %x[n_channels], 31f\n"
     "14:"  // Oddments
-    "lsr x24, %x[n_valid_cells], #0x2\n"
-    "add %x[outptr], %x[outptr], x28\n"
-    "movi v6.16b, #0x0\n"
-    "mov x19, %x[inptrs]\n"
-    "cbz x24, 20f\n"
+    "lsr x25, %x[n_valid_cells], #0x2\n"
+    "add %x[outptr], %x[outptr], x9\n"
+    "movi v8.16b, #0x0\n"
+    "mov x20, %x[inptrs]\n"
+    "cbz x25, 20f\n"
     "15:"  // Oddments: 4 inputs loop
-    "ldp x23, x22, [x19, #0x0]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
-    "add x19, x19, #0x20\n"
-    "add x23, x23, x28\n"
-    "add x22, x22, x28\n"
-    "add x21, x21, x28\n"
-    "movi v2.16b, #0x0\n"
-    "movi v1.16b, #0x0\n"
-    "add x20, x20, x28\n"
-    "movi v0.16b, #0x0\n"
-    "movi v31.16b, #0x0\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "add x20, x20, #0x20\n"
+    "add x24, x24, x9\n"
+    "add x23, x23, x9\n"
+    "add x22, x22, x9\n"
+    "movi v4.16b, #0x0\n"
+    "movi v3.16b, #0x0\n"
+    "add x21, x21, x9\n"
+    "movi v28.16b, #0x0\n"
+    "movi v22.16b, #0x0\n"
     "tbz %x[n_channels], #2, 17f\n"
-    "ldr d2, [x23], #0x8\n"
-    "ldr d1, [x22], #0x8\n"
-    "ldr d0, [x21], #0x8\n"
-    "ldr d31, [x20], #0x8\n"
+    "ldr d4, [x24], #0x8\n"
+    "ldr d3, [x23], #0x8\n"
+    "ldr d28, [x22], #0x8\n"
+    "ldr d22, [x21], #0x8\n"
     "tbz %x[n_channels], #1, 16f\n"
-    "ld1 { v2.s }[2], [x23], #0x4\n"
-    "ld1 { v1.s }[2], [x22], #0x4\n"
-    "ld1 { v0.s }[2], [x21], #0x4\n"
-    "ld1 { v31.s }[2], [x20], #0x4\n"
+    "ld1 { v4.s }[2], [x24], #0x4\n"
+    "ld1 { v3.s }[2], [x23], #0x4\n"
+    "ld1 { v28.s }[2], [x22], #0x4\n"
+    "ld1 { v22.s }[2], [x21], #0x4\n"
     "tbz %x[n_channels], #0, 19f\n"
-    "ld1 { v2.h }[6], [x23], #0x2\n"
-    "ld1 { v1.h }[6], [x22], #0x2\n"
-    "ld1 { v0.h }[6], [x21], #0x2\n"
-    "ld1 { v31.h }[6], [x20], #0x2\n"
+    "ld1 { v4.h }[6], [x24], #0x2\n"
+    "ld1 { v3.h }[6], [x23], #0x2\n"
+    "ld1 { v28.h }[6], [x22], #0x2\n"
+    "ld1 { v22.h }[6], [x21], #0x2\n"
     "b 19f\n"
     "16:"  // Oddments: 4 inputs loop: Load: Bit 2: Bit 1: Unset
     "tbz %x[n_channels], #0, 19f\n"
-    "ld1 { v2.h }[4], [x23], #0x2\n"
-    "ld1 { v1.h }[4], [x22], #0x2\n"
-    "ld1 { v0.h }[4], [x21], #0x2\n"
-    "ld1 { v31.h }[4], [x20], #0x2\n"
+    "ld1 { v4.h }[4], [x24], #0x2\n"
+    "ld1 { v3.h }[4], [x23], #0x2\n"
+    "ld1 { v28.h }[4], [x22], #0x2\n"
+    "ld1 { v22.h }[4], [x21], #0x2\n"
     "b 19f\n"
     "17:"  // Oddments: 4 inputs loop: Load: Bit 2: Unset
     "tbz %x[n_channels], #1, 18f\n"
-    "ldr s2, [x23], #0x4\n"
-    "ldr s1, [x22], #0x4\n"
-    "ldr s0, [x21], #0x4\n"
-    "ldr s31, [x20], #0x4\n"
+    "ldr s4, [x24], #0x4\n"
+    "ldr s3, [x23], #0x4\n"
+    "ldr s28, [x22], #0x4\n"
+    "ldr s22, [x21], #0x4\n"
     "tbz %x[n_channels], #0, 19f\n"
-    "ld1 { v2.h }[2], [x23], #0x2\n"
-    "ld1 { v1.h }[2], [x22], #0x2\n"
-    "ld1 { v0.h }[2], [x21], #0x2\n"
-    "ld1 { v31.h }[2], [x20], #0x2\n"
+    "ld1 { v4.h }[2], [x24], #0x2\n"
+    "ld1 { v3.h }[2], [x23], #0x2\n"
+    "ld1 { v28.h }[2], [x22], #0x2\n"
+    "ld1 { v22.h }[2], [x21], #0x2\n"
     "b 19f\n"
     "18:"  // Oddments: 4 inputs loop: Load: Bit 2: Unset: Bit 1: Unset
     "tbz %x[n_channels], #0, 19f\n"
-    "ldr h2, [x23], #0x2\n"
-    "ldr h1, [x22], #0x2\n"
-    "ldr h0, [x21], #0x2\n"
-    "ldr h31, [x20], #0x2\n"
+    "ldr h4, [x24], #0x2\n"
+    "ldr h3, [x23], #0x2\n"
+    "ldr h28, [x22], #0x2\n"
+    "ldr h22, [x21], #0x2\n"
     "19:"  // Oddments: 4 inputs loop: Load: Bit 2: End
-    "fadd v23.8h, v2.8h, v1.8h\n"
-    "fadd v19.8h, v0.8h, v31.8h\n"
-    "subs x24, x24, #0x1\n"
+    "fadd v23.8h, v4.8h, v3.8h\n"
+    "fadd v19.8h, v28.8h, v22.8h\n"
+    "subs x25, x25, #0x1\n"
     "fadd v19.8h, v23.8h, v19.8h\n"
-    "fadd v6.8h, v6.8h, v19.8h\n"
+    "fadd v8.8h, v8.8h, v19.8h\n"
     "bgt 15b\n"
     "20:"  // Oddments: After loop
-    "ands x20, %x[n_valid_cells], #0x3\n"
+    "ands x21, %x[n_valid_cells], #0x3\n"
     "beq 26f\n"
     "21:"  // Oddments: Single input loop
-    "ldr x23, [x19], #0x8\n"
-    "add x23, x23, x28\n"
-    "movi v2.16b, #0x0\n"
+    "ldr x24, [x20], #0x8\n"
+    "add x24, x24, x9\n"
+    "movi v4.16b, #0x0\n"
     "tbz %x[n_channels], #2, 23f\n"
-    "ldr d2, [x23], #0x8\n"
+    "ldr d4, [x24], #0x8\n"
     "tbz %x[n_channels], #1, 22f\n"
-    "ld1 { v2.s }[2], [x23], #0x4\n"
+    "ld1 { v4.s }[2], [x24], #0x4\n"
     "tbz %x[n_channels], #0, 25f\n"
-    "ld1 { v2.h }[6], [x23], #0x2\n"
+    "ld1 { v4.h }[6], [x24], #0x2\n"
     "b 25f\n"
     "22:"  // Oddments: Single input loop: Load: Bit 2: Bit 1: Unset
     "tbz %x[n_channels], #0, 25f\n"
-    "ld1 { v2.h }[4], [x23], #0x2\n"
+    "ld1 { v4.h }[4], [x24], #0x2\n"
     "b 25f\n"
     "23:"  // Oddments: Single input loop: Load: Bit 2: Unset
     "tbz %x[n_channels], #1, 24f\n"
-    "ldr s2, [x23], #0x4\n"
+    "ldr s4, [x24], #0x4\n"
     "tbz %x[n_channels], #0, 25f\n"
-    "ld1 { v2.h }[2], [x23], #0x2\n"
+    "ld1 { v4.h }[2], [x24], #0x2\n"
     "b 25f\n"
     "24:"  // Oddments: Single input loop: Load: Bit 2: Unset: Bit 1: Unset
     "tbz %x[n_channels], #0, 25f\n"
-    "ldr h2, [x23], #0x2\n"
+    "ldr h4, [x24], #0x2\n"
     "25:"  // Oddments: Single input loop: Load: Bit 2: End
-    "subs x20, x20, #0x1\n"
-    "fadd v6.8h, v6.8h, v2.8h\n"
+    "subs x21, x21, #0x1\n"
+    "fadd v8.8h, v8.8h, v4.8h\n"
     "bgt 21b\n"
     "26:"  // Oddments: Single input loop: End
-    "fmul v6.8h, v6.8h, v7.8h\n"
+    "fmul v8.8h, v8.8h, v9.8h\n"
     "tbz %x[n_channels], #2, 28f\n"
-    "st1 { v6.d }[0], [%x[outptr]], #0x8\n"
+    "st1 { v8.d }[0], [%x[outptr]], #0x8\n"
     "tbz %x[n_channels], #1, 27f\n"
-    "st1 { v6.s }[2], [%x[outptr]], #0x4\n"
+    "st1 { v8.s }[2], [%x[outptr]], #0x4\n"
     "tbz %x[n_channels], #0, 30f\n"
-    "st1 { v6.h }[6], [%x[outptr]], #0x2\n"
+    "st1 { v8.h }[6], [%x[outptr]], #0x2\n"
     "b 30f\n"
     "27:"  // Oddments: Store: Bit 2: Bit 1: Unset
     "tbz %x[n_channels], #0, 30f\n"
-    "st1 { v6.h }[4], [%x[outptr]], #0x2\n"
+    "st1 { v8.h }[4], [%x[outptr]], #0x2\n"
     "b 30f\n"
     "28:"  // Oddments: Store: Bit 2: Unset
     "tbz %x[n_channels], #1, 29f\n"
-    "st1 { v6.s }[0], [%x[outptr]], #0x4\n"
+    "st1 { v8.s }[0], [%x[outptr]], #0x4\n"
     "tbz %x[n_channels], #0, 30f\n"
-    "st1 { v6.h }[2], [%x[outptr]], #0x2\n"
+    "st1 { v8.h }[2], [%x[outptr]], #0x2\n"
     "b 30f\n"
     "29:"  // Oddments: Store: Bit 2: Unset: Bit 1: Unset
     "tbz %x[n_channels], #0, 30f\n"
-    "st1 { v6.h }[0], [%x[outptr]], #0x2\n"
+    "st1 { v8.h }[0], [%x[outptr]], #0x2\n"
     "30:"  // Oddments: Store: Bit 2: End
     "31:"  // End
     : [n_channels] "+&r" (n_channels), [outptr] "+&r" (outptr)
     : [inptrs] "r" (inptrs), [n_valid_cells] "r" (n_valid_cells), [rescale_ptr] "r" (&rescale_value)
-    : "cc", "memory", "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28"
+    : "cc", "memory", "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x9", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28"
   );
 }
 
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_fp16_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_fp16_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp
index b12d090e22..8041453cb1 100644
--- a/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_fp16_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_fp16_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2021-2022 Arm Limited.
+ * Copyright (c) 2021-2023 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -62,111 +62,111 @@ void a64_fp16_nhwc_max_2x2_s1_output2x2_depthfirst_impl(
                         pad_left, pad_top, pad_right, pad_bottom);
 
   __asm__ __volatile__(
-    "ldr x15, [%x[args], %[offsetof_n_channels]]\n"
-    "ldr x20, [%x[args], %[offsetof_outptrs]]\n"
-    "cmp x15, #0x8\n"
-    "mov x14, #0x0\n"
-    "ldr x19, [%x[args], %[offsetof_inptrs]]\n"
-    "ldp x13, x12, [x20, #0x0]\n"
-    "mov x11, #0x0\n"
-    "ldp x10, x9, [x20, #0x10]\n"
-    "ldp x28, x27, [x19, #0x0]\n"
-    "ldp x26, x25, [x19, #0x10]\n"
-    "ldp x24, x23, [x19, #0x20]\n"
-    "ldp x22, x21, [x19, #0x30]\n"
-    "ldr x20, [x19, #0x40]\n"
+    "ldr x16, [%x[args], %[offsetof_n_channels]]\n"
+    "ldr x21, [%x[args], %[offsetof_outptrs]]\n"
+    "cmp x16, #0x8\n"
+    "mov x15, #0x0\n"
+    "ldr x20, [%x[args], %[offsetof_inptrs]]\n"
+    "ldp x14, x13, [x21, #0x0]\n"
+    "mov x12, #0x0\n"
+    "ldp x11, x10, [x21, #0x10]\n"
+    "ldp x9, x28, [x20, #0x0]\n"
+    "ldp x27, x26, [x20, #0x10]\n"
+    "ldp x25, x24, [x20, #0x20]\n"
+    "ldp x23, x22, [x20, #0x30]\n"
+    "ldr x21, [x20, #0x40]\n"
     "blt 3f\n"
-    "lsr x19, x15, #0x3\n"
-    "sub x15, x15, x19, LSL #3\n"
-    "ldr q30, [x27, x14]\n"
-    "ldr q29, [x24, x14]\n"
-    "subs x19, x19, #0x1\n"
-    "ldr q28, [x21, x14]\n"
-    "ldr q27, [x25, x14]\n"
-    "ldr q26, [x28, x14]\n"
-    "ldr q25, [x23, x14]\n"
-    "ldr q24, [x26, x14]\n"
-    "ldr q23, [x22, x14]\n"
-    "ldr q22, [x20, x14]\n"
-    "add x14, x14, #0x10\n"
+    "ldr q30, [x28, x15]\n"
+    "ldr q29, [x25, x15]\n"
+    "lsr x20, x16, #0x3\n"
+    "sub x16, x16, x20, LSL #3\n"
+    "ldr q28, [x22, x15]\n"
+    "ldr q27, [x26, x15]\n"
+    "subs x20, x20, #0x1\n"
+    "ldr q26, [x9, x15]\n"
+    "ldr q25, [x27, x15]\n"
+    "ldr q24, [x24, x15]\n"
+    "ldr q23, [x23, x15]\n"
+    "ldr q22, [x21, x15]\n"
+    "add x15, x15, #0x10\n"
     "beq 2f\n"
     "1:"  // Vector: Loop
     "fmax v21.8h, v30.8h, v29.8h\n"
+    "ldr q30, [x28, x15]\n"
     "fmax v20.8h, v29.8h, v28.8h\n"
-    "subs x19, x19, #0x1\n"
-    "ldr q30, [x27, x14]\n"
+    "ldr q29, [x25, x15]\n"
+    "ldr q28, [x22, x15]\n"
     "fmax v19.8h, v27.8h, v26.8h\n"
+    "ldr q26, [x9, x15]\n"
     "fmax v18.8h, v25.8h, v24.8h\n"
-    "ldr q29, [x24, x14]\n"
-    "ldr q28, [x21, x14]\n"
-    "fmax v17.8h, v23.8h, v27.8h\n"
-    "fmax v16.8h, v25.8h, v22.8h\n"
-    "ldr q27, [x25, x14]\n"
-    "ldr q26, [x28, x14]\n"
+    "ldr q25, [x27, x15]\n"
+    "fmax v17.8h, v27.8h, v23.8h\n"
+    "ldr q27, [x26, x15]\n"
+    "fmax v16.8h, v24.8h, v22.8h\n"
+    "ldr q24, [x24, x15]\n"
+    "ldr q23, [x23, x15]\n"
+    "subs x20, x20, #0x1\n"
     "fmax v19.8h, v21.8h, v19.8h\n"
+    "ldr q22, [x21, x15]\n"
     "fmax v18.8h, v18.8h, v21.8h\n"
-    "ldr q25, [x23, x14]\n"
-    "ldr q24, [x26, x14]\n"
-    "fmax v17.8h, v20.8h, v17.8h\n"
-    "fmax v16.8h, v20.8h, v16.8h\n"
-    "ldr q23, [x22, x14]\n"
-    "ldr q22, [x20, x14]\n"
-    "add x14, x14, #0x10\n"
-    "str q19, [x13, x11]\n"
-    "str q18, [x12, x11]\n"
-    "str q17, [x10, x11]\n"
-    "str q16, [x9, x11]\n"
-    "add x11, x11, #0x10\n"
+    "fmax v17.8h, v17.8h, v20.8h\n"
+    "add x15, x15, #0x10\n"
+    "fmax v16.8h, v16.8h, v20.8h\n"
+    "str q19, [x14, x12]\n"
+    "str q18, [x13, x12]\n"
+    "str q17, [x11, x12]\n"
+    "str q16, [x10, x12]\n"
+    "add x12, x12, #0x10\n"
     "bgt 1b\n"
     "2:"  // Vector: Tail
     "fmax v21.8h, v30.8h, v29.8h\n"
     "fmax v20.8h, v29.8h, v28.8h\n"
     "fmax v19.8h, v27.8h, v26.8h\n"
     "fmax v18.8h, v25.8h, v24.8h\n"
-    "fmax v17.8h, v23.8h, v27.8h\n"
-    "fmax v16.8h, v25.8h, v22.8h\n"
+    "fmax v17.8h, v27.8h, v23.8h\n"
+    "fmax v16.8h, v24.8h, v22.8h\n"
     "fmax v19.8h, v21.8h, v19.8h\n"
     "fmax v18.8h, v18.8h, v21.8h\n"
-    "str q19, [x13, x11]\n"
-    "fmax v17.8h, v20.8h, v17.8h\n"
-    "fmax v16.8h, v20.8h, v16.8h\n"
-    "str q18, [x12, x11]\n"
-    "str q17, [x10, x11]\n"
-    "str q16, [x9, x11]\n"
-    "add x11, x11, #0x10\n"
-    "cbz x15, 4f\n"
+    "str q19, [x14, x12]\n"
+    "fmax v17.8h, v17.8h, v20.8h\n"
+    "fmax v16.8h, v16.8h, v20.8h\n"
+    "str q18, [x13, x12]\n"
+    "str q17, [x11, x12]\n"
+    "str q16, [x10, x12]\n"
+    "add x12, x12, #0x10\n"
+    "cbz x16, 4f\n"
     "3:"  // Oddments
-    "ldr h30, [x27, x14]\n"
-    "ldr h29, [x24, x14]\n"
+    "ldr h30, [x28, x15]\n"
+    "ldr h29, [x25, x15]\n"
     "fmax v21.8h, v30.8h, v29.8h\n"
-    "subs x15, x15, #0x1\n"
-    "ldr h28, [x21, x14]\n"
-    "ldr h27, [x25, x14]\n"
+    "subs x16, x16, #0x1\n"
+    "ldr h28, [x22, x15]\n"
+    "ldr h27, [x26, x15]\n"
     "fmax v20.8h, v29.8h, v28.8h\n"
-    "ldr h26, [x28, x14]\n"
-    "ldr h25, [x23, x14]\n"
+    "ldr h26, [x9, x15]\n"
+    "ldr h25, [x27, x15]\n"
     "fmax v19.8h, v27.8h, v26.8h\n"
     "fmax v19.8h, v21.8h, v19.8h\n"
-    "ldr h24, [x26, x14]\n"
-    "ldr h23, [x22, x14]\n"
+    "ldr h24, [x24, x15]\n"
+    "ldr h23, [x23, x15]\n"
     "fmax v18.8h, v25.8h, v24.8h\n"
-    "fmax v17.8h, v23.8h, v27.8h\n"
-    "ldr h22, [x20, x14]\n"
-    "fmax v16.8h, v25.8h, v22.8h\n"
-    "add x14, x14, #0x2\n"
+    "fmax v17.8h, v27.8h, v23.8h\n"
+    "ldr h22, [x21, x15]\n"
+    "fmax v16.8h, v24.8h, v22.8h\n"
+    "add x15, x15, #0x2\n"
     "fmax v18.8h, v18.8h, v21.8h\n"
-    "fmax v17.8h, v20.8h, v17.8h\n"
-    "fmax v16.8h, v20.8h, v16.8h\n"
-    "str h19, [x13, x11]\n"
-    "str h18, [x12, x11]\n"
-    "str h17, [x10, x11]\n"
-    "str h16, [x9, x11]\n"
-    "add x11, x11, #0x2\n"
+    "fmax v17.8h, v17.8h, v20.8h\n"
+    "fmax v16.8h, v16.8h, v20.8h\n"
+    "str h19, [x14, x12]\n"
+    "str h18, [x13, x12]\n"
+    "str h17, [x11, x12]\n"
+    "str h16, [x10, x12]\n"
+    "add x12, x12, #0x2\n"
     "bgt 3b\n"
     "4:"  // End
     :
     : [args] "r" (&args), [offsetof_inptrs] "I" (offsetof(KernelArgs, inptrs)), [offsetof_n_channels] "I" (offsetof(KernelArgs, n_channels)), [offsetof_outptrs] "I" (offsetof(KernelArgs, outptrs))
-    : "cc", "memory", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28"
+    : "cc", "memory", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28"
   );
 }
 
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_fp16_nhwc_max_generic_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_fp16_nhwc_max_generic_depthfirst/generic.cpp
index f1eec31b98..e4de9fb79c 100644
--- a/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_fp16_nhwc_max_generic_depthfirst/generic.cpp
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_fp16_nhwc_max_generic_depthfirst/generic.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2021-2022 Arm Limited.
+ * Copyright (c) 2021-2023 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -41,301 +41,301 @@ void a64_fp16_nhwc_max_generic_depthfirst_impl(
 {
   __asm__ __volatile__(
     "cmp %x[n_channels], #0x20\n"
-    "mov x28, #0x0\n"
-    "mov x27, #0x10\n"  // cntb _, ALL, #1
-    "mov x26, #0x20\n"  // cntb _, ALL, #2
-    "mov x25, #0x30\n"  // cntb _, ALL, #3
+    "mov x9, #0x0\n"
+    "mov x28, #0x10\n"  // cntb _, ALL, #1
+    "mov x27, #0x20\n"  // cntb _, ALL, #2
+    "mov x26, #0x30\n"  // cntb _, ALL, #3
     "blt 7f\n"
     "1:"  // 4-vectors of channels
-    "mov w19, #0xfc00\n"
-    "lsr x24, %x[n_valid_cells], #0x2\n"
-    "dup v6.8h, w19\n"
-    "dup v5.8h, w19\n"
-    "dup v4.8h, w19\n"
-    "dup v3.8h, w19\n"
-    "mov x19, %x[inptrs]\n"
-    "cbz x24, 4f\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
-    "subs x24, x24, #0x1\n"
-    "add x19, x19, #0x20\n"
-    "ldr q2, [x23, x28]\n"
-    "ldr q1, [x22, x28]\n"
-    "ldr q0, [x21, x28]\n"
-    "ldr q31, [x20, x28]\n"
-    "ldr q30, [x23, x27]\n"
-    "ldr q22, [x22, x27]\n"
-    "ldr q29, [x21, x27]\n"
-    "ldr q28, [x20, x27]\n"
-    "ldr q27, [x23, x26]\n"
-    "ldr q21, [x22, x26]\n"
-    "ldr q26, [x21, x26]\n"
-    "ldr q17, [x20, x26]\n"
-    "ldr q25, [x23, x25]\n"
-    "ldr q20, [x22, x25]\n"
-    "ldr q24, [x21, x25]\n"
-    "ldr q16, [x20, x25]\n"
+    "mov w20, #0xfc00\n"
+    "lsr x25, %x[n_valid_cells], #0x2\n"
+    "dup v8.8h, w20\n"
+    "dup v7.8h, w20\n"
+    "dup v6.8h, w20\n"
+    "dup v5.8h, w20\n"
+    "mov x20, %x[inptrs]\n"
+    "cbz x25, 4f\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "ldr q4, [x24, x9]\n"
+    "subs x25, x25, #0x1\n"
+    "ldr q3, [x23, x9]\n"
+    "ldr q2, [x24, x28]\n"
+    "ldr q1, [x23, x28]\n"
+    "ldr q0, [x24, x27]\n"
+    "ldr q31, [x23, x27]\n"
+    "ldr q30, [x24, x26]\n"
+    "ldr q29, [x23, x26]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "add x20, x20, #0x20\n"
+    "ldr q28, [x22, x9]\n"
+    "ldr q22, [x21, x9]\n"
+    "ldr q27, [x22, x28]\n"
+    "ldr q21, [x21, x28]\n"
+    "ldr q26, [x22, x27]\n"
+    "ldr q20, [x21, x27]\n"
+    "ldr q25, [x22, x26]\n"
+    "ldr q24, [x21, x26]\n"
     "beq 3f\n"
     "2:"  // 4-vectors of channels: 4 inputs loop
-    "fmax v23.8h, v2.8h, v1.8h\n"
-    "fmax v19.8h, v0.8h, v31.8h\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
-    "fmax v22.8h, v30.8h, v22.8h\n"
-    "fmax v18.8h, v29.8h, v28.8h\n"
-    "subs x24, x24, #0x1\n"
-    "add x19, x19, #0x20\n"
-    "fmax v21.8h, v27.8h, v21.8h\n"
-    "fmax v17.8h, v26.8h, v17.8h\n"
-    "ldr q2, [x23, x28]\n"
-    "ldr q1, [x22, x28]\n"
-    "fmax v20.8h, v25.8h, v20.8h\n"
-    "fmax v16.8h, v24.8h, v16.8h\n"
-    "ldr q0, [x21, x28]\n"
-    "ldr q31, [x20, x28]\n"
+    "fmax v23.8h, v4.8h, v3.8h\n"
+    "fmax v19.8h, v28.8h, v22.8h\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "ldr q4, [x24, x9]\n"
+    "ldr q3, [x23, x9]\n"
+    "fmax v22.8h, v2.8h, v1.8h\n"
+    "ldr q2, [x24, x28]\n"
+    "fmax v18.8h, v27.8h, v21.8h\n"
+    "ldr q1, [x23, x28]\n"
+    "fmax v21.8h, v0.8h, v31.8h\n"
+    "ldr q0, [x24, x27]\n"
+    "fmax v17.8h, v26.8h, v20.8h\n"
+    "ldr q31, [x23, x27]\n"
+    "fmax v20.8h, v30.8h, v29.8h\n"
+    "ldr q30, [x24, x26]\n"
+    "fmax v16.8h, v25.8h, v24.8h\n"
+    "ldr q29, [x23, x26]\n"
     "fmax v19.8h, v23.8h, v19.8h\n"
     "fmax v18.8h, v22.8h, v18.8h\n"
-    "ldr q30, [x23, x27]\n"
-    "ldr q22, [x22, x27]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "ldr q28, [x22, x9]\n"
+    "ldr q22, [x21, x9]\n"
     "fmax v17.8h, v21.8h, v17.8h\n"
     "fmax v16.8h, v20.8h, v16.8h\n"
-    "ldr q29, [x21, x27]\n"
-    "ldr q28, [x20, x27]\n"
-    "fmax v6.8h, v6.8h, v19.8h\n"
-    "fmax v5.8h, v5.8h, v18.8h\n"
-    "ldr q27, [x23, x26]\n"
-    "ldr q21, [x22, x26]\n"
-    "fmax v4.8h, v4.8h, v17.8h\n"
-    "fmax v3.8h, v3.8h, v16.8h\n"
-    "ldr q26, [x21, x26]\n"
-    "ldr q17, [x20, x26]\n"
-    "ldr q25, [x23, x25]\n"
-    "ldr q20, [x22, x25]\n"
-    "ldr q24, [x21, x25]\n"
-    "ldr q16, [x20, x25]\n"
+    "ldr q27, [x22, x28]\n"
+    "ldr q21, [x21, x28]\n"
+    "subs x25, x25, #0x1\n"
+    "fmax v8.8h, v8.8h, v19.8h\n"
+    "ldr q26, [x22, x27]\n"
+    "ldr q20, [x21, x27]\n"
+    "fmax v7.8h, v7.8h, v18.8h\n"
+    "fmax v6.8h, v6.8h, v17.8h\n"
+    "ldr q25, [x22, x26]\n"
+    "ldr q24, [x21, x26]\n"
+    "fmax v5.8h, v5.8h, v16.8h\n"
+    "add x20, x20, #0x20\n"
     "bgt 2b\n"
     "3:"  // 4-vectors of channels: 4 inputs tail
-    "fmax v23.8h, v2.8h, v1.8h\n"
-    "fmax v19.8h, v0.8h, v31.8h\n"
-    "fmax v22.8h, v30.8h, v22.8h\n"
-    "fmax v18.8h, v29.8h, v28.8h\n"
-    "fmax v21.8h, v27.8h, v21.8h\n"
-    "fmax v17.8h, v26.8h, v17.8h\n"
-    "fmax v20.8h, v25.8h, v20.8h\n"
-    "fmax v16.8h, v24.8h, v16.8h\n"
+    "fmax v23.8h, v4.8h, v3.8h\n"
+    "fmax v19.8h, v28.8h, v22.8h\n"
+    "fmax v22.8h, v2.8h, v1.8h\n"
+    "fmax v18.8h, v27.8h, v21.8h\n"
+    "fmax v21.8h, v0.8h, v31.8h\n"
+    "fmax v17.8h, v26.8h, v20.8h\n"
+    "fmax v20.8h, v30.8h, v29.8h\n"
+    "fmax v16.8h, v25.8h, v24.8h\n"
     "fmax v19.8h, v23.8h, v19.8h\n"
     "fmax v18.8h, v22.8h, v18.8h\n"
     "fmax v17.8h, v21.8h, v17.8h\n"
     "fmax v16.8h, v20.8h, v16.8h\n"
-    "fmax v6.8h, v6.8h, v19.8h\n"
-    "fmax v5.8h, v5.8h, v18.8h\n"
-    "fmax v4.8h, v4.8h, v17.8h\n"
-    "fmax v3.8h, v3.8h, v16.8h\n"
+    "fmax v8.8h, v8.8h, v19.8h\n"
+    "fmax v7.8h, v7.8h, v18.8h\n"
+    "fmax v6.8h, v6.8h, v17.8h\n"
+    "fmax v5.8h, v5.8h, v16.8h\n"
     "4:"  // 4-vectors of channels: After loop
-    "ands x20, %x[n_valid_cells], #0x3\n"
+    "ands x21, %x[n_valid_cells], #0x3\n"
     "beq 6f\n"
     "5:"  // 4-vectors of channels: Single input loop
-    "ldr x23, [x19], #0x8\n"
-    "ldr q2, [x23, x28]\n"
-    "subs x20, x20, #0x1\n"
-    "fmax v6.8h, v6.8h, v2.8h\n"
-    "ldr q30, [x23, x27]\n"
-    "ldr q27, [x23, x26]\n"
+    "ldr x24, [x20], #0x8\n"
+    "ldr q4, [x24, x9]\n"
+    "subs x21, x21, #0x1\n"
+    "fmax v8.8h, v8.8h, v4.8h\n"
+    "ldr q2, [x24, x28]\n"
+    "ldr q0, [x24, x27]\n"
+    "fmax v7.8h, v7.8h, v2.8h\n"
+    "fmax v6.8h, v6.8h, v0.8h\n"
+    "ldr q30, [x24, x26]\n"
     "fmax v5.8h, v5.8h, v30.8h\n"
-    "fmax v4.8h, v4.8h, v27.8h\n"
-    "ldr q25, [x23, x25]\n"
-    "fmax v3.8h, v3.8h, v25.8h\n"
     "bgt 5b\n"
     "6:"  // 4-vectors of channels: Single input loop: End
     "sub %x[n_channels], %x[n_channels], #0x20\n"
     "cmp %x[n_channels], #0x20\n"
-    "str q6, [%x[outptr], x28]\n"
-    "str q5, [%x[outptr], x27]\n"
+    "str q8, [%x[outptr], x9]\n"
+    "str q7, [%x[outptr], x28]\n"
+    "add x9, x9, #0x40\n"
     "add x28, x28, #0x40\n"
+    "str q6, [%x[outptr], x27]\n"
     "add x27, x27, #0x40\n"
-    "str q4, [%x[outptr], x26]\n"
+    "str q5, [%x[outptr], x26]\n"
     "add x26, x26, #0x40\n"
-    "str q3, [%x[outptr], x25]\n"
-    "add x25, x25, #0x40\n"
     "bge 1b\n"
     "cbz %x[n_channels], 31f\n"
     "7:"  // Single vector of channels
     "cmp %x[n_channels], #0x8\n"
     "blt 14f\n"
     "8:"  // Single vector of channels: Loop
-    "mov w19, #0xfc00\n"
-    "lsr x24, %x[n_valid_cells], #0x2\n"
-    "dup v6.8h, w19\n"
-    "mov x19, %x[inptrs]\n"
-    "cbz x24, 11f\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
-    "subs x24, x24, #0x1\n"
-    "add x19, x19, #0x20\n"
-    "ldr q2, [x23, x28]\n"
-    "ldr q1, [x22, x28]\n"
-    "ldr q0, [x21, x28]\n"
-    "ldr q31, [x20, x28]\n"
+    "mov w20, #0xfc00\n"
+    "lsr x25, %x[n_valid_cells], #0x2\n"
+    "dup v8.8h, w20\n"
+    "mov x20, %x[inptrs]\n"
+    "cbz x25, 11f\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "ldr q4, [x24, x9]\n"
+    "subs x25, x25, #0x1\n"
+    "ldr q3, [x23, x9]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "add x20, x20, #0x20\n"
+    "ldr q28, [x22, x9]\n"
+    "ldr q22, [x21, x9]\n"
     "beq 10f\n"
     "9:"  // Single vector of channels: Loop: 4 inputs loop
-    "fmax v23.8h, v2.8h, v1.8h\n"
-    "fmax v19.8h, v0.8h, v31.8h\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
+    "fmax v23.8h, v4.8h, v3.8h\n"
+    "fmax v19.8h, v28.8h, v22.8h\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "ldr q4, [x24, x9]\n"
+    "ldr q3, [x23, x9]\n"
     "fmax v19.8h, v23.8h, v19.8h\n"
-    "subs x24, x24, #0x1\n"
-    "fmax v6.8h, v6.8h, v19.8h\n"
-    "add x19, x19, #0x20\n"
-    "ldr q2, [x23, x28]\n"
-    "ldr q1, [x22, x28]\n"
-    "ldr q0, [x21, x28]\n"
-    "ldr q31, [x20, x28]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "subs x25, x25, #0x1\n"
+    "ldr q28, [x22, x9]\n"
+    "ldr q22, [x21, x9]\n"
+    "fmax v8.8h, v8.8h, v19.8h\n"
+    "add x20, x20, #0x20\n"
     "bgt 9b\n"
     "10:"  // Single vector of channels: Loop: 4 inputs tail
-    "fmax v23.8h, v2.8h, v1.8h\n"
-    "fmax v19.8h, v0.8h, v31.8h\n"
+    "fmax v23.8h, v4.8h, v3.8h\n"
+    "fmax v19.8h, v28.8h, v22.8h\n"
     "fmax v19.8h, v23.8h, v19.8h\n"
-    "fmax v6.8h, v6.8h, v19.8h\n"
+    "fmax v8.8h, v8.8h, v19.8h\n"
     "11:"  // Single vector of channels: Loop: After loop
-    "ands x20, %x[n_valid_cells], #0x3\n"
+    "ands x21, %x[n_valid_cells], #0x3\n"
     "beq 13f\n"
     "12:"  // Single vector of channels: Loop: Single input loop
-    "ldr x23, [x19], #0x8\n"
-    "ldr q2, [x23, x28]\n"
-    "subs x20, x20, #0x1\n"
-    "fmax v6.8h, v6.8h, v2.8h\n"
+    "ldr x24, [x20], #0x8\n"
+    "ldr q4, [x24, x9]\n"
+    "subs x21, x21, #0x1\n"
+    "fmax v8.8h, v8.8h, v4.8h\n"
     "bgt 12b\n"
     "13:"  // Single vector of channels: Loop: Single input loop: End
     "sub %x[n_channels], %x[n_channels], #0x8\n"
     "cmp %x[n_channels], #0x8\n"
-    "str q6, [%x[outptr], x28]\n"
-    "add x28, x28, #0x10\n"
+    "str q8, [%x[outptr], x9]\n"
+    "add x9, x9, #0x10\n"
     "bge 8b\n"
     "cbz %x[n_channels], 31f\n"
     "14:"  // Oddments
-    "mov w19, #0xfc00\n"
-    "lsr x24, %x[n_valid_cells], #0x2\n"
-    "dup v6.8h, w19\n"
-    "add %x[outptr], %x[outptr], x28\n"
-    "mov x19, %x[inptrs]\n"
-    "cbz x24, 20f\n"
+    "mov w20, #0xfc00\n"
+    "lsr x25, %x[n_valid_cells], #0x2\n"
+    "dup v8.8h, w20\n"
+    "add %x[outptr], %x[outptr], x9\n"
+    "mov x20, %x[inptrs]\n"
+    "cbz x25, 20f\n"
     "15:"  // Oddments: 4 inputs loop
-    "ldp x23, x22, [x19, #0x0]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
-    "add x19, x19, #0x20\n"
-    "add x23, x23, x28\n"
-    "add x22, x22, x28\n"
-    "add x21, x21, x28\n"
-    "movi v2.16b, #0x0\n"
-    "movi v1.16b, #0x0\n"
-    "add x20, x20, x28\n"
-    "movi v0.16b, #0x0\n"
-    "movi v31.16b, #0x0\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "add x20, x20, #0x20\n"
+    "add x24, x24, x9\n"
+    "add x23, x23, x9\n"
+    "add x22, x22, x9\n"
+    "movi v4.16b, #0x0\n"
+    "movi v3.16b, #0x0\n"
+    "add x21, x21, x9\n"
+    "movi v28.16b, #0x0\n"
+    "movi v22.16b, #0x0\n"
     "tbz %x[n_channels], #2, 17f\n"
-    "ldr d2, [x23], #0x8\n"
-    "ldr d1, [x22], #0x8\n"
-    "ldr d0, [x21], #0x8\n"
-    "ldr d31, [x20], #0x8\n"
+    "ldr d4, [x24], #0x8\n"
+    "ldr d3, [x23], #0x8\n"
+    "ldr d28, [x22], #0x8\n"
+    "ldr d22, [x21], #0x8\n"
     "tbz %x[n_channels], #1, 16f\n"
-    "ld1 { v2.s }[2], [x23], #0x4\n"
-    "ld1 { v1.s }[2], [x22], #0x4\n"
-    "ld1 { v0.s }[2], [x21], #0x4\n"
-    "ld1 { v31.s }[2], [x20], #0x4\n"
+    "ld1 { v4.s }[2], [x24], #0x4\n"
+    "ld1 { v3.s }[2], [x23], #0x4\n"
+    "ld1 { v28.s }[2], [x22], #0x4\n"
+    "ld1 { v22.s }[2], [x21], #0x4\n"
     "tbz %x[n_channels], #0, 19f\n"
-    "ld1 { v2.h }[6], [x23], #0x2\n"
-    "ld1 { v1.h }[6], [x22], #0x2\n"
-    "ld1 { v0.h }[6], [x21], #0x2\n"
-    "ld1 { v31.h }[6], [x20], #0x2\n"
+    "ld1 { v4.h }[6], [x24], #0x2\n"
+    "ld1 { v3.h }[6], [x23], #0x2\n"
+    "ld1 { v28.h }[6], [x22], #0x2\n"
+    "ld1 { v22.h }[6], [x21], #0x2\n"
     "b 19f\n"
     "16:"  // Oddments: 4 inputs loop: Load: Bit 2: Bit 1: Unset
     "tbz %x[n_channels], #0, 19f\n"
-    "ld1 { v2.h }[4], [x23], #0x2\n"
-    "ld1 { v1.h }[4], [x22], #0x2\n"
-    "ld1 { v0.h }[4], [x21], #0x2\n"
-    "ld1 { v31.h }[4], [x20], #0x2\n"
+    "ld1 { v4.h }[4], [x24], #0x2\n"
+    "ld1 { v3.h }[4], [x23], #0x2\n"
+    "ld1 { v28.h }[4], [x22], #0x2\n"
+    "ld1 { v22.h }[4], [x21], #0x2\n"
     "b 19f\n"
     "17:"  // Oddments: 4 inputs loop: Load: Bit 2: Unset
     "tbz %x[n_channels], #1, 18f\n"
-    "ldr s2, [x23], #0x4\n"
-    "ldr s1, [x22], #0x4\n"
-    "ldr s0, [x21], #0x4\n"
-    "ldr s31, [x20], #0x4\n"
+    "ldr s4, [x24], #0x4\n"
+    "ldr s3, [x23], #0x4\n"
+    "ldr s28, [x22], #0x4\n"
+    "ldr s22, [x21], #0x4\n"
     "tbz %x[n_channels], #0, 19f\n"
-    "ld1 { v2.h }[2], [x23], #0x2\n"
-    "ld1 { v1.h }[2], [x22], #0x2\n"
-    "ld1 { v0.h }[2], [x21], #0x2\n"
-    "ld1 { v31.h }[2], [x20], #0x2\n"
+    "ld1 { v4.h }[2], [x24], #0x2\n"
+    "ld1 { v3.h }[2], [x23], #0x2\n"
+    "ld1 { v28.h }[2], [x22], #0x2\n"
+    "ld1 { v22.h }[2], [x21], #0x2\n"
     "b 19f\n"
     "18:"  // Oddments: 4 inputs loop: Load: Bit 2: Unset: Bit 1: Unset
     "tbz %x[n_channels], #0, 19f\n"
-    "ldr h2, [x23], #0x2\n"
-    "ldr h1, [x22], #0x2\n"
-    "ldr h0, [x21], #0x2\n"
-    "ldr h31, [x20], #0x2\n"
+    "ldr h4, [x24], #0x2\n"
+    "ldr h3, [x23], #0x2\n"
+    "ldr h28, [x22], #0x2\n"
+    "ldr h22, [x21], #0x2\n"
     "19:"  // Oddments: 4 inputs loop: Load: Bit 2: End
-    "fmax v23.8h, v2.8h, v1.8h\n"
-    "fmax v19.8h, v0.8h, v31.8h\n"
-    "subs x24, x24, #0x1\n"
+    "fmax v23.8h, v4.8h, v3.8h\n"
+    "fmax v19.8h, v28.8h, v22.8h\n"
+    "subs x25, x25, #0x1\n"
     "fmax v19.8h, v23.8h, v19.8h\n"
-    "fmax v6.8h, v6.8h, v19.8h\n"
+    "fmax v8.8h, v8.8h, v19.8h\n"
     "bgt 15b\n"
     "20:"  // Oddments: After loop
-    "ands x20, %x[n_valid_cells], #0x3\n"
+    "ands x21, %x[n_valid_cells], #0x3\n"
     "beq 26f\n"
     "21:"  // Oddments: Single input loop
-    "ldr x23, [x19], #0x8\n"
-    "add x23, x23, x28\n"
-    "movi v2.16b, #0x0\n"
+    "ldr x24, [x20], #0x8\n"
+    "add x24, x24, x9\n"
+    "movi v4.16b, #0x0\n"
     "tbz %x[n_channels], #2, 23f\n"
-    "ldr d2, [x23], #0x8\n"
+    "ldr d4, [x24], #0x8\n"
     "tbz %x[n_channels], #1, 22f\n"
-    "ld1 { v2.s }[2], [x23], #0x4\n"
+    "ld1 { v4.s }[2], [x24], #0x4\n"
     "tbz %x[n_channels], #0, 25f\n"
-    "ld1 { v2.h }[6], [x23], #0x2\n"
+    "ld1 { v4.h }[6], [x24], #0x2\n"
     "b 25f\n"
     "22:"  // Oddments: Single input loop: Load: Bit 2: Bit 1: Unset
     "tbz %x[n_channels], #0, 25f\n"
-    "ld1 { v2.h }[4], [x23], #0x2\n"
+    "ld1 { v4.h }[4], [x24], #0x2\n"
     "b 25f\n"
     "23:"  // Oddments: Single input loop: Load: Bit 2: Unset
     "tbz %x[n_channels], #1, 24f\n"
-    "ldr s2, [x23], #0x4\n"
+    "ldr s4, [x24], #0x4\n"
     "tbz %x[n_channels], #0, 25f\n"
-    "ld1 { v2.h }[2], [x23], #0x2\n"
+    "ld1 { v4.h }[2], [x24], #0x2\n"
     "b 25f\n"
     "24:"  // Oddments: Single input loop: Load: Bit 2: Unset: Bit 1: Unset
     "tbz %x[n_channels], #0, 25f\n"
-    "ldr h2, [x23], #0x2\n"
+    "ldr h4, [x24], #0x2\n"
     "25:"  // Oddments: Single input loop: Load: Bit 2: End
-    "subs x20, x20, #0x1\n"
-    "fmax v6.8h, v6.8h, v2.8h\n"
+    "subs x21, x21, #0x1\n"
+    "fmax v8.8h, v8.8h, v4.8h\n"
     "bgt 21b\n"
     "26:"  // Oddments: Single input loop: End
     "tbz %x[n_channels], #2, 28f\n"
-    "st1 { v6.d }[0], [%x[outptr]], #0x8\n"
+    "st1 { v8.d }[0], [%x[outptr]], #0x8\n"
     "tbz %x[n_channels], #1, 27f\n"
-    "st1 { v6.s }[2], [%x[outptr]], #0x4\n"
+    "st1 { v8.s }[2], [%x[outptr]], #0x4\n"
     "tbz %x[n_channels], #0, 30f\n"
-    "st1 { v6.h }[6], [%x[outptr]], #0x2\n"
+    "st1 { v8.h }[6], [%x[outptr]], #0x2\n"
     "b 30f\n"
     "27:"  // Oddments: Store: Bit 2: Bit 1: Unset
     "tbz %x[n_channels], #0, 30f\n"
-    "st1 { v6.h }[4], [%x[outptr]], #0x2\n"
+    "st1 { v8.h }[4], [%x[outptr]], #0x2\n"
     "b 30f\n"
     "28:"  // Oddments: Store: Bit 2: Unset
     "tbz %x[n_channels], #1, 29f\n"
-    "st1 { v6.s }[0], [%x[outptr]], #0x4\n"
+    "st1 { v8.s }[0], [%x[outptr]], #0x4\n"
     "tbz %x[n_channels], #0, 30f\n"
-    "st1 { v6.h }[2], [%x[outptr]], #0x2\n"
+    "st1 { v8.h }[2], [%x[outptr]], #0x2\n"
     "b 30f\n"
     "29:"  // Oddments: Store: Bit 2: Unset: Bit 1: Unset
     "tbz %x[n_channels], #0, 30f\n"
-    "st1 { v6.h }[0], [%x[outptr]], #0x2\n"
+    "st1 { v8.h }[0], [%x[outptr]], #0x2\n"
     "30:"  // Oddments: Store: Bit 2: End
     "31:"  // End
     : [n_channels] "+&r" (n_channels), [outptr] "+&r" (outptr)
     : [inptrs] "r" (inptrs), [n_valid_cells] "r" (n_valid_cells)
-    : "cc", "memory", "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28"
+    : "cc", "memory", "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x9", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28"
   );
 }
 
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst/generic.cpp
index fc0efc76ce..9db65d62b0 100644
--- a/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst/generic.cpp
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst/generic.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2021-2022 Arm Limited.
+ * Copyright (c) 2021-2023 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -82,90 +82,90 @@ void a64_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst_impl(
                         pad_left, pad_top, pad_right, pad_bottom);
 
   __asm__ __volatile__(
-    "ldr x4, [%x[args], %[offsetof_n_channels]]\n"
-    "ldr x20, [%x[args], %[offsetof_outptrs]]\n"
-    "cmp x4, #0x4\n"
-    "mov x5, #0x0\n"
-    "ldr x19, [%x[args], %[offsetof_inptrs]]\n"
-    "ldp x6, x7, [x20, #0x0]\n"
-    "mov x8, #0x0\n"
-    "ldp x17, x16, [x20, #0x10]\n"
-    "ldp x15, x14, [x19, #0x0]\n"
-    "ldp x13, x12, [x19, #0x10]\n"
-    "ldp x11, x10, [x19, #0x20]\n"
-    "ldp x9, x28, [x19, #0x30]\n"
-    "ldp x27, x26, [x19, #0x40]\n"
-    "ldp x25, x24, [x19, #0x50]\n"
-    "ldp x23, x22, [x19, #0x60]\n"
-    "ldp x21, x20, [x19, #0x70]\n"
     "ldr q7, [%x[args], %[offsetof_rescale]]\n"
+    "ldr x3, [%x[args], %[offsetof_n_channels]]\n"
+    "cmp x3, #0x4\n"
+    "mov x4, #0x0\n"
+    "ldr x21, [%x[args], %[offsetof_outptrs]]\n"
+    "ldr x20, [%x[args], %[offsetof_inptrs]]\n"
+    "mov x5, #0x0\n"
+    "ldp x6, x7, [x21, #0x0]\n"
+    "ldp x8, x17, [x21, #0x10]\n"
+    "ldp x16, x15, [x20, #0x0]\n"
+    "ldp x14, x13, [x20, #0x10]\n"
+    "ldp x12, x11, [x20, #0x20]\n"
+    "ldp x10, x9, [x20, #0x30]\n"
+    "ldp x28, x27, [x20, #0x40]\n"
+    "ldp x26, x25, [x20, #0x50]\n"
+    "ldp x24, x23, [x20, #0x60]\n"
+    "ldp x22, x21, [x20, #0x70]\n"
     "blt 3f\n"
-    "lsr x19, x4, #0x2\n"
-    "sub x4, x4, x19, LSL #2\n"
-    "ldr q6, [x10, x5]\n"
-    "ldr q5, [x9, x5]\n"
-    "subs x19, x19, #0x1\n"
-    "ldr q4, [x26, x5]\n"
-    "ldr q3, [x25, x5]\n"
-    "ldr q2, [x14, x5]\n"
-    "ldr q1, [x13, x5]\n"
-    "ldr q0, [x11, x5]\n"
-    "ldr q31, [x27, x5]\n"
-    "ldr q30, [x28, x5]\n"
-    "ldr q29, [x24, x5]\n"
-    "ldr q28, [x22, x5]\n"
-    "ldr q27, [x21, x5]\n"
-    "ldr q26, [x15, x5]\n"
-    "ldr q25, [x12, x5]\n"
-    "ldr q24, [x23, x5]\n"
-    "ldr q23, [x20, x5]\n"
-    "add x5, x5, #0x10\n"
+    "ldr q6, [x11, x4]\n"
+    "ldr q5, [x10, x4]\n"
+    "lsr x20, x3, #0x2\n"
+    "sub x3, x3, x20, LSL #2\n"
+    "ldr q4, [x27, x4]\n"
+    "ldr q3, [x26, x4]\n"
+    "subs x20, x20, #0x1\n"
+    "ldr q2, [x15, x4]\n"
+    "ldr q1, [x14, x4]\n"
+    "ldr q0, [x12, x4]\n"
+    "ldr q31, [x28, x4]\n"
+    "ldr q30, [x9, x4]\n"
+    "ldr q29, [x25, x4]\n"
+    "ldr q28, [x23, x4]\n"
+    "ldr q27, [x22, x4]\n"
+    "ldr q26, [x16, x4]\n"
+    "ldr q25, [x13, x4]\n"
+    "ldr q24, [x24, x4]\n"
+    "ldr q23, [x21, x4]\n"
+    "add x4, x4, #0x10\n"
     "beq 2f\n"
     "1:"  // Vector: Loop
     "fadd v17.4s, v6.4s, v5.4s\n"
+    "ldr q6, [x11, x4]\n"
+    "ldr q5, [x10, x4]\n"
     "fadd v16.4s, v4.4s, v3.4s\n"
-    "subs x19, x19, #0x1\n"
-    "ldr q6, [x10, x5]\n"
+    "ldr q4, [x27, x4]\n"
+    "ldr q3, [x26, x4]\n"
     "fadd v19.4s, v17.4s, v16.4s\n"
     "fadd v18.4s, v2.4s, v1.4s\n"
-    "ldr q5, [x9, x5]\n"
-    "ldr q4, [x26, x5]\n"
+    "ldr q2, [x15, x4]\n"
+    "ldr q1, [x14, x4]\n"
     "fadd v17.4s, v0.4s, v31.4s\n"
     "fadd v22.4s, v30.4s, v29.4s\n"
-    "ldr q3, [x25, x5]\n"
-    "ldr q2, [x14, x5]\n"
+    "ldr q0, [x12, x4]\n"
+    "ldr q31, [x28, x4]\n"
     "fadd v16.4s, v28.4s, v27.4s\n"
     "fadd v21.4s, v18.4s, v19.4s\n"
-    "ldr q1, [x13, x5]\n"
-    "ldr q0, [x11, x5]\n"
+    "ldr q30, [x9, x4]\n"
+    "ldr q29, [x25, x4]\n"
     "fadd v20.4s, v16.4s, v19.4s\n"
     "fadd v19.4s, v26.4s, v17.4s\n"
-    "ldr q31, [x27, x5]\n"
-    "ldr q30, [x28, x5]\n"
+    "ldr q28, [x23, x4]\n"
+    "ldr q27, [x22, x4]\n"
     "fadd v18.4s, v25.4s, v22.4s\n"
     "fadd v17.4s, v24.4s, v17.4s\n"
-    "ldr q29, [x24, x5]\n"
-    "ldr q28, [x22, x5]\n"
+    "ldr q26, [x16, x4]\n"
+    "ldr q25, [x13, x4]\n"
     "fadd v16.4s, v23.4s, v22.4s\n"
-    "fadd v19.4s, v19.4s, v21.4s\n"
-    "ldr q27, [x21, x5]\n"
-    "ldr q26, [x15, x5]\n"
-    "fadd v18.4s, v18.4s, v21.4s\n"
+    "fadd v19.4s, v21.4s, v19.4s\n"
+    "ldr q24, [x24, x4]\n"
+    "ldr q23, [x21, x4]\n"
+    "fadd v18.4s, v21.4s, v18.4s\n"
     "fadd v17.4s, v17.4s, v20.4s\n"
-    "ldr q25, [x12, x5]\n"
-    "ldr q24, [x23, x5]\n"
     "fadd v16.4s, v16.4s, v20.4s\n"
+    "subs x20, x20, #0x1\n"
     "fmul v19.4s, v19.4s, v7.s[0]\n"
-    "ldr q23, [x20, x5]\n"
-    "add x5, x5, #0x10\n"
+    "add x4, x4, #0x10\n"
     "fmul v18.4s, v18.4s, v7.s[1]\n"
     "fmul v17.4s, v17.4s, v7.s[2]\n"
-    "str q19, [x6, x8]\n"
+    "str q19, [x6, x5]\n"
     "fmul v16.4s, v16.4s, v7.s[3]\n"
-    "str q18, [x7, x8]\n"
-    "str q17, [x17, x8]\n"
-    "str q16, [x16, x8]\n"
-    "add x8, x8, #0x10\n"
+    "str q18, [x7, x5]\n"
+    "str q17, [x8, x5]\n"
+    "str q16, [x17, x5]\n"
+    "add x5, x5, #0x10\n"
     "bgt 1b\n"
     "2:"  // Vector: Tail
     "fadd v17.4s, v6.4s, v5.4s\n"
@@ -181,70 +181,70 @@ void a64_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst_impl(
     "fadd v18.4s, v25.4s, v22.4s\n"
     "fadd v17.4s, v24.4s, v17.4s\n"
     "fadd v16.4s, v23.4s, v22.4s\n"
-    "fadd v19.4s, v19.4s, v21.4s\n"
-    "fadd v18.4s, v18.4s, v21.4s\n"
+    "fadd v19.4s, v21.4s, v19.4s\n"
+    "fadd v18.4s, v21.4s, v18.4s\n"
     "fadd v17.4s, v17.4s, v20.4s\n"
     "fadd v16.4s, v16.4s, v20.4s\n"
     "fmul v19.4s, v19.4s, v7.s[0]\n"
-    "str q19, [x6, x8]\n"
+    "str q19, [x6, x5]\n"
     "fmul v18.4s, v18.4s, v7.s[1]\n"
     "fmul v17.4s, v17.4s, v7.s[2]\n"
-    "str q18, [x7, x8]\n"
+    "str q18, [x7, x5]\n"
     "fmul v16.4s, v16.4s, v7.s[3]\n"
-    "str q17, [x17, x8]\n"
-    "str q16, [x16, x8]\n"
-    "add x8, x8, #0x10\n"
-    "cbz x4, 4f\n"
+    "str q17, [x8, x5]\n"
+    "str q16, [x17, x5]\n"
+    "add x5, x5, #0x10\n"
+    "cbz x3, 4f\n"
     "3:"  // Oddments
-    "ldr s6, [x10, x5]\n"
-    "ldr s5, [x9, x5]\n"
+    "ldr s6, [x11, x4]\n"
+    "ldr s5, [x10, x4]\n"
     "fadd v17.4s, v6.4s, v5.4s\n"
-    "subs x4, x4, #0x1\n"
-    "ldr s4, [x26, x5]\n"
-    "ldr s3, [x25, x5]\n"
+    "subs x3, x3, #0x1\n"
+    "ldr s4, [x27, x4]\n"
+    "ldr s3, [x26, x4]\n"
     "fadd v16.4s, v4.4s, v3.4s\n"
     "fadd v19.4s, v17.4s, v16.4s\n"
-    "ldr s2, [x14, x5]\n"
-    "ldr s1, [x13, x5]\n"
+    "ldr s2, [x15, x4]\n"
+    "ldr s1, [x14, x4]\n"
     "fadd v18.4s, v2.4s, v1.4s\n"
     "fadd v21.4s, v18.4s, v19.4s\n"
-    "ldr s0, [x11, x5]\n"
-    "ldr s31, [x27, x5]\n"
+    "ldr s0, [x12, x4]\n"
+    "ldr s31, [x28, x4]\n"
     "fadd v17.4s, v0.4s, v31.4s\n"
-    "ldr s30, [x28, x5]\n"
-    "ldr s29, [x24, x5]\n"
+    "ldr s30, [x9, x4]\n"
+    "ldr s29, [x25, x4]\n"
     "fadd v22.4s, v30.4s, v29.4s\n"
-    "ldr s28, [x22, x5]\n"
-    "ldr s27, [x21, x5]\n"
+    "ldr s28, [x23, x4]\n"
+    "ldr s27, [x22, x4]\n"
     "fadd v16.4s, v28.4s, v27.4s\n"
     "fadd v20.4s, v16.4s, v19.4s\n"
-    "ldr s26, [x15, x5]\n"
-    "ldr s25, [x12, x5]\n"
+    "ldr s26, [x16, x4]\n"
+    "ldr s25, [x13, x4]\n"
     "fadd v19.4s, v26.4s, v17.4s\n"
     "fadd v18.4s, v25.4s, v22.4s\n"
-    "ldr s24, [x23, x5]\n"
-    "ldr s23, [x20, x5]\n"
+    "ldr s24, [x24, x4]\n"
+    "ldr s23, [x21, x4]\n"
     "fadd v17.4s, v24.4s, v17.4s\n"
     "fadd v16.4s, v23.4s, v22.4s\n"
-    "fadd v19.4s, v19.4s, v21.4s\n"
-    "fadd v18.4s, v18.4s, v21.4s\n"
-    "add x5, x5, #0x4\n"
+    "fadd v19.4s, v21.4s, v19.4s\n"
+    "fadd v18.4s, v21.4s, v18.4s\n"
+    "add x4, x4, #0x4\n"
     "fadd v17.4s, v17.4s, v20.4s\n"
     "fadd v16.4s, v16.4s, v20.4s\n"
     "fmul v19.4s, v19.4s, v7.s[0]\n"
     "fmul v18.4s, v18.4s, v7.s[1]\n"
-    "str s19, [x6, x8]\n"
+    "str s19, [x6, x5]\n"
     "fmul v17.4s, v17.4s, v7.s[2]\n"
     "fmul v16.4s, v16.4s, v7.s[3]\n"
-    "str s18, [x7, x8]\n"
-    "str s17, [x17, x8]\n"
-    "str s16, [x16, x8]\n"
-    "add x8, x8, #0x4\n"
+    "str s18, [x7, x5]\n"
+    "str s17, [x8, x5]\n"
+    "str s16, [x17, x5]\n"
+    "add x5, x5, #0x4\n"
     "bgt 3b\n"
     "4:"  // End
     :
     : [args] "r" (&args), [offsetof_inptrs] "I" (offsetof(KernelArgs, inptrs)), [offsetof_n_channels] "I" (offsetof(KernelArgs, n_channels)), [offsetof_outptrs] "I" (offsetof(KernelArgs, outptrs)), [offsetof_rescale] "I" (offsetof(KernelArgs, rescale_vals))
-    : "cc", "memory", "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x4", "x5", "x6", "x7", "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x17", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28"
+    : "cc", "memory", "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x3", "x4", "x5", "x6", "x7", "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x17", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28"
   );
 }
 
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_fp32_nhwc_avg_generic_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_fp32_nhwc_avg_generic_depthfirst/generic.cpp
index 2d20164640..3f90610591 100644
--- a/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_fp32_nhwc_avg_generic_depthfirst/generic.cpp
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_fp32_nhwc_avg_generic_depthfirst/generic.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2021-2022 Arm Limited.
+ * Copyright (c) 2021-2023 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -42,258 +42,258 @@ void a64_fp32_nhwc_avg_generic_depthfirst_impl(
   const auto rescale_value = static_cast<float>(1.0f / static_cast<float>(window_cells));
 
   __asm__ __volatile__(
+    "ld1r { v9.4s }, [%x[rescale_ptr]]\n"
     "cmp %x[n_channels], #0x10\n"
-    "ld1r { v7.4s }, [%x[rescale_ptr]]\n"
-    "mov x28, #0x0\n"
-    "mov x27, #0x10\n"  // cntb _, ALL, #1
-    "mov x26, #0x20\n"  // cntb _, ALL, #2
-    "mov x25, #0x30\n"  // cntb _, ALL, #3
+    "mov x9, #0x0\n"
+    "mov x28, #0x10\n"  // cntb _, ALL, #1
+    "mov x27, #0x20\n"  // cntb _, ALL, #2
+    "mov x26, #0x30\n"  // cntb _, ALL, #3
     "blt 7f\n"
     "1:"  // 4-vectors of channels
-    "lsr x24, %x[n_valid_cells], #0x2\n"
+    "lsr x25, %x[n_valid_cells], #0x2\n"
+    "movi v8.16b, #0x0\n"
+    "movi v7.16b, #0x0\n"
+    "mov x20, %x[inptrs]\n"
     "movi v6.16b, #0x0\n"
     "movi v5.16b, #0x0\n"
-    "mov x19, %x[inptrs]\n"
-    "movi v4.16b, #0x0\n"
-    "movi v3.16b, #0x0\n"
-    "cbz x24, 4f\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
-    "subs x24, x24, #0x1\n"
-    "add x19, x19, #0x20\n"
-    "ldr q2, [x23, x28]\n"
-    "ldr q1, [x22, x28]\n"
-    "ldr q0, [x21, x28]\n"
-    "ldr q31, [x20, x28]\n"
-    "ldr q30, [x23, x27]\n"
-    "ldr q22, [x22, x27]\n"
-    "ldr q29, [x21, x27]\n"
-    "ldr q28, [x20, x27]\n"
-    "ldr q27, [x23, x26]\n"
-    "ldr q21, [x22, x26]\n"
-    "ldr q26, [x21, x26]\n"
-    "ldr q17, [x20, x26]\n"
-    "ldr q25, [x23, x25]\n"
-    "ldr q20, [x22, x25]\n"
-    "ldr q24, [x21, x25]\n"
-    "ldr q16, [x20, x25]\n"
+    "cbz x25, 4f\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "ldr q4, [x24, x9]\n"
+    "subs x25, x25, #0x1\n"
+    "ldr q3, [x23, x9]\n"
+    "ldr q2, [x24, x28]\n"
+    "ldr q1, [x23, x28]\n"
+    "ldr q0, [x24, x27]\n"
+    "ldr q31, [x23, x27]\n"
+    "ldr q30, [x24, x26]\n"
+    "ldr q29, [x23, x26]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "add x20, x20, #0x20\n"
+    "ldr q28, [x22, x9]\n"
+    "ldr q22, [x21, x9]\n"
+    "ldr q27, [x22, x28]\n"
+    "ldr q21, [x21, x28]\n"
+    "ldr q26, [x22, x27]\n"
+    "ldr q20, [x21, x27]\n"
+    "ldr q25, [x22, x26]\n"
+    "ldr q24, [x21, x26]\n"
     "beq 3f\n"
     "2:"  // 4-vectors of channels: 4 inputs loop
-    "fadd v23.4s, v2.4s, v1.4s\n"
-    "fadd v19.4s, v0.4s, v31.4s\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
-    "fadd v22.4s, v30.4s, v22.4s\n"
-    "fadd v18.4s, v29.4s, v28.4s\n"
-    "subs x24, x24, #0x1\n"
-    "add x19, x19, #0x20\n"
-    "fadd v21.4s, v27.4s, v21.4s\n"
-    "fadd v17.4s, v26.4s, v17.4s\n"
-    "ldr q2, [x23, x28]\n"
-    "ldr q1, [x22, x28]\n"
-    "fadd v20.4s, v25.4s, v20.4s\n"
-    "fadd v16.4s, v24.4s, v16.4s\n"
-    "ldr q0, [x21, x28]\n"
-    "ldr q31, [x20, x28]\n"
+    "fadd v23.4s, v4.4s, v3.4s\n"
+    "fadd v19.4s, v28.4s, v22.4s\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "ldr q4, [x24, x9]\n"
+    "ldr q3, [x23, x9]\n"
+    "fadd v22.4s, v2.4s, v1.4s\n"
+    "ldr q2, [x24, x28]\n"
+    "fadd v18.4s, v27.4s, v21.4s\n"
+    "ldr q1, [x23, x28]\n"
+    "fadd v21.4s, v0.4s, v31.4s\n"
+    "ldr q0, [x24, x27]\n"
+    "fadd v17.4s, v26.4s, v20.4s\n"
+    "ldr q31, [x23, x27]\n"
+    "fadd v20.4s, v30.4s, v29.4s\n"
+    "ldr q30, [x24, x26]\n"
+    "fadd v16.4s, v25.4s, v24.4s\n"
+    "ldr q29, [x23, x26]\n"
     "fadd v19.4s, v23.4s, v19.4s\n"
     "fadd v18.4s, v22.4s, v18.4s\n"
-    "ldr q30, [x23, x27]\n"
-    "ldr q22, [x22, x27]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "ldr q28, [x22, x9]\n"
+    "ldr q22, [x21, x9]\n"
     "fadd v17.4s, v21.4s, v17.4s\n"
     "fadd v16.4s, v20.4s, v16.4s\n"
-    "ldr q29, [x21, x27]\n"
-    "ldr q28, [x20, x27]\n"
-    "fadd v6.4s, v6.4s, v19.4s\n"
-    "fadd v5.4s, v5.4s, v18.4s\n"
-    "ldr q27, [x23, x26]\n"
-    "ldr q21, [x22, x26]\n"
-    "fadd v4.4s, v4.4s, v17.4s\n"
-    "fadd v3.4s, v3.4s, v16.4s\n"
-    "ldr q26, [x21, x26]\n"
-    "ldr q17, [x20, x26]\n"
-    "ldr q25, [x23, x25]\n"
-    "ldr q20, [x22, x25]\n"
-    "ldr q24, [x21, x25]\n"
-    "ldr q16, [x20, x25]\n"
+    "ldr q27, [x22, x28]\n"
+    "ldr q21, [x21, x28]\n"
+    "subs x25, x25, #0x1\n"
+    "fadd v8.4s, v8.4s, v19.4s\n"
+    "ldr q26, [x22, x27]\n"
+    "ldr q20, [x21, x27]\n"
+    "fadd v7.4s, v7.4s, v18.4s\n"
+    "fadd v6.4s, v6.4s, v17.4s\n"
+    "ldr q25, [x22, x26]\n"
+    "ldr q24, [x21, x26]\n"
+    "fadd v5.4s, v5.4s, v16.4s\n"
+    "add x20, x20, #0x20\n"
     "bgt 2b\n"
     "3:"  // 4-vectors of channels: 4 inputs tail
-    "fadd v23.4s, v2.4s, v1.4s\n"
-    "fadd v19.4s, v0.4s, v31.4s\n"
-    "fadd v22.4s, v30.4s, v22.4s\n"
-    "fadd v18.4s, v29.4s, v28.4s\n"
-    "fadd v21.4s, v27.4s, v21.4s\n"
-    "fadd v17.4s, v26.4s, v17.4s\n"
-    "fadd v20.4s, v25.4s, v20.4s\n"
-    "fadd v16.4s, v24.4s, v16.4s\n"
+    "fadd v23.4s, v4.4s, v3.4s\n"
+    "fadd v19.4s, v28.4s, v22.4s\n"
+    "fadd v22.4s, v2.4s, v1.4s\n"
+    "fadd v18.4s, v27.4s, v21.4s\n"
+    "fadd v21.4s, v0.4s, v31.4s\n"
+    "fadd v17.4s, v26.4s, v20.4s\n"
+    "fadd v20.4s, v30.4s, v29.4s\n"
+    "fadd v16.4s, v25.4s, v24.4s\n"
     "fadd v19.4s, v23.4s, v19.4s\n"
     "fadd v18.4s, v22.4s, v18.4s\n"
     "fadd v17.4s, v21.4s, v17.4s\n"
     "fadd v16.4s, v20.4s, v16.4s\n"
-    "fadd v6.4s, v6.4s, v19.4s\n"
-    "fadd v5.4s, v5.4s, v18.4s\n"
-    "fadd v4.4s, v4.4s, v17.4s\n"
-    "fadd v3.4s, v3.4s, v16.4s\n"
+    "fadd v8.4s, v8.4s, v19.4s\n"
+    "fadd v7.4s, v7.4s, v18.4s\n"
+    "fadd v6.4s, v6.4s, v17.4s\n"
+    "fadd v5.4s, v5.4s, v16.4s\n"
     "4:"  // 4-vectors of channels: After loop
-    "ands x20, %x[n_valid_cells], #0x3\n"
+    "ands x21, %x[n_valid_cells], #0x3\n"
     "beq 6f\n"
     "5:"  // 4-vectors of channels: Single input loop
-    "ldr x23, [x19], #0x8\n"
-    "ldr q2, [x23, x28]\n"
-    "subs x20, x20, #0x1\n"
-    "fadd v6.4s, v6.4s, v2.4s\n"
-    "ldr q30, [x23, x27]\n"
-    "ldr q27, [x23, x26]\n"
+    "ldr x24, [x20], #0x8\n"
+    "ldr q4, [x24, x9]\n"
+    "subs x21, x21, #0x1\n"
+    "fadd v8.4s, v8.4s, v4.4s\n"
+    "ldr q2, [x24, x28]\n"
+    "ldr q0, [x24, x27]\n"
+    "fadd v7.4s, v7.4s, v2.4s\n"
+    "fadd v6.4s, v6.4s, v0.4s\n"
+    "ldr q30, [x24, x26]\n"
     "fadd v5.4s, v5.4s, v30.4s\n"
-    "fadd v4.4s, v4.4s, v27.4s\n"
-    "ldr q25, [x23, x25]\n"
-    "fadd v3.4s, v3.4s, v25.4s\n"
     "bgt 5b\n"
     "6:"  // 4-vectors of channels: Single input loop: End
     "sub %x[n_channels], %x[n_channels], #0x10\n"
     "cmp %x[n_channels], #0x10\n"
-    "fmul v6.4s, v6.4s, v7.4s\n"
-    "fmul v5.4s, v5.4s, v7.4s\n"
-    "fmul v4.4s, v4.4s, v7.4s\n"
-    "fmul v3.4s, v3.4s, v7.4s\n"
-    "str q6, [%x[outptr], x28]\n"
+    "fmul v8.4s, v8.4s, v9.4s\n"
+    "fmul v7.4s, v7.4s, v9.4s\n"
+    "fmul v6.4s, v6.4s, v9.4s\n"
+    "fmul v5.4s, v5.4s, v9.4s\n"
+    "str q8, [%x[outptr], x9]\n"
+    "add x9, x9, #0x40\n"
+    "str q7, [%x[outptr], x28]\n"
     "add x28, x28, #0x40\n"
-    "str q5, [%x[outptr], x27]\n"
+    "str q6, [%x[outptr], x27]\n"
     "add x27, x27, #0x40\n"
-    "str q4, [%x[outptr], x26]\n"
+    "str q5, [%x[outptr], x26]\n"
     "add x26, x26, #0x40\n"
-    "str q3, [%x[outptr], x25]\n"
-    "add x25, x25, #0x40\n"
     "bge 1b\n"
     "cbz %x[n_channels], 25f\n"
     "7:"  // Single vector of channels
     "cmp %x[n_channels], #0x4\n"
     "blt 14f\n"
     "8:"  // Single vector of channels: Loop
-    "lsr x24, %x[n_valid_cells], #0x2\n"
-    "movi v6.16b, #0x0\n"
-    "mov x19, %x[inptrs]\n"
-    "cbz x24, 11f\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
-    "subs x24, x24, #0x1\n"
-    "add x19, x19, #0x20\n"
-    "ldr q2, [x23, x28]\n"
-    "ldr q1, [x22, x28]\n"
-    "ldr q0, [x21, x28]\n"
-    "ldr q31, [x20, x28]\n"
+    "lsr x25, %x[n_valid_cells], #0x2\n"
+    "movi v8.16b, #0x0\n"
+    "mov x20, %x[inptrs]\n"
+    "cbz x25, 11f\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "ldr q4, [x24, x9]\n"
+    "subs x25, x25, #0x1\n"
+    "ldr q3, [x23, x9]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "add x20, x20, #0x20\n"
+    "ldr q28, [x22, x9]\n"
+    "ldr q22, [x21, x9]\n"
     "beq 10f\n"
     "9:"  // Single vector of channels: Loop: 4 inputs loop
-    "fadd v23.4s, v2.4s, v1.4s\n"
-    "fadd v19.4s, v0.4s, v31.4s\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
+    "fadd v23.4s, v4.4s, v3.4s\n"
+    "fadd v19.4s, v28.4s, v22.4s\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "ldr q4, [x24, x9]\n"
+    "ldr q3, [x23, x9]\n"
     "fadd v19.4s, v23.4s, v19.4s\n"
-    "subs x24, x24, #0x1\n"
-    "fadd v6.4s, v6.4s, v19.4s\n"
-    "add x19, x19, #0x20\n"
-    "ldr q2, [x23, x28]\n"
-    "ldr q1, [x22, x28]\n"
-    "ldr q0, [x21, x28]\n"
-    "ldr q31, [x20, x28]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "subs x25, x25, #0x1\n"
+    "ldr q28, [x22, x9]\n"
+    "ldr q22, [x21, x9]\n"
+    "fadd v8.4s, v8.4s, v19.4s\n"
+    "add x20, x20, #0x20\n"
     "bgt 9b\n"
     "10:"  // Single vector of channels: Loop: 4 inputs tail
-    "fadd v23.4s, v2.4s, v1.4s\n"
-    "fadd v19.4s, v0.4s, v31.4s\n"
+    "fadd v23.4s, v4.4s, v3.4s\n"
+    "fadd v19.4s, v28.4s, v22.4s\n"
     "fadd v19.4s, v23.4s, v19.4s\n"
-    "fadd v6.4s, v6.4s, v19.4s\n"
+    "fadd v8.4s, v8.4s, v19.4s\n"
     "11:"  // Single vector of channels: Loop: After loop
-    "ands x20, %x[n_valid_cells], #0x3\n"
+    "ands x21, %x[n_valid_cells], #0x3\n"
     "beq 13f\n"
     "12:"  // Single vector of channels: Loop: Single input loop
-    "ldr x23, [x19], #0x8\n"
-    "ldr q2, [x23, x28]\n"
-    "subs x20, x20, #0x1\n"
-    "fadd v6.4s, v6.4s, v2.4s\n"
+    "ldr x24, [x20], #0x8\n"
+    "ldr q4, [x24, x9]\n"
+    "subs x21, x21, #0x1\n"
+    "fadd v8.4s, v8.4s, v4.4s\n"
     "bgt 12b\n"
     "13:"  // Single vector of channels: Loop: Single input loop: End
     "sub %x[n_channels], %x[n_channels], #0x4\n"
     "cmp %x[n_channels], #0x4\n"
-    "fmul v6.4s, v6.4s, v7.4s\n"
-    "str q6, [%x[outptr], x28]\n"
-    "add x28, x28, #0x10\n"
+    "fmul v8.4s, v8.4s, v9.4s\n"
+    "str q8, [%x[outptr], x9]\n"
+    "add x9, x9, #0x10\n"
     "bge 8b\n"
     "cbz %x[n_channels], 25f\n"
     "14:"  // Oddments
-    "lsr x24, %x[n_valid_cells], #0x2\n"
-    "add %x[outptr], %x[outptr], x28\n"
-    "movi v6.16b, #0x0\n"
-    "mov x19, %x[inptrs]\n"
-    "cbz x24, 18f\n"
+    "lsr x25, %x[n_valid_cells], #0x2\n"
+    "add %x[outptr], %x[outptr], x9\n"
+    "movi v8.16b, #0x0\n"
+    "mov x20, %x[inptrs]\n"
+    "cbz x25, 18f\n"
     "15:"  // Oddments: 4 inputs loop
-    "ldp x23, x22, [x19, #0x0]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
-    "add x19, x19, #0x20\n"
-    "add x23, x23, x28\n"
-    "add x22, x22, x28\n"
-    "add x21, x21, x28\n"
-    "movi v2.16b, #0x0\n"
-    "movi v1.16b, #0x0\n"
-    "add x20, x20, x28\n"
-    "movi v0.16b, #0x0\n"
-    "movi v31.16b, #0x0\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "add x20, x20, #0x20\n"
+    "add x24, x24, x9\n"
+    "add x23, x23, x9\n"
+    "add x22, x22, x9\n"
+    "movi v4.16b, #0x0\n"
+    "movi v3.16b, #0x0\n"
+    "add x21, x21, x9\n"
+    "movi v28.16b, #0x0\n"
+    "movi v22.16b, #0x0\n"
     "tbz %x[n_channels], #1, 16f\n"
-    "ldr d2, [x23], #0x8\n"
-    "ldr d1, [x22], #0x8\n"
-    "ldr d0, [x21], #0x8\n"
-    "ldr d31, [x20], #0x8\n"
+    "ldr d4, [x24], #0x8\n"
+    "ldr d3, [x23], #0x8\n"
+    "ldr d28, [x22], #0x8\n"
+    "ldr d22, [x21], #0x8\n"
     "tbz %x[n_channels], #0, 17f\n"
-    "ld1 { v2.s }[2], [x23], #0x4\n"
-    "ld1 { v1.s }[2], [x22], #0x4\n"
-    "ld1 { v0.s }[2], [x21], #0x4\n"
-    "ld1 { v31.s }[2], [x20], #0x4\n"
+    "ld1 { v4.s }[2], [x24], #0x4\n"
+    "ld1 { v3.s }[2], [x23], #0x4\n"
+    "ld1 { v28.s }[2], [x22], #0x4\n"
+    "ld1 { v22.s }[2], [x21], #0x4\n"
     "b 17f\n"
     "16:"  // Oddments: 4 inputs loop: Load: Bit 1: Unset
     "tbz %x[n_channels], #0, 17f\n"
-    "ldr s2, [x23], #0x4\n"
-    "ldr s1, [x22], #0x4\n"
-    "ldr s0, [x21], #0x4\n"
-    "ldr s31, [x20], #0x4\n"
+    "ldr s4, [x24], #0x4\n"
+    "ldr s3, [x23], #0x4\n"
+    "ldr s28, [x22], #0x4\n"
+    "ldr s22, [x21], #0x4\n"
     "17:"  // Oddments: 4 inputs loop: Load: Bit 1: End
-    "fadd v23.4s, v2.4s, v1.4s\n"
-    "fadd v19.4s, v0.4s, v31.4s\n"
-    "subs x24, x24, #0x1\n"
+    "fadd v23.4s, v4.4s, v3.4s\n"
+    "fadd v19.4s, v28.4s, v22.4s\n"
+    "subs x25, x25, #0x1\n"
     "fadd v19.4s, v23.4s, v19.4s\n"
-    "fadd v6.4s, v6.4s, v19.4s\n"
+    "fadd v8.4s, v8.4s, v19.4s\n"
     "bgt 15b\n"
     "18:"  // Oddments: After loop
-    "ands x20, %x[n_valid_cells], #0x3\n"
+    "ands x21, %x[n_valid_cells], #0x3\n"
     "beq 22f\n"
     "19:"  // Oddments: Single input loop
-    "ldr x23, [x19], #0x8\n"
-    "add x23, x23, x28\n"
-    "movi v2.16b, #0x0\n"
+    "ldr x24, [x20], #0x8\n"
+    "add x24, x24, x9\n"
+    "movi v4.16b, #0x0\n"
     "tbz %x[n_channels], #1, 20f\n"
-    "ldr d2, [x23], #0x8\n"
+    "ldr d4, [x24], #0x8\n"
     "tbz %x[n_channels], #0, 21f\n"
-    "ld1 { v2.s }[2], [x23], #0x4\n"
+    "ld1 { v4.s }[2], [x24], #0x4\n"
     "b 21f\n"
     "20:"  // Oddments: Single input loop: Load: Bit 1: Unset
     "tbz %x[n_channels], #0, 21f\n"
-    "ldr s2, [x23], #0x4\n"
+    "ldr s4, [x24], #0x4\n"
     "21:"  // Oddments: Single input loop: Load: Bit 1: End
-    "subs x20, x20, #0x1\n"
-    "fadd v6.4s, v6.4s, v2.4s\n"
+    "subs x21, x21, #0x1\n"
+    "fadd v8.4s, v8.4s, v4.4s\n"
     "bgt 19b\n"
     "22:"  // Oddments: Single input loop: End
-    "fmul v6.4s, v6.4s, v7.4s\n"
+    "fmul v8.4s, v8.4s, v9.4s\n"
     "tbz %x[n_channels], #1, 23f\n"
-    "st1 { v6.d }[0], [%x[outptr]], #0x8\n"
+    "st1 { v8.d }[0], [%x[outptr]], #0x8\n"
     "tbz %x[n_channels], #0, 24f\n"
-    "st1 { v6.s }[2], [%x[outptr]], #0x4\n"
+    "st1 { v8.s }[2], [%x[outptr]], #0x4\n"
     "b 24f\n"
     "23:"  // Oddments: Store: Bit 1: Unset
     "tbz %x[n_channels], #0, 24f\n"
-    "st1 { v6.s }[0], [%x[outptr]], #0x4\n"
+    "st1 { v8.s }[0], [%x[outptr]], #0x4\n"
     "24:"  // Oddments: Store: Bit 1: End
     "25:"  // End
     : [n_channels] "+&r" (n_channels), [outptr] "+&r" (outptr)
     : [inptrs] "r" (inptrs), [n_valid_cells] "r" (n_valid_cells), [rescale_ptr] "r" (&rescale_value)
-    : "cc", "memory", "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28"
+    : "cc", "memory", "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x9", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28"
   );
 }
 
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_fp32_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_fp32_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp
index db01487e31..2e7fb3c5b1 100644
--- a/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_fp32_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_fp32_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2021-2022 Arm Limited.
+ * Copyright (c) 2021-2023 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -62,111 +62,111 @@ void a64_fp32_nhwc_max_2x2_s1_output2x2_depthfirst_impl(
                         pad_left, pad_top, pad_right, pad_bottom);
 
   __asm__ __volatile__(
-    "ldr x15, [%x[args], %[offsetof_n_channels]]\n"
-    "ldr x20, [%x[args], %[offsetof_outptrs]]\n"
-    "cmp x15, #0x4\n"
-    "mov x14, #0x0\n"
-    "ldr x19, [%x[args], %[offsetof_inptrs]]\n"
-    "ldp x13, x12, [x20, #0x0]\n"
-    "mov x11, #0x0\n"
-    "ldp x10, x9, [x20, #0x10]\n"
-    "ldp x28, x27, [x19, #0x0]\n"
-    "ldp x26, x25, [x19, #0x10]\n"
-    "ldp x24, x23, [x19, #0x20]\n"
-    "ldp x22, x21, [x19, #0x30]\n"
-    "ldr x20, [x19, #0x40]\n"
+    "ldr x16, [%x[args], %[offsetof_n_channels]]\n"
+    "ldr x21, [%x[args], %[offsetof_outptrs]]\n"
+    "cmp x16, #0x4\n"
+    "mov x15, #0x0\n"
+    "ldr x20, [%x[args], %[offsetof_inptrs]]\n"
+    "ldp x14, x13, [x21, #0x0]\n"
+    "mov x12, #0x0\n"
+    "ldp x11, x10, [x21, #0x10]\n"
+    "ldp x9, x28, [x20, #0x0]\n"
+    "ldp x27, x26, [x20, #0x10]\n"
+    "ldp x25, x24, [x20, #0x20]\n"
+    "ldp x23, x22, [x20, #0x30]\n"
+    "ldr x21, [x20, #0x40]\n"
     "blt 3f\n"
-    "lsr x19, x15, #0x2\n"
-    "sub x15, x15, x19, LSL #2\n"
-    "ldr q30, [x27, x14]\n"
-    "ldr q29, [x24, x14]\n"
-    "subs x19, x19, #0x1\n"
-    "ldr q28, [x21, x14]\n"
-    "ldr q27, [x25, x14]\n"
-    "ldr q26, [x28, x14]\n"
-    "ldr q25, [x23, x14]\n"
-    "ldr q24, [x26, x14]\n"
-    "ldr q23, [x22, x14]\n"
-    "ldr q22, [x20, x14]\n"
-    "add x14, x14, #0x10\n"
+    "ldr q30, [x28, x15]\n"
+    "ldr q29, [x25, x15]\n"
+    "lsr x20, x16, #0x2\n"
+    "sub x16, x16, x20, LSL #2\n"
+    "ldr q28, [x22, x15]\n"
+    "ldr q27, [x26, x15]\n"
+    "subs x20, x20, #0x1\n"
+    "ldr q26, [x9, x15]\n"
+    "ldr q25, [x27, x15]\n"
+    "ldr q24, [x24, x15]\n"
+    "ldr q23, [x23, x15]\n"
+    "ldr q22, [x21, x15]\n"
+    "add x15, x15, #0x10\n"
     "beq 2f\n"
     "1:"  // Vector: Loop
     "fmax v21.4s, v30.4s, v29.4s\n"
+    "ldr q30, [x28, x15]\n"
     "fmax v20.4s, v29.4s, v28.4s\n"
-    "subs x19, x19, #0x1\n"
-    "ldr q30, [x27, x14]\n"
+    "ldr q29, [x25, x15]\n"
+    "ldr q28, [x22, x15]\n"
     "fmax v19.4s, v27.4s, v26.4s\n"
+    "ldr q26, [x9, x15]\n"
     "fmax v18.4s, v25.4s, v24.4s\n"
-    "ldr q29, [x24, x14]\n"
-    "ldr q28, [x21, x14]\n"
-    "fmax v17.4s, v23.4s, v27.4s\n"
-    "fmax v16.4s, v25.4s, v22.4s\n"
-    "ldr q27, [x25, x14]\n"
-    "ldr q26, [x28, x14]\n"
+    "ldr q25, [x27, x15]\n"
+    "fmax v17.4s, v27.4s, v23.4s\n"
+    "ldr q27, [x26, x15]\n"
+    "fmax v16.4s, v24.4s, v22.4s\n"
+    "ldr q24, [x24, x15]\n"
+    "ldr q23, [x23, x15]\n"
+    "subs x20, x20, #0x1\n"
     "fmax v19.4s, v21.4s, v19.4s\n"
+    "ldr q22, [x21, x15]\n"
     "fmax v18.4s, v18.4s, v21.4s\n"
-    "ldr q25, [x23, x14]\n"
-    "ldr q24, [x26, x14]\n"
-    "fmax v17.4s, v20.4s, v17.4s\n"
-    "fmax v16.4s, v20.4s, v16.4s\n"
-    "ldr q23, [x22, x14]\n"
-    "ldr q22, [x20, x14]\n"
-    "add x14, x14, #0x10\n"
-    "str q19, [x13, x11]\n"
-    "str q18, [x12, x11]\n"
-    "str q17, [x10, x11]\n"
-    "str q16, [x9, x11]\n"
-    "add x11, x11, #0x10\n"
+    "fmax v17.4s, v17.4s, v20.4s\n"
+    "add x15, x15, #0x10\n"
+    "fmax v16.4s, v16.4s, v20.4s\n"
+    "str q19, [x14, x12]\n"
+    "str q18, [x13, x12]\n"
+    "str q17, [x11, x12]\n"
+    "str q16, [x10, x12]\n"
+    "add x12, x12, #0x10\n"
     "bgt 1b\n"
     "2:"  // Vector: Tail
     "fmax v21.4s, v30.4s, v29.4s\n"
     "fmax v20.4s, v29.4s, v28.4s\n"
     "fmax v19.4s, v27.4s, v26.4s\n"
     "fmax v18.4s, v25.4s, v24.4s\n"
-    "fmax v17.4s, v23.4s, v27.4s\n"
-    "fmax v16.4s, v25.4s, v22.4s\n"
+    "fmax v17.4s, v27.4s, v23.4s\n"
+    "fmax v16.4s, v24.4s, v22.4s\n"
     "fmax v19.4s, v21.4s, v19.4s\n"
     "fmax v18.4s, v18.4s, v21.4s\n"
-    "str q19, [x13, x11]\n"
-    "fmax v17.4s, v20.4s, v17.4s\n"
-    "fmax v16.4s, v20.4s, v16.4s\n"
-    "str q18, [x12, x11]\n"
-    "str q17, [x10, x11]\n"
-    "str q16, [x9, x11]\n"
-    "add x11, x11, #0x10\n"
-    "cbz x15, 4f\n"
+    "str q19, [x14, x12]\n"
+    "fmax v17.4s, v17.4s, v20.4s\n"
+    "fmax v16.4s, v16.4s, v20.4s\n"
+    "str q18, [x13, x12]\n"
+    "str q17, [x11, x12]\n"
+    "str q16, [x10, x12]\n"
+    "add x12, x12, #0x10\n"
+    "cbz x16, 4f\n"
     "3:"  // Oddments
-    "ldr s30, [x27, x14]\n"
-    "ldr s29, [x24, x14]\n"
+    "ldr s30, [x28, x15]\n"
+    "ldr s29, [x25, x15]\n"
     "fmax v21.4s, v30.4s, v29.4s\n"
-    "subs x15, x15, #0x1\n"
-    "ldr s28, [x21, x14]\n"
-    "ldr s27, [x25, x14]\n"
+    "subs x16, x16, #0x1\n"
+    "ldr s28, [x22, x15]\n"
+    "ldr s27, [x26, x15]\n"
     "fmax v20.4s, v29.4s, v28.4s\n"
-    "ldr s26, [x28, x14]\n"
-    "ldr s25, [x23, x14]\n"
+    "ldr s26, [x9, x15]\n"
+    "ldr s25, [x27, x15]\n"
     "fmax v19.4s, v27.4s, v26.4s\n"
     "fmax v19.4s, v21.4s, v19.4s\n"
-    "ldr s24, [x26, x14]\n"
-    "ldr s23, [x22, x14]\n"
+    "ldr s24, [x24, x15]\n"
+    "ldr s23, [x23, x15]\n"
     "fmax v18.4s, v25.4s, v24.4s\n"
-    "fmax v17.4s, v23.4s, v27.4s\n"
-    "ldr s22, [x20, x14]\n"
-    "fmax v16.4s, v25.4s, v22.4s\n"
-    "add x14, x14, #0x4\n"
+    "fmax v17.4s, v27.4s, v23.4s\n"
+    "ldr s22, [x21, x15]\n"
+    "fmax v16.4s, v24.4s, v22.4s\n"
+    "add x15, x15, #0x4\n"
     "fmax v18.4s, v18.4s, v21.4s\n"
-    "fmax v17.4s, v20.4s, v17.4s\n"
-    "fmax v16.4s, v20.4s, v16.4s\n"
-    "str s19, [x13, x11]\n"
-    "str s18, [x12, x11]\n"
-    "str s17, [x10, x11]\n"
-    "str s16, [x9, x11]\n"
-    "add x11, x11, #0x4\n"
+    "fmax v17.4s, v17.4s, v20.4s\n"
+    "fmax v16.4s, v16.4s, v20.4s\n"
+    "str s19, [x14, x12]\n"
+    "str s18, [x13, x12]\n"
+    "str s17, [x11, x12]\n"
+    "str s16, [x10, x12]\n"
+    "add x12, x12, #0x4\n"
     "bgt 3b\n"
     "4:"  // End
     :
     : [args] "r" (&args), [offsetof_inptrs] "I" (offsetof(KernelArgs, inptrs)), [offsetof_n_channels] "I" (offsetof(KernelArgs, n_channels)), [offsetof_outptrs] "I" (offsetof(KernelArgs, outptrs))
-    : "cc", "memory", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28"
+    : "cc", "memory", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28"
   );
 }
 
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_fp32_nhwc_max_generic_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_fp32_nhwc_max_generic_depthfirst/generic.cpp
index 4752057943..4f1af09e08 100644
--- a/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_fp32_nhwc_max_generic_depthfirst/generic.cpp
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_fp32_nhwc_max_generic_depthfirst/generic.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2021-2022 Arm Limited.
+ * Copyright (c) 2021-2023 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -41,253 +41,253 @@ void a64_fp32_nhwc_max_generic_depthfirst_impl(
 {
   __asm__ __volatile__(
     "cmp %x[n_channels], #0x10\n"
-    "mov x28, #0x0\n"
-    "mov x27, #0x10\n"  // cntb _, ALL, #1
-    "mov x26, #0x20\n"  // cntb _, ALL, #2
-    "mov x25, #0x30\n"  // cntb _, ALL, #3
+    "mov x9, #0x0\n"
+    "mov x28, #0x10\n"  // cntb _, ALL, #1
+    "mov x27, #0x20\n"  // cntb _, ALL, #2
+    "mov x26, #0x30\n"  // cntb _, ALL, #3
     "blt 7f\n"
     "1:"  // 4-vectors of channels
-    "mov w19, #0xff800000\n"
-    "lsr x24, %x[n_valid_cells], #0x2\n"
-    "dup v6.4s, w19\n"
-    "dup v5.4s, w19\n"
-    "dup v4.4s, w19\n"
-    "dup v3.4s, w19\n"
-    "mov x19, %x[inptrs]\n"
-    "cbz x24, 4f\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
-    "subs x24, x24, #0x1\n"
-    "add x19, x19, #0x20\n"
-    "ldr q2, [x23, x28]\n"
-    "ldr q1, [x22, x28]\n"
-    "ldr q0, [x21, x28]\n"
-    "ldr q31, [x20, x28]\n"
-    "ldr q30, [x23, x27]\n"
-    "ldr q22, [x22, x27]\n"
-    "ldr q29, [x21, x27]\n"
-    "ldr q28, [x20, x27]\n"
-    "ldr q27, [x23, x26]\n"
-    "ldr q21, [x22, x26]\n"
-    "ldr q26, [x21, x26]\n"
-    "ldr q17, [x20, x26]\n"
-    "ldr q25, [x23, x25]\n"
-    "ldr q20, [x22, x25]\n"
-    "ldr q24, [x21, x25]\n"
-    "ldr q16, [x20, x25]\n"
+    "mov w20, #0xff800000\n"
+    "lsr x25, %x[n_valid_cells], #0x2\n"
+    "dup v8.4s, w20\n"
+    "dup v7.4s, w20\n"
+    "dup v6.4s, w20\n"
+    "dup v5.4s, w20\n"
+    "mov x20, %x[inptrs]\n"
+    "cbz x25, 4f\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "ldr q4, [x24, x9]\n"
+    "subs x25, x25, #0x1\n"
+    "ldr q3, [x23, x9]\n"
+    "ldr q2, [x24, x28]\n"
+    "ldr q1, [x23, x28]\n"
+    "ldr q0, [x24, x27]\n"
+    "ldr q31, [x23, x27]\n"
+    "ldr q30, [x24, x26]\n"
+    "ldr q29, [x23, x26]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "add x20, x20, #0x20\n"
+    "ldr q28, [x22, x9]\n"
+    "ldr q22, [x21, x9]\n"
+    "ldr q27, [x22, x28]\n"
+    "ldr q21, [x21, x28]\n"
+    "ldr q26, [x22, x27]\n"
+    "ldr q20, [x21, x27]\n"
+    "ldr q25, [x22, x26]\n"
+    "ldr q24, [x21, x26]\n"
     "beq 3f\n"
     "2:"  // 4-vectors of channels: 4 inputs loop
-    "fmax v23.4s, v2.4s, v1.4s\n"
-    "fmax v19.4s, v0.4s, v31.4s\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
-    "fmax v22.4s, v30.4s, v22.4s\n"
-    "fmax v18.4s, v29.4s, v28.4s\n"
-    "subs x24, x24, #0x1\n"
-    "add x19, x19, #0x20\n"
-    "fmax v21.4s, v27.4s, v21.4s\n"
-    "fmax v17.4s, v26.4s, v17.4s\n"
-    "ldr q2, [x23, x28]\n"
-    "ldr q1, [x22, x28]\n"
-    "fmax v20.4s, v25.4s, v20.4s\n"
-    "fmax v16.4s, v24.4s, v16.4s\n"
-    "ldr q0, [x21, x28]\n"
-    "ldr q31, [x20, x28]\n"
+    "fmax v23.4s, v4.4s, v3.4s\n"
+    "fmax v19.4s, v28.4s, v22.4s\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "ldr q4, [x24, x9]\n"
+    "ldr q3, [x23, x9]\n"
+    "fmax v22.4s, v2.4s, v1.4s\n"
+    "ldr q2, [x24, x28]\n"
+    "fmax v18.4s, v27.4s, v21.4s\n"
+    "ldr q1, [x23, x28]\n"
+    "fmax v21.4s, v0.4s, v31.4s\n"
+    "ldr q0, [x24, x27]\n"
+    "fmax v17.4s, v26.4s, v20.4s\n"
+    "ldr q31, [x23, x27]\n"
+    "fmax v20.4s, v30.4s, v29.4s\n"
+    "ldr q30, [x24, x26]\n"
+    "fmax v16.4s, v25.4s, v24.4s\n"
+    "ldr q29, [x23, x26]\n"
     "fmax v19.4s, v23.4s, v19.4s\n"
     "fmax v18.4s, v22.4s, v18.4s\n"
-    "ldr q30, [x23, x27]\n"
-    "ldr q22, [x22, x27]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "ldr q28, [x22, x9]\n"
+    "ldr q22, [x21, x9]\n"
     "fmax v17.4s, v21.4s, v17.4s\n"
     "fmax v16.4s, v20.4s, v16.4s\n"
-    "ldr q29, [x21, x27]\n"
-    "ldr q28, [x20, x27]\n"
-    "fmax v6.4s, v6.4s, v19.4s\n"
-    "fmax v5.4s, v5.4s, v18.4s\n"
-    "ldr q27, [x23, x26]\n"
-    "ldr q21, [x22, x26]\n"
-    "fmax v4.4s, v4.4s, v17.4s\n"
-    "fmax v3.4s, v3.4s, v16.4s\n"
-    "ldr q26, [x21, x26]\n"
-    "ldr q17, [x20, x26]\n"
-    "ldr q25, [x23, x25]\n"
-    "ldr q20, [x22, x25]\n"
-    "ldr q24, [x21, x25]\n"
-    "ldr q16, [x20, x25]\n"
+    "ldr q27, [x22, x28]\n"
+    "ldr q21, [x21, x28]\n"
+    "subs x25, x25, #0x1\n"
+    "fmax v8.4s, v8.4s, v19.4s\n"
+    "ldr q26, [x22, x27]\n"
+    "ldr q20, [x21, x27]\n"
+    "fmax v7.4s, v7.4s, v18.4s\n"
+    "fmax v6.4s, v6.4s, v17.4s\n"
+    "ldr q25, [x22, x26]\n"
+    "ldr q24, [x21, x26]\n"
+    "fmax v5.4s, v5.4s, v16.4s\n"
+    "add x20, x20, #0x20\n"
     "bgt 2b\n"
     "3:"  // 4-vectors of channels: 4 inputs tail
-    "fmax v23.4s, v2.4s, v1.4s\n"
-    "fmax v19.4s, v0.4s, v31.4s\n"
-    "fmax v22.4s, v30.4s, v22.4s\n"
-    "fmax v18.4s, v29.4s, v28.4s\n"
-    "fmax v21.4s, v27.4s, v21.4s\n"
-    "fmax v17.4s, v26.4s, v17.4s\n"
-    "fmax v20.4s, v25.4s, v20.4s\n"
-    "fmax v16.4s, v24.4s, v16.4s\n"
+    "fmax v23.4s, v4.4s, v3.4s\n"
+    "fmax v19.4s, v28.4s, v22.4s\n"
+    "fmax v22.4s, v2.4s, v1.4s\n"
+    "fmax v18.4s, v27.4s, v21.4s\n"
+    "fmax v21.4s, v0.4s, v31.4s\n"
+    "fmax v17.4s, v26.4s, v20.4s\n"
+    "fmax v20.4s, v30.4s, v29.4s\n"
+    "fmax v16.4s, v25.4s, v24.4s\n"
     "fmax v19.4s, v23.4s, v19.4s\n"
     "fmax v18.4s, v22.4s, v18.4s\n"
     "fmax v17.4s, v21.4s, v17.4s\n"
     "fmax v16.4s, v20.4s, v16.4s\n"
-    "fmax v6.4s, v6.4s, v19.4s\n"
-    "fmax v5.4s, v5.4s, v18.4s\n"
-    "fmax v4.4s, v4.4s, v17.4s\n"
-    "fmax v3.4s, v3.4s, v16.4s\n"
+    "fmax v8.4s, v8.4s, v19.4s\n"
+    "fmax v7.4s, v7.4s, v18.4s\n"
+    "fmax v6.4s, v6.4s, v17.4s\n"
+    "fmax v5.4s, v5.4s, v16.4s\n"
     "4:"  // 4-vectors of channels: After loop
-    "ands x20, %x[n_valid_cells], #0x3\n"
+    "ands x21, %x[n_valid_cells], #0x3\n"
     "beq 6f\n"
     "5:"  // 4-vectors of channels: Single input loop
-    "ldr x23, [x19], #0x8\n"
-    "ldr q2, [x23, x28]\n"
-    "subs x20, x20, #0x1\n"
-    "fmax v6.4s, v6.4s, v2.4s\n"
-    "ldr q30, [x23, x27]\n"
-    "ldr q27, [x23, x26]\n"
+    "ldr x24, [x20], #0x8\n"
+    "ldr q4, [x24, x9]\n"
+    "subs x21, x21, #0x1\n"
+    "fmax v8.4s, v8.4s, v4.4s\n"
+    "ldr q2, [x24, x28]\n"
+    "ldr q0, [x24, x27]\n"
+    "fmax v7.4s, v7.4s, v2.4s\n"
+    "fmax v6.4s, v6.4s, v0.4s\n"
+    "ldr q30, [x24, x26]\n"
     "fmax v5.4s, v5.4s, v30.4s\n"
-    "fmax v4.4s, v4.4s, v27.4s\n"
-    "ldr q25, [x23, x25]\n"
-    "fmax v3.4s, v3.4s, v25.4s\n"
     "bgt 5b\n"
     "6:"  // 4-vectors of channels: Single input loop: End
     "sub %x[n_channels], %x[n_channels], #0x10\n"
     "cmp %x[n_channels], #0x10\n"
-    "str q6, [%x[outptr], x28]\n"
-    "str q5, [%x[outptr], x27]\n"
+    "str q8, [%x[outptr], x9]\n"
+    "str q7, [%x[outptr], x28]\n"
+    "add x9, x9, #0x40\n"
     "add x28, x28, #0x40\n"
+    "str q6, [%x[outptr], x27]\n"
     "add x27, x27, #0x40\n"
-    "str q4, [%x[outptr], x26]\n"
+    "str q5, [%x[outptr], x26]\n"
     "add x26, x26, #0x40\n"
-    "str q3, [%x[outptr], x25]\n"
-    "add x25, x25, #0x40\n"
     "bge 1b\n"
     "cbz %x[n_channels], 25f\n"
     "7:"  // Single vector of channels
     "cmp %x[n_channels], #0x4\n"
     "blt 14f\n"
     "8:"  // Single vector of channels: Loop
-    "mov w19, #0xff800000\n"
-    "lsr x24, %x[n_valid_cells], #0x2\n"
-    "dup v6.4s, w19\n"
-    "mov x19, %x[inptrs]\n"
-    "cbz x24, 11f\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
-    "subs x24, x24, #0x1\n"
-    "add x19, x19, #0x20\n"
-    "ldr q2, [x23, x28]\n"
-    "ldr q1, [x22, x28]\n"
-    "ldr q0, [x21, x28]\n"
-    "ldr q31, [x20, x28]\n"
+    "mov w20, #0xff800000\n"
+    "lsr x25, %x[n_valid_cells], #0x2\n"
+    "dup v8.4s, w20\n"
+    "mov x20, %x[inptrs]\n"
+    "cbz x25, 11f\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "ldr q4, [x24, x9]\n"
+    "subs x25, x25, #0x1\n"
+    "ldr q3, [x23, x9]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "add x20, x20, #0x20\n"
+    "ldr q28, [x22, x9]\n"
+    "ldr q22, [x21, x9]\n"
     "beq 10f\n"
     "9:"  // Single vector of channels: Loop: 4 inputs loop
-    "fmax v23.4s, v2.4s, v1.4s\n"
-    "fmax v19.4s, v0.4s, v31.4s\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
+    "fmax v23.4s, v4.4s, v3.4s\n"
+    "fmax v19.4s, v28.4s, v22.4s\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "ldr q4, [x24, x9]\n"
+    "ldr q3, [x23, x9]\n"
     "fmax v19.4s, v23.4s, v19.4s\n"
-    "subs x24, x24, #0x1\n"
-    "fmax v6.4s, v6.4s, v19.4s\n"
-    "add x19, x19, #0x20\n"
-    "ldr q2, [x23, x28]\n"
-    "ldr q1, [x22, x28]\n"
-    "ldr q0, [x21, x28]\n"
-    "ldr q31, [x20, x28]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "subs x25, x25, #0x1\n"
+    "ldr q28, [x22, x9]\n"
+    "ldr q22, [x21, x9]\n"
+    "fmax v8.4s, v8.4s, v19.4s\n"
+    "add x20, x20, #0x20\n"
     "bgt 9b\n"
     "10:"  // Single vector of channels: Loop: 4 inputs tail
-    "fmax v23.4s, v2.4s, v1.4s\n"
-    "fmax v19.4s, v0.4s, v31.4s\n"
+    "fmax v23.4s, v4.4s, v3.4s\n"
+    "fmax v19.4s, v28.4s, v22.4s\n"
     "fmax v19.4s, v23.4s, v19.4s\n"
-    "fmax v6.4s, v6.4s, v19.4s\n"
+    "fmax v8.4s, v8.4s, v19.4s\n"
     "11:"  // Single vector of channels: Loop: After loop
-    "ands x20, %x[n_valid_cells], #0x3\n"
+    "ands x21, %x[n_valid_cells], #0x3\n"
     "beq 13f\n"
     "12:"  // Single vector of channels: Loop: Single input loop
-    "ldr x23, [x19], #0x8\n"
-    "ldr q2, [x23, x28]\n"
-    "subs x20, x20, #0x1\n"
-    "fmax v6.4s, v6.4s, v2.4s\n"
+    "ldr x24, [x20], #0x8\n"
+    "ldr q4, [x24, x9]\n"
+    "subs x21, x21, #0x1\n"
+    "fmax v8.4s, v8.4s, v4.4s\n"
     "bgt 12b\n"
     "13:"  // Single vector of channels: Loop: Single input loop: End
     "sub %x[n_channels], %x[n_channels], #0x4\n"
     "cmp %x[n_channels], #0x4\n"
-    "str q6, [%x[outptr], x28]\n"
-    "add x28, x28, #0x10\n"
+    "str q8, [%x[outptr], x9]\n"
+    "add x9, x9, #0x10\n"
     "bge 8b\n"
     "cbz %x[n_channels], 25f\n"
     "14:"  // Oddments
-    "mov w19, #0xff800000\n"
-    "lsr x24, %x[n_valid_cells], #0x2\n"
-    "dup v6.4s, w19\n"
-    "add %x[outptr], %x[outptr], x28\n"
-    "mov x19, %x[inptrs]\n"
-    "cbz x24, 18f\n"
+    "mov w20, #0xff800000\n"
+    "lsr x25, %x[n_valid_cells], #0x2\n"
+    "dup v8.4s, w20\n"
+    "add %x[outptr], %x[outptr], x9\n"
+    "mov x20, %x[inptrs]\n"
+    "cbz x25, 18f\n"
     "15:"  // Oddments: 4 inputs loop
-    "ldp x23, x22, [x19, #0x0]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
-    "add x19, x19, #0x20\n"
-    "add x23, x23, x28\n"
-    "add x22, x22, x28\n"
-    "add x21, x21, x28\n"
-    "movi v2.16b, #0x0\n"
-    "movi v1.16b, #0x0\n"
-    "add x20, x20, x28\n"
-    "movi v0.16b, #0x0\n"
-    "movi v31.16b, #0x0\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "add x20, x20, #0x20\n"
+    "add x24, x24, x9\n"
+    "add x23, x23, x9\n"
+    "add x22, x22, x9\n"
+    "movi v4.16b, #0x0\n"
+    "movi v3.16b, #0x0\n"
+    "add x21, x21, x9\n"
+    "movi v28.16b, #0x0\n"
+    "movi v22.16b, #0x0\n"
     "tbz %x[n_channels], #1, 16f\n"
-    "ldr d2, [x23], #0x8\n"
-    "ldr d1, [x22], #0x8\n"
-    "ldr d0, [x21], #0x8\n"
-    "ldr d31, [x20], #0x8\n"
+    "ldr d4, [x24], #0x8\n"
+    "ldr d3, [x23], #0x8\n"
+    "ldr d28, [x22], #0x8\n"
+    "ldr d22, [x21], #0x8\n"
     "tbz %x[n_channels], #0, 17f\n"
-    "ld1 { v2.s }[2], [x23], #0x4\n"
-    "ld1 { v1.s }[2], [x22], #0x4\n"
-    "ld1 { v0.s }[2], [x21], #0x4\n"
-    "ld1 { v31.s }[2], [x20], #0x4\n"
+    "ld1 { v4.s }[2], [x24], #0x4\n"
+    "ld1 { v3.s }[2], [x23], #0x4\n"
+    "ld1 { v28.s }[2], [x22], #0x4\n"
+    "ld1 { v22.s }[2], [x21], #0x4\n"
     "b 17f\n"
     "16:"  // Oddments: 4 inputs loop: Load: Bit 1: Unset
     "tbz %x[n_channels], #0, 17f\n"
-    "ldr s2, [x23], #0x4\n"
-    "ldr s1, [x22], #0x4\n"
-    "ldr s0, [x21], #0x4\n"
-    "ldr s31, [x20], #0x4\n"
+    "ldr s4, [x24], #0x4\n"
+    "ldr s3, [x23], #0x4\n"
+    "ldr s28, [x22], #0x4\n"
+    "ldr s22, [x21], #0x4\n"
     "17:"  // Oddments: 4 inputs loop: Load: Bit 1: End
-    "fmax v23.4s, v2.4s, v1.4s\n"
-    "fmax v19.4s, v0.4s, v31.4s\n"
-    "subs x24, x24, #0x1\n"
+    "fmax v23.4s, v4.4s, v3.4s\n"
+    "fmax v19.4s, v28.4s, v22.4s\n"
+    "subs x25, x25, #0x1\n"
     "fmax v19.4s, v23.4s, v19.4s\n"
-    "fmax v6.4s, v6.4s, v19.4s\n"
+    "fmax v8.4s, v8.4s, v19.4s\n"
     "bgt 15b\n"
     "18:"  // Oddments: After loop
-    "ands x20, %x[n_valid_cells], #0x3\n"
+    "ands x21, %x[n_valid_cells], #0x3\n"
     "beq 22f\n"
     "19:"  // Oddments: Single input loop
-    "ldr x23, [x19], #0x8\n"
-    "add x23, x23, x28\n"
-    "movi v2.16b, #0x0\n"
+    "ldr x24, [x20], #0x8\n"
+    "add x24, x24, x9\n"
+    "movi v4.16b, #0x0\n"
     "tbz %x[n_channels], #1, 20f\n"
-    "ldr d2, [x23], #0x8\n"
+    "ldr d4, [x24], #0x8\n"
     "tbz %x[n_channels], #0, 21f\n"
-    "ld1 { v2.s }[2], [x23], #0x4\n"
+    "ld1 { v4.s }[2], [x24], #0x4\n"
     "b 21f\n"
     "20:"  // Oddments: Single input loop: Load: Bit 1: Unset
     "tbz %x[n_channels], #0, 21f\n"
-    "ldr s2, [x23], #0x4\n"
+    "ldr s4, [x24], #0x4\n"
     "21:"  // Oddments: Single input loop: Load: Bit 1: End
-    "subs x20, x20, #0x1\n"
-    "fmax v6.4s, v6.4s, v2.4s\n"
+    "subs x21, x21, #0x1\n"
+    "fmax v8.4s, v8.4s, v4.4s\n"
     "bgt 19b\n"
     "22:"  // Oddments: Single input loop: End
     "tbz %x[n_channels], #1, 23f\n"
-    "st1 { v6.d }[0], [%x[outptr]], #0x8\n"
+    "st1 { v8.d }[0], [%x[outptr]], #0x8\n"
     "tbz %x[n_channels], #0, 24f\n"
-    "st1 { v6.s }[2], [%x[outptr]], #0x4\n"
+    "st1 { v8.s }[2], [%x[outptr]], #0x4\n"
     "b 24f\n"
     "23:"  // Oddments: Store: Bit 1: Unset
     "tbz %x[n_channels], #0, 24f\n"
-    "st1 { v6.s }[0], [%x[outptr]], #0x4\n"
+    "st1 { v8.s }[0], [%x[outptr]], #0x4\n"
     "24:"  // Oddments: Store: Bit 1: End
     "25:"  // End
     : [n_channels] "+&r" (n_channels), [outptr] "+&r" (outptr)
     : [inptrs] "r" (inptrs), [n_valid_cells] "r" (n_valid_cells)
-    : "cc", "memory", "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28"
+    : "cc", "memory", "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x9", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28"
   );
 }
 
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_s8_nhwc_avg_generic_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_s8_nhwc_avg_generic_depthfirst/generic.cpp
index 8d6d73ac84..5a7e5f981b 100644
--- a/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_s8_nhwc_avg_generic_depthfirst/generic.cpp
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_s8_nhwc_avg_generic_depthfirst/generic.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2021-2022 Arm Limited.
+ * Copyright (c) 2021-2023 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -96,16 +96,16 @@ void a64_s8_nhwc_avg_generic_depthfirst_impl(
 
   __asm__ __volatile__(
     "cmp %x[n_channels], #0x40\n"
-    "mov x26, #0x0\n"
-    "mov x25, #0x10\n"  // cntb _, ALL, #1
-    "mov x24, #0x20\n"  // cntb _, ALL, #2
-    "mov x23, #0x30\n"  // cntb _, ALL, #3
+    "mov x27, #0x0\n"
+    "mov x26, #0x10\n"  // cntb _, ALL, #1
+    "mov x25, #0x20\n"  // cntb _, ALL, #2
+    "mov x24, #0x30\n"  // cntb _, ALL, #3
     "blt 7f\n"
     "1:"  // 4-vectors of channels
-    "lsr x22, %x[n_valid_cells], #0x1\n"
+    "lsr x23, %x[n_valid_cells], #0x1\n"
     "movi v15.4s, #0x0\n"
     "movi v14.4s, #0x0\n"
-    "mov x19, %x[inptrs]\n"
+    "mov x20, %x[inptrs]\n"
     "movi v13.4s, #0x0\n"
     "movi v12.4s, #0x0\n"
     "movi v11.4s, #0x0\n"
@@ -120,43 +120,43 @@ void a64_s8_nhwc_avg_generic_depthfirst_impl(
     "movi v2.4s, #0x0\n"
     "movi v1.4s, #0x0\n"
     "movi v0.4s, #0x0\n"
-    "cbz x22, 4f\n"
-    "ldp x21, x20, [x19, #0x0]\n"
-    "subs x22, x22, #0x1\n"
-    "add x19, x19, #0x10\n"
-    "ldr q31, [x21, x26]\n"
-    "ldr q30, [x20, x26]\n"
-    "ldr q29, [x21, x25]\n"
-    "ldr q28, [x20, x25]\n"
-    "ldr q27, [x21, x24]\n"
-    "ldr q26, [x20, x24]\n"
-    "ldr q25, [x21, x23]\n"
-    "ldr q24, [x20, x23]\n"
+    "cbz x23, 4f\n"
+    "ldp x22, x21, [x20, #0x0]\n"
+    "ldr q31, [x22, x27]\n"
+    "subs x23, x23, #0x1\n"
+    "add x20, x20, #0x10\n"
+    "ldr q30, [x21, x27]\n"
+    "ldr q29, [x22, x26]\n"
+    "ldr q28, [x21, x26]\n"
+    "ldr q27, [x22, x25]\n"
+    "ldr q26, [x21, x25]\n"
+    "ldr q25, [x22, x24]\n"
+    "ldr q24, [x21, x24]\n"
     "beq 3f\n"
     "2:"  // 4-vectors of channels: 2 inputs loop
     "saddl v23.8h, v31.8b, v30.8b\n"
     "saddl2 v22.8h, v31.16b, v30.16b\n"
-    "ldp x21, x20, [x19, #0x0]\n"
-    "subs x22, x22, #0x1\n"
+    "ldp x22, x21, [x20, #0x0]\n"
+    "ldr q31, [x22, x27]\n"
+    "ldr q30, [x21, x27]\n"
     "saddl v21.8h, v29.8b, v28.8b\n"
     "saddl2 v20.8h, v29.16b, v28.16b\n"
-    "add x19, x19, #0x10\n"
-    "ldr q31, [x21, x26]\n"
+    "ldr q29, [x22, x26]\n"
+    "ldr q28, [x21, x26]\n"
     "saddl v19.8h, v27.8b, v26.8b\n"
     "saddl2 v18.8h, v27.16b, v26.16b\n"
-    "ldr q30, [x20, x26]\n"
-    "ldr q29, [x21, x25]\n"
-    "saddl v17.8h, v25.8b, v24.8b\n"
-    "saddl2 v16.8h, v25.16b, v24.16b\n"
-    "ldr q28, [x20, x25]\n"
-    "ldr q27, [x21, x24]\n"
+    "ldr q27, [x22, x25]\n"
+    "ldr q26, [x21, x25]\n"
+    "subs x23, x23, #0x1\n"
     "saddw v15.4s, v15.4s, v23.4h\n"
     "saddw2 v14.4s, v14.4s, v23.8h\n"
-    "ldr q26, [x20, x24]\n"
-    "ldr q25, [x21, x23]\n"
+    "saddl v17.8h, v25.8b, v24.8b\n"
+    "saddl2 v16.8h, v25.16b, v24.16b\n"
+    "ldr q25, [x22, x24]\n"
+    "add x20, x20, #0x10\n"
     "saddw v13.4s, v13.4s, v22.4h\n"
     "saddw2 v12.4s, v12.4s, v22.8h\n"
-    "ldr q24, [x20, x23]\n"
+    "ldr q24, [x21, x24]\n"
     "saddw v11.4s, v11.4s, v21.4h\n"
     "saddw2 v10.4s, v10.4s, v21.8h\n"
     "saddw v9.4s, v9.4s, v20.4h\n"
@@ -196,21 +196,21 @@ void a64_s8_nhwc_avg_generic_depthfirst_impl(
     "saddw v1.4s, v1.4s, v16.4h\n"
     "saddw2 v0.4s, v0.4s, v16.8h\n"
     "4:"  // 4-vectors of channels: After loop
-    "ands x20, %x[n_valid_cells], #0x1\n"
+    "ands x21, %x[n_valid_cells], #0x1\n"
     "beq 6f\n"
     "5:"  // 4-vectors of channels: Single input loop
-    "ldr x21, [x19], #0x8\n"
-    "ldr q31, [x21, x26]\n"
+    "ldr x22, [x20], #0x8\n"
+    "ldr q31, [x22, x27]\n"
     "sxtl v23.8h, v31.8b\n"
     "sxtl2 v22.8h, v31.16b\n"
-    "ldr q29, [x21, x25]\n"
-    "ldr q27, [x21, x24]\n"
+    "ldr q29, [x22, x26]\n"
+    "ldr q27, [x22, x25]\n"
     "sxtl v21.8h, v29.8b\n"
     "sxtl2 v20.8h, v29.16b\n"
-    "ldr q25, [x21, x23]\n"
+    "ldr q25, [x22, x24]\n"
     "sxtl v19.8h, v27.8b\n"
     "sxtl2 v18.8h, v27.16b\n"
-    "subs x20, x20, #0x1\n"
+    "subs x21, x21, #0x1\n"
     "sxtl v17.8h, v25.8b\n"
     "sxtl2 v16.8h, v25.16b\n"
     "saddw v15.4s, v15.4s, v23.4h\n"
@@ -311,47 +311,47 @@ void a64_s8_nhwc_avg_generic_depthfirst_impl(
     "uzp1 v19.16b, v1.16b, v0.16b\n"
     "uzp1 v16.16b, v23.16b, v16.16b\n"
     "uzp1 v18.16b, v22.16b, v18.16b\n"
-    "str q16, [%x[outptr], x26]\n"
-    "add x26, x26, #0x40\n"
+    "str q16, [%x[outptr], x27]\n"
+    "add x27, x27, #0x40\n"
     "uzp1 v17.16b, v21.16b, v17.16b\n"
     "uzp1 v16.16b, v20.16b, v19.16b\n"
-    "str q18, [%x[outptr], x25]\n"
+    "str q18, [%x[outptr], x26]\n"
+    "add x26, x26, #0x40\n"
+    "str q17, [%x[outptr], x25]\n"
     "add x25, x25, #0x40\n"
-    "str q17, [%x[outptr], x24]\n"
+    "str q16, [%x[outptr], x24]\n"
     "add x24, x24, #0x40\n"
-    "str q16, [%x[outptr], x23]\n"
-    "add x23, x23, #0x40\n"
     "bge 1b\n"
     "cbz %x[n_channels], 43f\n"
     "7:"  // Single vector of channels
     "cmp %x[n_channels], #0x10\n"
     "blt 14f\n"
     "8:"  // Single vector of channels: Loop
-    "lsr x22, %x[n_valid_cells], #0x1\n"
+    "lsr x23, %x[n_valid_cells], #0x1\n"
     "movi v15.4s, #0x0\n"
     "movi v14.4s, #0x0\n"
-    "mov x19, %x[inptrs]\n"
+    "mov x20, %x[inptrs]\n"
     "movi v13.4s, #0x0\n"
     "movi v12.4s, #0x0\n"
-    "cbz x22, 11f\n"
-    "ldp x21, x20, [x19, #0x0]\n"
-    "subs x22, x22, #0x1\n"
-    "add x19, x19, #0x10\n"
-    "ldr q31, [x21, x26]\n"
-    "ldr q30, [x20, x26]\n"
+    "cbz x23, 11f\n"
+    "ldp x22, x21, [x20, #0x0]\n"
+    "ldr q31, [x22, x27]\n"
+    "subs x23, x23, #0x1\n"
+    "add x20, x20, #0x10\n"
+    "ldr q30, [x21, x27]\n"
     "beq 10f\n"
     "9:"  // Single vector of channels: Loop: 2 inputs loop
     "saddl v23.8h, v31.8b, v30.8b\n"
     "saddl2 v22.8h, v31.16b, v30.16b\n"
-    "ldp x21, x20, [x19, #0x0]\n"
-    "subs x22, x22, #0x1\n"
+    "ldp x22, x21, [x20, #0x0]\n"
+    "ldr q31, [x22, x27]\n"
+    "ldr q30, [x21, x27]\n"
+    "subs x23, x23, #0x1\n"
     "saddw v15.4s, v15.4s, v23.4h\n"
     "saddw2 v14.4s, v14.4s, v23.8h\n"
-    "add x19, x19, #0x10\n"
-    "ldr q31, [x21, x26]\n"
     "saddw v13.4s, v13.4s, v22.4h\n"
     "saddw2 v12.4s, v12.4s, v22.8h\n"
-    "ldr q30, [x20, x26]\n"
+    "add x20, x20, #0x10\n"
     "bgt 9b\n"
     "10:"  // Single vector of channels: Loop: 2 inputs tail
     "saddl v23.8h, v31.8b, v30.8b\n"
@@ -361,14 +361,14 @@ void a64_s8_nhwc_avg_generic_depthfirst_impl(
     "saddw v13.4s, v13.4s, v22.4h\n"
     "saddw2 v12.4s, v12.4s, v22.8h\n"
     "11:"  // Single vector of channels: Loop: After loop
-    "ands x20, %x[n_valid_cells], #0x1\n"
+    "ands x21, %x[n_valid_cells], #0x1\n"
     "beq 13f\n"
     "12:"  // Single vector of channels: Loop: Single input loop
-    "ldr x21, [x19], #0x8\n"
-    "ldr q31, [x21, x26]\n"
+    "ldr x22, [x20], #0x8\n"
+    "ldr q31, [x22, x27]\n"
     "sxtl v23.8h, v31.8b\n"
     "sxtl2 v22.8h, v31.16b\n"
-    "subs x20, x20, #0x1\n"
+    "subs x21, x21, #0x1\n"
     "saddw v15.4s, v15.4s, v23.4h\n"
     "saddw2 v14.4s, v14.4s, v23.8h\n"
     "saddw v13.4s, v13.4s, v22.4h\n"
@@ -400,149 +400,149 @@ void a64_s8_nhwc_avg_generic_depthfirst_impl(
     "uzp1 v23.16b, v15.16b, v14.16b\n"
     "uzp1 v16.16b, v13.16b, v12.16b\n"
     "uzp1 v16.16b, v23.16b, v16.16b\n"
-    "str q16, [%x[outptr], x26]\n"
-    "add x26, x26, #0x10\n"
+    "str q16, [%x[outptr], x27]\n"
+    "add x27, x27, #0x10\n"
     "bge 8b\n"
     "cbz %x[n_channels], 43f\n"
     "14:"  // Oddments
-    "lsr x22, %x[n_valid_cells], #0x1\n"
-    "add %x[outptr], %x[outptr], x26\n"
+    "lsr x23, %x[n_valid_cells], #0x1\n"
+    "add %x[outptr], %x[outptr], x27\n"
     "movi v15.4s, #0x0\n"
     "movi v14.4s, #0x0\n"
     "movi v13.4s, #0x0\n"
     "movi v12.4s, #0x0\n"
-    "mov x19, %x[inptrs]\n"
-    "cbz x22, 24f\n"
+    "mov x20, %x[inptrs]\n"
+    "cbz x23, 24f\n"
     "15:"  // Oddments: 2 inputs loop
-    "ldp x21, x20, [x19, #0x0]\n"
-    "add x19, x19, #0x10\n"
-    "add x21, x21, x26\n"
+    "ldp x22, x21, [x20, #0x0]\n"
+    "add x20, x20, #0x10\n"
+    "add x22, x22, x27\n"
     "movi v31.16b, #0x0\n"
-    "add x20, x20, x26\n"
+    "add x21, x21, x27\n"
     "movi v30.16b, #0x0\n"
     "tbz %x[n_channels], #3, 19f\n"
-    "ldr d31, [x21], #0x8\n"
-    "ldr d30, [x20], #0x8\n"
+    "ldr d31, [x22], #0x8\n"
+    "ldr d30, [x21], #0x8\n"
     "tbz %x[n_channels], #2, 17f\n"
-    "ld1 { v31.s }[2], [x21], #0x4\n"
-    "ld1 { v30.s }[2], [x20], #0x4\n"
+    "ld1 { v31.s }[2], [x22], #0x4\n"
+    "ld1 { v30.s }[2], [x21], #0x4\n"
     "tbz %x[n_channels], #1, 16f\n"
-    "ld1 { v31.h }[6], [x21], #0x2\n"
-    "ld1 { v30.h }[6], [x20], #0x2\n"
+    "ld1 { v31.h }[6], [x22], #0x2\n"
+    "ld1 { v30.h }[6], [x21], #0x2\n"
     "tbz %x[n_channels], #0, 23f\n"
-    "ld1 { v31.b }[14], [x21], #0x1\n"
-    "ld1 { v30.b }[14], [x20], #0x1\n"
+    "ld1 { v31.b }[14], [x22], #0x1\n"
+    "ld1 { v30.b }[14], [x21], #0x1\n"
     "b 23f\n"
     "16:"  // Oddments: 2 inputs loop: Load: Bit 3: Bit 2: Bit 1: Unset
     "tbz %x[n_channels], #0, 23f\n"
-    "ld1 { v31.b }[12], [x21], #0x1\n"
-    "ld1 { v30.b }[12], [x20], #0x1\n"
+    "ld1 { v31.b }[12], [x22], #0x1\n"
+    "ld1 { v30.b }[12], [x21], #0x1\n"
     "b 23f\n"
     "17:"  // Oddments: 2 inputs loop: Load: Bit 3: Bit 2: Unset
     "tbz %x[n_channels], #1, 18f\n"
-    "ld1 { v31.h }[4], [x21], #0x2\n"
-    "ld1 { v30.h }[4], [x20], #0x2\n"
+    "ld1 { v31.h }[4], [x22], #0x2\n"
+    "ld1 { v30.h }[4], [x21], #0x2\n"
     "tbz %x[n_channels], #0, 23f\n"
-    "ld1 { v31.b }[10], [x21], #0x1\n"
-    "ld1 { v30.b }[10], [x20], #0x1\n"
+    "ld1 { v31.b }[10], [x22], #0x1\n"
+    "ld1 { v30.b }[10], [x21], #0x1\n"
     "b 23f\n"
     "18:"  // Oddments: 2 inputs loop: Load: Bit 3: Bit 2: Unset: Bit 1: Unset
     "tbz %x[n_channels], #0, 23f\n"
-    "ld1 { v31.b }[8], [x21], #0x1\n"
-    "ld1 { v30.b }[8], [x20], #0x1\n"
+    "ld1 { v31.b }[8], [x22], #0x1\n"
+    "ld1 { v30.b }[8], [x21], #0x1\n"
     "b 23f\n"
     "19:"  // Oddments: 2 inputs loop: Load: Bit 3: Unset
     "tbz %x[n_channels], #2, 21f\n"
-    "ldr s31, [x21], #0x4\n"
-    "ldr s30, [x20], #0x4\n"
+    "ldr s31, [x22], #0x4\n"
+    "ldr s30, [x21], #0x4\n"
     "tbz %x[n_channels], #1, 20f\n"
-    "ld1 { v31.h }[2], [x21], #0x2\n"
-    "ld1 { v30.h }[2], [x20], #0x2\n"
+    "ld1 { v31.h }[2], [x22], #0x2\n"
+    "ld1 { v30.h }[2], [x21], #0x2\n"
     "tbz %x[n_channels], #0, 23f\n"
-    "ld1 { v31.b }[6], [x21], #0x1\n"
-    "ld1 { v30.b }[6], [x20], #0x1\n"
+    "ld1 { v31.b }[6], [x22], #0x1\n"
+    "ld1 { v30.b }[6], [x21], #0x1\n"
     "b 23f\n"
     "20:"  // Oddments: 2 inputs loop: Load: Bit 3: Unset: Bit 2: Bit 1: Unset
     "tbz %x[n_channels], #0, 23f\n"
-    "ld1 { v31.b }[4], [x21], #0x1\n"
-    "ld1 { v30.b }[4], [x20], #0x1\n"
+    "ld1 { v31.b }[4], [x22], #0x1\n"
+    "ld1 { v30.b }[4], [x21], #0x1\n"
     "b 23f\n"
     "21:"  // Oddments: 2 inputs loop: Load: Bit 3: Unset: Bit 2: Unset
     "tbz %x[n_channels], #1, 22f\n"
-    "ldr h31, [x21], #0x2\n"
-    "ldr h30, [x20], #0x2\n"
+    "ldr h31, [x22], #0x2\n"
+    "ldr h30, [x21], #0x2\n"
     "tbz %x[n_channels], #0, 23f\n"
-    "ld1 { v31.b }[2], [x21], #0x1\n"
-    "ld1 { v30.b }[2], [x20], #0x1\n"
+    "ld1 { v31.b }[2], [x22], #0x1\n"
+    "ld1 { v30.b }[2], [x21], #0x1\n"
     "b 23f\n"
     "22:"  // Oddments: 2 inputs loop: Load: Bit 3: Unset: Bit 2: Unset: Bit 1: Unset
     "tbz %x[n_channels], #0, 23f\n"
-    "ldr b31, [x21], #0x1\n"
-    "ldr b30, [x20], #0x1\n"
+    "ldr b31, [x22], #0x1\n"
+    "ldr b30, [x21], #0x1\n"
     "23:"  // Oddments: 2 inputs loop: Load: Bit 3: End
     "saddl v23.8h, v31.8b, v30.8b\n"
     "saddl2 v22.8h, v31.16b, v30.16b\n"
-    "subs x22, x22, #0x1\n"
+    "subs x23, x23, #0x1\n"
     "saddw v15.4s, v15.4s, v23.4h\n"
     "saddw2 v14.4s, v14.4s, v23.8h\n"
     "saddw v13.4s, v13.4s, v22.4h\n"
     "saddw2 v12.4s, v12.4s, v22.8h\n"
     "bgt 15b\n"
     "24:"  // Oddments: After loop
-    "ands x20, %x[n_valid_cells], #0x1\n"
+    "ands x21, %x[n_valid_cells], #0x1\n"
     "beq 34f\n"
     "25:"  // Oddments: Single input loop
-    "ldr x21, [x19], #0x8\n"
-    "add x21, x21, x26\n"
+    "ldr x22, [x20], #0x8\n"
+    "add x22, x22, x27\n"
     "movi v31.16b, #0x0\n"
     "tbz %x[n_channels], #3, 29f\n"
-    "ldr d31, [x21], #0x8\n"
+    "ldr d31, [x22], #0x8\n"
     "tbz %x[n_channels], #2, 27f\n"
-    "ld1 { v31.s }[2], [x21], #0x4\n"
+    "ld1 { v31.s }[2], [x22], #0x4\n"
     "tbz %x[n_channels], #1, 26f\n"
-    "ld1 { v31.h }[6], [x21], #0x2\n"
+    "ld1 { v31.h }[6], [x22], #0x2\n"
     "tbz %x[n_channels], #0, 33f\n"
-    "ld1 { v31.b }[14], [x21], #0x1\n"
+    "ld1 { v31.b }[14], [x22], #0x1\n"
     "b 33f\n"
     "26:"  // Oddments: Single input loop: Load: Bit 3: Bit 2: Bit 1: Unset
     "tbz %x[n_channels], #0, 33f\n"
-    "ld1 { v31.b }[12], [x21], #0x1\n"
+    "ld1 { v31.b }[12], [x22], #0x1\n"
     "b 33f\n"
     "27:"  // Oddments: Single input loop: Load: Bit 3: Bit 2: Unset
     "tbz %x[n_channels], #1, 28f\n"
-    "ld1 { v31.h }[4], [x21], #0x2\n"
+    "ld1 { v31.h }[4], [x22], #0x2\n"
     "tbz %x[n_channels], #0, 33f\n"
-    "ld1 { v31.b }[10], [x21], #0x1\n"
+    "ld1 { v31.b }[10], [x22], #0x1\n"
     "b 33f\n"
     "28:"  // Oddments: Single input loop: Load: Bit 3: Bit 2: Unset: Bit 1: Unset
     "tbz %x[n_channels], #0, 33f\n"
-    "ld1 { v31.b }[8], [x21], #0x1\n"
+    "ld1 { v31.b }[8], [x22], #0x1\n"
     "b 33f\n"
     "29:"  // Oddments: Single input loop: Load: Bit 3: Unset
     "tbz %x[n_channels], #2, 31f\n"
-    "ldr s31, [x21], #0x4\n"
+    "ldr s31, [x22], #0x4\n"
     "tbz %x[n_channels], #1, 30f\n"
-    "ld1 { v31.h }[2], [x21], #0x2\n"
+    "ld1 { v31.h }[2], [x22], #0x2\n"
     "tbz %x[n_channels], #0, 33f\n"
-    "ld1 { v31.b }[6], [x21], #0x1\n"
+    "ld1 { v31.b }[6], [x22], #0x1\n"
     "b 33f\n"
     "30:"  // Oddments: Single input loop: Load: Bit 3: Unset: Bit 2: Bit 1: Unset
     "tbz %x[n_channels], #0, 33f\n"
-    "ld1 { v31.b }[4], [x21], #0x1\n"
+    "ld1 { v31.b }[4], [x22], #0x1\n"
     "b 33f\n"
     "31:"  // Oddments: Single input loop: Load: Bit 3: Unset: Bit 2: Unset
     "tbz %x[n_channels], #1, 32f\n"
-    "ldr h31, [x21], #0x2\n"
+    "ldr h31, [x22], #0x2\n"
     "tbz %x[n_channels], #0, 33f\n"
-    "ld1 { v31.b }[2], [x21], #0x1\n"
+    "ld1 { v31.b }[2], [x22], #0x1\n"
     "b 33f\n"
     "32:"  // Oddments: Single input loop: Load: Bit 3: Unset: Bit 2: Unset: Bit 1: Unset
     "tbz %x[n_channels], #0, 33f\n"
-    "ldr b31, [x21], #0x1\n"
+    "ldr b31, [x22], #0x1\n"
     "33:"  // Oddments: Single input loop: Load: Bit 3: End
     "sxtl v23.8h, v31.8b\n"
     "sxtl2 v22.8h, v31.16b\n"
-    "subs x20, x20, #0x1\n"
+    "subs x21, x21, #0x1\n"
     "saddw v15.4s, v15.4s, v23.4h\n"
     "saddw2 v14.4s, v14.4s, v23.8h\n"
     "saddw v13.4s, v13.4s, v22.4h\n"
@@ -620,7 +620,7 @@ void a64_s8_nhwc_avg_generic_depthfirst_impl(
     "43:"  // End
     : [n_channels] "+&r" (n_channels), [outptr] "+&r" (outptr)
     : [inptrs] "r" (inptrs), [n_valid_cells] "r" (n_valid_cells), [rescale_ptr] "r" (&rescale_value), [shift_ptr] "r" (&shift_value)
-    : "cc", "memory", "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26"
+    : "cc", "memory", "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27"
   );
 }
 
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_s8_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_s8_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp
index 1767e5ce3d..bd14408c74 100644
--- a/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_s8_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_s8_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2021-2022 Arm Limited.
+ * Copyright (c) 2021-2023 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -62,111 +62,111 @@ void a64_s8_nhwc_max_2x2_s1_output2x2_depthfirst_impl(
                         pad_left, pad_top, pad_right, pad_bottom);
 
   __asm__ __volatile__(
-    "ldr x15, [%x[args], %[offsetof_n_channels]]\n"
-    "ldr x20, [%x[args], %[offsetof_outptrs]]\n"
-    "cmp x15, #0x10\n"
-    "mov x14, #0x0\n"
-    "ldr x19, [%x[args], %[offsetof_inptrs]]\n"
-    "ldp x13, x12, [x20, #0x0]\n"
-    "mov x11, #0x0\n"
-    "ldp x10, x9, [x20, #0x10]\n"
-    "ldp x28, x27, [x19, #0x0]\n"
-    "ldp x26, x25, [x19, #0x10]\n"
-    "ldp x24, x23, [x19, #0x20]\n"
-    "ldp x22, x21, [x19, #0x30]\n"
-    "ldr x20, [x19, #0x40]\n"
+    "ldr x16, [%x[args], %[offsetof_n_channels]]\n"
+    "ldr x21, [%x[args], %[offsetof_outptrs]]\n"
+    "cmp x16, #0x10\n"
+    "mov x15, #0x0\n"
+    "ldr x20, [%x[args], %[offsetof_inptrs]]\n"
+    "ldp x14, x13, [x21, #0x0]\n"
+    "mov x12, #0x0\n"
+    "ldp x11, x10, [x21, #0x10]\n"
+    "ldp x9, x28, [x20, #0x0]\n"
+    "ldp x27, x26, [x20, #0x10]\n"
+    "ldp x25, x24, [x20, #0x20]\n"
+    "ldp x23, x22, [x20, #0x30]\n"
+    "ldr x21, [x20, #0x40]\n"
     "blt 3f\n"
-    "lsr x19, x15, #0x4\n"
-    "sub x15, x15, x19, LSL #4\n"
-    "ldr q30, [x27, x14]\n"
-    "ldr q29, [x24, x14]\n"
-    "subs x19, x19, #0x1\n"
-    "ldr q28, [x21, x14]\n"
-    "ldr q27, [x25, x14]\n"
-    "ldr q26, [x28, x14]\n"
-    "ldr q25, [x23, x14]\n"
-    "ldr q24, [x26, x14]\n"
-    "ldr q23, [x22, x14]\n"
-    "ldr q22, [x20, x14]\n"
-    "add x14, x14, #0x10\n"
+    "ldr q30, [x28, x15]\n"
+    "ldr q29, [x25, x15]\n"
+    "lsr x20, x16, #0x4\n"
+    "sub x16, x16, x20, LSL #4\n"
+    "ldr q28, [x22, x15]\n"
+    "ldr q27, [x26, x15]\n"
+    "subs x20, x20, #0x1\n"
+    "ldr q26, [x9, x15]\n"
+    "ldr q25, [x27, x15]\n"
+    "ldr q24, [x24, x15]\n"
+    "ldr q23, [x23, x15]\n"
+    "ldr q22, [x21, x15]\n"
+    "add x15, x15, #0x10\n"
     "beq 2f\n"
     "1:"  // Vector: Loop
     "smax v21.16b, v30.16b, v29.16b\n"
+    "ldr q30, [x28, x15]\n"
     "smax v20.16b, v29.16b, v28.16b\n"
-    "subs x19, x19, #0x1\n"
-    "ldr q30, [x27, x14]\n"
+    "ldr q29, [x25, x15]\n"
+    "ldr q28, [x22, x15]\n"
     "smax v19.16b, v27.16b, v26.16b\n"
+    "ldr q26, [x9, x15]\n"
     "smax v18.16b, v25.16b, v24.16b\n"
-    "ldr q29, [x24, x14]\n"
-    "ldr q28, [x21, x14]\n"
-    "smax v17.16b, v23.16b, v27.16b\n"
-    "smax v16.16b, v25.16b, v22.16b\n"
-    "ldr q27, [x25, x14]\n"
-    "ldr q26, [x28, x14]\n"
+    "ldr q25, [x27, x15]\n"
+    "smax v17.16b, v27.16b, v23.16b\n"
+    "ldr q27, [x26, x15]\n"
+    "smax v16.16b, v24.16b, v22.16b\n"
+    "ldr q24, [x24, x15]\n"
+    "ldr q23, [x23, x15]\n"
+    "subs x20, x20, #0x1\n"
     "smax v19.16b, v21.16b, v19.16b\n"
+    "ldr q22, [x21, x15]\n"
     "smax v18.16b, v18.16b, v21.16b\n"
-    "ldr q25, [x23, x14]\n"
-    "ldr q24, [x26, x14]\n"
-    "smax v17.16b, v20.16b, v17.16b\n"
-    "smax v16.16b, v20.16b, v16.16b\n"
-    "ldr q23, [x22, x14]\n"
-    "ldr q22, [x20, x14]\n"
-    "add x14, x14, #0x10\n"
-    "str q19, [x13, x11]\n"
-    "str q18, [x12, x11]\n"
-    "str q17, [x10, x11]\n"
-    "str q16, [x9, x11]\n"
-    "add x11, x11, #0x10\n"
+    "smax v17.16b, v17.16b, v20.16b\n"
+    "add x15, x15, #0x10\n"
+    "smax v16.16b, v16.16b, v20.16b\n"
+    "str q19, [x14, x12]\n"
+    "str q18, [x13, x12]\n"
+    "str q17, [x11, x12]\n"
+    "str q16, [x10, x12]\n"
+    "add x12, x12, #0x10\n"
     "bgt 1b\n"
     "2:"  // Vector: Tail
     "smax v21.16b, v30.16b, v29.16b\n"
     "smax v20.16b, v29.16b, v28.16b\n"
     "smax v19.16b, v27.16b, v26.16b\n"
     "smax v18.16b, v25.16b, v24.16b\n"
-    "smax v17.16b, v23.16b, v27.16b\n"
-    "smax v16.16b, v25.16b, v22.16b\n"
+    "smax v17.16b, v27.16b, v23.16b\n"
+    "smax v16.16b, v24.16b, v22.16b\n"
     "smax v19.16b, v21.16b, v19.16b\n"
     "smax v18.16b, v18.16b, v21.16b\n"
-    "str q19, [x13, x11]\n"
-    "smax v17.16b, v20.16b, v17.16b\n"
-    "smax v16.16b, v20.16b, v16.16b\n"
-    "str q18, [x12, x11]\n"
-    "str q17, [x10, x11]\n"
-    "str q16, [x9, x11]\n"
-    "add x11, x11, #0x10\n"
-    "cbz x15, 4f\n"
+    "str q19, [x14, x12]\n"
+    "smax v17.16b, v17.16b, v20.16b\n"
+    "smax v16.16b, v16.16b, v20.16b\n"
+    "str q18, [x13, x12]\n"
+    "str q17, [x11, x12]\n"
+    "str q16, [x10, x12]\n"
+    "add x12, x12, #0x10\n"
+    "cbz x16, 4f\n"
     "3:"  // Oddments
-    "ldr b30, [x27, x14]\n"
-    "ldr b29, [x24, x14]\n"
+    "ldr b30, [x28, x15]\n"
+    "ldr b29, [x25, x15]\n"
     "smax v21.16b, v30.16b, v29.16b\n"
-    "subs x15, x15, #0x1\n"
-    "ldr b28, [x21, x14]\n"
-    "ldr b27, [x25, x14]\n"
+    "subs x16, x16, #0x1\n"
+    "ldr b28, [x22, x15]\n"
+    "ldr b27, [x26, x15]\n"
     "smax v20.16b, v29.16b, v28.16b\n"
-    "ldr b26, [x28, x14]\n"
-    "ldr b25, [x23, x14]\n"
+    "ldr b26, [x9, x15]\n"
+    "ldr b25, [x27, x15]\n"
     "smax v19.16b, v27.16b, v26.16b\n"
     "smax v19.16b, v21.16b, v19.16b\n"
-    "ldr b24, [x26, x14]\n"
-    "ldr b23, [x22, x14]\n"
+    "ldr b24, [x24, x15]\n"
+    "ldr b23, [x23, x15]\n"
     "smax v18.16b, v25.16b, v24.16b\n"
-    "smax v17.16b, v23.16b, v27.16b\n"
-    "ldr b22, [x20, x14]\n"
-    "smax v16.16b, v25.16b, v22.16b\n"
-    "add x14, x14, #0x1\n"
+    "smax v17.16b, v27.16b, v23.16b\n"
+    "ldr b22, [x21, x15]\n"
+    "smax v16.16b, v24.16b, v22.16b\n"
+    "add x15, x15, #0x1\n"
     "smax v18.16b, v18.16b, v21.16b\n"
-    "smax v17.16b, v20.16b, v17.16b\n"
-    "smax v16.16b, v20.16b, v16.16b\n"
-    "str b19, [x13, x11]\n"
-    "str b18, [x12, x11]\n"
-    "str b17, [x10, x11]\n"
-    "str b16, [x9, x11]\n"
-    "add x11, x11, #0x1\n"
+    "smax v17.16b, v17.16b, v20.16b\n"
+    "smax v16.16b, v16.16b, v20.16b\n"
+    "str b19, [x14, x12]\n"
+    "str b18, [x13, x12]\n"
+    "str b17, [x11, x12]\n"
+    "str b16, [x10, x12]\n"
+    "add x12, x12, #0x1\n"
     "bgt 3b\n"
     "4:"  // End
     :
     : [args] "r" (&args), [offsetof_inptrs] "I" (offsetof(KernelArgs, inptrs)), [offsetof_n_channels] "I" (offsetof(KernelArgs, n_channels)), [offsetof_outptrs] "I" (offsetof(KernelArgs, outptrs))
-    : "cc", "memory", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28"
+    : "cc", "memory", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28"
   );
 }
 
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_s8_nhwc_max_generic_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_s8_nhwc_max_generic_depthfirst/generic.cpp
index 9bf313646f..6168a57ca4 100644
--- a/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_s8_nhwc_max_generic_depthfirst/generic.cpp
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_s8_nhwc_max_generic_depthfirst/generic.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2021-2022 Arm Limited.
+ * Copyright (c) 2021-2023 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -41,394 +41,394 @@ void a64_s8_nhwc_max_generic_depthfirst_impl(
 {
   __asm__ __volatile__(
     "cmp %x[n_channels], #0x40\n"
-    "mov x28, #0x0\n"
-    "mov x27, #0x10\n"  // cntb _, ALL, #1
-    "mov x26, #0x20\n"  // cntb _, ALL, #2
-    "mov x25, #0x30\n"  // cntb _, ALL, #3
+    "mov x9, #0x0\n"
+    "mov x28, #0x10\n"  // cntb _, ALL, #1
+    "mov x27, #0x20\n"  // cntb _, ALL, #2
+    "mov x26, #0x30\n"  // cntb _, ALL, #3
     "blt 7f\n"
     "1:"  // 4-vectors of channels
-    "lsr x24, %x[n_valid_cells], #0x2\n"
+    "lsr x25, %x[n_valid_cells], #0x2\n"
+    "movi v8.16b, #0x80\n"
+    "movi v7.16b, #0x80\n"
+    "mov x20, %x[inptrs]\n"
     "movi v6.16b, #0x80\n"
     "movi v5.16b, #0x80\n"
-    "mov x19, %x[inptrs]\n"
-    "movi v4.16b, #0x80\n"
-    "movi v3.16b, #0x80\n"
-    "cbz x24, 4f\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
-    "subs x24, x24, #0x1\n"
-    "add x19, x19, #0x20\n"
-    "ldr q2, [x23, x28]\n"
-    "ldr q1, [x22, x28]\n"
-    "ldr q0, [x21, x28]\n"
-    "ldr q31, [x20, x28]\n"
-    "ldr q30, [x23, x27]\n"
-    "ldr q22, [x22, x27]\n"
-    "ldr q29, [x21, x27]\n"
-    "ldr q28, [x20, x27]\n"
-    "ldr q27, [x23, x26]\n"
-    "ldr q21, [x22, x26]\n"
-    "ldr q26, [x21, x26]\n"
-    "ldr q17, [x20, x26]\n"
-    "ldr q25, [x23, x25]\n"
-    "ldr q20, [x22, x25]\n"
-    "ldr q24, [x21, x25]\n"
-    "ldr q16, [x20, x25]\n"
+    "cbz x25, 4f\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "ldr q4, [x24, x9]\n"
+    "subs x25, x25, #0x1\n"
+    "ldr q3, [x23, x9]\n"
+    "ldr q2, [x24, x28]\n"
+    "ldr q1, [x23, x28]\n"
+    "ldr q0, [x24, x27]\n"
+    "ldr q31, [x23, x27]\n"
+    "ldr q30, [x24, x26]\n"
+    "ldr q29, [x23, x26]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "add x20, x20, #0x20\n"
+    "ldr q28, [x22, x9]\n"
+    "ldr q22, [x21, x9]\n"
+    "ldr q27, [x22, x28]\n"
+    "ldr q21, [x21, x28]\n"
+    "ldr q26, [x22, x27]\n"
+    "ldr q20, [x21, x27]\n"
+    "ldr q25, [x22, x26]\n"
+    "ldr q24, [x21, x26]\n"
     "beq 3f\n"
     "2:"  // 4-vectors of channels: 4 inputs loop
-    "smax v23.16b, v2.16b, v1.16b\n"
-    "smax v19.16b, v0.16b, v31.16b\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
-    "smax v22.16b, v30.16b, v22.16b\n"
-    "smax v18.16b, v29.16b, v28.16b\n"
-    "subs x24, x24, #0x1\n"
-    "add x19, x19, #0x20\n"
-    "smax v21.16b, v27.16b, v21.16b\n"
-    "smax v17.16b, v26.16b, v17.16b\n"
-    "ldr q2, [x23, x28]\n"
-    "ldr q1, [x22, x28]\n"
-    "smax v20.16b, v25.16b, v20.16b\n"
-    "smax v16.16b, v24.16b, v16.16b\n"
-    "ldr q0, [x21, x28]\n"
-    "ldr q31, [x20, x28]\n"
+    "smax v23.16b, v4.16b, v3.16b\n"
+    "smax v19.16b, v28.16b, v22.16b\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "ldr q4, [x24, x9]\n"
+    "ldr q3, [x23, x9]\n"
+    "smax v22.16b, v2.16b, v1.16b\n"
+    "ldr q2, [x24, x28]\n"
+    "smax v18.16b, v27.16b, v21.16b\n"
+    "ldr q1, [x23, x28]\n"
+    "smax v21.16b, v0.16b, v31.16b\n"
+    "ldr q0, [x24, x27]\n"
+    "smax v17.16b, v26.16b, v20.16b\n"
+    "ldr q31, [x23, x27]\n"
+    "smax v20.16b, v30.16b, v29.16b\n"
+    "ldr q30, [x24, x26]\n"
+    "smax v16.16b, v25.16b, v24.16b\n"
+    "ldr q29, [x23, x26]\n"
     "smax v19.16b, v23.16b, v19.16b\n"
     "smax v18.16b, v22.16b, v18.16b\n"
-    "ldr q30, [x23, x27]\n"
-    "ldr q22, [x22, x27]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "ldr q28, [x22, x9]\n"
+    "ldr q22, [x21, x9]\n"
     "smax v17.16b, v21.16b, v17.16b\n"
     "smax v16.16b, v20.16b, v16.16b\n"
-    "ldr q29, [x21, x27]\n"
-    "ldr q28, [x20, x27]\n"
-    "smax v6.16b, v6.16b, v19.16b\n"
-    "smax v5.16b, v5.16b, v18.16b\n"
-    "ldr q27, [x23, x26]\n"
-    "ldr q21, [x22, x26]\n"
-    "smax v4.16b, v4.16b, v17.16b\n"
-    "smax v3.16b, v3.16b, v16.16b\n"
-    "ldr q26, [x21, x26]\n"
-    "ldr q17, [x20, x26]\n"
-    "ldr q25, [x23, x25]\n"
-    "ldr q20, [x22, x25]\n"
-    "ldr q24, [x21, x25]\n"
-    "ldr q16, [x20, x25]\n"
+    "ldr q27, [x22, x28]\n"
+    "ldr q21, [x21, x28]\n"
+    "subs x25, x25, #0x1\n"
+    "smax v8.16b, v8.16b, v19.16b\n"
+    "ldr q26, [x22, x27]\n"
+    "ldr q20, [x21, x27]\n"
+    "smax v7.16b, v7.16b, v18.16b\n"
+    "smax v6.16b, v6.16b, v17.16b\n"
+    "ldr q25, [x22, x26]\n"
+    "ldr q24, [x21, x26]\n"
+    "smax v5.16b, v5.16b, v16.16b\n"
+    "add x20, x20, #0x20\n"
     "bgt 2b\n"
     "3:"  // 4-vectors of channels: 4 inputs tail
-    "smax v23.16b, v2.16b, v1.16b\n"
-    "smax v19.16b, v0.16b, v31.16b\n"
-    "smax v22.16b, v30.16b, v22.16b\n"
-    "smax v18.16b, v29.16b, v28.16b\n"
-    "smax v21.16b, v27.16b, v21.16b\n"
-    "smax v17.16b, v26.16b, v17.16b\n"
-    "smax v20.16b, v25.16b, v20.16b\n"
-    "smax v16.16b, v24.16b, v16.16b\n"
+    "smax v23.16b, v4.16b, v3.16b\n"
+    "smax v19.16b, v28.16b, v22.16b\n"
+    "smax v22.16b, v2.16b, v1.16b\n"
+    "smax v18.16b, v27.16b, v21.16b\n"
+    "smax v21.16b, v0.16b, v31.16b\n"
+    "smax v17.16b, v26.16b, v20.16b\n"
+    "smax v20.16b, v30.16b, v29.16b\n"
+    "smax v16.16b, v25.16b, v24.16b\n"
     "smax v19.16b, v23.16b, v19.16b\n"
     "smax v18.16b, v22.16b, v18.16b\n"
     "smax v17.16b, v21.16b, v17.16b\n"
     "smax v16.16b, v20.16b, v16.16b\n"
-    "smax v6.16b, v6.16b, v19.16b\n"
-    "smax v5.16b, v5.16b, v18.16b\n"
-    "smax v4.16b, v4.16b, v17.16b\n"
-    "smax v3.16b, v3.16b, v16.16b\n"
+    "smax v8.16b, v8.16b, v19.16b\n"
+    "smax v7.16b, v7.16b, v18.16b\n"
+    "smax v6.16b, v6.16b, v17.16b\n"
+    "smax v5.16b, v5.16b, v16.16b\n"
     "4:"  // 4-vectors of channels: After loop
-    "ands x20, %x[n_valid_cells], #0x3\n"
+    "ands x21, %x[n_valid_cells], #0x3\n"
     "beq 6f\n"
     "5:"  // 4-vectors of channels: Single input loop
-    "ldr x23, [x19], #0x8\n"
-    "ldr q2, [x23, x28]\n"
-    "subs x20, x20, #0x1\n"
-    "smax v6.16b, v6.16b, v2.16b\n"
-    "ldr q30, [x23, x27]\n"
-    "ldr q27, [x23, x26]\n"
+    "ldr x24, [x20], #0x8\n"
+    "ldr q4, [x24, x9]\n"
+    "subs x21, x21, #0x1\n"
+    "smax v8.16b, v8.16b, v4.16b\n"
+    "ldr q2, [x24, x28]\n"
+    "ldr q0, [x24, x27]\n"
+    "smax v7.16b, v7.16b, v2.16b\n"
+    "smax v6.16b, v6.16b, v0.16b\n"
+    "ldr q30, [x24, x26]\n"
     "smax v5.16b, v5.16b, v30.16b\n"
-    "smax v4.16b, v4.16b, v27.16b\n"
-    "ldr q25, [x23, x25]\n"
-    "smax v3.16b, v3.16b, v25.16b\n"
     "bgt 5b\n"
     "6:"  // 4-vectors of channels: Single input loop: End
     "sub %x[n_channels], %x[n_channels], #0x40\n"
     "cmp %x[n_channels], #0x40\n"
-    "str q6, [%x[outptr], x28]\n"
-    "str q5, [%x[outptr], x27]\n"
+    "str q8, [%x[outptr], x9]\n"
+    "str q7, [%x[outptr], x28]\n"
+    "add x9, x9, #0x40\n"
     "add x28, x28, #0x40\n"
+    "str q6, [%x[outptr], x27]\n"
     "add x27, x27, #0x40\n"
-    "str q4, [%x[outptr], x26]\n"
+    "str q5, [%x[outptr], x26]\n"
     "add x26, x26, #0x40\n"
-    "str q3, [%x[outptr], x25]\n"
-    "add x25, x25, #0x40\n"
     "bge 1b\n"
     "cbz %x[n_channels], 43f\n"
     "7:"  // Single vector of channels
     "cmp %x[n_channels], #0x10\n"
     "blt 14f\n"
     "8:"  // Single vector of channels: Loop
-    "lsr x24, %x[n_valid_cells], #0x2\n"
-    "movi v6.16b, #0x80\n"
-    "mov x19, %x[inptrs]\n"
-    "cbz x24, 11f\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
-    "subs x24, x24, #0x1\n"
-    "add x19, x19, #0x20\n"
-    "ldr q2, [x23, x28]\n"
-    "ldr q1, [x22, x28]\n"
-    "ldr q0, [x21, x28]\n"
-    "ldr q31, [x20, x28]\n"
+    "lsr x25, %x[n_valid_cells], #0x2\n"
+    "movi v8.16b, #0x80\n"
+    "mov x20, %x[inptrs]\n"
+    "cbz x25, 11f\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "ldr q4, [x24, x9]\n"
+    "subs x25, x25, #0x1\n"
+    "ldr q3, [x23, x9]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "add x20, x20, #0x20\n"
+    "ldr q28, [x22, x9]\n"
+    "ldr q22, [x21, x9]\n"
     "beq 10f\n"
     "9:"  // Single vector of channels: Loop: 4 inputs loop
-    "smax v23.16b, v2.16b, v1.16b\n"
-    "smax v19.16b, v0.16b, v31.16b\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
+    "smax v23.16b, v4.16b, v3.16b\n"
+    "smax v19.16b, v28.16b, v22.16b\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "ldr q4, [x24, x9]\n"
+    "ldr q3, [x23, x9]\n"
     "smax v19.16b, v23.16b, v19.16b\n"
-    "subs x24, x24, #0x1\n"
-    "smax v6.16b, v6.16b, v19.16b\n"
-    "add x19, x19, #0x20\n"
-    "ldr q2, [x23, x28]\n"
-    "ldr q1, [x22, x28]\n"
-    "ldr q0, [x21, x28]\n"
-    "ldr q31, [x20, x28]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "subs x25, x25, #0x1\n"
+    "ldr q28, [x22, x9]\n"
+    "ldr q22, [x21, x9]\n"
+    "smax v8.16b, v8.16b, v19.16b\n"
+    "add x20, x20, #0x20\n"
     "bgt 9b\n"
     "10:"  // Single vector of channels: Loop: 4 inputs tail
-    "smax v23.16b, v2.16b, v1.16b\n"
-    "smax v19.16b, v0.16b, v31.16b\n"
+    "smax v23.16b, v4.16b, v3.16b\n"
+    "smax v19.16b, v28.16b, v22.16b\n"
     "smax v19.16b, v23.16b, v19.16b\n"
-    "smax v6.16b, v6.16b, v19.16b\n"
+    "smax v8.16b, v8.16b, v19.16b\n"
     "11:"  // Single vector of channels: Loop: After loop
-    "ands x20, %x[n_valid_cells], #0x3\n"
+    "ands x21, %x[n_valid_cells], #0x3\n"
     "beq 13f\n"
     "12:"  // Single vector of channels: Loop: Single input loop
-    "ldr x23, [x19], #0x8\n"
-    "ldr q2, [x23, x28]\n"
-    "subs x20, x20, #0x1\n"
-    "smax v6.16b, v6.16b, v2.16b\n"
+    "ldr x24, [x20], #0x8\n"
+    "ldr q4, [x24, x9]\n"
+    "subs x21, x21, #0x1\n"
+    "smax v8.16b, v8.16b, v4.16b\n"
     "bgt 12b\n"
     "13:"  // Single vector of channels: Loop: Single input loop: End
     "sub %x[n_channels], %x[n_channels], #0x10\n"
     "cmp %x[n_channels], #0x10\n"
-    "str q6, [%x[outptr], x28]\n"
-    "add x28, x28, #0x10\n"
+    "str q8, [%x[outptr], x9]\n"
+    "add x9, x9, #0x10\n"
     "bge 8b\n"
     "cbz %x[n_channels], 43f\n"
     "14:"  // Oddments
-    "lsr x24, %x[n_valid_cells], #0x2\n"
-    "add %x[outptr], %x[outptr], x28\n"
-    "movi v6.16b, #0x80\n"
-    "mov x19, %x[inptrs]\n"
-    "cbz x24, 24f\n"
+    "lsr x25, %x[n_valid_cells], #0x2\n"
+    "add %x[outptr], %x[outptr], x9\n"
+    "movi v8.16b, #0x80\n"
+    "mov x20, %x[inptrs]\n"
+    "cbz x25, 24f\n"
     "15:"  // Oddments: 4 inputs loop
-    "ldp x23, x22, [x19, #0x0]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
-    "add x19, x19, #0x20\n"
-    "add x23, x23, x28\n"
-    "add x22, x22, x28\n"
-    "add x21, x21, x28\n"
-    "movi v2.16b, #0x0\n"
-    "movi v1.16b, #0x0\n"
-    "add x20, x20, x28\n"
-    "movi v0.16b, #0x0\n"
-    "movi v31.16b, #0x0\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "add x20, x20, #0x20\n"
+    "add x24, x24, x9\n"
+    "add x23, x23, x9\n"
+    "add x22, x22, x9\n"
+    "movi v4.16b, #0x0\n"
+    "movi v3.16b, #0x0\n"
+    "add x21, x21, x9\n"
+    "movi v28.16b, #0x0\n"
+    "movi v22.16b, #0x0\n"
     "tbz %x[n_channels], #3, 19f\n"
-    "ldr d2, [x23], #0x8\n"
-    "ldr d1, [x22], #0x8\n"
-    "ldr d0, [x21], #0x8\n"
-    "ldr d31, [x20], #0x8\n"
+    "ldr d4, [x24], #0x8\n"
+    "ldr d3, [x23], #0x8\n"
+    "ldr d28, [x22], #0x8\n"
+    "ldr d22, [x21], #0x8\n"
     "tbz %x[n_channels], #2, 17f\n"
-    "ld1 { v2.s }[2], [x23], #0x4\n"
-    "ld1 { v1.s }[2], [x22], #0x4\n"
-    "ld1 { v0.s }[2], [x21], #0x4\n"
-    "ld1 { v31.s }[2], [x20], #0x4\n"
+    "ld1 { v4.s }[2], [x24], #0x4\n"
+    "ld1 { v3.s }[2], [x23], #0x4\n"
+    "ld1 { v28.s }[2], [x22], #0x4\n"
+    "ld1 { v22.s }[2], [x21], #0x4\n"
     "tbz %x[n_channels], #1, 16f\n"
-    "ld1 { v2.h }[6], [x23], #0x2\n"
-    "ld1 { v1.h }[6], [x22], #0x2\n"
-    "ld1 { v0.h }[6], [x21], #0x2\n"
-    "ld1 { v31.h }[6], [x20], #0x2\n"
+    "ld1 { v4.h }[6], [x24], #0x2\n"
+    "ld1 { v3.h }[6], [x23], #0x2\n"
+    "ld1 { v28.h }[6], [x22], #0x2\n"
+    "ld1 { v22.h }[6], [x21], #0x2\n"
     "tbz %x[n_channels], #0, 23f\n"
-    "ld1 { v2.b }[14], [x23], #0x1\n"
-    "ld1 { v1.b }[14], [x22], #0x1\n"
-    "ld1 { v0.b }[14], [x21], #0x1\n"
-    "ld1 { v31.b }[14], [x20], #0x1\n"
+    "ld1 { v4.b }[14], [x24], #0x1\n"
+    "ld1 { v3.b }[14], [x23], #0x1\n"
+    "ld1 { v28.b }[14], [x22], #0x1\n"
+    "ld1 { v22.b }[14], [x21], #0x1\n"
     "b 23f\n"
     "16:"  // Oddments: 4 inputs loop: Load: Bit 3: Bit 2: Bit 1: Unset
     "tbz %x[n_channels], #0, 23f\n"
-    "ld1 { v2.b }[12], [x23], #0x1\n"
-    "ld1 { v1.b }[12], [x22], #0x1\n"
-    "ld1 { v0.b }[12], [x21], #0x1\n"
-    "ld1 { v31.b }[12], [x20], #0x1\n"
+    "ld1 { v4.b }[12], [x24], #0x1\n"
+    "ld1 { v3.b }[12], [x23], #0x1\n"
+    "ld1 { v28.b }[12], [x22], #0x1\n"
+    "ld1 { v22.b }[12], [x21], #0x1\n"
     "b 23f\n"
     "17:"  // Oddments: 4 inputs loop: Load: Bit 3: Bit 2: Unset
     "tbz %x[n_channels], #1, 18f\n"
-    "ld1 { v2.h }[4], [x23], #0x2\n"
-    "ld1 { v1.h }[4], [x22], #0x2\n"
-    "ld1 { v0.h }[4], [x21], #0x2\n"
-    "ld1 { v31.h }[4], [x20], #0x2\n"
+    "ld1 { v4.h }[4], [x24], #0x2\n"
+    "ld1 { v3.h }[4], [x23], #0x2\n"
+    "ld1 { v28.h }[4], [x22], #0x2\n"
+    "ld1 { v22.h }[4], [x21], #0x2\n"
     "tbz %x[n_channels], #0, 23f\n"
-    "ld1 { v2.b }[10], [x23], #0x1\n"
-    "ld1 { v1.b }[10], [x22], #0x1\n"
-    "ld1 { v0.b }[10], [x21], #0x1\n"
-    "ld1 { v31.b }[10], [x20], #0x1\n"
+    "ld1 { v4.b }[10], [x24], #0x1\n"
+    "ld1 { v3.b }[10], [x23], #0x1\n"
+    "ld1 { v28.b }[10], [x22], #0x1\n"
+    "ld1 { v22.b }[10], [x21], #0x1\n"
     "b 23f\n"
     "18:"  // Oddments: 4 inputs loop: Load: Bit 3: Bit 2: Unset: Bit 1: Unset
     "tbz %x[n_channels], #0, 23f\n"
-    "ld1 { v2.b }[8], [x23], #0x1\n"
-    "ld1 { v1.b }[8], [x22], #0x1\n"
-    "ld1 { v0.b }[8], [x21], #0x1\n"
-    "ld1 { v31.b }[8], [x20], #0x1\n"
+    "ld1 { v4.b }[8], [x24], #0x1\n"
+    "ld1 { v3.b }[8], [x23], #0x1\n"
+    "ld1 { v28.b }[8], [x22], #0x1\n"
+    "ld1 { v22.b }[8], [x21], #0x1\n"
     "b 23f\n"
     "19:"  // Oddments: 4 inputs loop: Load: Bit 3: Unset
     "tbz %x[n_channels], #2, 21f\n"
-    "ldr s2, [x23], #0x4\n"
-    "ldr s1, [x22], #0x4\n"
-    "ldr s0, [x21], #0x4\n"
-    "ldr s31, [x20], #0x4\n"
+    "ldr s4, [x24], #0x4\n"
+    "ldr s3, [x23], #0x4\n"
+    "ldr s28, [x22], #0x4\n"
+    "ldr s22, [x21], #0x4\n"
     "tbz %x[n_channels], #1, 20f\n"
-    "ld1 { v2.h }[2], [x23], #0x2\n"
-    "ld1 { v1.h }[2], [x22], #0x2\n"
-    "ld1 { v0.h }[2], [x21], #0x2\n"
-    "ld1 { v31.h }[2], [x20], #0x2\n"
+    "ld1 { v4.h }[2], [x24], #0x2\n"
+    "ld1 { v3.h }[2], [x23], #0x2\n"
+    "ld1 { v28.h }[2], [x22], #0x2\n"
+    "ld1 { v22.h }[2], [x21], #0x2\n"
     "tbz %x[n_channels], #0, 23f\n"
-    "ld1 { v2.b }[6], [x23], #0x1\n"
-    "ld1 { v1.b }[6], [x22], #0x1\n"
-    "ld1 { v0.b }[6], [x21], #0x1\n"
-    "ld1 { v31.b }[6], [x20], #0x1\n"
+    "ld1 { v4.b }[6], [x24], #0x1\n"
+    "ld1 { v3.b }[6], [x23], #0x1\n"
+    "ld1 { v28.b }[6], [x22], #0x1\n"
+    "ld1 { v22.b }[6], [x21], #0x1\n"
     "b 23f\n"
     "20:"  // Oddments: 4 inputs loop: Load: Bit 3: Unset: Bit 2: Bit 1: Unset
     "tbz %x[n_channels], #0, 23f\n"
-    "ld1 { v2.b }[4], [x23], #0x1\n"
-    "ld1 { v1.b }[4], [x22], #0x1\n"
-    "ld1 { v0.b }[4], [x21], #0x1\n"
-    "ld1 { v31.b }[4], [x20], #0x1\n"
+    "ld1 { v4.b }[4], [x24], #0x1\n"
+    "ld1 { v3.b }[4], [x23], #0x1\n"
+    "ld1 { v28.b }[4], [x22], #0x1\n"
+    "ld1 { v22.b }[4], [x21], #0x1\n"
     "b 23f\n"
     "21:"  // Oddments: 4 inputs loop: Load: Bit 3: Unset: Bit 2: Unset
     "tbz %x[n_channels], #1, 22f\n"
-    "ldr h2, [x23], #0x2\n"
-    "ldr h1, [x22], #0x2\n"
-    "ldr h0, [x21], #0x2\n"
-    "ldr h31, [x20], #0x2\n"
+    "ldr h4, [x24], #0x2\n"
+    "ldr h3, [x23], #0x2\n"
+    "ldr h28, [x22], #0x2\n"
+    "ldr h22, [x21], #0x2\n"
     "tbz %x[n_channels], #0, 23f\n"
-    "ld1 { v2.b }[2], [x23], #0x1\n"
-    "ld1 { v1.b }[2], [x22], #0x1\n"
-    "ld1 { v0.b }[2], [x21], #0x1\n"
-    "ld1 { v31.b }[2], [x20], #0x1\n"
+    "ld1 { v4.b }[2], [x24], #0x1\n"
+    "ld1 { v3.b }[2], [x23], #0x1\n"
+    "ld1 { v28.b }[2], [x22], #0x1\n"
+    "ld1 { v22.b }[2], [x21], #0x1\n"
     "b 23f\n"
     "22:"  // Oddments: 4 inputs loop: Load: Bit 3: Unset: Bit 2: Unset: Bit 1: Unset
     "tbz %x[n_channels], #0, 23f\n"
-    "ldr b2, [x23], #0x1\n"
-    "ldr b1, [x22], #0x1\n"
-    "ldr b0, [x21], #0x1\n"
-    "ldr b31, [x20], #0x1\n"
+    "ldr b4, [x24], #0x1\n"
+    "ldr b3, [x23], #0x1\n"
+    "ldr b28, [x22], #0x1\n"
+    "ldr b22, [x21], #0x1\n"
     "23:"  // Oddments: 4 inputs loop: Load: Bit 3: End
-    "smax v23.16b, v2.16b, v1.16b\n"
-    "smax v19.16b, v0.16b, v31.16b\n"
-    "subs x24, x24, #0x1\n"
+    "smax v23.16b, v4.16b, v3.16b\n"
+    "smax v19.16b, v28.16b, v22.16b\n"
+    "subs x25, x25, #0x1\n"
     "smax v19.16b, v23.16b, v19.16b\n"
-    "smax v6.16b, v6.16b, v19.16b\n"
+    "smax v8.16b, v8.16b, v19.16b\n"
     "bgt 15b\n"
     "24:"  // Oddments: After loop
-    "ands x20, %x[n_valid_cells], #0x3\n"
+    "ands x21, %x[n_valid_cells], #0x3\n"
     "beq 34f\n"
     "25:"  // Oddments: Single input loop
-    "ldr x23, [x19], #0x8\n"
-    "add x23, x23, x28\n"
-    "movi v2.16b, #0x0\n"
+    "ldr x24, [x20], #0x8\n"
+    "add x24, x24, x9\n"
+    "movi v4.16b, #0x0\n"
     "tbz %x[n_channels], #3, 29f\n"
-    "ldr d2, [x23], #0x8\n"
+    "ldr d4, [x24], #0x8\n"
     "tbz %x[n_channels], #2, 27f\n"
-    "ld1 { v2.s }[2], [x23], #0x4\n"
+    "ld1 { v4.s }[2], [x24], #0x4\n"
     "tbz %x[n_channels], #1, 26f\n"
-    "ld1 { v2.h }[6], [x23], #0x2\n"
+    "ld1 { v4.h }[6], [x24], #0x2\n"
     "tbz %x[n_channels], #0, 33f\n"
-    "ld1 { v2.b }[14], [x23], #0x1\n"
+    "ld1 { v4.b }[14], [x24], #0x1\n"
     "b 33f\n"
     "26:"  // Oddments: Single input loop: Load: Bit 3: Bit 2: Bit 1: Unset
     "tbz %x[n_channels], #0, 33f\n"
-    "ld1 { v2.b }[12], [x23], #0x1\n"
+    "ld1 { v4.b }[12], [x24], #0x1\n"
     "b 33f\n"
     "27:"  // Oddments: Single input loop: Load: Bit 3: Bit 2: Unset
     "tbz %x[n_channels], #1, 28f\n"
-    "ld1 { v2.h }[4], [x23], #0x2\n"
+    "ld1 { v4.h }[4], [x24], #0x2\n"
     "tbz %x[n_channels], #0, 33f\n"
-    "ld1 { v2.b }[10], [x23], #0x1\n"
+    "ld1 { v4.b }[10], [x24], #0x1\n"
     "b 33f\n"
     "28:"  // Oddments: Single input loop: Load: Bit 3: Bit 2: Unset: Bit 1: Unset
     "tbz %x[n_channels], #0, 33f\n"
-    "ld1 { v2.b }[8], [x23], #0x1\n"
+    "ld1 { v4.b }[8], [x24], #0x1\n"
     "b 33f\n"
     "29:"  // Oddments: Single input loop: Load: Bit 3: Unset
     "tbz %x[n_channels], #2, 31f\n"
-    "ldr s2, [x23], #0x4\n"
+    "ldr s4, [x24], #0x4\n"
     "tbz %x[n_channels], #1, 30f\n"
-    "ld1 { v2.h }[2], [x23], #0x2\n"
+    "ld1 { v4.h }[2], [x24], #0x2\n"
     "tbz %x[n_channels], #0, 33f\n"
-    "ld1 { v2.b }[6], [x23], #0x1\n"
+    "ld1 { v4.b }[6], [x24], #0x1\n"
     "b 33f\n"
     "30:"  // Oddments: Single input loop: Load: Bit 3: Unset: Bit 2: Bit 1: Unset
     "tbz %x[n_channels], #0, 33f\n"
-    "ld1 { v2.b }[4], [x23], #0x1\n"
+    "ld1 { v4.b }[4], [x24], #0x1\n"
     "b 33f\n"
     "31:"  // Oddments: Single input loop: Load: Bit 3: Unset: Bit 2: Unset
     "tbz %x[n_channels], #1, 32f\n"
-    "ldr h2, [x23], #0x2\n"
+    "ldr h4, [x24], #0x2\n"
     "tbz %x[n_channels], #0, 33f\n"
-    "ld1 { v2.b }[2], [x23], #0x1\n"
+    "ld1 { v4.b }[2], [x24], #0x1\n"
     "b 33f\n"
     "32:"  // Oddments: Single input loop: Load: Bit 3: Unset: Bit 2: Unset: Bit 1: Unset
     "tbz %x[n_channels], #0, 33f\n"
-    "ldr b2, [x23], #0x1\n"
+    "ldr b4, [x24], #0x1\n"
     "33:"  // Oddments: Single input loop: Load: Bit 3: End
-    "subs x20, x20, #0x1\n"
-    "smax v6.16b, v6.16b, v2.16b\n"
+    "subs x21, x21, #0x1\n"
+    "smax v8.16b, v8.16b, v4.16b\n"
     "bgt 25b\n"
     "34:"  // Oddments: Single input loop: End
     "tbz %x[n_channels], #3, 38f\n"
-    "st1 { v6.d }[0], [%x[outptr]], #0x8\n"
+    "st1 { v8.d }[0], [%x[outptr]], #0x8\n"
     "tbz %x[n_channels], #2, 36f\n"
-    "st1 { v6.s }[2], [%x[outptr]], #0x4\n"
+    "st1 { v8.s }[2], [%x[outptr]], #0x4\n"
     "tbz %x[n_channels], #1, 35f\n"
-    "st1 { v6.h }[6], [%x[outptr]], #0x2\n"
+    "st1 { v8.h }[6], [%x[outptr]], #0x2\n"
     "tbz %x[n_channels], #0, 42f\n"
-    "st1 { v6.b }[14], [%x[outptr]], #0x1\n"
+    "st1 { v8.b }[14], [%x[outptr]], #0x1\n"
     "b 42f\n"
     "35:"  // Oddments: Store: Bit 3: Bit 2: Bit 1: Unset
     "tbz %x[n_channels], #0, 42f\n"
-    "st1 { v6.b }[12], [%x[outptr]], #0x1\n"
+    "st1 { v8.b }[12], [%x[outptr]], #0x1\n"
     "b 42f\n"
     "36:"  // Oddments: Store: Bit 3: Bit 2: Unset
     "tbz %x[n_channels], #1, 37f\n"
-    "st1 { v6.h }[4], [%x[outptr]], #0x2\n"
+    "st1 { v8.h }[4], [%x[outptr]], #0x2\n"
     "tbz %x[n_channels], #0, 42f\n"
-    "st1 { v6.b }[10], [%x[outptr]], #0x1\n"
+    "st1 { v8.b }[10], [%x[outptr]], #0x1\n"
     "b 42f\n"
     "37:"  // Oddments: Store: Bit 3: Bit 2: Unset: Bit 1: Unset
     "tbz %x[n_channels], #0, 42f\n"
-    "st1 { v6.b }[8], [%x[outptr]], #0x1\n"
+    "st1 { v8.b }[8], [%x[outptr]], #0x1\n"
     "b 42f\n"
     "38:"  // Oddments: Store: Bit 3: Unset
     "tbz %x[n_channels], #2, 40f\n"
-    "st1 { v6.s }[0], [%x[outptr]], #0x4\n"
+    "st1 { v8.s }[0], [%x[outptr]], #0x4\n"
     "tbz %x[n_channels], #1, 39f\n"
-    "st1 { v6.h }[2], [%x[outptr]], #0x2\n"
+    "st1 { v8.h }[2], [%x[outptr]], #0x2\n"
     "tbz %x[n_channels], #0, 42f\n"
-    "st1 { v6.b }[6], [%x[outptr]], #0x1\n"
+    "st1 { v8.b }[6], [%x[outptr]], #0x1\n"
     "b 42f\n"
     "39:"  // Oddments: Store: Bit 3: Unset: Bit 2: Bit 1: Unset
     "tbz %x[n_channels], #0, 42f\n"
-    "st1 { v6.b }[4], [%x[outptr]], #0x1\n"
+    "st1 { v8.b }[4], [%x[outptr]], #0x1\n"
     "b 42f\n"
     "40:"  // Oddments: Store: Bit 3: Unset: Bit 2: Unset
     "tbz %x[n_channels], #1, 41f\n"
-    "st1 { v6.h }[0], [%x[outptr]], #0x2\n"
+    "st1 { v8.h }[0], [%x[outptr]], #0x2\n"
     "tbz %x[n_channels], #0, 42f\n"
-    "st1 { v6.b }[2], [%x[outptr]], #0x1\n"
+    "st1 { v8.b }[2], [%x[outptr]], #0x1\n"
     "b 42f\n"
     "41:"  // Oddments: Store: Bit 3: Unset: Bit 2: Unset: Bit 1: Unset
     "tbz %x[n_channels], #0, 42f\n"
-    "st1 { v6.b }[0], [%x[outptr]], #0x1\n"
+    "st1 { v8.b }[0], [%x[outptr]], #0x1\n"
     "42:"  // Oddments: Store: Bit 3: End
     "43:"  // End
     : [n_channels] "+&r" (n_channels), [outptr] "+&r" (outptr)
     : [inptrs] "r" (inptrs), [n_valid_cells] "r" (n_valid_cells)
-    : "cc", "memory", "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28"
+    : "cc", "memory", "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x9", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28"
   );
 }
 
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_s8q_nhwc_avg_generic_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_s8q_nhwc_avg_generic_depthfirst/generic.cpp
index a2487b0592..e889782fa3 100644
--- a/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_s8q_nhwc_avg_generic_depthfirst/generic.cpp
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_s8q_nhwc_avg_generic_depthfirst/generic.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2021-2022 Arm Limited.
+ * Copyright (c) 2021-2023 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -115,16 +115,16 @@ void a64_s8q_nhwc_avg_generic_depthfirst_impl(
 
   __asm__ __volatile__(
     "cmp %x[n_channels], #0x40\n"
-    "mov x26, #0x0\n"
-    "mov x25, #0x10\n"  // cntb _, ALL, #1
-    "mov x24, #0x20\n"  // cntb _, ALL, #2
-    "mov x23, #0x30\n"  // cntb _, ALL, #3
+    "mov x27, #0x0\n"
+    "mov x26, #0x10\n"  // cntb _, ALL, #1
+    "mov x25, #0x20\n"  // cntb _, ALL, #2
+    "mov x24, #0x30\n"  // cntb _, ALL, #3
     "blt 7f\n"
     "1:"  // 4-vectors of channels
-    "lsr x22, %x[n_valid_cells], #0x1\n"
+    "lsr x23, %x[n_valid_cells], #0x1\n"
     "movi v15.4s, #0x0\n"
     "movi v14.4s, #0x0\n"
-    "mov x19, %x[inptrs]\n"
+    "mov x20, %x[inptrs]\n"
     "movi v13.4s, #0x0\n"
     "movi v12.4s, #0x0\n"
     "movi v11.4s, #0x0\n"
@@ -139,43 +139,43 @@ void a64_s8q_nhwc_avg_generic_depthfirst_impl(
     "movi v2.4s, #0x0\n"
     "movi v1.4s, #0x0\n"
     "movi v0.4s, #0x0\n"
-    "cbz x22, 4f\n"
-    "ldp x21, x20, [x19, #0x0]\n"
-    "subs x22, x22, #0x1\n"
-    "add x19, x19, #0x10\n"
-    "ldr q31, [x21, x26]\n"
-    "ldr q30, [x20, x26]\n"
-    "ldr q29, [x21, x25]\n"
-    "ldr q28, [x20, x25]\n"
-    "ldr q27, [x21, x24]\n"
-    "ldr q26, [x20, x24]\n"
-    "ldr q25, [x21, x23]\n"
-    "ldr q24, [x20, x23]\n"
+    "cbz x23, 4f\n"
+    "ldp x22, x21, [x20, #0x0]\n"
+    "ldr q31, [x22, x27]\n"
+    "subs x23, x23, #0x1\n"
+    "add x20, x20, #0x10\n"
+    "ldr q30, [x21, x27]\n"
+    "ldr q29, [x22, x26]\n"
+    "ldr q28, [x21, x26]\n"
+    "ldr q27, [x22, x25]\n"
+    "ldr q26, [x21, x25]\n"
+    "ldr q25, [x22, x24]\n"
+    "ldr q24, [x21, x24]\n"
     "beq 3f\n"
     "2:"  // 4-vectors of channels: 2 inputs loop
     "saddl v23.8h, v31.8b, v30.8b\n"
     "saddl2 v22.8h, v31.16b, v30.16b\n"
-    "ldp x21, x20, [x19, #0x0]\n"
-    "subs x22, x22, #0x1\n"
+    "ldp x22, x21, [x20, #0x0]\n"
+    "ldr q31, [x22, x27]\n"
+    "ldr q30, [x21, x27]\n"
     "saddl v21.8h, v29.8b, v28.8b\n"
     "saddl2 v20.8h, v29.16b, v28.16b\n"
-    "add x19, x19, #0x10\n"
-    "ldr q31, [x21, x26]\n"
+    "ldr q29, [x22, x26]\n"
+    "ldr q28, [x21, x26]\n"
     "saddl v19.8h, v27.8b, v26.8b\n"
     "saddl2 v18.8h, v27.16b, v26.16b\n"
-    "ldr q30, [x20, x26]\n"
-    "ldr q29, [x21, x25]\n"
-    "saddl v17.8h, v25.8b, v24.8b\n"
-    "saddl2 v16.8h, v25.16b, v24.16b\n"
-    "ldr q28, [x20, x25]\n"
-    "ldr q27, [x21, x24]\n"
+    "ldr q27, [x22, x25]\n"
+    "ldr q26, [x21, x25]\n"
+    "subs x23, x23, #0x1\n"
     "saddw v15.4s, v15.4s, v23.4h\n"
     "saddw2 v14.4s, v14.4s, v23.8h\n"
-    "ldr q26, [x20, x24]\n"
-    "ldr q25, [x21, x23]\n"
+    "saddl v17.8h, v25.8b, v24.8b\n"
+    "saddl2 v16.8h, v25.16b, v24.16b\n"
+    "ldr q25, [x22, x24]\n"
+    "add x20, x20, #0x10\n"
     "saddw v13.4s, v13.4s, v22.4h\n"
     "saddw2 v12.4s, v12.4s, v22.8h\n"
-    "ldr q24, [x20, x23]\n"
+    "ldr q24, [x21, x24]\n"
     "saddw v11.4s, v11.4s, v21.4h\n"
     "saddw2 v10.4s, v10.4s, v21.8h\n"
     "saddw v9.4s, v9.4s, v20.4h\n"
@@ -215,21 +215,21 @@ void a64_s8q_nhwc_avg_generic_depthfirst_impl(
     "saddw v1.4s, v1.4s, v16.4h\n"
     "saddw2 v0.4s, v0.4s, v16.8h\n"
     "4:"  // 4-vectors of channels: After loop
-    "ands x20, %x[n_valid_cells], #0x1\n"
+    "ands x21, %x[n_valid_cells], #0x1\n"
     "beq 6f\n"
     "5:"  // 4-vectors of channels: Single input loop
-    "ldr x21, [x19], #0x8\n"
-    "ldr q31, [x21, x26]\n"
+    "ldr x22, [x20], #0x8\n"
+    "ldr q31, [x22, x27]\n"
     "sxtl v23.8h, v31.8b\n"
     "sxtl2 v22.8h, v31.16b\n"
-    "ldr q29, [x21, x25]\n"
-    "ldr q27, [x21, x24]\n"
+    "ldr q29, [x22, x26]\n"
+    "ldr q27, [x22, x25]\n"
     "sxtl v21.8h, v29.8b\n"
     "sxtl2 v20.8h, v29.16b\n"
-    "ldr q25, [x21, x23]\n"
+    "ldr q25, [x22, x24]\n"
     "sxtl v19.8h, v27.8b\n"
     "sxtl2 v18.8h, v27.16b\n"
-    "subs x20, x20, #0x1\n"
+    "subs x21, x21, #0x1\n"
     "sxtl v17.8h, v25.8b\n"
     "sxtl2 v16.8h, v25.16b\n"
     "saddw v15.4s, v15.4s, v23.4h\n"
@@ -254,9 +254,9 @@ void a64_s8q_nhwc_avg_generic_depthfirst_impl(
     "ld1r { v17.4s }, [%x[combined_rescale_value]]\n"
     "srshl v15.4s, v15.4s, v18.4s\n"
     "srshl v14.4s, v14.4s, v18.4s\n"
+    "ld1r { v16.4s }, [%x[right_shift]]\n"
     "srshl v13.4s, v13.4s, v18.4s\n"
     "srshl v12.4s, v12.4s, v18.4s\n"
-    "ld1r { v16.4s }, [%x[right_shift]]\n"
     "sub %x[n_channels], %x[n_channels], #0x40\n"
     "srshl v11.4s, v11.4s, v18.4s\n"
     "srshl v10.4s, v10.4s, v18.4s\n"
@@ -347,47 +347,47 @@ void a64_s8q_nhwc_avg_generic_depthfirst_impl(
     "uzp1 v19.16b, v1.16b, v0.16b\n"
     "uzp1 v16.16b, v23.16b, v16.16b\n"
     "uzp1 v18.16b, v22.16b, v18.16b\n"
-    "str q16, [%x[outptr], x26]\n"
-    "add x26, x26, #0x40\n"
+    "str q16, [%x[outptr], x27]\n"
+    "add x27, x27, #0x40\n"
     "uzp1 v17.16b, v21.16b, v17.16b\n"
     "uzp1 v16.16b, v20.16b, v19.16b\n"
-    "str q18, [%x[outptr], x25]\n"
+    "str q18, [%x[outptr], x26]\n"
+    "add x26, x26, #0x40\n"
+    "str q17, [%x[outptr], x25]\n"
     "add x25, x25, #0x40\n"
-    "str q17, [%x[outptr], x24]\n"
+    "str q16, [%x[outptr], x24]\n"
     "add x24, x24, #0x40\n"
-    "str q16, [%x[outptr], x23]\n"
-    "add x23, x23, #0x40\n"
     "bge 1b\n"
     "cbz %x[n_channels], 43f\n"
     "7:"  // Single vector of channels
     "cmp %x[n_channels], #0x10\n"
     "blt 14f\n"
     "8:"  // Single vector of channels: Loop
-    "lsr x22, %x[n_valid_cells], #0x1\n"
+    "lsr x23, %x[n_valid_cells], #0x1\n"
     "movi v15.4s, #0x0\n"
     "movi v14.4s, #0x0\n"
-    "mov x19, %x[inptrs]\n"
+    "mov x20, %x[inptrs]\n"
     "movi v13.4s, #0x0\n"
     "movi v12.4s, #0x0\n"
-    "cbz x22, 11f\n"
-    "ldp x21, x20, [x19, #0x0]\n"
-    "subs x22, x22, #0x1\n"
-    "add x19, x19, #0x10\n"
-    "ldr q31, [x21, x26]\n"
-    "ldr q30, [x20, x26]\n"
+    "cbz x23, 11f\n"
+    "ldp x22, x21, [x20, #0x0]\n"
+    "ldr q31, [x22, x27]\n"
+    "subs x23, x23, #0x1\n"
+    "add x20, x20, #0x10\n"
+    "ldr q30, [x21, x27]\n"
     "beq 10f\n"
     "9:"  // Single vector of channels: Loop: 2 inputs loop
     "saddl v23.8h, v31.8b, v30.8b\n"
     "saddl2 v22.8h, v31.16b, v30.16b\n"
-    "ldp x21, x20, [x19, #0x0]\n"
-    "subs x22, x22, #0x1\n"
+    "ldp x22, x21, [x20, #0x0]\n"
+    "ldr q31, [x22, x27]\n"
+    "ldr q30, [x21, x27]\n"
+    "subs x23, x23, #0x1\n"
     "saddw v15.4s, v15.4s, v23.4h\n"
     "saddw2 v14.4s, v14.4s, v23.8h\n"
-    "add x19, x19, #0x10\n"
-    "ldr q31, [x21, x26]\n"
     "saddw v13.4s, v13.4s, v22.4h\n"
     "saddw2 v12.4s, v12.4s, v22.8h\n"
-    "ldr q30, [x20, x26]\n"
+    "add x20, x20, #0x10\n"
     "bgt 9b\n"
     "10:"  // Single vector of channels: Loop: 2 inputs tail
     "saddl v23.8h, v31.8b, v30.8b\n"
@@ -397,14 +397,14 @@ void a64_s8q_nhwc_avg_generic_depthfirst_impl(
     "saddw v13.4s, v13.4s, v22.4h\n"
     "saddw2 v12.4s, v12.4s, v22.8h\n"
     "11:"  // Single vector of channels: Loop: After loop
-    "ands x20, %x[n_valid_cells], #0x1\n"
+    "ands x21, %x[n_valid_cells], #0x1\n"
     "beq 13f\n"
     "12:"  // Single vector of channels: Loop: Single input loop
-    "ldr x21, [x19], #0x8\n"
-    "ldr q31, [x21, x26]\n"
+    "ldr x22, [x20], #0x8\n"
+    "ldr q31, [x22, x27]\n"
     "sxtl v23.8h, v31.8b\n"
     "sxtl2 v22.8h, v31.16b\n"
-    "subs x20, x20, #0x1\n"
+    "subs x21, x21, #0x1\n"
     "saddw v15.4s, v15.4s, v23.4h\n"
     "saddw2 v14.4s, v14.4s, v23.8h\n"
     "saddw v13.4s, v13.4s, v22.4h\n"
@@ -415,9 +415,9 @@ void a64_s8q_nhwc_avg_generic_depthfirst_impl(
     "ld1r { v17.4s }, [%x[combined_rescale_value]]\n"
     "srshl v15.4s, v15.4s, v18.4s\n"
     "srshl v14.4s, v14.4s, v18.4s\n"
+    "ld1r { v16.4s }, [%x[right_shift]]\n"
     "srshl v13.4s, v13.4s, v18.4s\n"
     "srshl v12.4s, v12.4s, v18.4s\n"
-    "ld1r { v16.4s }, [%x[right_shift]]\n"
     "sub %x[n_channels], %x[n_channels], #0x10\n"
     "sqrdmulh v15.4s, v15.4s, v17.4s\n"
     "sqrdmulh v14.4s, v14.4s, v17.4s\n"
@@ -441,149 +441,149 @@ void a64_s8q_nhwc_avg_generic_depthfirst_impl(
     "uzp1 v23.16b, v15.16b, v14.16b\n"
     "uzp1 v16.16b, v13.16b, v12.16b\n"
     "uzp1 v16.16b, v23.16b, v16.16b\n"
-    "str q16, [%x[outptr], x26]\n"
-    "add x26, x26, #0x10\n"
+    "str q16, [%x[outptr], x27]\n"
+    "add x27, x27, #0x10\n"
     "bge 8b\n"
     "cbz %x[n_channels], 43f\n"
     "14:"  // Oddments
-    "lsr x22, %x[n_valid_cells], #0x1\n"
-    "add %x[outptr], %x[outptr], x26\n"
+    "lsr x23, %x[n_valid_cells], #0x1\n"
+    "add %x[outptr], %x[outptr], x27\n"
     "movi v15.4s, #0x0\n"
     "movi v14.4s, #0x0\n"
     "movi v13.4s, #0x0\n"
     "movi v12.4s, #0x0\n"
-    "mov x19, %x[inptrs]\n"
-    "cbz x22, 24f\n"
+    "mov x20, %x[inptrs]\n"
+    "cbz x23, 24f\n"
     "15:"  // Oddments: 2 inputs loop
-    "ldp x21, x20, [x19, #0x0]\n"
-    "add x19, x19, #0x10\n"
-    "add x21, x21, x26\n"
+    "ldp x22, x21, [x20, #0x0]\n"
+    "add x20, x20, #0x10\n"
+    "add x22, x22, x27\n"
     "movi v31.16b, #0x0\n"
-    "add x20, x20, x26\n"
+    "add x21, x21, x27\n"
     "movi v30.16b, #0x0\n"
     "tbz %x[n_channels], #3, 19f\n"
-    "ldr d31, [x21], #0x8\n"
-    "ldr d30, [x20], #0x8\n"
+    "ldr d31, [x22], #0x8\n"
+    "ldr d30, [x21], #0x8\n"
     "tbz %x[n_channels], #2, 17f\n"
-    "ld1 { v31.s }[2], [x21], #0x4\n"
-    "ld1 { v30.s }[2], [x20], #0x4\n"
+    "ld1 { v31.s }[2], [x22], #0x4\n"
+    "ld1 { v30.s }[2], [x21], #0x4\n"
     "tbz %x[n_channels], #1, 16f\n"
-    "ld1 { v31.h }[6], [x21], #0x2\n"
-    "ld1 { v30.h }[6], [x20], #0x2\n"
+    "ld1 { v31.h }[6], [x22], #0x2\n"
+    "ld1 { v30.h }[6], [x21], #0x2\n"
     "tbz %x[n_channels], #0, 23f\n"
-    "ld1 { v31.b }[14], [x21], #0x1\n"
-    "ld1 { v30.b }[14], [x20], #0x1\n"
+    "ld1 { v31.b }[14], [x22], #0x1\n"
+    "ld1 { v30.b }[14], [x21], #0x1\n"
     "b 23f\n"
     "16:"  // Oddments: 2 inputs loop: Load: Bit 3: Bit 2: Bit 1: Unset
     "tbz %x[n_channels], #0, 23f\n"
-    "ld1 { v31.b }[12], [x21], #0x1\n"
-    "ld1 { v30.b }[12], [x20], #0x1\n"
+    "ld1 { v31.b }[12], [x22], #0x1\n"
+    "ld1 { v30.b }[12], [x21], #0x1\n"
     "b 23f\n"
     "17:"  // Oddments: 2 inputs loop: Load: Bit 3: Bit 2: Unset
     "tbz %x[n_channels], #1, 18f\n"
-    "ld1 { v31.h }[4], [x21], #0x2\n"
-    "ld1 { v30.h }[4], [x20], #0x2\n"
+    "ld1 { v31.h }[4], [x22], #0x2\n"
+    "ld1 { v30.h }[4], [x21], #0x2\n"
     "tbz %x[n_channels], #0, 23f\n"
-    "ld1 { v31.b }[10], [x21], #0x1\n"
-    "ld1 { v30.b }[10], [x20], #0x1\n"
+    "ld1 { v31.b }[10], [x22], #0x1\n"
+    "ld1 { v30.b }[10], [x21], #0x1\n"
     "b 23f\n"
     "18:"  // Oddments: 2 inputs loop: Load: Bit 3: Bit 2: Unset: Bit 1: Unset
     "tbz %x[n_channels], #0, 23f\n"
-    "ld1 { v31.b }[8], [x21], #0x1\n"
-    "ld1 { v30.b }[8], [x20], #0x1\n"
+    "ld1 { v31.b }[8], [x22], #0x1\n"
+    "ld1 { v30.b }[8], [x21], #0x1\n"
     "b 23f\n"
     "19:"  // Oddments: 2 inputs loop: Load: Bit 3: Unset
     "tbz %x[n_channels], #2, 21f\n"
-    "ldr s31, [x21], #0x4\n"
-    "ldr s30, [x20], #0x4\n"
+    "ldr s31, [x22], #0x4\n"
+    "ldr s30, [x21], #0x4\n"
     "tbz %x[n_channels], #1, 20f\n"
-    "ld1 { v31.h }[2], [x21], #0x2\n"
-    "ld1 { v30.h }[2], [x20], #0x2\n"
+    "ld1 { v31.h }[2], [x22], #0x2\n"
+    "ld1 { v30.h }[2], [x21], #0x2\n"
     "tbz %x[n_channels], #0, 23f\n"
-    "ld1 { v31.b }[6], [x21], #0x1\n"
-    "ld1 { v30.b }[6], [x20], #0x1\n"
+    "ld1 { v31.b }[6], [x22], #0x1\n"
+    "ld1 { v30.b }[6], [x21], #0x1\n"
     "b 23f\n"
     "20:"  // Oddments: 2 inputs loop: Load: Bit 3: Unset: Bit 2: Bit 1: Unset
     "tbz %x[n_channels], #0, 23f\n"
-    "ld1 { v31.b }[4], [x21], #0x1\n"
-    "ld1 { v30.b }[4], [x20], #0x1\n"
+    "ld1 { v31.b }[4], [x22], #0x1\n"
+    "ld1 { v30.b }[4], [x21], #0x1\n"
     "b 23f\n"
     "21:"  // Oddments: 2 inputs loop: Load: Bit 3: Unset: Bit 2: Unset
     "tbz %x[n_channels], #1, 22f\n"
-    "ldr h31, [x21], #0x2\n"
-    "ldr h30, [x20], #0x2\n"
+    "ldr h31, [x22], #0x2\n"
+    "ldr h30, [x21], #0x2\n"
     "tbz %x[n_channels], #0, 23f\n"
-    "ld1 { v31.b }[2], [x21], #0x1\n"
-    "ld1 { v30.b }[2], [x20], #0x1\n"
+    "ld1 { v31.b }[2], [x22], #0x1\n"
+    "ld1 { v30.b }[2], [x21], #0x1\n"
     "b 23f\n"
     "22:"  // Oddments: 2 inputs loop: Load: Bit 3: Unset: Bit 2: Unset: Bit 1: Unset
     "tbz %x[n_channels], #0, 23f\n"
-    "ldr b31, [x21], #0x1\n"
-    "ldr b30, [x20], #0x1\n"
+    "ldr b31, [x22], #0x1\n"
+    "ldr b30, [x21], #0x1\n"
     "23:"  // Oddments: 2 inputs loop: Load: Bit 3: End
     "saddl v23.8h, v31.8b, v30.8b\n"
     "saddl2 v22.8h, v31.16b, v30.16b\n"
-    "subs x22, x22, #0x1\n"
+    "subs x23, x23, #0x1\n"
     "saddw v15.4s, v15.4s, v23.4h\n"
     "saddw2 v14.4s, v14.4s, v23.8h\n"
     "saddw v13.4s, v13.4s, v22.4h\n"
     "saddw2 v12.4s, v12.4s, v22.8h\n"
     "bgt 15b\n"
     "24:"  // Oddments: After loop
-    "ands x20, %x[n_valid_cells], #0x1\n"
+    "ands x21, %x[n_valid_cells], #0x1\n"
     "beq 34f\n"
     "25:"  // Oddments: Single input loop
-    "ldr x21, [x19], #0x8\n"
-    "add x21, x21, x26\n"
+    "ldr x22, [x20], #0x8\n"
+    "add x22, x22, x27\n"
     "movi v31.16b, #0x0\n"
     "tbz %x[n_channels], #3, 29f\n"
-    "ldr d31, [x21], #0x8\n"
+    "ldr d31, [x22], #0x8\n"
     "tbz %x[n_channels], #2, 27f\n"
-    "ld1 { v31.s }[2], [x21], #0x4\n"
+    "ld1 { v31.s }[2], [x22], #0x4\n"
     "tbz %x[n_channels], #1, 26f\n"
-    "ld1 { v31.h }[6], [x21], #0x2\n"
+    "ld1 { v31.h }[6], [x22], #0x2\n"
     "tbz %x[n_channels], #0, 33f\n"
-    "ld1 { v31.b }[14], [x21], #0x1\n"
+    "ld1 { v31.b }[14], [x22], #0x1\n"
     "b 33f\n"
     "26:"  // Oddments: Single input loop: Load: Bit 3: Bit 2: Bit 1: Unset
     "tbz %x[n_channels], #0, 33f\n"
-    "ld1 { v31.b }[12], [x21], #0x1\n"
+    "ld1 { v31.b }[12], [x22], #0x1\n"
     "b 33f\n"
     "27:"  // Oddments: Single input loop: Load: Bit 3: Bit 2: Unset
     "tbz %x[n_channels], #1, 28f\n"
-    "ld1 { v31.h }[4], [x21], #0x2\n"
+    "ld1 { v31.h }[4], [x22], #0x2\n"
     "tbz %x[n_channels], #0, 33f\n"
-    "ld1 { v31.b }[10], [x21], #0x1\n"
+    "ld1 { v31.b }[10], [x22], #0x1\n"
     "b 33f\n"
     "28:"  // Oddments: Single input loop: Load: Bit 3: Bit 2: Unset: Bit 1: Unset
     "tbz %x[n_channels], #0, 33f\n"
-    "ld1 { v31.b }[8], [x21], #0x1\n"
+    "ld1 { v31.b }[8], [x22], #0x1\n"
     "b 33f\n"
     "29:"  // Oddments: Single input loop: Load: Bit 3: Unset
     "tbz %x[n_channels], #2, 31f\n"
-    "ldr s31, [x21], #0x4\n"
+    "ldr s31, [x22], #0x4\n"
     "tbz %x[n_channels], #1, 30f\n"
-    "ld1 { v31.h }[2], [x21], #0x2\n"
+    "ld1 { v31.h }[2], [x22], #0x2\n"
     "tbz %x[n_channels], #0, 33f\n"
-    "ld1 { v31.b }[6], [x21], #0x1\n"
+    "ld1 { v31.b }[6], [x22], #0x1\n"
     "b 33f\n"
     "30:"  // Oddments: Single input loop: Load: Bit 3: Unset: Bit 2: Bit 1: Unset
     "tbz %x[n_channels], #0, 33f\n"
-    "ld1 { v31.b }[4], [x21], #0x1\n"
+    "ld1 { v31.b }[4], [x22], #0x1\n"
     "b 33f\n"
     "31:"  // Oddments: Single input loop: Load: Bit 3: Unset: Bit 2: Unset
     "tbz %x[n_channels], #1, 32f\n"
-    "ldr h31, [x21], #0x2\n"
+    "ldr h31, [x22], #0x2\n"
     "tbz %x[n_channels], #0, 33f\n"
-    "ld1 { v31.b }[2], [x21], #0x1\n"
+    "ld1 { v31.b }[2], [x22], #0x1\n"
     "b 33f\n"
     "32:"  // Oddments: Single input loop: Load: Bit 3: Unset: Bit 2: Unset: Bit 1: Unset
     "tbz %x[n_channels], #0, 33f\n"
-    "ldr b31, [x21], #0x1\n"
+    "ldr b31, [x22], #0x1\n"
     "33:"  // Oddments: Single input loop: Load: Bit 3: End
     "sxtl v23.8h, v31.8b\n"
     "sxtl2 v22.8h, v31.16b\n"
-    "subs x20, x20, #0x1\n"
+    "subs x21, x21, #0x1\n"
     "saddw v15.4s, v15.4s, v23.4h\n"
     "saddw2 v14.4s, v14.4s, v23.8h\n"
     "saddw v13.4s, v13.4s, v22.4h\n"
@@ -594,9 +594,9 @@ void a64_s8q_nhwc_avg_generic_depthfirst_impl(
     "ld1r { v17.4s }, [%x[combined_rescale_value]]\n"
     "srshl v15.4s, v15.4s, v18.4s\n"
     "srshl v14.4s, v14.4s, v18.4s\n"
+    "ld1r { v16.4s }, [%x[right_shift]]\n"
     "srshl v13.4s, v13.4s, v18.4s\n"
     "srshl v12.4s, v12.4s, v18.4s\n"
-    "ld1r { v16.4s }, [%x[right_shift]]\n"
     "sqrdmulh v15.4s, v15.4s, v17.4s\n"
     "sqrdmulh v14.4s, v14.4s, v17.4s\n"
     "sqrdmulh v13.4s, v13.4s, v17.4s\n"
@@ -666,7 +666,7 @@ void a64_s8q_nhwc_avg_generic_depthfirst_impl(
     "43:"  // End
     : [n_channels] "+&r" (n_channels), [outptr] "+&r" (outptr)
     : [combined_rescale_value] "r" (&combined_rescale_value), [inptrs] "r" (inptrs), [left_shift] "r" (&left_shift), [n_valid_cells] "r" (n_valid_cells), [right_shift] "r" (&right_shift)
-    : "cc", "memory", "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26"
+    : "cc", "memory", "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27"
   );
 }
 
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_s8q_nhwc_max_generic_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_s8q_nhwc_max_generic_depthfirst/generic.cpp
index 5a6cfb4711..90a31ec677 100644
--- a/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_s8q_nhwc_max_generic_depthfirst/generic.cpp
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_s8q_nhwc_max_generic_depthfirst/generic.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2021-2022 Arm Limited.
+ * Copyright (c) 2021-2023 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -42,123 +42,123 @@ void a64_s8q_nhwc_max_generic_depthfirst_impl(
 {
   __asm__ __volatile__(
     "cmp %x[n_channels], #0x40\n"
-    "mov x28, #0x0\n"
-    "mov x27, #0x10\n"  // cntb _, ALL, #1
-    "mov x26, #0x20\n"  // cntb _, ALL, #2
-    "mov x25, #0x30\n"  // cntb _, ALL, #3
+    "mov x9, #0x0\n"
+    "mov x28, #0x10\n"  // cntb _, ALL, #1
+    "mov x27, #0x20\n"  // cntb _, ALL, #2
+    "mov x26, #0x30\n"  // cntb _, ALL, #3
     "blt 7f\n"
     "1:"  // 4-vectors of channels
-    "lsr x24, %x[n_valid_cells], #0x2\n"
-    "movi v4.16b, #0x80\n"
-    "movi v3.16b, #0x80\n"
-    "mov x19, %x[inptrs]\n"
+    "lsr x25, %x[n_valid_cells], #0x2\n"
+    "movi v8.16b, #0x80\n"
+    "movi v7.16b, #0x80\n"
+    "mov x20, %x[inptrs]\n"
     "movi v6.16b, #0x80\n"
     "movi v5.16b, #0x80\n"
-    "cbz x24, 4f\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
-    "subs x24, x24, #0x1\n"
-    "add x19, x19, #0x20\n"
-    "ldr q2, [x23, x28]\n"
-    "ldr q1, [x22, x28]\n"
-    "ldr q0, [x21, x28]\n"
-    "ldr q31, [x20, x28]\n"
-    "ldr q30, [x23, x27]\n"
-    "ldr q22, [x22, x27]\n"
-    "ldr q29, [x21, x27]\n"
-    "ldr q28, [x20, x27]\n"
-    "ldr q27, [x23, x26]\n"
-    "ldr q21, [x22, x26]\n"
-    "ldr q26, [x21, x26]\n"
-    "ldr q17, [x20, x26]\n"
-    "ldr q25, [x23, x25]\n"
-    "ldr q20, [x22, x25]\n"
-    "ldr q24, [x21, x25]\n"
-    "ldr q16, [x20, x25]\n"
+    "cbz x25, 4f\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "ldr q4, [x24, x9]\n"
+    "subs x25, x25, #0x1\n"
+    "ldr q3, [x23, x9]\n"
+    "ldr q2, [x24, x28]\n"
+    "ldr q1, [x23, x28]\n"
+    "ldr q0, [x24, x27]\n"
+    "ldr q31, [x23, x27]\n"
+    "ldr q30, [x24, x26]\n"
+    "ldr q29, [x23, x26]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "add x20, x20, #0x20\n"
+    "ldr q28, [x22, x9]\n"
+    "ldr q22, [x21, x9]\n"
+    "ldr q27, [x22, x28]\n"
+    "ldr q21, [x21, x28]\n"
+    "ldr q26, [x22, x27]\n"
+    "ldr q20, [x21, x27]\n"
+    "ldr q25, [x22, x26]\n"
+    "ldr q24, [x21, x26]\n"
     "beq 3f\n"
     "2:"  // 4-vectors of channels: 4 inputs loop
-    "smax v23.16b, v2.16b, v1.16b\n"
-    "smax v19.16b, v0.16b, v31.16b\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
-    "smax v22.16b, v30.16b, v22.16b\n"
-    "smax v18.16b, v29.16b, v28.16b\n"
-    "subs x24, x24, #0x1\n"
-    "add x19, x19, #0x20\n"
-    "smax v21.16b, v27.16b, v21.16b\n"
-    "smax v17.16b, v26.16b, v17.16b\n"
-    "ldr q2, [x23, x28]\n"
-    "ldr q1, [x22, x28]\n"
-    "smax v20.16b, v25.16b, v20.16b\n"
-    "smax v16.16b, v24.16b, v16.16b\n"
-    "ldr q0, [x21, x28]\n"
-    "ldr q31, [x20, x28]\n"
+    "smax v23.16b, v4.16b, v3.16b\n"
+    "smax v19.16b, v28.16b, v22.16b\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "ldr q4, [x24, x9]\n"
+    "ldr q3, [x23, x9]\n"
+    "smax v22.16b, v2.16b, v1.16b\n"
+    "ldr q2, [x24, x28]\n"
+    "smax v18.16b, v27.16b, v21.16b\n"
+    "ldr q1, [x23, x28]\n"
+    "smax v21.16b, v0.16b, v31.16b\n"
+    "ldr q0, [x24, x27]\n"
+    "smax v17.16b, v26.16b, v20.16b\n"
+    "ldr q31, [x23, x27]\n"
+    "smax v20.16b, v30.16b, v29.16b\n"
+    "ldr q30, [x24, x26]\n"
+    "smax v16.16b, v25.16b, v24.16b\n"
+    "ldr q29, [x23, x26]\n"
     "smax v19.16b, v23.16b, v19.16b\n"
     "smax v18.16b, v22.16b, v18.16b\n"
-    "ldr q30, [x23, x27]\n"
-    "ldr q22, [x22, x27]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "ldr q28, [x22, x9]\n"
+    "ldr q22, [x21, x9]\n"
     "smax v17.16b, v21.16b, v17.16b\n"
     "smax v16.16b, v20.16b, v16.16b\n"
-    "ldr q29, [x21, x27]\n"
-    "ldr q28, [x20, x27]\n"
-    "smax v4.16b, v4.16b, v19.16b\n"
-    "smax v3.16b, v3.16b, v18.16b\n"
-    "ldr q27, [x23, x26]\n"
-    "ldr q21, [x22, x26]\n"
+    "ldr q27, [x22, x28]\n"
+    "ldr q21, [x21, x28]\n"
+    "subs x25, x25, #0x1\n"
+    "smax v8.16b, v8.16b, v19.16b\n"
+    "ldr q26, [x22, x27]\n"
+    "ldr q20, [x21, x27]\n"
+    "smax v7.16b, v7.16b, v18.16b\n"
     "smax v6.16b, v6.16b, v17.16b\n"
+    "ldr q25, [x22, x26]\n"
+    "ldr q24, [x21, x26]\n"
     "smax v5.16b, v5.16b, v16.16b\n"
-    "ldr q26, [x21, x26]\n"
-    "ldr q17, [x20, x26]\n"
-    "ldr q25, [x23, x25]\n"
-    "ldr q20, [x22, x25]\n"
-    "ldr q24, [x21, x25]\n"
-    "ldr q16, [x20, x25]\n"
+    "add x20, x20, #0x20\n"
     "bgt 2b\n"
     "3:"  // 4-vectors of channels: 4 inputs tail
-    "smax v23.16b, v2.16b, v1.16b\n"
-    "smax v19.16b, v0.16b, v31.16b\n"
-    "smax v22.16b, v30.16b, v22.16b\n"
-    "smax v18.16b, v29.16b, v28.16b\n"
-    "smax v21.16b, v27.16b, v21.16b\n"
-    "smax v17.16b, v26.16b, v17.16b\n"
-    "smax v20.16b, v25.16b, v20.16b\n"
-    "smax v16.16b, v24.16b, v16.16b\n"
+    "smax v23.16b, v4.16b, v3.16b\n"
+    "smax v19.16b, v28.16b, v22.16b\n"
+    "smax v22.16b, v2.16b, v1.16b\n"
+    "smax v18.16b, v27.16b, v21.16b\n"
+    "smax v21.16b, v0.16b, v31.16b\n"
+    "smax v17.16b, v26.16b, v20.16b\n"
+    "smax v20.16b, v30.16b, v29.16b\n"
+    "smax v16.16b, v25.16b, v24.16b\n"
     "smax v19.16b, v23.16b, v19.16b\n"
     "smax v18.16b, v22.16b, v18.16b\n"
     "smax v17.16b, v21.16b, v17.16b\n"
     "smax v16.16b, v20.16b, v16.16b\n"
-    "smax v4.16b, v4.16b, v19.16b\n"
-    "smax v3.16b, v3.16b, v18.16b\n"
+    "smax v8.16b, v8.16b, v19.16b\n"
+    "smax v7.16b, v7.16b, v18.16b\n"
     "smax v6.16b, v6.16b, v17.16b\n"
     "smax v5.16b, v5.16b, v16.16b\n"
     "4:"  // 4-vectors of channels: After loop
-    "ands x20, %x[n_valid_cells], #0x3\n"
+    "ands x21, %x[n_valid_cells], #0x3\n"
     "beq 6f\n"
     "5:"  // 4-vectors of channels: Single input loop
-    "ldr x23, [x19], #0x8\n"
-    "ldr q2, [x23, x28]\n"
-    "subs x20, x20, #0x1\n"
-    "smax v4.16b, v4.16b, v2.16b\n"
-    "ldr q30, [x23, x27]\n"
-    "ldr q27, [x23, x26]\n"
-    "smax v3.16b, v3.16b, v30.16b\n"
-    "smax v6.16b, v6.16b, v27.16b\n"
-    "ldr q25, [x23, x25]\n"
-    "smax v5.16b, v5.16b, v25.16b\n"
+    "ldr x24, [x20], #0x8\n"
+    "ldr q4, [x24, x9]\n"
+    "subs x21, x21, #0x1\n"
+    "smax v8.16b, v8.16b, v4.16b\n"
+    "ldr q2, [x24, x28]\n"
+    "ldr q0, [x24, x27]\n"
+    "smax v7.16b, v7.16b, v2.16b\n"
+    "smax v6.16b, v6.16b, v0.16b\n"
+    "ldr q30, [x24, x26]\n"
+    "smax v5.16b, v5.16b, v30.16b\n"
     "bgt 5b\n"
     "6:"  // 4-vectors of channels: Single input loop: End
-    "sxtl v23.8h, v4.8b\n"
-    "sxtl2 v22.8h, v4.16b\n"
-    "add x19, %x[quant_params], %[offsetof_qp_per_layer_left_shift]\n"
-    "ld1r { v4.4s }, [x19]\n"
-    "sxtl v21.8h, v3.8b\n"
-    "sxtl2 v18.8h, v3.16b\n"
-    "add x19, %x[quant_params], %[offsetof_qp_per_layer_mul]\n"
-    "ld1r { v3.4s }, [x19]\n"
+    "sxtl v23.8h, v8.8b\n"
+    "sxtl2 v22.8h, v8.16b\n"
+    "add x20, %x[quant_params], %[offsetof_qp_per_layer_left_shift]\n"
+    "ld1r { v4.4s }, [x20]\n"
+    "sxtl v21.8h, v7.8b\n"
+    "sxtl2 v18.8h, v7.16b\n"
+    "add x20, %x[quant_params], %[offsetof_qp_per_layer_mul]\n"
+    "ld1r { v3.4s }, [x20]\n"
     "sxtl v20.8h, v6.8b\n"
     "sxtl2 v19.8h, v6.16b\n"
-    "add x19, %x[quant_params], %[offsetof_qp_per_layer_right_shift]\n"
-    "ld1r { v2.4s }, [x19]\n"
+    "add x20, %x[quant_params], %[offsetof_qp_per_layer_right_shift]\n"
+    "ld1r { v2.4s }, [x20]\n"
     "sxtl v17.8h, v5.8b\n"
     "sxtl2 v16.8h, v5.16b\n"
     "sub %x[n_channels], %x[n_channels], #0x40\n"
@@ -271,76 +271,76 @@ void a64_s8q_nhwc_max_generic_depthfirst_impl(
     "uzp1 v19.16b, v24.16b, v19.16b\n"
     "uzp1 v16.16b, v23.16b, v16.16b\n"
     "uzp1 v18.16b, v22.16b, v18.16b\n"
-    "str q16, [%x[outptr], x28]\n"
-    "add x28, x28, #0x40\n"
+    "str q16, [%x[outptr], x9]\n"
+    "add x9, x9, #0x40\n"
     "uzp1 v17.16b, v21.16b, v17.16b\n"
     "uzp1 v16.16b, v20.16b, v19.16b\n"
-    "str q18, [%x[outptr], x27]\n"
+    "str q18, [%x[outptr], x28]\n"
+    "add x28, x28, #0x40\n"
+    "str q17, [%x[outptr], x27]\n"
     "add x27, x27, #0x40\n"
-    "str q17, [%x[outptr], x26]\n"
+    "str q16, [%x[outptr], x26]\n"
     "add x26, x26, #0x40\n"
-    "str q16, [%x[outptr], x25]\n"
-    "add x25, x25, #0x40\n"
     "bge 1b\n"
     "cbz %x[n_channels], 43f\n"
     "7:"  // Single vector of channels
     "cmp %x[n_channels], #0x10\n"
     "blt 14f\n"
     "8:"  // Single vector of channels: Loop
-    "lsr x24, %x[n_valid_cells], #0x2\n"
-    "movi v4.16b, #0x80\n"
-    "mov x19, %x[inptrs]\n"
-    "cbz x24, 11f\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
-    "subs x24, x24, #0x1\n"
-    "add x19, x19, #0x20\n"
-    "ldr q2, [x23, x28]\n"
-    "ldr q1, [x22, x28]\n"
-    "ldr q0, [x21, x28]\n"
-    "ldr q31, [x20, x28]\n"
+    "lsr x25, %x[n_valid_cells], #0x2\n"
+    "movi v8.16b, #0x80\n"
+    "mov x20, %x[inptrs]\n"
+    "cbz x25, 11f\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "ldr q4, [x24, x9]\n"
+    "subs x25, x25, #0x1\n"
+    "ldr q3, [x23, x9]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "add x20, x20, #0x20\n"
+    "ldr q28, [x22, x9]\n"
+    "ldr q22, [x21, x9]\n"
     "beq 10f\n"
     "9:"  // Single vector of channels: Loop: 4 inputs loop
-    "smax v23.16b, v2.16b, v1.16b\n"
-    "smax v19.16b, v0.16b, v31.16b\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
+    "smax v23.16b, v4.16b, v3.16b\n"
+    "smax v19.16b, v28.16b, v22.16b\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "ldr q4, [x24, x9]\n"
+    "ldr q3, [x23, x9]\n"
     "smax v19.16b, v23.16b, v19.16b\n"
-    "subs x24, x24, #0x1\n"
-    "smax v4.16b, v4.16b, v19.16b\n"
-    "add x19, x19, #0x20\n"
-    "ldr q2, [x23, x28]\n"
-    "ldr q1, [x22, x28]\n"
-    "ldr q0, [x21, x28]\n"
-    "ldr q31, [x20, x28]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "subs x25, x25, #0x1\n"
+    "ldr q28, [x22, x9]\n"
+    "ldr q22, [x21, x9]\n"
+    "smax v8.16b, v8.16b, v19.16b\n"
+    "add x20, x20, #0x20\n"
     "bgt 9b\n"
     "10:"  // Single vector of channels: Loop: 4 inputs tail
-    "smax v23.16b, v2.16b, v1.16b\n"
-    "smax v19.16b, v0.16b, v31.16b\n"
+    "smax v23.16b, v4.16b, v3.16b\n"
+    "smax v19.16b, v28.16b, v22.16b\n"
     "smax v19.16b, v23.16b, v19.16b\n"
-    "smax v4.16b, v4.16b, v19.16b\n"
+    "smax v8.16b, v8.16b, v19.16b\n"
     "11:"  // Single vector of channels: Loop: After loop
-    "ands x20, %x[n_valid_cells], #0x3\n"
+    "ands x21, %x[n_valid_cells], #0x3\n"
     "beq 13f\n"
     "12:"  // Single vector of channels: Loop: Single input loop
-    "ldr x23, [x19], #0x8\n"
-    "ldr q2, [x23, x28]\n"
-    "subs x20, x20, #0x1\n"
-    "smax v4.16b, v4.16b, v2.16b\n"
+    "ldr x24, [x20], #0x8\n"
+    "ldr q4, [x24, x9]\n"
+    "subs x21, x21, #0x1\n"
+    "smax v8.16b, v8.16b, v4.16b\n"
     "bgt 12b\n"
     "13:"  // Single vector of channels: Loop: Single input loop: End
-    "sxtl v23.8h, v4.8b\n"
-    "sxtl2 v22.8h, v4.16b\n"
-    "add x19, %x[quant_params], %[offsetof_qp_per_layer_left_shift]\n"
-    "ld1r { v4.4s }, [x19]\n"
+    "sxtl v23.8h, v8.8b\n"
+    "sxtl2 v22.8h, v8.16b\n"
+    "add x20, %x[quant_params], %[offsetof_qp_per_layer_left_shift]\n"
+    "ld1r { v4.4s }, [x20]\n"
     "sxtl v1.4s, v23.4h\n"
     "sxtl2 v23.4s, v23.8h\n"
-    "add x19, %x[quant_params], %[offsetof_qp_per_layer_mul]\n"
-    "ld1r { v3.4s }, [x19]\n"
+    "add x20, %x[quant_params], %[offsetof_qp_per_layer_mul]\n"
+    "ld1r { v3.4s }, [x20]\n"
     "sxtl v0.4s, v22.4h\n"
     "sxtl2 v31.4s, v22.8h\n"
-    "add x19, %x[quant_params], %[offsetof_qp_per_layer_right_shift]\n"
-    "ld1r { v2.4s }, [x19]\n"
+    "add x20, %x[quant_params], %[offsetof_qp_per_layer_right_shift]\n"
+    "ld1r { v2.4s }, [x20]\n"
     "srshl v1.4s, v1.4s, v4.4s\n"
     "srshl v23.4s, v23.4s, v4.4s\n"
     "sub %x[n_channels], %x[n_channels], #0x10\n"
@@ -368,192 +368,192 @@ void a64_s8q_nhwc_max_generic_depthfirst_impl(
     "uzp1 v23.16b, v1.16b, v23.16b\n"
     "uzp1 v16.16b, v0.16b, v31.16b\n"
     "uzp1 v16.16b, v23.16b, v16.16b\n"
-    "str q16, [%x[outptr], x28]\n"
-    "add x28, x28, #0x10\n"
+    "str q16, [%x[outptr], x9]\n"
+    "add x9, x9, #0x10\n"
     "bge 8b\n"
     "cbz %x[n_channels], 43f\n"
     "14:"  // Oddments
-    "lsr x24, %x[n_valid_cells], #0x2\n"
-    "add %x[outptr], %x[outptr], x28\n"
-    "movi v4.16b, #0x80\n"
-    "mov x19, %x[inptrs]\n"
-    "cbz x24, 24f\n"
+    "lsr x25, %x[n_valid_cells], #0x2\n"
+    "add %x[outptr], %x[outptr], x9\n"
+    "movi v8.16b, #0x80\n"
+    "mov x20, %x[inptrs]\n"
+    "cbz x25, 24f\n"
     "15:"  // Oddments: 4 inputs loop
-    "ldp x23, x22, [x19, #0x0]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
-    "add x19, x19, #0x20\n"
-    "add x23, x23, x28\n"
-    "add x22, x22, x28\n"
-    "add x21, x21, x28\n"
-    "movi v2.16b, #0x0\n"
-    "movi v1.16b, #0x0\n"
-    "add x20, x20, x28\n"
-    "movi v0.16b, #0x0\n"
-    "movi v31.16b, #0x0\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "add x20, x20, #0x20\n"
+    "add x24, x24, x9\n"
+    "add x23, x23, x9\n"
+    "add x22, x22, x9\n"
+    "movi v4.16b, #0x0\n"
+    "movi v3.16b, #0x0\n"
+    "add x21, x21, x9\n"
+    "movi v28.16b, #0x0\n"
+    "movi v22.16b, #0x0\n"
     "tbz %x[n_channels], #3, 19f\n"
-    "ldr d2, [x23], #0x8\n"
-    "ldr d1, [x22], #0x8\n"
-    "ldr d0, [x21], #0x8\n"
-    "ldr d31, [x20], #0x8\n"
+    "ldr d4, [x24], #0x8\n"
+    "ldr d3, [x23], #0x8\n"
+    "ldr d28, [x22], #0x8\n"
+    "ldr d22, [x21], #0x8\n"
     "tbz %x[n_channels], #2, 17f\n"
-    "ld1 { v2.s }[2], [x23], #0x4\n"
-    "ld1 { v1.s }[2], [x22], #0x4\n"
-    "ld1 { v0.s }[2], [x21], #0x4\n"
-    "ld1 { v31.s }[2], [x20], #0x4\n"
+    "ld1 { v4.s }[2], [x24], #0x4\n"
+    "ld1 { v3.s }[2], [x23], #0x4\n"
+    "ld1 { v28.s }[2], [x22], #0x4\n"
+    "ld1 { v22.s }[2], [x21], #0x4\n"
     "tbz %x[n_channels], #1, 16f\n"
-    "ld1 { v2.h }[6], [x23], #0x2\n"
-    "ld1 { v1.h }[6], [x22], #0x2\n"
-    "ld1 { v0.h }[6], [x21], #0x2\n"
-    "ld1 { v31.h }[6], [x20], #0x2\n"
+    "ld1 { v4.h }[6], [x24], #0x2\n"
+    "ld1 { v3.h }[6], [x23], #0x2\n"
+    "ld1 { v28.h }[6], [x22], #0x2\n"
+    "ld1 { v22.h }[6], [x21], #0x2\n"
     "tbz %x[n_channels], #0, 23f\n"
-    "ld1 { v2.b }[14], [x23], #0x1\n"
-    "ld1 { v1.b }[14], [x22], #0x1\n"
-    "ld1 { v0.b }[14], [x21], #0x1\n"
-    "ld1 { v31.b }[14], [x20], #0x1\n"
+    "ld1 { v4.b }[14], [x24], #0x1\n"
+    "ld1 { v3.b }[14], [x23], #0x1\n"
+    "ld1 { v28.b }[14], [x22], #0x1\n"
+    "ld1 { v22.b }[14], [x21], #0x1\n"
     "b 23f\n"
     "16:"  // Oddments: 4 inputs loop: Load: Bit 3: Bit 2: Bit 1: Unset
     "tbz %x[n_channels], #0, 23f\n"
-    "ld1 { v2.b }[12], [x23], #0x1\n"
-    "ld1 { v1.b }[12], [x22], #0x1\n"
-    "ld1 { v0.b }[12], [x21], #0x1\n"
-    "ld1 { v31.b }[12], [x20], #0x1\n"
+    "ld1 { v4.b }[12], [x24], #0x1\n"
+    "ld1 { v3.b }[12], [x23], #0x1\n"
+    "ld1 { v28.b }[12], [x22], #0x1\n"
+    "ld1 { v22.b }[12], [x21], #0x1\n"
     "b 23f\n"
     "17:"  // Oddments: 4 inputs loop: Load: Bit 3: Bit 2: Unset
     "tbz %x[n_channels], #1, 18f\n"
-    "ld1 { v2.h }[4], [x23], #0x2\n"
-    "ld1 { v1.h }[4], [x22], #0x2\n"
-    "ld1 { v0.h }[4], [x21], #0x2\n"
-    "ld1 { v31.h }[4], [x20], #0x2\n"
+    "ld1 { v4.h }[4], [x24], #0x2\n"
+    "ld1 { v3.h }[4], [x23], #0x2\n"
+    "ld1 { v28.h }[4], [x22], #0x2\n"
+    "ld1 { v22.h }[4], [x21], #0x2\n"
     "tbz %x[n_channels], #0, 23f\n"
-    "ld1 { v2.b }[10], [x23], #0x1\n"
-    "ld1 { v1.b }[10], [x22], #0x1\n"
-    "ld1 { v0.b }[10], [x21], #0x1\n"
-    "ld1 { v31.b }[10], [x20], #0x1\n"
+    "ld1 { v4.b }[10], [x24], #0x1\n"
+    "ld1 { v3.b }[10], [x23], #0x1\n"
+    "ld1 { v28.b }[10], [x22], #0x1\n"
+    "ld1 { v22.b }[10], [x21], #0x1\n"
     "b 23f\n"
     "18:"  // Oddments: 4 inputs loop: Load: Bit 3: Bit 2: Unset: Bit 1: Unset
     "tbz %x[n_channels], #0, 23f\n"
-    "ld1 { v2.b }[8], [x23], #0x1\n"
-    "ld1 { v1.b }[8], [x22], #0x1\n"
-    "ld1 { v0.b }[8], [x21], #0x1\n"
-    "ld1 { v31.b }[8], [x20], #0x1\n"
+    "ld1 { v4.b }[8], [x24], #0x1\n"
+    "ld1 { v3.b }[8], [x23], #0x1\n"
+    "ld1 { v28.b }[8], [x22], #0x1\n"
+    "ld1 { v22.b }[8], [x21], #0x1\n"
     "b 23f\n"
     "19:"  // Oddments: 4 inputs loop: Load: Bit 3: Unset
     "tbz %x[n_channels], #2, 21f\n"
-    "ldr s2, [x23], #0x4\n"
-    "ldr s1, [x22], #0x4\n"
-    "ldr s0, [x21], #0x4\n"
-    "ldr s31, [x20], #0x4\n"
+    "ldr s4, [x24], #0x4\n"
+    "ldr s3, [x23], #0x4\n"
+    "ldr s28, [x22], #0x4\n"
+    "ldr s22, [x21], #0x4\n"
     "tbz %x[n_channels], #1, 20f\n"
-    "ld1 { v2.h }[2], [x23], #0x2\n"
-    "ld1 { v1.h }[2], [x22], #0x2\n"
-    "ld1 { v0.h }[2], [x21], #0x2\n"
-    "ld1 { v31.h }[2], [x20], #0x2\n"
+    "ld1 { v4.h }[2], [x24], #0x2\n"
+    "ld1 { v3.h }[2], [x23], #0x2\n"
+    "ld1 { v28.h }[2], [x22], #0x2\n"
+    "ld1 { v22.h }[2], [x21], #0x2\n"
     "tbz %x[n_channels], #0, 23f\n"
-    "ld1 { v2.b }[6], [x23], #0x1\n"
-    "ld1 { v1.b }[6], [x22], #0x1\n"
-    "ld1 { v0.b }[6], [x21], #0x1\n"
-    "ld1 { v31.b }[6], [x20], #0x1\n"
+    "ld1 { v4.b }[6], [x24], #0x1\n"
+    "ld1 { v3.b }[6], [x23], #0x1\n"
+    "ld1 { v28.b }[6], [x22], #0x1\n"
+    "ld1 { v22.b }[6], [x21], #0x1\n"
     "b 23f\n"
     "20:"  // Oddments: 4 inputs loop: Load: Bit 3: Unset: Bit 2: Bit 1: Unset
     "tbz %x[n_channels], #0, 23f\n"
-    "ld1 { v2.b }[4], [x23], #0x1\n"
-    "ld1 { v1.b }[4], [x22], #0x1\n"
-    "ld1 { v0.b }[4], [x21], #0x1\n"
-    "ld1 { v31.b }[4], [x20], #0x1\n"
+    "ld1 { v4.b }[4], [x24], #0x1\n"
+    "ld1 { v3.b }[4], [x23], #0x1\n"
+    "ld1 { v28.b }[4], [x22], #0x1\n"
+    "ld1 { v22.b }[4], [x21], #0x1\n"
     "b 23f\n"
     "21:"  // Oddments: 4 inputs loop: Load: Bit 3: Unset: Bit 2: Unset
     "tbz %x[n_channels], #1, 22f\n"
-    "ldr h2, [x23], #0x2\n"
-    "ldr h1, [x22], #0x2\n"
-    "ldr h0, [x21], #0x2\n"
-    "ldr h31, [x20], #0x2\n"
+    "ldr h4, [x24], #0x2\n"
+    "ldr h3, [x23], #0x2\n"
+    "ldr h28, [x22], #0x2\n"
+    "ldr h22, [x21], #0x2\n"
     "tbz %x[n_channels], #0, 23f\n"
-    "ld1 { v2.b }[2], [x23], #0x1\n"
-    "ld1 { v1.b }[2], [x22], #0x1\n"
-    "ld1 { v0.b }[2], [x21], #0x1\n"
-    "ld1 { v31.b }[2], [x20], #0x1\n"
+    "ld1 { v4.b }[2], [x24], #0x1\n"
+    "ld1 { v3.b }[2], [x23], #0x1\n"
+    "ld1 { v28.b }[2], [x22], #0x1\n"
+    "ld1 { v22.b }[2], [x21], #0x1\n"
     "b 23f\n"
     "22:"  // Oddments: 4 inputs loop: Load: Bit 3: Unset: Bit 2: Unset: Bit 1: Unset
     "tbz %x[n_channels], #0, 23f\n"
-    "ldr b2, [x23], #0x1\n"
-    "ldr b1, [x22], #0x1\n"
-    "ldr b0, [x21], #0x1\n"
-    "ldr b31, [x20], #0x1\n"
+    "ldr b4, [x24], #0x1\n"
+    "ldr b3, [x23], #0x1\n"
+    "ldr b28, [x22], #0x1\n"
+    "ldr b22, [x21], #0x1\n"
     "23:"  // Oddments: 4 inputs loop: Load: Bit 3: End
-    "smax v23.16b, v2.16b, v1.16b\n"
-    "smax v19.16b, v0.16b, v31.16b\n"
-    "subs x24, x24, #0x1\n"
+    "smax v23.16b, v4.16b, v3.16b\n"
+    "smax v19.16b, v28.16b, v22.16b\n"
+    "subs x25, x25, #0x1\n"
     "smax v19.16b, v23.16b, v19.16b\n"
-    "smax v4.16b, v4.16b, v19.16b\n"
+    "smax v8.16b, v8.16b, v19.16b\n"
     "bgt 15b\n"
     "24:"  // Oddments: After loop
-    "ands x20, %x[n_valid_cells], #0x3\n"
+    "ands x21, %x[n_valid_cells], #0x3\n"
     "beq 34f\n"
     "25:"  // Oddments: Single input loop
-    "ldr x23, [x19], #0x8\n"
-    "add x23, x23, x28\n"
-    "movi v2.16b, #0x0\n"
+    "ldr x24, [x20], #0x8\n"
+    "add x24, x24, x9\n"
+    "movi v4.16b, #0x0\n"
     "tbz %x[n_channels], #3, 29f\n"
-    "ldr d2, [x23], #0x8\n"
+    "ldr d4, [x24], #0x8\n"
     "tbz %x[n_channels], #2, 27f\n"
-    "ld1 { v2.s }[2], [x23], #0x4\n"
+    "ld1 { v4.s }[2], [x24], #0x4\n"
     "tbz %x[n_channels], #1, 26f\n"
-    "ld1 { v2.h }[6], [x23], #0x2\n"
+    "ld1 { v4.h }[6], [x24], #0x2\n"
     "tbz %x[n_channels], #0, 33f\n"
-    "ld1 { v2.b }[14], [x23], #0x1\n"
+    "ld1 { v4.b }[14], [x24], #0x1\n"
     "b 33f\n"
     "26:"  // Oddments: Single input loop: Load: Bit 3: Bit 2: Bit 1: Unset
     "tbz %x[n_channels], #0, 33f\n"
-    "ld1 { v2.b }[12], [x23], #0x1\n"
+    "ld1 { v4.b }[12], [x24], #0x1\n"
     "b 33f\n"
     "27:"  // Oddments: Single input loop: Load: Bit 3: Bit 2: Unset
     "tbz %x[n_channels], #1, 28f\n"
-    "ld1 { v2.h }[4], [x23], #0x2\n"
+    "ld1 { v4.h }[4], [x24], #0x2\n"
     "tbz %x[n_channels], #0, 33f\n"
-    "ld1 { v2.b }[10], [x23], #0x1\n"
+    "ld1 { v4.b }[10], [x24], #0x1\n"
     "b 33f\n"
     "28:"  // Oddments: Single input loop: Load: Bit 3: Bit 2: Unset: Bit 1: Unset
     "tbz %x[n_channels], #0, 33f\n"
-    "ld1 { v2.b }[8], [x23], #0x1\n"
+    "ld1 { v4.b }[8], [x24], #0x1\n"
     "b 33f\n"
     "29:"  // Oddments: Single input loop: Load: Bit 3: Unset
     "tbz %x[n_channels], #2, 31f\n"
-    "ldr s2, [x23], #0x4\n"
+    "ldr s4, [x24], #0x4\n"
     "tbz %x[n_channels], #1, 30f\n"
-    "ld1 { v2.h }[2], [x23], #0x2\n"
+    "ld1 { v4.h }[2], [x24], #0x2\n"
     "tbz %x[n_channels], #0, 33f\n"
-    "ld1 { v2.b }[6], [x23], #0x1\n"
+    "ld1 { v4.b }[6], [x24], #0x1\n"
     "b 33f\n"
     "30:"  // Oddments: Single input loop: Load: Bit 3: Unset: Bit 2: Bit 1: Unset
     "tbz %x[n_channels], #0, 33f\n"
-    "ld1 { v2.b }[4], [x23], #0x1\n"
+    "ld1 { v4.b }[4], [x24], #0x1\n"
     "b 33f\n"
     "31:"  // Oddments: Single input loop: Load: Bit 3: Unset: Bit 2: Unset
     "tbz %x[n_channels], #1, 32f\n"
-    "ldr h2, [x23], #0x2\n"
+    "ldr h4, [x24], #0x2\n"
     "tbz %x[n_channels], #0, 33f\n"
-    "ld1 { v2.b }[2], [x23], #0x1\n"
+    "ld1 { v4.b }[2], [x24], #0x1\n"
     "b 33f\n"
     "32:"  // Oddments: Single input loop: Load: Bit 3: Unset: Bit 2: Unset: Bit 1: Unset
     "tbz %x[n_channels], #0, 33f\n"
-    "ldr b2, [x23], #0x1\n"
+    "ldr b4, [x24], #0x1\n"
     "33:"  // Oddments: Single input loop: Load: Bit 3: End
-    "subs x20, x20, #0x1\n"
-    "smax v4.16b, v4.16b, v2.16b\n"
+    "subs x21, x21, #0x1\n"
+    "smax v8.16b, v8.16b, v4.16b\n"
     "bgt 25b\n"
     "34:"  // Oddments: Single input loop: End
-    "sxtl v23.8h, v4.8b\n"
-    "sxtl2 v22.8h, v4.16b\n"
-    "add x19, %x[quant_params], %[offsetof_qp_per_layer_left_shift]\n"
-    "ld1r { v4.4s }, [x19]\n"
+    "sxtl v23.8h, v8.8b\n"
+    "sxtl2 v22.8h, v8.16b\n"
+    "add x20, %x[quant_params], %[offsetof_qp_per_layer_left_shift]\n"
+    "ld1r { v4.4s }, [x20]\n"
     "sxtl v1.4s, v23.4h\n"
     "sxtl2 v23.4s, v23.8h\n"
-    "add x19, %x[quant_params], %[offsetof_qp_per_layer_mul]\n"
-    "ld1r { v3.4s }, [x19]\n"
+    "add x20, %x[quant_params], %[offsetof_qp_per_layer_mul]\n"
+    "ld1r { v3.4s }, [x20]\n"
     "sxtl v0.4s, v22.4h\n"
     "sxtl2 v31.4s, v22.8h\n"
-    "add x19, %x[quant_params], %[offsetof_qp_per_layer_right_shift]\n"
-    "ld1r { v2.4s }, [x19]\n"
+    "add x20, %x[quant_params], %[offsetof_qp_per_layer_right_shift]\n"
+    "ld1r { v2.4s }, [x20]\n"
     "srshl v1.4s, v1.4s, v4.4s\n"
     "srshl v23.4s, v23.4s, v4.4s\n"
     "srshl v0.4s, v0.4s, v4.4s\n"
@@ -627,7 +627,7 @@ void a64_s8q_nhwc_max_generic_depthfirst_impl(
     "43:"  // End
     : [n_channels] "+&r" (n_channels), [outptr] "+&r" (outptr)
     : [inptrs] "r" (inptrs), [n_valid_cells] "r" (n_valid_cells), [offsetof_qp_per_layer_left_shift] "I" (offsetof(Requantize32, per_layer_left_shift)), [offsetof_qp_per_layer_mul] "I" (offsetof(Requantize32, per_layer_mul)), [offsetof_qp_per_layer_right_shift] "I" (offsetof(Requantize32, per_layer_right_shift)), [quant_params] "r" (&qp)
-    : "cc", "memory", "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28"
+    : "cc", "memory", "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x9", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28"
   );
 }
 
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_u8_nhwc_avg_generic_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_u8_nhwc_avg_generic_depthfirst/generic.cpp
index c9fdf76f33..76828a911e 100644
--- a/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_u8_nhwc_avg_generic_depthfirst/generic.cpp
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_u8_nhwc_avg_generic_depthfirst/generic.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2021-2022 Arm Limited.
+ * Copyright (c) 2021-2023 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -96,16 +96,16 @@ void a64_u8_nhwc_avg_generic_depthfirst_impl(
 
   __asm__ __volatile__(
     "cmp %x[n_channels], #0x40\n"
-    "mov x26, #0x0\n"
-    "mov x25, #0x10\n"  // cntb _, ALL, #1
-    "mov x24, #0x20\n"  // cntb _, ALL, #2
-    "mov x23, #0x30\n"  // cntb _, ALL, #3
+    "mov x27, #0x0\n"
+    "mov x26, #0x10\n"  // cntb _, ALL, #1
+    "mov x25, #0x20\n"  // cntb _, ALL, #2
+    "mov x24, #0x30\n"  // cntb _, ALL, #3
     "blt 7f\n"
     "1:"  // 4-vectors of channels
-    "lsr x22, %x[n_valid_cells], #0x1\n"
+    "lsr x23, %x[n_valid_cells], #0x1\n"
     "movi v15.4s, #0x0\n"
     "movi v14.4s, #0x0\n"
-    "mov x19, %x[inptrs]\n"
+    "mov x20, %x[inptrs]\n"
     "movi v13.4s, #0x0\n"
     "movi v12.4s, #0x0\n"
     "movi v11.4s, #0x0\n"
@@ -120,43 +120,43 @@ void a64_u8_nhwc_avg_generic_depthfirst_impl(
     "movi v2.4s, #0x0\n"
     "movi v1.4s, #0x0\n"
     "movi v0.4s, #0x0\n"
-    "cbz x22, 4f\n"
-    "ldp x21, x20, [x19, #0x0]\n"
-    "subs x22, x22, #0x1\n"
-    "add x19, x19, #0x10\n"
-    "ldr q31, [x21, x26]\n"
-    "ldr q30, [x20, x26]\n"
-    "ldr q29, [x21, x25]\n"
-    "ldr q28, [x20, x25]\n"
-    "ldr q27, [x21, x24]\n"
-    "ldr q26, [x20, x24]\n"
-    "ldr q25, [x21, x23]\n"
-    "ldr q24, [x20, x23]\n"
+    "cbz x23, 4f\n"
+    "ldp x22, x21, [x20, #0x0]\n"
+    "ldr q31, [x22, x27]\n"
+    "subs x23, x23, #0x1\n"
+    "add x20, x20, #0x10\n"
+    "ldr q30, [x21, x27]\n"
+    "ldr q29, [x22, x26]\n"
+    "ldr q28, [x21, x26]\n"
+    "ldr q27, [x22, x25]\n"
+    "ldr q26, [x21, x25]\n"
+    "ldr q25, [x22, x24]\n"
+    "ldr q24, [x21, x24]\n"
     "beq 3f\n"
     "2:"  // 4-vectors of channels: 2 inputs loop
     "uaddl v23.8h, v31.8b, v30.8b\n"
     "uaddl2 v22.8h, v31.16b, v30.16b\n"
-    "ldp x21, x20, [x19, #0x0]\n"
-    "subs x22, x22, #0x1\n"
+    "ldp x22, x21, [x20, #0x0]\n"
+    "ldr q31, [x22, x27]\n"
+    "ldr q30, [x21, x27]\n"
     "uaddl v21.8h, v29.8b, v28.8b\n"
     "uaddl2 v20.8h, v29.16b, v28.16b\n"
-    "add x19, x19, #0x10\n"
-    "ldr q31, [x21, x26]\n"
+    "ldr q29, [x22, x26]\n"
+    "ldr q28, [x21, x26]\n"
     "uaddl v19.8h, v27.8b, v26.8b\n"
     "uaddl2 v18.8h, v27.16b, v26.16b\n"
-    "ldr q30, [x20, x26]\n"
-    "ldr q29, [x21, x25]\n"
-    "uaddl v17.8h, v25.8b, v24.8b\n"
-    "uaddl2 v16.8h, v25.16b, v24.16b\n"
-    "ldr q28, [x20, x25]\n"
-    "ldr q27, [x21, x24]\n"
+    "ldr q27, [x22, x25]\n"
+    "ldr q26, [x21, x25]\n"
+    "subs x23, x23, #0x1\n"
     "uaddw v15.4s, v15.4s, v23.4h\n"
     "uaddw2 v14.4s, v14.4s, v23.8h\n"
-    "ldr q26, [x20, x24]\n"
-    "ldr q25, [x21, x23]\n"
+    "uaddl v17.8h, v25.8b, v24.8b\n"
+    "uaddl2 v16.8h, v25.16b, v24.16b\n"
+    "ldr q25, [x22, x24]\n"
+    "add x20, x20, #0x10\n"
     "uaddw v13.4s, v13.4s, v22.4h\n"
     "uaddw2 v12.4s, v12.4s, v22.8h\n"
-    "ldr q24, [x20, x23]\n"
+    "ldr q24, [x21, x24]\n"
     "uaddw v11.4s, v11.4s, v21.4h\n"
     "uaddw2 v10.4s, v10.4s, v21.8h\n"
     "uaddw v9.4s, v9.4s, v20.4h\n"
@@ -196,21 +196,21 @@ void a64_u8_nhwc_avg_generic_depthfirst_impl(
     "uaddw v1.4s, v1.4s, v16.4h\n"
     "uaddw2 v0.4s, v0.4s, v16.8h\n"
     "4:"  // 4-vectors of channels: After loop
-    "ands x20, %x[n_valid_cells], #0x1\n"
+    "ands x21, %x[n_valid_cells], #0x1\n"
     "beq 6f\n"
     "5:"  // 4-vectors of channels: Single input loop
-    "ldr x21, [x19], #0x8\n"
-    "ldr q31, [x21, x26]\n"
+    "ldr x22, [x20], #0x8\n"
+    "ldr q31, [x22, x27]\n"
     "uxtl v23.8h, v31.8b\n"
     "uxtl2 v22.8h, v31.16b\n"
-    "ldr q29, [x21, x25]\n"
-    "ldr q27, [x21, x24]\n"
+    "ldr q29, [x22, x26]\n"
+    "ldr q27, [x22, x25]\n"
     "uxtl v21.8h, v29.8b\n"
     "uxtl2 v20.8h, v29.16b\n"
-    "ldr q25, [x21, x23]\n"
+    "ldr q25, [x22, x24]\n"
     "uxtl v19.8h, v27.8b\n"
     "uxtl2 v18.8h, v27.16b\n"
-    "subs x20, x20, #0x1\n"
+    "subs x21, x21, #0x1\n"
     "uxtl v17.8h, v25.8b\n"
     "uxtl2 v16.8h, v25.16b\n"
     "uaddw v15.4s, v15.4s, v23.4h\n"
@@ -311,47 +311,47 @@ void a64_u8_nhwc_avg_generic_depthfirst_impl(
     "uzp1 v19.16b, v1.16b, v0.16b\n"
     "uzp1 v16.16b, v23.16b, v16.16b\n"
     "uzp1 v18.16b, v22.16b, v18.16b\n"
-    "str q16, [%x[outptr], x26]\n"
-    "add x26, x26, #0x40\n"
+    "str q16, [%x[outptr], x27]\n"
+    "add x27, x27, #0x40\n"
     "uzp1 v17.16b, v21.16b, v17.16b\n"
     "uzp1 v16.16b, v20.16b, v19.16b\n"
-    "str q18, [%x[outptr], x25]\n"
+    "str q18, [%x[outptr], x26]\n"
+    "add x26, x26, #0x40\n"
+    "str q17, [%x[outptr], x25]\n"
     "add x25, x25, #0x40\n"
-    "str q17, [%x[outptr], x24]\n"
+    "str q16, [%x[outptr], x24]\n"
     "add x24, x24, #0x40\n"
-    "str q16, [%x[outptr], x23]\n"
-    "add x23, x23, #0x40\n"
     "bge 1b\n"
     "cbz %x[n_channels], 43f\n"
     "7:"  // Single vector of channels
     "cmp %x[n_channels], #0x10\n"
     "blt 14f\n"
     "8:"  // Single vector of channels: Loop
-    "lsr x22, %x[n_valid_cells], #0x1\n"
+    "lsr x23, %x[n_valid_cells], #0x1\n"
     "movi v15.4s, #0x0\n"
     "movi v14.4s, #0x0\n"
-    "mov x19, %x[inptrs]\n"
+    "mov x20, %x[inptrs]\n"
     "movi v13.4s, #0x0\n"
     "movi v12.4s, #0x0\n"
-    "cbz x22, 11f\n"
-    "ldp x21, x20, [x19, #0x0]\n"
-    "subs x22, x22, #0x1\n"
-    "add x19, x19, #0x10\n"
-    "ldr q31, [x21, x26]\n"
-    "ldr q30, [x20, x26]\n"
+    "cbz x23, 11f\n"
+    "ldp x22, x21, [x20, #0x0]\n"
+    "ldr q31, [x22, x27]\n"
+    "subs x23, x23, #0x1\n"
+    "add x20, x20, #0x10\n"
+    "ldr q30, [x21, x27]\n"
     "beq 10f\n"
     "9:"  // Single vector of channels: Loop: 2 inputs loop
     "uaddl v23.8h, v31.8b, v30.8b\n"
     "uaddl2 v22.8h, v31.16b, v30.16b\n"
-    "ldp x21, x20, [x19, #0x0]\n"
-    "subs x22, x22, #0x1\n"
+    "ldp x22, x21, [x20, #0x0]\n"
+    "ldr q31, [x22, x27]\n"
+    "ldr q30, [x21, x27]\n"
+    "subs x23, x23, #0x1\n"
     "uaddw v15.4s, v15.4s, v23.4h\n"
     "uaddw2 v14.4s, v14.4s, v23.8h\n"
-    "add x19, x19, #0x10\n"
-    "ldr q31, [x21, x26]\n"
     "uaddw v13.4s, v13.4s, v22.4h\n"
     "uaddw2 v12.4s, v12.4s, v22.8h\n"
-    "ldr q30, [x20, x26]\n"
+    "add x20, x20, #0x10\n"
     "bgt 9b\n"
     "10:"  // Single vector of channels: Loop: 2 inputs tail
     "uaddl v23.8h, v31.8b, v30.8b\n"
@@ -361,14 +361,14 @@ void a64_u8_nhwc_avg_generic_depthfirst_impl(
     "uaddw v13.4s, v13.4s, v22.4h\n"
     "uaddw2 v12.4s, v12.4s, v22.8h\n"
     "11:"  // Single vector of channels: Loop: After loop
-    "ands x20, %x[n_valid_cells], #0x1\n"
+    "ands x21, %x[n_valid_cells], #0x1\n"
     "beq 13f\n"
     "12:"  // Single vector of channels: Loop: Single input loop
-    "ldr x21, [x19], #0x8\n"
-    "ldr q31, [x21, x26]\n"
+    "ldr x22, [x20], #0x8\n"
+    "ldr q31, [x22, x27]\n"
     "uxtl v23.8h, v31.8b\n"
     "uxtl2 v22.8h, v31.16b\n"
-    "subs x20, x20, #0x1\n"
+    "subs x21, x21, #0x1\n"
     "uaddw v15.4s, v15.4s, v23.4h\n"
     "uaddw2 v14.4s, v14.4s, v23.8h\n"
     "uaddw v13.4s, v13.4s, v22.4h\n"
@@ -400,149 +400,149 @@ void a64_u8_nhwc_avg_generic_depthfirst_impl(
     "uzp1 v23.16b, v15.16b, v14.16b\n"
     "uzp1 v16.16b, v13.16b, v12.16b\n"
     "uzp1 v16.16b, v23.16b, v16.16b\n"
-    "str q16, [%x[outptr], x26]\n"
-    "add x26, x26, #0x10\n"
+    "str q16, [%x[outptr], x27]\n"
+    "add x27, x27, #0x10\n"
     "bge 8b\n"
     "cbz %x[n_channels], 43f\n"
     "14:"  // Oddments
-    "lsr x22, %x[n_valid_cells], #0x1\n"
-    "add %x[outptr], %x[outptr], x26\n"
+    "lsr x23, %x[n_valid_cells], #0x1\n"
+    "add %x[outptr], %x[outptr], x27\n"
     "movi v15.4s, #0x0\n"
     "movi v14.4s, #0x0\n"
     "movi v13.4s, #0x0\n"
     "movi v12.4s, #0x0\n"
-    "mov x19, %x[inptrs]\n"
-    "cbz x22, 24f\n"
+    "mov x20, %x[inptrs]\n"
+    "cbz x23, 24f\n"
     "15:"  // Oddments: 2 inputs loop
-    "ldp x21, x20, [x19, #0x0]\n"
-    "add x19, x19, #0x10\n"
-    "add x21, x21, x26\n"
+    "ldp x22, x21, [x20, #0x0]\n"
+    "add x20, x20, #0x10\n"
+    "add x22, x22, x27\n"
     "movi v31.16b, #0x0\n"
-    "add x20, x20, x26\n"
+    "add x21, x21, x27\n"
     "movi v30.16b, #0x0\n"
     "tbz %x[n_channels], #3, 19f\n"
-    "ldr d31, [x21], #0x8\n"
-    "ldr d30, [x20], #0x8\n"
+    "ldr d31, [x22], #0x8\n"
+    "ldr d30, [x21], #0x8\n"
     "tbz %x[n_channels], #2, 17f\n"
-    "ld1 { v31.s }[2], [x21], #0x4\n"
-    "ld1 { v30.s }[2], [x20], #0x4\n"
+    "ld1 { v31.s }[2], [x22], #0x4\n"
+    "ld1 { v30.s }[2], [x21], #0x4\n"
     "tbz %x[n_channels], #1, 16f\n"
-    "ld1 { v31.h }[6], [x21], #0x2\n"
-    "ld1 { v30.h }[6], [x20], #0x2\n"
+    "ld1 { v31.h }[6], [x22], #0x2\n"
+    "ld1 { v30.h }[6], [x21], #0x2\n"
     "tbz %x[n_channels], #0, 23f\n"
-    "ld1 { v31.b }[14], [x21], #0x1\n"
-    "ld1 { v30.b }[14], [x20], #0x1\n"
+    "ld1 { v31.b }[14], [x22], #0x1\n"
+    "ld1 { v30.b }[14], [x21], #0x1\n"
     "b 23f\n"
     "16:"  // Oddments: 2 inputs loop: Load: Bit 3: Bit 2: Bit 1: Unset
     "tbz %x[n_channels], #0, 23f\n"
-    "ld1 { v31.b }[12], [x21], #0x1\n"
-    "ld1 { v30.b }[12], [x20], #0x1\n"
+    "ld1 { v31.b }[12], [x22], #0x1\n"
+    "ld1 { v30.b }[12], [x21], #0x1\n"
     "b 23f\n"
     "17:"  // Oddments: 2 inputs loop: Load: Bit 3: Bit 2: Unset
     "tbz %x[n_channels], #1, 18f\n"
-    "ld1 { v31.h }[4], [x21], #0x2\n"
-    "ld1 { v30.h }[4], [x20], #0x2\n"
+    "ld1 { v31.h }[4], [x22], #0x2\n"
+    "ld1 { v30.h }[4], [x21], #0x2\n"
     "tbz %x[n_channels], #0, 23f\n"
-    "ld1 { v31.b }[10], [x21], #0x1\n"
-    "ld1 { v30.b }[10], [x20], #0x1\n"
+    "ld1 { v31.b }[10], [x22], #0x1\n"
+    "ld1 { v30.b }[10], [x21], #0x1\n"
     "b 23f\n"
     "18:"  // Oddments: 2 inputs loop: Load: Bit 3: Bit 2: Unset: Bit 1: Unset
     "tbz %x[n_channels], #0, 23f\n"
-    "ld1 { v31.b }[8], [x21], #0x1\n"
-    "ld1 { v30.b }[8], [x20], #0x1\n"
+    "ld1 { v31.b }[8], [x22], #0x1\n"
+    "ld1 { v30.b }[8], [x21], #0x1\n"
     "b 23f\n"
     "19:"  // Oddments: 2 inputs loop: Load: Bit 3: Unset
     "tbz %x[n_channels], #2, 21f\n"
-    "ldr s31, [x21], #0x4\n"
-    "ldr s30, [x20], #0x4\n"
+    "ldr s31, [x22], #0x4\n"
+    "ldr s30, [x21], #0x4\n"
     "tbz %x[n_channels], #1, 20f\n"
-    "ld1 { v31.h }[2], [x21], #0x2\n"
-    "ld1 { v30.h }[2], [x20], #0x2\n"
+    "ld1 { v31.h }[2], [x22], #0x2\n"
+    "ld1 { v30.h }[2], [x21], #0x2\n"
     "tbz %x[n_channels], #0, 23f\n"
-    "ld1 { v31.b }[6], [x21], #0x1\n"
-    "ld1 { v30.b }[6], [x20], #0x1\n"
+    "ld1 { v31.b }[6], [x22], #0x1\n"
+    "ld1 { v30.b }[6], [x21], #0x1\n"
     "b 23f\n"
     "20:"  // Oddments: 2 inputs loop: Load: Bit 3: Unset: Bit 2: Bit 1: Unset
     "tbz %x[n_channels], #0, 23f\n"
-    "ld1 { v31.b }[4], [x21], #0x1\n"
-    "ld1 { v30.b }[4], [x20], #0x1\n"
+    "ld1 { v31.b }[4], [x22], #0x1\n"
+    "ld1 { v30.b }[4], [x21], #0x1\n"
     "b 23f\n"
     "21:"  // Oddments: 2 inputs loop: Load: Bit 3: Unset: Bit 2: Unset
     "tbz %x[n_channels], #1, 22f\n"
-    "ldr h31, [x21], #0x2\n"
-    "ldr h30, [x20], #0x2\n"
+    "ldr h31, [x22], #0x2\n"
+    "ldr h30, [x21], #0x2\n"
     "tbz %x[n_channels], #0, 23f\n"
-    "ld1 { v31.b }[2], [x21], #0x1\n"
-    "ld1 { v30.b }[2], [x20], #0x1\n"
+    "ld1 { v31.b }[2], [x22], #0x1\n"
+    "ld1 { v30.b }[2], [x21], #0x1\n"
     "b 23f\n"
     "22:"  // Oddments: 2 inputs loop: Load: Bit 3: Unset: Bit 2: Unset: Bit 1: Unset
     "tbz %x[n_channels], #0, 23f\n"
-    "ldr b31, [x21], #0x1\n"
-    "ldr b30, [x20], #0x1\n"
+    "ldr b31, [x22], #0x1\n"
+    "ldr b30, [x21], #0x1\n"
     "23:"  // Oddments: 2 inputs loop: Load: Bit 3: End
     "uaddl v23.8h, v31.8b, v30.8b\n"
     "uaddl2 v22.8h, v31.16b, v30.16b\n"
-    "subs x22, x22, #0x1\n"
+    "subs x23, x23, #0x1\n"
     "uaddw v15.4s, v15.4s, v23.4h\n"
     "uaddw2 v14.4s, v14.4s, v23.8h\n"
     "uaddw v13.4s, v13.4s, v22.4h\n"
     "uaddw2 v12.4s, v12.4s, v22.8h\n"
     "bgt 15b\n"
     "24:"  // Oddments: After loop
-    "ands x20, %x[n_valid_cells], #0x1\n"
+    "ands x21, %x[n_valid_cells], #0x1\n"
     "beq 34f\n"
     "25:"  // Oddments: Single input loop
-    "ldr x21, [x19], #0x8\n"
-    "add x21, x21, x26\n"
+    "ldr x22, [x20], #0x8\n"
+    "add x22, x22, x27\n"
     "movi v31.16b, #0x0\n"
     "tbz %x[n_channels], #3, 29f\n"
-    "ldr d31, [x21], #0x8\n"
+    "ldr d31, [x22], #0x8\n"
     "tbz %x[n_channels], #2, 27f\n"
-    "ld1 { v31.s }[2], [x21], #0x4\n"
+    "ld1 { v31.s }[2], [x22], #0x4\n"
     "tbz %x[n_channels], #1, 26f\n"
-    "ld1 { v31.h }[6], [x21], #0x2\n"
+    "ld1 { v31.h }[6], [x22], #0x2\n"
     "tbz %x[n_channels], #0, 33f\n"
-    "ld1 { v31.b }[14], [x21], #0x1\n"
+    "ld1 { v31.b }[14], [x22], #0x1\n"
     "b 33f\n"
     "26:"  // Oddments: Single input loop: Load: Bit 3: Bit 2: Bit 1: Unset
     "tbz %x[n_channels], #0, 33f\n"
-    "ld1 { v31.b }[12], [x21], #0x1\n"
+    "ld1 { v31.b }[12], [x22], #0x1\n"
     "b 33f\n"
     "27:"  // Oddments: Single input loop: Load: Bit 3: Bit 2: Unset
     "tbz %x[n_channels], #1, 28f\n"
-    "ld1 { v31.h }[4], [x21], #0x2\n"
+    "ld1 { v31.h }[4], [x22], #0x2\n"
     "tbz %x[n_channels], #0, 33f\n"
-    "ld1 { v31.b }[10], [x21], #0x1\n"
+    "ld1 { v31.b }[10], [x22], #0x1\n"
     "b 33f\n"
     "28:"  // Oddments: Single input loop: Load: Bit 3: Bit 2: Unset: Bit 1: Unset
     "tbz %x[n_channels], #0, 33f\n"
-    "ld1 { v31.b }[8], [x21], #0x1\n"
+    "ld1 { v31.b }[8], [x22], #0x1\n"
     "b 33f\n"
     "29:"  // Oddments: Single input loop: Load: Bit 3: Unset
     "tbz %x[n_channels], #2, 31f\n"
-    "ldr s31, [x21], #0x4\n"
+    "ldr s31, [x22], #0x4\n"
     "tbz %x[n_channels], #1, 30f\n"
-    "ld1 { v31.h }[2], [x21], #0x2\n"
+    "ld1 { v31.h }[2], [x22], #0x2\n"
     "tbz %x[n_channels], #0, 33f\n"
-    "ld1 { v31.b }[6], [x21], #0x1\n"
+    "ld1 { v31.b }[6], [x22], #0x1\n"
     "b 33f\n"
     "30:"  // Oddments: Single input loop: Load: Bit 3: Unset: Bit 2: Bit 1: Unset
     "tbz %x[n_channels], #0, 33f\n"
-    "ld1 { v31.b }[4], [x21], #0x1\n"
+    "ld1 { v31.b }[4], [x22], #0x1\n"
     "b 33f\n"
     "31:"  // Oddments: Single input loop: Load: Bit 3: Unset: Bit 2: Unset
     "tbz %x[n_channels], #1, 32f\n"
-    "ldr h31, [x21], #0x2\n"
+    "ldr h31, [x22], #0x2\n"
     "tbz %x[n_channels], #0, 33f\n"
-    "ld1 { v31.b }[2], [x21], #0x1\n"
+    "ld1 { v31.b }[2], [x22], #0x1\n"
     "b 33f\n"
     "32:"  // Oddments: Single input loop: Load: Bit 3: Unset: Bit 2: Unset: Bit 1: Unset
     "tbz %x[n_channels], #0, 33f\n"
-    "ldr b31, [x21], #0x1\n"
+    "ldr b31, [x22], #0x1\n"
     "33:"  // Oddments: Single input loop: Load: Bit 3: End
     "uxtl v23.8h, v31.8b\n"
     "uxtl2 v22.8h, v31.16b\n"
-    "subs x20, x20, #0x1\n"
+    "subs x21, x21, #0x1\n"
     "uaddw v15.4s, v15.4s, v23.4h\n"
     "uaddw2 v14.4s, v14.4s, v23.8h\n"
     "uaddw v13.4s, v13.4s, v22.4h\n"
@@ -620,7 +620,7 @@ void a64_u8_nhwc_avg_generic_depthfirst_impl(
     "43:"  // End
     : [n_channels] "+&r" (n_channels), [outptr] "+&r" (outptr)
     : [inptrs] "r" (inptrs), [n_valid_cells] "r" (n_valid_cells), [rescale_ptr] "r" (&rescale_value), [shift_ptr] "r" (&shift_value)
-    : "cc", "memory", "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26"
+    : "cc", "memory", "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27"
   );
 }
 
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_u8_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_u8_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp
index 06ded77647..149566197a 100644
--- a/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_u8_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_u8_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2021-2022 Arm Limited.
+ * Copyright (c) 2021-2023 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -62,111 +62,111 @@ void a64_u8_nhwc_max_2x2_s1_output2x2_depthfirst_impl(
                         pad_left, pad_top, pad_right, pad_bottom);
 
   __asm__ __volatile__(
-    "ldr x15, [%x[args], %[offsetof_n_channels]]\n"
-    "ldr x20, [%x[args], %[offsetof_outptrs]]\n"
-    "cmp x15, #0x10\n"
-    "mov x14, #0x0\n"
-    "ldr x19, [%x[args], %[offsetof_inptrs]]\n"
-    "ldp x13, x12, [x20, #0x0]\n"
-    "mov x11, #0x0\n"
-    "ldp x10, x9, [x20, #0x10]\n"
-    "ldp x28, x27, [x19, #0x0]\n"
-    "ldp x26, x25, [x19, #0x10]\n"
-    "ldp x24, x23, [x19, #0x20]\n"
-    "ldp x22, x21, [x19, #0x30]\n"
-    "ldr x20, [x19, #0x40]\n"
+    "ldr x16, [%x[args], %[offsetof_n_channels]]\n"
+    "ldr x21, [%x[args], %[offsetof_outptrs]]\n"
+    "cmp x16, #0x10\n"
+    "mov x15, #0x0\n"
+    "ldr x20, [%x[args], %[offsetof_inptrs]]\n"
+    "ldp x14, x13, [x21, #0x0]\n"
+    "mov x12, #0x0\n"
+    "ldp x11, x10, [x21, #0x10]\n"
+    "ldp x9, x28, [x20, #0x0]\n"
+    "ldp x27, x26, [x20, #0x10]\n"
+    "ldp x25, x24, [x20, #0x20]\n"
+    "ldp x23, x22, [x20, #0x30]\n"
+    "ldr x21, [x20, #0x40]\n"
     "blt 3f\n"
-    "lsr x19, x15, #0x4\n"
-    "sub x15, x15, x19, LSL #4\n"
-    "ldr q30, [x27, x14]\n"
-    "ldr q29, [x24, x14]\n"
-    "subs x19, x19, #0x1\n"
-    "ldr q28, [x21, x14]\n"
-    "ldr q27, [x25, x14]\n"
-    "ldr q26, [x28, x14]\n"
-    "ldr q25, [x23, x14]\n"
-    "ldr q24, [x26, x14]\n"
-    "ldr q23, [x22, x14]\n"
-    "ldr q22, [x20, x14]\n"
-    "add x14, x14, #0x10\n"
+    "ldr q30, [x28, x15]\n"
+    "ldr q29, [x25, x15]\n"
+    "lsr x20, x16, #0x4\n"
+    "sub x16, x16, x20, LSL #4\n"
+    "ldr q28, [x22, x15]\n"
+    "ldr q27, [x26, x15]\n"
+    "subs x20, x20, #0x1\n"
+    "ldr q26, [x9, x15]\n"
+    "ldr q25, [x27, x15]\n"
+    "ldr q24, [x24, x15]\n"
+    "ldr q23, [x23, x15]\n"
+    "ldr q22, [x21, x15]\n"
+    "add x15, x15, #0x10\n"
     "beq 2f\n"
     "1:"  // Vector: Loop
     "umax v21.16b, v30.16b, v29.16b\n"
+    "ldr q30, [x28, x15]\n"
     "umax v20.16b, v29.16b, v28.16b\n"
-    "subs x19, x19, #0x1\n"
-    "ldr q30, [x27, x14]\n"
+    "ldr q29, [x25, x15]\n"
+    "ldr q28, [x22, x15]\n"
     "umax v19.16b, v27.16b, v26.16b\n"
+    "ldr q26, [x9, x15]\n"
     "umax v18.16b, v25.16b, v24.16b\n"
-    "ldr q29, [x24, x14]\n"
-    "ldr q28, [x21, x14]\n"
-    "umax v17.16b, v23.16b, v27.16b\n"
-    "umax v16.16b, v25.16b, v22.16b\n"
-    "ldr q27, [x25, x14]\n"
-    "ldr q26, [x28, x14]\n"
+    "ldr q25, [x27, x15]\n"
+    "umax v17.16b, v27.16b, v23.16b\n"
+    "ldr q27, [x26, x15]\n"
+    "umax v16.16b, v24.16b, v22.16b\n"
+    "ldr q24, [x24, x15]\n"
+    "ldr q23, [x23, x15]\n"
+    "subs x20, x20, #0x1\n"
     "umax v19.16b, v21.16b, v19.16b\n"
+    "ldr q22, [x21, x15]\n"
     "umax v18.16b, v18.16b, v21.16b\n"
-    "ldr q25, [x23, x14]\n"
-    "ldr q24, [x26, x14]\n"
-    "umax v17.16b, v20.16b, v17.16b\n"
-    "umax v16.16b, v20.16b, v16.16b\n"
-    "ldr q23, [x22, x14]\n"
-    "ldr q22, [x20, x14]\n"
-    "add x14, x14, #0x10\n"
-    "str q19, [x13, x11]\n"
-    "str q18, [x12, x11]\n"
-    "str q17, [x10, x11]\n"
-    "str q16, [x9, x11]\n"
-    "add x11, x11, #0x10\n"
+    "umax v17.16b, v17.16b, v20.16b\n"
+    "add x15, x15, #0x10\n"
+    "umax v16.16b, v16.16b, v20.16b\n"
+    "str q19, [x14, x12]\n"
+    "str q18, [x13, x12]\n"
+    "str q17, [x11, x12]\n"
+    "str q16, [x10, x12]\n"
+    "add x12, x12, #0x10\n"
     "bgt 1b\n"
     "2:"  // Vector: Tail
     "umax v21.16b, v30.16b, v29.16b\n"
     "umax v20.16b, v29.16b, v28.16b\n"
     "umax v19.16b, v27.16b, v26.16b\n"
     "umax v18.16b, v25.16b, v24.16b\n"
-    "umax v17.16b, v23.16b, v27.16b\n"
-    "umax v16.16b, v25.16b, v22.16b\n"
+    "umax v17.16b, v27.16b, v23.16b\n"
+    "umax v16.16b, v24.16b, v22.16b\n"
     "umax v19.16b, v21.16b, v19.16b\n"
     "umax v18.16b, v18.16b, v21.16b\n"
-    "str q19, [x13, x11]\n"
-    "umax v17.16b, v20.16b, v17.16b\n"
-    "umax v16.16b, v20.16b, v16.16b\n"
-    "str q18, [x12, x11]\n"
-    "str q17, [x10, x11]\n"
-    "str q16, [x9, x11]\n"
-    "add x11, x11, #0x10\n"
-    "cbz x15, 4f\n"
+    "str q19, [x14, x12]\n"
+    "umax v17.16b, v17.16b, v20.16b\n"
+    "umax v16.16b, v16.16b, v20.16b\n"
+    "str q18, [x13, x12]\n"
+    "str q17, [x11, x12]\n"
+    "str q16, [x10, x12]\n"
+    "add x12, x12, #0x10\n"
+    "cbz x16, 4f\n"
     "3:"  // Oddments
-    "ldr b30, [x27, x14]\n"
-    "ldr b29, [x24, x14]\n"
+    "ldr b30, [x28, x15]\n"
+    "ldr b29, [x25, x15]\n"
     "umax v21.16b, v30.16b, v29.16b\n"
-    "subs x15, x15, #0x1\n"
-    "ldr b28, [x21, x14]\n"
-    "ldr b27, [x25, x14]\n"
+    "subs x16, x16, #0x1\n"
+    "ldr b28, [x22, x15]\n"
+    "ldr b27, [x26, x15]\n"
     "umax v20.16b, v29.16b, v28.16b\n"
-    "ldr b26, [x28, x14]\n"
-    "ldr b25, [x23, x14]\n"
+    "ldr b26, [x9, x15]\n"
+    "ldr b25, [x27, x15]\n"
     "umax v19.16b, v27.16b, v26.16b\n"
     "umax v19.16b, v21.16b, v19.16b\n"
-    "ldr b24, [x26, x14]\n"
-    "ldr b23, [x22, x14]\n"
+    "ldr b24, [x24, x15]\n"
+    "ldr b23, [x23, x15]\n"
     "umax v18.16b, v25.16b, v24.16b\n"
-    "umax v17.16b, v23.16b, v27.16b\n"
-    "ldr b22, [x20, x14]\n"
-    "umax v16.16b, v25.16b, v22.16b\n"
-    "add x14, x14, #0x1\n"
+    "umax v17.16b, v27.16b, v23.16b\n"
+    "ldr b22, [x21, x15]\n"
+    "umax v16.16b, v24.16b, v22.16b\n"
+    "add x15, x15, #0x1\n"
     "umax v18.16b, v18.16b, v21.16b\n"
-    "umax v17.16b, v20.16b, v17.16b\n"
-    "umax v16.16b, v20.16b, v16.16b\n"
-    "str b19, [x13, x11]\n"
-    "str b18, [x12, x11]\n"
-    "str b17, [x10, x11]\n"
-    "str b16, [x9, x11]\n"
-    "add x11, x11, #0x1\n"
+    "umax v17.16b, v17.16b, v20.16b\n"
+    "umax v16.16b, v16.16b, v20.16b\n"
+    "str b19, [x14, x12]\n"
+    "str b18, [x13, x12]\n"
+    "str b17, [x11, x12]\n"
+    "str b16, [x10, x12]\n"
+    "add x12, x12, #0x1\n"
     "bgt 3b\n"
     "4:"  // End
     :
     : [args] "r" (&args), [offsetof_inptrs] "I" (offsetof(KernelArgs, inptrs)), [offsetof_n_channels] "I" (offsetof(KernelArgs, n_channels)), [offsetof_outptrs] "I" (offsetof(KernelArgs, outptrs))
-    : "cc", "memory", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28"
+    : "cc", "memory", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28"
   );
 }
 
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_u8_nhwc_max_generic_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_u8_nhwc_max_generic_depthfirst/generic.cpp
index 355f21795c..98f5b8351c 100644
--- a/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_u8_nhwc_max_generic_depthfirst/generic.cpp
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_u8_nhwc_max_generic_depthfirst/generic.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2021-2022 Arm Limited.
+ * Copyright (c) 2021-2023 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -41,394 +41,394 @@ void a64_u8_nhwc_max_generic_depthfirst_impl(
 {
   __asm__ __volatile__(
     "cmp %x[n_channels], #0x40\n"
-    "mov x28, #0x0\n"
-    "mov x27, #0x10\n"  // cntb _, ALL, #1
-    "mov x26, #0x20\n"  // cntb _, ALL, #2
-    "mov x25, #0x30\n"  // cntb _, ALL, #3
+    "mov x9, #0x0\n"
+    "mov x28, #0x10\n"  // cntb _, ALL, #1
+    "mov x27, #0x20\n"  // cntb _, ALL, #2
+    "mov x26, #0x30\n"  // cntb _, ALL, #3
     "blt 7f\n"
     "1:"  // 4-vectors of channels
-    "lsr x24, %x[n_valid_cells], #0x2\n"
+    "lsr x25, %x[n_valid_cells], #0x2\n"
+    "movi v8.16b, #0x0\n"
+    "movi v7.16b, #0x0\n"
+    "mov x20, %x[inptrs]\n"
     "movi v6.16b, #0x0\n"
     "movi v5.16b, #0x0\n"
-    "mov x19, %x[inptrs]\n"
-    "movi v4.16b, #0x0\n"
-    "movi v3.16b, #0x0\n"
-    "cbz x24, 4f\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
-    "subs x24, x24, #0x1\n"
-    "add x19, x19, #0x20\n"
-    "ldr q2, [x23, x28]\n"
-    "ldr q1, [x22, x28]\n"
-    "ldr q0, [x21, x28]\n"
-    "ldr q31, [x20, x28]\n"
-    "ldr q30, [x23, x27]\n"
-    "ldr q22, [x22, x27]\n"
-    "ldr q29, [x21, x27]\n"
-    "ldr q28, [x20, x27]\n"
-    "ldr q27, [x23, x26]\n"
-    "ldr q21, [x22, x26]\n"
-    "ldr q26, [x21, x26]\n"
-    "ldr q17, [x20, x26]\n"
-    "ldr q25, [x23, x25]\n"
-    "ldr q20, [x22, x25]\n"
-    "ldr q24, [x21, x25]\n"
-    "ldr q16, [x20, x25]\n"
+    "cbz x25, 4f\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "ldr q4, [x24, x9]\n"
+    "subs x25, x25, #0x1\n"
+    "ldr q3, [x23, x9]\n"
+    "ldr q2, [x24, x28]\n"
+    "ldr q1, [x23, x28]\n"
+    "ldr q0, [x24, x27]\n"
+    "ldr q31, [x23, x27]\n"
+    "ldr q30, [x24, x26]\n"
+    "ldr q29, [x23, x26]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "add x20, x20, #0x20\n"
+    "ldr q28, [x22, x9]\n"
+    "ldr q22, [x21, x9]\n"
+    "ldr q27, [x22, x28]\n"
+    "ldr q21, [x21, x28]\n"
+    "ldr q26, [x22, x27]\n"
+    "ldr q20, [x21, x27]\n"
+    "ldr q25, [x22, x26]\n"
+    "ldr q24, [x21, x26]\n"
     "beq 3f\n"
     "2:"  // 4-vectors of channels: 4 inputs loop
-    "umax v23.16b, v2.16b, v1.16b\n"
-    "umax v19.16b, v0.16b, v31.16b\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
-    "umax v22.16b, v30.16b, v22.16b\n"
-    "umax v18.16b, v29.16b, v28.16b\n"
-    "subs x24, x24, #0x1\n"
-    "add x19, x19, #0x20\n"
-    "umax v21.16b, v27.16b, v21.16b\n"
-    "umax v17.16b, v26.16b, v17.16b\n"
-    "ldr q2, [x23, x28]\n"
-    "ldr q1, [x22, x28]\n"
-    "umax v20.16b, v25.16b, v20.16b\n"
-    "umax v16.16b, v24.16b, v16.16b\n"
-    "ldr q0, [x21, x28]\n"
-    "ldr q31, [x20, x28]\n"
+    "umax v23.16b, v4.16b, v3.16b\n"
+    "umax v19.16b, v28.16b, v22.16b\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "ldr q4, [x24, x9]\n"
+    "ldr q3, [x23, x9]\n"
+    "umax v22.16b, v2.16b, v1.16b\n"
+    "ldr q2, [x24, x28]\n"
+    "umax v18.16b, v27.16b, v21.16b\n"
+    "ldr q1, [x23, x28]\n"
+    "umax v21.16b, v0.16b, v31.16b\n"
+    "ldr q0, [x24, x27]\n"
+    "umax v17.16b, v26.16b, v20.16b\n"
+    "ldr q31, [x23, x27]\n"
+    "umax v20.16b, v30.16b, v29.16b\n"
+    "ldr q30, [x24, x26]\n"
+    "umax v16.16b, v25.16b, v24.16b\n"
+    "ldr q29, [x23, x26]\n"
     "umax v19.16b, v23.16b, v19.16b\n"
     "umax v18.16b, v22.16b, v18.16b\n"
-    "ldr q30, [x23, x27]\n"
-    "ldr q22, [x22, x27]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "ldr q28, [x22, x9]\n"
+    "ldr q22, [x21, x9]\n"
     "umax v17.16b, v21.16b, v17.16b\n"
     "umax v16.16b, v20.16b, v16.16b\n"
-    "ldr q29, [x21, x27]\n"
-    "ldr q28, [x20, x27]\n"
-    "umax v6.16b, v6.16b, v19.16b\n"
-    "umax v5.16b, v5.16b, v18.16b\n"
-    "ldr q27, [x23, x26]\n"
-    "ldr q21, [x22, x26]\n"
-    "umax v4.16b, v4.16b, v17.16b\n"
-    "umax v3.16b, v3.16b, v16.16b\n"
-    "ldr q26, [x21, x26]\n"
-    "ldr q17, [x20, x26]\n"
-    "ldr q25, [x23, x25]\n"
-    "ldr q20, [x22, x25]\n"
-    "ldr q24, [x21, x25]\n"
-    "ldr q16, [x20, x25]\n"
+    "ldr q27, [x22, x28]\n"
+    "ldr q21, [x21, x28]\n"
+    "subs x25, x25, #0x1\n"
+    "umax v8.16b, v8.16b, v19.16b\n"
+    "ldr q26, [x22, x27]\n"
+    "ldr q20, [x21, x27]\n"
+    "umax v7.16b, v7.16b, v18.16b\n"
+    "umax v6.16b, v6.16b, v17.16b\n"
+    "ldr q25, [x22, x26]\n"
+    "ldr q24, [x21, x26]\n"
+    "umax v5.16b, v5.16b, v16.16b\n"
+    "add x20, x20, #0x20\n"
     "bgt 2b\n"
     "3:"  // 4-vectors of channels: 4 inputs tail
-    "umax v23.16b, v2.16b, v1.16b\n"
-    "umax v19.16b, v0.16b, v31.16b\n"
-    "umax v22.16b, v30.16b, v22.16b\n"
-    "umax v18.16b, v29.16b, v28.16b\n"
-    "umax v21.16b, v27.16b, v21.16b\n"
-    "umax v17.16b, v26.16b, v17.16b\n"
-    "umax v20.16b, v25.16b, v20.16b\n"
-    "umax v16.16b, v24.16b, v16.16b\n"
+    "umax v23.16b, v4.16b, v3.16b\n"
+    "umax v19.16b, v28.16b, v22.16b\n"
+    "umax v22.16b, v2.16b, v1.16b\n"
+    "umax v18.16b, v27.16b, v21.16b\n"
+    "umax v21.16b, v0.16b, v31.16b\n"
+    "umax v17.16b, v26.16b, v20.16b\n"
+    "umax v20.16b, v30.16b, v29.16b\n"
+    "umax v16.16b, v25.16b, v24.16b\n"
     "umax v19.16b, v23.16b, v19.16b\n"
     "umax v18.16b, v22.16b, v18.16b\n"
     "umax v17.16b, v21.16b, v17.16b\n"
     "umax v16.16b, v20.16b, v16.16b\n"
-    "umax v6.16b, v6.16b, v19.16b\n"
-    "umax v5.16b, v5.16b, v18.16b\n"
-    "umax v4.16b, v4.16b, v17.16b\n"
-    "umax v3.16b, v3.16b, v16.16b\n"
+    "umax v8.16b, v8.16b, v19.16b\n"
+    "umax v7.16b, v7.16b, v18.16b\n"
+    "umax v6.16b, v6.16b, v17.16b\n"
+    "umax v5.16b, v5.16b, v16.16b\n"
     "4:"  // 4-vectors of channels: After loop
-    "ands x20, %x[n_valid_cells], #0x3\n"
+    "ands x21, %x[n_valid_cells], #0x3\n"
     "beq 6f\n"
     "5:"  // 4-vectors of channels: Single input loop
-    "ldr x23, [x19], #0x8\n"
-    "ldr q2, [x23, x28]\n"
-    "subs x20, x20, #0x1\n"
-    "umax v6.16b, v6.16b, v2.16b\n"
-    "ldr q30, [x23, x27]\n"
-    "ldr q27, [x23, x26]\n"
+    "ldr x24, [x20], #0x8\n"
+    "ldr q4, [x24, x9]\n"
+    "subs x21, x21, #0x1\n"
+    "umax v8.16b, v8.16b, v4.16b\n"
+    "ldr q2, [x24, x28]\n"
+    "ldr q0, [x24, x27]\n"
+    "umax v7.16b, v7.16b, v2.16b\n"
+    "umax v6.16b, v6.16b, v0.16b\n"
+    "ldr q30, [x24, x26]\n"
     "umax v5.16b, v5.16b, v30.16b\n"
-    "umax v4.16b, v4.16b, v27.16b\n"
-    "ldr q25, [x23, x25]\n"
-    "umax v3.16b, v3.16b, v25.16b\n"
     "bgt 5b\n"
     "6:"  // 4-vectors of channels: Single input loop: End
     "sub %x[n_channels], %x[n_channels], #0x40\n"
     "cmp %x[n_channels], #0x40\n"
-    "str q6, [%x[outptr], x28]\n"
-    "str q5, [%x[outptr], x27]\n"
+    "str q8, [%x[outptr], x9]\n"
+    "str q7, [%x[outptr], x28]\n"
+    "add x9, x9, #0x40\n"
     "add x28, x28, #0x40\n"
+    "str q6, [%x[outptr], x27]\n"
     "add x27, x27, #0x40\n"
-    "str q4, [%x[outptr], x26]\n"
+    "str q5, [%x[outptr], x26]\n"
     "add x26, x26, #0x40\n"
-    "str q3, [%x[outptr], x25]\n"
-    "add x25, x25, #0x40\n"
     "bge 1b\n"
     "cbz %x[n_channels], 43f\n"
     "7:"  // Single vector of channels
     "cmp %x[n_channels], #0x10\n"
     "blt 14f\n"
     "8:"  // Single vector of channels: Loop
-    "lsr x24, %x[n_valid_cells], #0x2\n"
-    "movi v6.16b, #0x0\n"
-    "mov x19, %x[inptrs]\n"
-    "cbz x24, 11f\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
-    "subs x24, x24, #0x1\n"
-    "add x19, x19, #0x20\n"
-    "ldr q2, [x23, x28]\n"
-    "ldr q1, [x22, x28]\n"
-    "ldr q0, [x21, x28]\n"
-    "ldr q31, [x20, x28]\n"
+    "lsr x25, %x[n_valid_cells], #0x2\n"
+    "movi v8.16b, #0x0\n"
+    "mov x20, %x[inptrs]\n"
+    "cbz x25, 11f\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "ldr q4, [x24, x9]\n"
+    "subs x25, x25, #0x1\n"
+    "ldr q3, [x23, x9]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "add x20, x20, #0x20\n"
+    "ldr q28, [x22, x9]\n"
+    "ldr q22, [x21, x9]\n"
     "beq 10f\n"
     "9:"  // Single vector of channels: Loop: 4 inputs loop
-    "umax v23.16b, v2.16b, v1.16b\n"
-    "umax v19.16b, v0.16b, v31.16b\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
+    "umax v23.16b, v4.16b, v3.16b\n"
+    "umax v19.16b, v28.16b, v22.16b\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "ldr q4, [x24, x9]\n"
+    "ldr q3, [x23, x9]\n"
     "umax v19.16b, v23.16b, v19.16b\n"
-    "subs x24, x24, #0x1\n"
-    "umax v6.16b, v6.16b, v19.16b\n"
-    "add x19, x19, #0x20\n"
-    "ldr q2, [x23, x28]\n"
-    "ldr q1, [x22, x28]\n"
-    "ldr q0, [x21, x28]\n"
-    "ldr q31, [x20, x28]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "subs x25, x25, #0x1\n"
+    "ldr q28, [x22, x9]\n"
+    "ldr q22, [x21, x9]\n"
+    "umax v8.16b, v8.16b, v19.16b\n"
+    "add x20, x20, #0x20\n"
     "bgt 9b\n"
     "10:"  // Single vector of channels: Loop: 4 inputs tail
-    "umax v23.16b, v2.16b, v1.16b\n"
-    "umax v19.16b, v0.16b, v31.16b\n"
+    "umax v23.16b, v4.16b, v3.16b\n"
+    "umax v19.16b, v28.16b, v22.16b\n"
     "umax v19.16b, v23.16b, v19.16b\n"
-    "umax v6.16b, v6.16b, v19.16b\n"
+    "umax v8.16b, v8.16b, v19.16b\n"
     "11:"  // Single vector of channels: Loop: After loop
-    "ands x20, %x[n_valid_cells], #0x3\n"
+    "ands x21, %x[n_valid_cells], #0x3\n"
     "beq 13f\n"
     "12:"  // Single vector of channels: Loop: Single input loop
-    "ldr x23, [x19], #0x8\n"
-    "ldr q2, [x23, x28]\n"
-    "subs x20, x20, #0x1\n"
-    "umax v6.16b, v6.16b, v2.16b\n"
+    "ldr x24, [x20], #0x8\n"
+    "ldr q4, [x24, x9]\n"
+    "subs x21, x21, #0x1\n"
+    "umax v8.16b, v8.16b, v4.16b\n"
     "bgt 12b\n"
     "13:"  // Single vector of channels: Loop: Single input loop: End
     "sub %x[n_channels], %x[n_channels], #0x10\n"
     "cmp %x[n_channels], #0x10\n"
-    "str q6, [%x[outptr], x28]\n"
-    "add x28, x28, #0x10\n"
+    "str q8, [%x[outptr], x9]\n"
+    "add x9, x9, #0x10\n"
     "bge 8b\n"
     "cbz %x[n_channels], 43f\n"
     "14:"  // Oddments
-    "lsr x24, %x[n_valid_cells], #0x2\n"
-    "add %x[outptr], %x[outptr], x28\n"
-    "movi v6.16b, #0x0\n"
-    "mov x19, %x[inptrs]\n"
-    "cbz x24, 24f\n"
+    "lsr x25, %x[n_valid_cells], #0x2\n"
+    "add %x[outptr], %x[outptr], x9\n"
+    "movi v8.16b, #0x0\n"
+    "mov x20, %x[inptrs]\n"
+    "cbz x25, 24f\n"
     "15:"  // Oddments: 4 inputs loop
-    "ldp x23, x22, [x19, #0x0]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
-    "add x19, x19, #0x20\n"
-    "add x23, x23, x28\n"
-    "add x22, x22, x28\n"
-    "add x21, x21, x28\n"
-    "movi v2.16b, #0x0\n"
-    "movi v1.16b, #0x0\n"
-    "add x20, x20, x28\n"
-    "movi v0.16b, #0x0\n"
-    "movi v31.16b, #0x0\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "add x20, x20, #0x20\n"
+    "add x24, x24, x9\n"
+    "add x23, x23, x9\n"
+    "add x22, x22, x9\n"
+    "movi v4.16b, #0x0\n"
+    "movi v3.16b, #0x0\n"
+    "add x21, x21, x9\n"
+    "movi v28.16b, #0x0\n"
+    "movi v22.16b, #0x0\n"
     "tbz %x[n_channels], #3, 19f\n"
-    "ldr d2, [x23], #0x8\n"
-    "ldr d1, [x22], #0x8\n"
-    "ldr d0, [x21], #0x8\n"
-    "ldr d31, [x20], #0x8\n"
+    "ldr d4, [x24], #0x8\n"
+    "ldr d3, [x23], #0x8\n"
+    "ldr d28, [x22], #0x8\n"
+    "ldr d22, [x21], #0x8\n"
     "tbz %x[n_channels], #2, 17f\n"
-    "ld1 { v2.s }[2], [x23], #0x4\n"
-    "ld1 { v1.s }[2], [x22], #0x4\n"
-    "ld1 { v0.s }[2], [x21], #0x4\n"
-    "ld1 { v31.s }[2], [x20], #0x4\n"
+    "ld1 { v4.s }[2], [x24], #0x4\n"
+    "ld1 { v3.s }[2], [x23], #0x4\n"
+    "ld1 { v28.s }[2], [x22], #0x4\n"
+    "ld1 { v22.s }[2], [x21], #0x4\n"
     "tbz %x[n_channels], #1, 16f\n"
-    "ld1 { v2.h }[6], [x23], #0x2\n"
-    "ld1 { v1.h }[6], [x22], #0x2\n"
-    "ld1 { v0.h }[6], [x21], #0x2\n"
-    "ld1 { v31.h }[6], [x20], #0x2\n"
+    "ld1 { v4.h }[6], [x24], #0x2\n"
+    "ld1 { v3.h }[6], [x23], #0x2\n"
+    "ld1 { v28.h }[6], [x22], #0x2\n"
+    "ld1 { v22.h }[6], [x21], #0x2\n"
     "tbz %x[n_channels], #0, 23f\n"
-    "ld1 { v2.b }[14], [x23], #0x1\n"
-    "ld1 { v1.b }[14], [x22], #0x1\n"
-    "ld1 { v0.b }[14], [x21], #0x1\n"
-    "ld1 { v31.b }[14], [x20], #0x1\n"
+    "ld1 { v4.b }[14], [x24], #0x1\n"
+    "ld1 { v3.b }[14], [x23], #0x1\n"
+    "ld1 { v28.b }[14], [x22], #0x1\n"
+    "ld1 { v22.b }[14], [x21], #0x1\n"
     "b 23f\n"
     "16:"  // Oddments: 4 inputs loop: Load: Bit 3: Bit 2: Bit 1: Unset
     "tbz %x[n_channels], #0, 23f\n"
-    "ld1 { v2.b }[12], [x23], #0x1\n"
-    "ld1 { v1.b }[12], [x22], #0x1\n"
-    "ld1 { v0.b }[12], [x21], #0x1\n"
-    "ld1 { v31.b }[12], [x20], #0x1\n"
+    "ld1 { v4.b }[12], [x24], #0x1\n"
+    "ld1 { v3.b }[12], [x23], #0x1\n"
+    "ld1 { v28.b }[12], [x22], #0x1\n"
+    "ld1 { v22.b }[12], [x21], #0x1\n"
     "b 23f\n"
     "17:"  // Oddments: 4 inputs loop: Load: Bit 3: Bit 2: Unset
     "tbz %x[n_channels], #1, 18f\n"
-    "ld1 { v2.h }[4], [x23], #0x2\n"
-    "ld1 { v1.h }[4], [x22], #0x2\n"
-    "ld1 { v0.h }[4], [x21], #0x2\n"
-    "ld1 { v31.h }[4], [x20], #0x2\n"
+    "ld1 { v4.h }[4], [x24], #0x2\n"
+    "ld1 { v3.h }[4], [x23], #0x2\n"
+    "ld1 { v28.h }[4], [x22], #0x2\n"
+    "ld1 { v22.h }[4], [x21], #0x2\n"
     "tbz %x[n_channels], #0, 23f\n"
-    "ld1 { v2.b }[10], [x23], #0x1\n"
-    "ld1 { v1.b }[10], [x22], #0x1\n"
-    "ld1 { v0.b }[10], [x21], #0x1\n"
-    "ld1 { v31.b }[10], [x20], #0x1\n"
+    "ld1 { v4.b }[10], [x24], #0x1\n"
+    "ld1 { v3.b }[10], [x23], #0x1\n"
+    "ld1 { v28.b }[10], [x22], #0x1\n"
+    "ld1 { v22.b }[10], [x21], #0x1\n"
     "b 23f\n"
     "18:"  // Oddments: 4 inputs loop: Load: Bit 3: Bit 2: Unset: Bit 1: Unset
     "tbz %x[n_channels], #0, 23f\n"
-    "ld1 { v2.b }[8], [x23], #0x1\n"
-    "ld1 { v1.b }[8], [x22], #0x1\n"
-    "ld1 { v0.b }[8], [x21], #0x1\n"
-    "ld1 { v31.b }[8], [x20], #0x1\n"
+    "ld1 { v4.b }[8], [x24], #0x1\n"
+    "ld1 { v3.b }[8], [x23], #0x1\n"
+    "ld1 { v28.b }[8], [x22], #0x1\n"
+    "ld1 { v22.b }[8], [x21], #0x1\n"
     "b 23f\n"
     "19:"  // Oddments: 4 inputs loop: Load: Bit 3: Unset
     "tbz %x[n_channels], #2, 21f\n"
-    "ldr s2, [x23], #0x4\n"
-    "ldr s1, [x22], #0x4\n"
-    "ldr s0, [x21], #0x4\n"
-    "ldr s31, [x20], #0x4\n"
+    "ldr s4, [x24], #0x4\n"
+    "ldr s3, [x23], #0x4\n"
+    "ldr s28, [x22], #0x4\n"
+    "ldr s22, [x21], #0x4\n"
     "tbz %x[n_channels], #1, 20f\n"
-    "ld1 { v2.h }[2], [x23], #0x2\n"
-    "ld1 { v1.h }[2], [x22], #0x2\n"
-    "ld1 { v0.h }[2], [x21], #0x2\n"
-    "ld1 { v31.h }[2], [x20], #0x2\n"
+    "ld1 { v4.h }[2], [x24], #0x2\n"
+    "ld1 { v3.h }[2], [x23], #0x2\n"
+    "ld1 { v28.h }[2], [x22], #0x2\n"
+    "ld1 { v22.h }[2], [x21], #0x2\n"
     "tbz %x[n_channels], #0, 23f\n"
-    "ld1 { v2.b }[6], [x23], #0x1\n"
-    "ld1 { v1.b }[6], [x22], #0x1\n"
-    "ld1 { v0.b }[6], [x21], #0x1\n"
-    "ld1 { v31.b }[6], [x20], #0x1\n"
+    "ld1 { v4.b }[6], [x24], #0x1\n"
+    "ld1 { v3.b }[6], [x23], #0x1\n"
+    "ld1 { v28.b }[6], [x22], #0x1\n"
+    "ld1 { v22.b }[6], [x21], #0x1\n"
     "b 23f\n"
     "20:"  // Oddments: 4 inputs loop: Load: Bit 3: Unset: Bit 2: Bit 1: Unset
     "tbz %x[n_channels], #0, 23f\n"
-    "ld1 { v2.b }[4], [x23], #0x1\n"
-    "ld1 { v1.b }[4], [x22], #0x1\n"
-    "ld1 { v0.b }[4], [x21], #0x1\n"
-    "ld1 { v31.b }[4], [x20], #0x1\n"
+    "ld1 { v4.b }[4], [x24], #0x1\n"
+    "ld1 { v3.b }[4], [x23], #0x1\n"
+    "ld1 { v28.b }[4], [x22], #0x1\n"
+    "ld1 { v22.b }[4], [x21], #0x1\n"
     "b 23f\n"
     "21:"  // Oddments: 4 inputs loop: Load: Bit 3: Unset: Bit 2: Unset
     "tbz %x[n_channels], #1, 22f\n"
-    "ldr h2, [x23], #0x2\n"
-    "ldr h1, [x22], #0x2\n"
-    "ldr h0, [x21], #0x2\n"
-    "ldr h31, [x20], #0x2\n"
+    "ldr h4, [x24], #0x2\n"
+    "ldr h3, [x23], #0x2\n"
+    "ldr h28, [x22], #0x2\n"
+    "ldr h22, [x21], #0x2\n"
     "tbz %x[n_channels], #0, 23f\n"
-    "ld1 { v2.b }[2], [x23], #0x1\n"
-    "ld1 { v1.b }[2], [x22], #0x1\n"
-    "ld1 { v0.b }[2], [x21], #0x1\n"
-    "ld1 { v31.b }[2], [x20], #0x1\n"
+    "ld1 { v4.b }[2], [x24], #0x1\n"
+    "ld1 { v3.b }[2], [x23], #0x1\n"
+    "ld1 { v28.b }[2], [x22], #0x1\n"
+    "ld1 { v22.b }[2], [x21], #0x1\n"
     "b 23f\n"
     "22:"  // Oddments: 4 inputs loop: Load: Bit 3: Unset: Bit 2: Unset: Bit 1: Unset
     "tbz %x[n_channels], #0, 23f\n"
-    "ldr b2, [x23], #0x1\n"
-    "ldr b1, [x22], #0x1\n"
-    "ldr b0, [x21], #0x1\n"
-    "ldr b31, [x20], #0x1\n"
+    "ldr b4, [x24], #0x1\n"
+    "ldr b3, [x23], #0x1\n"
+    "ldr b28, [x22], #0x1\n"
+    "ldr b22, [x21], #0x1\n"
     "23:"  // Oddments: 4 inputs loop: Load: Bit 3: End
-    "umax v23.16b, v2.16b, v1.16b\n"
-    "umax v19.16b, v0.16b, v31.16b\n"
-    "subs x24, x24, #0x1\n"
+    "umax v23.16b, v4.16b, v3.16b\n"
+    "umax v19.16b, v28.16b, v22.16b\n"
+    "subs x25, x25, #0x1\n"
     "umax v19.16b, v23.16b, v19.16b\n"
-    "umax v6.16b, v6.16b, v19.16b\n"
+    "umax v8.16b, v8.16b, v19.16b\n"
     "bgt 15b\n"
     "24:"  // Oddments: After loop
-    "ands x20, %x[n_valid_cells], #0x3\n"
+    "ands x21, %x[n_valid_cells], #0x3\n"
     "beq 34f\n"
     "25:"  // Oddments: Single input loop
-    "ldr x23, [x19], #0x8\n"
-    "add x23, x23, x28\n"
-    "movi v2.16b, #0x0\n"
+    "ldr x24, [x20], #0x8\n"
+    "add x24, x24, x9\n"
+    "movi v4.16b, #0x0\n"
     "tbz %x[n_channels], #3, 29f\n"
-    "ldr d2, [x23], #0x8\n"
+    "ldr d4, [x24], #0x8\n"
     "tbz %x[n_channels], #2, 27f\n"
-    "ld1 { v2.s }[2], [x23], #0x4\n"
+    "ld1 { v4.s }[2], [x24], #0x4\n"
     "tbz %x[n_channels], #1, 26f\n"
-    "ld1 { v2.h }[6], [x23], #0x2\n"
+    "ld1 { v4.h }[6], [x24], #0x2\n"
     "tbz %x[n_channels], #0, 33f\n"
-    "ld1 { v2.b }[14], [x23], #0x1\n"
+    "ld1 { v4.b }[14], [x24], #0x1\n"
     "b 33f\n"
     "26:"  // Oddments: Single input loop: Load: Bit 3: Bit 2: Bit 1: Unset
     "tbz %x[n_channels], #0, 33f\n"
-    "ld1 { v2.b }[12], [x23], #0x1\n"
+    "ld1 { v4.b }[12], [x24], #0x1\n"
     "b 33f\n"
     "27:"  // Oddments: Single input loop: Load: Bit 3: Bit 2: Unset
     "tbz %x[n_channels], #1, 28f\n"
-    "ld1 { v2.h }[4], [x23], #0x2\n"
+    "ld1 { v4.h }[4], [x24], #0x2\n"
     "tbz %x[n_channels], #0, 33f\n"
-    "ld1 { v2.b }[10], [x23], #0x1\n"
+    "ld1 { v4.b }[10], [x24], #0x1\n"
     "b 33f\n"
     "28:"  // Oddments: Single input loop: Load: Bit 3: Bit 2: Unset: Bit 1: Unset
     "tbz %x[n_channels], #0, 33f\n"
-    "ld1 { v2.b }[8], [x23], #0x1\n"
+    "ld1 { v4.b }[8], [x24], #0x1\n"
     "b 33f\n"
     "29:"  // Oddments: Single input loop: Load: Bit 3: Unset
     "tbz %x[n_channels], #2, 31f\n"
-    "ldr s2, [x23], #0x4\n"
+    "ldr s4, [x24], #0x4\n"
     "tbz %x[n_channels], #1, 30f\n"
-    "ld1 { v2.h }[2], [x23], #0x2\n"
+    "ld1 { v4.h }[2], [x24], #0x2\n"
     "tbz %x[n_channels], #0, 33f\n"
-    "ld1 { v2.b }[6], [x23], #0x1\n"
+    "ld1 { v4.b }[6], [x24], #0x1\n"
     "b 33f\n"
     "30:"  // Oddments: Single input loop: Load: Bit 3: Unset: Bit 2: Bit 1: Unset
     "tbz %x[n_channels], #0, 33f\n"
-    "ld1 { v2.b }[4], [x23], #0x1\n"
+    "ld1 { v4.b }[4], [x24], #0x1\n"
     "b 33f\n"
     "31:"  // Oddments: Single input loop: Load: Bit 3: Unset: Bit 2: Unset
     "tbz %x[n_channels], #1, 32f\n"
-    "ldr h2, [x23], #0x2\n"
+    "ldr h4, [x24], #0x2\n"
     "tbz %x[n_channels], #0, 33f\n"
-    "ld1 { v2.b }[2], [x23], #0x1\n"
+    "ld1 { v4.b }[2], [x24], #0x1\n"
     "b 33f\n"
     "32:"  // Oddments: Single input loop: Load: Bit 3: Unset: Bit 2: Unset: Bit 1: Unset
     "tbz %x[n_channels], #0, 33f\n"
-    "ldr b2, [x23], #0x1\n"
+    "ldr b4, [x24], #0x1\n"
     "33:"  // Oddments: Single input loop: Load: Bit 3: End
-    "subs x20, x20, #0x1\n"
-    "umax v6.16b, v6.16b, v2.16b\n"
+    "subs x21, x21, #0x1\n"
+    "umax v8.16b, v8.16b, v4.16b\n"
     "bgt 25b\n"
     "34:"  // Oddments: Single input loop: End
     "tbz %x[n_channels], #3, 38f\n"
-    "st1 { v6.d }[0], [%x[outptr]], #0x8\n"
+    "st1 { v8.d }[0], [%x[outptr]], #0x8\n"
     "tbz %x[n_channels], #2, 36f\n"
-    "st1 { v6.s }[2], [%x[outptr]], #0x4\n"
+    "st1 { v8.s }[2], [%x[outptr]], #0x4\n"
     "tbz %x[n_channels], #1, 35f\n"
-    "st1 { v6.h }[6], [%x[outptr]], #0x2\n"
+    "st1 { v8.h }[6], [%x[outptr]], #0x2\n"
     "tbz %x[n_channels], #0, 42f\n"
-    "st1 { v6.b }[14], [%x[outptr]], #0x1\n"
+    "st1 { v8.b }[14], [%x[outptr]], #0x1\n"
     "b 42f\n"
     "35:"  // Oddments: Store: Bit 3: Bit 2: Bit 1: Unset
     "tbz %x[n_channels], #0, 42f\n"
-    "st1 { v6.b }[12], [%x[outptr]], #0x1\n"
+    "st1 { v8.b }[12], [%x[outptr]], #0x1\n"
     "b 42f\n"
     "36:"  // Oddments: Store: Bit 3: Bit 2: Unset
     "tbz %x[n_channels], #1, 37f\n"
-    "st1 { v6.h }[4], [%x[outptr]], #0x2\n"
+    "st1 { v8.h }[4], [%x[outptr]], #0x2\n"
     "tbz %x[n_channels], #0, 42f\n"
-    "st1 { v6.b }[10], [%x[outptr]], #0x1\n"
+    "st1 { v8.b }[10], [%x[outptr]], #0x1\n"
     "b 42f\n"
     "37:"  // Oddments: Store: Bit 3: Bit 2: Unset: Bit 1: Unset
     "tbz %x[n_channels], #0, 42f\n"
-    "st1 { v6.b }[8], [%x[outptr]], #0x1\n"
+    "st1 { v8.b }[8], [%x[outptr]], #0x1\n"
     "b 42f\n"
     "38:"  // Oddments: Store: Bit 3: Unset
     "tbz %x[n_channels], #2, 40f\n"
-    "st1 { v6.s }[0], [%x[outptr]], #0x4\n"
+    "st1 { v8.s }[0], [%x[outptr]], #0x4\n"
     "tbz %x[n_channels], #1, 39f\n"
-    "st1 { v6.h }[2], [%x[outptr]], #0x2\n"
+    "st1 { v8.h }[2], [%x[outptr]], #0x2\n"
     "tbz %x[n_channels], #0, 42f\n"
-    "st1 { v6.b }[6], [%x[outptr]], #0x1\n"
+    "st1 { v8.b }[6], [%x[outptr]], #0x1\n"
     "b 42f\n"
     "39:"  // Oddments: Store: Bit 3: Unset: Bit 2: Bit 1: Unset
     "tbz %x[n_channels], #0, 42f\n"
-    "st1 { v6.b }[4], [%x[outptr]], #0x1\n"
+    "st1 { v8.b }[4], [%x[outptr]], #0x1\n"
     "b 42f\n"
     "40:"  // Oddments: Store: Bit 3: Unset: Bit 2: Unset
     "tbz %x[n_channels], #1, 41f\n"
-    "st1 { v6.h }[0], [%x[outptr]], #0x2\n"
+    "st1 { v8.h }[0], [%x[outptr]], #0x2\n"
     "tbz %x[n_channels], #0, 42f\n"
-    "st1 { v6.b }[2], [%x[outptr]], #0x1\n"
+    "st1 { v8.b }[2], [%x[outptr]], #0x1\n"
     "b 42f\n"
     "41:"  // Oddments: Store: Bit 3: Unset: Bit 2: Unset: Bit 1: Unset
     "tbz %x[n_channels], #0, 42f\n"
-    "st1 { v6.b }[0], [%x[outptr]], #0x1\n"
+    "st1 { v8.b }[0], [%x[outptr]], #0x1\n"
     "42:"  // Oddments: Store: Bit 3: End
     "43:"  // End
     : [n_channels] "+&r" (n_channels), [outptr] "+&r" (outptr)
     : [inptrs] "r" (inptrs), [n_valid_cells] "r" (n_valid_cells)
-    : "cc", "memory", "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28"
+    : "cc", "memory", "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x9", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28"
   );
 }
 
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_u8q_nhwc_avg_generic_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_u8q_nhwc_avg_generic_depthfirst/generic.cpp
index d48c4ec640..19227d8aaa 100644
--- a/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_u8q_nhwc_avg_generic_depthfirst/generic.cpp
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_u8q_nhwc_avg_generic_depthfirst/generic.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2021-2022 Arm Limited.
+ * Copyright (c) 2021-2023 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -120,19 +120,19 @@ void a64_u8q_nhwc_avg_generic_depthfirst_impl(
 
   __asm__ __volatile__(
     "cmp %x[n_channels], #0x40\n"
-    "mov x26, #0x0\n"
-    "mov x25, #0x10\n"  // cntb _, ALL, #1
-    "mov x24, #0x20\n"  // cntb _, ALL, #2
-    "mov x23, #0x30\n"  // cntb _, ALL, #3
+    "mov x27, #0x0\n"
+    "mov x26, #0x10\n"  // cntb _, ALL, #1
+    "mov x25, #0x20\n"  // cntb _, ALL, #2
+    "mov x24, #0x30\n"  // cntb _, ALL, #3
     "blt 7f\n"
     "1:"  // 4-vectors of channels
     "ld1r { v15.4s }, [%x[accumulator_init]]\n"
-    "lsr x22, %x[n_valid_cells], #0x1\n"
+    "lsr x23, %x[n_valid_cells], #0x1\n"
     "mov v14.16b, v15.16b\n"
     "mov v13.16b, v15.16b\n"
     "mov v12.16b, v15.16b\n"
     "mov v11.16b, v15.16b\n"
-    "mov x19, %x[inptrs]\n"
+    "mov x20, %x[inptrs]\n"
     "mov v10.16b, v15.16b\n"
     "mov v9.16b, v15.16b\n"
     "mov v8.16b, v15.16b\n"
@@ -144,43 +144,43 @@ void a64_u8q_nhwc_avg_generic_depthfirst_impl(
     "mov v2.16b, v15.16b\n"
     "mov v1.16b, v15.16b\n"
     "mov v0.16b, v15.16b\n"
-    "cbz x22, 4f\n"
-    "ldp x21, x20, [x19, #0x0]\n"
-    "subs x22, x22, #0x1\n"
-    "add x19, x19, #0x10\n"
-    "ldr q31, [x21, x26]\n"
-    "ldr q30, [x20, x26]\n"
-    "ldr q29, [x21, x25]\n"
-    "ldr q28, [x20, x25]\n"
-    "ldr q27, [x21, x24]\n"
-    "ldr q26, [x20, x24]\n"
-    "ldr q25, [x21, x23]\n"
-    "ldr q24, [x20, x23]\n"
+    "cbz x23, 4f\n"
+    "ldp x22, x21, [x20, #0x0]\n"
+    "ldr q31, [x22, x27]\n"
+    "subs x23, x23, #0x1\n"
+    "add x20, x20, #0x10\n"
+    "ldr q30, [x21, x27]\n"
+    "ldr q29, [x22, x26]\n"
+    "ldr q28, [x21, x26]\n"
+    "ldr q27, [x22, x25]\n"
+    "ldr q26, [x21, x25]\n"
+    "ldr q25, [x22, x24]\n"
+    "ldr q24, [x21, x24]\n"
     "beq 3f\n"
     "2:"  // 4-vectors of channels: 2 inputs loop
     "uaddl v23.8h, v31.8b, v30.8b\n"
     "uaddl2 v22.8h, v31.16b, v30.16b\n"
-    "ldp x21, x20, [x19, #0x0]\n"
-    "subs x22, x22, #0x1\n"
+    "ldp x22, x21, [x20, #0x0]\n"
+    "ldr q31, [x22, x27]\n"
+    "ldr q30, [x21, x27]\n"
     "uaddl v21.8h, v29.8b, v28.8b\n"
     "uaddl2 v20.8h, v29.16b, v28.16b\n"
-    "add x19, x19, #0x10\n"
-    "ldr q31, [x21, x26]\n"
+    "ldr q29, [x22, x26]\n"
+    "ldr q28, [x21, x26]\n"
     "uaddl v19.8h, v27.8b, v26.8b\n"
     "uaddl2 v18.8h, v27.16b, v26.16b\n"
-    "ldr q30, [x20, x26]\n"
-    "ldr q29, [x21, x25]\n"
-    "uaddl v17.8h, v25.8b, v24.8b\n"
-    "uaddl2 v16.8h, v25.16b, v24.16b\n"
-    "ldr q28, [x20, x25]\n"
-    "ldr q27, [x21, x24]\n"
+    "ldr q27, [x22, x25]\n"
+    "ldr q26, [x21, x25]\n"
+    "subs x23, x23, #0x1\n"
     "uaddw v15.4s, v15.4s, v23.4h\n"
     "uaddw2 v14.4s, v14.4s, v23.8h\n"
-    "ldr q26, [x20, x24]\n"
-    "ldr q25, [x21, x23]\n"
+    "uaddl v17.8h, v25.8b, v24.8b\n"
+    "uaddl2 v16.8h, v25.16b, v24.16b\n"
+    "ldr q25, [x22, x24]\n"
+    "add x20, x20, #0x10\n"
     "uaddw v13.4s, v13.4s, v22.4h\n"
     "uaddw2 v12.4s, v12.4s, v22.8h\n"
-    "ldr q24, [x20, x23]\n"
+    "ldr q24, [x21, x24]\n"
     "uaddw v11.4s, v11.4s, v21.4h\n"
     "uaddw2 v10.4s, v10.4s, v21.8h\n"
     "uaddw v9.4s, v9.4s, v20.4h\n"
@@ -220,21 +220,21 @@ void a64_u8q_nhwc_avg_generic_depthfirst_impl(
     "uaddw v1.4s, v1.4s, v16.4h\n"
     "uaddw2 v0.4s, v0.4s, v16.8h\n"
     "4:"  // 4-vectors of channels: After loop
-    "ands x20, %x[n_valid_cells], #0x1\n"
+    "ands x21, %x[n_valid_cells], #0x1\n"
     "beq 6f\n"
     "5:"  // 4-vectors of channels: Single input loop
-    "ldr x21, [x19], #0x8\n"
-    "ldr q31, [x21, x26]\n"
+    "ldr x22, [x20], #0x8\n"
+    "ldr q31, [x22, x27]\n"
     "uxtl v23.8h, v31.8b\n"
     "uxtl2 v22.8h, v31.16b\n"
-    "ldr q29, [x21, x25]\n"
-    "ldr q27, [x21, x24]\n"
+    "ldr q29, [x22, x26]\n"
+    "ldr q27, [x22, x25]\n"
     "uxtl v21.8h, v29.8b\n"
     "uxtl2 v20.8h, v29.16b\n"
-    "ldr q25, [x21, x23]\n"
+    "ldr q25, [x22, x24]\n"
     "uxtl v19.8h, v27.8b\n"
     "uxtl2 v18.8h, v27.16b\n"
-    "subs x20, x20, #0x1\n"
+    "subs x21, x21, #0x1\n"
     "uxtl v17.8h, v25.8b\n"
     "uxtl2 v16.8h, v25.16b\n"
     "uaddw v15.4s, v15.4s, v23.4h\n"
@@ -259,13 +259,13 @@ void a64_u8q_nhwc_avg_generic_depthfirst_impl(
     "ld1r { v18.4s }, [%x[combined_rescale_value]]\n"
     "srshl v15.4s, v15.4s, v19.4s\n"
     "srshl v14.4s, v14.4s, v19.4s\n"
+    "ld1r { v17.4s }, [%x[right_shift]]\n"
     "srshl v13.4s, v13.4s, v19.4s\n"
     "srshl v12.4s, v12.4s, v19.4s\n"
-    "ld1r { v17.4s }, [%x[right_shift]]\n"
-    "add x19, %x[quant_params], %[offsetof_qp_output_offset]\n"
+    "add x20, %x[quant_params], %[offsetof_qp_output_offset]\n"
+    "ld1r { v16.4s }, [x20]\n"
     "srshl v11.4s, v11.4s, v19.4s\n"
     "srshl v10.4s, v10.4s, v19.4s\n"
-    "ld1r { v16.4s }, [x19]\n"
     "sub %x[n_channels], %x[n_channels], #0x40\n"
     "srshl v9.4s, v9.4s, v19.4s\n"
     "srshl v8.4s, v8.4s, v19.4s\n"
@@ -370,16 +370,16 @@ void a64_u8q_nhwc_avg_generic_depthfirst_impl(
     "uzp1 v19.16b, v1.16b, v0.16b\n"
     "uzp1 v16.16b, v23.16b, v16.16b\n"
     "uzp1 v18.16b, v22.16b, v18.16b\n"
-    "str q16, [%x[outptr], x26]\n"
-    "add x26, x26, #0x40\n"
+    "str q16, [%x[outptr], x27]\n"
+    "add x27, x27, #0x40\n"
     "uzp1 v17.16b, v21.16b, v17.16b\n"
     "uzp1 v16.16b, v20.16b, v19.16b\n"
-    "str q18, [%x[outptr], x25]\n"
+    "str q18, [%x[outptr], x26]\n"
+    "add x26, x26, #0x40\n"
+    "str q17, [%x[outptr], x25]\n"
     "add x25, x25, #0x40\n"
-    "str q17, [%x[outptr], x24]\n"
+    "str q16, [%x[outptr], x24]\n"
     "add x24, x24, #0x40\n"
-    "str q16, [%x[outptr], x23]\n"
-    "add x23, x23, #0x40\n"
     "bge 1b\n"
     "cbz %x[n_channels], 43f\n"
     "7:"  // Single vector of channels
@@ -387,30 +387,30 @@ void a64_u8q_nhwc_avg_generic_depthfirst_impl(
     "blt 14f\n"
     "8:"  // Single vector of channels: Loop
     "ld1r { v15.4s }, [%x[accumulator_init]]\n"
-    "lsr x22, %x[n_valid_cells], #0x1\n"
+    "lsr x23, %x[n_valid_cells], #0x1\n"
     "mov v14.16b, v15.16b\n"
     "mov v13.16b, v15.16b\n"
     "mov v12.16b, v15.16b\n"
-    "mov x19, %x[inptrs]\n"
-    "cbz x22, 11f\n"
-    "ldp x21, x20, [x19, #0x0]\n"
-    "subs x22, x22, #0x1\n"
-    "add x19, x19, #0x10\n"
-    "ldr q31, [x21, x26]\n"
-    "ldr q30, [x20, x26]\n"
+    "mov x20, %x[inptrs]\n"
+    "cbz x23, 11f\n"
+    "ldp x22, x21, [x20, #0x0]\n"
+    "ldr q31, [x22, x27]\n"
+    "subs x23, x23, #0x1\n"
+    "add x20, x20, #0x10\n"
+    "ldr q30, [x21, x27]\n"
     "beq 10f\n"
     "9:"  // Single vector of channels: Loop: 2 inputs loop
     "uaddl v23.8h, v31.8b, v30.8b\n"
     "uaddl2 v22.8h, v31.16b, v30.16b\n"
-    "ldp x21, x20, [x19, #0x0]\n"
-    "subs x22, x22, #0x1\n"
+    "ldp x22, x21, [x20, #0x0]\n"
+    "ldr q31, [x22, x27]\n"
+    "ldr q30, [x21, x27]\n"
+    "subs x23, x23, #0x1\n"
     "uaddw v15.4s, v15.4s, v23.4h\n"
     "uaddw2 v14.4s, v14.4s, v23.8h\n"
-    "add x19, x19, #0x10\n"
-    "ldr q31, [x21, x26]\n"
     "uaddw v13.4s, v13.4s, v22.4h\n"
     "uaddw2 v12.4s, v12.4s, v22.8h\n"
-    "ldr q30, [x20, x26]\n"
+    "add x20, x20, #0x10\n"
     "bgt 9b\n"
     "10:"  // Single vector of channels: Loop: 2 inputs tail
     "uaddl v23.8h, v31.8b, v30.8b\n"
@@ -420,14 +420,14 @@ void a64_u8q_nhwc_avg_generic_depthfirst_impl(
     "uaddw v13.4s, v13.4s, v22.4h\n"
     "uaddw2 v12.4s, v12.4s, v22.8h\n"
     "11:"  // Single vector of channels: Loop: After loop
-    "ands x20, %x[n_valid_cells], #0x1\n"
+    "ands x21, %x[n_valid_cells], #0x1\n"
     "beq 13f\n"
     "12:"  // Single vector of channels: Loop: Single input loop
-    "ldr x21, [x19], #0x8\n"
-    "ldr q31, [x21, x26]\n"
+    "ldr x22, [x20], #0x8\n"
+    "ldr q31, [x22, x27]\n"
     "uxtl v23.8h, v31.8b\n"
     "uxtl2 v22.8h, v31.16b\n"
-    "subs x20, x20, #0x1\n"
+    "subs x21, x21, #0x1\n"
     "uaddw v15.4s, v15.4s, v23.4h\n"
     "uaddw2 v14.4s, v14.4s, v23.8h\n"
     "uaddw v13.4s, v13.4s, v22.4h\n"
@@ -438,13 +438,13 @@ void a64_u8q_nhwc_avg_generic_depthfirst_impl(
     "ld1r { v18.4s }, [%x[combined_rescale_value]]\n"
     "srshl v15.4s, v15.4s, v19.4s\n"
     "srshl v14.4s, v14.4s, v19.4s\n"
+    "ld1r { v17.4s }, [%x[right_shift]]\n"
     "srshl v13.4s, v13.4s, v19.4s\n"
     "srshl v12.4s, v12.4s, v19.4s\n"
-    "ld1r { v17.4s }, [%x[right_shift]]\n"
-    "add x19, %x[quant_params], %[offsetof_qp_output_offset]\n"
+    "add x20, %x[quant_params], %[offsetof_qp_output_offset]\n"
+    "ld1r { v16.4s }, [x20]\n"
     "sqrdmulh v15.4s, v15.4s, v18.4s\n"
     "sqrdmulh v14.4s, v14.4s, v18.4s\n"
-    "ld1r { v16.4s }, [x19]\n"
     "sub %x[n_channels], %x[n_channels], #0x10\n"
     "sqrdmulh v13.4s, v13.4s, v18.4s\n"
     "sqrdmulh v12.4s, v12.4s, v18.4s\n"
@@ -470,149 +470,149 @@ void a64_u8q_nhwc_avg_generic_depthfirst_impl(
     "uzp1 v23.16b, v15.16b, v14.16b\n"
     "uzp1 v16.16b, v13.16b, v12.16b\n"
     "uzp1 v16.16b, v23.16b, v16.16b\n"
-    "str q16, [%x[outptr], x26]\n"
-    "add x26, x26, #0x10\n"
+    "str q16, [%x[outptr], x27]\n"
+    "add x27, x27, #0x10\n"
     "bge 8b\n"
     "cbz %x[n_channels], 43f\n"
     "14:"  // Oddments
     "ld1r { v15.4s }, [%x[accumulator_init]]\n"
-    "lsr x22, %x[n_valid_cells], #0x1\n"
-    "add %x[outptr], %x[outptr], x26\n"
+    "lsr x23, %x[n_valid_cells], #0x1\n"
+    "add %x[outptr], %x[outptr], x27\n"
     "mov v14.16b, v15.16b\n"
     "mov v13.16b, v15.16b\n"
     "mov v12.16b, v15.16b\n"
-    "mov x19, %x[inptrs]\n"
-    "cbz x22, 24f\n"
+    "mov x20, %x[inptrs]\n"
+    "cbz x23, 24f\n"
     "15:"  // Oddments: 2 inputs loop
-    "ldp x21, x20, [x19, #0x0]\n"
-    "add x19, x19, #0x10\n"
-    "add x21, x21, x26\n"
+    "ldp x22, x21, [x20, #0x0]\n"
+    "add x20, x20, #0x10\n"
+    "add x22, x22, x27\n"
     "movi v31.16b, #0x0\n"
-    "add x20, x20, x26\n"
+    "add x21, x21, x27\n"
     "movi v30.16b, #0x0\n"
     "tbz %x[n_channels], #3, 19f\n"
-    "ldr d31, [x21], #0x8\n"
-    "ldr d30, [x20], #0x8\n"
+    "ldr d31, [x22], #0x8\n"
+    "ldr d30, [x21], #0x8\n"
     "tbz %x[n_channels], #2, 17f\n"
-    "ld1 { v31.s }[2], [x21], #0x4\n"
-    "ld1 { v30.s }[2], [x20], #0x4\n"
+    "ld1 { v31.s }[2], [x22], #0x4\n"
+    "ld1 { v30.s }[2], [x21], #0x4\n"
     "tbz %x[n_channels], #1, 16f\n"
-    "ld1 { v31.h }[6], [x21], #0x2\n"
-    "ld1 { v30.h }[6], [x20], #0x2\n"
+    "ld1 { v31.h }[6], [x22], #0x2\n"
+    "ld1 { v30.h }[6], [x21], #0x2\n"
     "tbz %x[n_channels], #0, 23f\n"
-    "ld1 { v31.b }[14], [x21], #0x1\n"
-    "ld1 { v30.b }[14], [x20], #0x1\n"
+    "ld1 { v31.b }[14], [x22], #0x1\n"
+    "ld1 { v30.b }[14], [x21], #0x1\n"
     "b 23f\n"
     "16:"  // Oddments: 2 inputs loop: Load: Bit 3: Bit 2: Bit 1: Unset
     "tbz %x[n_channels], #0, 23f\n"
-    "ld1 { v31.b }[12], [x21], #0x1\n"
-    "ld1 { v30.b }[12], [x20], #0x1\n"
+    "ld1 { v31.b }[12], [x22], #0x1\n"
+    "ld1 { v30.b }[12], [x21], #0x1\n"
     "b 23f\n"
     "17:"  // Oddments: 2 inputs loop: Load: Bit 3: Bit 2: Unset
     "tbz %x[n_channels], #1, 18f\n"
-    "ld1 { v31.h }[4], [x21], #0x2\n"
-    "ld1 { v30.h }[4], [x20], #0x2\n"
+    "ld1 { v31.h }[4], [x22], #0x2\n"
+    "ld1 { v30.h }[4], [x21], #0x2\n"
     "tbz %x[n_channels], #0, 23f\n"
-    "ld1 { v31.b }[10], [x21], #0x1\n"
-    "ld1 { v30.b }[10], [x20], #0x1\n"
+    "ld1 { v31.b }[10], [x22], #0x1\n"
+    "ld1 { v30.b }[10], [x21], #0x1\n"
     "b 23f\n"
     "18:"  // Oddments: 2 inputs loop: Load: Bit 3: Bit 2: Unset: Bit 1: Unset
     "tbz %x[n_channels], #0, 23f\n"
-    "ld1 { v31.b }[8], [x21], #0x1\n"
-    "ld1 { v30.b }[8], [x20], #0x1\n"
+    "ld1 { v31.b }[8], [x22], #0x1\n"
+    "ld1 { v30.b }[8], [x21], #0x1\n"
     "b 23f\n"
     "19:"  // Oddments: 2 inputs loop: Load: Bit 3: Unset
     "tbz %x[n_channels], #2, 21f\n"
-    "ldr s31, [x21], #0x4\n"
-    "ldr s30, [x20], #0x4\n"
+    "ldr s31, [x22], #0x4\n"
+    "ldr s30, [x21], #0x4\n"
     "tbz %x[n_channels], #1, 20f\n"
-    "ld1 { v31.h }[2], [x21], #0x2\n"
-    "ld1 { v30.h }[2], [x20], #0x2\n"
+    "ld1 { v31.h }[2], [x22], #0x2\n"
+    "ld1 { v30.h }[2], [x21], #0x2\n"
     "tbz %x[n_channels], #0, 23f\n"
-    "ld1 { v31.b }[6], [x21], #0x1\n"
-    "ld1 { v30.b }[6], [x20], #0x1\n"
+    "ld1 { v31.b }[6], [x22], #0x1\n"
+    "ld1 { v30.b }[6], [x21], #0x1\n"
     "b 23f\n"
     "20:"  // Oddments: 2 inputs loop: Load: Bit 3: Unset: Bit 2: Bit 1: Unset
     "tbz %x[n_channels], #0, 23f\n"
-    "ld1 { v31.b }[4], [x21], #0x1\n"
-    "ld1 { v30.b }[4], [x20], #0x1\n"
+    "ld1 { v31.b }[4], [x22], #0x1\n"
+    "ld1 { v30.b }[4], [x21], #0x1\n"
     "b 23f\n"
     "21:"  // Oddments: 2 inputs loop: Load: Bit 3: Unset: Bit 2: Unset
     "tbz %x[n_channels], #1, 22f\n"
-    "ldr h31, [x21], #0x2\n"
-    "ldr h30, [x20], #0x2\n"
+    "ldr h31, [x22], #0x2\n"
+    "ldr h30, [x21], #0x2\n"
     "tbz %x[n_channels], #0, 23f\n"
-    "ld1 { v31.b }[2], [x21], #0x1\n"
-    "ld1 { v30.b }[2], [x20], #0x1\n"
+    "ld1 { v31.b }[2], [x22], #0x1\n"
+    "ld1 { v30.b }[2], [x21], #0x1\n"
     "b 23f\n"
     "22:"  // Oddments: 2 inputs loop: Load: Bit 3: Unset: Bit 2: Unset: Bit 1: Unset
     "tbz %x[n_channels], #0, 23f\n"
-    "ldr b31, [x21], #0x1\n"
-    "ldr b30, [x20], #0x1\n"
+    "ldr b31, [x22], #0x1\n"
+    "ldr b30, [x21], #0x1\n"
     "23:"  // Oddments: 2 inputs loop: Load: Bit 3: End
     "uaddl v23.8h, v31.8b, v30.8b\n"
     "uaddl2 v22.8h, v31.16b, v30.16b\n"
-    "subs x22, x22, #0x1\n"
+    "subs x23, x23, #0x1\n"
     "uaddw v15.4s, v15.4s, v23.4h\n"
     "uaddw2 v14.4s, v14.4s, v23.8h\n"
     "uaddw v13.4s, v13.4s, v22.4h\n"
     "uaddw2 v12.4s, v12.4s, v22.8h\n"
     "bgt 15b\n"
     "24:"  // Oddments: After loop
-    "ands x20, %x[n_valid_cells], #0x1\n"
+    "ands x21, %x[n_valid_cells], #0x1\n"
     "beq 34f\n"
     "25:"  // Oddments: Single input loop
-    "ldr x21, [x19], #0x8\n"
-    "add x21, x21, x26\n"
+    "ldr x22, [x20], #0x8\n"
+    "add x22, x22, x27\n"
     "movi v31.16b, #0x0\n"
     "tbz %x[n_channels], #3, 29f\n"
-    "ldr d31, [x21], #0x8\n"
+    "ldr d31, [x22], #0x8\n"
     "tbz %x[n_channels], #2, 27f\n"
-    "ld1 { v31.s }[2], [x21], #0x4\n"
+    "ld1 { v31.s }[2], [x22], #0x4\n"
     "tbz %x[n_channels], #1, 26f\n"
-    "ld1 { v31.h }[6], [x21], #0x2\n"
+    "ld1 { v31.h }[6], [x22], #0x2\n"
     "tbz %x[n_channels], #0, 33f\n"
-    "ld1 { v31.b }[14], [x21], #0x1\n"
+    "ld1 { v31.b }[14], [x22], #0x1\n"
     "b 33f\n"
     "26:"  // Oddments: Single input loop: Load: Bit 3: Bit 2: Bit 1: Unset
     "tbz %x[n_channels], #0, 33f\n"
-    "ld1 { v31.b }[12], [x21], #0x1\n"
+    "ld1 { v31.b }[12], [x22], #0x1\n"
     "b 33f\n"
     "27:"  // Oddments: Single input loop: Load: Bit 3: Bit 2: Unset
     "tbz %x[n_channels], #1, 28f\n"
-    "ld1 { v31.h }[4], [x21], #0x2\n"
+    "ld1 { v31.h }[4], [x22], #0x2\n"
     "tbz %x[n_channels], #0, 33f\n"
-    "ld1 { v31.b }[10], [x21], #0x1\n"
+    "ld1 { v31.b }[10], [x22], #0x1\n"
     "b 33f\n"
     "28:"  // Oddments: Single input loop: Load: Bit 3: Bit 2: Unset: Bit 1: Unset
     "tbz %x[n_channels], #0, 33f\n"
-    "ld1 { v31.b }[8], [x21], #0x1\n"
+    "ld1 { v31.b }[8], [x22], #0x1\n"
     "b 33f\n"
     "29:"  // Oddments: Single input loop: Load: Bit 3: Unset
     "tbz %x[n_channels], #2, 31f\n"
-    "ldr s31, [x21], #0x4\n"
+    "ldr s31, [x22], #0x4\n"
     "tbz %x[n_channels], #1, 30f\n"
-    "ld1 { v31.h }[2], [x21], #0x2\n"
+    "ld1 { v31.h }[2], [x22], #0x2\n"
     "tbz %x[n_channels], #0, 33f\n"
-    "ld1 { v31.b }[6], [x21], #0x1\n"
+    "ld1 { v31.b }[6], [x22], #0x1\n"
     "b 33f\n"
     "30:"  // Oddments: Single input loop: Load: Bit 3: Unset: Bit 2: Bit 1: Unset
     "tbz %x[n_channels], #0, 33f\n"
-    "ld1 { v31.b }[4], [x21], #0x1\n"
+    "ld1 { v31.b }[4], [x22], #0x1\n"
     "b 33f\n"
     "31:"  // Oddments: Single input loop: Load: Bit 3: Unset: Bit 2: Unset
     "tbz %x[n_channels], #1, 32f\n"
-    "ldr h31, [x21], #0x2\n"
+    "ldr h31, [x22], #0x2\n"
     "tbz %x[n_channels], #0, 33f\n"
-    "ld1 { v31.b }[2], [x21], #0x1\n"
+    "ld1 { v31.b }[2], [x22], #0x1\n"
     "b 33f\n"
     "32:"  // Oddments: Single input loop: Load: Bit 3: Unset: Bit 2: Unset: Bit 1: Unset
     "tbz %x[n_channels], #0, 33f\n"
-    "ldr b31, [x21], #0x1\n"
+    "ldr b31, [x22], #0x1\n"
     "33:"  // Oddments: Single input loop: Load: Bit 3: End
     "uxtl v23.8h, v31.8b\n"
     "uxtl2 v22.8h, v31.16b\n"
-    "subs x20, x20, #0x1\n"
+    "subs x21, x21, #0x1\n"
     "uaddw v15.4s, v15.4s, v23.4h\n"
     "uaddw2 v14.4s, v14.4s, v23.8h\n"
     "uaddw v13.4s, v13.4s, v22.4h\n"
@@ -623,13 +623,13 @@ void a64_u8q_nhwc_avg_generic_depthfirst_impl(
     "ld1r { v18.4s }, [%x[combined_rescale_value]]\n"
     "srshl v15.4s, v15.4s, v19.4s\n"
     "srshl v14.4s, v14.4s, v19.4s\n"
+    "ld1r { v17.4s }, [%x[right_shift]]\n"
     "srshl v13.4s, v13.4s, v19.4s\n"
     "srshl v12.4s, v12.4s, v19.4s\n"
-    "ld1r { v17.4s }, [%x[right_shift]]\n"
-    "add x19, %x[quant_params], %[offsetof_qp_output_offset]\n"
+    "add x20, %x[quant_params], %[offsetof_qp_output_offset]\n"
+    "ld1r { v16.4s }, [x20]\n"
     "sqrdmulh v15.4s, v15.4s, v18.4s\n"
     "sqrdmulh v14.4s, v14.4s, v18.4s\n"
-    "ld1r { v16.4s }, [x19]\n"
     "sqrdmulh v13.4s, v13.4s, v18.4s\n"
     "sqrdmulh v12.4s, v12.4s, v18.4s\n"
     "srshl v15.4s, v15.4s, v17.4s\n"
@@ -701,7 +701,7 @@ void a64_u8q_nhwc_avg_generic_depthfirst_impl(
     "43:"  // End
     : [n_channels] "+&r" (n_channels), [outptr] "+&r" (outptr)
     : [accumulator_init] "r" (&accumulator_init), [combined_rescale_value] "r" (&combined_rescale_value), [inptrs] "r" (inptrs), [left_shift] "r" (&left_shift), [n_valid_cells] "r" (n_valid_cells), [offsetof_qp_output_offset] "I" (offsetof(Requantize32, output_offset)), [quant_params] "r" (&qp), [right_shift] "r" (&right_shift)
-    : "cc", "memory", "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26"
+    : "cc", "memory", "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27"
   );
 }
 
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_u8q_nhwc_max_generic_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_u8q_nhwc_max_generic_depthfirst/generic.cpp
index c5050742cb..7eea14f70f 100644
--- a/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_u8q_nhwc_max_generic_depthfirst/generic.cpp
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_u8q_nhwc_max_generic_depthfirst/generic.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2021-2022 Arm Limited.
+ * Copyright (c) 2021-2023 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -43,131 +43,131 @@ void a64_u8q_nhwc_max_generic_depthfirst_impl(
 {
   __asm__ __volatile__(
     "cmp %x[n_channels], #0x40\n"
-    "mov x28, #0x0\n"
-    "mov x27, #0x10\n"  // cntb _, ALL, #1
-    "mov x26, #0x20\n"  // cntb _, ALL, #2
-    "mov x25, #0x30\n"  // cntb _, ALL, #3
+    "mov x9, #0x0\n"
+    "mov x28, #0x10\n"  // cntb _, ALL, #1
+    "mov x27, #0x20\n"  // cntb _, ALL, #2
+    "mov x26, #0x30\n"  // cntb _, ALL, #3
     "blt 7f\n"
     "1:"  // 4-vectors of channels
-    "lsr x24, %x[n_valid_cells], #0x2\n"
+    "lsr x25, %x[n_valid_cells], #0x2\n"
+    "movi v8.16b, #0x0\n"
     "movi v7.16b, #0x0\n"
-    "movi v3.16b, #0x0\n"
-    "mov x19, %x[inptrs]\n"
+    "mov x20, %x[inptrs]\n"
     "movi v6.16b, #0x0\n"
     "movi v5.16b, #0x0\n"
-    "cbz x24, 4f\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
-    "subs x24, x24, #0x1\n"
-    "add x19, x19, #0x20\n"
-    "ldr q2, [x23, x28]\n"
-    "ldr q1, [x22, x28]\n"
-    "ldr q0, [x21, x28]\n"
-    "ldr q31, [x20, x28]\n"
-    "ldr q30, [x23, x27]\n"
-    "ldr q22, [x22, x27]\n"
-    "ldr q29, [x21, x27]\n"
-    "ldr q28, [x20, x27]\n"
-    "ldr q27, [x23, x26]\n"
-    "ldr q21, [x22, x26]\n"
-    "ldr q26, [x21, x26]\n"
-    "ldr q17, [x20, x26]\n"
-    "ldr q25, [x23, x25]\n"
-    "ldr q20, [x22, x25]\n"
-    "ldr q24, [x21, x25]\n"
-    "ldr q16, [x20, x25]\n"
+    "cbz x25, 4f\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "ldr q4, [x24, x9]\n"
+    "subs x25, x25, #0x1\n"
+    "ldr q3, [x23, x9]\n"
+    "ldr q2, [x24, x28]\n"
+    "ldr q1, [x23, x28]\n"
+    "ldr q0, [x24, x27]\n"
+    "ldr q31, [x23, x27]\n"
+    "ldr q30, [x24, x26]\n"
+    "ldr q29, [x23, x26]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "add x20, x20, #0x20\n"
+    "ldr q28, [x22, x9]\n"
+    "ldr q22, [x21, x9]\n"
+    "ldr q27, [x22, x28]\n"
+    "ldr q21, [x21, x28]\n"
+    "ldr q26, [x22, x27]\n"
+    "ldr q20, [x21, x27]\n"
+    "ldr q25, [x22, x26]\n"
+    "ldr q24, [x21, x26]\n"
     "beq 3f\n"
     "2:"  // 4-vectors of channels: 4 inputs loop
-    "umax v23.16b, v2.16b, v1.16b\n"
-    "umax v19.16b, v0.16b, v31.16b\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
-    "umax v22.16b, v30.16b, v22.16b\n"
-    "umax v18.16b, v29.16b, v28.16b\n"
-    "subs x24, x24, #0x1\n"
-    "add x19, x19, #0x20\n"
-    "umax v21.16b, v27.16b, v21.16b\n"
-    "umax v17.16b, v26.16b, v17.16b\n"
-    "ldr q2, [x23, x28]\n"
-    "ldr q1, [x22, x28]\n"
-    "umax v20.16b, v25.16b, v20.16b\n"
-    "umax v16.16b, v24.16b, v16.16b\n"
-    "ldr q0, [x21, x28]\n"
-    "ldr q31, [x20, x28]\n"
+    "umax v23.16b, v4.16b, v3.16b\n"
+    "umax v19.16b, v28.16b, v22.16b\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "ldr q4, [x24, x9]\n"
+    "ldr q3, [x23, x9]\n"
+    "umax v22.16b, v2.16b, v1.16b\n"
+    "ldr q2, [x24, x28]\n"
+    "umax v18.16b, v27.16b, v21.16b\n"
+    "ldr q1, [x23, x28]\n"
+    "umax v21.16b, v0.16b, v31.16b\n"
+    "ldr q0, [x24, x27]\n"
+    "umax v17.16b, v26.16b, v20.16b\n"
+    "ldr q31, [x23, x27]\n"
+    "umax v20.16b, v30.16b, v29.16b\n"
+    "ldr q30, [x24, x26]\n"
+    "umax v16.16b, v25.16b, v24.16b\n"
+    "ldr q29, [x23, x26]\n"
     "umax v19.16b, v23.16b, v19.16b\n"
     "umax v18.16b, v22.16b, v18.16b\n"
-    "ldr q30, [x23, x27]\n"
-    "ldr q22, [x22, x27]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "ldr q28, [x22, x9]\n"
+    "ldr q22, [x21, x9]\n"
     "umax v17.16b, v21.16b, v17.16b\n"
     "umax v16.16b, v20.16b, v16.16b\n"
-    "ldr q29, [x21, x27]\n"
-    "ldr q28, [x20, x27]\n"
-    "umax v7.16b, v7.16b, v19.16b\n"
-    "umax v3.16b, v3.16b, v18.16b\n"
-    "ldr q27, [x23, x26]\n"
-    "ldr q21, [x22, x26]\n"
+    "ldr q27, [x22, x28]\n"
+    "ldr q21, [x21, x28]\n"
+    "subs x25, x25, #0x1\n"
+    "umax v8.16b, v8.16b, v19.16b\n"
+    "ldr q26, [x22, x27]\n"
+    "ldr q20, [x21, x27]\n"
+    "umax v7.16b, v7.16b, v18.16b\n"
     "umax v6.16b, v6.16b, v17.16b\n"
+    "ldr q25, [x22, x26]\n"
+    "ldr q24, [x21, x26]\n"
     "umax v5.16b, v5.16b, v16.16b\n"
-    "ldr q26, [x21, x26]\n"
-    "ldr q17, [x20, x26]\n"
-    "ldr q25, [x23, x25]\n"
-    "ldr q20, [x22, x25]\n"
-    "ldr q24, [x21, x25]\n"
-    "ldr q16, [x20, x25]\n"
+    "add x20, x20, #0x20\n"
     "bgt 2b\n"
     "3:"  // 4-vectors of channels: 4 inputs tail
-    "umax v23.16b, v2.16b, v1.16b\n"
-    "umax v19.16b, v0.16b, v31.16b\n"
-    "umax v22.16b, v30.16b, v22.16b\n"
-    "umax v18.16b, v29.16b, v28.16b\n"
-    "umax v21.16b, v27.16b, v21.16b\n"
-    "umax v17.16b, v26.16b, v17.16b\n"
-    "umax v20.16b, v25.16b, v20.16b\n"
-    "umax v16.16b, v24.16b, v16.16b\n"
+    "umax v23.16b, v4.16b, v3.16b\n"
+    "umax v19.16b, v28.16b, v22.16b\n"
+    "umax v22.16b, v2.16b, v1.16b\n"
+    "umax v18.16b, v27.16b, v21.16b\n"
+    "umax v21.16b, v0.16b, v31.16b\n"
+    "umax v17.16b, v26.16b, v20.16b\n"
+    "umax v20.16b, v30.16b, v29.16b\n"
+    "umax v16.16b, v25.16b, v24.16b\n"
     "umax v19.16b, v23.16b, v19.16b\n"
     "umax v18.16b, v22.16b, v18.16b\n"
     "umax v17.16b, v21.16b, v17.16b\n"
     "umax v16.16b, v20.16b, v16.16b\n"
-    "umax v7.16b, v7.16b, v19.16b\n"
-    "umax v3.16b, v3.16b, v18.16b\n"
+    "umax v8.16b, v8.16b, v19.16b\n"
+    "umax v7.16b, v7.16b, v18.16b\n"
     "umax v6.16b, v6.16b, v17.16b\n"
     "umax v5.16b, v5.16b, v16.16b\n"
     "4:"  // 4-vectors of channels: After loop
-    "ands x20, %x[n_valid_cells], #0x3\n"
+    "ands x21, %x[n_valid_cells], #0x3\n"
     "beq 6f\n"
     "5:"  // 4-vectors of channels: Single input loop
-    "ldr x23, [x19], #0x8\n"
-    "ldr q2, [x23, x28]\n"
-    "subs x20, x20, #0x1\n"
+    "ldr x24, [x20], #0x8\n"
+    "ldr q4, [x24, x9]\n"
+    "subs x21, x21, #0x1\n"
+    "umax v8.16b, v8.16b, v4.16b\n"
+    "ldr q2, [x24, x28]\n"
+    "ldr q0, [x24, x27]\n"
     "umax v7.16b, v7.16b, v2.16b\n"
-    "ldr q30, [x23, x27]\n"
-    "ldr q27, [x23, x26]\n"
-    "umax v3.16b, v3.16b, v30.16b\n"
-    "umax v6.16b, v6.16b, v27.16b\n"
-    "ldr q25, [x23, x25]\n"
-    "umax v5.16b, v5.16b, v25.16b\n"
+    "umax v6.16b, v6.16b, v0.16b\n"
+    "ldr q30, [x24, x26]\n"
+    "umax v5.16b, v5.16b, v30.16b\n"
     "bgt 5b\n"
     "6:"  // 4-vectors of channels: Single input loop: End
-    "add x19, %x[quant_params], %[offsetof_qp_input_offset]\n"
-    "ld1r { v4.4s }, [x19]\n"
-    "uxtl v23.8h, v7.8b\n"
-    "uxtl2 v24.8h, v7.16b\n"
-    "uxtl v22.8h, v3.8b\n"
-    "uxtl2 v21.8h, v3.16b\n"
-    "add x19, %x[quant_params], %[offsetof_qp_per_layer_left_shift]\n"
-    "ld1r { v3.4s }, [x19]\n"
+    "add x20, %x[quant_params], %[offsetof_qp_input_offset]\n"
+    "ld1r { v4.4s }, [x20]\n"
+    "uxtl v23.8h, v8.8b\n"
+    "uxtl2 v24.8h, v8.16b\n"
+    "uxtl v22.8h, v7.8b\n"
+    "uxtl2 v21.8h, v7.16b\n"
+    "add x20, %x[quant_params], %[offsetof_qp_per_layer_left_shift]\n"
+    "ld1r { v3.4s }, [x20]\n"
     "uxtl v20.8h, v6.8b\n"
     "uxtl2 v17.8h, v6.16b\n"
-    "add x19, %x[quant_params], %[offsetof_qp_per_layer_mul]\n"
-    "ld1r { v2.4s }, [x19]\n"
+    "add x20, %x[quant_params], %[offsetof_qp_per_layer_mul]\n"
+    "ld1r { v2.4s }, [x20]\n"
     "uxtl v19.8h, v5.8b\n"
     "uxtl2 v18.8h, v5.16b\n"
-    "add x19, %x[quant_params], %[offsetof_qp_per_layer_right_shift]\n"
-    "ld1r { v1.4s }, [x19]\n"
+    "add x20, %x[quant_params], %[offsetof_qp_per_layer_right_shift]\n"
+    "ld1r { v1.4s }, [x20]\n"
     "neg v4.4s, v4.4s\n"
     "saddw v0.4s, v4.4s, v23.4h\n"
-    "add x19, %x[quant_params], %[offsetof_qp_output_offset]\n"
-    "ld1r { v16.4s }, [x19]\n"
+    "add x20, %x[quant_params], %[offsetof_qp_output_offset]\n"
+    "ld1r { v16.4s }, [x20]\n"
     "saddw2 v23.4s, v4.4s, v23.8h\n"
     "saddw v31.4s, v4.4s, v24.4h\n"
     "sub %x[n_channels], %x[n_channels], #0x40\n"
@@ -292,85 +292,85 @@ void a64_u8q_nhwc_max_generic_depthfirst_impl(
     "uzp1 v19.16b, v25.16b, v19.16b\n"
     "uzp1 v18.16b, v24.16b, v18.16b\n"
     "uzp1 v16.16b, v23.16b, v16.16b\n"
-    "str q16, [%x[outptr], x28]\n"
-    "add x28, x28, #0x40\n"
+    "str q16, [%x[outptr], x9]\n"
+    "add x9, x9, #0x40\n"
     "uzp1 v16.16b, v22.16b, v21.16b\n"
     "uzp1 v17.16b, v20.16b, v17.16b\n"
-    "str q16, [%x[outptr], x27]\n"
-    "add x27, x27, #0x40\n"
+    "str q16, [%x[outptr], x28]\n"
+    "add x28, x28, #0x40\n"
     "uzp1 v16.16b, v19.16b, v18.16b\n"
-    "str q17, [%x[outptr], x26]\n"
+    "str q17, [%x[outptr], x27]\n"
+    "add x27, x27, #0x40\n"
+    "str q16, [%x[outptr], x26]\n"
     "add x26, x26, #0x40\n"
-    "str q16, [%x[outptr], x25]\n"
-    "add x25, x25, #0x40\n"
     "bge 1b\n"
     "cbz %x[n_channels], 43f\n"
     "7:"  // Single vector of channels
     "cmp %x[n_channels], #0x10\n"
     "blt 14f\n"
     "8:"  // Single vector of channels: Loop
-    "lsr x24, %x[n_valid_cells], #0x2\n"
-    "movi v7.16b, #0x0\n"
-    "mov x19, %x[inptrs]\n"
-    "cbz x24, 11f\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
-    "subs x24, x24, #0x1\n"
-    "add x19, x19, #0x20\n"
-    "ldr q2, [x23, x28]\n"
-    "ldr q1, [x22, x28]\n"
-    "ldr q0, [x21, x28]\n"
-    "ldr q31, [x20, x28]\n"
+    "lsr x25, %x[n_valid_cells], #0x2\n"
+    "movi v8.16b, #0x0\n"
+    "mov x20, %x[inptrs]\n"
+    "cbz x25, 11f\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "ldr q4, [x24, x9]\n"
+    "subs x25, x25, #0x1\n"
+    "ldr q3, [x23, x9]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "add x20, x20, #0x20\n"
+    "ldr q28, [x22, x9]\n"
+    "ldr q22, [x21, x9]\n"
     "beq 10f\n"
     "9:"  // Single vector of channels: Loop: 4 inputs loop
-    "umax v23.16b, v2.16b, v1.16b\n"
-    "umax v19.16b, v0.16b, v31.16b\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
+    "umax v23.16b, v4.16b, v3.16b\n"
+    "umax v19.16b, v28.16b, v22.16b\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "ldr q4, [x24, x9]\n"
+    "ldr q3, [x23, x9]\n"
     "umax v19.16b, v23.16b, v19.16b\n"
-    "subs x24, x24, #0x1\n"
-    "umax v7.16b, v7.16b, v19.16b\n"
-    "add x19, x19, #0x20\n"
-    "ldr q2, [x23, x28]\n"
-    "ldr q1, [x22, x28]\n"
-    "ldr q0, [x21, x28]\n"
-    "ldr q31, [x20, x28]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "subs x25, x25, #0x1\n"
+    "ldr q28, [x22, x9]\n"
+    "ldr q22, [x21, x9]\n"
+    "umax v8.16b, v8.16b, v19.16b\n"
+    "add x20, x20, #0x20\n"
     "bgt 9b\n"
     "10:"  // Single vector of channels: Loop: 4 inputs tail
-    "umax v23.16b, v2.16b, v1.16b\n"
-    "umax v19.16b, v0.16b, v31.16b\n"
+    "umax v23.16b, v4.16b, v3.16b\n"
+    "umax v19.16b, v28.16b, v22.16b\n"
     "umax v19.16b, v23.16b, v19.16b\n"
-    "umax v7.16b, v7.16b, v19.16b\n"
+    "umax v8.16b, v8.16b, v19.16b\n"
     "11:"  // Single vector of channels: Loop: After loop
-    "ands x20, %x[n_valid_cells], #0x3\n"
+    "ands x21, %x[n_valid_cells], #0x3\n"
     "beq 13f\n"
     "12:"  // Single vector of channels: Loop: Single input loop
-    "ldr x23, [x19], #0x8\n"
-    "ldr q2, [x23, x28]\n"
-    "subs x20, x20, #0x1\n"
-    "umax v7.16b, v7.16b, v2.16b\n"
+    "ldr x24, [x20], #0x8\n"
+    "ldr q4, [x24, x9]\n"
+    "subs x21, x21, #0x1\n"
+    "umax v8.16b, v8.16b, v4.16b\n"
     "bgt 12b\n"
     "13:"  // Single vector of channels: Loop: Single input loop: End
-    "add x19, %x[quant_params], %[offsetof_qp_input_offset]\n"
-    "ld1r { v4.4s }, [x19]\n"
-    "uxtl v23.8h, v7.8b\n"
-    "uxtl2 v24.8h, v7.16b\n"
+    "add x20, %x[quant_params], %[offsetof_qp_input_offset]\n"
+    "ld1r { v4.4s }, [x20]\n"
+    "uxtl v23.8h, v8.8b\n"
+    "uxtl2 v24.8h, v8.16b\n"
     "neg v4.4s, v4.4s\n"
-    "add x19, %x[quant_params], %[offsetof_qp_per_layer_left_shift]\n"
+    "add x20, %x[quant_params], %[offsetof_qp_per_layer_left_shift]\n"
+    "ld1r { v3.4s }, [x20]\n"
     "saddw v0.4s, v4.4s, v23.4h\n"
-    "ld1r { v3.4s }, [x19]\n"
     "saddw2 v23.4s, v4.4s, v23.8h\n"
     "saddw v31.4s, v4.4s, v24.4h\n"
-    "add x19, %x[quant_params], %[offsetof_qp_per_layer_mul]\n"
-    "ld1r { v2.4s }, [x19]\n"
+    "add x20, %x[quant_params], %[offsetof_qp_per_layer_mul]\n"
+    "ld1r { v2.4s }, [x20]\n"
     "saddw2 v30.4s, v4.4s, v24.8h\n"
     "srshl v0.4s, v0.4s, v3.4s\n"
-    "add x19, %x[quant_params], %[offsetof_qp_per_layer_right_shift]\n"
-    "ld1r { v1.4s }, [x19]\n"
+    "add x20, %x[quant_params], %[offsetof_qp_per_layer_right_shift]\n"
+    "ld1r { v1.4s }, [x20]\n"
     "srshl v23.4s, v23.4s, v3.4s\n"
     "srshl v31.4s, v31.4s, v3.4s\n"
-    "add x19, %x[quant_params], %[offsetof_qp_output_offset]\n"
-    "ld1r { v16.4s }, [x19]\n"
+    "add x20, %x[quant_params], %[offsetof_qp_output_offset]\n"
+    "ld1r { v16.4s }, [x20]\n"
     "srshl v30.4s, v30.4s, v3.4s\n"
     "sqrdmulh v0.4s, v0.4s, v2.4s\n"
     "sub %x[n_channels], %x[n_channels], #0x10\n"
@@ -399,200 +399,200 @@ void a64_u8q_nhwc_max_generic_depthfirst_impl(
     "uzp1 v23.16b, v0.16b, v23.16b\n"
     "uzp1 v16.16b, v31.16b, v30.16b\n"
     "uzp1 v16.16b, v23.16b, v16.16b\n"
-    "str q16, [%x[outptr], x28]\n"
-    "add x28, x28, #0x10\n"
+    "str q16, [%x[outptr], x9]\n"
+    "add x9, x9, #0x10\n"
     "bge 8b\n"
     "cbz %x[n_channels], 43f\n"
     "14:"  // Oddments
-    "lsr x24, %x[n_valid_cells], #0x2\n"
-    "add %x[outptr], %x[outptr], x28\n"
-    "movi v7.16b, #0x0\n"
-    "mov x19, %x[inptrs]\n"
-    "cbz x24, 24f\n"
+    "lsr x25, %x[n_valid_cells], #0x2\n"
+    "add %x[outptr], %x[outptr], x9\n"
+    "movi v8.16b, #0x0\n"
+    "mov x20, %x[inptrs]\n"
+    "cbz x25, 24f\n"
     "15:"  // Oddments: 4 inputs loop
-    "ldp x23, x22, [x19, #0x0]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
-    "add x19, x19, #0x20\n"
-    "add x23, x23, x28\n"
-    "add x22, x22, x28\n"
-    "add x21, x21, x28\n"
-    "movi v2.16b, #0x0\n"
-    "movi v1.16b, #0x0\n"
-    "add x20, x20, x28\n"
-    "movi v0.16b, #0x0\n"
-    "movi v31.16b, #0x0\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "add x20, x20, #0x20\n"
+    "add x24, x24, x9\n"
+    "add x23, x23, x9\n"
+    "add x22, x22, x9\n"
+    "movi v4.16b, #0x0\n"
+    "movi v3.16b, #0x0\n"
+    "add x21, x21, x9\n"
+    "movi v28.16b, #0x0\n"
+    "movi v22.16b, #0x0\n"
     "tbz %x[n_channels], #3, 19f\n"
-    "ldr d2, [x23], #0x8\n"
-    "ldr d1, [x22], #0x8\n"
-    "ldr d0, [x21], #0x8\n"
-    "ldr d31, [x20], #0x8\n"
+    "ldr d4, [x24], #0x8\n"
+    "ldr d3, [x23], #0x8\n"
+    "ldr d28, [x22], #0x8\n"
+    "ldr d22, [x21], #0x8\n"
     "tbz %x[n_channels], #2, 17f\n"
-    "ld1 { v2.s }[2], [x23], #0x4\n"
-    "ld1 { v1.s }[2], [x22], #0x4\n"
-    "ld1 { v0.s }[2], [x21], #0x4\n"
-    "ld1 { v31.s }[2], [x20], #0x4\n"
+    "ld1 { v4.s }[2], [x24], #0x4\n"
+    "ld1 { v3.s }[2], [x23], #0x4\n"
+    "ld1 { v28.s }[2], [x22], #0x4\n"
+    "ld1 { v22.s }[2], [x21], #0x4\n"
     "tbz %x[n_channels], #1, 16f\n"
-    "ld1 { v2.h }[6], [x23], #0x2\n"
-    "ld1 { v1.h }[6], [x22], #0x2\n"
-    "ld1 { v0.h }[6], [x21], #0x2\n"
-    "ld1 { v31.h }[6], [x20], #0x2\n"
+    "ld1 { v4.h }[6], [x24], #0x2\n"
+    "ld1 { v3.h }[6], [x23], #0x2\n"
+    "ld1 { v28.h }[6], [x22], #0x2\n"
+    "ld1 { v22.h }[6], [x21], #0x2\n"
     "tbz %x[n_channels], #0, 23f\n"
-    "ld1 { v2.b }[14], [x23], #0x1\n"
-    "ld1 { v1.b }[14], [x22], #0x1\n"
-    "ld1 { v0.b }[14], [x21], #0x1\n"
-    "ld1 { v31.b }[14], [x20], #0x1\n"
+    "ld1 { v4.b }[14], [x24], #0x1\n"
+    "ld1 { v3.b }[14], [x23], #0x1\n"
+    "ld1 { v28.b }[14], [x22], #0x1\n"
+    "ld1 { v22.b }[14], [x21], #0x1\n"
     "b 23f\n"
     "16:"  // Oddments: 4 inputs loop: Load: Bit 3: Bit 2: Bit 1: Unset
     "tbz %x[n_channels], #0, 23f\n"
-    "ld1 { v2.b }[12], [x23], #0x1\n"
-    "ld1 { v1.b }[12], [x22], #0x1\n"
-    "ld1 { v0.b }[12], [x21], #0x1\n"
-    "ld1 { v31.b }[12], [x20], #0x1\n"
+    "ld1 { v4.b }[12], [x24], #0x1\n"
+    "ld1 { v3.b }[12], [x23], #0x1\n"
+    "ld1 { v28.b }[12], [x22], #0x1\n"
+    "ld1 { v22.b }[12], [x21], #0x1\n"
     "b 23f\n"
     "17:"  // Oddments: 4 inputs loop: Load: Bit 3: Bit 2: Unset
     "tbz %x[n_channels], #1, 18f\n"
-    "ld1 { v2.h }[4], [x23], #0x2\n"
-    "ld1 { v1.h }[4], [x22], #0x2\n"
-    "ld1 { v0.h }[4], [x21], #0x2\n"
-    "ld1 { v31.h }[4], [x20], #0x2\n"
+    "ld1 { v4.h }[4], [x24], #0x2\n"
+    "ld1 { v3.h }[4], [x23], #0x2\n"
+    "ld1 { v28.h }[4], [x22], #0x2\n"
+    "ld1 { v22.h }[4], [x21], #0x2\n"
     "tbz %x[n_channels], #0, 23f\n"
-    "ld1 { v2.b }[10], [x23], #0x1\n"
-    "ld1 { v1.b }[10], [x22], #0x1\n"
-    "ld1 { v0.b }[10], [x21], #0x1\n"
-    "ld1 { v31.b }[10], [x20], #0x1\n"
+    "ld1 { v4.b }[10], [x24], #0x1\n"
+    "ld1 { v3.b }[10], [x23], #0x1\n"
+    "ld1 { v28.b }[10], [x22], #0x1\n"
+    "ld1 { v22.b }[10], [x21], #0x1\n"
     "b 23f\n"
     "18:"  // Oddments: 4 inputs loop: Load: Bit 3: Bit 2: Unset: Bit 1: Unset
     "tbz %x[n_channels], #0, 23f\n"
-    "ld1 { v2.b }[8], [x23], #0x1\n"
-    "ld1 { v1.b }[8], [x22], #0x1\n"
-    "ld1 { v0.b }[8], [x21], #0x1\n"
-    "ld1 { v31.b }[8], [x20], #0x1\n"
+    "ld1 { v4.b }[8], [x24], #0x1\n"
+    "ld1 { v3.b }[8], [x23], #0x1\n"
+    "ld1 { v28.b }[8], [x22], #0x1\n"
+    "ld1 { v22.b }[8], [x21], #0x1\n"
     "b 23f\n"
     "19:"  // Oddments: 4 inputs loop: Load: Bit 3: Unset
     "tbz %x[n_channels], #2, 21f\n"
-    "ldr s2, [x23], #0x4\n"
-    "ldr s1, [x22], #0x4\n"
-    "ldr s0, [x21], #0x4\n"
-    "ldr s31, [x20], #0x4\n"
+    "ldr s4, [x24], #0x4\n"
+    "ldr s3, [x23], #0x4\n"
+    "ldr s28, [x22], #0x4\n"
+    "ldr s22, [x21], #0x4\n"
     "tbz %x[n_channels], #1, 20f\n"
-    "ld1 { v2.h }[2], [x23], #0x2\n"
-    "ld1 { v1.h }[2], [x22], #0x2\n"
-    "ld1 { v0.h }[2], [x21], #0x2\n"
-    "ld1 { v31.h }[2], [x20], #0x2\n"
+    "ld1 { v4.h }[2], [x24], #0x2\n"
+    "ld1 { v3.h }[2], [x23], #0x2\n"
+    "ld1 { v28.h }[2], [x22], #0x2\n"
+    "ld1 { v22.h }[2], [x21], #0x2\n"
     "tbz %x[n_channels], #0, 23f\n"
-    "ld1 { v2.b }[6], [x23], #0x1\n"
-    "ld1 { v1.b }[6], [x22], #0x1\n"
-    "ld1 { v0.b }[6], [x21], #0x1\n"
-    "ld1 { v31.b }[6], [x20], #0x1\n"
+    "ld1 { v4.b }[6], [x24], #0x1\n"
+    "ld1 { v3.b }[6], [x23], #0x1\n"
+    "ld1 { v28.b }[6], [x22], #0x1\n"
+    "ld1 { v22.b }[6], [x21], #0x1\n"
     "b 23f\n"
     "20:"  // Oddments: 4 inputs loop: Load: Bit 3: Unset: Bit 2: Bit 1: Unset
     "tbz %x[n_channels], #0, 23f\n"
-    "ld1 { v2.b }[4], [x23], #0x1\n"
-    "ld1 { v1.b }[4], [x22], #0x1\n"
-    "ld1 { v0.b }[4], [x21], #0x1\n"
-    "ld1 { v31.b }[4], [x20], #0x1\n"
+    "ld1 { v4.b }[4], [x24], #0x1\n"
+    "ld1 { v3.b }[4], [x23], #0x1\n"
+    "ld1 { v28.b }[4], [x22], #0x1\n"
+    "ld1 { v22.b }[4], [x21], #0x1\n"
     "b 23f\n"
     "21:"  // Oddments: 4 inputs loop: Load: Bit 3: Unset: Bit 2: Unset
     "tbz %x[n_channels], #1, 22f\n"
-    "ldr h2, [x23], #0x2\n"
-    "ldr h1, [x22], #0x2\n"
-    "ldr h0, [x21], #0x2\n"
-    "ldr h31, [x20], #0x2\n"
+    "ldr h4, [x24], #0x2\n"
+    "ldr h3, [x23], #0x2\n"
+    "ldr h28, [x22], #0x2\n"
+    "ldr h22, [x21], #0x2\n"
     "tbz %x[n_channels], #0, 23f\n"
-    "ld1 { v2.b }[2], [x23], #0x1\n"
-    "ld1 { v1.b }[2], [x22], #0x1\n"
-    "ld1 { v0.b }[2], [x21], #0x1\n"
-    "ld1 { v31.b }[2], [x20], #0x1\n"
+    "ld1 { v4.b }[2], [x24], #0x1\n"
+    "ld1 { v3.b }[2], [x23], #0x1\n"
+    "ld1 { v28.b }[2], [x22], #0x1\n"
+    "ld1 { v22.b }[2], [x21], #0x1\n"
     "b 23f\n"
     "22:"  // Oddments: 4 inputs loop: Load: Bit 3: Unset: Bit 2: Unset: Bit 1: Unset
     "tbz %x[n_channels], #0, 23f\n"
-    "ldr b2, [x23], #0x1\n"
-    "ldr b1, [x22], #0x1\n"
-    "ldr b0, [x21], #0x1\n"
-    "ldr b31, [x20], #0x1\n"
+    "ldr b4, [x24], #0x1\n"
+    "ldr b3, [x23], #0x1\n"
+    "ldr b28, [x22], #0x1\n"
+    "ldr b22, [x21], #0x1\n"
     "23:"  // Oddments: 4 inputs loop: Load: Bit 3: End
-    "umax v23.16b, v2.16b, v1.16b\n"
-    "umax v19.16b, v0.16b, v31.16b\n"
-    "subs x24, x24, #0x1\n"
+    "umax v23.16b, v4.16b, v3.16b\n"
+    "umax v19.16b, v28.16b, v22.16b\n"
+    "subs x25, x25, #0x1\n"
     "umax v19.16b, v23.16b, v19.16b\n"
-    "umax v7.16b, v7.16b, v19.16b\n"
+    "umax v8.16b, v8.16b, v19.16b\n"
     "bgt 15b\n"
     "24:"  // Oddments: After loop
-    "ands x20, %x[n_valid_cells], #0x3\n"
+    "ands x21, %x[n_valid_cells], #0x3\n"
     "beq 34f\n"
     "25:"  // Oddments: Single input loop
-    "ldr x23, [x19], #0x8\n"
-    "add x23, x23, x28\n"
-    "movi v2.16b, #0x0\n"
+    "ldr x24, [x20], #0x8\n"
+    "add x24, x24, x9\n"
+    "movi v4.16b, #0x0\n"
     "tbz %x[n_channels], #3, 29f\n"
-    "ldr d2, [x23], #0x8\n"
+    "ldr d4, [x24], #0x8\n"
     "tbz %x[n_channels], #2, 27f\n"
-    "ld1 { v2.s }[2], [x23], #0x4\n"
+    "ld1 { v4.s }[2], [x24], #0x4\n"
     "tbz %x[n_channels], #1, 26f\n"
-    "ld1 { v2.h }[6], [x23], #0x2\n"
+    "ld1 { v4.h }[6], [x24], #0x2\n"
     "tbz %x[n_channels], #0, 33f\n"
-    "ld1 { v2.b }[14], [x23], #0x1\n"
+    "ld1 { v4.b }[14], [x24], #0x1\n"
     "b 33f\n"
     "26:"  // Oddments: Single input loop: Load: Bit 3: Bit 2: Bit 1: Unset
     "tbz %x[n_channels], #0, 33f\n"
-    "ld1 { v2.b }[12], [x23], #0x1\n"
+    "ld1 { v4.b }[12], [x24], #0x1\n"
     "b 33f\n"
     "27:"  // Oddments: Single input loop: Load: Bit 3: Bit 2: Unset
     "tbz %x[n_channels], #1, 28f\n"
-    "ld1 { v2.h }[4], [x23], #0x2\n"
+    "ld1 { v4.h }[4], [x24], #0x2\n"
     "tbz %x[n_channels], #0, 33f\n"
-    "ld1 { v2.b }[10], [x23], #0x1\n"
+    "ld1 { v4.b }[10], [x24], #0x1\n"
     "b 33f\n"
     "28:"  // Oddments: Single input loop: Load: Bit 3: Bit 2: Unset: Bit 1: Unset
     "tbz %x[n_channels], #0, 33f\n"
-    "ld1 { v2.b }[8], [x23], #0x1\n"
+    "ld1 { v4.b }[8], [x24], #0x1\n"
     "b 33f\n"
     "29:"  // Oddments: Single input loop: Load: Bit 3: Unset
     "tbz %x[n_channels], #2, 31f\n"
-    "ldr s2, [x23], #0x4\n"
+    "ldr s4, [x24], #0x4\n"
     "tbz %x[n_channels], #1, 30f\n"
-    "ld1 { v2.h }[2], [x23], #0x2\n"
+    "ld1 { v4.h }[2], [x24], #0x2\n"
     "tbz %x[n_channels], #0, 33f\n"
-    "ld1 { v2.b }[6], [x23], #0x1\n"
+    "ld1 { v4.b }[6], [x24], #0x1\n"
     "b 33f\n"
     "30:"  // Oddments: Single input loop: Load: Bit 3: Unset: Bit 2: Bit 1: Unset
     "tbz %x[n_channels], #0, 33f\n"
-    "ld1 { v2.b }[4], [x23], #0x1\n"
+    "ld1 { v4.b }[4], [x24], #0x1\n"
     "b 33f\n"
     "31:"  // Oddments: Single input loop: Load: Bit 3: Unset: Bit 2: Unset
     "tbz %x[n_channels], #1, 32f\n"
-    "ldr h2, [x23], #0x2\n"
+    "ldr h4, [x24], #0x2\n"
     "tbz %x[n_channels], #0, 33f\n"
-    "ld1 { v2.b }[2], [x23], #0x1\n"
+    "ld1 { v4.b }[2], [x24], #0x1\n"
     "b 33f\n"
     "32:"  // Oddments: Single input loop: Load: Bit 3: Unset: Bit 2: Unset: Bit 1: Unset
     "tbz %x[n_channels], #0, 33f\n"
-    "ldr b2, [x23], #0x1\n"
+    "ldr b4, [x24], #0x1\n"
     "33:"  // Oddments: Single input loop: Load: Bit 3: End
-    "subs x20, x20, #0x1\n"
-    "umax v7.16b, v7.16b, v2.16b\n"
+    "subs x21, x21, #0x1\n"
+    "umax v8.16b, v8.16b, v4.16b\n"
     "bgt 25b\n"
     "34:"  // Oddments: Single input loop: End
-    "add x19, %x[quant_params], %[offsetof_qp_input_offset]\n"
-    "ld1r { v4.4s }, [x19]\n"
-    "uxtl v23.8h, v7.8b\n"
-    "uxtl2 v24.8h, v7.16b\n"
+    "add x20, %x[quant_params], %[offsetof_qp_input_offset]\n"
+    "ld1r { v4.4s }, [x20]\n"
+    "uxtl v23.8h, v8.8b\n"
+    "uxtl2 v24.8h, v8.16b\n"
     "neg v4.4s, v4.4s\n"
-    "add x19, %x[quant_params], %[offsetof_qp_per_layer_left_shift]\n"
+    "add x20, %x[quant_params], %[offsetof_qp_per_layer_left_shift]\n"
+    "ld1r { v3.4s }, [x20]\n"
     "saddw v0.4s, v4.4s, v23.4h\n"
-    "ld1r { v3.4s }, [x19]\n"
     "saddw2 v23.4s, v4.4s, v23.8h\n"
     "saddw v31.4s, v4.4s, v24.4h\n"
-    "add x19, %x[quant_params], %[offsetof_qp_per_layer_mul]\n"
-    "ld1r { v2.4s }, [x19]\n"
+    "add x20, %x[quant_params], %[offsetof_qp_per_layer_mul]\n"
+    "ld1r { v2.4s }, [x20]\n"
     "saddw2 v30.4s, v4.4s, v24.8h\n"
     "srshl v0.4s, v0.4s, v3.4s\n"
-    "add x19, %x[quant_params], %[offsetof_qp_per_layer_right_shift]\n"
-    "ld1r { v1.4s }, [x19]\n"
+    "add x20, %x[quant_params], %[offsetof_qp_per_layer_right_shift]\n"
+    "ld1r { v1.4s }, [x20]\n"
     "srshl v23.4s, v23.4s, v3.4s\n"
     "srshl v31.4s, v31.4s, v3.4s\n"
-    "add x19, %x[quant_params], %[offsetof_qp_output_offset]\n"
-    "ld1r { v16.4s }, [x19]\n"
+    "add x20, %x[quant_params], %[offsetof_qp_output_offset]\n"
+    "ld1r { v16.4s }, [x20]\n"
     "srshl v30.4s, v30.4s, v3.4s\n"
     "sqrdmulh v0.4s, v0.4s, v2.4s\n"
     "sqrdmulh v23.4s, v23.4s, v2.4s\n"
@@ -667,7 +667,7 @@ void a64_u8q_nhwc_max_generic_depthfirst_impl(
     "43:"  // End
     : [n_channels] "+&r" (n_channels), [outptr] "+&r" (outptr)
     : [inptrs] "r" (inptrs), [n_valid_cells] "r" (n_valid_cells), [offsetof_qp_input_offset] "I" (offsetof(Requantize32, input_offset)), [offsetof_qp_output_offset] "I" (offsetof(Requantize32, output_offset)), [offsetof_qp_per_layer_left_shift] "I" (offsetof(Requantize32, per_layer_left_shift)), [offsetof_qp_per_layer_mul] "I" (offsetof(Requantize32, per_layer_mul)), [offsetof_qp_per_layer_right_shift] "I" (offsetof(Requantize32, per_layer_right_shift)), [quant_params] "r" (&qp)
-    : "cc", "memory", "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28"
+    : "cc", "memory", "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", "x9", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28"
   );
 }
 
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp16_nhwc_avg_3x3_s1_output2x2_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp16_nhwc_avg_3x3_s1_output2x2_depthfirst/generic.cpp
index a8b6f185be..bce623acd1 100644
--- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp16_nhwc_avg_3x3_s1_output2x2_depthfirst/generic.cpp
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp16_nhwc_avg_3x3_s1_output2x2_depthfirst/generic.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2022 Arm Limited.
+ * Copyright (c) 2022-2023 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -82,97 +82,97 @@ void sme_fp16_nhwc_avg_3x3_s1_output2x2_depthfirst_impl(
                         pad_left, pad_top, pad_right, pad_bottom);
 
   __asm__ __volatile__(
-    "ldr x20, [%x[args], %[offsetof_outptrs]]\n"
+    "ldr x21, [%x[args], %[offsetof_outptrs]]\n"
     ".inst 0xd503477f  // SMSTART ZA\n"
-    "mov x4, #0x0\n"
-    "mov x19, #0x4\n"
-    "ldr x5, [%x[args], %[offsetof_inptrs]]\n"
-    "whilelt p0.h, XZR, x19\n"
-    "add x19, %x[args], %[offsetof_rescale]\n"
-    "ld1rqh { z4.h }, p0/Z, [x19]\n"
-    "ldr x6, [%x[args], %[offsetof_n_channels]]\n"
-    "whilelt p1.h, x4, x6\n"
-    "mov x7, #0x0\n"
-    "ldp x8, x17, [x20, #0x0]\n"
-    "ldp x16, x15, [x20, #0x10]\n"
-    "ldp x14, x13, [x5, #0x0]\n"
-    "ld1h { z3.h }, p1/Z, [x13, x4, LSL #1]\n"
-    "ldp x12, x11, [x5, #0x10]\n"
-    "ld1h { z2.h }, p1/Z, [x12, x4, LSL #1]\n"
-    "ldp x10, x9, [x5, #0x20]\n"
-    "ld1h { z1.h }, p1/Z, [x9, x4, LSL #1]\n"
-    "ldp x28, x27, [x5, #0x30]\n"
-    "ld1h { z0.h }, p1/Z, [x28, x4, LSL #1]\n"
-    "ldp x26, x25, [x5, #0x40]\n"
-    "ld1h { z31.h }, p1/Z, [x25, x4, LSL #1]\n"
-    "ldp x24, x23, [x5, #0x50]\n"
-    "ld1h { z30.h }, p1/Z, [x24, x4, LSL #1]\n"
-    "ldp x22, x21, [x5, #0x60]\n"
-    "ld1h { z29.h }, p1/Z, [x10, x4, LSL #1]\n"
-    "ldp x20, x19, [x5, #0x70]\n"
-    "ld1h { z28.h }, p1/Z, [x26, x4, LSL #1]\n"
-    "ld1h { z27.h }, p1/Z, [x27, x4, LSL #1]\n"
-    "ld1h { z22.h }, p1/Z, [x23, x4, LSL #1]\n"
-    "ld1h { z21.h }, p1/Z, [x21, x4, LSL #1]\n"
-    "ld1h { z20.h }, p1/Z, [x20, x4, LSL #1]\n"
-    "ld1h { z26.h }, p1/Z, [x14, x4, LSL #1]\n"
-    "ld1h { z25.h }, p1/Z, [x11, x4, LSL #1]\n"
-    "ld1h { z24.h }, p1/Z, [x22, x4, LSL #1]\n"
-    "ld1h { z23.h }, p1/Z, [x19, x4, LSL #1]\n"
-    "incw x4\n"
-    "whilelt p1.h, x4, x6\n"
+    "mov x3, #0x0\n"
+    "mov x20, #0x4\n"
+    "ldr x4, [%x[args], %[offsetof_inptrs]]\n"
+    "whilelt p0.h, XZR, x20\n"
+    "add x20, %x[args], %[offsetof_rescale]\n"
+    "ld1rqh { z4.h }, p0/Z, [x20]\n"
+    "ldr x5, [%x[args], %[offsetof_n_channels]]\n"
+    "whilelt p1.h, x3, x5\n"
+    "mov x6, #0x0\n"
+    "ldp x7, x8, [x21, #0x0]\n"
+    "ldp x17, x16, [x21, #0x10]\n"
+    "ldp x15, x14, [x4, #0x0]\n"
+    "ld1h { z3.h }, p1/Z, [x14, x3, LSL #1]\n"
+    "ldp x13, x12, [x4, #0x10]\n"
+    "ld1h { z2.h }, p1/Z, [x13, x3, LSL #1]\n"
+    "ldp x11, x10, [x4, #0x20]\n"
+    "ld1h { z1.h }, p1/Z, [x10, x3, LSL #1]\n"
+    "ldp x9, x28, [x4, #0x30]\n"
+    "ld1h { z0.h }, p1/Z, [x9, x3, LSL #1]\n"
+    "ldp x27, x26, [x4, #0x40]\n"
+    "ld1h { z31.h }, p1/Z, [x26, x3, LSL #1]\n"
+    "ldp x25, x24, [x4, #0x50]\n"
+    "ld1h { z30.h }, p1/Z, [x25, x3, LSL #1]\n"
+    "ldp x23, x22, [x4, #0x60]\n"
+    "ld1h { z29.h }, p1/Z, [x11, x3, LSL #1]\n"
+    "ldp x21, x20, [x4, #0x70]\n"
+    "ld1h { z28.h }, p1/Z, [x27, x3, LSL #1]\n"
+    "ld1h { z27.h }, p1/Z, [x28, x3, LSL #1]\n"
+    "ld1h { z22.h }, p1/Z, [x24, x3, LSL #1]\n"
+    "ld1h { z21.h }, p1/Z, [x22, x3, LSL #1]\n"
+    "ld1h { z20.h }, p1/Z, [x21, x3, LSL #1]\n"
+    "ld1h { z26.h }, p1/Z, [x15, x3, LSL #1]\n"
+    "ld1h { z25.h }, p1/Z, [x12, x3, LSL #1]\n"
+    "ld1h { z24.h }, p1/Z, [x23, x3, LSL #1]\n"
+    "ld1h { z23.h }, p1/Z, [x20, x3, LSL #1]\n"
+    "incw x3\n"
+    "whilelt p1.h, x3, x5\n"
     "b.none 2f\n"
     "1:"  // Vector: Loop
     "fadd z17.h, z1.h, z0.h\n"
     "fadd z16.h, z31.h, z30.h\n"
-    "ld1h { z1.h }, p1/Z, [x9, x4, LSL #1]\n"
-    "whilelt p0.h, x7, x6\n"
+    "ld1h { z1.h }, p1/Z, [x10, x3, LSL #1]\n"
+    "whilelt p0.h, x6, x5\n"
     "fadd z19.h, z17.h, z16.h\n"
     "fadd z18.h, z3.h, z2.h\n"
-    "ld1h { z0.h }, p1/Z, [x28, x4, LSL #1]\n"
+    "ld1h { z0.h }, p1/Z, [x9, x3, LSL #1]\n"
     "fadd z17.h, z29.h, z28.h\n"
     "fadd z22.h, z27.h, z22.h\n"
-    "ld1h { z31.h }, p1/Z, [x25, x4, LSL #1]\n"
+    "ld1h { z31.h }, p1/Z, [x26, x3, LSL #1]\n"
     "fadd z16.h, z21.h, z20.h\n"
     "fadd z21.h, z18.h, z19.h\n"
-    "ld1h { z30.h }, p1/Z, [x24, x4, LSL #1]\n"
+    "ld1h { z30.h }, p1/Z, [x25, x3, LSL #1]\n"
     "fadd z20.h, z16.h, z19.h\n"
     "fadd z19.h, z26.h, z17.h\n"
-    "ld1h { z3.h }, p1/Z, [x13, x4, LSL #1]\n"
+    "ld1h { z3.h }, p1/Z, [x14, x3, LSL #1]\n"
     "fadd z18.h, z25.h, z22.h\n"
     "fadd z17.h, z24.h, z17.h\n"
-    "ld1h { z2.h }, p1/Z, [x12, x4, LSL #1]\n"
+    "ld1h { z2.h }, p1/Z, [x13, x3, LSL #1]\n"
     "fadd z16.h, z23.h, z22.h\n"
-    "fadd z19.h, z19.h, z21.h\n"
-    "ld1h { z29.h }, p1/Z, [x10, x4, LSL #1]\n"
-    "fadd z18.h, z18.h, z21.h\n"
+    "fadd z19.h, z21.h, z19.h\n"
+    "ld1h { z29.h }, p1/Z, [x11, x3, LSL #1]\n"
+    "fadd z18.h, z21.h, z18.h\n"
     "fadd z17.h, z17.h, z20.h\n"
-    "ld1h { z28.h }, p1/Z, [x26, x4, LSL #1]\n"
+    "ld1h { z28.h }, p1/Z, [x27, x3, LSL #1]\n"
     "fadd z16.h, z16.h, z20.h\n"
-    "ld1h { z27.h }, p1/Z, [x27, x4, LSL #1]\n"
+    "ld1h { z27.h }, p1/Z, [x28, x3, LSL #1]\n"
     "fmul z19.h, z19.h, z4.h[0]\n"
-    "ld1h { z22.h }, p1/Z, [x23, x4, LSL #1]\n"
+    "ld1h { z22.h }, p1/Z, [x24, x3, LSL #1]\n"
     "fmul z18.h, z18.h, z4.h[1]\n"
     "fmul z17.h, z17.h, z4.h[2]\n"
-    "ld1h { z21.h }, p1/Z, [x21, x4, LSL #1]\n"
+    "ld1h { z21.h }, p1/Z, [x22, x3, LSL #1]\n"
     "fmul z16.h, z16.h, z4.h[3]\n"
-    "st1h { z19.h }, p0, [x8, x7, LSL #1]\n"
-    "ld1h { z20.h }, p1/Z, [x20, x4, LSL #1]\n"
-    "st1h { z18.h }, p0, [x17, x7, LSL #1]\n"
-    "ld1h { z26.h }, p1/Z, [x14, x4, LSL #1]\n"
-    "st1h { z17.h }, p0, [x16, x7, LSL #1]\n"
-    "ld1h { z25.h }, p1/Z, [x11, x4, LSL #1]\n"
-    "st1h { z16.h }, p0, [x15, x7, LSL #1]\n"
-    "incw x7\n"
-    "ld1h { z24.h }, p1/Z, [x22, x4, LSL #1]\n"
-    "ld1h { z23.h }, p1/Z, [x19, x4, LSL #1]\n"
-    "incw x4\n"
-    "whilelt p1.h, x4, x6\n"
+    "st1h { z19.h }, p0, [x7, x6, LSL #1]\n"
+    "ld1h { z20.h }, p1/Z, [x21, x3, LSL #1]\n"
+    "st1h { z18.h }, p0, [x8, x6, LSL #1]\n"
+    "ld1h { z26.h }, p1/Z, [x15, x3, LSL #1]\n"
+    "st1h { z17.h }, p0, [x17, x6, LSL #1]\n"
+    "ld1h { z25.h }, p1/Z, [x12, x3, LSL #1]\n"
+    "st1h { z16.h }, p0, [x16, x6, LSL #1]\n"
+    "incw x6\n"
+    "ld1h { z24.h }, p1/Z, [x23, x3, LSL #1]\n"
+    "ld1h { z23.h }, p1/Z, [x20, x3, LSL #1]\n"
+    "incw x3\n"
+    "whilelt p1.h, x3, x5\n"
     "b.any 1b\n"
     "2:"  // Vector: Tail
     "fadd z17.h, z1.h, z0.h\n"
     "fadd z16.h, z31.h, z30.h\n"
-    "whilelt p0.h, x7, x6\n"
+    "whilelt p0.h, x6, x5\n"
     "fadd z19.h, z17.h, z16.h\n"
     "fadd z18.h, z3.h, z2.h\n"
     "fadd z17.h, z29.h, z28.h\n"
@@ -184,22 +184,22 @@ void sme_fp16_nhwc_avg_3x3_s1_output2x2_depthfirst_impl(
     "fadd z18.h, z25.h, z22.h\n"
     "fadd z17.h, z24.h, z17.h\n"
     "fadd z16.h, z23.h, z22.h\n"
-    "fadd z19.h, z19.h, z21.h\n"
-    "fadd z18.h, z18.h, z21.h\n"
+    "fadd z19.h, z21.h, z19.h\n"
+    "fadd z18.h, z21.h, z18.h\n"
     "fadd z17.h, z17.h, z20.h\n"
     "fadd z16.h, z16.h, z20.h\n"
     "fmul z19.h, z19.h, z4.h[0]\n"
-    "st1h { z19.h }, p0, [x8, x7, LSL #1]\n"
+    "st1h { z19.h }, p0, [x7, x6, LSL #1]\n"
     "fmul z18.h, z18.h, z4.h[1]\n"
     "fmul z17.h, z17.h, z4.h[2]\n"
-    "st1h { z18.h }, p0, [x17, x7, LSL #1]\n"
+    "st1h { z18.h }, p0, [x8, x6, LSL #1]\n"
     "fmul z16.h, z16.h, z4.h[3]\n"
-    "st1h { z17.h }, p0, [x16, x7, LSL #1]\n"
-    "st1h { z16.h }, p0, [x15, x7, LSL #1]\n"
+    "st1h { z17.h }, p0, [x17, x6, LSL #1]\n"
+    "st1h { z16.h }, p0, [x16, x6, LSL #1]\n"
     ".inst 0xd503467f  // SMSTOP\n"
     :
     : [args] "r" (&args), [offsetof_inptrs] "I" (offsetof(KernelArgs, inptrs)), [offsetof_n_channels] "I" (offsetof(KernelArgs, n_channels)), [offsetof_outptrs] "I" (offsetof(KernelArgs, outptrs)), [offsetof_rescale] "I" (offsetof(KernelArgs, rescale_vals))
-    : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x4", "x5", "x6", "x7", "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x17", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+    : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x3", "x4", "x5", "x6", "x7", "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x17", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
   );
 }
 
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp16_nhwc_avg_generic_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp16_nhwc_avg_generic_depthfirst/generic.cpp
index 2c1e698ade..c43da42d9e 100644
--- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp16_nhwc_avg_generic_depthfirst/generic.cpp
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp16_nhwc_avg_generic_depthfirst/generic.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2022 Arm Limited.
+ * Copyright (c) 2022-2023 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -42,83 +42,83 @@ void sme_fp16_nhwc_avg_generic_depthfirst_impl(
 
   __asm__ __volatile__(
     ".inst 0xd503477f  // SMSTART ZA\n"
-    "mov x28, #0x0\n"
-    "cnth x27\n"
-    "cnth x26, ALL, MUL #2\n"
-    "cnth x25, ALL, MUL #3\n"
+    "mov x9, #0x0\n"
+    "cnth x28\n"
+    "cnth x27, ALL, MUL #2\n"
+    "cnth x26, ALL, MUL #3\n"
     "ptrue p0.b\n"
-    "whilelt p3.h, x28, %x[n_channels]\n"
+    "whilelt p3.h, x9, %x[n_channels]\n"
     "ld1rh { z6.h }, p0/Z, [%x[rescale_ptr]]\n"
-    "whilelt p2.h, x27, %x[n_channels]\n"
-    "whilelt p1.h, x26, %x[n_channels]\n"
-    "whilelt p0.h, x25, %x[n_channels]\n"
+    "whilelt p2.h, x28, %x[n_channels]\n"
+    "whilelt p1.h, x27, %x[n_channels]\n"
+    "whilelt p0.h, x26, %x[n_channels]\n"
     "b.none 7f\n"
     "1:"  // 4-vectors of channels
-    "lsr x24, %x[n_valid_cells], #0x2\n"
+    "lsr x25, %x[n_valid_cells], #0x2\n"
     "mov z5.b, #0x0\n"
     "mov z4.b, #0x0\n"
-    "mov x19, %x[inptrs]\n"
+    "mov x20, %x[inptrs]\n"
     "mov z3.b, #0x0\n"
     "mov z2.b, #0x0\n"
-    "cbz x24, 4f\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "subs x24, x24, #0x1\n"
-    "ld1h { z1.h }, p3/Z, [x23, x28, LSL #1]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
-    "add x19, x19, #0x20\n"
-    "ld1h { z0.h }, p3/Z, [x22, x28, LSL #1]\n"
-    "ld1h { z31.h }, p3/Z, [x21, x28, LSL #1]\n"
-    "ld1h { z30.h }, p3/Z, [x20, x28, LSL #1]\n"
-    "ld1h { z29.h }, p2/Z, [x23, x27, LSL #1]\n"
-    "ld1h { z22.h }, p2/Z, [x22, x27, LSL #1]\n"
-    "ld1h { z28.h }, p2/Z, [x21, x27, LSL #1]\n"
-    "ld1h { z18.h }, p2/Z, [x20, x27, LSL #1]\n"
-    "ld1h { z27.h }, p1/Z, [x23, x26, LSL #1]\n"
-    "ld1h { z21.h }, p1/Z, [x22, x26, LSL #1]\n"
-    "ld1h { z26.h }, p1/Z, [x21, x26, LSL #1]\n"
-    "ld1h { z17.h }, p1/Z, [x20, x26, LSL #1]\n"
-    "ld1h { z25.h }, p0/Z, [x23, x25, LSL #1]\n"
-    "ld1h { z20.h }, p0/Z, [x22, x25, LSL #1]\n"
-    "ld1h { z24.h }, p0/Z, [x21, x25, LSL #1]\n"
-    "ld1h { z16.h }, p0/Z, [x20, x25, LSL #1]\n"
+    "cbz x25, 4f\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "subs x25, x25, #0x1\n"
+    "ld1h { z1.h }, p3/Z, [x24, x9, LSL #1]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "add x20, x20, #0x20\n"
+    "ld1h { z0.h }, p3/Z, [x23, x9, LSL #1]\n"
+    "ld1h { z31.h }, p3/Z, [x22, x9, LSL #1]\n"
+    "ld1h { z30.h }, p3/Z, [x21, x9, LSL #1]\n"
+    "ld1h { z29.h }, p2/Z, [x24, x28, LSL #1]\n"
+    "ld1h { z22.h }, p2/Z, [x23, x28, LSL #1]\n"
+    "ld1h { z28.h }, p2/Z, [x22, x28, LSL #1]\n"
+    "ld1h { z18.h }, p2/Z, [x21, x28, LSL #1]\n"
+    "ld1h { z27.h }, p1/Z, [x24, x27, LSL #1]\n"
+    "ld1h { z21.h }, p1/Z, [x23, x27, LSL #1]\n"
+    "ld1h { z26.h }, p1/Z, [x22, x27, LSL #1]\n"
+    "ld1h { z17.h }, p1/Z, [x21, x27, LSL #1]\n"
+    "ld1h { z25.h }, p0/Z, [x24, x26, LSL #1]\n"
+    "ld1h { z20.h }, p0/Z, [x23, x26, LSL #1]\n"
+    "ld1h { z24.h }, p0/Z, [x22, x26, LSL #1]\n"
+    "ld1h { z16.h }, p0/Z, [x21, x26, LSL #1]\n"
     "beq 3f\n"
     "2:"  // 4-vectors of channels: 4 inputs loop
     "fadd z23.h, z1.h, z0.h\n"
     "fadd z19.h, z31.h, z30.h\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "subs x24, x24, #0x1\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "subs x25, x25, #0x1\n"
     "fadd z22.h, z29.h, z22.h\n"
     "fadd z18.h, z28.h, z18.h\n"
-    "ldp x21, x20, [x19, #0x10]\n"
-    "add x19, x19, #0x20\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "add x20, x20, #0x20\n"
     "fadd z21.h, z27.h, z21.h\n"
     "fadd z17.h, z26.h, z17.h\n"
-    "ld1h { z1.h }, p3/Z, [x23, x28, LSL #1]\n"
+    "ld1h { z1.h }, p3/Z, [x24, x9, LSL #1]\n"
     "fadd z20.h, z25.h, z20.h\n"
     "fadd z16.h, z24.h, z16.h\n"
-    "ld1h { z0.h }, p3/Z, [x22, x28, LSL #1]\n"
+    "ld1h { z0.h }, p3/Z, [x23, x9, LSL #1]\n"
     "fadd z19.h, z23.h, z19.h\n"
     "fadd z18.h, z22.h, z18.h\n"
-    "ld1h { z31.h }, p3/Z, [x21, x28, LSL #1]\n"
+    "ld1h { z31.h }, p3/Z, [x22, x9, LSL #1]\n"
     "fadd z17.h, z21.h, z17.h\n"
     "fadd z16.h, z20.h, z16.h\n"
-    "ld1h { z30.h }, p3/Z, [x20, x28, LSL #1]\n"
+    "ld1h { z30.h }, p3/Z, [x21, x9, LSL #1]\n"
     "fadd z5.h, z5.h, z19.h\n"
     "fadd z4.h, z4.h, z18.h\n"
-    "ld1h { z29.h }, p2/Z, [x23, x27, LSL #1]\n"
+    "ld1h { z29.h }, p2/Z, [x24, x28, LSL #1]\n"
     "fadd z3.h, z3.h, z17.h\n"
     "fadd z2.h, z2.h, z16.h\n"
-    "ld1h { z22.h }, p2/Z, [x22, x27, LSL #1]\n"
-    "ld1h { z28.h }, p2/Z, [x21, x27, LSL #1]\n"
-    "ld1h { z18.h }, p2/Z, [x20, x27, LSL #1]\n"
-    "ld1h { z27.h }, p1/Z, [x23, x26, LSL #1]\n"
-    "ld1h { z21.h }, p1/Z, [x22, x26, LSL #1]\n"
-    "ld1h { z26.h }, p1/Z, [x21, x26, LSL #1]\n"
-    "ld1h { z17.h }, p1/Z, [x20, x26, LSL #1]\n"
-    "ld1h { z25.h }, p0/Z, [x23, x25, LSL #1]\n"
-    "ld1h { z20.h }, p0/Z, [x22, x25, LSL #1]\n"
-    "ld1h { z24.h }, p0/Z, [x21, x25, LSL #1]\n"
-    "ld1h { z16.h }, p0/Z, [x20, x25, LSL #1]\n"
+    "ld1h { z22.h }, p2/Z, [x23, x28, LSL #1]\n"
+    "ld1h { z28.h }, p2/Z, [x22, x28, LSL #1]\n"
+    "ld1h { z18.h }, p2/Z, [x21, x28, LSL #1]\n"
+    "ld1h { z27.h }, p1/Z, [x24, x27, LSL #1]\n"
+    "ld1h { z21.h }, p1/Z, [x23, x27, LSL #1]\n"
+    "ld1h { z26.h }, p1/Z, [x22, x27, LSL #1]\n"
+    "ld1h { z17.h }, p1/Z, [x21, x27, LSL #1]\n"
+    "ld1h { z25.h }, p0/Z, [x24, x26, LSL #1]\n"
+    "ld1h { z20.h }, p0/Z, [x23, x26, LSL #1]\n"
+    "ld1h { z24.h }, p0/Z, [x22, x26, LSL #1]\n"
+    "ld1h { z16.h }, p0/Z, [x21, x26, LSL #1]\n"
     "bgt 2b\n"
     "3:"  // 4-vectors of channels: 4 inputs tail
     "fadd z23.h, z1.h, z0.h\n"
@@ -138,65 +138,65 @@ void sme_fp16_nhwc_avg_generic_depthfirst_impl(
     "fadd z3.h, z3.h, z17.h\n"
     "fadd z2.h, z2.h, z16.h\n"
     "4:"  // 4-vectors of channels: After loop
-    "ands x20, %x[n_valid_cells], #0x3\n"
+    "ands x21, %x[n_valid_cells], #0x3\n"
     "beq 6f\n"
     "5:"  // 4-vectors of channels: Single input loop
-    "ldr x23, [x19], #0x8\n"
-    "ld1h { z1.h }, p3/Z, [x23, x28, LSL #1]\n"
-    "subs x20, x20, #0x1\n"
+    "ldr x24, [x20], #0x8\n"
+    "ld1h { z1.h }, p3/Z, [x24, x9, LSL #1]\n"
+    "subs x21, x21, #0x1\n"
     "fadd z5.h, z5.h, z1.h\n"
-    "ld1h { z29.h }, p2/Z, [x23, x27, LSL #1]\n"
+    "ld1h { z29.h }, p2/Z, [x24, x28, LSL #1]\n"
     "fadd z4.h, z4.h, z29.h\n"
-    "ld1h { z27.h }, p1/Z, [x23, x26, LSL #1]\n"
+    "ld1h { z27.h }, p1/Z, [x24, x27, LSL #1]\n"
     "fadd z3.h, z3.h, z27.h\n"
-    "ld1h { z25.h }, p0/Z, [x23, x25, LSL #1]\n"
+    "ld1h { z25.h }, p0/Z, [x24, x26, LSL #1]\n"
     "fadd z2.h, z2.h, z25.h\n"
     "bgt 5b\n"
     "6:"  // 4-vectors of channels: Single input loop: End
     "fmul z5.h, z5.h, z6.h\n"
     "fmul z4.h, z4.h, z6.h\n"
-    "st1h { z5.h }, p3, [%x[outptr], x28, LSL #1]\n"
-    "inch x28, ALL, MUL #4\n"
+    "st1h { z5.h }, p3, [%x[outptr], x9, LSL #1]\n"
+    "inch x9, ALL, MUL #4\n"
     "fmul z3.h, z3.h, z6.h\n"
     "fmul z2.h, z2.h, z6.h\n"
-    "st1h { z4.h }, p2, [%x[outptr], x27, LSL #1]\n"
+    "st1h { z4.h }, p2, [%x[outptr], x28, LSL #1]\n"
+    "inch x28, ALL, MUL #4\n"
+    "st1h { z3.h }, p1, [%x[outptr], x27, LSL #1]\n"
     "inch x27, ALL, MUL #4\n"
-    "st1h { z3.h }, p1, [%x[outptr], x26, LSL #1]\n"
+    "st1h { z2.h }, p0, [%x[outptr], x26, LSL #1]\n"
     "inch x26, ALL, MUL #4\n"
-    "st1h { z2.h }, p0, [%x[outptr], x25, LSL #1]\n"
-    "inch x25, ALL, MUL #4\n"
-    "whilelt p0.h, x25, %x[n_channels]\n"
+    "whilelt p0.h, x26, %x[n_channels]\n"
     "b.any 1b\n"
     "7:"  // Single vector of channels
-    "whilelt p3.h, x28, %x[n_channels]\n"
+    "whilelt p3.h, x9, %x[n_channels]\n"
     "b.none 14f\n"
     "8:"  // Single vector of channels: Loop
-    "lsr x24, %x[n_valid_cells], #0x2\n"
+    "lsr x25, %x[n_valid_cells], #0x2\n"
     "mov z5.b, #0x0\n"
-    "mov x19, %x[inptrs]\n"
-    "cbz x24, 11f\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "subs x24, x24, #0x1\n"
-    "ld1h { z1.h }, p3/Z, [x23, x28, LSL #1]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
-    "add x19, x19, #0x20\n"
-    "ld1h { z0.h }, p3/Z, [x22, x28, LSL #1]\n"
-    "ld1h { z31.h }, p3/Z, [x21, x28, LSL #1]\n"
-    "ld1h { z30.h }, p3/Z, [x20, x28, LSL #1]\n"
+    "mov x20, %x[inptrs]\n"
+    "cbz x25, 11f\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "subs x25, x25, #0x1\n"
+    "ld1h { z1.h }, p3/Z, [x24, x9, LSL #1]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "add x20, x20, #0x20\n"
+    "ld1h { z0.h }, p3/Z, [x23, x9, LSL #1]\n"
+    "ld1h { z31.h }, p3/Z, [x22, x9, LSL #1]\n"
+    "ld1h { z30.h }, p3/Z, [x21, x9, LSL #1]\n"
     "beq 10f\n"
     "9:"  // Single vector of channels: Loop: 4 inputs loop
     "fadd z23.h, z1.h, z0.h\n"
     "fadd z19.h, z31.h, z30.h\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "subs x24, x24, #0x1\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "subs x25, x25, #0x1\n"
     "fadd z19.h, z23.h, z19.h\n"
-    "ldp x21, x20, [x19, #0x10]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
     "fadd z5.h, z5.h, z19.h\n"
-    "add x19, x19, #0x20\n"
-    "ld1h { z1.h }, p3/Z, [x23, x28, LSL #1]\n"
-    "ld1h { z0.h }, p3/Z, [x22, x28, LSL #1]\n"
-    "ld1h { z31.h }, p3/Z, [x21, x28, LSL #1]\n"
-    "ld1h { z30.h }, p3/Z, [x20, x28, LSL #1]\n"
+    "add x20, x20, #0x20\n"
+    "ld1h { z1.h }, p3/Z, [x24, x9, LSL #1]\n"
+    "ld1h { z0.h }, p3/Z, [x23, x9, LSL #1]\n"
+    "ld1h { z31.h }, p3/Z, [x22, x9, LSL #1]\n"
+    "ld1h { z30.h }, p3/Z, [x21, x9, LSL #1]\n"
     "bgt 9b\n"
     "10:"  // Single vector of channels: Loop: 4 inputs tail
     "fadd z23.h, z1.h, z0.h\n"
@@ -204,25 +204,25 @@ void sme_fp16_nhwc_avg_generic_depthfirst_impl(
     "fadd z19.h, z23.h, z19.h\n"
     "fadd z5.h, z5.h, z19.h\n"
     "11:"  // Single vector of channels: Loop: After loop
-    "ands x20, %x[n_valid_cells], #0x3\n"
+    "ands x21, %x[n_valid_cells], #0x3\n"
     "beq 13f\n"
     "12:"  // Single vector of channels: Loop: Single input loop
-    "ldr x23, [x19], #0x8\n"
-    "ld1h { z1.h }, p3/Z, [x23, x28, LSL #1]\n"
-    "subs x20, x20, #0x1\n"
+    "ldr x24, [x20], #0x8\n"
+    "ld1h { z1.h }, p3/Z, [x24, x9, LSL #1]\n"
+    "subs x21, x21, #0x1\n"
     "fadd z5.h, z5.h, z1.h\n"
     "bgt 12b\n"
     "13:"  // Single vector of channels: Loop: Single input loop: End
     "fmul z5.h, z5.h, z6.h\n"
-    "st1h { z5.h }, p3, [%x[outptr], x28, LSL #1]\n"
-    "inch x28\n"
-    "whilelt p3.h, x28, %x[n_channels]\n"
+    "st1h { z5.h }, p3, [%x[outptr], x9, LSL #1]\n"
+    "inch x9\n"
+    "whilelt p3.h, x9, %x[n_channels]\n"
     "b.any 8b\n"
     "14:"  // End
     ".inst 0xd503467f  // SMSTOP\n"
     :
     : [inptrs] "r" (inptrs), [n_channels] "r" (n_channels), [n_valid_cells] "r" (n_valid_cells), [outptr] "r" (outptr), [rescale_ptr] "r" (&rescale_value)
-    : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+    : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x9", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
   );
 }
 
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp16_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp16_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp
index fe2e7c834f..f71f2625b6 100644
--- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp16_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp16_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2022 Arm Limited.
+ * Copyright (c) 2022-2023 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -63,82 +63,82 @@ void sme_fp16_nhwc_max_2x2_s1_output2x2_depthfirst_impl(
                         pad_left, pad_top, pad_right, pad_bottom);
 
   __asm__ __volatile__(
-    "ldr x20, [%x[args], %[offsetof_outptrs]]\n"
+    "ldr x21, [%x[args], %[offsetof_outptrs]]\n"
     ".inst 0xd503477f  // SMSTART ZA\n"
-    "mov x14, #0x0\n"
+    "mov x15, #0x0\n"
     "ptrue p2.b\n"
-    "ldr x19, [%x[args], %[offsetof_inptrs]]\n"
-    "mov x13, #0x0\n"
-    "ldr x12, [%x[args], %[offsetof_n_channels]]\n"
-    "whilelt p1.h, x14, x12\n"
-    "ldp x11, x10, [x20, #0x0]\n"
-    "ldp x9, x28, [x20, #0x10]\n"
-    "ldp x27, x26, [x19, #0x0]\n"
-    "ld1h { z29.h }, p1/Z, [x26, x14, LSL #1]\n"
-    "ldp x25, x24, [x19, #0x10]\n"
-    "ld1h { z28.h }, p1/Z, [x24, x14, LSL #1]\n"
-    "ldp x23, x22, [x19, #0x20]\n"
-    "ld1h { z27.h }, p1/Z, [x23, x14, LSL #1]\n"
-    "ldp x21, x20, [x19, #0x30]\n"
-    "ld1h { z26.h }, p1/Z, [x20, x14, LSL #1]\n"
-    "ldr x19, [x19, #0x40]\n"
-    "ld1h { z20.h }, p1/Z, [x27, x14, LSL #1]\n"
-    "ld1h { z25.h }, p1/Z, [x22, x14, LSL #1]\n"
-    "ld1h { z24.h }, p1/Z, [x25, x14, LSL #1]\n"
-    "ld1h { z23.h }, p1/Z, [x21, x14, LSL #1]\n"
-    "ld1h { z19.h }, p1/Z, [x19, x14, LSL #1]\n"
-    "incw x14\n"
-    "whilelt p1.h, x14, x12\n"
+    "ldr x20, [%x[args], %[offsetof_inptrs]]\n"
+    "mov x14, #0x0\n"
+    "ldr x13, [%x[args], %[offsetof_n_channels]]\n"
+    "whilelt p1.h, x15, x13\n"
+    "ldp x12, x11, [x21, #0x0]\n"
+    "ldp x10, x9, [x21, #0x10]\n"
+    "ldp x28, x27, [x20, #0x0]\n"
+    "ld1h { z30.h }, p1/Z, [x27, x15, LSL #1]\n"
+    "ldp x26, x25, [x20, #0x10]\n"
+    "ld1h { z29.h }, p1/Z, [x25, x15, LSL #1]\n"
+    "ldp x24, x23, [x20, #0x20]\n"
+    "ld1h { z28.h }, p1/Z, [x24, x15, LSL #1]\n"
+    "ldp x22, x21, [x20, #0x30]\n"
+    "ld1h { z27.h }, p1/Z, [x21, x15, LSL #1]\n"
+    "ldr x20, [x20, #0x40]\n"
+    "ld1h { z26.h }, p1/Z, [x28, x15, LSL #1]\n"
+    "ld1h { z25.h }, p1/Z, [x26, x15, LSL #1]\n"
+    "ld1h { z24.h }, p1/Z, [x23, x15, LSL #1]\n"
+    "ld1h { z23.h }, p1/Z, [x22, x15, LSL #1]\n"
+    "ld1h { z19.h }, p1/Z, [x20, x15, LSL #1]\n"
+    "incw x15\n"
+    "whilelt p1.h, x15, x13\n"
     "b.none 2f\n"
     "1:"  // Vector: Loop
-    "movprfx z22, z29\n fmax z22.h, p2/M, z22.h, z27.h\n"
-    "movprfx z21, z27\n fmax z21.h, p2/M, z21.h, z26.h\n"
-    "ld1h { z29.h }, p1/Z, [x26, x14, LSL #1]\n"
-    "whilelt p0.h, x13, x12\n"
-    "movprfx z18, z28\n fmax z18.h, p2/M, z18.h, z20.h\n"
-    "movprfx z20, z25\n fmax z20.h, p2/M, z20.h, z24.h\n"
-    "ld1h { z27.h }, p1/Z, [x23, x14, LSL #1]\n"
-    "movprfx z17, z23\n fmax z17.h, p2/M, z17.h, z28.h\n"
-    "movprfx z16, z25\n fmax z16.h, p2/M, z16.h, z19.h\n"
-    "ld1h { z26.h }, p1/Z, [x20, x14, LSL #1]\n"
-    "ld1h { z28.h }, p1/Z, [x24, x14, LSL #1]\n"
-    "movprfx z19, z18\n fmax z19.h, p2/M, z19.h, z22.h\n"
-    "movprfx z18, z22\n fmax z18.h, p2/M, z18.h, z20.h\n"
-    "ld1h { z20.h }, p1/Z, [x27, x14, LSL #1]\n"
+    "movprfx z22, z30\n fmax z22.h, p2/M, z22.h, z28.h\n"
+    "movprfx z21, z28\n fmax z21.h, p2/M, z21.h, z27.h\n"
+    "ld1h { z30.h }, p1/Z, [x27, x15, LSL #1]\n"
+    "whilelt p0.h, x14, x13\n"
+    "movprfx z20, z29\n fmax z20.h, p2/M, z20.h, z26.h\n"
+    "movprfx z18, z25\n fmax z18.h, p2/M, z18.h, z24.h\n"
+    "ld1h { z28.h }, p1/Z, [x24, x15, LSL #1]\n"
+    "movprfx z17, z29\n fmax z17.h, p2/M, z17.h, z23.h\n"
+    "movprfx z16, z24\n fmax z16.h, p2/M, z16.h, z19.h\n"
+    "ld1h { z27.h }, p1/Z, [x21, x15, LSL #1]\n"
+    "ld1h { z29.h }, p1/Z, [x25, x15, LSL #1]\n"
+    "movprfx z19, z22\n fmax z19.h, p2/M, z19.h, z20.h\n"
+    "fmax z18.h, p2/M, z18.h, z22.h\n"
+    "ld1h { z26.h }, p1/Z, [x28, x15, LSL #1]\n"
     "fmax z17.h, p2/M, z17.h, z21.h\n"
     "fmax z16.h, p2/M, z16.h, z21.h\n"
-    "ld1h { z25.h }, p1/Z, [x22, x14, LSL #1]\n"
-    "st1h { z19.h }, p0, [x11, x13, LSL #1]\n"
-    "ld1h { z24.h }, p1/Z, [x25, x14, LSL #1]\n"
-    "st1h { z18.h }, p0, [x10, x13, LSL #1]\n"
-    "ld1h { z23.h }, p1/Z, [x21, x14, LSL #1]\n"
-    "st1h { z17.h }, p0, [x9, x13, LSL #1]\n"
-    "ld1h { z19.h }, p1/Z, [x19, x14, LSL #1]\n"
+    "ld1h { z25.h }, p1/Z, [x26, x15, LSL #1]\n"
+    "st1h { z19.h }, p0, [x12, x14, LSL #1]\n"
+    "ld1h { z24.h }, p1/Z, [x23, x15, LSL #1]\n"
+    "st1h { z18.h }, p0, [x11, x14, LSL #1]\n"
+    "ld1h { z23.h }, p1/Z, [x22, x15, LSL #1]\n"
+    "st1h { z17.h }, p0, [x10, x14, LSL #1]\n"
+    "ld1h { z19.h }, p1/Z, [x20, x15, LSL #1]\n"
+    "incw x15\n"
+    "whilelt p1.h, x15, x13\n"
+    "st1h { z16.h }, p0, [x9, x14, LSL #1]\n"
     "incw x14\n"
-    "whilelt p1.h, x14, x12\n"
-    "st1h { z16.h }, p0, [x28, x13, LSL #1]\n"
-    "incw x13\n"
     "b.any 1b\n"
     "2:"  // Vector: Tail
-    "movprfx z22, z29\n fmax z22.h, p2/M, z22.h, z27.h\n"
-    "movprfx z21, z27\n fmax z21.h, p2/M, z21.h, z26.h\n"
-    "whilelt p0.h, x13, x12\n"
-    "movprfx z18, z28\n fmax z18.h, p2/M, z18.h, z20.h\n"
-    "movprfx z20, z25\n fmax z20.h, p2/M, z20.h, z24.h\n"
-    "movprfx z17, z23\n fmax z17.h, p2/M, z17.h, z28.h\n"
-    "movprfx z16, z25\n fmax z16.h, p2/M, z16.h, z19.h\n"
-    "movprfx z19, z18\n fmax z19.h, p2/M, z19.h, z22.h\n"
-    "movprfx z18, z22\n fmax z18.h, p2/M, z18.h, z20.h\n"
-    "st1h { z19.h }, p0, [x11, x13, LSL #1]\n"
+    "movprfx z22, z30\n fmax z22.h, p2/M, z22.h, z28.h\n"
+    "movprfx z21, z28\n fmax z21.h, p2/M, z21.h, z27.h\n"
+    "whilelt p0.h, x14, x13\n"
+    "movprfx z20, z29\n fmax z20.h, p2/M, z20.h, z26.h\n"
+    "movprfx z18, z25\n fmax z18.h, p2/M, z18.h, z24.h\n"
+    "movprfx z17, z29\n fmax z17.h, p2/M, z17.h, z23.h\n"
+    "movprfx z16, z24\n fmax z16.h, p2/M, z16.h, z19.h\n"
+    "movprfx z19, z22\n fmax z19.h, p2/M, z19.h, z20.h\n"
+    "fmax z18.h, p2/M, z18.h, z22.h\n"
+    "st1h { z19.h }, p0, [x12, x14, LSL #1]\n"
     "fmax z17.h, p2/M, z17.h, z21.h\n"
     "fmax z16.h, p2/M, z16.h, z21.h\n"
-    "st1h { z18.h }, p0, [x10, x13, LSL #1]\n"
-    "st1h { z17.h }, p0, [x9, x13, LSL #1]\n"
-    "st1h { z16.h }, p0, [x28, x13, LSL #1]\n"
+    "st1h { z18.h }, p0, [x11, x14, LSL #1]\n"
+    "st1h { z17.h }, p0, [x10, x14, LSL #1]\n"
+    "st1h { z16.h }, p0, [x9, x14, LSL #1]\n"
     ".inst 0xd503467f  // SMSTOP\n"
     :
     : [args] "r" (&args), [offsetof_inptrs] "I" (offsetof(KernelArgs, inptrs)), [offsetof_n_channels] "I" (offsetof(KernelArgs, n_channels)), [offsetof_outptrs] "I" (offsetof(KernelArgs, outptrs))
-    : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x9", "x10", "x11", "x12", "x13", "x14", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+    : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
   );
 }
 
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp16_nhwc_max_generic_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp16_nhwc_max_generic_depthfirst/generic.cpp
index 1bb27e39a3..c07ce97231 100644
--- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp16_nhwc_max_generic_depthfirst/generic.cpp
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp16_nhwc_max_generic_depthfirst/generic.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2022 Arm Limited.
+ * Copyright (c) 2022-2023 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -40,82 +40,82 @@ void sme_fp16_nhwc_max_generic_depthfirst_impl(
 {
   __asm__ __volatile__(
     ".inst 0xd503477f  // SMSTART ZA\n"
-    "mov x28, #0x0\n"
-    "cnth x27\n"
-    "cnth x26, ALL, MUL #2\n"
-    "cnth x25, ALL, MUL #3\n"
-    "whilelt p4.h, x28, %x[n_channels]\n"
-    "whilelt p3.h, x27, %x[n_channels]\n"
-    "whilelt p2.h, x26, %x[n_channels]\n"
-    "whilelt p1.h, x25, %x[n_channels]\n"
+    "mov x9, #0x0\n"
+    "cnth x28\n"
+    "cnth x27, ALL, MUL #2\n"
+    "cnth x26, ALL, MUL #3\n"
+    "whilelt p4.h, x9, %x[n_channels]\n"
+    "whilelt p3.h, x28, %x[n_channels]\n"
+    "whilelt p2.h, x27, %x[n_channels]\n"
+    "whilelt p1.h, x26, %x[n_channels]\n"
     "ptrue p0.b\n"
     "b.none 7f\n"
     "1:"  // 4-vectors of channels
-    "lsr x24, %x[n_valid_cells], #0x2\n"
+    "lsr x25, %x[n_valid_cells], #0x2\n"
     "mov z4.h, #0xfc00\n"
     "mov z3.h, #0xfc00\n"
-    "mov x19, %x[inptrs]\n"
+    "mov x20, %x[inptrs]\n"
     "mov z2.h, #0xfc00\n"
     "mov z1.h, #0xfc00\n"
-    "cbz x24, 4f\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "subs x24, x24, #0x1\n"
-    "ld1h { z0.h }, p4/Z, [x23, x28, LSL #1]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
-    "add x19, x19, #0x20\n"
-    "ld1h { z31.h }, p4/Z, [x22, x28, LSL #1]\n"
-    "ld1h { z23.h }, p4/Z, [x21, x28, LSL #1]\n"
-    "ld1h { z30.h }, p4/Z, [x20, x28, LSL #1]\n"
-    "ld1h { z18.h }, p3/Z, [x23, x27, LSL #1]\n"
-    "ld1h { z29.h }, p3/Z, [x22, x27, LSL #1]\n"
-    "ld1h { z22.h }, p3/Z, [x21, x27, LSL #1]\n"
-    "ld1h { z28.h }, p3/Z, [x20, x27, LSL #1]\n"
-    "ld1h { z17.h }, p2/Z, [x23, x26, LSL #1]\n"
-    "ld1h { z27.h }, p2/Z, [x22, x26, LSL #1]\n"
-    "ld1h { z21.h }, p2/Z, [x21, x26, LSL #1]\n"
-    "ld1h { z26.h }, p2/Z, [x20, x26, LSL #1]\n"
-    "ld1h { z16.h }, p1/Z, [x23, x25, LSL #1]\n"
-    "ld1h { z25.h }, p1/Z, [x22, x25, LSL #1]\n"
-    "ld1h { z20.h }, p1/Z, [x21, x25, LSL #1]\n"
-    "ld1h { z24.h }, p1/Z, [x20, x25, LSL #1]\n"
+    "cbz x25, 4f\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "subs x25, x25, #0x1\n"
+    "ld1h { z0.h }, p4/Z, [x24, x9, LSL #1]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "add x20, x20, #0x20\n"
+    "ld1h { z31.h }, p4/Z, [x23, x9, LSL #1]\n"
+    "ld1h { z23.h }, p4/Z, [x22, x9, LSL #1]\n"
+    "ld1h { z30.h }, p4/Z, [x21, x9, LSL #1]\n"
+    "ld1h { z18.h }, p3/Z, [x24, x28, LSL #1]\n"
+    "ld1h { z29.h }, p3/Z, [x23, x28, LSL #1]\n"
+    "ld1h { z22.h }, p3/Z, [x22, x28, LSL #1]\n"
+    "ld1h { z28.h }, p3/Z, [x21, x28, LSL #1]\n"
+    "ld1h { z17.h }, p2/Z, [x24, x27, LSL #1]\n"
+    "ld1h { z27.h }, p2/Z, [x23, x27, LSL #1]\n"
+    "ld1h { z21.h }, p2/Z, [x22, x27, LSL #1]\n"
+    "ld1h { z26.h }, p2/Z, [x21, x27, LSL #1]\n"
+    "ld1h { z16.h }, p1/Z, [x24, x26, LSL #1]\n"
+    "ld1h { z25.h }, p1/Z, [x23, x26, LSL #1]\n"
+    "ld1h { z20.h }, p1/Z, [x22, x26, LSL #1]\n"
+    "ld1h { z24.h }, p1/Z, [x21, x26, LSL #1]\n"
     "beq 3f\n"
     "2:"  // 4-vectors of channels: 4 inputs loop
     "movprfx z19, z0\n fmax z19.h, p0/M, z19.h, z31.h\n"
     "fmax z23.h, p0/M, z23.h, z30.h\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "subs x24, x24, #0x1\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "subs x25, x25, #0x1\n"
     "fmax z18.h, p0/M, z18.h, z29.h\n"
     "fmax z22.h, p0/M, z22.h, z28.h\n"
-    "ldp x21, x20, [x19, #0x10]\n"
-    "add x19, x19, #0x20\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "add x20, x20, #0x20\n"
     "fmax z17.h, p0/M, z17.h, z27.h\n"
     "fmax z21.h, p0/M, z21.h, z26.h\n"
-    "ld1h { z0.h }, p4/Z, [x23, x28, LSL #1]\n"
+    "ld1h { z0.h }, p4/Z, [x24, x9, LSL #1]\n"
     "fmax z16.h, p0/M, z16.h, z25.h\n"
     "fmax z20.h, p0/M, z20.h, z24.h\n"
-    "ld1h { z31.h }, p4/Z, [x22, x28, LSL #1]\n"
+    "ld1h { z31.h }, p4/Z, [x23, x9, LSL #1]\n"
     "fmax z19.h, p0/M, z19.h, z23.h\n"
     "fmax z18.h, p0/M, z18.h, z22.h\n"
-    "ld1h { z23.h }, p4/Z, [x21, x28, LSL #1]\n"
+    "ld1h { z23.h }, p4/Z, [x22, x9, LSL #1]\n"
     "fmax z17.h, p0/M, z17.h, z21.h\n"
     "fmax z16.h, p0/M, z16.h, z20.h\n"
-    "ld1h { z30.h }, p4/Z, [x20, x28, LSL #1]\n"
+    "ld1h { z30.h }, p4/Z, [x21, x9, LSL #1]\n"
     "fmax z4.h, p0/M, z4.h, z19.h\n"
     "fmax z3.h, p0/M, z3.h, z18.h\n"
-    "ld1h { z18.h }, p3/Z, [x23, x27, LSL #1]\n"
+    "ld1h { z18.h }, p3/Z, [x24, x28, LSL #1]\n"
     "fmax z2.h, p0/M, z2.h, z17.h\n"
     "fmax z1.h, p0/M, z1.h, z16.h\n"
-    "ld1h { z29.h }, p3/Z, [x22, x27, LSL #1]\n"
-    "ld1h { z22.h }, p3/Z, [x21, x27, LSL #1]\n"
-    "ld1h { z28.h }, p3/Z, [x20, x27, LSL #1]\n"
-    "ld1h { z17.h }, p2/Z, [x23, x26, LSL #1]\n"
-    "ld1h { z27.h }, p2/Z, [x22, x26, LSL #1]\n"
-    "ld1h { z21.h }, p2/Z, [x21, x26, LSL #1]\n"
-    "ld1h { z26.h }, p2/Z, [x20, x26, LSL #1]\n"
-    "ld1h { z16.h }, p1/Z, [x23, x25, LSL #1]\n"
-    "ld1h { z25.h }, p1/Z, [x22, x25, LSL #1]\n"
-    "ld1h { z20.h }, p1/Z, [x21, x25, LSL #1]\n"
-    "ld1h { z24.h }, p1/Z, [x20, x25, LSL #1]\n"
+    "ld1h { z29.h }, p3/Z, [x23, x28, LSL #1]\n"
+    "ld1h { z22.h }, p3/Z, [x22, x28, LSL #1]\n"
+    "ld1h { z28.h }, p3/Z, [x21, x28, LSL #1]\n"
+    "ld1h { z17.h }, p2/Z, [x24, x27, LSL #1]\n"
+    "ld1h { z27.h }, p2/Z, [x23, x27, LSL #1]\n"
+    "ld1h { z21.h }, p2/Z, [x22, x27, LSL #1]\n"
+    "ld1h { z26.h }, p2/Z, [x21, x27, LSL #1]\n"
+    "ld1h { z16.h }, p1/Z, [x24, x26, LSL #1]\n"
+    "ld1h { z25.h }, p1/Z, [x23, x26, LSL #1]\n"
+    "ld1h { z20.h }, p1/Z, [x22, x26, LSL #1]\n"
+    "ld1h { z24.h }, p1/Z, [x21, x26, LSL #1]\n"
     "bgt 2b\n"
     "3:"  // 4-vectors of channels: 4 inputs tail
     "movprfx z19, z0\n fmax z19.h, p0/M, z19.h, z31.h\n"
@@ -135,61 +135,61 @@ void sme_fp16_nhwc_max_generic_depthfirst_impl(
     "fmax z2.h, p0/M, z2.h, z17.h\n"
     "fmax z1.h, p0/M, z1.h, z16.h\n"
     "4:"  // 4-vectors of channels: After loop
-    "ands x20, %x[n_valid_cells], #0x3\n"
+    "ands x21, %x[n_valid_cells], #0x3\n"
     "beq 6f\n"
     "5:"  // 4-vectors of channels: Single input loop
-    "ldr x23, [x19], #0x8\n"
-    "ld1h { z0.h }, p4/Z, [x23, x28, LSL #1]\n"
-    "subs x20, x20, #0x1\n"
+    "ldr x24, [x20], #0x8\n"
+    "ld1h { z0.h }, p4/Z, [x24, x9, LSL #1]\n"
+    "subs x21, x21, #0x1\n"
     "fmax z4.h, p0/M, z4.h, z0.h\n"
-    "ld1h { z18.h }, p3/Z, [x23, x27, LSL #1]\n"
+    "ld1h { z18.h }, p3/Z, [x24, x28, LSL #1]\n"
     "fmax z3.h, p0/M, z3.h, z18.h\n"
-    "ld1h { z17.h }, p2/Z, [x23, x26, LSL #1]\n"
+    "ld1h { z17.h }, p2/Z, [x24, x27, LSL #1]\n"
     "fmax z2.h, p0/M, z2.h, z17.h\n"
-    "ld1h { z16.h }, p1/Z, [x23, x25, LSL #1]\n"
+    "ld1h { z16.h }, p1/Z, [x24, x26, LSL #1]\n"
     "fmax z1.h, p0/M, z1.h, z16.h\n"
     "bgt 5b\n"
     "6:"  // 4-vectors of channels: Single input loop: End
-    "st1h { z4.h }, p4, [%x[outptr], x28, LSL #1]\n"
+    "st1h { z4.h }, p4, [%x[outptr], x9, LSL #1]\n"
+    "inch x9, ALL, MUL #4\n"
+    "st1h { z3.h }, p3, [%x[outptr], x28, LSL #1]\n"
     "inch x28, ALL, MUL #4\n"
-    "st1h { z3.h }, p3, [%x[outptr], x27, LSL #1]\n"
+    "st1h { z2.h }, p2, [%x[outptr], x27, LSL #1]\n"
     "inch x27, ALL, MUL #4\n"
-    "st1h { z2.h }, p2, [%x[outptr], x26, LSL #1]\n"
+    "st1h { z1.h }, p1, [%x[outptr], x26, LSL #1]\n"
     "inch x26, ALL, MUL #4\n"
-    "st1h { z1.h }, p1, [%x[outptr], x25, LSL #1]\n"
-    "inch x25, ALL, MUL #4\n"
-    "whilelt p1.h, x25, %x[n_channels]\n"
+    "whilelt p1.h, x26, %x[n_channels]\n"
     "b.any 1b\n"
     "7:"  // Single vector of channels
-    "whilelt p4.h, x28, %x[n_channels]\n"
+    "whilelt p4.h, x9, %x[n_channels]\n"
     "b.none 14f\n"
     "8:"  // Single vector of channels: Loop
-    "lsr x24, %x[n_valid_cells], #0x2\n"
+    "lsr x25, %x[n_valid_cells], #0x2\n"
     "mov z4.h, #0xfc00\n"
-    "mov x19, %x[inptrs]\n"
-    "cbz x24, 11f\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "subs x24, x24, #0x1\n"
-    "ld1h { z0.h }, p4/Z, [x23, x28, LSL #1]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
-    "add x19, x19, #0x20\n"
-    "ld1h { z31.h }, p4/Z, [x22, x28, LSL #1]\n"
-    "ld1h { z23.h }, p4/Z, [x21, x28, LSL #1]\n"
-    "ld1h { z30.h }, p4/Z, [x20, x28, LSL #1]\n"
+    "mov x20, %x[inptrs]\n"
+    "cbz x25, 11f\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "subs x25, x25, #0x1\n"
+    "ld1h { z0.h }, p4/Z, [x24, x9, LSL #1]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "add x20, x20, #0x20\n"
+    "ld1h { z31.h }, p4/Z, [x23, x9, LSL #1]\n"
+    "ld1h { z23.h }, p4/Z, [x22, x9, LSL #1]\n"
+    "ld1h { z30.h }, p4/Z, [x21, x9, LSL #1]\n"
     "beq 10f\n"
     "9:"  // Single vector of channels: Loop: 4 inputs loop
     "movprfx z19, z0\n fmax z19.h, p0/M, z19.h, z31.h\n"
     "fmax z23.h, p0/M, z23.h, z30.h\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "subs x24, x24, #0x1\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "subs x25, x25, #0x1\n"
     "fmax z19.h, p0/M, z19.h, z23.h\n"
-    "ldp x21, x20, [x19, #0x10]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
     "fmax z4.h, p0/M, z4.h, z19.h\n"
-    "add x19, x19, #0x20\n"
-    "ld1h { z0.h }, p4/Z, [x23, x28, LSL #1]\n"
-    "ld1h { z31.h }, p4/Z, [x22, x28, LSL #1]\n"
-    "ld1h { z23.h }, p4/Z, [x21, x28, LSL #1]\n"
-    "ld1h { z30.h }, p4/Z, [x20, x28, LSL #1]\n"
+    "add x20, x20, #0x20\n"
+    "ld1h { z0.h }, p4/Z, [x24, x9, LSL #1]\n"
+    "ld1h { z31.h }, p4/Z, [x23, x9, LSL #1]\n"
+    "ld1h { z23.h }, p4/Z, [x22, x9, LSL #1]\n"
+    "ld1h { z30.h }, p4/Z, [x21, x9, LSL #1]\n"
     "bgt 9b\n"
     "10:"  // Single vector of channels: Loop: 4 inputs tail
     "movprfx z19, z0\n fmax z19.h, p0/M, z19.h, z31.h\n"
@@ -197,24 +197,24 @@ void sme_fp16_nhwc_max_generic_depthfirst_impl(
     "fmax z19.h, p0/M, z19.h, z23.h\n"
     "fmax z4.h, p0/M, z4.h, z19.h\n"
     "11:"  // Single vector of channels: Loop: After loop
-    "ands x20, %x[n_valid_cells], #0x3\n"
+    "ands x21, %x[n_valid_cells], #0x3\n"
     "beq 13f\n"
     "12:"  // Single vector of channels: Loop: Single input loop
-    "ldr x23, [x19], #0x8\n"
-    "ld1h { z0.h }, p4/Z, [x23, x28, LSL #1]\n"
-    "subs x20, x20, #0x1\n"
+    "ldr x24, [x20], #0x8\n"
+    "ld1h { z0.h }, p4/Z, [x24, x9, LSL #1]\n"
+    "subs x21, x21, #0x1\n"
     "fmax z4.h, p0/M, z4.h, z0.h\n"
     "bgt 12b\n"
     "13:"  // Single vector of channels: Loop: Single input loop: End
-    "st1h { z4.h }, p4, [%x[outptr], x28, LSL #1]\n"
-    "inch x28\n"
-    "whilelt p4.h, x28, %x[n_channels]\n"
+    "st1h { z4.h }, p4, [%x[outptr], x9, LSL #1]\n"
+    "inch x9\n"
+    "whilelt p4.h, x9, %x[n_channels]\n"
     "b.any 8b\n"
     "14:"  // End
     ".inst 0xd503467f  // SMSTOP\n"
     :
     : [inptrs] "r" (inptrs), [n_channels] "r" (n_channels), [n_valid_cells] "r" (n_valid_cells), [outptr] "r" (outptr)
-    : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+    : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x9", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
   );
 }
 
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst/generic.cpp
index 602ef59159..cf69800522 100644
--- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst/generic.cpp
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst/generic.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2022 Arm Limited.
+ * Copyright (c) 2022-2023 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -82,97 +82,97 @@ void sme_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst_impl(
                         pad_left, pad_top, pad_right, pad_bottom);
 
   __asm__ __volatile__(
-    "ldr x20, [%x[args], %[offsetof_outptrs]]\n"
+    "ldr x21, [%x[args], %[offsetof_outptrs]]\n"
     ".inst 0xd503477f  // SMSTART ZA\n"
-    "mov x4, #0x0\n"
-    "mov x19, #0x4\n"
-    "ldr x5, [%x[args], %[offsetof_inptrs]]\n"
-    "whilelt p0.s, XZR, x19\n"
-    "add x19, %x[args], %[offsetof_rescale]\n"
-    "ld1rqw { z4.s }, p0/Z, [x19]\n"
-    "ldr x6, [%x[args], %[offsetof_n_channels]]\n"
-    "whilelt p1.s, x4, x6\n"
-    "mov x7, #0x0\n"
-    "ldp x8, x17, [x20, #0x0]\n"
-    "ldp x16, x15, [x20, #0x10]\n"
-    "ldp x14, x13, [x5, #0x0]\n"
-    "ld1w { z3.s }, p1/Z, [x13, x4, LSL #2]\n"
-    "ldp x12, x11, [x5, #0x10]\n"
-    "ld1w { z2.s }, p1/Z, [x12, x4, LSL #2]\n"
-    "ldp x10, x9, [x5, #0x20]\n"
-    "ld1w { z1.s }, p1/Z, [x9, x4, LSL #2]\n"
-    "ldp x28, x27, [x5, #0x30]\n"
-    "ld1w { z0.s }, p1/Z, [x28, x4, LSL #2]\n"
-    "ldp x26, x25, [x5, #0x40]\n"
-    "ld1w { z31.s }, p1/Z, [x25, x4, LSL #2]\n"
-    "ldp x24, x23, [x5, #0x50]\n"
-    "ld1w { z30.s }, p1/Z, [x24, x4, LSL #2]\n"
-    "ldp x22, x21, [x5, #0x60]\n"
-    "ld1w { z29.s }, p1/Z, [x10, x4, LSL #2]\n"
-    "ldp x20, x19, [x5, #0x70]\n"
-    "ld1w { z28.s }, p1/Z, [x26, x4, LSL #2]\n"
-    "ld1w { z27.s }, p1/Z, [x27, x4, LSL #2]\n"
-    "ld1w { z22.s }, p1/Z, [x23, x4, LSL #2]\n"
-    "ld1w { z21.s }, p1/Z, [x21, x4, LSL #2]\n"
-    "ld1w { z20.s }, p1/Z, [x20, x4, LSL #2]\n"
-    "ld1w { z26.s }, p1/Z, [x14, x4, LSL #2]\n"
-    "ld1w { z25.s }, p1/Z, [x11, x4, LSL #2]\n"
-    "ld1w { z24.s }, p1/Z, [x22, x4, LSL #2]\n"
-    "ld1w { z23.s }, p1/Z, [x19, x4, LSL #2]\n"
-    "incw x4\n"
-    "whilelt p1.s, x4, x6\n"
+    "mov x3, #0x0\n"
+    "mov x20, #0x4\n"
+    "ldr x4, [%x[args], %[offsetof_inptrs]]\n"
+    "whilelt p0.s, XZR, x20\n"
+    "add x20, %x[args], %[offsetof_rescale]\n"
+    "ld1rqw { z4.s }, p0/Z, [x20]\n"
+    "ldr x5, [%x[args], %[offsetof_n_channels]]\n"
+    "whilelt p1.s, x3, x5\n"
+    "mov x6, #0x0\n"
+    "ldp x7, x8, [x21, #0x0]\n"
+    "ldp x17, x16, [x21, #0x10]\n"
+    "ldp x15, x14, [x4, #0x0]\n"
+    "ld1w { z3.s }, p1/Z, [x14, x3, LSL #2]\n"
+    "ldp x13, x12, [x4, #0x10]\n"
+    "ld1w { z2.s }, p1/Z, [x13, x3, LSL #2]\n"
+    "ldp x11, x10, [x4, #0x20]\n"
+    "ld1w { z1.s }, p1/Z, [x10, x3, LSL #2]\n"
+    "ldp x9, x28, [x4, #0x30]\n"
+    "ld1w { z0.s }, p1/Z, [x9, x3, LSL #2]\n"
+    "ldp x27, x26, [x4, #0x40]\n"
+    "ld1w { z31.s }, p1/Z, [x26, x3, LSL #2]\n"
+    "ldp x25, x24, [x4, #0x50]\n"
+    "ld1w { z30.s }, p1/Z, [x25, x3, LSL #2]\n"
+    "ldp x23, x22, [x4, #0x60]\n"
+    "ld1w { z29.s }, p1/Z, [x11, x3, LSL #2]\n"
+    "ldp x21, x20, [x4, #0x70]\n"
+    "ld1w { z28.s }, p1/Z, [x27, x3, LSL #2]\n"
+    "ld1w { z27.s }, p1/Z, [x28, x3, LSL #2]\n"
+    "ld1w { z22.s }, p1/Z, [x24, x3, LSL #2]\n"
+    "ld1w { z21.s }, p1/Z, [x22, x3, LSL #2]\n"
+    "ld1w { z20.s }, p1/Z, [x21, x3, LSL #2]\n"
+    "ld1w { z26.s }, p1/Z, [x15, x3, LSL #2]\n"
+    "ld1w { z25.s }, p1/Z, [x12, x3, LSL #2]\n"
+    "ld1w { z24.s }, p1/Z, [x23, x3, LSL #2]\n"
+    "ld1w { z23.s }, p1/Z, [x20, x3, LSL #2]\n"
+    "incw x3\n"
+    "whilelt p1.s, x3, x5\n"
     "b.none 2f\n"
     "1:"  // Vector: Loop
     "fadd z17.s, z1.s, z0.s\n"
     "fadd z16.s, z31.s, z30.s\n"
-    "ld1w { z1.s }, p1/Z, [x9, x4, LSL #2]\n"
-    "whilelt p0.s, x7, x6\n"
+    "ld1w { z1.s }, p1/Z, [x10, x3, LSL #2]\n"
+    "whilelt p0.s, x6, x5\n"
     "fadd z19.s, z17.s, z16.s\n"
     "fadd z18.s, z3.s, z2.s\n"
-    "ld1w { z0.s }, p1/Z, [x28, x4, LSL #2]\n"
+    "ld1w { z0.s }, p1/Z, [x9, x3, LSL #2]\n"
     "fadd z17.s, z29.s, z28.s\n"
     "fadd z22.s, z27.s, z22.s\n"
-    "ld1w { z31.s }, p1/Z, [x25, x4, LSL #2]\n"
+    "ld1w { z31.s }, p1/Z, [x26, x3, LSL #2]\n"
     "fadd z16.s, z21.s, z20.s\n"
     "fadd z21.s, z18.s, z19.s\n"
-    "ld1w { z30.s }, p1/Z, [x24, x4, LSL #2]\n"
+    "ld1w { z30.s }, p1/Z, [x25, x3, LSL #2]\n"
     "fadd z20.s, z16.s, z19.s\n"
     "fadd z19.s, z26.s, z17.s\n"
-    "ld1w { z3.s }, p1/Z, [x13, x4, LSL #2]\n"
+    "ld1w { z3.s }, p1/Z, [x14, x3, LSL #2]\n"
     "fadd z18.s, z25.s, z22.s\n"
     "fadd z17.s, z24.s, z17.s\n"
-    "ld1w { z2.s }, p1/Z, [x12, x4, LSL #2]\n"
+    "ld1w { z2.s }, p1/Z, [x13, x3, LSL #2]\n"
     "fadd z16.s, z23.s, z22.s\n"
-    "fadd z19.s, z19.s, z21.s\n"
-    "ld1w { z29.s }, p1/Z, [x10, x4, LSL #2]\n"
-    "fadd z18.s, z18.s, z21.s\n"
+    "fadd z19.s, z21.s, z19.s\n"
+    "ld1w { z29.s }, p1/Z, [x11, x3, LSL #2]\n"
+    "fadd z18.s, z21.s, z18.s\n"
     "fadd z17.s, z17.s, z20.s\n"
-    "ld1w { z28.s }, p1/Z, [x26, x4, LSL #2]\n"
+    "ld1w { z28.s }, p1/Z, [x27, x3, LSL #2]\n"
     "fadd z16.s, z16.s, z20.s\n"
-    "ld1w { z27.s }, p1/Z, [x27, x4, LSL #2]\n"
+    "ld1w { z27.s }, p1/Z, [x28, x3, LSL #2]\n"
     "fmul z19.s, z19.s, z4.s[0]\n"
-    "ld1w { z22.s }, p1/Z, [x23, x4, LSL #2]\n"
+    "ld1w { z22.s }, p1/Z, [x24, x3, LSL #2]\n"
     "fmul z18.s, z18.s, z4.s[1]\n"
     "fmul z17.s, z17.s, z4.s[2]\n"
-    "ld1w { z21.s }, p1/Z, [x21, x4, LSL #2]\n"
+    "ld1w { z21.s }, p1/Z, [x22, x3, LSL #2]\n"
     "fmul z16.s, z16.s, z4.s[3]\n"
-    "st1w { z19.s }, p0, [x8, x7, LSL #2]\n"
-    "ld1w { z20.s }, p1/Z, [x20, x4, LSL #2]\n"
-    "st1w { z18.s }, p0, [x17, x7, LSL #2]\n"
-    "ld1w { z26.s }, p1/Z, [x14, x4, LSL #2]\n"
-    "st1w { z17.s }, p0, [x16, x7, LSL #2]\n"
-    "ld1w { z25.s }, p1/Z, [x11, x4, LSL #2]\n"
-    "st1w { z16.s }, p0, [x15, x7, LSL #2]\n"
-    "incw x7\n"
-    "ld1w { z24.s }, p1/Z, [x22, x4, LSL #2]\n"
-    "ld1w { z23.s }, p1/Z, [x19, x4, LSL #2]\n"
-    "incw x4\n"
-    "whilelt p1.s, x4, x6\n"
+    "st1w { z19.s }, p0, [x7, x6, LSL #2]\n"
+    "ld1w { z20.s }, p1/Z, [x21, x3, LSL #2]\n"
+    "st1w { z18.s }, p0, [x8, x6, LSL #2]\n"
+    "ld1w { z26.s }, p1/Z, [x15, x3, LSL #2]\n"
+    "st1w { z17.s }, p0, [x17, x6, LSL #2]\n"
+    "ld1w { z25.s }, p1/Z, [x12, x3, LSL #2]\n"
+    "st1w { z16.s }, p0, [x16, x6, LSL #2]\n"
+    "incw x6\n"
+    "ld1w { z24.s }, p1/Z, [x23, x3, LSL #2]\n"
+    "ld1w { z23.s }, p1/Z, [x20, x3, LSL #2]\n"
+    "incw x3\n"
+    "whilelt p1.s, x3, x5\n"
     "b.any 1b\n"
     "2:"  // Vector: Tail
     "fadd z17.s, z1.s, z0.s\n"
     "fadd z16.s, z31.s, z30.s\n"
-    "whilelt p0.s, x7, x6\n"
+    "whilelt p0.s, x6, x5\n"
     "fadd z19.s, z17.s, z16.s\n"
     "fadd z18.s, z3.s, z2.s\n"
     "fadd z17.s, z29.s, z28.s\n"
@@ -184,22 +184,22 @@ void sme_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst_impl(
     "fadd z18.s, z25.s, z22.s\n"
     "fadd z17.s, z24.s, z17.s\n"
     "fadd z16.s, z23.s, z22.s\n"
-    "fadd z19.s, z19.s, z21.s\n"
-    "fadd z18.s, z18.s, z21.s\n"
+    "fadd z19.s, z21.s, z19.s\n"
+    "fadd z18.s, z21.s, z18.s\n"
     "fadd z17.s, z17.s, z20.s\n"
     "fadd z16.s, z16.s, z20.s\n"
     "fmul z19.s, z19.s, z4.s[0]\n"
-    "st1w { z19.s }, p0, [x8, x7, LSL #2]\n"
+    "st1w { z19.s }, p0, [x7, x6, LSL #2]\n"
     "fmul z18.s, z18.s, z4.s[1]\n"
     "fmul z17.s, z17.s, z4.s[2]\n"
-    "st1w { z18.s }, p0, [x17, x7, LSL #2]\n"
+    "st1w { z18.s }, p0, [x8, x6, LSL #2]\n"
     "fmul z16.s, z16.s, z4.s[3]\n"
-    "st1w { z17.s }, p0, [x16, x7, LSL #2]\n"
-    "st1w { z16.s }, p0, [x15, x7, LSL #2]\n"
+    "st1w { z17.s }, p0, [x17, x6, LSL #2]\n"
+    "st1w { z16.s }, p0, [x16, x6, LSL #2]\n"
     ".inst 0xd503467f  // SMSTOP\n"
     :
     : [args] "r" (&args), [offsetof_inptrs] "I" (offsetof(KernelArgs, inptrs)), [offsetof_n_channels] "I" (offsetof(KernelArgs, n_channels)), [offsetof_outptrs] "I" (offsetof(KernelArgs, outptrs)), [offsetof_rescale] "I" (offsetof(KernelArgs, rescale_vals))
-    : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x4", "x5", "x6", "x7", "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x17", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+    : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x3", "x4", "x5", "x6", "x7", "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x17", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
   );
 }
 
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp32_nhwc_avg_generic_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp32_nhwc_avg_generic_depthfirst/generic.cpp
index 08630dba05..03ab9c0a9e 100644
--- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp32_nhwc_avg_generic_depthfirst/generic.cpp
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp32_nhwc_avg_generic_depthfirst/generic.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2022 Arm Limited.
+ * Copyright (c) 2022-2023 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -42,83 +42,83 @@ void sme_fp32_nhwc_avg_generic_depthfirst_impl(
 
   __asm__ __volatile__(
     ".inst 0xd503477f  // SMSTART ZA\n"
-    "mov x28, #0x0\n"
-    "cntw x27\n"
-    "cntw x26, ALL, MUL #2\n"
-    "cntw x25, ALL, MUL #3\n"
+    "mov x9, #0x0\n"
+    "cntw x28\n"
+    "cntw x27, ALL, MUL #2\n"
+    "cntw x26, ALL, MUL #3\n"
     "ptrue p0.b\n"
-    "whilelt p3.s, x28, %x[n_channels]\n"
+    "whilelt p3.s, x9, %x[n_channels]\n"
     "ld1rw { z6.s }, p0/Z, [%x[rescale_ptr]]\n"
-    "whilelt p2.s, x27, %x[n_channels]\n"
-    "whilelt p1.s, x26, %x[n_channels]\n"
-    "whilelt p0.s, x25, %x[n_channels]\n"
+    "whilelt p2.s, x28, %x[n_channels]\n"
+    "whilelt p1.s, x27, %x[n_channels]\n"
+    "whilelt p0.s, x26, %x[n_channels]\n"
     "b.none 7f\n"
     "1:"  // 4-vectors of channels
-    "lsr x24, %x[n_valid_cells], #0x2\n"
+    "lsr x25, %x[n_valid_cells], #0x2\n"
     "mov z5.b, #0x0\n"
     "mov z4.b, #0x0\n"
-    "mov x19, %x[inptrs]\n"
+    "mov x20, %x[inptrs]\n"
     "mov z3.b, #0x0\n"
     "mov z2.b, #0x0\n"
-    "cbz x24, 4f\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "subs x24, x24, #0x1\n"
-    "ld1w { z1.s }, p3/Z, [x23, x28, LSL #2]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
-    "add x19, x19, #0x20\n"
-    "ld1w { z0.s }, p3/Z, [x22, x28, LSL #2]\n"
-    "ld1w { z31.s }, p3/Z, [x21, x28, LSL #2]\n"
-    "ld1w { z30.s }, p3/Z, [x20, x28, LSL #2]\n"
-    "ld1w { z29.s }, p2/Z, [x23, x27, LSL #2]\n"
-    "ld1w { z22.s }, p2/Z, [x22, x27, LSL #2]\n"
-    "ld1w { z28.s }, p2/Z, [x21, x27, LSL #2]\n"
-    "ld1w { z18.s }, p2/Z, [x20, x27, LSL #2]\n"
-    "ld1w { z27.s }, p1/Z, [x23, x26, LSL #2]\n"
-    "ld1w { z21.s }, p1/Z, [x22, x26, LSL #2]\n"
-    "ld1w { z26.s }, p1/Z, [x21, x26, LSL #2]\n"
-    "ld1w { z17.s }, p1/Z, [x20, x26, LSL #2]\n"
-    "ld1w { z25.s }, p0/Z, [x23, x25, LSL #2]\n"
-    "ld1w { z20.s }, p0/Z, [x22, x25, LSL #2]\n"
-    "ld1w { z24.s }, p0/Z, [x21, x25, LSL #2]\n"
-    "ld1w { z16.s }, p0/Z, [x20, x25, LSL #2]\n"
+    "cbz x25, 4f\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "subs x25, x25, #0x1\n"
+    "ld1w { z1.s }, p3/Z, [x24, x9, LSL #2]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "add x20, x20, #0x20\n"
+    "ld1w { z0.s }, p3/Z, [x23, x9, LSL #2]\n"
+    "ld1w { z31.s }, p3/Z, [x22, x9, LSL #2]\n"
+    "ld1w { z30.s }, p3/Z, [x21, x9, LSL #2]\n"
+    "ld1w { z29.s }, p2/Z, [x24, x28, LSL #2]\n"
+    "ld1w { z22.s }, p2/Z, [x23, x28, LSL #2]\n"
+    "ld1w { z28.s }, p2/Z, [x22, x28, LSL #2]\n"
+    "ld1w { z18.s }, p2/Z, [x21, x28, LSL #2]\n"
+    "ld1w { z27.s }, p1/Z, [x24, x27, LSL #2]\n"
+    "ld1w { z21.s }, p1/Z, [x23, x27, LSL #2]\n"
+    "ld1w { z26.s }, p1/Z, [x22, x27, LSL #2]\n"
+    "ld1w { z17.s }, p1/Z, [x21, x27, LSL #2]\n"
+    "ld1w { z25.s }, p0/Z, [x24, x26, LSL #2]\n"
+    "ld1w { z20.s }, p0/Z, [x23, x26, LSL #2]\n"
+    "ld1w { z24.s }, p0/Z, [x22, x26, LSL #2]\n"
+    "ld1w { z16.s }, p0/Z, [x21, x26, LSL #2]\n"
     "beq 3f\n"
     "2:"  // 4-vectors of channels: 4 inputs loop
     "fadd z23.s, z1.s, z0.s\n"
     "fadd z19.s, z31.s, z30.s\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "subs x24, x24, #0x1\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "subs x25, x25, #0x1\n"
     "fadd z22.s, z29.s, z22.s\n"
     "fadd z18.s, z28.s, z18.s\n"
-    "ldp x21, x20, [x19, #0x10]\n"
-    "add x19, x19, #0x20\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "add x20, x20, #0x20\n"
     "fadd z21.s, z27.s, z21.s\n"
     "fadd z17.s, z26.s, z17.s\n"
-    "ld1w { z1.s }, p3/Z, [x23, x28, LSL #2]\n"
+    "ld1w { z1.s }, p3/Z, [x24, x9, LSL #2]\n"
     "fadd z20.s, z25.s, z20.s\n"
     "fadd z16.s, z24.s, z16.s\n"
-    "ld1w { z0.s }, p3/Z, [x22, x28, LSL #2]\n"
+    "ld1w { z0.s }, p3/Z, [x23, x9, LSL #2]\n"
     "fadd z19.s, z23.s, z19.s\n"
     "fadd z18.s, z22.s, z18.s\n"
-    "ld1w { z31.s }, p3/Z, [x21, x28, LSL #2]\n"
+    "ld1w { z31.s }, p3/Z, [x22, x9, LSL #2]\n"
     "fadd z17.s, z21.s, z17.s\n"
     "fadd z16.s, z20.s, z16.s\n"
-    "ld1w { z30.s }, p3/Z, [x20, x28, LSL #2]\n"
+    "ld1w { z30.s }, p3/Z, [x21, x9, LSL #2]\n"
     "fadd z5.s, z5.s, z19.s\n"
     "fadd z4.s, z4.s, z18.s\n"
-    "ld1w { z29.s }, p2/Z, [x23, x27, LSL #2]\n"
+    "ld1w { z29.s }, p2/Z, [x24, x28, LSL #2]\n"
     "fadd z3.s, z3.s, z17.s\n"
     "fadd z2.s, z2.s, z16.s\n"
-    "ld1w { z22.s }, p2/Z, [x22, x27, LSL #2]\n"
-    "ld1w { z28.s }, p2/Z, [x21, x27, LSL #2]\n"
-    "ld1w { z18.s }, p2/Z, [x20, x27, LSL #2]\n"
-    "ld1w { z27.s }, p1/Z, [x23, x26, LSL #2]\n"
-    "ld1w { z21.s }, p1/Z, [x22, x26, LSL #2]\n"
-    "ld1w { z26.s }, p1/Z, [x21, x26, LSL #2]\n"
-    "ld1w { z17.s }, p1/Z, [x20, x26, LSL #2]\n"
-    "ld1w { z25.s }, p0/Z, [x23, x25, LSL #2]\n"
-    "ld1w { z20.s }, p0/Z, [x22, x25, LSL #2]\n"
-    "ld1w { z24.s }, p0/Z, [x21, x25, LSL #2]\n"
-    "ld1w { z16.s }, p0/Z, [x20, x25, LSL #2]\n"
+    "ld1w { z22.s }, p2/Z, [x23, x28, LSL #2]\n"
+    "ld1w { z28.s }, p2/Z, [x22, x28, LSL #2]\n"
+    "ld1w { z18.s }, p2/Z, [x21, x28, LSL #2]\n"
+    "ld1w { z27.s }, p1/Z, [x24, x27, LSL #2]\n"
+    "ld1w { z21.s }, p1/Z, [x23, x27, LSL #2]\n"
+    "ld1w { z26.s }, p1/Z, [x22, x27, LSL #2]\n"
+    "ld1w { z17.s }, p1/Z, [x21, x27, LSL #2]\n"
+    "ld1w { z25.s }, p0/Z, [x24, x26, LSL #2]\n"
+    "ld1w { z20.s }, p0/Z, [x23, x26, LSL #2]\n"
+    "ld1w { z24.s }, p0/Z, [x22, x26, LSL #2]\n"
+    "ld1w { z16.s }, p0/Z, [x21, x26, LSL #2]\n"
     "bgt 2b\n"
     "3:"  // 4-vectors of channels: 4 inputs tail
     "fadd z23.s, z1.s, z0.s\n"
@@ -138,65 +138,65 @@ void sme_fp32_nhwc_avg_generic_depthfirst_impl(
     "fadd z3.s, z3.s, z17.s\n"
     "fadd z2.s, z2.s, z16.s\n"
     "4:"  // 4-vectors of channels: After loop
-    "ands x20, %x[n_valid_cells], #0x3\n"
+    "ands x21, %x[n_valid_cells], #0x3\n"
     "beq 6f\n"
     "5:"  // 4-vectors of channels: Single input loop
-    "ldr x23, [x19], #0x8\n"
-    "ld1w { z1.s }, p3/Z, [x23, x28, LSL #2]\n"
-    "subs x20, x20, #0x1\n"
+    "ldr x24, [x20], #0x8\n"
+    "ld1w { z1.s }, p3/Z, [x24, x9, LSL #2]\n"
+    "subs x21, x21, #0x1\n"
     "fadd z5.s, z5.s, z1.s\n"
-    "ld1w { z29.s }, p2/Z, [x23, x27, LSL #2]\n"
+    "ld1w { z29.s }, p2/Z, [x24, x28, LSL #2]\n"
     "fadd z4.s, z4.s, z29.s\n"
-    "ld1w { z27.s }, p1/Z, [x23, x26, LSL #2]\n"
+    "ld1w { z27.s }, p1/Z, [x24, x27, LSL #2]\n"
     "fadd z3.s, z3.s, z27.s\n"
-    "ld1w { z25.s }, p0/Z, [x23, x25, LSL #2]\n"
+    "ld1w { z25.s }, p0/Z, [x24, x26, LSL #2]\n"
     "fadd z2.s, z2.s, z25.s\n"
     "bgt 5b\n"
     "6:"  // 4-vectors of channels: Single input loop: End
     "fmul z5.s, z5.s, z6.s\n"
     "fmul z4.s, z4.s, z6.s\n"
-    "st1w { z5.s }, p3, [%x[outptr], x28, LSL #2]\n"
-    "incw x28, ALL, MUL #4\n"
+    "st1w { z5.s }, p3, [%x[outptr], x9, LSL #2]\n"
+    "incw x9, ALL, MUL #4\n"
     "fmul z3.s, z3.s, z6.s\n"
     "fmul z2.s, z2.s, z6.s\n"
-    "st1w { z4.s }, p2, [%x[outptr], x27, LSL #2]\n"
+    "st1w { z4.s }, p2, [%x[outptr], x28, LSL #2]\n"
+    "incw x28, ALL, MUL #4\n"
+    "st1w { z3.s }, p1, [%x[outptr], x27, LSL #2]\n"
     "incw x27, ALL, MUL #4\n"
-    "st1w { z3.s }, p1, [%x[outptr], x26, LSL #2]\n"
+    "st1w { z2.s }, p0, [%x[outptr], x26, LSL #2]\n"
     "incw x26, ALL, MUL #4\n"
-    "st1w { z2.s }, p0, [%x[outptr], x25, LSL #2]\n"
-    "incw x25, ALL, MUL #4\n"
-    "whilelt p0.s, x25, %x[n_channels]\n"
+    "whilelt p0.s, x26, %x[n_channels]\n"
     "b.any 1b\n"
     "7:"  // Single vector of channels
-    "whilelt p3.s, x28, %x[n_channels]\n"
+    "whilelt p3.s, x9, %x[n_channels]\n"
     "b.none 14f\n"
     "8:"  // Single vector of channels: Loop
-    "lsr x24, %x[n_valid_cells], #0x2\n"
+    "lsr x25, %x[n_valid_cells], #0x2\n"
     "mov z5.b, #0x0\n"
-    "mov x19, %x[inptrs]\n"
-    "cbz x24, 11f\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "subs x24, x24, #0x1\n"
-    "ld1w { z1.s }, p3/Z, [x23, x28, LSL #2]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
-    "add x19, x19, #0x20\n"
-    "ld1w { z0.s }, p3/Z, [x22, x28, LSL #2]\n"
-    "ld1w { z31.s }, p3/Z, [x21, x28, LSL #2]\n"
-    "ld1w { z30.s }, p3/Z, [x20, x28, LSL #2]\n"
+    "mov x20, %x[inptrs]\n"
+    "cbz x25, 11f\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "subs x25, x25, #0x1\n"
+    "ld1w { z1.s }, p3/Z, [x24, x9, LSL #2]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "add x20, x20, #0x20\n"
+    "ld1w { z0.s }, p3/Z, [x23, x9, LSL #2]\n"
+    "ld1w { z31.s }, p3/Z, [x22, x9, LSL #2]\n"
+    "ld1w { z30.s }, p3/Z, [x21, x9, LSL #2]\n"
     "beq 10f\n"
     "9:"  // Single vector of channels: Loop: 4 inputs loop
     "fadd z23.s, z1.s, z0.s\n"
     "fadd z19.s, z31.s, z30.s\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "subs x24, x24, #0x1\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "subs x25, x25, #0x1\n"
     "fadd z19.s, z23.s, z19.s\n"
-    "ldp x21, x20, [x19, #0x10]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
     "fadd z5.s, z5.s, z19.s\n"
-    "add x19, x19, #0x20\n"
-    "ld1w { z1.s }, p3/Z, [x23, x28, LSL #2]\n"
-    "ld1w { z0.s }, p3/Z, [x22, x28, LSL #2]\n"
-    "ld1w { z31.s }, p3/Z, [x21, x28, LSL #2]\n"
-    "ld1w { z30.s }, p3/Z, [x20, x28, LSL #2]\n"
+    "add x20, x20, #0x20\n"
+    "ld1w { z1.s }, p3/Z, [x24, x9, LSL #2]\n"
+    "ld1w { z0.s }, p3/Z, [x23, x9, LSL #2]\n"
+    "ld1w { z31.s }, p3/Z, [x22, x9, LSL #2]\n"
+    "ld1w { z30.s }, p3/Z, [x21, x9, LSL #2]\n"
     "bgt 9b\n"
     "10:"  // Single vector of channels: Loop: 4 inputs tail
     "fadd z23.s, z1.s, z0.s\n"
@@ -204,25 +204,25 @@ void sme_fp32_nhwc_avg_generic_depthfirst_impl(
     "fadd z19.s, z23.s, z19.s\n"
     "fadd z5.s, z5.s, z19.s\n"
     "11:"  // Single vector of channels: Loop: After loop
-    "ands x20, %x[n_valid_cells], #0x3\n"
+    "ands x21, %x[n_valid_cells], #0x3\n"
     "beq 13f\n"
     "12:"  // Single vector of channels: Loop: Single input loop
-    "ldr x23, [x19], #0x8\n"
-    "ld1w { z1.s }, p3/Z, [x23, x28, LSL #2]\n"
-    "subs x20, x20, #0x1\n"
+    "ldr x24, [x20], #0x8\n"
+    "ld1w { z1.s }, p3/Z, [x24, x9, LSL #2]\n"
+    "subs x21, x21, #0x1\n"
     "fadd z5.s, z5.s, z1.s\n"
     "bgt 12b\n"
     "13:"  // Single vector of channels: Loop: Single input loop: End
     "fmul z5.s, z5.s, z6.s\n"
-    "st1w { z5.s }, p3, [%x[outptr], x28, LSL #2]\n"
-    "incw x28\n"
-    "whilelt p3.s, x28, %x[n_channels]\n"
+    "st1w { z5.s }, p3, [%x[outptr], x9, LSL #2]\n"
+    "incw x9\n"
+    "whilelt p3.s, x9, %x[n_channels]\n"
     "b.any 8b\n"
     "14:"  // End
     ".inst 0xd503467f  // SMSTOP\n"
     :
     : [inptrs] "r" (inptrs), [n_channels] "r" (n_channels), [n_valid_cells] "r" (n_valid_cells), [outptr] "r" (outptr), [rescale_ptr] "r" (&rescale_value)
-    : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+    : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x9", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
   );
 }
 
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp32_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp32_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp
index be254d307b..05edac6623 100644
--- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp32_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp32_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2022 Arm Limited.
+ * Copyright (c) 2022-2023 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -63,82 +63,82 @@ void sme_fp32_nhwc_max_2x2_s1_output2x2_depthfirst_impl(
                         pad_left, pad_top, pad_right, pad_bottom);
 
   __asm__ __volatile__(
-    "ldr x20, [%x[args], %[offsetof_outptrs]]\n"
+    "ldr x21, [%x[args], %[offsetof_outptrs]]\n"
     ".inst 0xd503477f  // SMSTART ZA\n"
-    "mov x14, #0x0\n"
+    "mov x15, #0x0\n"
     "ptrue p2.b\n"
-    "ldr x19, [%x[args], %[offsetof_inptrs]]\n"
-    "mov x13, #0x0\n"
-    "ldr x12, [%x[args], %[offsetof_n_channels]]\n"
-    "whilelt p1.s, x14, x12\n"
-    "ldp x11, x10, [x20, #0x0]\n"
-    "ldp x9, x28, [x20, #0x10]\n"
-    "ldp x27, x26, [x19, #0x0]\n"
-    "ld1w { z29.s }, p1/Z, [x26, x14, LSL #2]\n"
-    "ldp x25, x24, [x19, #0x10]\n"
-    "ld1w { z28.s }, p1/Z, [x24, x14, LSL #2]\n"
-    "ldp x23, x22, [x19, #0x20]\n"
-    "ld1w { z27.s }, p1/Z, [x23, x14, LSL #2]\n"
-    "ldp x21, x20, [x19, #0x30]\n"
-    "ld1w { z26.s }, p1/Z, [x20, x14, LSL #2]\n"
-    "ldr x19, [x19, #0x40]\n"
-    "ld1w { z20.s }, p1/Z, [x27, x14, LSL #2]\n"
-    "ld1w { z25.s }, p1/Z, [x22, x14, LSL #2]\n"
-    "ld1w { z24.s }, p1/Z, [x25, x14, LSL #2]\n"
-    "ld1w { z23.s }, p1/Z, [x21, x14, LSL #2]\n"
-    "ld1w { z19.s }, p1/Z, [x19, x14, LSL #2]\n"
-    "incw x14\n"
-    "whilelt p1.s, x14, x12\n"
+    "ldr x20, [%x[args], %[offsetof_inptrs]]\n"
+    "mov x14, #0x0\n"
+    "ldr x13, [%x[args], %[offsetof_n_channels]]\n"
+    "whilelt p1.s, x15, x13\n"
+    "ldp x12, x11, [x21, #0x0]\n"
+    "ldp x10, x9, [x21, #0x10]\n"
+    "ldp x28, x27, [x20, #0x0]\n"
+    "ld1w { z30.s }, p1/Z, [x27, x15, LSL #2]\n"
+    "ldp x26, x25, [x20, #0x10]\n"
+    "ld1w { z29.s }, p1/Z, [x25, x15, LSL #2]\n"
+    "ldp x24, x23, [x20, #0x20]\n"
+    "ld1w { z28.s }, p1/Z, [x24, x15, LSL #2]\n"
+    "ldp x22, x21, [x20, #0x30]\n"
+    "ld1w { z27.s }, p1/Z, [x21, x15, LSL #2]\n"
+    "ldr x20, [x20, #0x40]\n"
+    "ld1w { z26.s }, p1/Z, [x28, x15, LSL #2]\n"
+    "ld1w { z25.s }, p1/Z, [x26, x15, LSL #2]\n"
+    "ld1w { z24.s }, p1/Z, [x23, x15, LSL #2]\n"
+    "ld1w { z23.s }, p1/Z, [x22, x15, LSL #2]\n"
+    "ld1w { z19.s }, p1/Z, [x20, x15, LSL #2]\n"
+    "incw x15\n"
+    "whilelt p1.s, x15, x13\n"
     "b.none 2f\n"
     "1:"  // Vector: Loop
-    "movprfx z22, z29\n fmax z22.s, p2/M, z22.s, z27.s\n"
-    "movprfx z21, z27\n fmax z21.s, p2/M, z21.s, z26.s\n"
-    "ld1w { z29.s }, p1/Z, [x26, x14, LSL #2]\n"
-    "whilelt p0.s, x13, x12\n"
-    "movprfx z18, z28\n fmax z18.s, p2/M, z18.s, z20.s\n"
-    "movprfx z20, z25\n fmax z20.s, p2/M, z20.s, z24.s\n"
-    "ld1w { z27.s }, p1/Z, [x23, x14, LSL #2]\n"
-    "movprfx z17, z23\n fmax z17.s, p2/M, z17.s, z28.s\n"
-    "movprfx z16, z25\n fmax z16.s, p2/M, z16.s, z19.s\n"
-    "ld1w { z26.s }, p1/Z, [x20, x14, LSL #2]\n"
-    "ld1w { z28.s }, p1/Z, [x24, x14, LSL #2]\n"
-    "movprfx z19, z18\n fmax z19.s, p2/M, z19.s, z22.s\n"
-    "movprfx z18, z22\n fmax z18.s, p2/M, z18.s, z20.s\n"
-    "ld1w { z20.s }, p1/Z, [x27, x14, LSL #2]\n"
+    "movprfx z22, z30\n fmax z22.s, p2/M, z22.s, z28.s\n"
+    "movprfx z21, z28\n fmax z21.s, p2/M, z21.s, z27.s\n"
+    "ld1w { z30.s }, p1/Z, [x27, x15, LSL #2]\n"
+    "whilelt p0.s, x14, x13\n"
+    "movprfx z20, z29\n fmax z20.s, p2/M, z20.s, z26.s\n"
+    "movprfx z18, z25\n fmax z18.s, p2/M, z18.s, z24.s\n"
+    "ld1w { z28.s }, p1/Z, [x24, x15, LSL #2]\n"
+    "movprfx z17, z29\n fmax z17.s, p2/M, z17.s, z23.s\n"
+    "movprfx z16, z24\n fmax z16.s, p2/M, z16.s, z19.s\n"
+    "ld1w { z27.s }, p1/Z, [x21, x15, LSL #2]\n"
+    "ld1w { z29.s }, p1/Z, [x25, x15, LSL #2]\n"
+    "movprfx z19, z22\n fmax z19.s, p2/M, z19.s, z20.s\n"
+    "fmax z18.s, p2/M, z18.s, z22.s\n"
+    "ld1w { z26.s }, p1/Z, [x28, x15, LSL #2]\n"
     "fmax z17.s, p2/M, z17.s, z21.s\n"
     "fmax z16.s, p2/M, z16.s, z21.s\n"
-    "ld1w { z25.s }, p1/Z, [x22, x14, LSL #2]\n"
-    "st1w { z19.s }, p0, [x11, x13, LSL #2]\n"
-    "ld1w { z24.s }, p1/Z, [x25, x14, LSL #2]\n"
-    "st1w { z18.s }, p0, [x10, x13, LSL #2]\n"
-    "ld1w { z23.s }, p1/Z, [x21, x14, LSL #2]\n"
-    "st1w { z17.s }, p0, [x9, x13, LSL #2]\n"
-    "ld1w { z19.s }, p1/Z, [x19, x14, LSL #2]\n"
+    "ld1w { z25.s }, p1/Z, [x26, x15, LSL #2]\n"
+    "st1w { z19.s }, p0, [x12, x14, LSL #2]\n"
+    "ld1w { z24.s }, p1/Z, [x23, x15, LSL #2]\n"
+    "st1w { z18.s }, p0, [x11, x14, LSL #2]\n"
+    "ld1w { z23.s }, p1/Z, [x22, x15, LSL #2]\n"
+    "st1w { z17.s }, p0, [x10, x14, LSL #2]\n"
+    "ld1w { z19.s }, p1/Z, [x20, x15, LSL #2]\n"
+    "incw x15\n"
+    "whilelt p1.s, x15, x13\n"
+    "st1w { z16.s }, p0, [x9, x14, LSL #2]\n"
     "incw x14\n"
-    "whilelt p1.s, x14, x12\n"
-    "st1w { z16.s }, p0, [x28, x13, LSL #2]\n"
-    "incw x13\n"
     "b.any 1b\n"
     "2:"  // Vector: Tail
-    "movprfx z22, z29\n fmax z22.s, p2/M, z22.s, z27.s\n"
-    "movprfx z21, z27\n fmax z21.s, p2/M, z21.s, z26.s\n"
-    "whilelt p0.s, x13, x12\n"
-    "movprfx z18, z28\n fmax z18.s, p2/M, z18.s, z20.s\n"
-    "movprfx z20, z25\n fmax z20.s, p2/M, z20.s, z24.s\n"
-    "movprfx z17, z23\n fmax z17.s, p2/M, z17.s, z28.s\n"
-    "movprfx z16, z25\n fmax z16.s, p2/M, z16.s, z19.s\n"
-    "movprfx z19, z18\n fmax z19.s, p2/M, z19.s, z22.s\n"
-    "movprfx z18, z22\n fmax z18.s, p2/M, z18.s, z20.s\n"
-    "st1w { z19.s }, p0, [x11, x13, LSL #2]\n"
+    "movprfx z22, z30\n fmax z22.s, p2/M, z22.s, z28.s\n"
+    "movprfx z21, z28\n fmax z21.s, p2/M, z21.s, z27.s\n"
+    "whilelt p0.s, x14, x13\n"
+    "movprfx z20, z29\n fmax z20.s, p2/M, z20.s, z26.s\n"
+    "movprfx z18, z25\n fmax z18.s, p2/M, z18.s, z24.s\n"
+    "movprfx z17, z29\n fmax z17.s, p2/M, z17.s, z23.s\n"
+    "movprfx z16, z24\n fmax z16.s, p2/M, z16.s, z19.s\n"
+    "movprfx z19, z22\n fmax z19.s, p2/M, z19.s, z20.s\n"
+    "fmax z18.s, p2/M, z18.s, z22.s\n"
+    "st1w { z19.s }, p0, [x12, x14, LSL #2]\n"
     "fmax z17.s, p2/M, z17.s, z21.s\n"
     "fmax z16.s, p2/M, z16.s, z21.s\n"
-    "st1w { z18.s }, p0, [x10, x13, LSL #2]\n"
-    "st1w { z17.s }, p0, [x9, x13, LSL #2]\n"
-    "st1w { z16.s }, p0, [x28, x13, LSL #2]\n"
+    "st1w { z18.s }, p0, [x11, x14, LSL #2]\n"
+    "st1w { z17.s }, p0, [x10, x14, LSL #2]\n"
+    "st1w { z16.s }, p0, [x9, x14, LSL #2]\n"
     ".inst 0xd503467f  // SMSTOP\n"
     :
     : [args] "r" (&args), [offsetof_inptrs] "I" (offsetof(KernelArgs, inptrs)), [offsetof_n_channels] "I" (offsetof(KernelArgs, n_channels)), [offsetof_outptrs] "I" (offsetof(KernelArgs, outptrs))
-    : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x9", "x10", "x11", "x12", "x13", "x14", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+    : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
   );
 }
 
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp32_nhwc_max_generic_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp32_nhwc_max_generic_depthfirst/generic.cpp
index b9f90ea2ef..14c07724a1 100644
--- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp32_nhwc_max_generic_depthfirst/generic.cpp
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_fp32_nhwc_max_generic_depthfirst/generic.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2022 Arm Limited.
+ * Copyright (c) 2022-2023 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -40,82 +40,82 @@ void sme_fp32_nhwc_max_generic_depthfirst_impl(
 {
   __asm__ __volatile__(
     ".inst 0xd503477f  // SMSTART ZA\n"
-    "mov x28, #0x0\n"
-    "cntw x27\n"
-    "cntw x26, ALL, MUL #2\n"
-    "cntw x25, ALL, MUL #3\n"
-    "whilelt p4.s, x28, %x[n_channels]\n"
-    "whilelt p3.s, x27, %x[n_channels]\n"
-    "whilelt p2.s, x26, %x[n_channels]\n"
-    "whilelt p1.s, x25, %x[n_channels]\n"
+    "mov x9, #0x0\n"
+    "cntw x28\n"
+    "cntw x27, ALL, MUL #2\n"
+    "cntw x26, ALL, MUL #3\n"
+    "whilelt p4.s, x9, %x[n_channels]\n"
+    "whilelt p3.s, x28, %x[n_channels]\n"
+    "whilelt p2.s, x27, %x[n_channels]\n"
+    "whilelt p1.s, x26, %x[n_channels]\n"
     "ptrue p0.b\n"
     "b.none 7f\n"
     "1:"  // 4-vectors of channels
-    "lsr x24, %x[n_valid_cells], #0x2\n"
+    "lsr x25, %x[n_valid_cells], #0x2\n"
     "mov z4.s, #0xff800000\n"
     "mov z3.s, #0xff800000\n"
-    "mov x19, %x[inptrs]\n"
+    "mov x20, %x[inptrs]\n"
     "mov z2.s, #0xff800000\n"
     "mov z1.s, #0xff800000\n"
-    "cbz x24, 4f\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "subs x24, x24, #0x1\n"
-    "ld1w { z0.s }, p4/Z, [x23, x28, LSL #2]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
-    "add x19, x19, #0x20\n"
-    "ld1w { z31.s }, p4/Z, [x22, x28, LSL #2]\n"
-    "ld1w { z23.s }, p4/Z, [x21, x28, LSL #2]\n"
-    "ld1w { z30.s }, p4/Z, [x20, x28, LSL #2]\n"
-    "ld1w { z18.s }, p3/Z, [x23, x27, LSL #2]\n"
-    "ld1w { z29.s }, p3/Z, [x22, x27, LSL #2]\n"
-    "ld1w { z22.s }, p3/Z, [x21, x27, LSL #2]\n"
-    "ld1w { z28.s }, p3/Z, [x20, x27, LSL #2]\n"
-    "ld1w { z17.s }, p2/Z, [x23, x26, LSL #2]\n"
-    "ld1w { z27.s }, p2/Z, [x22, x26, LSL #2]\n"
-    "ld1w { z21.s }, p2/Z, [x21, x26, LSL #2]\n"
-    "ld1w { z26.s }, p2/Z, [x20, x26, LSL #2]\n"
-    "ld1w { z16.s }, p1/Z, [x23, x25, LSL #2]\n"
-    "ld1w { z25.s }, p1/Z, [x22, x25, LSL #2]\n"
-    "ld1w { z20.s }, p1/Z, [x21, x25, LSL #2]\n"
-    "ld1w { z24.s }, p1/Z, [x20, x25, LSL #2]\n"
+    "cbz x25, 4f\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "subs x25, x25, #0x1\n"
+    "ld1w { z0.s }, p4/Z, [x24, x9, LSL #2]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "add x20, x20, #0x20\n"
+    "ld1w { z31.s }, p4/Z, [x23, x9, LSL #2]\n"
+    "ld1w { z23.s }, p4/Z, [x22, x9, LSL #2]\n"
+    "ld1w { z30.s }, p4/Z, [x21, x9, LSL #2]\n"
+    "ld1w { z18.s }, p3/Z, [x24, x28, LSL #2]\n"
+    "ld1w { z29.s }, p3/Z, [x23, x28, LSL #2]\n"
+    "ld1w { z22.s }, p3/Z, [x22, x28, LSL #2]\n"
+    "ld1w { z28.s }, p3/Z, [x21, x28, LSL #2]\n"
+    "ld1w { z17.s }, p2/Z, [x24, x27, LSL #2]\n"
+    "ld1w { z27.s }, p2/Z, [x23, x27, LSL #2]\n"
+    "ld1w { z21.s }, p2/Z, [x22, x27, LSL #2]\n"
+    "ld1w { z26.s }, p2/Z, [x21, x27, LSL #2]\n"
+    "ld1w { z16.s }, p1/Z, [x24, x26, LSL #2]\n"
+    "ld1w { z25.s }, p1/Z, [x23, x26, LSL #2]\n"
+    "ld1w { z20.s }, p1/Z, [x22, x26, LSL #2]\n"
+    "ld1w { z24.s }, p1/Z, [x21, x26, LSL #2]\n"
     "beq 3f\n"
     "2:"  // 4-vectors of channels: 4 inputs loop
     "movprfx z19, z0\n fmax z19.s, p0/M, z19.s, z31.s\n"
     "fmax z23.s, p0/M, z23.s, z30.s\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "subs x24, x24, #0x1\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "subs x25, x25, #0x1\n"
     "fmax z18.s, p0/M, z18.s, z29.s\n"
     "fmax z22.s, p0/M, z22.s, z28.s\n"
-    "ldp x21, x20, [x19, #0x10]\n"
-    "add x19, x19, #0x20\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "add x20, x20, #0x20\n"
     "fmax z17.s, p0/M, z17.s, z27.s\n"
     "fmax z21.s, p0/M, z21.s, z26.s\n"
-    "ld1w { z0.s }, p4/Z, [x23, x28, LSL #2]\n"
+    "ld1w { z0.s }, p4/Z, [x24, x9, LSL #2]\n"
     "fmax z16.s, p0/M, z16.s, z25.s\n"
     "fmax z20.s, p0/M, z20.s, z24.s\n"
-    "ld1w { z31.s }, p4/Z, [x22, x28, LSL #2]\n"
+    "ld1w { z31.s }, p4/Z, [x23, x9, LSL #2]\n"
     "fmax z19.s, p0/M, z19.s, z23.s\n"
     "fmax z18.s, p0/M, z18.s, z22.s\n"
-    "ld1w { z23.s }, p4/Z, [x21, x28, LSL #2]\n"
+    "ld1w { z23.s }, p4/Z, [x22, x9, LSL #2]\n"
     "fmax z17.s, p0/M, z17.s, z21.s\n"
     "fmax z16.s, p0/M, z16.s, z20.s\n"
-    "ld1w { z30.s }, p4/Z, [x20, x28, LSL #2]\n"
+    "ld1w { z30.s }, p4/Z, [x21, x9, LSL #2]\n"
     "fmax z4.s, p0/M, z4.s, z19.s\n"
     "fmax z3.s, p0/M, z3.s, z18.s\n"
-    "ld1w { z18.s }, p3/Z, [x23, x27, LSL #2]\n"
+    "ld1w { z18.s }, p3/Z, [x24, x28, LSL #2]\n"
     "fmax z2.s, p0/M, z2.s, z17.s\n"
     "fmax z1.s, p0/M, z1.s, z16.s\n"
-    "ld1w { z29.s }, p3/Z, [x22, x27, LSL #2]\n"
-    "ld1w { z22.s }, p3/Z, [x21, x27, LSL #2]\n"
-    "ld1w { z28.s }, p3/Z, [x20, x27, LSL #2]\n"
-    "ld1w { z17.s }, p2/Z, [x23, x26, LSL #2]\n"
-    "ld1w { z27.s }, p2/Z, [x22, x26, LSL #2]\n"
-    "ld1w { z21.s }, p2/Z, [x21, x26, LSL #2]\n"
-    "ld1w { z26.s }, p2/Z, [x20, x26, LSL #2]\n"
-    "ld1w { z16.s }, p1/Z, [x23, x25, LSL #2]\n"
-    "ld1w { z25.s }, p1/Z, [x22, x25, LSL #2]\n"
-    "ld1w { z20.s }, p1/Z, [x21, x25, LSL #2]\n"
-    "ld1w { z24.s }, p1/Z, [x20, x25, LSL #2]\n"
+    "ld1w { z29.s }, p3/Z, [x23, x28, LSL #2]\n"
+    "ld1w { z22.s }, p3/Z, [x22, x28, LSL #2]\n"
+    "ld1w { z28.s }, p3/Z, [x21, x28, LSL #2]\n"
+    "ld1w { z17.s }, p2/Z, [x24, x27, LSL #2]\n"
+    "ld1w { z27.s }, p2/Z, [x23, x27, LSL #2]\n"
+    "ld1w { z21.s }, p2/Z, [x22, x27, LSL #2]\n"
+    "ld1w { z26.s }, p2/Z, [x21, x27, LSL #2]\n"
+    "ld1w { z16.s }, p1/Z, [x24, x26, LSL #2]\n"
+    "ld1w { z25.s }, p1/Z, [x23, x26, LSL #2]\n"
+    "ld1w { z20.s }, p1/Z, [x22, x26, LSL #2]\n"
+    "ld1w { z24.s }, p1/Z, [x21, x26, LSL #2]\n"
     "bgt 2b\n"
     "3:"  // 4-vectors of channels: 4 inputs tail
     "movprfx z19, z0\n fmax z19.s, p0/M, z19.s, z31.s\n"
@@ -135,61 +135,61 @@ void sme_fp32_nhwc_max_generic_depthfirst_impl(
     "fmax z2.s, p0/M, z2.s, z17.s\n"
     "fmax z1.s, p0/M, z1.s, z16.s\n"
     "4:"  // 4-vectors of channels: After loop
-    "ands x20, %x[n_valid_cells], #0x3\n"
+    "ands x21, %x[n_valid_cells], #0x3\n"
     "beq 6f\n"
     "5:"  // 4-vectors of channels: Single input loop
-    "ldr x23, [x19], #0x8\n"
-    "ld1w { z0.s }, p4/Z, [x23, x28, LSL #2]\n"
-    "subs x20, x20, #0x1\n"
+    "ldr x24, [x20], #0x8\n"
+    "ld1w { z0.s }, p4/Z, [x24, x9, LSL #2]\n"
+    "subs x21, x21, #0x1\n"
     "fmax z4.s, p0/M, z4.s, z0.s\n"
-    "ld1w { z18.s }, p3/Z, [x23, x27, LSL #2]\n"
+    "ld1w { z18.s }, p3/Z, [x24, x28, LSL #2]\n"
     "fmax z3.s, p0/M, z3.s, z18.s\n"
-    "ld1w { z17.s }, p2/Z, [x23, x26, LSL #2]\n"
+    "ld1w { z17.s }, p2/Z, [x24, x27, LSL #2]\n"
     "fmax z2.s, p0/M, z2.s, z17.s\n"
-    "ld1w { z16.s }, p1/Z, [x23, x25, LSL #2]\n"
+    "ld1w { z16.s }, p1/Z, [x24, x26, LSL #2]\n"
     "fmax z1.s, p0/M, z1.s, z16.s\n"
     "bgt 5b\n"
     "6:"  // 4-vectors of channels: Single input loop: End
-    "st1w { z4.s }, p4, [%x[outptr], x28, LSL #2]\n"
+    "st1w { z4.s }, p4, [%x[outptr], x9, LSL #2]\n"
+    "incw x9, ALL, MUL #4\n"
+    "st1w { z3.s }, p3, [%x[outptr], x28, LSL #2]\n"
     "incw x28, ALL, MUL #4\n"
-    "st1w { z3.s }, p3, [%x[outptr], x27, LSL #2]\n"
+    "st1w { z2.s }, p2, [%x[outptr], x27, LSL #2]\n"
     "incw x27, ALL, MUL #4\n"
-    "st1w { z2.s }, p2, [%x[outptr], x26, LSL #2]\n"
+    "st1w { z1.s }, p1, [%x[outptr], x26, LSL #2]\n"
     "incw x26, ALL, MUL #4\n"
-    "st1w { z1.s }, p1, [%x[outptr], x25, LSL #2]\n"
-    "incw x25, ALL, MUL #4\n"
-    "whilelt p1.s, x25, %x[n_channels]\n"
+    "whilelt p1.s, x26, %x[n_channels]\n"
     "b.any 1b\n"
     "7:"  // Single vector of channels
-    "whilelt p4.s, x28, %x[n_channels]\n"
+    "whilelt p4.s, x9, %x[n_channels]\n"
     "b.none 14f\n"
     "8:"  // Single vector of channels: Loop
-    "lsr x24, %x[n_valid_cells], #0x2\n"
+    "lsr x25, %x[n_valid_cells], #0x2\n"
     "mov z4.s, #0xff800000\n"
-    "mov x19, %x[inptrs]\n"
-    "cbz x24, 11f\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "subs x24, x24, #0x1\n"
-    "ld1w { z0.s }, p4/Z, [x23, x28, LSL #2]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
-    "add x19, x19, #0x20\n"
-    "ld1w { z31.s }, p4/Z, [x22, x28, LSL #2]\n"
-    "ld1w { z23.s }, p4/Z, [x21, x28, LSL #2]\n"
-    "ld1w { z30.s }, p4/Z, [x20, x28, LSL #2]\n"
+    "mov x20, %x[inptrs]\n"
+    "cbz x25, 11f\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "subs x25, x25, #0x1\n"
+    "ld1w { z0.s }, p4/Z, [x24, x9, LSL #2]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "add x20, x20, #0x20\n"
+    "ld1w { z31.s }, p4/Z, [x23, x9, LSL #2]\n"
+    "ld1w { z23.s }, p4/Z, [x22, x9, LSL #2]\n"
+    "ld1w { z30.s }, p4/Z, [x21, x9, LSL #2]\n"
     "beq 10f\n"
     "9:"  // Single vector of channels: Loop: 4 inputs loop
     "movprfx z19, z0\n fmax z19.s, p0/M, z19.s, z31.s\n"
     "fmax z23.s, p0/M, z23.s, z30.s\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "subs x24, x24, #0x1\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "subs x25, x25, #0x1\n"
     "fmax z19.s, p0/M, z19.s, z23.s\n"
-    "ldp x21, x20, [x19, #0x10]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
     "fmax z4.s, p0/M, z4.s, z19.s\n"
-    "add x19, x19, #0x20\n"
-    "ld1w { z0.s }, p4/Z, [x23, x28, LSL #2]\n"
-    "ld1w { z31.s }, p4/Z, [x22, x28, LSL #2]\n"
-    "ld1w { z23.s }, p4/Z, [x21, x28, LSL #2]\n"
-    "ld1w { z30.s }, p4/Z, [x20, x28, LSL #2]\n"
+    "add x20, x20, #0x20\n"
+    "ld1w { z0.s }, p4/Z, [x24, x9, LSL #2]\n"
+    "ld1w { z31.s }, p4/Z, [x23, x9, LSL #2]\n"
+    "ld1w { z23.s }, p4/Z, [x22, x9, LSL #2]\n"
+    "ld1w { z30.s }, p4/Z, [x21, x9, LSL #2]\n"
     "bgt 9b\n"
     "10:"  // Single vector of channels: Loop: 4 inputs tail
     "movprfx z19, z0\n fmax z19.s, p0/M, z19.s, z31.s\n"
@@ -197,24 +197,24 @@ void sme_fp32_nhwc_max_generic_depthfirst_impl(
     "fmax z19.s, p0/M, z19.s, z23.s\n"
     "fmax z4.s, p0/M, z4.s, z19.s\n"
     "11:"  // Single vector of channels: Loop: After loop
-    "ands x20, %x[n_valid_cells], #0x3\n"
+    "ands x21, %x[n_valid_cells], #0x3\n"
     "beq 13f\n"
     "12:"  // Single vector of channels: Loop: Single input loop
-    "ldr x23, [x19], #0x8\n"
-    "ld1w { z0.s }, p4/Z, [x23, x28, LSL #2]\n"
-    "subs x20, x20, #0x1\n"
+    "ldr x24, [x20], #0x8\n"
+    "ld1w { z0.s }, p4/Z, [x24, x9, LSL #2]\n"
+    "subs x21, x21, #0x1\n"
     "fmax z4.s, p0/M, z4.s, z0.s\n"
     "bgt 12b\n"
     "13:"  // Single vector of channels: Loop: Single input loop: End
-    "st1w { z4.s }, p4, [%x[outptr], x28, LSL #2]\n"
-    "incw x28\n"
-    "whilelt p4.s, x28, %x[n_channels]\n"
+    "st1w { z4.s }, p4, [%x[outptr], x9, LSL #2]\n"
+    "incw x9\n"
+    "whilelt p4.s, x9, %x[n_channels]\n"
     "b.any 8b\n"
     "14:"  // End
     ".inst 0xd503467f  // SMSTOP\n"
     :
     : [inptrs] "r" (inptrs), [n_channels] "r" (n_channels), [n_valid_cells] "r" (n_valid_cells), [outptr] "r" (outptr)
-    : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+    : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x9", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
   );
 }
 
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_s8_nhwc_avg_generic_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_s8_nhwc_avg_generic_depthfirst/generic.cpp
index c5066d1017..ded1274c13 100644
--- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_s8_nhwc_avg_generic_depthfirst/generic.cpp
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_s8_nhwc_avg_generic_depthfirst/generic.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2022 Arm Limited.
+ * Copyright (c) 2022-2023 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -84,31 +84,32 @@ void sme_s8_nhwc_avg_generic_depthfirst_impl(
       f_rescale_value *= 2.0f;
     }
 
-    rescale_value = static_cast<int32_t>(round(f_rescale_value * static_cast<float>(1ll << 31)));
-    if (static_cast<int64_t>(rescale_value) == (1ll << 31))
+    int64_t long_rescale_value = round(f_rescale_value * static_cast<float>(1ll << 31));
+    if (long_rescale_value == (1ll << 31))
     {
       shift_value++;
-      rescale_value >>= 1;
+      long_rescale_value >>= 1;
     }
+    rescale_value = static_cast<int32_t>(long_rescale_value);
   }
 
   __asm__ __volatile__(
     ".inst 0xd503477f  // SMSTART ZA\n"
-    "mov x26, #0x0\n"
-    "cntb x25\n"
-    "cntb x24, ALL, MUL #2\n"
-    "cntb x23, ALL, MUL #3\n"
-    "whilelt p4.b, x26, %x[n_channels]\n"
-    "whilelt p3.b, x25, %x[n_channels]\n"
-    "whilelt p2.b, x24, %x[n_channels]\n"
-    "whilelt p1.b, x23, %x[n_channels]\n"
+    "mov x27, #0x0\n"
+    "cntb x26\n"
+    "cntb x25, ALL, MUL #2\n"
+    "cntb x24, ALL, MUL #3\n"
+    "whilelt p4.b, x27, %x[n_channels]\n"
+    "whilelt p3.b, x26, %x[n_channels]\n"
+    "whilelt p2.b, x25, %x[n_channels]\n"
+    "whilelt p1.b, x24, %x[n_channels]\n"
     "ptrue p0.b\n"
     "b.none 7f\n"
     "1:"  // 4-vectors of channels
-    "lsr x22, %x[n_valid_cells], #0x1\n"
+    "lsr x23, %x[n_valid_cells], #0x1\n"
     "mov z15.s, #0x0\n"
     "mov z14.s, #0x0\n"
-    "mov x19, %x[inptrs]\n"
+    "mov x20, %x[inptrs]\n"
     "mov z13.s, #0x0\n"
     "mov z12.s, #0x0\n"
     "mov z11.s, #0x0\n"
@@ -123,49 +124,49 @@ void sme_s8_nhwc_avg_generic_depthfirst_impl(
     "mov z2.s, #0x0\n"
     "mov z1.s, #0x0\n"
     "mov z0.s, #0x0\n"
-    "cbz x22, 4f\n"
-    "ldp x21, x20, [x19, #0x0]\n"
-    "subs x22, x22, #0x1\n"
-    "add x19, x19, #0x10\n"
-    "ld1b { z31.b }, p4/Z, [x21, x26]\n"
-    "ld1b { z30.b }, p4/Z, [x20, x26]\n"
-    "ld1b { z29.b }, p3/Z, [x21, x25]\n"
-    "ld1b { z28.b }, p3/Z, [x20, x25]\n"
-    "ld1b { z27.b }, p2/Z, [x21, x24]\n"
-    "ld1b { z26.b }, p2/Z, [x20, x24]\n"
-    "ld1b { z25.b }, p1/Z, [x21, x23]\n"
-    "ld1b { z24.b }, p1/Z, [x20, x23]\n"
+    "cbz x23, 4f\n"
+    "ldp x22, x21, [x20, #0x0]\n"
+    "subs x23, x23, #0x1\n"
+    "add x20, x20, #0x10\n"
+    "ld1b { z31.b }, p4/Z, [x22, x27]\n"
+    "ld1b { z30.b }, p4/Z, [x21, x27]\n"
+    "ld1b { z29.b }, p3/Z, [x22, x26]\n"
+    "ld1b { z28.b }, p3/Z, [x21, x26]\n"
+    "ld1b { z27.b }, p2/Z, [x22, x25]\n"
+    "ld1b { z26.b }, p2/Z, [x21, x25]\n"
+    "ld1b { z25.b }, p1/Z, [x22, x24]\n"
+    "ld1b { z24.b }, p1/Z, [x21, x24]\n"
     "beq 3f\n"
     "2:"  // 4-vectors of channels: 2 inputs loop
     ".inst 0x455e03f7  // saddlb z23.h, z31.b, z30.b\n"
     ".inst 0x455e07f6  // saddlt z22.h, z31.b, z30.b\n"
-    "ldp x21, x20, [x19, #0x0]\n"
-    "subs x22, x22, #0x1\n"
+    "ldp x22, x21, [x20, #0x0]\n"
+    "subs x23, x23, #0x1\n"
     ".inst 0x455c03b5  // saddlb z21.h, z29.b, z28.b\n"
     ".inst 0x455c07b4  // saddlt z20.h, z29.b, z28.b\n"
-    "add x19, x19, #0x10\n"
-    "ld1b { z31.b }, p4/Z, [x21, x26]\n"
+    "add x20, x20, #0x10\n"
+    "ld1b { z31.b }, p4/Z, [x22, x27]\n"
     ".inst 0x455a0373  // saddlb z19.h, z27.b, z26.b\n"
     ".inst 0x455a0772  // saddlt z18.h, z27.b, z26.b\n"
-    "ld1b { z30.b }, p4/Z, [x20, x26]\n"
+    "ld1b { z30.b }, p4/Z, [x21, x27]\n"
     ".inst 0x45580331  // saddlb z17.h, z25.b, z24.b\n"
     ".inst 0x45580730  // saddlt z16.h, z25.b, z24.b\n"
-    "ld1b { z29.b }, p3/Z, [x21, x25]\n"
+    "ld1b { z29.b }, p3/Z, [x22, x26]\n"
     ".inst 0x459741ef  // saddwb z15.s, z15.s, z23.h\n"
     ".inst 0x459745ce  // saddwt z14.s, z14.s, z23.h\n"
-    "ld1b { z28.b }, p3/Z, [x20, x25]\n"
+    "ld1b { z28.b }, p3/Z, [x21, x26]\n"
     ".inst 0x459641ad  // saddwb z13.s, z13.s, z22.h\n"
     ".inst 0x4596458c  // saddwt z12.s, z12.s, z22.h\n"
-    "ld1b { z27.b }, p2/Z, [x21, x24]\n"
+    "ld1b { z27.b }, p2/Z, [x22, x25]\n"
     ".inst 0x4595416b  // saddwb z11.s, z11.s, z21.h\n"
     ".inst 0x4595454a  // saddwt z10.s, z10.s, z21.h\n"
-    "ld1b { z26.b }, p2/Z, [x20, x24]\n"
+    "ld1b { z26.b }, p2/Z, [x21, x25]\n"
     ".inst 0x45944129  // saddwb z9.s, z9.s, z20.h\n"
     ".inst 0x45944508  // saddwt z8.s, z8.s, z20.h\n"
-    "ld1b { z25.b }, p1/Z, [x21, x23]\n"
+    "ld1b { z25.b }, p1/Z, [x22, x24]\n"
     ".inst 0x459340e7  // saddwb z7.s, z7.s, z19.h\n"
     ".inst 0x459344c6  // saddwt z6.s, z6.s, z19.h\n"
-    "ld1b { z24.b }, p1/Z, [x20, x23]\n"
+    "ld1b { z24.b }, p1/Z, [x21, x24]\n"
     ".inst 0x459240a5  // saddwb z5.s, z5.s, z18.h\n"
     ".inst 0x45924484  // saddwt z4.s, z4.s, z18.h\n"
     ".inst 0x45914063  // saddwb z3.s, z3.s, z17.h\n"
@@ -199,21 +200,21 @@ void sme_s8_nhwc_avg_generic_depthfirst_impl(
     ".inst 0x45904021  // saddwb z1.s, z1.s, z16.h\n"
     ".inst 0x45904400  // saddwt z0.s, z0.s, z16.h\n"
     "4:"  // 4-vectors of channels: After loop
-    "ands x20, %x[n_valid_cells], #0x1\n"
+    "ands x21, %x[n_valid_cells], #0x1\n"
     "beq 6f\n"
     "5:"  // 4-vectors of channels: Single input loop
-    "ldr x21, [x19], #0x8\n"
-    "ld1b { z31.b }, p4/Z, [x21, x26]\n"
+    "ldr x22, [x20], #0x8\n"
+    "ld1b { z31.b }, p4/Z, [x22, x27]\n"
     ".inst 0x4508a3f7  // sshllb z23.h, z31.b, #0x0\n"
     ".inst 0x4508a7f6  // sshllt z22.h, z31.b, #0x0\n"
-    "ld1b { z29.b }, p3/Z, [x21, x25]\n"
+    "ld1b { z29.b }, p3/Z, [x22, x26]\n"
     ".inst 0x4508a3b5  // sshllb z21.h, z29.b, #0x0\n"
     ".inst 0x4508a7b4  // sshllt z20.h, z29.b, #0x0\n"
-    "subs x20, x20, #0x1\n"
-    "ld1b { z27.b }, p2/Z, [x21, x24]\n"
+    "subs x21, x21, #0x1\n"
+    "ld1b { z27.b }, p2/Z, [x22, x25]\n"
     ".inst 0x4508a373  // sshllb z19.h, z27.b, #0x0\n"
     ".inst 0x4508a772  // sshllt z18.h, z27.b, #0x0\n"
-    "ld1b { z25.b }, p1/Z, [x21, x23]\n"
+    "ld1b { z25.b }, p1/Z, [x22, x24]\n"
     ".inst 0x4508a331  // sshllb z17.h, z25.b, #0x0\n"
     ".inst 0x4508a730  // sshllt z16.h, z25.b, #0x0\n"
     ".inst 0x459741ef  // saddwb z15.s, z15.s, z23.h\n"
@@ -312,47 +313,47 @@ void sme_s8_nhwc_avg_generic_depthfirst_impl(
     "trn1 z19.h, z1.h, z0.h\n"
     "trn1 z16.b, z23.b, z16.b\n"
     "trn1 z18.b, z22.b, z18.b\n"
-    "st1b { z16.b }, p4, [%x[outptr], x26]\n"
-    "incb x26, ALL, MUL #4\n"
+    "st1b { z16.b }, p4, [%x[outptr], x27]\n"
+    "incb x27, ALL, MUL #4\n"
     "trn1 z17.b, z21.b, z17.b\n"
     "trn1 z16.b, z20.b, z19.b\n"
-    "st1b { z18.b }, p3, [%x[outptr], x25]\n"
+    "st1b { z18.b }, p3, [%x[outptr], x26]\n"
+    "incb x26, ALL, MUL #4\n"
+    "st1b { z17.b }, p2, [%x[outptr], x25]\n"
     "incb x25, ALL, MUL #4\n"
-    "st1b { z17.b }, p2, [%x[outptr], x24]\n"
+    "st1b { z16.b }, p1, [%x[outptr], x24]\n"
     "incb x24, ALL, MUL #4\n"
-    "st1b { z16.b }, p1, [%x[outptr], x23]\n"
-    "incb x23, ALL, MUL #4\n"
-    "whilelt p1.b, x23, %x[n_channels]\n"
+    "whilelt p1.b, x24, %x[n_channels]\n"
     "b.any 1b\n"
     "7:"  // Single vector of channels
-    "whilelt p4.b, x26, %x[n_channels]\n"
+    "whilelt p4.b, x27, %x[n_channels]\n"
     "b.none 14f\n"
     "8:"  // Single vector of channels: Loop
-    "lsr x22, %x[n_valid_cells], #0x1\n"
+    "lsr x23, %x[n_valid_cells], #0x1\n"
     "mov z15.s, #0x0\n"
     "mov z14.s, #0x0\n"
-    "mov x19, %x[inptrs]\n"
+    "mov x20, %x[inptrs]\n"
     "mov z13.s, #0x0\n"
     "mov z12.s, #0x0\n"
-    "cbz x22, 11f\n"
-    "ldp x21, x20, [x19, #0x0]\n"
-    "subs x22, x22, #0x1\n"
-    "add x19, x19, #0x10\n"
-    "ld1b { z31.b }, p4/Z, [x21, x26]\n"
-    "ld1b { z30.b }, p4/Z, [x20, x26]\n"
+    "cbz x23, 11f\n"
+    "ldp x22, x21, [x20, #0x0]\n"
+    "subs x23, x23, #0x1\n"
+    "add x20, x20, #0x10\n"
+    "ld1b { z31.b }, p4/Z, [x22, x27]\n"
+    "ld1b { z30.b }, p4/Z, [x21, x27]\n"
     "beq 10f\n"
     "9:"  // Single vector of channels: Loop: 2 inputs loop
     ".inst 0x455e03f7  // saddlb z23.h, z31.b, z30.b\n"
     ".inst 0x455e07f6  // saddlt z22.h, z31.b, z30.b\n"
-    "ldp x21, x20, [x19, #0x0]\n"
-    "subs x22, x22, #0x1\n"
+    "ldp x22, x21, [x20, #0x0]\n"
+    "subs x23, x23, #0x1\n"
     ".inst 0x459741ef  // saddwb z15.s, z15.s, z23.h\n"
     ".inst 0x459745ce  // saddwt z14.s, z14.s, z23.h\n"
-    "add x19, x19, #0x10\n"
-    "ld1b { z31.b }, p4/Z, [x21, x26]\n"
+    "add x20, x20, #0x10\n"
+    "ld1b { z31.b }, p4/Z, [x22, x27]\n"
     ".inst 0x459641ad  // saddwb z13.s, z13.s, z22.h\n"
     ".inst 0x4596458c  // saddwt z12.s, z12.s, z22.h\n"
-    "ld1b { z30.b }, p4/Z, [x20, x26]\n"
+    "ld1b { z30.b }, p4/Z, [x21, x27]\n"
     "bgt 9b\n"
     "10:"  // Single vector of channels: Loop: 2 inputs tail
     ".inst 0x455e03f7  // saddlb z23.h, z31.b, z30.b\n"
@@ -362,14 +363,14 @@ void sme_s8_nhwc_avg_generic_depthfirst_impl(
     ".inst 0x459641ad  // saddwb z13.s, z13.s, z22.h\n"
     ".inst 0x4596458c  // saddwt z12.s, z12.s, z22.h\n"
     "11:"  // Single vector of channels: Loop: After loop
-    "ands x20, %x[n_valid_cells], #0x1\n"
+    "ands x21, %x[n_valid_cells], #0x1\n"
     "beq 13f\n"
     "12:"  // Single vector of channels: Loop: Single input loop
-    "ldr x21, [x19], #0x8\n"
-    "ld1b { z31.b }, p4/Z, [x21, x26]\n"
+    "ldr x22, [x20], #0x8\n"
+    "ld1b { z31.b }, p4/Z, [x22, x27]\n"
     ".inst 0x4508a3f7  // sshllb z23.h, z31.b, #0x0\n"
     ".inst 0x4508a7f6  // sshllt z22.h, z31.b, #0x0\n"
-    "subs x20, x20, #0x1\n"
+    "subs x21, x21, #0x1\n"
     ".inst 0x459741ef  // saddwb z15.s, z15.s, z23.h\n"
     ".inst 0x459745ce  // saddwt z14.s, z14.s, z23.h\n"
     ".inst 0x459641ad  // saddwb z13.s, z13.s, z22.h\n"
@@ -399,15 +400,15 @@ void sme_s8_nhwc_avg_generic_depthfirst_impl(
     "smin z12.s, p0/M, z12.s, z19.s\n"
     "trn1 z16.h, z13.h, z12.h\n"
     "trn1 z16.b, z23.b, z16.b\n"
-    "st1b { z16.b }, p4, [%x[outptr], x26]\n"
-    "incb x26\n"
-    "whilelt p4.b, x26, %x[n_channels]\n"
+    "st1b { z16.b }, p4, [%x[outptr], x27]\n"
+    "incb x27\n"
+    "whilelt p4.b, x27, %x[n_channels]\n"
     "b.any 8b\n"
     "14:"  // End
     ".inst 0xd503467f  // SMSTOP\n"
     :
     : [inptrs] "r" (inptrs), [n_channels] "r" (n_channels), [n_valid_cells] "r" (n_valid_cells), [outptr] "r" (outptr), [rescale_ptr] "r" (&rescale_value), [shift_ptr] "r" (&shift_value)
-    : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+    : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
   );
 }
 
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_s8_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_s8_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp
index d25bec0edb..e3b9c98d80 100644
--- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_s8_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_s8_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2022 Arm Limited.
+ * Copyright (c) 2022-2023 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -63,82 +63,82 @@ void sme_s8_nhwc_max_2x2_s1_output2x2_depthfirst_impl(
                         pad_left, pad_top, pad_right, pad_bottom);
 
   __asm__ __volatile__(
-    "ldr x20, [%x[args], %[offsetof_outptrs]]\n"
+    "ldr x21, [%x[args], %[offsetof_outptrs]]\n"
     ".inst 0xd503477f  // SMSTART ZA\n"
-    "mov x14, #0x0\n"
+    "mov x15, #0x0\n"
     "ptrue p2.b\n"
-    "ldr x19, [%x[args], %[offsetof_inptrs]]\n"
-    "mov x13, #0x0\n"
-    "ldr x12, [%x[args], %[offsetof_n_channels]]\n"
-    "whilelt p1.b, x14, x12\n"
-    "ldp x11, x10, [x20, #0x0]\n"
-    "ldp x9, x28, [x20, #0x10]\n"
-    "ldp x27, x26, [x19, #0x0]\n"
-    "ld1b { z29.b }, p1/Z, [x26, x14]\n"
-    "ldp x25, x24, [x19, #0x10]\n"
-    "ld1b { z28.b }, p1/Z, [x24, x14]\n"
-    "ldp x23, x22, [x19, #0x20]\n"
-    "ld1b { z27.b }, p1/Z, [x23, x14]\n"
-    "ldp x21, x20, [x19, #0x30]\n"
-    "ld1b { z26.b }, p1/Z, [x20, x14]\n"
-    "ldr x19, [x19, #0x40]\n"
-    "ld1b { z20.b }, p1/Z, [x27, x14]\n"
-    "ld1b { z25.b }, p1/Z, [x22, x14]\n"
-    "ld1b { z24.b }, p1/Z, [x25, x14]\n"
-    "ld1b { z23.b }, p1/Z, [x21, x14]\n"
-    "ld1b { z19.b }, p1/Z, [x19, x14]\n"
-    "incw x14\n"
-    "whilelt p1.b, x14, x12\n"
+    "ldr x20, [%x[args], %[offsetof_inptrs]]\n"
+    "mov x14, #0x0\n"
+    "ldr x13, [%x[args], %[offsetof_n_channels]]\n"
+    "whilelt p1.b, x15, x13\n"
+    "ldp x12, x11, [x21, #0x0]\n"
+    "ldp x10, x9, [x21, #0x10]\n"
+    "ldp x28, x27, [x20, #0x0]\n"
+    "ld1b { z30.b }, p1/Z, [x27, x15]\n"
+    "ldp x26, x25, [x20, #0x10]\n"
+    "ld1b { z29.b }, p1/Z, [x25, x15]\n"
+    "ldp x24, x23, [x20, #0x20]\n"
+    "ld1b { z28.b }, p1/Z, [x24, x15]\n"
+    "ldp x22, x21, [x20, #0x30]\n"
+    "ld1b { z27.b }, p1/Z, [x21, x15]\n"
+    "ldr x20, [x20, #0x40]\n"
+    "ld1b { z26.b }, p1/Z, [x28, x15]\n"
+    "ld1b { z25.b }, p1/Z, [x26, x15]\n"
+    "ld1b { z24.b }, p1/Z, [x23, x15]\n"
+    "ld1b { z23.b }, p1/Z, [x22, x15]\n"
+    "ld1b { z19.b }, p1/Z, [x20, x15]\n"
+    "incw x15\n"
+    "whilelt p1.b, x15, x13\n"
     "b.none 2f\n"
     "1:"  // Vector: Loop
-    "movprfx z22, z29\n smax z22.b, p2/M, z22.b, z27.b\n"
-    "movprfx z21, z27\n smax z21.b, p2/M, z21.b, z26.b\n"
-    "ld1b { z29.b }, p1/Z, [x26, x14]\n"
-    "whilelt p0.b, x13, x12\n"
-    "movprfx z18, z28\n smax z18.b, p2/M, z18.b, z20.b\n"
-    "movprfx z20, z25\n smax z20.b, p2/M, z20.b, z24.b\n"
-    "ld1b { z27.b }, p1/Z, [x23, x14]\n"
-    "movprfx z17, z23\n smax z17.b, p2/M, z17.b, z28.b\n"
-    "movprfx z16, z25\n smax z16.b, p2/M, z16.b, z19.b\n"
-    "ld1b { z26.b }, p1/Z, [x20, x14]\n"
-    "ld1b { z28.b }, p1/Z, [x24, x14]\n"
-    "movprfx z19, z18\n smax z19.b, p2/M, z19.b, z22.b\n"
-    "movprfx z18, z22\n smax z18.b, p2/M, z18.b, z20.b\n"
-    "ld1b { z20.b }, p1/Z, [x27, x14]\n"
+    "movprfx z22, z30\n smax z22.b, p2/M, z22.b, z28.b\n"
+    "movprfx z21, z28\n smax z21.b, p2/M, z21.b, z27.b\n"
+    "ld1b { z30.b }, p1/Z, [x27, x15]\n"
+    "whilelt p0.b, x14, x13\n"
+    "movprfx z20, z29\n smax z20.b, p2/M, z20.b, z26.b\n"
+    "movprfx z18, z25\n smax z18.b, p2/M, z18.b, z24.b\n"
+    "ld1b { z28.b }, p1/Z, [x24, x15]\n"
+    "movprfx z17, z29\n smax z17.b, p2/M, z17.b, z23.b\n"
+    "movprfx z16, z24\n smax z16.b, p2/M, z16.b, z19.b\n"
+    "ld1b { z27.b }, p1/Z, [x21, x15]\n"
+    "ld1b { z29.b }, p1/Z, [x25, x15]\n"
+    "movprfx z19, z22\n smax z19.b, p2/M, z19.b, z20.b\n"
+    "smax z18.b, p2/M, z18.b, z22.b\n"
+    "ld1b { z26.b }, p1/Z, [x28, x15]\n"
     "smax z17.b, p2/M, z17.b, z21.b\n"
     "smax z16.b, p2/M, z16.b, z21.b\n"
-    "ld1b { z25.b }, p1/Z, [x22, x14]\n"
-    "st1b { z19.b }, p0, [x11, x13]\n"
-    "ld1b { z24.b }, p1/Z, [x25, x14]\n"
-    "st1b { z18.b }, p0, [x10, x13]\n"
-    "ld1b { z23.b }, p1/Z, [x21, x14]\n"
-    "st1b { z17.b }, p0, [x9, x13]\n"
-    "ld1b { z19.b }, p1/Z, [x19, x14]\n"
+    "ld1b { z25.b }, p1/Z, [x26, x15]\n"
+    "st1b { z19.b }, p0, [x12, x14]\n"
+    "ld1b { z24.b }, p1/Z, [x23, x15]\n"
+    "st1b { z18.b }, p0, [x11, x14]\n"
+    "ld1b { z23.b }, p1/Z, [x22, x15]\n"
+    "st1b { z17.b }, p0, [x10, x14]\n"
+    "ld1b { z19.b }, p1/Z, [x20, x15]\n"
+    "incw x15\n"
+    "whilelt p1.b, x15, x13\n"
+    "st1b { z16.b }, p0, [x9, x14]\n"
     "incw x14\n"
-    "whilelt p1.b, x14, x12\n"
-    "st1b { z16.b }, p0, [x28, x13]\n"
-    "incw x13\n"
     "b.any 1b\n"
     "2:"  // Vector: Tail
-    "movprfx z22, z29\n smax z22.b, p2/M, z22.b, z27.b\n"
-    "movprfx z21, z27\n smax z21.b, p2/M, z21.b, z26.b\n"
-    "whilelt p0.b, x13, x12\n"
-    "movprfx z18, z28\n smax z18.b, p2/M, z18.b, z20.b\n"
-    "movprfx z20, z25\n smax z20.b, p2/M, z20.b, z24.b\n"
-    "movprfx z17, z23\n smax z17.b, p2/M, z17.b, z28.b\n"
-    "movprfx z16, z25\n smax z16.b, p2/M, z16.b, z19.b\n"
-    "movprfx z19, z18\n smax z19.b, p2/M, z19.b, z22.b\n"
-    "movprfx z18, z22\n smax z18.b, p2/M, z18.b, z20.b\n"
-    "st1b { z19.b }, p0, [x11, x13]\n"
+    "movprfx z22, z30\n smax z22.b, p2/M, z22.b, z28.b\n"
+    "movprfx z21, z28\n smax z21.b, p2/M, z21.b, z27.b\n"
+    "whilelt p0.b, x14, x13\n"
+    "movprfx z20, z29\n smax z20.b, p2/M, z20.b, z26.b\n"
+    "movprfx z18, z25\n smax z18.b, p2/M, z18.b, z24.b\n"
+    "movprfx z17, z29\n smax z17.b, p2/M, z17.b, z23.b\n"
+    "movprfx z16, z24\n smax z16.b, p2/M, z16.b, z19.b\n"
+    "movprfx z19, z22\n smax z19.b, p2/M, z19.b, z20.b\n"
+    "smax z18.b, p2/M, z18.b, z22.b\n"
+    "st1b { z19.b }, p0, [x12, x14]\n"
     "smax z17.b, p2/M, z17.b, z21.b\n"
     "smax z16.b, p2/M, z16.b, z21.b\n"
-    "st1b { z18.b }, p0, [x10, x13]\n"
-    "st1b { z17.b }, p0, [x9, x13]\n"
-    "st1b { z16.b }, p0, [x28, x13]\n"
+    "st1b { z18.b }, p0, [x11, x14]\n"
+    "st1b { z17.b }, p0, [x10, x14]\n"
+    "st1b { z16.b }, p0, [x9, x14]\n"
     ".inst 0xd503467f  // SMSTOP\n"
     :
     : [args] "r" (&args), [offsetof_inptrs] "I" (offsetof(KernelArgs, inptrs)), [offsetof_n_channels] "I" (offsetof(KernelArgs, n_channels)), [offsetof_outptrs] "I" (offsetof(KernelArgs, outptrs))
-    : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x9", "x10", "x11", "x12", "x13", "x14", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+    : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
   );
 }
 
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_s8_nhwc_max_generic_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_s8_nhwc_max_generic_depthfirst/generic.cpp
index 86ad4fec27..4e6cad6e92 100644
--- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_s8_nhwc_max_generic_depthfirst/generic.cpp
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_s8_nhwc_max_generic_depthfirst/generic.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2022 Arm Limited.
+ * Copyright (c) 2022-2023 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -40,82 +40,82 @@ void sme_s8_nhwc_max_generic_depthfirst_impl(
 {
   __asm__ __volatile__(
     ".inst 0xd503477f  // SMSTART ZA\n"
-    "mov x28, #0x0\n"
-    "cntb x27\n"
-    "cntb x26, ALL, MUL #2\n"
-    "cntb x25, ALL, MUL #3\n"
-    "whilelt p4.b, x28, %x[n_channels]\n"
-    "whilelt p3.b, x27, %x[n_channels]\n"
-    "whilelt p2.b, x26, %x[n_channels]\n"
-    "whilelt p1.b, x25, %x[n_channels]\n"
+    "mov x9, #0x0\n"
+    "cntb x28\n"
+    "cntb x27, ALL, MUL #2\n"
+    "cntb x26, ALL, MUL #3\n"
+    "whilelt p4.b, x9, %x[n_channels]\n"
+    "whilelt p3.b, x28, %x[n_channels]\n"
+    "whilelt p2.b, x27, %x[n_channels]\n"
+    "whilelt p1.b, x26, %x[n_channels]\n"
     "ptrue p0.b\n"
     "b.none 7f\n"
     "1:"  // 4-vectors of channels
-    "lsr x24, %x[n_valid_cells], #0x2\n"
+    "lsr x25, %x[n_valid_cells], #0x2\n"
     "mov z4.b, #0x80\n"
     "mov z3.b, #0x80\n"
-    "mov x19, %x[inptrs]\n"
+    "mov x20, %x[inptrs]\n"
     "mov z2.b, #0x80\n"
     "mov z1.b, #0x80\n"
-    "cbz x24, 4f\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "subs x24, x24, #0x1\n"
-    "ld1b { z0.b }, p4/Z, [x23, x28]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
-    "add x19, x19, #0x20\n"
-    "ld1b { z31.b }, p4/Z, [x22, x28]\n"
-    "ld1b { z23.b }, p4/Z, [x21, x28]\n"
-    "ld1b { z30.b }, p4/Z, [x20, x28]\n"
-    "ld1b { z18.b }, p3/Z, [x23, x27]\n"
-    "ld1b { z29.b }, p3/Z, [x22, x27]\n"
-    "ld1b { z22.b }, p3/Z, [x21, x27]\n"
-    "ld1b { z28.b }, p3/Z, [x20, x27]\n"
-    "ld1b { z17.b }, p2/Z, [x23, x26]\n"
-    "ld1b { z27.b }, p2/Z, [x22, x26]\n"
-    "ld1b { z21.b }, p2/Z, [x21, x26]\n"
-    "ld1b { z26.b }, p2/Z, [x20, x26]\n"
-    "ld1b { z16.b }, p1/Z, [x23, x25]\n"
-    "ld1b { z25.b }, p1/Z, [x22, x25]\n"
-    "ld1b { z20.b }, p1/Z, [x21, x25]\n"
-    "ld1b { z24.b }, p1/Z, [x20, x25]\n"
+    "cbz x25, 4f\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "subs x25, x25, #0x1\n"
+    "ld1b { z0.b }, p4/Z, [x24, x9]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "add x20, x20, #0x20\n"
+    "ld1b { z31.b }, p4/Z, [x23, x9]\n"
+    "ld1b { z23.b }, p4/Z, [x22, x9]\n"
+    "ld1b { z30.b }, p4/Z, [x21, x9]\n"
+    "ld1b { z18.b }, p3/Z, [x24, x28]\n"
+    "ld1b { z29.b }, p3/Z, [x23, x28]\n"
+    "ld1b { z22.b }, p3/Z, [x22, x28]\n"
+    "ld1b { z28.b }, p3/Z, [x21, x28]\n"
+    "ld1b { z17.b }, p2/Z, [x24, x27]\n"
+    "ld1b { z27.b }, p2/Z, [x23, x27]\n"
+    "ld1b { z21.b }, p2/Z, [x22, x27]\n"
+    "ld1b { z26.b }, p2/Z, [x21, x27]\n"
+    "ld1b { z16.b }, p1/Z, [x24, x26]\n"
+    "ld1b { z25.b }, p1/Z, [x23, x26]\n"
+    "ld1b { z20.b }, p1/Z, [x22, x26]\n"
+    "ld1b { z24.b }, p1/Z, [x21, x26]\n"
     "beq 3f\n"
     "2:"  // 4-vectors of channels: 4 inputs loop
     "movprfx z19, z0\n smax z19.b, p0/M, z19.b, z31.b\n"
     "smax z23.b, p0/M, z23.b, z30.b\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "subs x24, x24, #0x1\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "subs x25, x25, #0x1\n"
     "smax z18.b, p0/M, z18.b, z29.b\n"
     "smax z22.b, p0/M, z22.b, z28.b\n"
-    "ldp x21, x20, [x19, #0x10]\n"
-    "add x19, x19, #0x20\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "add x20, x20, #0x20\n"
     "smax z17.b, p0/M, z17.b, z27.b\n"
     "smax z21.b, p0/M, z21.b, z26.b\n"
-    "ld1b { z0.b }, p4/Z, [x23, x28]\n"
+    "ld1b { z0.b }, p4/Z, [x24, x9]\n"
     "smax z16.b, p0/M, z16.b, z25.b\n"
     "smax z20.b, p0/M, z20.b, z24.b\n"
-    "ld1b { z31.b }, p4/Z, [x22, x28]\n"
+    "ld1b { z31.b }, p4/Z, [x23, x9]\n"
     "smax z19.b, p0/M, z19.b, z23.b\n"
     "smax z18.b, p0/M, z18.b, z22.b\n"
-    "ld1b { z23.b }, p4/Z, [x21, x28]\n"
+    "ld1b { z23.b }, p4/Z, [x22, x9]\n"
     "smax z17.b, p0/M, z17.b, z21.b\n"
     "smax z16.b, p0/M, z16.b, z20.b\n"
-    "ld1b { z30.b }, p4/Z, [x20, x28]\n"
+    "ld1b { z30.b }, p4/Z, [x21, x9]\n"
     "smax z4.b, p0/M, z4.b, z19.b\n"
     "smax z3.b, p0/M, z3.b, z18.b\n"
-    "ld1b { z18.b }, p3/Z, [x23, x27]\n"
+    "ld1b { z18.b }, p3/Z, [x24, x28]\n"
     "smax z2.b, p0/M, z2.b, z17.b\n"
     "smax z1.b, p0/M, z1.b, z16.b\n"
-    "ld1b { z29.b }, p3/Z, [x22, x27]\n"
-    "ld1b { z22.b }, p3/Z, [x21, x27]\n"
-    "ld1b { z28.b }, p3/Z, [x20, x27]\n"
-    "ld1b { z17.b }, p2/Z, [x23, x26]\n"
-    "ld1b { z27.b }, p2/Z, [x22, x26]\n"
-    "ld1b { z21.b }, p2/Z, [x21, x26]\n"
-    "ld1b { z26.b }, p2/Z, [x20, x26]\n"
-    "ld1b { z16.b }, p1/Z, [x23, x25]\n"
-    "ld1b { z25.b }, p1/Z, [x22, x25]\n"
-    "ld1b { z20.b }, p1/Z, [x21, x25]\n"
-    "ld1b { z24.b }, p1/Z, [x20, x25]\n"
+    "ld1b { z29.b }, p3/Z, [x23, x28]\n"
+    "ld1b { z22.b }, p3/Z, [x22, x28]\n"
+    "ld1b { z28.b }, p3/Z, [x21, x28]\n"
+    "ld1b { z17.b }, p2/Z, [x24, x27]\n"
+    "ld1b { z27.b }, p2/Z, [x23, x27]\n"
+    "ld1b { z21.b }, p2/Z, [x22, x27]\n"
+    "ld1b { z26.b }, p2/Z, [x21, x27]\n"
+    "ld1b { z16.b }, p1/Z, [x24, x26]\n"
+    "ld1b { z25.b }, p1/Z, [x23, x26]\n"
+    "ld1b { z20.b }, p1/Z, [x22, x26]\n"
+    "ld1b { z24.b }, p1/Z, [x21, x26]\n"
     "bgt 2b\n"
     "3:"  // 4-vectors of channels: 4 inputs tail
     "movprfx z19, z0\n smax z19.b, p0/M, z19.b, z31.b\n"
@@ -135,61 +135,61 @@ void sme_s8_nhwc_max_generic_depthfirst_impl(
     "smax z2.b, p0/M, z2.b, z17.b\n"
     "smax z1.b, p0/M, z1.b, z16.b\n"
     "4:"  // 4-vectors of channels: After loop
-    "ands x20, %x[n_valid_cells], #0x3\n"
+    "ands x21, %x[n_valid_cells], #0x3\n"
     "beq 6f\n"
     "5:"  // 4-vectors of channels: Single input loop
-    "ldr x23, [x19], #0x8\n"
-    "ld1b { z0.b }, p4/Z, [x23, x28]\n"
-    "subs x20, x20, #0x1\n"
+    "ldr x24, [x20], #0x8\n"
+    "ld1b { z0.b }, p4/Z, [x24, x9]\n"
+    "subs x21, x21, #0x1\n"
     "smax z4.b, p0/M, z4.b, z0.b\n"
-    "ld1b { z18.b }, p3/Z, [x23, x27]\n"
+    "ld1b { z18.b }, p3/Z, [x24, x28]\n"
     "smax z3.b, p0/M, z3.b, z18.b\n"
-    "ld1b { z17.b }, p2/Z, [x23, x26]\n"
+    "ld1b { z17.b }, p2/Z, [x24, x27]\n"
     "smax z2.b, p0/M, z2.b, z17.b\n"
-    "ld1b { z16.b }, p1/Z, [x23, x25]\n"
+    "ld1b { z16.b }, p1/Z, [x24, x26]\n"
     "smax z1.b, p0/M, z1.b, z16.b\n"
     "bgt 5b\n"
     "6:"  // 4-vectors of channels: Single input loop: End
-    "st1b { z4.b }, p4, [%x[outptr], x28]\n"
+    "st1b { z4.b }, p4, [%x[outptr], x9]\n"
+    "incb x9, ALL, MUL #4\n"
+    "st1b { z3.b }, p3, [%x[outptr], x28]\n"
     "incb x28, ALL, MUL #4\n"
-    "st1b { z3.b }, p3, [%x[outptr], x27]\n"
+    "st1b { z2.b }, p2, [%x[outptr], x27]\n"
     "incb x27, ALL, MUL #4\n"
-    "st1b { z2.b }, p2, [%x[outptr], x26]\n"
+    "st1b { z1.b }, p1, [%x[outptr], x26]\n"
     "incb x26, ALL, MUL #4\n"
-    "st1b { z1.b }, p1, [%x[outptr], x25]\n"
-    "incb x25, ALL, MUL #4\n"
-    "whilelt p1.b, x25, %x[n_channels]\n"
+    "whilelt p1.b, x26, %x[n_channels]\n"
     "b.any 1b\n"
     "7:"  // Single vector of channels
-    "whilelt p4.b, x28, %x[n_channels]\n"
+    "whilelt p4.b, x9, %x[n_channels]\n"
     "b.none 14f\n"
     "8:"  // Single vector of channels: Loop
-    "lsr x24, %x[n_valid_cells], #0x2\n"
+    "lsr x25, %x[n_valid_cells], #0x2\n"
     "mov z4.b, #0x80\n"
-    "mov x19, %x[inptrs]\n"
-    "cbz x24, 11f\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "subs x24, x24, #0x1\n"
-    "ld1b { z0.b }, p4/Z, [x23, x28]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
-    "add x19, x19, #0x20\n"
-    "ld1b { z31.b }, p4/Z, [x22, x28]\n"
-    "ld1b { z23.b }, p4/Z, [x21, x28]\n"
-    "ld1b { z30.b }, p4/Z, [x20, x28]\n"
+    "mov x20, %x[inptrs]\n"
+    "cbz x25, 11f\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "subs x25, x25, #0x1\n"
+    "ld1b { z0.b }, p4/Z, [x24, x9]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "add x20, x20, #0x20\n"
+    "ld1b { z31.b }, p4/Z, [x23, x9]\n"
+    "ld1b { z23.b }, p4/Z, [x22, x9]\n"
+    "ld1b { z30.b }, p4/Z, [x21, x9]\n"
     "beq 10f\n"
     "9:"  // Single vector of channels: Loop: 4 inputs loop
     "movprfx z19, z0\n smax z19.b, p0/M, z19.b, z31.b\n"
     "smax z23.b, p0/M, z23.b, z30.b\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "subs x24, x24, #0x1\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "subs x25, x25, #0x1\n"
     "smax z19.b, p0/M, z19.b, z23.b\n"
-    "ldp x21, x20, [x19, #0x10]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
     "smax z4.b, p0/M, z4.b, z19.b\n"
-    "add x19, x19, #0x20\n"
-    "ld1b { z0.b }, p4/Z, [x23, x28]\n"
-    "ld1b { z31.b }, p4/Z, [x22, x28]\n"
-    "ld1b { z23.b }, p4/Z, [x21, x28]\n"
-    "ld1b { z30.b }, p4/Z, [x20, x28]\n"
+    "add x20, x20, #0x20\n"
+    "ld1b { z0.b }, p4/Z, [x24, x9]\n"
+    "ld1b { z31.b }, p4/Z, [x23, x9]\n"
+    "ld1b { z23.b }, p4/Z, [x22, x9]\n"
+    "ld1b { z30.b }, p4/Z, [x21, x9]\n"
     "bgt 9b\n"
     "10:"  // Single vector of channels: Loop: 4 inputs tail
     "movprfx z19, z0\n smax z19.b, p0/M, z19.b, z31.b\n"
@@ -197,24 +197,24 @@ void sme_s8_nhwc_max_generic_depthfirst_impl(
     "smax z19.b, p0/M, z19.b, z23.b\n"
     "smax z4.b, p0/M, z4.b, z19.b\n"
     "11:"  // Single vector of channels: Loop: After loop
-    "ands x20, %x[n_valid_cells], #0x3\n"
+    "ands x21, %x[n_valid_cells], #0x3\n"
     "beq 13f\n"
     "12:"  // Single vector of channels: Loop: Single input loop
-    "ldr x23, [x19], #0x8\n"
-    "ld1b { z0.b }, p4/Z, [x23, x28]\n"
-    "subs x20, x20, #0x1\n"
+    "ldr x24, [x20], #0x8\n"
+    "ld1b { z0.b }, p4/Z, [x24, x9]\n"
+    "subs x21, x21, #0x1\n"
     "smax z4.b, p0/M, z4.b, z0.b\n"
     "bgt 12b\n"
     "13:"  // Single vector of channels: Loop: Single input loop: End
-    "st1b { z4.b }, p4, [%x[outptr], x28]\n"
-    "incb x28\n"
-    "whilelt p4.b, x28, %x[n_channels]\n"
+    "st1b { z4.b }, p4, [%x[outptr], x9]\n"
+    "incb x9\n"
+    "whilelt p4.b, x9, %x[n_channels]\n"
     "b.any 8b\n"
     "14:"  // End
     ".inst 0xd503467f  // SMSTOP\n"
     :
     : [inptrs] "r" (inptrs), [n_channels] "r" (n_channels), [n_valid_cells] "r" (n_valid_cells), [outptr] "r" (outptr)
-    : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+    : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x9", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
   );
 }
 
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_s8q_nhwc_avg_generic_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_s8q_nhwc_avg_generic_depthfirst/generic.cpp
index 28b7426d11..cc58d3e9e2 100644
--- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_s8q_nhwc_avg_generic_depthfirst/generic.cpp
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_s8q_nhwc_avg_generic_depthfirst/generic.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2022 Arm Limited.
+ * Copyright (c) 2022-2023 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -86,12 +86,13 @@ void sme_s8q_nhwc_avg_generic_depthfirst_impl(
       f_rescale_value *= 2.0f;
     }
 
-    rescale_value = static_cast<int32_t>(round(f_rescale_value * static_cast<float>(1ll << 31)));
-    if (static_cast<int64_t>(rescale_value) == (1ll << 31))
+    int64_t long_rescale_value = round(f_rescale_value * static_cast<float>(1ll << 31));
+    if (long_rescale_value == (1ll << 31))
     {
       shift_value++;
-      rescale_value >>= 1;
+      long_rescale_value >>= 1;
     }
+    rescale_value = static_cast<int32_t>(long_rescale_value);
   }
 
   // Combine together the rescale value for the requantization and the scaling
@@ -113,21 +114,21 @@ void sme_s8q_nhwc_avg_generic_depthfirst_impl(
 
   __asm__ __volatile__(
     ".inst 0xd503477f  // SMSTART ZA\n"
-    "mov x26, #0x0\n"
-    "cntb x25\n"
-    "cntb x24, ALL, MUL #2\n"
-    "cntb x23, ALL, MUL #3\n"
-    "whilelt p4.b, x26, %x[n_channels]\n"
-    "whilelt p3.b, x25, %x[n_channels]\n"
-    "whilelt p2.b, x24, %x[n_channels]\n"
-    "whilelt p1.b, x23, %x[n_channels]\n"
+    "mov x27, #0x0\n"
+    "cntb x26\n"
+    "cntb x25, ALL, MUL #2\n"
+    "cntb x24, ALL, MUL #3\n"
+    "whilelt p4.b, x27, %x[n_channels]\n"
+    "whilelt p3.b, x26, %x[n_channels]\n"
+    "whilelt p2.b, x25, %x[n_channels]\n"
+    "whilelt p1.b, x24, %x[n_channels]\n"
     "ptrue p0.b\n"
     "b.none 7f\n"
     "1:"  // 4-vectors of channels
-    "lsr x22, %x[n_valid_cells], #0x1\n"
+    "lsr x23, %x[n_valid_cells], #0x1\n"
     "mov z15.s, #0x0\n"
     "mov z14.s, #0x0\n"
-    "mov x19, %x[inptrs]\n"
+    "mov x20, %x[inptrs]\n"
     "mov z13.s, #0x0\n"
     "mov z12.s, #0x0\n"
     "mov z11.s, #0x0\n"
@@ -142,49 +143,49 @@ void sme_s8q_nhwc_avg_generic_depthfirst_impl(
     "mov z2.s, #0x0\n"
     "mov z1.s, #0x0\n"
     "mov z0.s, #0x0\n"
-    "cbz x22, 4f\n"
-    "ldp x21, x20, [x19, #0x0]\n"
-    "subs x22, x22, #0x1\n"
-    "add x19, x19, #0x10\n"
-    "ld1b { z31.b }, p4/Z, [x21, x26]\n"
-    "ld1b { z30.b }, p4/Z, [x20, x26]\n"
-    "ld1b { z29.b }, p3/Z, [x21, x25]\n"
-    "ld1b { z28.b }, p3/Z, [x20, x25]\n"
-    "ld1b { z27.b }, p2/Z, [x21, x24]\n"
-    "ld1b { z26.b }, p2/Z, [x20, x24]\n"
-    "ld1b { z25.b }, p1/Z, [x21, x23]\n"
-    "ld1b { z24.b }, p1/Z, [x20, x23]\n"
+    "cbz x23, 4f\n"
+    "ldp x22, x21, [x20, #0x0]\n"
+    "subs x23, x23, #0x1\n"
+    "add x20, x20, #0x10\n"
+    "ld1b { z31.b }, p4/Z, [x22, x27]\n"
+    "ld1b { z30.b }, p4/Z, [x21, x27]\n"
+    "ld1b { z29.b }, p3/Z, [x22, x26]\n"
+    "ld1b { z28.b }, p3/Z, [x21, x26]\n"
+    "ld1b { z27.b }, p2/Z, [x22, x25]\n"
+    "ld1b { z26.b }, p2/Z, [x21, x25]\n"
+    "ld1b { z25.b }, p1/Z, [x22, x24]\n"
+    "ld1b { z24.b }, p1/Z, [x21, x24]\n"
     "beq 3f\n"
     "2:"  // 4-vectors of channels: 2 inputs loop
     ".inst 0x455e03f7  // saddlb z23.h, z31.b, z30.b\n"
     ".inst 0x455e07f6  // saddlt z22.h, z31.b, z30.b\n"
-    "ldp x21, x20, [x19, #0x0]\n"
-    "subs x22, x22, #0x1\n"
+    "ldp x22, x21, [x20, #0x0]\n"
+    "subs x23, x23, #0x1\n"
     ".inst 0x455c03b5  // saddlb z21.h, z29.b, z28.b\n"
     ".inst 0x455c07b4  // saddlt z20.h, z29.b, z28.b\n"
-    "add x19, x19, #0x10\n"
-    "ld1b { z31.b }, p4/Z, [x21, x26]\n"
+    "add x20, x20, #0x10\n"
+    "ld1b { z31.b }, p4/Z, [x22, x27]\n"
     ".inst 0x455a0373  // saddlb z19.h, z27.b, z26.b\n"
     ".inst 0x455a0772  // saddlt z18.h, z27.b, z26.b\n"
-    "ld1b { z30.b }, p4/Z, [x20, x26]\n"
+    "ld1b { z30.b }, p4/Z, [x21, x27]\n"
     ".inst 0x45580331  // saddlb z17.h, z25.b, z24.b\n"
     ".inst 0x45580730  // saddlt z16.h, z25.b, z24.b\n"
-    "ld1b { z29.b }, p3/Z, [x21, x25]\n"
+    "ld1b { z29.b }, p3/Z, [x22, x26]\n"
     ".inst 0x459741ef  // saddwb z15.s, z15.s, z23.h\n"
     ".inst 0x459745ce  // saddwt z14.s, z14.s, z23.h\n"
-    "ld1b { z28.b }, p3/Z, [x20, x25]\n"
+    "ld1b { z28.b }, p3/Z, [x21, x26]\n"
     ".inst 0x459641ad  // saddwb z13.s, z13.s, z22.h\n"
     ".inst 0x4596458c  // saddwt z12.s, z12.s, z22.h\n"
-    "ld1b { z27.b }, p2/Z, [x21, x24]\n"
+    "ld1b { z27.b }, p2/Z, [x22, x25]\n"
     ".inst 0x4595416b  // saddwb z11.s, z11.s, z21.h\n"
     ".inst 0x4595454a  // saddwt z10.s, z10.s, z21.h\n"
-    "ld1b { z26.b }, p2/Z, [x20, x24]\n"
+    "ld1b { z26.b }, p2/Z, [x21, x25]\n"
     ".inst 0x45944129  // saddwb z9.s, z9.s, z20.h\n"
     ".inst 0x45944508  // saddwt z8.s, z8.s, z20.h\n"
-    "ld1b { z25.b }, p1/Z, [x21, x23]\n"
+    "ld1b { z25.b }, p1/Z, [x22, x24]\n"
     ".inst 0x459340e7  // saddwb z7.s, z7.s, z19.h\n"
     ".inst 0x459344c6  // saddwt z6.s, z6.s, z19.h\n"
-    "ld1b { z24.b }, p1/Z, [x20, x23]\n"
+    "ld1b { z24.b }, p1/Z, [x21, x24]\n"
     ".inst 0x459240a5  // saddwb z5.s, z5.s, z18.h\n"
     ".inst 0x45924484  // saddwt z4.s, z4.s, z18.h\n"
     ".inst 0x45914063  // saddwb z3.s, z3.s, z17.h\n"
@@ -218,21 +219,21 @@ void sme_s8q_nhwc_avg_generic_depthfirst_impl(
     ".inst 0x45904021  // saddwb z1.s, z1.s, z16.h\n"
     ".inst 0x45904400  // saddwt z0.s, z0.s, z16.h\n"
     "4:"  // 4-vectors of channels: After loop
-    "ands x20, %x[n_valid_cells], #0x1\n"
+    "ands x21, %x[n_valid_cells], #0x1\n"
     "beq 6f\n"
     "5:"  // 4-vectors of channels: Single input loop
-    "ldr x21, [x19], #0x8\n"
-    "ld1b { z31.b }, p4/Z, [x21, x26]\n"
+    "ldr x22, [x20], #0x8\n"
+    "ld1b { z31.b }, p4/Z, [x22, x27]\n"
     ".inst 0x4508a3f7  // sshllb z23.h, z31.b, #0x0\n"
     ".inst 0x4508a7f6  // sshllt z22.h, z31.b, #0x0\n"
-    "ld1b { z29.b }, p3/Z, [x21, x25]\n"
+    "ld1b { z29.b }, p3/Z, [x22, x26]\n"
     ".inst 0x4508a3b5  // sshllb z21.h, z29.b, #0x0\n"
     ".inst 0x4508a7b4  // sshllt z20.h, z29.b, #0x0\n"
-    "subs x20, x20, #0x1\n"
-    "ld1b { z27.b }, p2/Z, [x21, x24]\n"
+    "subs x21, x21, #0x1\n"
+    "ld1b { z27.b }, p2/Z, [x22, x25]\n"
     ".inst 0x4508a373  // sshllb z19.h, z27.b, #0x0\n"
     ".inst 0x4508a772  // sshllt z18.h, z27.b, #0x0\n"
-    "ld1b { z25.b }, p1/Z, [x21, x23]\n"
+    "ld1b { z25.b }, p1/Z, [x22, x24]\n"
     ".inst 0x4508a331  // sshllb z17.h, z25.b, #0x0\n"
     ".inst 0x4508a730  // sshllt z16.h, z25.b, #0x0\n"
     ".inst 0x459741ef  // saddwb z15.s, z15.s, z23.h\n"
@@ -348,47 +349,47 @@ void sme_s8q_nhwc_avg_generic_depthfirst_impl(
     "trn1 z19.h, z1.h, z0.h\n"
     "trn1 z16.b, z23.b, z16.b\n"
     "trn1 z18.b, z22.b, z18.b\n"
-    "st1b { z16.b }, p4, [%x[outptr], x26]\n"
-    "incb x26, ALL, MUL #4\n"
+    "st1b { z16.b }, p4, [%x[outptr], x27]\n"
+    "incb x27, ALL, MUL #4\n"
     "trn1 z17.b, z21.b, z17.b\n"
     "trn1 z16.b, z20.b, z19.b\n"
-    "st1b { z18.b }, p3, [%x[outptr], x25]\n"
+    "st1b { z18.b }, p3, [%x[outptr], x26]\n"
+    "incb x26, ALL, MUL #4\n"
+    "st1b { z17.b }, p2, [%x[outptr], x25]\n"
     "incb x25, ALL, MUL #4\n"
-    "st1b { z17.b }, p2, [%x[outptr], x24]\n"
+    "st1b { z16.b }, p1, [%x[outptr], x24]\n"
     "incb x24, ALL, MUL #4\n"
-    "st1b { z16.b }, p1, [%x[outptr], x23]\n"
-    "incb x23, ALL, MUL #4\n"
-    "whilelt p1.b, x23, %x[n_channels]\n"
+    "whilelt p1.b, x24, %x[n_channels]\n"
     "b.any 1b\n"
     "7:"  // Single vector of channels
-    "whilelt p4.b, x26, %x[n_channels]\n"
+    "whilelt p4.b, x27, %x[n_channels]\n"
     "b.none 14f\n"
     "8:"  // Single vector of channels: Loop
-    "lsr x22, %x[n_valid_cells], #0x1\n"
+    "lsr x23, %x[n_valid_cells], #0x1\n"
     "mov z15.s, #0x0\n"
     "mov z14.s, #0x0\n"
-    "mov x19, %x[inptrs]\n"
+    "mov x20, %x[inptrs]\n"
     "mov z13.s, #0x0\n"
     "mov z12.s, #0x0\n"
-    "cbz x22, 11f\n"
-    "ldp x21, x20, [x19, #0x0]\n"
-    "subs x22, x22, #0x1\n"
-    "add x19, x19, #0x10\n"
-    "ld1b { z31.b }, p4/Z, [x21, x26]\n"
-    "ld1b { z30.b }, p4/Z, [x20, x26]\n"
+    "cbz x23, 11f\n"
+    "ldp x22, x21, [x20, #0x0]\n"
+    "subs x23, x23, #0x1\n"
+    "add x20, x20, #0x10\n"
+    "ld1b { z31.b }, p4/Z, [x22, x27]\n"
+    "ld1b { z30.b }, p4/Z, [x21, x27]\n"
     "beq 10f\n"
     "9:"  // Single vector of channels: Loop: 2 inputs loop
     ".inst 0x455e03f7  // saddlb z23.h, z31.b, z30.b\n"
     ".inst 0x455e07f6  // saddlt z22.h, z31.b, z30.b\n"
-    "ldp x21, x20, [x19, #0x0]\n"
-    "subs x22, x22, #0x1\n"
+    "ldp x22, x21, [x20, #0x0]\n"
+    "subs x23, x23, #0x1\n"
     ".inst 0x459741ef  // saddwb z15.s, z15.s, z23.h\n"
     ".inst 0x459745ce  // saddwt z14.s, z14.s, z23.h\n"
-    "add x19, x19, #0x10\n"
-    "ld1b { z31.b }, p4/Z, [x21, x26]\n"
+    "add x20, x20, #0x10\n"
+    "ld1b { z31.b }, p4/Z, [x22, x27]\n"
     ".inst 0x459641ad  // saddwb z13.s, z13.s, z22.h\n"
     ".inst 0x4596458c  // saddwt z12.s, z12.s, z22.h\n"
-    "ld1b { z30.b }, p4/Z, [x20, x26]\n"
+    "ld1b { z30.b }, p4/Z, [x21, x27]\n"
     "bgt 9b\n"
     "10:"  // Single vector of channels: Loop: 2 inputs tail
     ".inst 0x455e03f7  // saddlb z23.h, z31.b, z30.b\n"
@@ -398,14 +399,14 @@ void sme_s8q_nhwc_avg_generic_depthfirst_impl(
     ".inst 0x459641ad  // saddwb z13.s, z13.s, z22.h\n"
     ".inst 0x4596458c  // saddwt z12.s, z12.s, z22.h\n"
     "11:"  // Single vector of channels: Loop: After loop
-    "ands x20, %x[n_valid_cells], #0x1\n"
+    "ands x21, %x[n_valid_cells], #0x1\n"
     "beq 13f\n"
     "12:"  // Single vector of channels: Loop: Single input loop
-    "ldr x21, [x19], #0x8\n"
-    "ld1b { z31.b }, p4/Z, [x21, x26]\n"
+    "ldr x22, [x20], #0x8\n"
+    "ld1b { z31.b }, p4/Z, [x22, x27]\n"
     ".inst 0x4508a3f7  // sshllb z23.h, z31.b, #0x0\n"
     ".inst 0x4508a7f6  // sshllt z22.h, z31.b, #0x0\n"
-    "subs x20, x20, #0x1\n"
+    "subs x21, x21, #0x1\n"
     ".inst 0x459741ef  // saddwb z15.s, z15.s, z23.h\n"
     ".inst 0x459745ce  // saddwt z14.s, z14.s, z23.h\n"
     ".inst 0x459641ad  // saddwb z13.s, z13.s, z22.h\n"
@@ -440,19 +441,19 @@ void sme_s8q_nhwc_avg_generic_depthfirst_impl(
     "smin z12.s, p0/M, z12.s, z19.s\n"
     "trn1 z16.h, z13.h, z12.h\n"
     "trn1 z16.b, z23.b, z16.b\n"
-    "st1b { z16.b }, p4, [%x[outptr], x26]\n"
-    "incb x26\n"
-    "whilelt p4.b, x26, %x[n_channels]\n"
+    "st1b { z16.b }, p4, [%x[outptr], x27]\n"
+    "incb x27\n"
+    "whilelt p4.b, x27, %x[n_channels]\n"
     "b.any 8b\n"
     "14:"  // End
     ".inst 0xd503467f  // SMSTOP\n"
     :
     : [combined_rescale_value] "r" (&combined_rescale_value), [inptrs] "r" (inptrs), [left_shift] "r" (&left_shift), [n_channels] "r" (n_channels), [n_valid_cells] "r" (n_valid_cells), [outptr] "r" (outptr), [right_shift] "r" (&right_shift)
-    : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+    : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
   );
 }
 
 }  // namespace pooling
 }  // namespace arm_conv
 
-#endif  // defined(ARM_COMPUTE_ENABLE_SME)
+#endif  // defined(ARM_COMPUTE_ENABLE_SVE)
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_s8q_nhwc_max_generic_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_s8q_nhwc_max_generic_depthfirst/generic.cpp
index 3d13991b43..3850ebf464 100644
--- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_s8q_nhwc_max_generic_depthfirst/generic.cpp
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_s8q_nhwc_max_generic_depthfirst/generic.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2022 Arm Limited.
+ * Copyright (c) 2022-2023 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -42,82 +42,82 @@ void sme_s8q_nhwc_max_generic_depthfirst_impl(
 {
   __asm__ __volatile__(
     ".inst 0xd503477f  // SMSTART ZA\n"
-    "mov x28, #0x0\n"
-    "cntb x27\n"
-    "cntb x26, ALL, MUL #2\n"
-    "cntb x25, ALL, MUL #3\n"
-    "whilelt p4.b, x28, %x[n_channels]\n"
-    "whilelt p3.b, x27, %x[n_channels]\n"
-    "whilelt p2.b, x26, %x[n_channels]\n"
-    "whilelt p1.b, x25, %x[n_channels]\n"
+    "mov x9, #0x0\n"
+    "cntb x28\n"
+    "cntb x27, ALL, MUL #2\n"
+    "cntb x26, ALL, MUL #3\n"
+    "whilelt p4.b, x9, %x[n_channels]\n"
+    "whilelt p3.b, x28, %x[n_channels]\n"
+    "whilelt p2.b, x27, %x[n_channels]\n"
+    "whilelt p1.b, x26, %x[n_channels]\n"
     "ptrue p0.b\n"
     "b.none 7f\n"
     "1:"  // 4-vectors of channels
-    "lsr x24, %x[n_valid_cells], #0x2\n"
+    "lsr x25, %x[n_valid_cells], #0x2\n"
     "mov z4.b, #0x80\n"
     "mov z3.b, #0x80\n"
-    "mov x19, %x[inptrs]\n"
+    "mov x20, %x[inptrs]\n"
     "mov z2.b, #0x80\n"
     "mov z1.b, #0x80\n"
-    "cbz x24, 4f\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "subs x24, x24, #0x1\n"
-    "ld1b { z0.b }, p4/Z, [x23, x28]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
-    "add x19, x19, #0x20\n"
-    "ld1b { z31.b }, p4/Z, [x22, x28]\n"
-    "ld1b { z23.b }, p4/Z, [x21, x28]\n"
-    "ld1b { z30.b }, p4/Z, [x20, x28]\n"
-    "ld1b { z18.b }, p3/Z, [x23, x27]\n"
-    "ld1b { z29.b }, p3/Z, [x22, x27]\n"
-    "ld1b { z22.b }, p3/Z, [x21, x27]\n"
-    "ld1b { z28.b }, p3/Z, [x20, x27]\n"
-    "ld1b { z17.b }, p2/Z, [x23, x26]\n"
-    "ld1b { z27.b }, p2/Z, [x22, x26]\n"
-    "ld1b { z21.b }, p2/Z, [x21, x26]\n"
-    "ld1b { z26.b }, p2/Z, [x20, x26]\n"
-    "ld1b { z16.b }, p1/Z, [x23, x25]\n"
-    "ld1b { z25.b }, p1/Z, [x22, x25]\n"
-    "ld1b { z20.b }, p1/Z, [x21, x25]\n"
-    "ld1b { z24.b }, p1/Z, [x20, x25]\n"
+    "cbz x25, 4f\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "subs x25, x25, #0x1\n"
+    "ld1b { z0.b }, p4/Z, [x24, x9]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "add x20, x20, #0x20\n"
+    "ld1b { z31.b }, p4/Z, [x23, x9]\n"
+    "ld1b { z23.b }, p4/Z, [x22, x9]\n"
+    "ld1b { z30.b }, p4/Z, [x21, x9]\n"
+    "ld1b { z18.b }, p3/Z, [x24, x28]\n"
+    "ld1b { z29.b }, p3/Z, [x23, x28]\n"
+    "ld1b { z22.b }, p3/Z, [x22, x28]\n"
+    "ld1b { z28.b }, p3/Z, [x21, x28]\n"
+    "ld1b { z17.b }, p2/Z, [x24, x27]\n"
+    "ld1b { z27.b }, p2/Z, [x23, x27]\n"
+    "ld1b { z21.b }, p2/Z, [x22, x27]\n"
+    "ld1b { z26.b }, p2/Z, [x21, x27]\n"
+    "ld1b { z16.b }, p1/Z, [x24, x26]\n"
+    "ld1b { z25.b }, p1/Z, [x23, x26]\n"
+    "ld1b { z20.b }, p1/Z, [x22, x26]\n"
+    "ld1b { z24.b }, p1/Z, [x21, x26]\n"
     "beq 3f\n"
     "2:"  // 4-vectors of channels: 4 inputs loop
     "movprfx z19, z0\n smax z19.b, p0/M, z19.b, z31.b\n"
     "smax z23.b, p0/M, z23.b, z30.b\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "subs x24, x24, #0x1\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "subs x25, x25, #0x1\n"
     "smax z18.b, p0/M, z18.b, z29.b\n"
     "smax z22.b, p0/M, z22.b, z28.b\n"
-    "ldp x21, x20, [x19, #0x10]\n"
-    "add x19, x19, #0x20\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "add x20, x20, #0x20\n"
     "smax z17.b, p0/M, z17.b, z27.b\n"
     "smax z21.b, p0/M, z21.b, z26.b\n"
-    "ld1b { z0.b }, p4/Z, [x23, x28]\n"
+    "ld1b { z0.b }, p4/Z, [x24, x9]\n"
     "smax z16.b, p0/M, z16.b, z25.b\n"
     "smax z20.b, p0/M, z20.b, z24.b\n"
-    "ld1b { z31.b }, p4/Z, [x22, x28]\n"
+    "ld1b { z31.b }, p4/Z, [x23, x9]\n"
     "smax z19.b, p0/M, z19.b, z23.b\n"
     "smax z18.b, p0/M, z18.b, z22.b\n"
-    "ld1b { z23.b }, p4/Z, [x21, x28]\n"
+    "ld1b { z23.b }, p4/Z, [x22, x9]\n"
     "smax z17.b, p0/M, z17.b, z21.b\n"
     "smax z16.b, p0/M, z16.b, z20.b\n"
-    "ld1b { z30.b }, p4/Z, [x20, x28]\n"
+    "ld1b { z30.b }, p4/Z, [x21, x9]\n"
     "smax z4.b, p0/M, z4.b, z19.b\n"
     "smax z3.b, p0/M, z3.b, z18.b\n"
-    "ld1b { z18.b }, p3/Z, [x23, x27]\n"
+    "ld1b { z18.b }, p3/Z, [x24, x28]\n"
     "smax z2.b, p0/M, z2.b, z17.b\n"
     "smax z1.b, p0/M, z1.b, z16.b\n"
-    "ld1b { z29.b }, p3/Z, [x22, x27]\n"
-    "ld1b { z22.b }, p3/Z, [x21, x27]\n"
-    "ld1b { z28.b }, p3/Z, [x20, x27]\n"
-    "ld1b { z17.b }, p2/Z, [x23, x26]\n"
-    "ld1b { z27.b }, p2/Z, [x22, x26]\n"
-    "ld1b { z21.b }, p2/Z, [x21, x26]\n"
-    "ld1b { z26.b }, p2/Z, [x20, x26]\n"
-    "ld1b { z16.b }, p1/Z, [x23, x25]\n"
-    "ld1b { z25.b }, p1/Z, [x22, x25]\n"
-    "ld1b { z20.b }, p1/Z, [x21, x25]\n"
-    "ld1b { z24.b }, p1/Z, [x20, x25]\n"
+    "ld1b { z29.b }, p3/Z, [x23, x28]\n"
+    "ld1b { z22.b }, p3/Z, [x22, x28]\n"
+    "ld1b { z28.b }, p3/Z, [x21, x28]\n"
+    "ld1b { z17.b }, p2/Z, [x24, x27]\n"
+    "ld1b { z27.b }, p2/Z, [x23, x27]\n"
+    "ld1b { z21.b }, p2/Z, [x22, x27]\n"
+    "ld1b { z26.b }, p2/Z, [x21, x27]\n"
+    "ld1b { z16.b }, p1/Z, [x24, x26]\n"
+    "ld1b { z25.b }, p1/Z, [x23, x26]\n"
+    "ld1b { z20.b }, p1/Z, [x22, x26]\n"
+    "ld1b { z24.b }, p1/Z, [x21, x26]\n"
     "bgt 2b\n"
     "3:"  // 4-vectors of channels: 4 inputs tail
     "movprfx z19, z0\n smax z19.b, p0/M, z19.b, z31.b\n"
@@ -137,33 +137,33 @@ void sme_s8q_nhwc_max_generic_depthfirst_impl(
     "smax z2.b, p0/M, z2.b, z17.b\n"
     "smax z1.b, p0/M, z1.b, z16.b\n"
     "4:"  // 4-vectors of channels: After loop
-    "ands x20, %x[n_valid_cells], #0x3\n"
+    "ands x21, %x[n_valid_cells], #0x3\n"
     "beq 6f\n"
     "5:"  // 4-vectors of channels: Single input loop
-    "ldr x23, [x19], #0x8\n"
-    "ld1b { z0.b }, p4/Z, [x23, x28]\n"
-    "subs x20, x20, #0x1\n"
+    "ldr x24, [x20], #0x8\n"
+    "ld1b { z0.b }, p4/Z, [x24, x9]\n"
+    "subs x21, x21, #0x1\n"
     "smax z4.b, p0/M, z4.b, z0.b\n"
-    "ld1b { z18.b }, p3/Z, [x23, x27]\n"
+    "ld1b { z18.b }, p3/Z, [x24, x28]\n"
     "smax z3.b, p0/M, z3.b, z18.b\n"
-    "ld1b { z17.b }, p2/Z, [x23, x26]\n"
+    "ld1b { z17.b }, p2/Z, [x24, x27]\n"
     "smax z2.b, p0/M, z2.b, z17.b\n"
-    "ld1b { z16.b }, p1/Z, [x23, x25]\n"
+    "ld1b { z16.b }, p1/Z, [x24, x26]\n"
     "smax z1.b, p0/M, z1.b, z16.b\n"
     "bgt 5b\n"
     "6:"  // 4-vectors of channels: Single input loop: End
     ".inst 0x4508a097  // sshllb z23.h, z4.b, #0x0\n"
     ".inst 0x4508a496  // sshllt z22.h, z4.b, #0x0\n"
-    "add x19, %x[quant_params], %[offsetof_qp_per_layer_left_shift]\n"
-    "ld1rw { z4.s }, p0/Z, [x19]\n"
+    "add x20, %x[quant_params], %[offsetof_qp_per_layer_left_shift]\n"
+    "ld1rw { z4.s }, p0/Z, [x20]\n"
     ".inst 0x4508a075  // sshllb z21.h, z3.b, #0x0\n"
     ".inst 0x4508a472  // sshllt z18.h, z3.b, #0x0\n"
-    "add x19, %x[quant_params], %[offsetof_qp_per_layer_mul]\n"
-    "ld1rw { z3.s }, p0/Z, [x19]\n"
+    "add x20, %x[quant_params], %[offsetof_qp_per_layer_mul]\n"
+    "ld1rw { z3.s }, p0/Z, [x20]\n"
     ".inst 0x4508a054  // sshllb z20.h, z2.b, #0x0\n"
     ".inst 0x4508a451  // sshllt z17.h, z2.b, #0x0\n"
-    "add x19, %x[quant_params], %[offsetof_qp_per_layer_right_shift]\n"
-    "ld1rw { z2.s }, p0/Z, [x19]\n"
+    "add x20, %x[quant_params], %[offsetof_qp_per_layer_right_shift]\n"
+    "ld1rw { z2.s }, p0/Z, [x20]\n"
     ".inst 0x4508a033  // sshllb z19.h, z1.b, #0x0\n"
     ".inst 0x4508a430  // sshllt z16.h, z1.b, #0x0\n"
     ".inst 0x4510a2e1  // sshllb z1.s, z23.h, #0x0\n"
@@ -274,48 +274,48 @@ void sme_s8q_nhwc_max_generic_depthfirst_impl(
     "trn1 z19.h, z25.h, z24.h\n"
     "trn1 z16.b, z23.b, z16.b\n"
     "trn1 z18.b, z22.b, z18.b\n"
-    "st1b { z16.b }, p4, [%x[outptr], x28]\n"
-    "incb x28, ALL, MUL #4\n"
+    "st1b { z16.b }, p4, [%x[outptr], x9]\n"
+    "incb x9, ALL, MUL #4\n"
     "trn1 z17.b, z21.b, z17.b\n"
     "trn1 z16.b, z20.b, z19.b\n"
-    "st1b { z18.b }, p3, [%x[outptr], x27]\n"
+    "st1b { z18.b }, p3, [%x[outptr], x28]\n"
+    "incb x28, ALL, MUL #4\n"
+    "st1b { z17.b }, p2, [%x[outptr], x27]\n"
     "incb x27, ALL, MUL #4\n"
-    "st1b { z17.b }, p2, [%x[outptr], x26]\n"
+    "st1b { z16.b }, p1, [%x[outptr], x26]\n"
     "incb x26, ALL, MUL #4\n"
-    "st1b { z16.b }, p1, [%x[outptr], x25]\n"
-    "incb x25, ALL, MUL #4\n"
-    "whilelt p1.b, x25, %x[n_channels]\n"
+    "whilelt p1.b, x26, %x[n_channels]\n"
     "b.any 1b\n"
     "7:"  // Single vector of channels
-    "whilelt p4.b, x28, %x[n_channels]\n"
+    "whilelt p4.b, x9, %x[n_channels]\n"
     "b.none 14f\n"
     "8:"  // Single vector of channels: Loop
-    "lsr x24, %x[n_valid_cells], #0x2\n"
+    "lsr x25, %x[n_valid_cells], #0x2\n"
     "mov z4.b, #0x80\n"
-    "mov x19, %x[inptrs]\n"
-    "cbz x24, 11f\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "subs x24, x24, #0x1\n"
-    "ld1b { z0.b }, p4/Z, [x23, x28]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
-    "add x19, x19, #0x20\n"
-    "ld1b { z31.b }, p4/Z, [x22, x28]\n"
-    "ld1b { z23.b }, p4/Z, [x21, x28]\n"
-    "ld1b { z30.b }, p4/Z, [x20, x28]\n"
+    "mov x20, %x[inptrs]\n"
+    "cbz x25, 11f\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "subs x25, x25, #0x1\n"
+    "ld1b { z0.b }, p4/Z, [x24, x9]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "add x20, x20, #0x20\n"
+    "ld1b { z31.b }, p4/Z, [x23, x9]\n"
+    "ld1b { z23.b }, p4/Z, [x22, x9]\n"
+    "ld1b { z30.b }, p4/Z, [x21, x9]\n"
     "beq 10f\n"
     "9:"  // Single vector of channels: Loop: 4 inputs loop
     "movprfx z19, z0\n smax z19.b, p0/M, z19.b, z31.b\n"
     "smax z23.b, p0/M, z23.b, z30.b\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "subs x24, x24, #0x1\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "subs x25, x25, #0x1\n"
     "smax z19.b, p0/M, z19.b, z23.b\n"
-    "ldp x21, x20, [x19, #0x10]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
     "smax z4.b, p0/M, z4.b, z19.b\n"
-    "add x19, x19, #0x20\n"
-    "ld1b { z0.b }, p4/Z, [x23, x28]\n"
-    "ld1b { z31.b }, p4/Z, [x22, x28]\n"
-    "ld1b { z23.b }, p4/Z, [x21, x28]\n"
-    "ld1b { z30.b }, p4/Z, [x20, x28]\n"
+    "add x20, x20, #0x20\n"
+    "ld1b { z0.b }, p4/Z, [x24, x9]\n"
+    "ld1b { z31.b }, p4/Z, [x23, x9]\n"
+    "ld1b { z23.b }, p4/Z, [x22, x9]\n"
+    "ld1b { z30.b }, p4/Z, [x21, x9]\n"
     "bgt 9b\n"
     "10:"  // Single vector of channels: Loop: 4 inputs tail
     "movprfx z19, z0\n smax z19.b, p0/M, z19.b, z31.b\n"
@@ -323,27 +323,27 @@ void sme_s8q_nhwc_max_generic_depthfirst_impl(
     "smax z19.b, p0/M, z19.b, z23.b\n"
     "smax z4.b, p0/M, z4.b, z19.b\n"
     "11:"  // Single vector of channels: Loop: After loop
-    "ands x20, %x[n_valid_cells], #0x3\n"
+    "ands x21, %x[n_valid_cells], #0x3\n"
     "beq 13f\n"
     "12:"  // Single vector of channels: Loop: Single input loop
-    "ldr x23, [x19], #0x8\n"
-    "ld1b { z0.b }, p4/Z, [x23, x28]\n"
-    "subs x20, x20, #0x1\n"
+    "ldr x24, [x20], #0x8\n"
+    "ld1b { z0.b }, p4/Z, [x24, x9]\n"
+    "subs x21, x21, #0x1\n"
     "smax z4.b, p0/M, z4.b, z0.b\n"
     "bgt 12b\n"
     "13:"  // Single vector of channels: Loop: Single input loop: End
     ".inst 0x4508a097  // sshllb z23.h, z4.b, #0x0\n"
     ".inst 0x4508a496  // sshllt z22.h, z4.b, #0x0\n"
-    "add x19, %x[quant_params], %[offsetof_qp_per_layer_left_shift]\n"
-    "ld1rw { z4.s }, p0/Z, [x19]\n"
+    "add x20, %x[quant_params], %[offsetof_qp_per_layer_left_shift]\n"
+    "ld1rw { z4.s }, p0/Z, [x20]\n"
     ".inst 0x4510a2e1  // sshllb z1.s, z23.h, #0x0\n"
     ".inst 0x4510a6f7  // sshllt z23.s, z23.h, #0x0\n"
-    "add x19, %x[quant_params], %[offsetof_qp_per_layer_mul]\n"
-    "ld1rw { z3.s }, p0/Z, [x19]\n"
+    "add x20, %x[quant_params], %[offsetof_qp_per_layer_mul]\n"
+    "ld1rw { z3.s }, p0/Z, [x20]\n"
     ".inst 0x4510a2c0  // sshllb z0.s, z22.h, #0x0\n"
     ".inst 0x4510a6df  // sshllt z31.s, z22.h, #0x0\n"
-    "add x19, %x[quant_params], %[offsetof_qp_per_layer_right_shift]\n"
-    "ld1rw { z2.s }, p0/Z, [x19]\n"
+    "add x20, %x[quant_params], %[offsetof_qp_per_layer_right_shift]\n"
+    "ld1rw { z2.s }, p0/Z, [x20]\n"
     ".inst 0x44828081  // srshl z1.s, p0/M, z1.s, z4.s\n"
     ".inst 0x44828097  // srshl z23.s, p0/M, z23.s, z4.s\n"
     ".inst 0x44828080  // srshl z0.s, p0/M, z0.s, z4.s\n"
@@ -369,15 +369,15 @@ void sme_s8q_nhwc_max_generic_depthfirst_impl(
     "smin z31.s, p0/M, z31.s, z19.s\n"
     "trn1 z16.h, z0.h, z31.h\n"
     "trn1 z16.b, z23.b, z16.b\n"
-    "st1b { z16.b }, p4, [%x[outptr], x28]\n"
-    "incb x28\n"
-    "whilelt p4.b, x28, %x[n_channels]\n"
+    "st1b { z16.b }, p4, [%x[outptr], x9]\n"
+    "incb x9\n"
+    "whilelt p4.b, x9, %x[n_channels]\n"
     "b.any 8b\n"
     "14:"  // End
     ".inst 0xd503467f  // SMSTOP\n"
     :
     : [inptrs] "r" (inptrs), [n_channels] "r" (n_channels), [n_valid_cells] "r" (n_valid_cells), [offsetof_qp_per_layer_left_shift] "I" (offsetof(Requantize32, per_layer_left_shift)), [offsetof_qp_per_layer_mul] "I" (offsetof(Requantize32, per_layer_mul)), [offsetof_qp_per_layer_right_shift] "I" (offsetof(Requantize32, per_layer_right_shift)), [outptr] "r" (outptr), [quant_params] "r" (&qp)
-    : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+    : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x9", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
   );
 }
 
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_u8_nhwc_avg_generic_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_u8_nhwc_avg_generic_depthfirst/generic.cpp
index e529e4c4d0..a637654908 100644
--- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_u8_nhwc_avg_generic_depthfirst/generic.cpp
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_u8_nhwc_avg_generic_depthfirst/generic.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2022 Arm Limited.
+ * Copyright (c) 2022-2023 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -84,31 +84,32 @@ void sme_u8_nhwc_avg_generic_depthfirst_impl(
       f_rescale_value *= 2.0f;
     }
 
-    rescale_value = static_cast<int32_t>(round(f_rescale_value * static_cast<float>(1ll << 31)));
-    if (static_cast<int64_t>(rescale_value) == (1ll << 31))
+    int64_t long_rescale_value = round(f_rescale_value * static_cast<float>(1ll << 31));
+    if (long_rescale_value == (1ll << 31))
     {
       shift_value++;
-      rescale_value >>= 1;
+      long_rescale_value >>= 1;
     }
+    rescale_value = static_cast<int32_t>(long_rescale_value);
   }
 
   __asm__ __volatile__(
     ".inst 0xd503477f  // SMSTART ZA\n"
-    "mov x26, #0x0\n"
-    "cntb x25\n"
-    "cntb x24, ALL, MUL #2\n"
-    "cntb x23, ALL, MUL #3\n"
-    "whilelt p4.b, x26, %x[n_channels]\n"
-    "whilelt p3.b, x25, %x[n_channels]\n"
-    "whilelt p2.b, x24, %x[n_channels]\n"
-    "whilelt p1.b, x23, %x[n_channels]\n"
+    "mov x27, #0x0\n"
+    "cntb x26\n"
+    "cntb x25, ALL, MUL #2\n"
+    "cntb x24, ALL, MUL #3\n"
+    "whilelt p4.b, x27, %x[n_channels]\n"
+    "whilelt p3.b, x26, %x[n_channels]\n"
+    "whilelt p2.b, x25, %x[n_channels]\n"
+    "whilelt p1.b, x24, %x[n_channels]\n"
     "ptrue p0.b\n"
     "b.none 7f\n"
     "1:"  // 4-vectors of channels
-    "lsr x22, %x[n_valid_cells], #0x1\n"
+    "lsr x23, %x[n_valid_cells], #0x1\n"
     "mov z15.s, #0x0\n"
     "mov z14.s, #0x0\n"
-    "mov x19, %x[inptrs]\n"
+    "mov x20, %x[inptrs]\n"
     "mov z13.s, #0x0\n"
     "mov z12.s, #0x0\n"
     "mov z11.s, #0x0\n"
@@ -123,49 +124,49 @@ void sme_u8_nhwc_avg_generic_depthfirst_impl(
     "mov z2.s, #0x0\n"
     "mov z1.s, #0x0\n"
     "mov z0.s, #0x0\n"
-    "cbz x22, 4f\n"
-    "ldp x21, x20, [x19, #0x0]\n"
-    "subs x22, x22, #0x1\n"
-    "add x19, x19, #0x10\n"
-    "ld1b { z31.b }, p4/Z, [x21, x26]\n"
-    "ld1b { z30.b }, p4/Z, [x20, x26]\n"
-    "ld1b { z29.b }, p3/Z, [x21, x25]\n"
-    "ld1b { z28.b }, p3/Z, [x20, x25]\n"
-    "ld1b { z27.b }, p2/Z, [x21, x24]\n"
-    "ld1b { z26.b }, p2/Z, [x20, x24]\n"
-    "ld1b { z25.b }, p1/Z, [x21, x23]\n"
-    "ld1b { z24.b }, p1/Z, [x20, x23]\n"
+    "cbz x23, 4f\n"
+    "ldp x22, x21, [x20, #0x0]\n"
+    "subs x23, x23, #0x1\n"
+    "add x20, x20, #0x10\n"
+    "ld1b { z31.b }, p4/Z, [x22, x27]\n"
+    "ld1b { z30.b }, p4/Z, [x21, x27]\n"
+    "ld1b { z29.b }, p3/Z, [x22, x26]\n"
+    "ld1b { z28.b }, p3/Z, [x21, x26]\n"
+    "ld1b { z27.b }, p2/Z, [x22, x25]\n"
+    "ld1b { z26.b }, p2/Z, [x21, x25]\n"
+    "ld1b { z25.b }, p1/Z, [x22, x24]\n"
+    "ld1b { z24.b }, p1/Z, [x21, x24]\n"
     "beq 3f\n"
     "2:"  // 4-vectors of channels: 2 inputs loop
     ".inst 0x455e0bf7  // uaddlb z23.h, z31.b, z30.b\n"
     ".inst 0x455e0ff6  // uaddlt z22.h, z31.b, z30.b\n"
-    "ldp x21, x20, [x19, #0x0]\n"
-    "subs x22, x22, #0x1\n"
+    "ldp x22, x21, [x20, #0x0]\n"
+    "subs x23, x23, #0x1\n"
     ".inst 0x455c0bb5  // uaddlb z21.h, z29.b, z28.b\n"
     ".inst 0x455c0fb4  // uaddlt z20.h, z29.b, z28.b\n"
-    "add x19, x19, #0x10\n"
-    "ld1b { z31.b }, p4/Z, [x21, x26]\n"
+    "add x20, x20, #0x10\n"
+    "ld1b { z31.b }, p4/Z, [x22, x27]\n"
     ".inst 0x455a0b73  // uaddlb z19.h, z27.b, z26.b\n"
     ".inst 0x455a0f72  // uaddlt z18.h, z27.b, z26.b\n"
-    "ld1b { z30.b }, p4/Z, [x20, x26]\n"
+    "ld1b { z30.b }, p4/Z, [x21, x27]\n"
     ".inst 0x45580b31  // uaddlb z17.h, z25.b, z24.b\n"
     ".inst 0x45580f30  // uaddlt z16.h, z25.b, z24.b\n"
-    "ld1b { z29.b }, p3/Z, [x21, x25]\n"
+    "ld1b { z29.b }, p3/Z, [x22, x26]\n"
     ".inst 0x459749ef  // uaddwb z15.s, z15.s, z23.h\n"
     ".inst 0x45974dce  // uaddwt z14.s, z14.s, z23.h\n"
-    "ld1b { z28.b }, p3/Z, [x20, x25]\n"
+    "ld1b { z28.b }, p3/Z, [x21, x26]\n"
     ".inst 0x459649ad  // uaddwb z13.s, z13.s, z22.h\n"
     ".inst 0x45964d8c  // uaddwt z12.s, z12.s, z22.h\n"
-    "ld1b { z27.b }, p2/Z, [x21, x24]\n"
+    "ld1b { z27.b }, p2/Z, [x22, x25]\n"
     ".inst 0x4595496b  // uaddwb z11.s, z11.s, z21.h\n"
     ".inst 0x45954d4a  // uaddwt z10.s, z10.s, z21.h\n"
-    "ld1b { z26.b }, p2/Z, [x20, x24]\n"
+    "ld1b { z26.b }, p2/Z, [x21, x25]\n"
     ".inst 0x45944929  // uaddwb z9.s, z9.s, z20.h\n"
     ".inst 0x45944d08  // uaddwt z8.s, z8.s, z20.h\n"
-    "ld1b { z25.b }, p1/Z, [x21, x23]\n"
+    "ld1b { z25.b }, p1/Z, [x22, x24]\n"
     ".inst 0x459348e7  // uaddwb z7.s, z7.s, z19.h\n"
     ".inst 0x45934cc6  // uaddwt z6.s, z6.s, z19.h\n"
-    "ld1b { z24.b }, p1/Z, [x20, x23]\n"
+    "ld1b { z24.b }, p1/Z, [x21, x24]\n"
     ".inst 0x459248a5  // uaddwb z5.s, z5.s, z18.h\n"
     ".inst 0x45924c84  // uaddwt z4.s, z4.s, z18.h\n"
     ".inst 0x45914863  // uaddwb z3.s, z3.s, z17.h\n"
@@ -199,21 +200,21 @@ void sme_u8_nhwc_avg_generic_depthfirst_impl(
     ".inst 0x45904821  // uaddwb z1.s, z1.s, z16.h\n"
     ".inst 0x45904c00  // uaddwt z0.s, z0.s, z16.h\n"
     "4:"  // 4-vectors of channels: After loop
-    "ands x20, %x[n_valid_cells], #0x1\n"
+    "ands x21, %x[n_valid_cells], #0x1\n"
     "beq 6f\n"
     "5:"  // 4-vectors of channels: Single input loop
-    "ldr x21, [x19], #0x8\n"
-    "ld1b { z31.b }, p4/Z, [x21, x26]\n"
+    "ldr x22, [x20], #0x8\n"
+    "ld1b { z31.b }, p4/Z, [x22, x27]\n"
     ".inst 0x4508abf7  // ushllb z23.h, z31.b, #0x0\n"
     ".inst 0x4508aff6  // ushllt z22.h, z31.b, #0x0\n"
-    "ld1b { z29.b }, p3/Z, [x21, x25]\n"
+    "ld1b { z29.b }, p3/Z, [x22, x26]\n"
     ".inst 0x4508abb5  // ushllb z21.h, z29.b, #0x0\n"
     ".inst 0x4508afb4  // ushllt z20.h, z29.b, #0x0\n"
-    "subs x20, x20, #0x1\n"
-    "ld1b { z27.b }, p2/Z, [x21, x24]\n"
+    "subs x21, x21, #0x1\n"
+    "ld1b { z27.b }, p2/Z, [x22, x25]\n"
     ".inst 0x4508ab73  // ushllb z19.h, z27.b, #0x0\n"
     ".inst 0x4508af72  // ushllt z18.h, z27.b, #0x0\n"
-    "ld1b { z25.b }, p1/Z, [x21, x23]\n"
+    "ld1b { z25.b }, p1/Z, [x22, x24]\n"
     ".inst 0x4508ab31  // ushllb z17.h, z25.b, #0x0\n"
     ".inst 0x4508af30  // ushllt z16.h, z25.b, #0x0\n"
     ".inst 0x459749ef  // uaddwb z15.s, z15.s, z23.h\n"
@@ -312,47 +313,47 @@ void sme_u8_nhwc_avg_generic_depthfirst_impl(
     "trn1 z19.h, z1.h, z0.h\n"
     "trn1 z16.b, z23.b, z16.b\n"
     "trn1 z18.b, z22.b, z18.b\n"
-    "st1b { z16.b }, p4, [%x[outptr], x26]\n"
-    "incb x26, ALL, MUL #4\n"
+    "st1b { z16.b }, p4, [%x[outptr], x27]\n"
+    "incb x27, ALL, MUL #4\n"
     "trn1 z17.b, z21.b, z17.b\n"
     "trn1 z16.b, z20.b, z19.b\n"
-    "st1b { z18.b }, p3, [%x[outptr], x25]\n"
+    "st1b { z18.b }, p3, [%x[outptr], x26]\n"
+    "incb x26, ALL, MUL #4\n"
+    "st1b { z17.b }, p2, [%x[outptr], x25]\n"
     "incb x25, ALL, MUL #4\n"
-    "st1b { z17.b }, p2, [%x[outptr], x24]\n"
+    "st1b { z16.b }, p1, [%x[outptr], x24]\n"
     "incb x24, ALL, MUL #4\n"
-    "st1b { z16.b }, p1, [%x[outptr], x23]\n"
-    "incb x23, ALL, MUL #4\n"
-    "whilelt p1.b, x23, %x[n_channels]\n"
+    "whilelt p1.b, x24, %x[n_channels]\n"
     "b.any 1b\n"
     "7:"  // Single vector of channels
-    "whilelt p4.b, x26, %x[n_channels]\n"
+    "whilelt p4.b, x27, %x[n_channels]\n"
     "b.none 14f\n"
     "8:"  // Single vector of channels: Loop
-    "lsr x22, %x[n_valid_cells], #0x1\n"
+    "lsr x23, %x[n_valid_cells], #0x1\n"
     "mov z15.s, #0x0\n"
     "mov z14.s, #0x0\n"
-    "mov x19, %x[inptrs]\n"
+    "mov x20, %x[inptrs]\n"
     "mov z13.s, #0x0\n"
     "mov z12.s, #0x0\n"
-    "cbz x22, 11f\n"
-    "ldp x21, x20, [x19, #0x0]\n"
-    "subs x22, x22, #0x1\n"
-    "add x19, x19, #0x10\n"
-    "ld1b { z31.b }, p4/Z, [x21, x26]\n"
-    "ld1b { z30.b }, p4/Z, [x20, x26]\n"
+    "cbz x23, 11f\n"
+    "ldp x22, x21, [x20, #0x0]\n"
+    "subs x23, x23, #0x1\n"
+    "add x20, x20, #0x10\n"
+    "ld1b { z31.b }, p4/Z, [x22, x27]\n"
+    "ld1b { z30.b }, p4/Z, [x21, x27]\n"
     "beq 10f\n"
     "9:"  // Single vector of channels: Loop: 2 inputs loop
     ".inst 0x455e0bf7  // uaddlb z23.h, z31.b, z30.b\n"
     ".inst 0x455e0ff6  // uaddlt z22.h, z31.b, z30.b\n"
-    "ldp x21, x20, [x19, #0x0]\n"
-    "subs x22, x22, #0x1\n"
+    "ldp x22, x21, [x20, #0x0]\n"
+    "subs x23, x23, #0x1\n"
     ".inst 0x459749ef  // uaddwb z15.s, z15.s, z23.h\n"
     ".inst 0x45974dce  // uaddwt z14.s, z14.s, z23.h\n"
-    "add x19, x19, #0x10\n"
-    "ld1b { z31.b }, p4/Z, [x21, x26]\n"
+    "add x20, x20, #0x10\n"
+    "ld1b { z31.b }, p4/Z, [x22, x27]\n"
     ".inst 0x459649ad  // uaddwb z13.s, z13.s, z22.h\n"
     ".inst 0x45964d8c  // uaddwt z12.s, z12.s, z22.h\n"
-    "ld1b { z30.b }, p4/Z, [x20, x26]\n"
+    "ld1b { z30.b }, p4/Z, [x21, x27]\n"
     "bgt 9b\n"
     "10:"  // Single vector of channels: Loop: 2 inputs tail
     ".inst 0x455e0bf7  // uaddlb z23.h, z31.b, z30.b\n"
@@ -362,14 +363,14 @@ void sme_u8_nhwc_avg_generic_depthfirst_impl(
     ".inst 0x459649ad  // uaddwb z13.s, z13.s, z22.h\n"
     ".inst 0x45964d8c  // uaddwt z12.s, z12.s, z22.h\n"
     "11:"  // Single vector of channels: Loop: After loop
-    "ands x20, %x[n_valid_cells], #0x1\n"
+    "ands x21, %x[n_valid_cells], #0x1\n"
     "beq 13f\n"
     "12:"  // Single vector of channels: Loop: Single input loop
-    "ldr x21, [x19], #0x8\n"
-    "ld1b { z31.b }, p4/Z, [x21, x26]\n"
+    "ldr x22, [x20], #0x8\n"
+    "ld1b { z31.b }, p4/Z, [x22, x27]\n"
     ".inst 0x4508abf7  // ushllb z23.h, z31.b, #0x0\n"
     ".inst 0x4508aff6  // ushllt z22.h, z31.b, #0x0\n"
-    "subs x20, x20, #0x1\n"
+    "subs x21, x21, #0x1\n"
     ".inst 0x459749ef  // uaddwb z15.s, z15.s, z23.h\n"
     ".inst 0x45974dce  // uaddwt z14.s, z14.s, z23.h\n"
     ".inst 0x459649ad  // uaddwb z13.s, z13.s, z22.h\n"
@@ -399,15 +400,15 @@ void sme_u8_nhwc_avg_generic_depthfirst_impl(
     "smin z12.s, p0/M, z12.s, z19.s\n"
     "trn1 z16.h, z13.h, z12.h\n"
     "trn1 z16.b, z23.b, z16.b\n"
-    "st1b { z16.b }, p4, [%x[outptr], x26]\n"
-    "incb x26\n"
-    "whilelt p4.b, x26, %x[n_channels]\n"
+    "st1b { z16.b }, p4, [%x[outptr], x27]\n"
+    "incb x27\n"
+    "whilelt p4.b, x27, %x[n_channels]\n"
     "b.any 8b\n"
     "14:"  // End
     ".inst 0xd503467f  // SMSTOP\n"
     :
     : [inptrs] "r" (inptrs), [n_channels] "r" (n_channels), [n_valid_cells] "r" (n_valid_cells), [outptr] "r" (outptr), [rescale_ptr] "r" (&rescale_value), [shift_ptr] "r" (&shift_value)
-    : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+    : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
   );
 }
 
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_u8_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_u8_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp
index d76755ae3a..9f267d76ea 100644
--- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_u8_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_u8_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2022 Arm Limited.
+ * Copyright (c) 2022-2023 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -63,82 +63,82 @@ void sme_u8_nhwc_max_2x2_s1_output2x2_depthfirst_impl(
                         pad_left, pad_top, pad_right, pad_bottom);
 
   __asm__ __volatile__(
-    "ldr x20, [%x[args], %[offsetof_outptrs]]\n"
+    "ldr x21, [%x[args], %[offsetof_outptrs]]\n"
     ".inst 0xd503477f  // SMSTART ZA\n"
-    "mov x14, #0x0\n"
+    "mov x15, #0x0\n"
     "ptrue p2.b\n"
-    "ldr x19, [%x[args], %[offsetof_inptrs]]\n"
-    "mov x13, #0x0\n"
-    "ldr x12, [%x[args], %[offsetof_n_channels]]\n"
-    "whilelt p1.b, x14, x12\n"
-    "ldp x11, x10, [x20, #0x0]\n"
-    "ldp x9, x28, [x20, #0x10]\n"
-    "ldp x27, x26, [x19, #0x0]\n"
-    "ld1b { z29.b }, p1/Z, [x26, x14]\n"
-    "ldp x25, x24, [x19, #0x10]\n"
-    "ld1b { z28.b }, p1/Z, [x24, x14]\n"
-    "ldp x23, x22, [x19, #0x20]\n"
-    "ld1b { z27.b }, p1/Z, [x23, x14]\n"
-    "ldp x21, x20, [x19, #0x30]\n"
-    "ld1b { z26.b }, p1/Z, [x20, x14]\n"
-    "ldr x19, [x19, #0x40]\n"
-    "ld1b { z20.b }, p1/Z, [x27, x14]\n"
-    "ld1b { z25.b }, p1/Z, [x22, x14]\n"
-    "ld1b { z24.b }, p1/Z, [x25, x14]\n"
-    "ld1b { z23.b }, p1/Z, [x21, x14]\n"
-    "ld1b { z19.b }, p1/Z, [x19, x14]\n"
-    "incw x14\n"
-    "whilelt p1.b, x14, x12\n"
+    "ldr x20, [%x[args], %[offsetof_inptrs]]\n"
+    "mov x14, #0x0\n"
+    "ldr x13, [%x[args], %[offsetof_n_channels]]\n"
+    "whilelt p1.b, x15, x13\n"
+    "ldp x12, x11, [x21, #0x0]\n"
+    "ldp x10, x9, [x21, #0x10]\n"
+    "ldp x28, x27, [x20, #0x0]\n"
+    "ld1b { z30.b }, p1/Z, [x27, x15]\n"
+    "ldp x26, x25, [x20, #0x10]\n"
+    "ld1b { z29.b }, p1/Z, [x25, x15]\n"
+    "ldp x24, x23, [x20, #0x20]\n"
+    "ld1b { z28.b }, p1/Z, [x24, x15]\n"
+    "ldp x22, x21, [x20, #0x30]\n"
+    "ld1b { z27.b }, p1/Z, [x21, x15]\n"
+    "ldr x20, [x20, #0x40]\n"
+    "ld1b { z26.b }, p1/Z, [x28, x15]\n"
+    "ld1b { z25.b }, p1/Z, [x26, x15]\n"
+    "ld1b { z24.b }, p1/Z, [x23, x15]\n"
+    "ld1b { z23.b }, p1/Z, [x22, x15]\n"
+    "ld1b { z19.b }, p1/Z, [x20, x15]\n"
+    "incw x15\n"
+    "whilelt p1.b, x15, x13\n"
     "b.none 2f\n"
     "1:"  // Vector: Loop
-    "movprfx z22, z29\n umax z22.b, p2/M, z22.b, z27.b\n"
-    "movprfx z21, z27\n umax z21.b, p2/M, z21.b, z26.b\n"
-    "ld1b { z29.b }, p1/Z, [x26, x14]\n"
-    "whilelt p0.b, x13, x12\n"
-    "movprfx z18, z28\n umax z18.b, p2/M, z18.b, z20.b\n"
-    "movprfx z20, z25\n umax z20.b, p2/M, z20.b, z24.b\n"
-    "ld1b { z27.b }, p1/Z, [x23, x14]\n"
-    "movprfx z17, z23\n umax z17.b, p2/M, z17.b, z28.b\n"
-    "movprfx z16, z25\n umax z16.b, p2/M, z16.b, z19.b\n"
-    "ld1b { z26.b }, p1/Z, [x20, x14]\n"
-    "ld1b { z28.b }, p1/Z, [x24, x14]\n"
-    "movprfx z19, z18\n umax z19.b, p2/M, z19.b, z22.b\n"
-    "movprfx z18, z22\n umax z18.b, p2/M, z18.b, z20.b\n"
-    "ld1b { z20.b }, p1/Z, [x27, x14]\n"
+    "movprfx z22, z30\n umax z22.b, p2/M, z22.b, z28.b\n"
+    "movprfx z21, z28\n umax z21.b, p2/M, z21.b, z27.b\n"
+    "ld1b { z30.b }, p1/Z, [x27, x15]\n"
+    "whilelt p0.b, x14, x13\n"
+    "movprfx z20, z29\n umax z20.b, p2/M, z20.b, z26.b\n"
+    "movprfx z18, z25\n umax z18.b, p2/M, z18.b, z24.b\n"
+    "ld1b { z28.b }, p1/Z, [x24, x15]\n"
+    "movprfx z17, z29\n umax z17.b, p2/M, z17.b, z23.b\n"
+    "movprfx z16, z24\n umax z16.b, p2/M, z16.b, z19.b\n"
+    "ld1b { z27.b }, p1/Z, [x21, x15]\n"
+    "ld1b { z29.b }, p1/Z, [x25, x15]\n"
+    "movprfx z19, z22\n umax z19.b, p2/M, z19.b, z20.b\n"
+    "umax z18.b, p2/M, z18.b, z22.b\n"
+    "ld1b { z26.b }, p1/Z, [x28, x15]\n"
     "umax z17.b, p2/M, z17.b, z21.b\n"
     "umax z16.b, p2/M, z16.b, z21.b\n"
-    "ld1b { z25.b }, p1/Z, [x22, x14]\n"
-    "st1b { z19.b }, p0, [x11, x13]\n"
-    "ld1b { z24.b }, p1/Z, [x25, x14]\n"
-    "st1b { z18.b }, p0, [x10, x13]\n"
-    "ld1b { z23.b }, p1/Z, [x21, x14]\n"
-    "st1b { z17.b }, p0, [x9, x13]\n"
-    "ld1b { z19.b }, p1/Z, [x19, x14]\n"
+    "ld1b { z25.b }, p1/Z, [x26, x15]\n"
+    "st1b { z19.b }, p0, [x12, x14]\n"
+    "ld1b { z24.b }, p1/Z, [x23, x15]\n"
+    "st1b { z18.b }, p0, [x11, x14]\n"
+    "ld1b { z23.b }, p1/Z, [x22, x15]\n"
+    "st1b { z17.b }, p0, [x10, x14]\n"
+    "ld1b { z19.b }, p1/Z, [x20, x15]\n"
+    "incw x15\n"
+    "whilelt p1.b, x15, x13\n"
+    "st1b { z16.b }, p0, [x9, x14]\n"
     "incw x14\n"
-    "whilelt p1.b, x14, x12\n"
-    "st1b { z16.b }, p0, [x28, x13]\n"
-    "incw x13\n"
     "b.any 1b\n"
     "2:"  // Vector: Tail
-    "movprfx z22, z29\n umax z22.b, p2/M, z22.b, z27.b\n"
-    "movprfx z21, z27\n umax z21.b, p2/M, z21.b, z26.b\n"
-    "whilelt p0.b, x13, x12\n"
-    "movprfx z18, z28\n umax z18.b, p2/M, z18.b, z20.b\n"
-    "movprfx z20, z25\n umax z20.b, p2/M, z20.b, z24.b\n"
-    "movprfx z17, z23\n umax z17.b, p2/M, z17.b, z28.b\n"
-    "movprfx z16, z25\n umax z16.b, p2/M, z16.b, z19.b\n"
-    "movprfx z19, z18\n umax z19.b, p2/M, z19.b, z22.b\n"
-    "movprfx z18, z22\n umax z18.b, p2/M, z18.b, z20.b\n"
-    "st1b { z19.b }, p0, [x11, x13]\n"
+    "movprfx z22, z30\n umax z22.b, p2/M, z22.b, z28.b\n"
+    "movprfx z21, z28\n umax z21.b, p2/M, z21.b, z27.b\n"
+    "whilelt p0.b, x14, x13\n"
+    "movprfx z20, z29\n umax z20.b, p2/M, z20.b, z26.b\n"
+    "movprfx z18, z25\n umax z18.b, p2/M, z18.b, z24.b\n"
+    "movprfx z17, z29\n umax z17.b, p2/M, z17.b, z23.b\n"
+    "movprfx z16, z24\n umax z16.b, p2/M, z16.b, z19.b\n"
+    "movprfx z19, z22\n umax z19.b, p2/M, z19.b, z20.b\n"
+    "umax z18.b, p2/M, z18.b, z22.b\n"
+    "st1b { z19.b }, p0, [x12, x14]\n"
     "umax z17.b, p2/M, z17.b, z21.b\n"
     "umax z16.b, p2/M, z16.b, z21.b\n"
-    "st1b { z18.b }, p0, [x10, x13]\n"
-    "st1b { z17.b }, p0, [x9, x13]\n"
-    "st1b { z16.b }, p0, [x28, x13]\n"
+    "st1b { z18.b }, p0, [x11, x14]\n"
+    "st1b { z17.b }, p0, [x10, x14]\n"
+    "st1b { z16.b }, p0, [x9, x14]\n"
     ".inst 0xd503467f  // SMSTOP\n"
     :
     : [args] "r" (&args), [offsetof_inptrs] "I" (offsetof(KernelArgs, inptrs)), [offsetof_n_channels] "I" (offsetof(KernelArgs, n_channels)), [offsetof_outptrs] "I" (offsetof(KernelArgs, outptrs))
-    : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x9", "x10", "x11", "x12", "x13", "x14", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+    : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
   );
 }
 
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_u8_nhwc_max_generic_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_u8_nhwc_max_generic_depthfirst/generic.cpp
index 21af2eb5b1..9a13deafda 100644
--- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_u8_nhwc_max_generic_depthfirst/generic.cpp
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_u8_nhwc_max_generic_depthfirst/generic.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2022 Arm Limited.
+ * Copyright (c) 2022-2023 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -40,82 +40,82 @@ void sme_u8_nhwc_max_generic_depthfirst_impl(
 {
   __asm__ __volatile__(
     ".inst 0xd503477f  // SMSTART ZA\n"
-    "mov x28, #0x0\n"
-    "cntb x27\n"
-    "cntb x26, ALL, MUL #2\n"
-    "cntb x25, ALL, MUL #3\n"
-    "whilelt p4.b, x28, %x[n_channels]\n"
-    "whilelt p3.b, x27, %x[n_channels]\n"
-    "whilelt p2.b, x26, %x[n_channels]\n"
-    "whilelt p1.b, x25, %x[n_channels]\n"
+    "mov x9, #0x0\n"
+    "cntb x28\n"
+    "cntb x27, ALL, MUL #2\n"
+    "cntb x26, ALL, MUL #3\n"
+    "whilelt p4.b, x9, %x[n_channels]\n"
+    "whilelt p3.b, x28, %x[n_channels]\n"
+    "whilelt p2.b, x27, %x[n_channels]\n"
+    "whilelt p1.b, x26, %x[n_channels]\n"
     "ptrue p0.b\n"
     "b.none 7f\n"
     "1:"  // 4-vectors of channels
-    "lsr x24, %x[n_valid_cells], #0x2\n"
+    "lsr x25, %x[n_valid_cells], #0x2\n"
     "mov z4.b, #0x0\n"
     "mov z3.b, #0x0\n"
-    "mov x19, %x[inptrs]\n"
+    "mov x20, %x[inptrs]\n"
     "mov z2.b, #0x0\n"
     "mov z1.b, #0x0\n"
-    "cbz x24, 4f\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "subs x24, x24, #0x1\n"
-    "ld1b { z0.b }, p4/Z, [x23, x28]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
-    "add x19, x19, #0x20\n"
-    "ld1b { z31.b }, p4/Z, [x22, x28]\n"
-    "ld1b { z23.b }, p4/Z, [x21, x28]\n"
-    "ld1b { z30.b }, p4/Z, [x20, x28]\n"
-    "ld1b { z18.b }, p3/Z, [x23, x27]\n"
-    "ld1b { z29.b }, p3/Z, [x22, x27]\n"
-    "ld1b { z22.b }, p3/Z, [x21, x27]\n"
-    "ld1b { z28.b }, p3/Z, [x20, x27]\n"
-    "ld1b { z17.b }, p2/Z, [x23, x26]\n"
-    "ld1b { z27.b }, p2/Z, [x22, x26]\n"
-    "ld1b { z21.b }, p2/Z, [x21, x26]\n"
-    "ld1b { z26.b }, p2/Z, [x20, x26]\n"
-    "ld1b { z16.b }, p1/Z, [x23, x25]\n"
-    "ld1b { z25.b }, p1/Z, [x22, x25]\n"
-    "ld1b { z20.b }, p1/Z, [x21, x25]\n"
-    "ld1b { z24.b }, p1/Z, [x20, x25]\n"
+    "cbz x25, 4f\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "subs x25, x25, #0x1\n"
+    "ld1b { z0.b }, p4/Z, [x24, x9]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "add x20, x20, #0x20\n"
+    "ld1b { z31.b }, p4/Z, [x23, x9]\n"
+    "ld1b { z23.b }, p4/Z, [x22, x9]\n"
+    "ld1b { z30.b }, p4/Z, [x21, x9]\n"
+    "ld1b { z18.b }, p3/Z, [x24, x28]\n"
+    "ld1b { z29.b }, p3/Z, [x23, x28]\n"
+    "ld1b { z22.b }, p3/Z, [x22, x28]\n"
+    "ld1b { z28.b }, p3/Z, [x21, x28]\n"
+    "ld1b { z17.b }, p2/Z, [x24, x27]\n"
+    "ld1b { z27.b }, p2/Z, [x23, x27]\n"
+    "ld1b { z21.b }, p2/Z, [x22, x27]\n"
+    "ld1b { z26.b }, p2/Z, [x21, x27]\n"
+    "ld1b { z16.b }, p1/Z, [x24, x26]\n"
+    "ld1b { z25.b }, p1/Z, [x23, x26]\n"
+    "ld1b { z20.b }, p1/Z, [x22, x26]\n"
+    "ld1b { z24.b }, p1/Z, [x21, x26]\n"
     "beq 3f\n"
     "2:"  // 4-vectors of channels: 4 inputs loop
     "movprfx z19, z0\n umax z19.b, p0/M, z19.b, z31.b\n"
     "umax z23.b, p0/M, z23.b, z30.b\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "subs x24, x24, #0x1\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "subs x25, x25, #0x1\n"
     "umax z18.b, p0/M, z18.b, z29.b\n"
     "umax z22.b, p0/M, z22.b, z28.b\n"
-    "ldp x21, x20, [x19, #0x10]\n"
-    "add x19, x19, #0x20\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "add x20, x20, #0x20\n"
     "umax z17.b, p0/M, z17.b, z27.b\n"
     "umax z21.b, p0/M, z21.b, z26.b\n"
-    "ld1b { z0.b }, p4/Z, [x23, x28]\n"
+    "ld1b { z0.b }, p4/Z, [x24, x9]\n"
     "umax z16.b, p0/M, z16.b, z25.b\n"
     "umax z20.b, p0/M, z20.b, z24.b\n"
-    "ld1b { z31.b }, p4/Z, [x22, x28]\n"
+    "ld1b { z31.b }, p4/Z, [x23, x9]\n"
     "umax z19.b, p0/M, z19.b, z23.b\n"
     "umax z18.b, p0/M, z18.b, z22.b\n"
-    "ld1b { z23.b }, p4/Z, [x21, x28]\n"
+    "ld1b { z23.b }, p4/Z, [x22, x9]\n"
     "umax z17.b, p0/M, z17.b, z21.b\n"
     "umax z16.b, p0/M, z16.b, z20.b\n"
-    "ld1b { z30.b }, p4/Z, [x20, x28]\n"
+    "ld1b { z30.b }, p4/Z, [x21, x9]\n"
     "umax z4.b, p0/M, z4.b, z19.b\n"
     "umax z3.b, p0/M, z3.b, z18.b\n"
-    "ld1b { z18.b }, p3/Z, [x23, x27]\n"
+    "ld1b { z18.b }, p3/Z, [x24, x28]\n"
     "umax z2.b, p0/M, z2.b, z17.b\n"
     "umax z1.b, p0/M, z1.b, z16.b\n"
-    "ld1b { z29.b }, p3/Z, [x22, x27]\n"
-    "ld1b { z22.b }, p3/Z, [x21, x27]\n"
-    "ld1b { z28.b }, p3/Z, [x20, x27]\n"
-    "ld1b { z17.b }, p2/Z, [x23, x26]\n"
-    "ld1b { z27.b }, p2/Z, [x22, x26]\n"
-    "ld1b { z21.b }, p2/Z, [x21, x26]\n"
-    "ld1b { z26.b }, p2/Z, [x20, x26]\n"
-    "ld1b { z16.b }, p1/Z, [x23, x25]\n"
-    "ld1b { z25.b }, p1/Z, [x22, x25]\n"
-    "ld1b { z20.b }, p1/Z, [x21, x25]\n"
-    "ld1b { z24.b }, p1/Z, [x20, x25]\n"
+    "ld1b { z29.b }, p3/Z, [x23, x28]\n"
+    "ld1b { z22.b }, p3/Z, [x22, x28]\n"
+    "ld1b { z28.b }, p3/Z, [x21, x28]\n"
+    "ld1b { z17.b }, p2/Z, [x24, x27]\n"
+    "ld1b { z27.b }, p2/Z, [x23, x27]\n"
+    "ld1b { z21.b }, p2/Z, [x22, x27]\n"
+    "ld1b { z26.b }, p2/Z, [x21, x27]\n"
+    "ld1b { z16.b }, p1/Z, [x24, x26]\n"
+    "ld1b { z25.b }, p1/Z, [x23, x26]\n"
+    "ld1b { z20.b }, p1/Z, [x22, x26]\n"
+    "ld1b { z24.b }, p1/Z, [x21, x26]\n"
     "bgt 2b\n"
     "3:"  // 4-vectors of channels: 4 inputs tail
     "movprfx z19, z0\n umax z19.b, p0/M, z19.b, z31.b\n"
@@ -135,61 +135,61 @@ void sme_u8_nhwc_max_generic_depthfirst_impl(
     "umax z2.b, p0/M, z2.b, z17.b\n"
     "umax z1.b, p0/M, z1.b, z16.b\n"
     "4:"  // 4-vectors of channels: After loop
-    "ands x20, %x[n_valid_cells], #0x3\n"
+    "ands x21, %x[n_valid_cells], #0x3\n"
     "beq 6f\n"
     "5:"  // 4-vectors of channels: Single input loop
-    "ldr x23, [x19], #0x8\n"
-    "ld1b { z0.b }, p4/Z, [x23, x28]\n"
-    "subs x20, x20, #0x1\n"
+    "ldr x24, [x20], #0x8\n"
+    "ld1b { z0.b }, p4/Z, [x24, x9]\n"
+    "subs x21, x21, #0x1\n"
     "umax z4.b, p0/M, z4.b, z0.b\n"
-    "ld1b { z18.b }, p3/Z, [x23, x27]\n"
+    "ld1b { z18.b }, p3/Z, [x24, x28]\n"
     "umax z3.b, p0/M, z3.b, z18.b\n"
-    "ld1b { z17.b }, p2/Z, [x23, x26]\n"
+    "ld1b { z17.b }, p2/Z, [x24, x27]\n"
     "umax z2.b, p0/M, z2.b, z17.b\n"
-    "ld1b { z16.b }, p1/Z, [x23, x25]\n"
+    "ld1b { z16.b }, p1/Z, [x24, x26]\n"
     "umax z1.b, p0/M, z1.b, z16.b\n"
     "bgt 5b\n"
     "6:"  // 4-vectors of channels: Single input loop: End
-    "st1b { z4.b }, p4, [%x[outptr], x28]\n"
+    "st1b { z4.b }, p4, [%x[outptr], x9]\n"
+    "incb x9, ALL, MUL #4\n"
+    "st1b { z3.b }, p3, [%x[outptr], x28]\n"
     "incb x28, ALL, MUL #4\n"
-    "st1b { z3.b }, p3, [%x[outptr], x27]\n"
+    "st1b { z2.b }, p2, [%x[outptr], x27]\n"
     "incb x27, ALL, MUL #4\n"
-    "st1b { z2.b }, p2, [%x[outptr], x26]\n"
+    "st1b { z1.b }, p1, [%x[outptr], x26]\n"
     "incb x26, ALL, MUL #4\n"
-    "st1b { z1.b }, p1, [%x[outptr], x25]\n"
-    "incb x25, ALL, MUL #4\n"
-    "whilelt p1.b, x25, %x[n_channels]\n"
+    "whilelt p1.b, x26, %x[n_channels]\n"
     "b.any 1b\n"
     "7:"  // Single vector of channels
-    "whilelt p4.b, x28, %x[n_channels]\n"
+    "whilelt p4.b, x9, %x[n_channels]\n"
     "b.none 14f\n"
     "8:"  // Single vector of channels: Loop
-    "lsr x24, %x[n_valid_cells], #0x2\n"
+    "lsr x25, %x[n_valid_cells], #0x2\n"
     "mov z4.b, #0x0\n"
-    "mov x19, %x[inptrs]\n"
-    "cbz x24, 11f\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "subs x24, x24, #0x1\n"
-    "ld1b { z0.b }, p4/Z, [x23, x28]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
-    "add x19, x19, #0x20\n"
-    "ld1b { z31.b }, p4/Z, [x22, x28]\n"
-    "ld1b { z23.b }, p4/Z, [x21, x28]\n"
-    "ld1b { z30.b }, p4/Z, [x20, x28]\n"
+    "mov x20, %x[inptrs]\n"
+    "cbz x25, 11f\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "subs x25, x25, #0x1\n"
+    "ld1b { z0.b }, p4/Z, [x24, x9]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "add x20, x20, #0x20\n"
+    "ld1b { z31.b }, p4/Z, [x23, x9]\n"
+    "ld1b { z23.b }, p4/Z, [x22, x9]\n"
+    "ld1b { z30.b }, p4/Z, [x21, x9]\n"
     "beq 10f\n"
     "9:"  // Single vector of channels: Loop: 4 inputs loop
     "movprfx z19, z0\n umax z19.b, p0/M, z19.b, z31.b\n"
     "umax z23.b, p0/M, z23.b, z30.b\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "subs x24, x24, #0x1\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "subs x25, x25, #0x1\n"
     "umax z19.b, p0/M, z19.b, z23.b\n"
-    "ldp x21, x20, [x19, #0x10]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
     "umax z4.b, p0/M, z4.b, z19.b\n"
-    "add x19, x19, #0x20\n"
-    "ld1b { z0.b }, p4/Z, [x23, x28]\n"
-    "ld1b { z31.b }, p4/Z, [x22, x28]\n"
-    "ld1b { z23.b }, p4/Z, [x21, x28]\n"
-    "ld1b { z30.b }, p4/Z, [x20, x28]\n"
+    "add x20, x20, #0x20\n"
+    "ld1b { z0.b }, p4/Z, [x24, x9]\n"
+    "ld1b { z31.b }, p4/Z, [x23, x9]\n"
+    "ld1b { z23.b }, p4/Z, [x22, x9]\n"
+    "ld1b { z30.b }, p4/Z, [x21, x9]\n"
     "bgt 9b\n"
     "10:"  // Single vector of channels: Loop: 4 inputs tail
     "movprfx z19, z0\n umax z19.b, p0/M, z19.b, z31.b\n"
@@ -197,24 +197,24 @@ void sme_u8_nhwc_max_generic_depthfirst_impl(
     "umax z19.b, p0/M, z19.b, z23.b\n"
     "umax z4.b, p0/M, z4.b, z19.b\n"
     "11:"  // Single vector of channels: Loop: After loop
-    "ands x20, %x[n_valid_cells], #0x3\n"
+    "ands x21, %x[n_valid_cells], #0x3\n"
     "beq 13f\n"
     "12:"  // Single vector of channels: Loop: Single input loop
-    "ldr x23, [x19], #0x8\n"
-    "ld1b { z0.b }, p4/Z, [x23, x28]\n"
-    "subs x20, x20, #0x1\n"
+    "ldr x24, [x20], #0x8\n"
+    "ld1b { z0.b }, p4/Z, [x24, x9]\n"
+    "subs x21, x21, #0x1\n"
     "umax z4.b, p0/M, z4.b, z0.b\n"
     "bgt 12b\n"
     "13:"  // Single vector of channels: Loop: Single input loop: End
-    "st1b { z4.b }, p4, [%x[outptr], x28]\n"
-    "incb x28\n"
-    "whilelt p4.b, x28, %x[n_channels]\n"
+    "st1b { z4.b }, p4, [%x[outptr], x9]\n"
+    "incb x9\n"
+    "whilelt p4.b, x9, %x[n_channels]\n"
     "b.any 8b\n"
     "14:"  // End
     ".inst 0xd503467f  // SMSTOP\n"
     :
     : [inptrs] "r" (inptrs), [n_channels] "r" (n_channels), [n_valid_cells] "r" (n_valid_cells), [outptr] "r" (outptr)
-    : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+    : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x9", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
   );
 }
 
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_u8q_nhwc_avg_generic_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_u8q_nhwc_avg_generic_depthfirst/generic.cpp
index 8a3cafa2c1..a2fe7a301d 100644
--- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_u8q_nhwc_avg_generic_depthfirst/generic.cpp
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_u8q_nhwc_avg_generic_depthfirst/generic.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2022 Arm Limited.
+ * Copyright (c) 2022-2023 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -86,12 +86,13 @@ void sme_u8q_nhwc_avg_generic_depthfirst_impl(
       f_rescale_value *= 2.0f;
     }
 
-    rescale_value = static_cast<int32_t>(round(f_rescale_value * static_cast<float>(1ll << 31)));
-    if (static_cast<int64_t>(rescale_value) == (1ll << 31))
+    int64_t long_rescale_value = round(f_rescale_value * static_cast<float>(1ll << 31));
+    if (long_rescale_value == (1ll << 31))
     {
       shift_value++;
-      rescale_value >>= 1;
+      long_rescale_value >>= 1;
     }
+    rescale_value = static_cast<int32_t>(long_rescale_value);
   }
 
 
@@ -118,24 +119,24 @@ void sme_u8q_nhwc_avg_generic_depthfirst_impl(
 
   __asm__ __volatile__(
     ".inst 0xd503477f  // SMSTART ZA\n"
-    "mov x26, #0x0\n"
-    "cntb x25\n"
-    "cntb x24, ALL, MUL #2\n"
-    "cntb x23, ALL, MUL #3\n"
-    "whilelt p4.b, x26, %x[n_channels]\n"
-    "whilelt p3.b, x25, %x[n_channels]\n"
-    "whilelt p2.b, x24, %x[n_channels]\n"
-    "whilelt p1.b, x23, %x[n_channels]\n"
+    "mov x27, #0x0\n"
+    "cntb x26\n"
+    "cntb x25, ALL, MUL #2\n"
+    "cntb x24, ALL, MUL #3\n"
+    "whilelt p4.b, x27, %x[n_channels]\n"
+    "whilelt p3.b, x26, %x[n_channels]\n"
+    "whilelt p2.b, x25, %x[n_channels]\n"
+    "whilelt p1.b, x24, %x[n_channels]\n"
     "ptrue p0.b\n"
     "b.none 7f\n"
     "1:"  // 4-vectors of channels
     "ld1rw { z15.s }, p0/Z, [%x[accumulator_init]]\n"
-    "lsr x22, %x[n_valid_cells], #0x1\n"
+    "lsr x23, %x[n_valid_cells], #0x1\n"
     "mov z14.d, z15.d\n"
     "mov z13.d, z15.d\n"
     "mov z12.d, z15.d\n"
     "mov z11.d, z15.d\n"
-    "mov x19, %x[inptrs]\n"
+    "mov x20, %x[inptrs]\n"
     "mov z10.d, z15.d\n"
     "mov z9.d, z15.d\n"
     "mov z8.d, z15.d\n"
@@ -147,49 +148,49 @@ void sme_u8q_nhwc_avg_generic_depthfirst_impl(
     "mov z2.d, z15.d\n"
     "mov z1.d, z15.d\n"
     "mov z0.d, z15.d\n"
-    "cbz x22, 4f\n"
-    "ldp x21, x20, [x19, #0x0]\n"
-    "subs x22, x22, #0x1\n"
-    "add x19, x19, #0x10\n"
-    "ld1b { z31.b }, p4/Z, [x21, x26]\n"
-    "ld1b { z30.b }, p4/Z, [x20, x26]\n"
-    "ld1b { z29.b }, p3/Z, [x21, x25]\n"
-    "ld1b { z28.b }, p3/Z, [x20, x25]\n"
-    "ld1b { z27.b }, p2/Z, [x21, x24]\n"
-    "ld1b { z26.b }, p2/Z, [x20, x24]\n"
-    "ld1b { z25.b }, p1/Z, [x21, x23]\n"
-    "ld1b { z24.b }, p1/Z, [x20, x23]\n"
+    "cbz x23, 4f\n"
+    "ldp x22, x21, [x20, #0x0]\n"
+    "subs x23, x23, #0x1\n"
+    "add x20, x20, #0x10\n"
+    "ld1b { z31.b }, p4/Z, [x22, x27]\n"
+    "ld1b { z30.b }, p4/Z, [x21, x27]\n"
+    "ld1b { z29.b }, p3/Z, [x22, x26]\n"
+    "ld1b { z28.b }, p3/Z, [x21, x26]\n"
+    "ld1b { z27.b }, p2/Z, [x22, x25]\n"
+    "ld1b { z26.b }, p2/Z, [x21, x25]\n"
+    "ld1b { z25.b }, p1/Z, [x22, x24]\n"
+    "ld1b { z24.b }, p1/Z, [x21, x24]\n"
     "beq 3f\n"
     "2:"  // 4-vectors of channels: 2 inputs loop
     ".inst 0x455e0bf7  // uaddlb z23.h, z31.b, z30.b\n"
     ".inst 0x455e0ff6  // uaddlt z22.h, z31.b, z30.b\n"
-    "ldp x21, x20, [x19, #0x0]\n"
-    "subs x22, x22, #0x1\n"
+    "ldp x22, x21, [x20, #0x0]\n"
+    "subs x23, x23, #0x1\n"
     ".inst 0x455c0bb5  // uaddlb z21.h, z29.b, z28.b\n"
     ".inst 0x455c0fb4  // uaddlt z20.h, z29.b, z28.b\n"
-    "add x19, x19, #0x10\n"
-    "ld1b { z31.b }, p4/Z, [x21, x26]\n"
+    "add x20, x20, #0x10\n"
+    "ld1b { z31.b }, p4/Z, [x22, x27]\n"
     ".inst 0x455a0b73  // uaddlb z19.h, z27.b, z26.b\n"
     ".inst 0x455a0f72  // uaddlt z18.h, z27.b, z26.b\n"
-    "ld1b { z30.b }, p4/Z, [x20, x26]\n"
+    "ld1b { z30.b }, p4/Z, [x21, x27]\n"
     ".inst 0x45580b31  // uaddlb z17.h, z25.b, z24.b\n"
     ".inst 0x45580f30  // uaddlt z16.h, z25.b, z24.b\n"
-    "ld1b { z29.b }, p3/Z, [x21, x25]\n"
+    "ld1b { z29.b }, p3/Z, [x22, x26]\n"
     ".inst 0x459749ef  // uaddwb z15.s, z15.s, z23.h\n"
     ".inst 0x45974dce  // uaddwt z14.s, z14.s, z23.h\n"
-    "ld1b { z28.b }, p3/Z, [x20, x25]\n"
+    "ld1b { z28.b }, p3/Z, [x21, x26]\n"
     ".inst 0x459649ad  // uaddwb z13.s, z13.s, z22.h\n"
     ".inst 0x45964d8c  // uaddwt z12.s, z12.s, z22.h\n"
-    "ld1b { z27.b }, p2/Z, [x21, x24]\n"
+    "ld1b { z27.b }, p2/Z, [x22, x25]\n"
     ".inst 0x4595496b  // uaddwb z11.s, z11.s, z21.h\n"
     ".inst 0x45954d4a  // uaddwt z10.s, z10.s, z21.h\n"
-    "ld1b { z26.b }, p2/Z, [x20, x24]\n"
+    "ld1b { z26.b }, p2/Z, [x21, x25]\n"
     ".inst 0x45944929  // uaddwb z9.s, z9.s, z20.h\n"
     ".inst 0x45944d08  // uaddwt z8.s, z8.s, z20.h\n"
-    "ld1b { z25.b }, p1/Z, [x21, x23]\n"
+    "ld1b { z25.b }, p1/Z, [x22, x24]\n"
     ".inst 0x459348e7  // uaddwb z7.s, z7.s, z19.h\n"
     ".inst 0x45934cc6  // uaddwt z6.s, z6.s, z19.h\n"
-    "ld1b { z24.b }, p1/Z, [x20, x23]\n"
+    "ld1b { z24.b }, p1/Z, [x21, x24]\n"
     ".inst 0x459248a5  // uaddwb z5.s, z5.s, z18.h\n"
     ".inst 0x45924c84  // uaddwt z4.s, z4.s, z18.h\n"
     ".inst 0x45914863  // uaddwb z3.s, z3.s, z17.h\n"
@@ -223,21 +224,21 @@ void sme_u8q_nhwc_avg_generic_depthfirst_impl(
     ".inst 0x45904821  // uaddwb z1.s, z1.s, z16.h\n"
     ".inst 0x45904c00  // uaddwt z0.s, z0.s, z16.h\n"
     "4:"  // 4-vectors of channels: After loop
-    "ands x20, %x[n_valid_cells], #0x1\n"
+    "ands x21, %x[n_valid_cells], #0x1\n"
     "beq 6f\n"
     "5:"  // 4-vectors of channels: Single input loop
-    "ldr x21, [x19], #0x8\n"
-    "ld1b { z31.b }, p4/Z, [x21, x26]\n"
+    "ldr x22, [x20], #0x8\n"
+    "ld1b { z31.b }, p4/Z, [x22, x27]\n"
     ".inst 0x4508abf7  // ushllb z23.h, z31.b, #0x0\n"
     ".inst 0x4508aff6  // ushllt z22.h, z31.b, #0x0\n"
-    "ld1b { z29.b }, p3/Z, [x21, x25]\n"
+    "ld1b { z29.b }, p3/Z, [x22, x26]\n"
     ".inst 0x4508abb5  // ushllb z21.h, z29.b, #0x0\n"
     ".inst 0x4508afb4  // ushllt z20.h, z29.b, #0x0\n"
-    "subs x20, x20, #0x1\n"
-    "ld1b { z27.b }, p2/Z, [x21, x24]\n"
+    "subs x21, x21, #0x1\n"
+    "ld1b { z27.b }, p2/Z, [x22, x25]\n"
     ".inst 0x4508ab73  // ushllb z19.h, z27.b, #0x0\n"
     ".inst 0x4508af72  // ushllt z18.h, z27.b, #0x0\n"
-    "ld1b { z25.b }, p1/Z, [x21, x23]\n"
+    "ld1b { z25.b }, p1/Z, [x22, x24]\n"
     ".inst 0x4508ab31  // ushllb z17.h, z25.b, #0x0\n"
     ".inst 0x4508af30  // ushllt z16.h, z25.b, #0x0\n"
     ".inst 0x459749ef  // uaddwb z15.s, z15.s, z23.h\n"
@@ -261,7 +262,7 @@ void sme_u8q_nhwc_avg_generic_depthfirst_impl(
     "ld1rw { z19.s }, p0/Z, [%x[left_shift]]\n"
     ".inst 0x4482826f  // srshl z15.s, p0/M, z15.s, z19.s\n"
     ".inst 0x4482826e  // srshl z14.s, p0/M, z14.s, z19.s\n"
-    "add x19, %x[quant_params], %[offsetof_qp_output_offset]\n"
+    "add x20, %x[quant_params], %[offsetof_qp_output_offset]\n"
     ".inst 0x4482826d  // srshl z13.s, p0/M, z13.s, z19.s\n"
     ".inst 0x4482826c  // srshl z12.s, p0/M, z12.s, z19.s\n"
     "ld1rw { z18.s }, p0/Z, [%x[combined_rescale_value]]\n"
@@ -270,7 +271,7 @@ void sme_u8q_nhwc_avg_generic_depthfirst_impl(
     "ld1rw { z17.s }, p0/Z, [%x[right_shift]]\n"
     ".inst 0x44828269  // srshl z9.s, p0/M, z9.s, z19.s\n"
     ".inst 0x44828268  // srshl z8.s, p0/M, z8.s, z19.s\n"
-    "ld1rw { z16.s }, p0/Z, [x19]\n"
+    "ld1rw { z16.s }, p0/Z, [x20]\n"
     ".inst 0x44828267  // srshl z7.s, p0/M, z7.s, z19.s\n"
     ".inst 0x44828266  // srshl z6.s, p0/M, z6.s, z19.s\n"
     ".inst 0x44828265  // srshl z5.s, p0/M, z5.s, z19.s\n"
@@ -371,47 +372,47 @@ void sme_u8q_nhwc_avg_generic_depthfirst_impl(
     "trn1 z19.h, z1.h, z0.h\n"
     "trn1 z16.b, z23.b, z16.b\n"
     "trn1 z18.b, z22.b, z18.b\n"
-    "st1b { z16.b }, p4, [%x[outptr], x26]\n"
-    "incb x26, ALL, MUL #4\n"
+    "st1b { z16.b }, p4, [%x[outptr], x27]\n"
+    "incb x27, ALL, MUL #4\n"
     "trn1 z17.b, z21.b, z17.b\n"
     "trn1 z16.b, z20.b, z19.b\n"
-    "st1b { z18.b }, p3, [%x[outptr], x25]\n"
+    "st1b { z18.b }, p3, [%x[outptr], x26]\n"
+    "incb x26, ALL, MUL #4\n"
+    "st1b { z17.b }, p2, [%x[outptr], x25]\n"
     "incb x25, ALL, MUL #4\n"
-    "st1b { z17.b }, p2, [%x[outptr], x24]\n"
+    "st1b { z16.b }, p1, [%x[outptr], x24]\n"
     "incb x24, ALL, MUL #4\n"
-    "st1b { z16.b }, p1, [%x[outptr], x23]\n"
-    "incb x23, ALL, MUL #4\n"
-    "whilelt p1.b, x23, %x[n_channels]\n"
+    "whilelt p1.b, x24, %x[n_channels]\n"
     "b.any 1b\n"
     "7:"  // Single vector of channels
-    "whilelt p4.b, x26, %x[n_channels]\n"
+    "whilelt p4.b, x27, %x[n_channels]\n"
     "b.none 14f\n"
     "8:"  // Single vector of channels: Loop
     "ld1rw { z15.s }, p0/Z, [%x[accumulator_init]]\n"
-    "lsr x22, %x[n_valid_cells], #0x1\n"
+    "lsr x23, %x[n_valid_cells], #0x1\n"
     "mov z14.d, z15.d\n"
     "mov z13.d, z15.d\n"
     "mov z12.d, z15.d\n"
-    "mov x19, %x[inptrs]\n"
-    "cbz x22, 11f\n"
-    "ldp x21, x20, [x19, #0x0]\n"
-    "subs x22, x22, #0x1\n"
-    "add x19, x19, #0x10\n"
-    "ld1b { z31.b }, p4/Z, [x21, x26]\n"
-    "ld1b { z30.b }, p4/Z, [x20, x26]\n"
+    "mov x20, %x[inptrs]\n"
+    "cbz x23, 11f\n"
+    "ldp x22, x21, [x20, #0x0]\n"
+    "subs x23, x23, #0x1\n"
+    "add x20, x20, #0x10\n"
+    "ld1b { z31.b }, p4/Z, [x22, x27]\n"
+    "ld1b { z30.b }, p4/Z, [x21, x27]\n"
     "beq 10f\n"
     "9:"  // Single vector of channels: Loop: 2 inputs loop
     ".inst 0x455e0bf7  // uaddlb z23.h, z31.b, z30.b\n"
     ".inst 0x455e0ff6  // uaddlt z22.h, z31.b, z30.b\n"
-    "ldp x21, x20, [x19, #0x0]\n"
-    "subs x22, x22, #0x1\n"
+    "ldp x22, x21, [x20, #0x0]\n"
+    "subs x23, x23, #0x1\n"
     ".inst 0x459749ef  // uaddwb z15.s, z15.s, z23.h\n"
     ".inst 0x45974dce  // uaddwt z14.s, z14.s, z23.h\n"
-    "add x19, x19, #0x10\n"
-    "ld1b { z31.b }, p4/Z, [x21, x26]\n"
+    "add x20, x20, #0x10\n"
+    "ld1b { z31.b }, p4/Z, [x22, x27]\n"
     ".inst 0x459649ad  // uaddwb z13.s, z13.s, z22.h\n"
     ".inst 0x45964d8c  // uaddwt z12.s, z12.s, z22.h\n"
-    "ld1b { z30.b }, p4/Z, [x20, x26]\n"
+    "ld1b { z30.b }, p4/Z, [x21, x27]\n"
     "bgt 9b\n"
     "10:"  // Single vector of channels: Loop: 2 inputs tail
     ".inst 0x455e0bf7  // uaddlb z23.h, z31.b, z30.b\n"
@@ -421,14 +422,14 @@ void sme_u8q_nhwc_avg_generic_depthfirst_impl(
     ".inst 0x459649ad  // uaddwb z13.s, z13.s, z22.h\n"
     ".inst 0x45964d8c  // uaddwt z12.s, z12.s, z22.h\n"
     "11:"  // Single vector of channels: Loop: After loop
-    "ands x20, %x[n_valid_cells], #0x1\n"
+    "ands x21, %x[n_valid_cells], #0x1\n"
     "beq 13f\n"
     "12:"  // Single vector of channels: Loop: Single input loop
-    "ldr x21, [x19], #0x8\n"
-    "ld1b { z31.b }, p4/Z, [x21, x26]\n"
+    "ldr x22, [x20], #0x8\n"
+    "ld1b { z31.b }, p4/Z, [x22, x27]\n"
     ".inst 0x4508abf7  // ushllb z23.h, z31.b, #0x0\n"
     ".inst 0x4508aff6  // ushllt z22.h, z31.b, #0x0\n"
-    "subs x20, x20, #0x1\n"
+    "subs x21, x21, #0x1\n"
     ".inst 0x459749ef  // uaddwb z15.s, z15.s, z23.h\n"
     ".inst 0x45974dce  // uaddwt z14.s, z14.s, z23.h\n"
     ".inst 0x459649ad  // uaddwb z13.s, z13.s, z22.h\n"
@@ -438,7 +439,7 @@ void sme_u8q_nhwc_avg_generic_depthfirst_impl(
     "ld1rw { z19.s }, p0/Z, [%x[left_shift]]\n"
     ".inst 0x4482826f  // srshl z15.s, p0/M, z15.s, z19.s\n"
     ".inst 0x4482826e  // srshl z14.s, p0/M, z14.s, z19.s\n"
-    "add x19, %x[quant_params], %[offsetof_qp_output_offset]\n"
+    "add x20, %x[quant_params], %[offsetof_qp_output_offset]\n"
     ".inst 0x4482826d  // srshl z13.s, p0/M, z13.s, z19.s\n"
     ".inst 0x4482826c  // srshl z12.s, p0/M, z12.s, z19.s\n"
     "ld1rw { z18.s }, p0/Z, [%x[combined_rescale_value]]\n"
@@ -447,7 +448,7 @@ void sme_u8q_nhwc_avg_generic_depthfirst_impl(
     "ld1rw { z17.s }, p0/Z, [%x[right_shift]]\n"
     ".inst 0x04b275ad  // sqrdmulh z13.s, z13.s, z18.s\n"
     ".inst 0x04b2758c  // sqrdmulh z12.s, z12.s, z18.s\n"
-    "ld1rw { z16.s }, p0/Z, [x19]\n"
+    "ld1rw { z16.s }, p0/Z, [x20]\n"
     ".inst 0x4482822f  // srshl z15.s, p0/M, z15.s, z17.s\n"
     ".inst 0x4482822e  // srshl z14.s, p0/M, z14.s, z17.s\n"
     ".inst 0x4482822d  // srshl z13.s, p0/M, z13.s, z17.s\n"
@@ -469,15 +470,15 @@ void sme_u8q_nhwc_avg_generic_depthfirst_impl(
     "smin z12.s, p0/M, z12.s, z19.s\n"
     "trn1 z16.h, z13.h, z12.h\n"
     "trn1 z16.b, z23.b, z16.b\n"
-    "st1b { z16.b }, p4, [%x[outptr], x26]\n"
-    "incb x26\n"
-    "whilelt p4.b, x26, %x[n_channels]\n"
+    "st1b { z16.b }, p4, [%x[outptr], x27]\n"
+    "incb x27\n"
+    "whilelt p4.b, x27, %x[n_channels]\n"
     "b.any 8b\n"
     "14:"  // End
     ".inst 0xd503467f  // SMSTOP\n"
     :
     : [accumulator_init] "r" (&accumulator_init), [combined_rescale_value] "r" (&combined_rescale_value), [inptrs] "r" (inptrs), [left_shift] "r" (&left_shift), [n_channels] "r" (n_channels), [n_valid_cells] "r" (n_valid_cells), [offsetof_qp_output_offset] "I" (offsetof(Requantize32, output_offset)), [outptr] "r" (outptr), [quant_params] "r" (&qp), [right_shift] "r" (&right_shift)
-    : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+    : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
   );
 }
 
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_u8q_nhwc_max_generic_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_u8q_nhwc_max_generic_depthfirst/generic.cpp
index 7914e357c4..d050cd014f 100644
--- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_u8q_nhwc_max_generic_depthfirst/generic.cpp
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sme_u8q_nhwc_max_generic_depthfirst/generic.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2022 Arm Limited.
+ * Copyright (c) 2022-2023 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -42,82 +42,82 @@ void sme_u8q_nhwc_max_generic_depthfirst_impl(
 {
   __asm__ __volatile__(
     ".inst 0xd503477f  // SMSTART ZA\n"
-    "mov x28, #0x0\n"
-    "cntb x27\n"
-    "cntb x26, ALL, MUL #2\n"
-    "cntb x25, ALL, MUL #3\n"
-    "whilelt p4.b, x28, %x[n_channels]\n"
-    "whilelt p3.b, x27, %x[n_channels]\n"
-    "whilelt p2.b, x26, %x[n_channels]\n"
-    "whilelt p1.b, x25, %x[n_channels]\n"
+    "mov x9, #0x0\n"
+    "cntb x28\n"
+    "cntb x27, ALL, MUL #2\n"
+    "cntb x26, ALL, MUL #3\n"
+    "whilelt p4.b, x9, %x[n_channels]\n"
+    "whilelt p3.b, x28, %x[n_channels]\n"
+    "whilelt p2.b, x27, %x[n_channels]\n"
+    "whilelt p1.b, x26, %x[n_channels]\n"
     "ptrue p0.b\n"
     "b.none 7f\n"
     "1:"  // 4-vectors of channels
-    "lsr x24, %x[n_valid_cells], #0x2\n"
+    "lsr x25, %x[n_valid_cells], #0x2\n"
     "mov z5.b, #0x0\n"
     "mov z3.b, #0x0\n"
-    "mov x19, %x[inptrs]\n"
+    "mov x20, %x[inptrs]\n"
     "mov z2.b, #0x0\n"
     "mov z1.b, #0x0\n"
-    "cbz x24, 4f\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "subs x24, x24, #0x1\n"
-    "ld1b { z0.b }, p4/Z, [x23, x28]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
-    "add x19, x19, #0x20\n"
-    "ld1b { z31.b }, p4/Z, [x22, x28]\n"
-    "ld1b { z23.b }, p4/Z, [x21, x28]\n"
-    "ld1b { z30.b }, p4/Z, [x20, x28]\n"
-    "ld1b { z18.b }, p3/Z, [x23, x27]\n"
-    "ld1b { z29.b }, p3/Z, [x22, x27]\n"
-    "ld1b { z22.b }, p3/Z, [x21, x27]\n"
-    "ld1b { z28.b }, p3/Z, [x20, x27]\n"
-    "ld1b { z17.b }, p2/Z, [x23, x26]\n"
-    "ld1b { z27.b }, p2/Z, [x22, x26]\n"
-    "ld1b { z21.b }, p2/Z, [x21, x26]\n"
-    "ld1b { z26.b }, p2/Z, [x20, x26]\n"
-    "ld1b { z16.b }, p1/Z, [x23, x25]\n"
-    "ld1b { z25.b }, p1/Z, [x22, x25]\n"
-    "ld1b { z20.b }, p1/Z, [x21, x25]\n"
-    "ld1b { z24.b }, p1/Z, [x20, x25]\n"
+    "cbz x25, 4f\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "subs x25, x25, #0x1\n"
+    "ld1b { z0.b }, p4/Z, [x24, x9]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "add x20, x20, #0x20\n"
+    "ld1b { z31.b }, p4/Z, [x23, x9]\n"
+    "ld1b { z23.b }, p4/Z, [x22, x9]\n"
+    "ld1b { z30.b }, p4/Z, [x21, x9]\n"
+    "ld1b { z18.b }, p3/Z, [x24, x28]\n"
+    "ld1b { z29.b }, p3/Z, [x23, x28]\n"
+    "ld1b { z22.b }, p3/Z, [x22, x28]\n"
+    "ld1b { z28.b }, p3/Z, [x21, x28]\n"
+    "ld1b { z17.b }, p2/Z, [x24, x27]\n"
+    "ld1b { z27.b }, p2/Z, [x23, x27]\n"
+    "ld1b { z21.b }, p2/Z, [x22, x27]\n"
+    "ld1b { z26.b }, p2/Z, [x21, x27]\n"
+    "ld1b { z16.b }, p1/Z, [x24, x26]\n"
+    "ld1b { z25.b }, p1/Z, [x23, x26]\n"
+    "ld1b { z20.b }, p1/Z, [x22, x26]\n"
+    "ld1b { z24.b }, p1/Z, [x21, x26]\n"
     "beq 3f\n"
     "2:"  // 4-vectors of channels: 4 inputs loop
     "movprfx z19, z0\n umax z19.b, p0/M, z19.b, z31.b\n"
     "umax z23.b, p0/M, z23.b, z30.b\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "subs x24, x24, #0x1\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "subs x25, x25, #0x1\n"
     "umax z18.b, p0/M, z18.b, z29.b\n"
     "umax z22.b, p0/M, z22.b, z28.b\n"
-    "ldp x21, x20, [x19, #0x10]\n"
-    "add x19, x19, #0x20\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "add x20, x20, #0x20\n"
     "umax z17.b, p0/M, z17.b, z27.b\n"
     "umax z21.b, p0/M, z21.b, z26.b\n"
-    "ld1b { z0.b }, p4/Z, [x23, x28]\n"
+    "ld1b { z0.b }, p4/Z, [x24, x9]\n"
     "umax z16.b, p0/M, z16.b, z25.b\n"
     "umax z20.b, p0/M, z20.b, z24.b\n"
-    "ld1b { z31.b }, p4/Z, [x22, x28]\n"
+    "ld1b { z31.b }, p4/Z, [x23, x9]\n"
     "umax z19.b, p0/M, z19.b, z23.b\n"
     "umax z18.b, p0/M, z18.b, z22.b\n"
-    "ld1b { z23.b }, p4/Z, [x21, x28]\n"
+    "ld1b { z23.b }, p4/Z, [x22, x9]\n"
     "umax z17.b, p0/M, z17.b, z21.b\n"
     "umax z16.b, p0/M, z16.b, z20.b\n"
-    "ld1b { z30.b }, p4/Z, [x20, x28]\n"
+    "ld1b { z30.b }, p4/Z, [x21, x9]\n"
     "umax z5.b, p0/M, z5.b, z19.b\n"
     "umax z3.b, p0/M, z3.b, z18.b\n"
-    "ld1b { z18.b }, p3/Z, [x23, x27]\n"
+    "ld1b { z18.b }, p3/Z, [x24, x28]\n"
     "umax z2.b, p0/M, z2.b, z17.b\n"
     "umax z1.b, p0/M, z1.b, z16.b\n"
-    "ld1b { z29.b }, p3/Z, [x22, x27]\n"
-    "ld1b { z22.b }, p3/Z, [x21, x27]\n"
-    "ld1b { z28.b }, p3/Z, [x20, x27]\n"
-    "ld1b { z17.b }, p2/Z, [x23, x26]\n"
-    "ld1b { z27.b }, p2/Z, [x22, x26]\n"
-    "ld1b { z21.b }, p2/Z, [x21, x26]\n"
-    "ld1b { z26.b }, p2/Z, [x20, x26]\n"
-    "ld1b { z16.b }, p1/Z, [x23, x25]\n"
-    "ld1b { z25.b }, p1/Z, [x22, x25]\n"
-    "ld1b { z20.b }, p1/Z, [x21, x25]\n"
-    "ld1b { z24.b }, p1/Z, [x20, x25]\n"
+    "ld1b { z29.b }, p3/Z, [x23, x28]\n"
+    "ld1b { z22.b }, p3/Z, [x22, x28]\n"
+    "ld1b { z28.b }, p3/Z, [x21, x28]\n"
+    "ld1b { z17.b }, p2/Z, [x24, x27]\n"
+    "ld1b { z27.b }, p2/Z, [x23, x27]\n"
+    "ld1b { z21.b }, p2/Z, [x22, x27]\n"
+    "ld1b { z26.b }, p2/Z, [x21, x27]\n"
+    "ld1b { z16.b }, p1/Z, [x24, x26]\n"
+    "ld1b { z25.b }, p1/Z, [x23, x26]\n"
+    "ld1b { z20.b }, p1/Z, [x22, x26]\n"
+    "ld1b { z24.b }, p1/Z, [x21, x26]\n"
     "bgt 2b\n"
     "3:"  // 4-vectors of channels: 4 inputs tail
     "movprfx z19, z0\n umax z19.b, p0/M, z19.b, z31.b\n"
@@ -137,41 +137,41 @@ void sme_u8q_nhwc_max_generic_depthfirst_impl(
     "umax z2.b, p0/M, z2.b, z17.b\n"
     "umax z1.b, p0/M, z1.b, z16.b\n"
     "4:"  // 4-vectors of channels: After loop
-    "ands x20, %x[n_valid_cells], #0x3\n"
+    "ands x21, %x[n_valid_cells], #0x3\n"
     "beq 6f\n"
     "5:"  // 4-vectors of channels: Single input loop
-    "ldr x23, [x19], #0x8\n"
-    "ld1b { z0.b }, p4/Z, [x23, x28]\n"
-    "subs x20, x20, #0x1\n"
+    "ldr x24, [x20], #0x8\n"
+    "ld1b { z0.b }, p4/Z, [x24, x9]\n"
+    "subs x21, x21, #0x1\n"
     "umax z5.b, p0/M, z5.b, z0.b\n"
-    "ld1b { z18.b }, p3/Z, [x23, x27]\n"
+    "ld1b { z18.b }, p3/Z, [x24, x28]\n"
     "umax z3.b, p0/M, z3.b, z18.b\n"
-    "ld1b { z17.b }, p2/Z, [x23, x26]\n"
+    "ld1b { z17.b }, p2/Z, [x24, x27]\n"
     "umax z2.b, p0/M, z2.b, z17.b\n"
-    "ld1b { z16.b }, p1/Z, [x23, x25]\n"
+    "ld1b { z16.b }, p1/Z, [x24, x26]\n"
     "umax z1.b, p0/M, z1.b, z16.b\n"
     "bgt 5b\n"
     "6:"  // 4-vectors of channels: Single input loop: End
-    "add x19, %x[quant_params], %[offsetof_qp_input_offset]\n"
-    "ld1rw { z4.s }, p0/Z, [x19]\n"
+    "add x20, %x[quant_params], %[offsetof_qp_input_offset]\n"
+    "ld1rw { z4.s }, p0/Z, [x20]\n"
     ".inst 0x4508a8b7  // ushllb z23.h, z5.b, #0x0\n"
     ".inst 0x4508acb9  // ushllt z25.h, z5.b, #0x0\n"
     ".inst 0x4508a876  // ushllb z22.h, z3.b, #0x0\n"
     ".inst 0x4508ac72  // ushllt z18.h, z3.b, #0x0\n"
-    "add x19, %x[quant_params], %[offsetof_qp_per_layer_left_shift]\n"
-    "ld1rw { z3.s }, p0/Z, [x19]\n"
+    "add x20, %x[quant_params], %[offsetof_qp_per_layer_left_shift]\n"
+    "ld1rw { z3.s }, p0/Z, [x20]\n"
     ".inst 0x4508a855  // ushllb z21.h, z2.b, #0x0\n"
     ".inst 0x4508ac51  // ushllt z17.h, z2.b, #0x0\n"
-    "add x19, %x[quant_params], %[offsetof_qp_per_layer_mul]\n"
-    "ld1rw { z2.s }, p0/Z, [x19]\n"
+    "add x20, %x[quant_params], %[offsetof_qp_per_layer_mul]\n"
+    "ld1rw { z2.s }, p0/Z, [x20]\n"
     ".inst 0x4508a834  // ushllb z20.h, z1.b, #0x0\n"
     ".inst 0x4508ac38  // ushllt z24.h, z1.b, #0x0\n"
-    "add x19, %x[quant_params], %[offsetof_qp_per_layer_right_shift]\n"
-    "ld1rw { z19.s }, p0/Z, [x19]\n"
+    "add x20, %x[quant_params], %[offsetof_qp_per_layer_right_shift]\n"
+    "ld1rw { z19.s }, p0/Z, [x20]\n"
     "neg z4.s, p0/M, z4.s\n"
     ".inst 0x45974081  // saddwb z1.s, z4.s, z23.h\n"
-    "add x19, %x[quant_params], %[offsetof_qp_output_offset]\n"
-    "ld1rw { z16.s }, p0/Z, [x19]\n"
+    "add x20, %x[quant_params], %[offsetof_qp_output_offset]\n"
+    "ld1rw { z16.s }, p0/Z, [x20]\n"
     ".inst 0x45974497  // saddwt z23.s, z4.s, z23.h\n"
     ".inst 0x45994080  // saddwb z0.s, z4.s, z25.h\n"
     ".inst 0x4599449f  // saddwt z31.s, z4.s, z25.h\n"
@@ -296,47 +296,47 @@ void sme_u8q_nhwc_max_generic_depthfirst_impl(
     "trn1 z16.b, z23.b, z16.b\n"
     "trn1 z18.b, z22.b, z18.b\n"
     "trn1 z17.b, z21.b, z17.b\n"
-    "st1b { z16.b }, p4, [%x[outptr], x28]\n"
-    "incb x28, ALL, MUL #4\n"
+    "st1b { z16.b }, p4, [%x[outptr], x9]\n"
+    "incb x9, ALL, MUL #4\n"
     "trn1 z16.b, z20.b, z19.b\n"
-    "st1b { z18.b }, p3, [%x[outptr], x27]\n"
+    "st1b { z18.b }, p3, [%x[outptr], x28]\n"
+    "incb x28, ALL, MUL #4\n"
+    "st1b { z17.b }, p2, [%x[outptr], x27]\n"
     "incb x27, ALL, MUL #4\n"
-    "st1b { z17.b }, p2, [%x[outptr], x26]\n"
+    "st1b { z16.b }, p1, [%x[outptr], x26]\n"
     "incb x26, ALL, MUL #4\n"
-    "st1b { z16.b }, p1, [%x[outptr], x25]\n"
-    "incb x25, ALL, MUL #4\n"
-    "whilelt p1.b, x25, %x[n_channels]\n"
+    "whilelt p1.b, x26, %x[n_channels]\n"
     "b.any 1b\n"
     "7:"  // Single vector of channels
-    "whilelt p4.b, x28, %x[n_channels]\n"
+    "whilelt p4.b, x9, %x[n_channels]\n"
     "b.none 14f\n"
     "8:"  // Single vector of channels: Loop
-    "lsr x24, %x[n_valid_cells], #0x2\n"
+    "lsr x25, %x[n_valid_cells], #0x2\n"
     "mov z5.b, #0x0\n"
-    "mov x19, %x[inptrs]\n"
-    "cbz x24, 11f\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "subs x24, x24, #0x1\n"
-    "ld1b { z0.b }, p4/Z, [x23, x28]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
-    "add x19, x19, #0x20\n"
-    "ld1b { z31.b }, p4/Z, [x22, x28]\n"
-    "ld1b { z23.b }, p4/Z, [x21, x28]\n"
-    "ld1b { z30.b }, p4/Z, [x20, x28]\n"
+    "mov x20, %x[inptrs]\n"
+    "cbz x25, 11f\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "subs x25, x25, #0x1\n"
+    "ld1b { z0.b }, p4/Z, [x24, x9]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "add x20, x20, #0x20\n"
+    "ld1b { z31.b }, p4/Z, [x23, x9]\n"
+    "ld1b { z23.b }, p4/Z, [x22, x9]\n"
+    "ld1b { z30.b }, p4/Z, [x21, x9]\n"
     "beq 10f\n"
     "9:"  // Single vector of channels: Loop: 4 inputs loop
     "movprfx z19, z0\n umax z19.b, p0/M, z19.b, z31.b\n"
     "umax z23.b, p0/M, z23.b, z30.b\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "subs x24, x24, #0x1\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "subs x25, x25, #0x1\n"
     "umax z19.b, p0/M, z19.b, z23.b\n"
-    "ldp x21, x20, [x19, #0x10]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
     "umax z5.b, p0/M, z5.b, z19.b\n"
-    "add x19, x19, #0x20\n"
-    "ld1b { z0.b }, p4/Z, [x23, x28]\n"
-    "ld1b { z31.b }, p4/Z, [x22, x28]\n"
-    "ld1b { z23.b }, p4/Z, [x21, x28]\n"
-    "ld1b { z30.b }, p4/Z, [x20, x28]\n"
+    "add x20, x20, #0x20\n"
+    "ld1b { z0.b }, p4/Z, [x24, x9]\n"
+    "ld1b { z31.b }, p4/Z, [x23, x9]\n"
+    "ld1b { z23.b }, p4/Z, [x22, x9]\n"
+    "ld1b { z30.b }, p4/Z, [x21, x9]\n"
     "bgt 9b\n"
     "10:"  // Single vector of channels: Loop: 4 inputs tail
     "movprfx z19, z0\n umax z19.b, p0/M, z19.b, z31.b\n"
@@ -344,35 +344,35 @@ void sme_u8q_nhwc_max_generic_depthfirst_impl(
     "umax z19.b, p0/M, z19.b, z23.b\n"
     "umax z5.b, p0/M, z5.b, z19.b\n"
     "11:"  // Single vector of channels: Loop: After loop
-    "ands x20, %x[n_valid_cells], #0x3\n"
+    "ands x21, %x[n_valid_cells], #0x3\n"
     "beq 13f\n"
     "12:"  // Single vector of channels: Loop: Single input loop
-    "ldr x23, [x19], #0x8\n"
-    "ld1b { z0.b }, p4/Z, [x23, x28]\n"
-    "subs x20, x20, #0x1\n"
+    "ldr x24, [x20], #0x8\n"
+    "ld1b { z0.b }, p4/Z, [x24, x9]\n"
+    "subs x21, x21, #0x1\n"
     "umax z5.b, p0/M, z5.b, z0.b\n"
     "bgt 12b\n"
     "13:"  // Single vector of channels: Loop: Single input loop: End
-    "add x19, %x[quant_params], %[offsetof_qp_input_offset]\n"
-    "ld1rw { z4.s }, p0/Z, [x19]\n"
+    "add x20, %x[quant_params], %[offsetof_qp_input_offset]\n"
+    "ld1rw { z4.s }, p0/Z, [x20]\n"
     ".inst 0x4508a8b7  // ushllb z23.h, z5.b, #0x0\n"
     ".inst 0x4508acb9  // ushllt z25.h, z5.b, #0x0\n"
     "neg z4.s, p0/M, z4.s\n"
     ".inst 0x45974081  // saddwb z1.s, z4.s, z23.h\n"
-    "add x19, %x[quant_params], %[offsetof_qp_per_layer_left_shift]\n"
-    "ld1rw { z3.s }, p0/Z, [x19]\n"
+    "add x20, %x[quant_params], %[offsetof_qp_per_layer_left_shift]\n"
+    "ld1rw { z3.s }, p0/Z, [x20]\n"
     ".inst 0x45974497  // saddwt z23.s, z4.s, z23.h\n"
     ".inst 0x45994080  // saddwb z0.s, z4.s, z25.h\n"
-    "add x19, %x[quant_params], %[offsetof_qp_per_layer_mul]\n"
-    "ld1rw { z2.s }, p0/Z, [x19]\n"
+    "add x20, %x[quant_params], %[offsetof_qp_per_layer_mul]\n"
+    "ld1rw { z2.s }, p0/Z, [x20]\n"
     ".inst 0x4599449f  // saddwt z31.s, z4.s, z25.h\n"
     ".inst 0x44828061  // srshl z1.s, p0/M, z1.s, z3.s\n"
-    "add x19, %x[quant_params], %[offsetof_qp_per_layer_right_shift]\n"
-    "ld1rw { z19.s }, p0/Z, [x19]\n"
+    "add x20, %x[quant_params], %[offsetof_qp_per_layer_right_shift]\n"
+    "ld1rw { z19.s }, p0/Z, [x20]\n"
     ".inst 0x44828077  // srshl z23.s, p0/M, z23.s, z3.s\n"
     ".inst 0x44828060  // srshl z0.s, p0/M, z0.s, z3.s\n"
-    "add x19, %x[quant_params], %[offsetof_qp_output_offset]\n"
-    "ld1rw { z16.s }, p0/Z, [x19]\n"
+    "add x20, %x[quant_params], %[offsetof_qp_output_offset]\n"
+    "ld1rw { z16.s }, p0/Z, [x20]\n"
     ".inst 0x4482807f  // srshl z31.s, p0/M, z31.s, z3.s\n"
     ".inst 0x04a27421  // sqrdmulh z1.s, z1.s, z2.s\n"
     ".inst 0x04a276f7  // sqrdmulh z23.s, z23.s, z2.s\n"
@@ -399,15 +399,15 @@ void sme_u8q_nhwc_max_generic_depthfirst_impl(
     "smin z31.s, p0/M, z31.s, z19.s\n"
     "trn1 z16.h, z0.h, z31.h\n"
     "trn1 z16.b, z23.b, z16.b\n"
-    "st1b { z16.b }, p4, [%x[outptr], x28]\n"
-    "incb x28\n"
-    "whilelt p4.b, x28, %x[n_channels]\n"
+    "st1b { z16.b }, p4, [%x[outptr], x9]\n"
+    "incb x9\n"
+    "whilelt p4.b, x9, %x[n_channels]\n"
     "b.any 8b\n"
     "14:"  // End
     ".inst 0xd503467f  // SMSTOP\n"
     :
     : [inptrs] "r" (inptrs), [n_channels] "r" (n_channels), [n_valid_cells] "r" (n_valid_cells), [offsetof_qp_input_offset] "I" (offsetof(Requantize32, input_offset)), [offsetof_qp_output_offset] "I" (offsetof(Requantize32, output_offset)), [offsetof_qp_per_layer_left_shift] "I" (offsetof(Requantize32, per_layer_left_shift)), [offsetof_qp_per_layer_mul] "I" (offsetof(Requantize32, per_layer_mul)), [offsetof_qp_per_layer_right_shift] "I" (offsetof(Requantize32, per_layer_right_shift)), [outptr] "r" (outptr), [quant_params] "r" (&qp)
-    : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+    : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", "x9", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
   );
 }
 
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp16_nhwc_avg_3x3_s1_output2x2_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp16_nhwc_avg_3x3_s1_output2x2_depthfirst/generic.cpp
index 75e4ddca15..593fb58445 100644
--- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp16_nhwc_avg_3x3_s1_output2x2_depthfirst/generic.cpp
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp16_nhwc_avg_3x3_s1_output2x2_depthfirst/generic.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2021-2022 Arm Limited.
+ * Copyright (c) 2021-2023 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -82,96 +82,96 @@ void sve_fp16_nhwc_avg_3x3_s1_output2x2_depthfirst_impl(
                         pad_left, pad_top, pad_right, pad_bottom);
 
   __asm__ __volatile__(
-    "ldr x3, [%x[args], %[offsetof_n_channels]]\n"
-    "ldr x20, [%x[args], %[offsetof_outptrs]]\n"
-    "mov x4, #0x0\n"
-    "mov x19, #0x4\n"
-    "ldr x5, [%x[args], %[offsetof_inptrs]]\n"
-    "ldp x6, x7, [x20, #0x0]\n"
-    "whilelt p0.h, XZR, x19\n"
-    "whilelt p1.h, x4, x3\n"
-    "ldp x8, x17, [x20, #0x10]\n"
-    "ldp x16, x15, [x5, #0x0]\n"
-    "add x14, %x[args], %[offsetof_rescale]\n"
-    "mov x13, #0x0\n"
-    "ldp x12, x11, [x5, #0x10]\n"
-    "ldp x10, x9, [x5, #0x20]\n"
-    "ldp x28, x27, [x5, #0x30]\n"
-    "ldp x26, x25, [x5, #0x40]\n"
-    "ldp x24, x23, [x5, #0x50]\n"
-    "ldp x22, x21, [x5, #0x60]\n"
-    "ldp x20, x19, [x5, #0x70]\n"
-    "ld1h { z7.h }, p1/Z, [x9, x4, LSL #1]\n"
-    "ld1h { z6.h }, p1/Z, [x28, x4, LSL #1]\n"
-    "ld1h { z5.h }, p1/Z, [x25, x4, LSL #1]\n"
-    "ld1h { z4.h }, p1/Z, [x24, x4, LSL #1]\n"
-    "ld1h { z3.h }, p1/Z, [x15, x4, LSL #1]\n"
-    "ld1h { z2.h }, p1/Z, [x12, x4, LSL #1]\n"
-    "ld1h { z1.h }, p1/Z, [x10, x4, LSL #1]\n"
-    "ld1h { z31.h }, p1/Z, [x26, x4, LSL #1]\n"
-    "ld1h { z30.h }, p1/Z, [x27, x4, LSL #1]\n"
-    "ld1h { z29.h }, p1/Z, [x23, x4, LSL #1]\n"
-    "ld1h { z28.h }, p1/Z, [x21, x4, LSL #1]\n"
-    "ld1h { z27.h }, p1/Z, [x20, x4, LSL #1]\n"
-    "ld1h { z26.h }, p1/Z, [x16, x4, LSL #1]\n"
-    "ld1h { z25.h }, p1/Z, [x11, x4, LSL #1]\n"
-    "ld1h { z24.h }, p1/Z, [x22, x4, LSL #1]\n"
-    "ld1h { z23.h }, p1/Z, [x19, x4, LSL #1]\n"
-    "incw x4\n"
-    "whilelt p1.h, x4, x3\n"
-    "ld1rqh { z0.h }, p0/Z, [x14]\n"
+    "ldr x2, [%x[args], %[offsetof_n_channels]]\n"
+    "ldr x21, [%x[args], %[offsetof_outptrs]]\n"
+    "mov x3, #0x0\n"
+    "mov x20, #0x4\n"
+    "ldr x4, [%x[args], %[offsetof_inptrs]]\n"
+    "ldp x5, x6, [x21, #0x0]\n"
+    "whilelt p0.h, XZR, x20\n"
+    "whilelt p1.h, x3, x2\n"
+    "ldp x7, x8, [x21, #0x10]\n"
+    "ldp x17, x16, [x4, #0x0]\n"
+    "add x15, %x[args], %[offsetof_rescale]\n"
+    "mov x14, #0x0\n"
+    "ldp x13, x12, [x4, #0x10]\n"
+    "ldp x11, x10, [x4, #0x20]\n"
+    "ldp x9, x28, [x4, #0x30]\n"
+    "ldp x27, x26, [x4, #0x40]\n"
+    "ldp x25, x24, [x4, #0x50]\n"
+    "ldp x23, x22, [x4, #0x60]\n"
+    "ldp x21, x20, [x4, #0x70]\n"
+    "ld1h { z7.h }, p1/Z, [x10, x3, LSL #1]\n"
+    "ld1h { z6.h }, p1/Z, [x9, x3, LSL #1]\n"
+    "ld1h { z5.h }, p1/Z, [x26, x3, LSL #1]\n"
+    "ld1h { z4.h }, p1/Z, [x25, x3, LSL #1]\n"
+    "ld1h { z3.h }, p1/Z, [x16, x3, LSL #1]\n"
+    "ld1h { z2.h }, p1/Z, [x13, x3, LSL #1]\n"
+    "ld1h { z1.h }, p1/Z, [x11, x3, LSL #1]\n"
+    "ld1h { z31.h }, p1/Z, [x27, x3, LSL #1]\n"
+    "ld1h { z30.h }, p1/Z, [x28, x3, LSL #1]\n"
+    "ld1h { z29.h }, p1/Z, [x24, x3, LSL #1]\n"
+    "ld1h { z28.h }, p1/Z, [x22, x3, LSL #1]\n"
+    "ld1h { z27.h }, p1/Z, [x21, x3, LSL #1]\n"
+    "ld1h { z26.h }, p1/Z, [x17, x3, LSL #1]\n"
+    "ld1h { z25.h }, p1/Z, [x12, x3, LSL #1]\n"
+    "ld1h { z24.h }, p1/Z, [x23, x3, LSL #1]\n"
+    "ld1h { z23.h }, p1/Z, [x20, x3, LSL #1]\n"
+    "incw x3\n"
+    "whilelt p1.h, x3, x2\n"
+    "ld1rqh { z0.h }, p0/Z, [x15]\n"
     "b.none 2f\n"
     "1:"  // Vector: Loop
     "fadd z17.h, z7.h, z6.h\n"
     "fadd z16.h, z5.h, z4.h\n"
-    "ld1h { z7.h }, p1/Z, [x9, x4, LSL #1]\n"
-    "ld1h { z6.h }, p1/Z, [x28, x4, LSL #1]\n"
+    "ld1h { z7.h }, p1/Z, [x10, x3, LSL #1]\n"
+    "ld1h { z6.h }, p1/Z, [x9, x3, LSL #1]\n"
     "fadd z19.h, z17.h, z16.h\n"
     "fadd z18.h, z3.h, z2.h\n"
-    "ld1h { z5.h }, p1/Z, [x25, x4, LSL #1]\n"
-    "ld1h { z4.h }, p1/Z, [x24, x4, LSL #1]\n"
+    "ld1h { z5.h }, p1/Z, [x26, x3, LSL #1]\n"
+    "ld1h { z4.h }, p1/Z, [x25, x3, LSL #1]\n"
     "fadd z17.h, z1.h, z31.h\n"
     "fadd z22.h, z30.h, z29.h\n"
-    "ld1h { z3.h }, p1/Z, [x15, x4, LSL #1]\n"
-    "ld1h { z2.h }, p1/Z, [x12, x4, LSL #1]\n"
+    "ld1h { z3.h }, p1/Z, [x16, x3, LSL #1]\n"
+    "ld1h { z2.h }, p1/Z, [x13, x3, LSL #1]\n"
     "fadd z16.h, z28.h, z27.h\n"
     "fadd z21.h, z18.h, z19.h\n"
-    "ld1h { z1.h }, p1/Z, [x10, x4, LSL #1]\n"
-    "ld1h { z31.h }, p1/Z, [x26, x4, LSL #1]\n"
+    "ld1h { z1.h }, p1/Z, [x11, x3, LSL #1]\n"
+    "ld1h { z31.h }, p1/Z, [x27, x3, LSL #1]\n"
     "fadd z20.h, z16.h, z19.h\n"
     "fadd z19.h, z26.h, z17.h\n"
-    "ld1h { z30.h }, p1/Z, [x27, x4, LSL #1]\n"
-    "ld1h { z29.h }, p1/Z, [x23, x4, LSL #1]\n"
+    "ld1h { z30.h }, p1/Z, [x28, x3, LSL #1]\n"
+    "ld1h { z29.h }, p1/Z, [x24, x3, LSL #1]\n"
     "fadd z18.h, z25.h, z22.h\n"
     "fadd z17.h, z24.h, z17.h\n"
-    "ld1h { z28.h }, p1/Z, [x21, x4, LSL #1]\n"
-    "ld1h { z27.h }, p1/Z, [x20, x4, LSL #1]\n"
+    "ld1h { z28.h }, p1/Z, [x22, x3, LSL #1]\n"
+    "ld1h { z27.h }, p1/Z, [x21, x3, LSL #1]\n"
     "fadd z16.h, z23.h, z22.h\n"
-    "ld1h { z26.h }, p1/Z, [x16, x4, LSL #1]\n"
-    "ld1h { z25.h }, p1/Z, [x11, x4, LSL #1]\n"
-    "fadd z19.h, z19.h, z21.h\n"
-    "ld1h { z24.h }, p1/Z, [x22, x4, LSL #1]\n"
-    "ld1h { z23.h }, p1/Z, [x19, x4, LSL #1]\n"
-    "incw x4\n"
-    "fadd z18.h, z18.h, z21.h\n"
+    "ld1h { z26.h }, p1/Z, [x17, x3, LSL #1]\n"
+    "ld1h { z25.h }, p1/Z, [x12, x3, LSL #1]\n"
+    "fadd z19.h, z21.h, z19.h\n"
+    "ld1h { z24.h }, p1/Z, [x23, x3, LSL #1]\n"
+    "ld1h { z23.h }, p1/Z, [x20, x3, LSL #1]\n"
+    "incw x3\n"
+    "fadd z18.h, z21.h, z18.h\n"
     "fadd z17.h, z17.h, z20.h\n"
     "fadd z16.h, z16.h, z20.h\n"
-    "whilelt p0.h, x13, x3\n"
-    "whilelt p1.h, x4, x3\n"
+    "whilelt p0.h, x14, x2\n"
+    "whilelt p1.h, x3, x2\n"
     "fmul z19.h, z19.h, z0.h[0]\n"
     "fmul z18.h, z18.h, z0.h[1]\n"
-    "st1h { z19.h }, p0, [x6, x13, LSL #1]\n"
+    "st1h { z19.h }, p0, [x5, x14, LSL #1]\n"
     "fmul z17.h, z17.h, z0.h[2]\n"
     "fmul z16.h, z16.h, z0.h[3]\n"
-    "st1h { z18.h }, p0, [x7, x13, LSL #1]\n"
-    "st1h { z17.h }, p0, [x8, x13, LSL #1]\n"
-    "st1h { z16.h }, p0, [x17, x13, LSL #1]\n"
-    "incw x13\n"
+    "st1h { z18.h }, p0, [x6, x14, LSL #1]\n"
+    "st1h { z17.h }, p0, [x7, x14, LSL #1]\n"
+    "st1h { z16.h }, p0, [x8, x14, LSL #1]\n"
+    "incw x14\n"
     "b.any 1b\n"
     "2:"  // Vector: Tail
     "fadd z17.h, z7.h, z6.h\n"
     "fadd z16.h, z5.h, z4.h\n"
-    "whilelt p0.h, x13, x3\n"
+    "whilelt p0.h, x14, x2\n"
     "fadd z19.h, z17.h, z16.h\n"
     "fadd z18.h, z3.h, z2.h\n"
     "fadd z17.h, z1.h, z31.h\n"
@@ -183,21 +183,21 @@ void sve_fp16_nhwc_avg_3x3_s1_output2x2_depthfirst_impl(
     "fadd z18.h, z25.h, z22.h\n"
     "fadd z17.h, z24.h, z17.h\n"
     "fadd z16.h, z23.h, z22.h\n"
-    "fadd z19.h, z19.h, z21.h\n"
+    "fadd z19.h, z21.h, z19.h\n"
     "fmul z19.h, z19.h, z0.h[0]\n"
-    "st1h { z19.h }, p0, [x6, x13, LSL #1]\n"
-    "fadd z18.h, z18.h, z21.h\n"
+    "st1h { z19.h }, p0, [x5, x14, LSL #1]\n"
+    "fadd z18.h, z21.h, z18.h\n"
     "fadd z17.h, z17.h, z20.h\n"
     "fmul z18.h, z18.h, z0.h[1]\n"
     "fmul z17.h, z17.h, z0.h[2]\n"
     "fadd z16.h, z16.h, z20.h\n"
     "fmul z16.h, z16.h, z0.h[3]\n"
-    "st1h { z18.h }, p0, [x7, x13, LSL #1]\n"
-    "st1h { z17.h }, p0, [x8, x13, LSL #1]\n"
-    "st1h { z16.h }, p0, [x17, x13, LSL #1]\n"
+    "st1h { z18.h }, p0, [x6, x14, LSL #1]\n"
+    "st1h { z17.h }, p0, [x7, x14, LSL #1]\n"
+    "st1h { z16.h }, p0, [x8, x14, LSL #1]\n"
     :
     : [args] "r" (&args), [offsetof_inptrs] "I" (offsetof(KernelArgs, inptrs)), [offsetof_n_channels] "I" (offsetof(KernelArgs, n_channels)), [offsetof_outptrs] "I" (offsetof(KernelArgs, outptrs)), [offsetof_rescale] "I" (offsetof(KernelArgs, rescale_vals))
-    : "cc", "memory", "p0", "p1", "x3", "x4", "x5", "x6", "x7", "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x17", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+    : "cc", "memory", "p0", "p1", "x2", "x3", "x4", "x5", "x6", "x7", "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x17", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
   );
 }
 
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp16_nhwc_avg_generic_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp16_nhwc_avg_generic_depthfirst/generic.cpp
index 7081206da1..594c65e18d 100644
--- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp16_nhwc_avg_generic_depthfirst/generic.cpp
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp16_nhwc_avg_generic_depthfirst/generic.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2021-2022 Arm Limited.
+ * Copyright (c) 2021-2023 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -42,83 +42,83 @@ void sve_fp16_nhwc_avg_generic_depthfirst_impl(
   const auto rescale_value = static_cast<__fp16>(1.0f / static_cast<float>(window_cells));
 
   __asm__ __volatile__(
-    "mov x28, #0x0\n"
-    "cnth x27\n"
-    "cnth x26, ALL, MUL #2\n"
-    "cnth x25, ALL, MUL #3\n"
+    "mov x9, #0x0\n"
+    "cnth x28\n"
+    "cnth x27, ALL, MUL #2\n"
+    "cnth x26, ALL, MUL #3\n"
     "ptrue p0.b\n"
-    "whilelt p3.h, x28, %x[n_channels]\n"
+    "whilelt p3.h, x9, %x[n_channels]\n"
     "ld1rh { z7.h }, p0/Z, [%x[rescale_ptr]]\n"
-    "whilelt p2.h, x27, %x[n_channels]\n"
-    "whilelt p1.h, x26, %x[n_channels]\n"
-    "whilelt p0.h, x25, %x[n_channels]\n"
+    "whilelt p2.h, x28, %x[n_channels]\n"
+    "whilelt p1.h, x27, %x[n_channels]\n"
+    "whilelt p0.h, x26, %x[n_channels]\n"
     "b.none 7f\n"
     "1:"  // 4-vectors of channels
-    "lsr x24, %x[n_valid_cells], #0x2\n"
+    "lsr x25, %x[n_valid_cells], #0x2\n"
     "mov z6.b, #0x0\n"
     "mov z5.b, #0x0\n"
-    "mov x19, %x[inptrs]\n"
+    "mov x20, %x[inptrs]\n"
     "mov z4.b, #0x0\n"
     "mov z3.b, #0x0\n"
-    "cbz x24, 4f\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
-    "subs x24, x24, #0x1\n"
-    "add x19, x19, #0x20\n"
-    "ld1h { z2.h }, p3/Z, [x23, x28, LSL #1]\n"
-    "ld1h { z1.h }, p3/Z, [x22, x28, LSL #1]\n"
-    "ld1h { z0.h }, p3/Z, [x21, x28, LSL #1]\n"
-    "ld1h { z31.h }, p3/Z, [x20, x28, LSL #1]\n"
-    "ld1h { z30.h }, p2/Z, [x23, x27, LSL #1]\n"
-    "ld1h { z22.h }, p2/Z, [x22, x27, LSL #1]\n"
-    "ld1h { z29.h }, p2/Z, [x21, x27, LSL #1]\n"
-    "ld1h { z28.h }, p2/Z, [x20, x27, LSL #1]\n"
-    "ld1h { z27.h }, p1/Z, [x23, x26, LSL #1]\n"
-    "ld1h { z21.h }, p1/Z, [x22, x26, LSL #1]\n"
-    "ld1h { z26.h }, p1/Z, [x21, x26, LSL #1]\n"
-    "ld1h { z17.h }, p1/Z, [x20, x26, LSL #1]\n"
-    "ld1h { z25.h }, p0/Z, [x23, x25, LSL #1]\n"
-    "ld1h { z20.h }, p0/Z, [x22, x25, LSL #1]\n"
-    "ld1h { z24.h }, p0/Z, [x21, x25, LSL #1]\n"
-    "ld1h { z16.h }, p0/Z, [x20, x25, LSL #1]\n"
+    "cbz x25, 4f\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "subs x25, x25, #0x1\n"
+    "add x20, x20, #0x20\n"
+    "ld1h { z2.h }, p3/Z, [x24, x9, LSL #1]\n"
+    "ld1h { z1.h }, p3/Z, [x23, x9, LSL #1]\n"
+    "ld1h { z0.h }, p3/Z, [x22, x9, LSL #1]\n"
+    "ld1h { z31.h }, p3/Z, [x21, x9, LSL #1]\n"
+    "ld1h { z30.h }, p2/Z, [x24, x28, LSL #1]\n"
+    "ld1h { z22.h }, p2/Z, [x23, x28, LSL #1]\n"
+    "ld1h { z29.h }, p2/Z, [x22, x28, LSL #1]\n"
+    "ld1h { z28.h }, p2/Z, [x21, x28, LSL #1]\n"
+    "ld1h { z27.h }, p1/Z, [x24, x27, LSL #1]\n"
+    "ld1h { z21.h }, p1/Z, [x23, x27, LSL #1]\n"
+    "ld1h { z26.h }, p1/Z, [x22, x27, LSL #1]\n"
+    "ld1h { z17.h }, p1/Z, [x21, x27, LSL #1]\n"
+    "ld1h { z25.h }, p0/Z, [x24, x26, LSL #1]\n"
+    "ld1h { z20.h }, p0/Z, [x23, x26, LSL #1]\n"
+    "ld1h { z24.h }, p0/Z, [x22, x26, LSL #1]\n"
+    "ld1h { z16.h }, p0/Z, [x21, x26, LSL #1]\n"
     "beq 3f\n"
     "2:"  // 4-vectors of channels: 4 inputs loop
     "fadd z23.h, z2.h, z1.h\n"
     "fadd z19.h, z0.h, z31.h\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
     "fadd z22.h, z30.h, z22.h\n"
     "fadd z18.h, z29.h, z28.h\n"
-    "subs x24, x24, #0x1\n"
-    "add x19, x19, #0x20\n"
+    "subs x25, x25, #0x1\n"
+    "add x20, x20, #0x20\n"
     "fadd z21.h, z27.h, z21.h\n"
     "fadd z17.h, z26.h, z17.h\n"
-    "ld1h { z2.h }, p3/Z, [x23, x28, LSL #1]\n"
-    "ld1h { z1.h }, p3/Z, [x22, x28, LSL #1]\n"
+    "ld1h { z2.h }, p3/Z, [x24, x9, LSL #1]\n"
+    "ld1h { z1.h }, p3/Z, [x23, x9, LSL #1]\n"
     "fadd z20.h, z25.h, z20.h\n"
     "fadd z16.h, z24.h, z16.h\n"
-    "ld1h { z0.h }, p3/Z, [x21, x28, LSL #1]\n"
-    "ld1h { z31.h }, p3/Z, [x20, x28, LSL #1]\n"
+    "ld1h { z0.h }, p3/Z, [x22, x9, LSL #1]\n"
+    "ld1h { z31.h }, p3/Z, [x21, x9, LSL #1]\n"
     "fadd z19.h, z23.h, z19.h\n"
     "fadd z18.h, z22.h, z18.h\n"
-    "ld1h { z30.h }, p2/Z, [x23, x27, LSL #1]\n"
-    "ld1h { z22.h }, p2/Z, [x22, x27, LSL #1]\n"
+    "ld1h { z30.h }, p2/Z, [x24, x28, LSL #1]\n"
+    "ld1h { z22.h }, p2/Z, [x23, x28, LSL #1]\n"
     "fadd z17.h, z21.h, z17.h\n"
     "fadd z16.h, z20.h, z16.h\n"
-    "ld1h { z29.h }, p2/Z, [x21, x27, LSL #1]\n"
-    "ld1h { z28.h }, p2/Z, [x20, x27, LSL #1]\n"
+    "ld1h { z29.h }, p2/Z, [x22, x28, LSL #1]\n"
+    "ld1h { z28.h }, p2/Z, [x21, x28, LSL #1]\n"
     "fadd z6.h, z6.h, z19.h\n"
     "fadd z5.h, z5.h, z18.h\n"
-    "ld1h { z27.h }, p1/Z, [x23, x26, LSL #1]\n"
-    "ld1h { z21.h }, p1/Z, [x22, x26, LSL #1]\n"
+    "ld1h { z27.h }, p1/Z, [x24, x27, LSL #1]\n"
+    "ld1h { z21.h }, p1/Z, [x23, x27, LSL #1]\n"
     "fadd z4.h, z4.h, z17.h\n"
     "fadd z3.h, z3.h, z16.h\n"
-    "ld1h { z26.h }, p1/Z, [x21, x26, LSL #1]\n"
-    "ld1h { z17.h }, p1/Z, [x20, x26, LSL #1]\n"
-    "ld1h { z25.h }, p0/Z, [x23, x25, LSL #1]\n"
-    "ld1h { z20.h }, p0/Z, [x22, x25, LSL #1]\n"
-    "ld1h { z24.h }, p0/Z, [x21, x25, LSL #1]\n"
-    "ld1h { z16.h }, p0/Z, [x20, x25, LSL #1]\n"
+    "ld1h { z26.h }, p1/Z, [x22, x27, LSL #1]\n"
+    "ld1h { z17.h }, p1/Z, [x21, x27, LSL #1]\n"
+    "ld1h { z25.h }, p0/Z, [x24, x26, LSL #1]\n"
+    "ld1h { z20.h }, p0/Z, [x23, x26, LSL #1]\n"
+    "ld1h { z24.h }, p0/Z, [x22, x26, LSL #1]\n"
+    "ld1h { z16.h }, p0/Z, [x21, x26, LSL #1]\n"
     "bgt 2b\n"
     "3:"  // 4-vectors of channels: 4 inputs tail
     "fadd z23.h, z2.h, z1.h\n"
@@ -138,65 +138,65 @@ void sve_fp16_nhwc_avg_generic_depthfirst_impl(
     "fadd z4.h, z4.h, z17.h\n"
     "fadd z3.h, z3.h, z16.h\n"
     "4:"  // 4-vectors of channels: After loop
-    "ands x20, %x[n_valid_cells], #0x3\n"
+    "ands x21, %x[n_valid_cells], #0x3\n"
     "beq 6f\n"
     "5:"  // 4-vectors of channels: Single input loop
-    "ldr x23, [x19], #0x8\n"
-    "ld1h { z2.h }, p3/Z, [x23, x28, LSL #1]\n"
-    "subs x20, x20, #0x1\n"
+    "ldr x24, [x20], #0x8\n"
+    "ld1h { z2.h }, p3/Z, [x24, x9, LSL #1]\n"
+    "subs x21, x21, #0x1\n"
     "fadd z6.h, z6.h, z2.h\n"
-    "ld1h { z30.h }, p2/Z, [x23, x27, LSL #1]\n"
-    "ld1h { z27.h }, p1/Z, [x23, x26, LSL #1]\n"
+    "ld1h { z30.h }, p2/Z, [x24, x28, LSL #1]\n"
+    "ld1h { z27.h }, p1/Z, [x24, x27, LSL #1]\n"
     "fadd z5.h, z5.h, z30.h\n"
     "fadd z4.h, z4.h, z27.h\n"
-    "ld1h { z25.h }, p0/Z, [x23, x25, LSL #1]\n"
+    "ld1h { z25.h }, p0/Z, [x24, x26, LSL #1]\n"
     "fadd z3.h, z3.h, z25.h\n"
     "bgt 5b\n"
     "6:"  // 4-vectors of channels: Single input loop: End
     "fmul z6.h, z6.h, z7.h\n"
     "fmul z5.h, z5.h, z7.h\n"
-    "st1h { z6.h }, p3, [%x[outptr], x28, LSL #1]\n"
+    "st1h { z6.h }, p3, [%x[outptr], x9, LSL #1]\n"
     "fmul z4.h, z4.h, z7.h\n"
     "fmul z3.h, z3.h, z7.h\n"
-    "st1h { z5.h }, p2, [%x[outptr], x27, LSL #1]\n"
-    "st1h { z4.h }, p1, [%x[outptr], x26, LSL #1]\n"
+    "st1h { z5.h }, p2, [%x[outptr], x28, LSL #1]\n"
+    "st1h { z4.h }, p1, [%x[outptr], x27, LSL #1]\n"
+    "inch x9, ALL, MUL #4\n"
     "inch x28, ALL, MUL #4\n"
-    "inch x27, ALL, MUL #4\n"
-    "st1h { z3.h }, p0, [%x[outptr], x25, LSL #1]\n"
-    "inch x25, ALL, MUL #4\n"
-    "whilelt p0.h, x25, %x[n_channels]\n"
+    "st1h { z3.h }, p0, [%x[outptr], x26, LSL #1]\n"
     "inch x26, ALL, MUL #4\n"
+    "whilelt p0.h, x26, %x[n_channels]\n"
+    "inch x27, ALL, MUL #4\n"
     "b.any 1b\n"
     "7:"  // Single vector of channels
-    "whilelt p3.h, x28, %x[n_channels]\n"
+    "whilelt p3.h, x9, %x[n_channels]\n"
     "b.none 14f\n"
     "8:"  // Single vector of channels: Loop
-    "lsr x24, %x[n_valid_cells], #0x2\n"
+    "lsr x25, %x[n_valid_cells], #0x2\n"
     "mov z6.b, #0x0\n"
-    "mov x19, %x[inptrs]\n"
-    "cbz x24, 11f\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
-    "subs x24, x24, #0x1\n"
-    "add x19, x19, #0x20\n"
-    "ld1h { z2.h }, p3/Z, [x23, x28, LSL #1]\n"
-    "ld1h { z1.h }, p3/Z, [x22, x28, LSL #1]\n"
-    "ld1h { z0.h }, p3/Z, [x21, x28, LSL #1]\n"
-    "ld1h { z31.h }, p3/Z, [x20, x28, LSL #1]\n"
+    "mov x20, %x[inptrs]\n"
+    "cbz x25, 11f\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "subs x25, x25, #0x1\n"
+    "add x20, x20, #0x20\n"
+    "ld1h { z2.h }, p3/Z, [x24, x9, LSL #1]\n"
+    "ld1h { z1.h }, p3/Z, [x23, x9, LSL #1]\n"
+    "ld1h { z0.h }, p3/Z, [x22, x9, LSL #1]\n"
+    "ld1h { z31.h }, p3/Z, [x21, x9, LSL #1]\n"
     "beq 10f\n"
     "9:"  // Single vector of channels: Loop: 4 inputs loop
     "fadd z23.h, z2.h, z1.h\n"
     "fadd z19.h, z0.h, z31.h\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
     "fadd z19.h, z23.h, z19.h\n"
-    "subs x24, x24, #0x1\n"
+    "subs x25, x25, #0x1\n"
     "fadd z6.h, z6.h, z19.h\n"
-    "add x19, x19, #0x20\n"
-    "ld1h { z2.h }, p3/Z, [x23, x28, LSL #1]\n"
-    "ld1h { z1.h }, p3/Z, [x22, x28, LSL #1]\n"
-    "ld1h { z0.h }, p3/Z, [x21, x28, LSL #1]\n"
-    "ld1h { z31.h }, p3/Z, [x20, x28, LSL #1]\n"
+    "add x20, x20, #0x20\n"
+    "ld1h { z2.h }, p3/Z, [x24, x9, LSL #1]\n"
+    "ld1h { z1.h }, p3/Z, [x23, x9, LSL #1]\n"
+    "ld1h { z0.h }, p3/Z, [x22, x9, LSL #1]\n"
+    "ld1h { z31.h }, p3/Z, [x21, x9, LSL #1]\n"
     "bgt 9b\n"
     "10:"  // Single vector of channels: Loop: 4 inputs tail
     "fadd z23.h, z2.h, z1.h\n"
@@ -204,24 +204,24 @@ void sve_fp16_nhwc_avg_generic_depthfirst_impl(
     "fadd z19.h, z23.h, z19.h\n"
     "fadd z6.h, z6.h, z19.h\n"
     "11:"  // Single vector of channels: Loop: After loop
-    "ands x20, %x[n_valid_cells], #0x3\n"
+    "ands x21, %x[n_valid_cells], #0x3\n"
     "beq 13f\n"
     "12:"  // Single vector of channels: Loop: Single input loop
-    "ldr x23, [x19], #0x8\n"
-    "ld1h { z2.h }, p3/Z, [x23, x28, LSL #1]\n"
-    "subs x20, x20, #0x1\n"
+    "ldr x24, [x20], #0x8\n"
+    "ld1h { z2.h }, p3/Z, [x24, x9, LSL #1]\n"
+    "subs x21, x21, #0x1\n"
     "fadd z6.h, z6.h, z2.h\n"
     "bgt 12b\n"
     "13:"  // Single vector of channels: Loop: Single input loop: End
     "fmul z6.h, z6.h, z7.h\n"
-    "st1h { z6.h }, p3, [%x[outptr], x28, LSL #1]\n"
-    "inch x28\n"
-    "whilelt p3.h, x28, %x[n_channels]\n"
+    "st1h { z6.h }, p3, [%x[outptr], x9, LSL #1]\n"
+    "inch x9\n"
+    "whilelt p3.h, x9, %x[n_channels]\n"
     "b.any 8b\n"
     "14:"  // End
     :
     : [inptrs] "r" (inptrs), [n_channels] "r" (n_channels), [n_valid_cells] "r" (n_valid_cells), [outptr] "r" (outptr), [rescale_ptr] "r" (&rescale_value)
-    : "cc", "memory", "p0", "p1", "p2", "p3", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+    : "cc", "memory", "p0", "p1", "p2", "p3", "x9", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
   );
 }
 
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp16_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp16_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp
index cda3d4248a..838cd3406c 100644
--- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp16_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp16_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2021-2022 Arm Limited.
+ * Copyright (c) 2021-2023 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -63,80 +63,80 @@ void sve_fp16_nhwc_max_2x2_s1_output2x2_depthfirst_impl(
                         pad_left, pad_top, pad_right, pad_bottom);
 
   __asm__ __volatile__(
-    "ldr x14, [%x[args], %[offsetof_n_channels]]\n"
-    "ldr x20, [%x[args], %[offsetof_outptrs]]\n"
-    "mov x13, #0x0\n"
-    "whilelt p2.h, x13, x14\n"
-    "ldr x19, [%x[args], %[offsetof_inptrs]]\n"
-    "ldp x12, x11, [x20, #0x0]\n"
+    "ldr x15, [%x[args], %[offsetof_n_channels]]\n"
+    "ldr x21, [%x[args], %[offsetof_outptrs]]\n"
+    "mov x14, #0x0\n"
+    "whilelt p2.h, x14, x15\n"
+    "ldr x20, [%x[args], %[offsetof_inptrs]]\n"
+    "ldp x13, x12, [x21, #0x0]\n"
     "ptrue p1.b\n"
-    "mov x10, #0x0\n"
-    "ldp x9, x28, [x20, #0x10]\n"
-    "ldp x27, x26, [x19, #0x0]\n"
-    "ldp x25, x24, [x19, #0x10]\n"
-    "ldp x23, x22, [x19, #0x20]\n"
-    "ldp x21, x20, [x19, #0x30]\n"
-    "ldr x19, [x19, #0x40]\n"
-    "ld1h { z31.h }, p2/Z, [x26, x13, LSL #1]\n"
-    "ld1h { z30.h }, p2/Z, [x23, x13, LSL #1]\n"
-    "ld1h { z29.h }, p2/Z, [x20, x13, LSL #1]\n"
-    "ld1h { z28.h }, p2/Z, [x24, x13, LSL #1]\n"
-    "ld1h { z27.h }, p2/Z, [x27, x13, LSL #1]\n"
-    "ld1h { z26.h }, p2/Z, [x22, x13, LSL #1]\n"
-    "ld1h { z25.h }, p2/Z, [x25, x13, LSL #1]\n"
-    "ld1h { z24.h }, p2/Z, [x21, x13, LSL #1]\n"
-    "ld1h { z23.h }, p2/Z, [x19, x13, LSL #1]\n"
-    "incw x13\n"
-    "whilelt p2.h, x13, x14\n"
+    "mov x11, #0x0\n"
+    "ldp x10, x9, [x21, #0x10]\n"
+    "ldp x28, x27, [x20, #0x0]\n"
+    "ldp x26, x25, [x20, #0x10]\n"
+    "ldp x24, x23, [x20, #0x20]\n"
+    "ldp x22, x21, [x20, #0x30]\n"
+    "ldr x20, [x20, #0x40]\n"
+    "ld1h { z31.h }, p2/Z, [x27, x14, LSL #1]\n"
+    "ld1h { z30.h }, p2/Z, [x24, x14, LSL #1]\n"
+    "ld1h { z29.h }, p2/Z, [x21, x14, LSL #1]\n"
+    "ld1h { z28.h }, p2/Z, [x25, x14, LSL #1]\n"
+    "ld1h { z27.h }, p2/Z, [x28, x14, LSL #1]\n"
+    "ld1h { z26.h }, p2/Z, [x26, x14, LSL #1]\n"
+    "ld1h { z25.h }, p2/Z, [x23, x14, LSL #1]\n"
+    "ld1h { z24.h }, p2/Z, [x22, x14, LSL #1]\n"
+    "ld1h { z23.h }, p2/Z, [x20, x14, LSL #1]\n"
+    "incw x14\n"
+    "whilelt p2.h, x14, x15\n"
     "b.none 2f\n"
     "1:"  // Vector: Loop
     "movprfx z22, z31\n fmax z22.h, p1/M, z22.h, z30.h\n"
     "movprfx z21, z30\n fmax z21.h, p1/M, z21.h, z29.h\n"
-    "ld1h { z31.h }, p2/Z, [x26, x13, LSL #1]\n"
-    "ld1h { z30.h }, p2/Z, [x23, x13, LSL #1]\n"
+    "ld1h { z31.h }, p2/Z, [x27, x14, LSL #1]\n"
+    "ld1h { z30.h }, p2/Z, [x24, x14, LSL #1]\n"
     "movprfx z20, z28\n fmax z20.h, p1/M, z20.h, z27.h\n"
-    "movprfx z17, z26\n fmax z17.h, p1/M, z17.h, z25.h\n"
-    "ld1h { z29.h }, p2/Z, [x20, x13, LSL #1]\n"
-    "ld1h { z27.h }, p2/Z, [x27, x13, LSL #1]\n"
-    "movprfx z19, z24\n fmax z19.h, p1/M, z19.h, z28.h\n"
-    "movprfx z18, z26\n fmax z18.h, p1/M, z18.h, z23.h\n"
-    "ld1h { z28.h }, p2/Z, [x24, x13, LSL #1]\n"
-    "ld1h { z26.h }, p2/Z, [x22, x13, LSL #1]\n"
-    "ld1h { z25.h }, p2/Z, [x25, x13, LSL #1]\n"
-    "ld1h { z24.h }, p2/Z, [x21, x13, LSL #1]\n"
-    "whilelt p0.h, x10, x14\n"
+    "movprfx z19, z26\n fmax z19.h, p1/M, z19.h, z25.h\n"
+    "ld1h { z29.h }, p2/Z, [x21, x14, LSL #1]\n"
+    "ld1h { z27.h }, p2/Z, [x28, x14, LSL #1]\n"
+    "movprfx z17, z28\n fmax z17.h, p1/M, z17.h, z24.h\n"
+    "movprfx z18, z25\n fmax z18.h, p1/M, z18.h, z23.h\n"
+    "ld1h { z28.h }, p2/Z, [x25, x14, LSL #1]\n"
+    "ld1h { z26.h }, p2/Z, [x26, x14, LSL #1]\n"
+    "ld1h { z25.h }, p2/Z, [x23, x14, LSL #1]\n"
+    "ld1h { z24.h }, p2/Z, [x22, x14, LSL #1]\n"
+    "whilelt p0.h, x11, x15\n"
     "movprfx z16, z22\n fmax z16.h, p1/M, z16.h, z20.h\n"
-    "ld1h { z23.h }, p2/Z, [x19, x13, LSL #1]\n"
-    "incw x13\n"
-    "whilelt p2.h, x13, x14\n"
-    "st1h { z16.h }, p0, [x12, x10, LSL #1]\n"
-    "movprfx z16, z17\n fmax z16.h, p1/M, z16.h, z22.h\n"
-    "movprfx z17, z21\n fmax z17.h, p1/M, z17.h, z19.h\n"
-    "st1h { z16.h }, p0, [x11, x10, LSL #1]\n"
-    "movprfx z16, z21\n fmax z16.h, p1/M, z16.h, z18.h\n"
-    "st1h { z17.h }, p0, [x9, x10, LSL #1]\n"
-    "st1h { z16.h }, p0, [x28, x10, LSL #1]\n"
-    "incw x10\n"
+    "ld1h { z23.h }, p2/Z, [x20, x14, LSL #1]\n"
+    "incw x14\n"
+    "whilelt p2.h, x14, x15\n"
+    "st1h { z16.h }, p0, [x13, x11, LSL #1]\n"
+    "movprfx z16, z19\n fmax z16.h, p1/M, z16.h, z22.h\n"
+    "fmax z17.h, p1/M, z17.h, z21.h\n"
+    "st1h { z16.h }, p0, [x12, x11, LSL #1]\n"
+    "movprfx z16, z18\n fmax z16.h, p1/M, z16.h, z21.h\n"
+    "st1h { z17.h }, p0, [x10, x11, LSL #1]\n"
+    "st1h { z16.h }, p0, [x9, x11, LSL #1]\n"
+    "incw x11\n"
     "b.any 1b\n"
     "2:"  // Vector: Tail
     "movprfx z22, z31\n fmax z22.h, p1/M, z22.h, z30.h\n"
     "movprfx z21, z30\n fmax z21.h, p1/M, z21.h, z29.h\n"
     "movprfx z20, z28\n fmax z20.h, p1/M, z20.h, z27.h\n"
-    "movprfx z17, z26\n fmax z17.h, p1/M, z17.h, z25.h\n"
-    "movprfx z19, z24\n fmax z19.h, p1/M, z19.h, z28.h\n"
-    "movprfx z18, z26\n fmax z18.h, p1/M, z18.h, z23.h\n"
-    "whilelt p0.h, x10, x14\n"
+    "movprfx z19, z26\n fmax z19.h, p1/M, z19.h, z25.h\n"
+    "movprfx z17, z28\n fmax z17.h, p1/M, z17.h, z24.h\n"
+    "movprfx z18, z25\n fmax z18.h, p1/M, z18.h, z23.h\n"
+    "whilelt p0.h, x11, x15\n"
     "movprfx z16, z22\n fmax z16.h, p1/M, z16.h, z20.h\n"
-    "st1h { z16.h }, p0, [x12, x10, LSL #1]\n"
-    "movprfx z16, z17\n fmax z16.h, p1/M, z16.h, z22.h\n"
-    "movprfx z17, z21\n fmax z17.h, p1/M, z17.h, z19.h\n"
-    "st1h { z16.h }, p0, [x11, x10, LSL #1]\n"
-    "movprfx z16, z21\n fmax z16.h, p1/M, z16.h, z18.h\n"
-    "st1h { z17.h }, p0, [x9, x10, LSL #1]\n"
-    "st1h { z16.h }, p0, [x28, x10, LSL #1]\n"
+    "st1h { z16.h }, p0, [x13, x11, LSL #1]\n"
+    "movprfx z16, z19\n fmax z16.h, p1/M, z16.h, z22.h\n"
+    "fmax z17.h, p1/M, z17.h, z21.h\n"
+    "st1h { z16.h }, p0, [x12, x11, LSL #1]\n"
+    "movprfx z16, z18\n fmax z16.h, p1/M, z16.h, z21.h\n"
+    "st1h { z17.h }, p0, [x10, x11, LSL #1]\n"
+    "st1h { z16.h }, p0, [x9, x11, LSL #1]\n"
     :
     : [args] "r" (&args), [offsetof_inptrs] "I" (offsetof(KernelArgs, inptrs)), [offsetof_n_channels] "I" (offsetof(KernelArgs, n_channels)), [offsetof_outptrs] "I" (offsetof(KernelArgs, outptrs))
-    : "cc", "memory", "p0", "p1", "p2", "x9", "x10", "x11", "x12", "x13", "x14", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+    : "cc", "memory", "p0", "p1", "p2", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
   );
 }
 
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp16_nhwc_max_generic_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp16_nhwc_max_generic_depthfirst/generic.cpp
index 3b07befc23..9f1f9e7377 100644
--- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp16_nhwc_max_generic_depthfirst/generic.cpp
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp16_nhwc_max_generic_depthfirst/generic.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2021-2022 Arm Limited.
+ * Copyright (c) 2021-2023 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -40,82 +40,82 @@ void sve_fp16_nhwc_max_generic_depthfirst_impl(
 )
 {
   __asm__ __volatile__(
-    "mov x28, #0x0\n"
-    "cnth x27\n"
-    "cnth x26, ALL, MUL #2\n"
-    "cnth x25, ALL, MUL #3\n"
-    "whilelt p4.h, x28, %x[n_channels]\n"
-    "whilelt p3.h, x27, %x[n_channels]\n"
-    "whilelt p2.h, x26, %x[n_channels]\n"
-    "whilelt p1.h, x25, %x[n_channels]\n"
+    "mov x9, #0x0\n"
+    "cnth x28\n"
+    "cnth x27, ALL, MUL #2\n"
+    "cnth x26, ALL, MUL #3\n"
+    "whilelt p4.h, x9, %x[n_channels]\n"
+    "whilelt p3.h, x28, %x[n_channels]\n"
+    "whilelt p2.h, x27, %x[n_channels]\n"
+    "whilelt p1.h, x26, %x[n_channels]\n"
     "ptrue p0.b\n"
     "b.none 7f\n"
     "1:"  // 4-vectors of channels
-    "lsr x24, %x[n_valid_cells], #0x2\n"
+    "lsr x25, %x[n_valid_cells], #0x2\n"
     "mov z8.h, #0xfc00\n"
     "mov z7.h, #0xfc00\n"
-    "mov x19, %x[inptrs]\n"
+    "mov x20, %x[inptrs]\n"
     "mov z6.h, #0xfc00\n"
     "mov z5.h, #0xfc00\n"
-    "cbz x24, 4f\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
-    "subs x24, x24, #0x1\n"
-    "add x19, x19, #0x20\n"
-    "ld1h { z4.h }, p4/Z, [x23, x28, LSL #1]\n"
-    "ld1h { z3.h }, p4/Z, [x22, x28, LSL #1]\n"
-    "ld1h { z2.h }, p4/Z, [x21, x28, LSL #1]\n"
-    "ld1h { z1.h }, p4/Z, [x20, x28, LSL #1]\n"
-    "ld1h { z0.h }, p3/Z, [x23, x27, LSL #1]\n"
-    "ld1h { z31.h }, p3/Z, [x22, x27, LSL #1]\n"
-    "ld1h { z22.h }, p3/Z, [x21, x27, LSL #1]\n"
-    "ld1h { z30.h }, p3/Z, [x20, x27, LSL #1]\n"
-    "ld1h { z29.h }, p2/Z, [x23, x26, LSL #1]\n"
-    "ld1h { z28.h }, p2/Z, [x22, x26, LSL #1]\n"
-    "ld1h { z21.h }, p2/Z, [x21, x26, LSL #1]\n"
-    "ld1h { z27.h }, p2/Z, [x20, x26, LSL #1]\n"
-    "ld1h { z26.h }, p1/Z, [x23, x25, LSL #1]\n"
-    "ld1h { z25.h }, p1/Z, [x22, x25, LSL #1]\n"
-    "ld1h { z20.h }, p1/Z, [x21, x25, LSL #1]\n"
-    "ld1h { z24.h }, p1/Z, [x20, x25, LSL #1]\n"
+    "cbz x25, 4f\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "subs x25, x25, #0x1\n"
+    "add x20, x20, #0x20\n"
+    "ld1h { z4.h }, p4/Z, [x24, x9, LSL #1]\n"
+    "ld1h { z3.h }, p4/Z, [x23, x9, LSL #1]\n"
+    "ld1h { z2.h }, p4/Z, [x22, x9, LSL #1]\n"
+    "ld1h { z1.h }, p4/Z, [x21, x9, LSL #1]\n"
+    "ld1h { z0.h }, p3/Z, [x24, x28, LSL #1]\n"
+    "ld1h { z31.h }, p3/Z, [x23, x28, LSL #1]\n"
+    "ld1h { z22.h }, p3/Z, [x22, x28, LSL #1]\n"
+    "ld1h { z30.h }, p3/Z, [x21, x28, LSL #1]\n"
+    "ld1h { z29.h }, p2/Z, [x24, x27, LSL #1]\n"
+    "ld1h { z28.h }, p2/Z, [x23, x27, LSL #1]\n"
+    "ld1h { z21.h }, p2/Z, [x22, x27, LSL #1]\n"
+    "ld1h { z27.h }, p2/Z, [x21, x27, LSL #1]\n"
+    "ld1h { z26.h }, p1/Z, [x24, x26, LSL #1]\n"
+    "ld1h { z25.h }, p1/Z, [x23, x26, LSL #1]\n"
+    "ld1h { z20.h }, p1/Z, [x22, x26, LSL #1]\n"
+    "ld1h { z24.h }, p1/Z, [x21, x26, LSL #1]\n"
     "beq 3f\n"
     "2:"  // 4-vectors of channels: 4 inputs loop
     "movprfx z19, z4\n fmax z19.h, p0/M, z19.h, z3.h\n"
     "movprfx z23, z2\n fmax z23.h, p0/M, z23.h, z1.h\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
     "movprfx z18, z0\n fmax z18.h, p0/M, z18.h, z31.h\n"
     "fmax z22.h, p0/M, z22.h, z30.h\n"
-    "ld1h { z4.h }, p4/Z, [x23, x28, LSL #1]\n"
-    "ld1h { z3.h }, p4/Z, [x22, x28, LSL #1]\n"
+    "ld1h { z4.h }, p4/Z, [x24, x9, LSL #1]\n"
+    "ld1h { z3.h }, p4/Z, [x23, x9, LSL #1]\n"
     "movprfx z17, z29\n fmax z17.h, p0/M, z17.h, z28.h\n"
     "fmax z21.h, p0/M, z21.h, z27.h\n"
-    "ld1h { z2.h }, p4/Z, [x21, x28, LSL #1]\n"
-    "ld1h { z1.h }, p4/Z, [x20, x28, LSL #1]\n"
+    "ld1h { z2.h }, p4/Z, [x22, x9, LSL #1]\n"
+    "ld1h { z1.h }, p4/Z, [x21, x9, LSL #1]\n"
     "movprfx z16, z26\n fmax z16.h, p0/M, z16.h, z25.h\n"
     "fmax z20.h, p0/M, z20.h, z24.h\n"
-    "ld1h { z0.h }, p3/Z, [x23, x27, LSL #1]\n"
-    "ld1h { z31.h }, p3/Z, [x22, x27, LSL #1]\n"
+    "ld1h { z0.h }, p3/Z, [x24, x28, LSL #1]\n"
+    "ld1h { z31.h }, p3/Z, [x23, x28, LSL #1]\n"
     "fmax z19.h, p0/M, z19.h, z23.h\n"
     "fmax z18.h, p0/M, z18.h, z22.h\n"
-    "ld1h { z22.h }, p3/Z, [x21, x27, LSL #1]\n"
-    "ld1h { z30.h }, p3/Z, [x20, x27, LSL #1]\n"
+    "ld1h { z22.h }, p3/Z, [x22, x28, LSL #1]\n"
+    "ld1h { z30.h }, p3/Z, [x21, x28, LSL #1]\n"
     "fmax z17.h, p0/M, z17.h, z21.h\n"
     "fmax z16.h, p0/M, z16.h, z20.h\n"
-    "ld1h { z29.h }, p2/Z, [x23, x26, LSL #1]\n"
-    "ld1h { z28.h }, p2/Z, [x22, x26, LSL #1]\n"
-    "subs x24, x24, #0x1\n"
+    "ld1h { z29.h }, p2/Z, [x24, x27, LSL #1]\n"
+    "ld1h { z28.h }, p2/Z, [x23, x27, LSL #1]\n"
+    "subs x25, x25, #0x1\n"
     "fmax z8.h, p0/M, z8.h, z19.h\n"
-    "ld1h { z21.h }, p2/Z, [x21, x26, LSL #1]\n"
-    "ld1h { z27.h }, p2/Z, [x20, x26, LSL #1]\n"
+    "ld1h { z21.h }, p2/Z, [x22, x27, LSL #1]\n"
+    "ld1h { z27.h }, p2/Z, [x21, x27, LSL #1]\n"
     "fmax z7.h, p0/M, z7.h, z18.h\n"
     "fmax z6.h, p0/M, z6.h, z17.h\n"
-    "ld1h { z26.h }, p1/Z, [x23, x25, LSL #1]\n"
-    "ld1h { z25.h }, p1/Z, [x22, x25, LSL #1]\n"
+    "ld1h { z26.h }, p1/Z, [x24, x26, LSL #1]\n"
+    "ld1h { z25.h }, p1/Z, [x23, x26, LSL #1]\n"
     "fmax z5.h, p0/M, z5.h, z16.h\n"
-    "add x19, x19, #0x20\n"
-    "ld1h { z20.h }, p1/Z, [x21, x25, LSL #1]\n"
-    "ld1h { z24.h }, p1/Z, [x20, x25, LSL #1]\n"
+    "add x20, x20, #0x20\n"
+    "ld1h { z20.h }, p1/Z, [x22, x26, LSL #1]\n"
+    "ld1h { z24.h }, p1/Z, [x21, x26, LSL #1]\n"
     "bgt 2b\n"
     "3:"  // 4-vectors of channels: 4 inputs tail
     "movprfx z19, z4\n fmax z19.h, p0/M, z19.h, z3.h\n"
@@ -135,61 +135,61 @@ void sve_fp16_nhwc_max_generic_depthfirst_impl(
     "fmax z6.h, p0/M, z6.h, z17.h\n"
     "fmax z5.h, p0/M, z5.h, z16.h\n"
     "4:"  // 4-vectors of channels: After loop
-    "ands x20, %x[n_valid_cells], #0x3\n"
+    "ands x21, %x[n_valid_cells], #0x3\n"
     "beq 6f\n"
     "5:"  // 4-vectors of channels: Single input loop
-    "ldr x23, [x19], #0x8\n"
-    "ld1h { z4.h }, p4/Z, [x23, x28, LSL #1]\n"
-    "subs x20, x20, #0x1\n"
+    "ldr x24, [x20], #0x8\n"
+    "ld1h { z4.h }, p4/Z, [x24, x9, LSL #1]\n"
+    "subs x21, x21, #0x1\n"
     "fmax z8.h, p0/M, z8.h, z4.h\n"
-    "ld1h { z0.h }, p3/Z, [x23, x27, LSL #1]\n"
-    "ld1h { z29.h }, p2/Z, [x23, x26, LSL #1]\n"
+    "ld1h { z0.h }, p3/Z, [x24, x28, LSL #1]\n"
+    "ld1h { z29.h }, p2/Z, [x24, x27, LSL #1]\n"
     "fmax z7.h, p0/M, z7.h, z0.h\n"
     "fmax z6.h, p0/M, z6.h, z29.h\n"
-    "ld1h { z26.h }, p1/Z, [x23, x25, LSL #1]\n"
+    "ld1h { z26.h }, p1/Z, [x24, x26, LSL #1]\n"
     "fmax z5.h, p0/M, z5.h, z26.h\n"
     "bgt 5b\n"
     "6:"  // 4-vectors of channels: Single input loop: End
-    "st1h { z8.h }, p4, [%x[outptr], x28, LSL #1]\n"
+    "st1h { z8.h }, p4, [%x[outptr], x9, LSL #1]\n"
+    "inch x9, ALL, MUL #4\n"
+    "st1h { z7.h }, p3, [%x[outptr], x28, LSL #1]\n"
     "inch x28, ALL, MUL #4\n"
-    "st1h { z7.h }, p3, [%x[outptr], x27, LSL #1]\n"
+    "st1h { z6.h }, p2, [%x[outptr], x27, LSL #1]\n"
     "inch x27, ALL, MUL #4\n"
-    "st1h { z6.h }, p2, [%x[outptr], x26, LSL #1]\n"
+    "st1h { z5.h }, p1, [%x[outptr], x26, LSL #1]\n"
     "inch x26, ALL, MUL #4\n"
-    "st1h { z5.h }, p1, [%x[outptr], x25, LSL #1]\n"
-    "inch x25, ALL, MUL #4\n"
-    "whilelt p1.h, x25, %x[n_channels]\n"
+    "whilelt p1.h, x26, %x[n_channels]\n"
     "b.any 1b\n"
     "7:"  // Single vector of channels
-    "whilelt p4.h, x28, %x[n_channels]\n"
+    "whilelt p4.h, x9, %x[n_channels]\n"
     "b.none 14f\n"
     "8:"  // Single vector of channels: Loop
-    "lsr x24, %x[n_valid_cells], #0x2\n"
+    "lsr x25, %x[n_valid_cells], #0x2\n"
     "mov z8.h, #0xfc00\n"
-    "mov x19, %x[inptrs]\n"
-    "cbz x24, 11f\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
-    "subs x24, x24, #0x1\n"
-    "add x19, x19, #0x20\n"
-    "ld1h { z4.h }, p4/Z, [x23, x28, LSL #1]\n"
-    "ld1h { z3.h }, p4/Z, [x22, x28, LSL #1]\n"
-    "ld1h { z2.h }, p4/Z, [x21, x28, LSL #1]\n"
-    "ld1h { z1.h }, p4/Z, [x20, x28, LSL #1]\n"
+    "mov x20, %x[inptrs]\n"
+    "cbz x25, 11f\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "subs x25, x25, #0x1\n"
+    "add x20, x20, #0x20\n"
+    "ld1h { z4.h }, p4/Z, [x24, x9, LSL #1]\n"
+    "ld1h { z3.h }, p4/Z, [x23, x9, LSL #1]\n"
+    "ld1h { z2.h }, p4/Z, [x22, x9, LSL #1]\n"
+    "ld1h { z1.h }, p4/Z, [x21, x9, LSL #1]\n"
     "beq 10f\n"
     "9:"  // Single vector of channels: Loop: 4 inputs loop
     "movprfx z19, z4\n fmax z19.h, p0/M, z19.h, z3.h\n"
     "movprfx z23, z2\n fmax z23.h, p0/M, z23.h, z1.h\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
     "fmax z19.h, p0/M, z19.h, z23.h\n"
-    "subs x24, x24, #0x1\n"
-    "ld1h { z4.h }, p4/Z, [x23, x28, LSL #1]\n"
-    "ld1h { z3.h }, p4/Z, [x22, x28, LSL #1]\n"
+    "subs x25, x25, #0x1\n"
+    "ld1h { z4.h }, p4/Z, [x24, x9, LSL #1]\n"
+    "ld1h { z3.h }, p4/Z, [x23, x9, LSL #1]\n"
     "fmax z8.h, p0/M, z8.h, z19.h\n"
-    "add x19, x19, #0x20\n"
-    "ld1h { z2.h }, p4/Z, [x21, x28, LSL #1]\n"
-    "ld1h { z1.h }, p4/Z, [x20, x28, LSL #1]\n"
+    "add x20, x20, #0x20\n"
+    "ld1h { z2.h }, p4/Z, [x22, x9, LSL #1]\n"
+    "ld1h { z1.h }, p4/Z, [x21, x9, LSL #1]\n"
     "bgt 9b\n"
     "10:"  // Single vector of channels: Loop: 4 inputs tail
     "movprfx z19, z4\n fmax z19.h, p0/M, z19.h, z3.h\n"
@@ -197,23 +197,23 @@ void sve_fp16_nhwc_max_generic_depthfirst_impl(
     "fmax z19.h, p0/M, z19.h, z23.h\n"
     "fmax z8.h, p0/M, z8.h, z19.h\n"
     "11:"  // Single vector of channels: Loop: After loop
-    "ands x20, %x[n_valid_cells], #0x3\n"
+    "ands x21, %x[n_valid_cells], #0x3\n"
     "beq 13f\n"
     "12:"  // Single vector of channels: Loop: Single input loop
-    "ldr x23, [x19], #0x8\n"
-    "ld1h { z4.h }, p4/Z, [x23, x28, LSL #1]\n"
-    "subs x20, x20, #0x1\n"
+    "ldr x24, [x20], #0x8\n"
+    "ld1h { z4.h }, p4/Z, [x24, x9, LSL #1]\n"
+    "subs x21, x21, #0x1\n"
     "fmax z8.h, p0/M, z8.h, z4.h\n"
     "bgt 12b\n"
     "13:"  // Single vector of channels: Loop: Single input loop: End
-    "st1h { z8.h }, p4, [%x[outptr], x28, LSL #1]\n"
-    "inch x28\n"
-    "whilelt p4.h, x28, %x[n_channels]\n"
+    "st1h { z8.h }, p4, [%x[outptr], x9, LSL #1]\n"
+    "inch x9\n"
+    "whilelt p4.h, x9, %x[n_channels]\n"
     "b.any 8b\n"
     "14:"  // End
     :
     : [inptrs] "r" (inptrs), [n_channels] "r" (n_channels), [n_valid_cells] "r" (n_valid_cells), [outptr] "r" (outptr)
-    : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+    : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "x9", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
   );
 }
 
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst/generic.cpp
index cd765b3669..39197aa04d 100644
--- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst/generic.cpp
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst/generic.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2021-2022 Arm Limited.
+ * Copyright (c) 2021-2023 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -82,96 +82,96 @@ void sve_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst_impl(
                         pad_left, pad_top, pad_right, pad_bottom);
 
   __asm__ __volatile__(
-    "ldr x3, [%x[args], %[offsetof_n_channels]]\n"
-    "ldr x20, [%x[args], %[offsetof_outptrs]]\n"
-    "mov x4, #0x0\n"
-    "mov x19, #0x4\n"
-    "ldr x5, [%x[args], %[offsetof_inptrs]]\n"
-    "ldp x6, x7, [x20, #0x0]\n"
-    "whilelt p0.s, XZR, x19\n"
-    "whilelt p1.s, x4, x3\n"
-    "ldp x8, x17, [x20, #0x10]\n"
-    "ldp x16, x15, [x5, #0x0]\n"
-    "add x14, %x[args], %[offsetof_rescale]\n"
-    "mov x13, #0x0\n"
-    "ldp x12, x11, [x5, #0x10]\n"
-    "ldp x10, x9, [x5, #0x20]\n"
-    "ldp x28, x27, [x5, #0x30]\n"
-    "ldp x26, x25, [x5, #0x40]\n"
-    "ldp x24, x23, [x5, #0x50]\n"
-    "ldp x22, x21, [x5, #0x60]\n"
-    "ldp x20, x19, [x5, #0x70]\n"
-    "ld1w { z7.s }, p1/Z, [x9, x4, LSL #2]\n"
-    "ld1w { z6.s }, p1/Z, [x28, x4, LSL #2]\n"
-    "ld1w { z5.s }, p1/Z, [x25, x4, LSL #2]\n"
-    "ld1w { z4.s }, p1/Z, [x24, x4, LSL #2]\n"
-    "ld1w { z3.s }, p1/Z, [x15, x4, LSL #2]\n"
-    "ld1w { z2.s }, p1/Z, [x12, x4, LSL #2]\n"
-    "ld1w { z1.s }, p1/Z, [x10, x4, LSL #2]\n"
-    "ld1w { z31.s }, p1/Z, [x26, x4, LSL #2]\n"
-    "ld1w { z30.s }, p1/Z, [x27, x4, LSL #2]\n"
-    "ld1w { z29.s }, p1/Z, [x23, x4, LSL #2]\n"
-    "ld1w { z28.s }, p1/Z, [x21, x4, LSL #2]\n"
-    "ld1w { z27.s }, p1/Z, [x20, x4, LSL #2]\n"
-    "ld1w { z26.s }, p1/Z, [x16, x4, LSL #2]\n"
-    "ld1w { z25.s }, p1/Z, [x11, x4, LSL #2]\n"
-    "ld1w { z24.s }, p1/Z, [x22, x4, LSL #2]\n"
-    "ld1w { z23.s }, p1/Z, [x19, x4, LSL #2]\n"
-    "incw x4\n"
-    "whilelt p1.s, x4, x3\n"
-    "ld1rqw { z0.s }, p0/Z, [x14]\n"
+    "ldr x2, [%x[args], %[offsetof_n_channels]]\n"
+    "ldr x21, [%x[args], %[offsetof_outptrs]]\n"
+    "mov x3, #0x0\n"
+    "mov x20, #0x4\n"
+    "ldr x4, [%x[args], %[offsetof_inptrs]]\n"
+    "ldp x5, x6, [x21, #0x0]\n"
+    "whilelt p0.s, XZR, x20\n"
+    "whilelt p1.s, x3, x2\n"
+    "ldp x7, x8, [x21, #0x10]\n"
+    "ldp x17, x16, [x4, #0x0]\n"
+    "add x15, %x[args], %[offsetof_rescale]\n"
+    "mov x14, #0x0\n"
+    "ldp x13, x12, [x4, #0x10]\n"
+    "ldp x11, x10, [x4, #0x20]\n"
+    "ldp x9, x28, [x4, #0x30]\n"
+    "ldp x27, x26, [x4, #0x40]\n"
+    "ldp x25, x24, [x4, #0x50]\n"
+    "ldp x23, x22, [x4, #0x60]\n"
+    "ldp x21, x20, [x4, #0x70]\n"
+    "ld1w { z7.s }, p1/Z, [x10, x3, LSL #2]\n"
+    "ld1w { z6.s }, p1/Z, [x9, x3, LSL #2]\n"
+    "ld1w { z5.s }, p1/Z, [x26, x3, LSL #2]\n"
+    "ld1w { z4.s }, p1/Z, [x25, x3, LSL #2]\n"
+    "ld1w { z3.s }, p1/Z, [x16, x3, LSL #2]\n"
+    "ld1w { z2.s }, p1/Z, [x13, x3, LSL #2]\n"
+    "ld1w { z1.s }, p1/Z, [x11, x3, LSL #2]\n"
+    "ld1w { z31.s }, p1/Z, [x27, x3, LSL #2]\n"
+    "ld1w { z30.s }, p1/Z, [x28, x3, LSL #2]\n"
+    "ld1w { z29.s }, p1/Z, [x24, x3, LSL #2]\n"
+    "ld1w { z28.s }, p1/Z, [x22, x3, LSL #2]\n"
+    "ld1w { z27.s }, p1/Z, [x21, x3, LSL #2]\n"
+    "ld1w { z26.s }, p1/Z, [x17, x3, LSL #2]\n"
+    "ld1w { z25.s }, p1/Z, [x12, x3, LSL #2]\n"
+    "ld1w { z24.s }, p1/Z, [x23, x3, LSL #2]\n"
+    "ld1w { z23.s }, p1/Z, [x20, x3, LSL #2]\n"
+    "incw x3\n"
+    "whilelt p1.s, x3, x2\n"
+    "ld1rqw { z0.s }, p0/Z, [x15]\n"
     "b.none 2f\n"
     "1:"  // Vector: Loop
     "fadd z17.s, z7.s, z6.s\n"
     "fadd z16.s, z5.s, z4.s\n"
-    "ld1w { z7.s }, p1/Z, [x9, x4, LSL #2]\n"
-    "ld1w { z6.s }, p1/Z, [x28, x4, LSL #2]\n"
+    "ld1w { z7.s }, p1/Z, [x10, x3, LSL #2]\n"
+    "ld1w { z6.s }, p1/Z, [x9, x3, LSL #2]\n"
     "fadd z19.s, z17.s, z16.s\n"
     "fadd z18.s, z3.s, z2.s\n"
-    "ld1w { z5.s }, p1/Z, [x25, x4, LSL #2]\n"
-    "ld1w { z4.s }, p1/Z, [x24, x4, LSL #2]\n"
+    "ld1w { z5.s }, p1/Z, [x26, x3, LSL #2]\n"
+    "ld1w { z4.s }, p1/Z, [x25, x3, LSL #2]\n"
     "fadd z17.s, z1.s, z31.s\n"
     "fadd z22.s, z30.s, z29.s\n"
-    "ld1w { z3.s }, p1/Z, [x15, x4, LSL #2]\n"
-    "ld1w { z2.s }, p1/Z, [x12, x4, LSL #2]\n"
+    "ld1w { z3.s }, p1/Z, [x16, x3, LSL #2]\n"
+    "ld1w { z2.s }, p1/Z, [x13, x3, LSL #2]\n"
     "fadd z16.s, z28.s, z27.s\n"
     "fadd z21.s, z18.s, z19.s\n"
-    "ld1w { z1.s }, p1/Z, [x10, x4, LSL #2]\n"
-    "ld1w { z31.s }, p1/Z, [x26, x4, LSL #2]\n"
+    "ld1w { z1.s }, p1/Z, [x11, x3, LSL #2]\n"
+    "ld1w { z31.s }, p1/Z, [x27, x3, LSL #2]\n"
     "fadd z20.s, z16.s, z19.s\n"
     "fadd z19.s, z26.s, z17.s\n"
-    "ld1w { z30.s }, p1/Z, [x27, x4, LSL #2]\n"
-    "ld1w { z29.s }, p1/Z, [x23, x4, LSL #2]\n"
+    "ld1w { z30.s }, p1/Z, [x28, x3, LSL #2]\n"
+    "ld1w { z29.s }, p1/Z, [x24, x3, LSL #2]\n"
     "fadd z18.s, z25.s, z22.s\n"
     "fadd z17.s, z24.s, z17.s\n"
-    "ld1w { z28.s }, p1/Z, [x21, x4, LSL #2]\n"
-    "ld1w { z27.s }, p1/Z, [x20, x4, LSL #2]\n"
+    "ld1w { z28.s }, p1/Z, [x22, x3, LSL #2]\n"
+    "ld1w { z27.s }, p1/Z, [x21, x3, LSL #2]\n"
     "fadd z16.s, z23.s, z22.s\n"
-    "ld1w { z26.s }, p1/Z, [x16, x4, LSL #2]\n"
-    "ld1w { z25.s }, p1/Z, [x11, x4, LSL #2]\n"
-    "fadd z19.s, z19.s, z21.s\n"
-    "ld1w { z24.s }, p1/Z, [x22, x4, LSL #2]\n"
-    "ld1w { z23.s }, p1/Z, [x19, x4, LSL #2]\n"
-    "incw x4\n"
-    "fadd z18.s, z18.s, z21.s\n"
+    "ld1w { z26.s }, p1/Z, [x17, x3, LSL #2]\n"
+    "ld1w { z25.s }, p1/Z, [x12, x3, LSL #2]\n"
+    "fadd z19.s, z21.s, z19.s\n"
+    "ld1w { z24.s }, p1/Z, [x23, x3, LSL #2]\n"
+    "ld1w { z23.s }, p1/Z, [x20, x3, LSL #2]\n"
+    "incw x3\n"
+    "fadd z18.s, z21.s, z18.s\n"
     "fadd z17.s, z17.s, z20.s\n"
     "fadd z16.s, z16.s, z20.s\n"
-    "whilelt p0.s, x13, x3\n"
-    "whilelt p1.s, x4, x3\n"
+    "whilelt p0.s, x14, x2\n"
+    "whilelt p1.s, x3, x2\n"
     "fmul z19.s, z19.s, z0.s[0]\n"
     "fmul z18.s, z18.s, z0.s[1]\n"
-    "st1w { z19.s }, p0, [x6, x13, LSL #2]\n"
+    "st1w { z19.s }, p0, [x5, x14, LSL #2]\n"
     "fmul z17.s, z17.s, z0.s[2]\n"
     "fmul z16.s, z16.s, z0.s[3]\n"
-    "st1w { z18.s }, p0, [x7, x13, LSL #2]\n"
-    "st1w { z17.s }, p0, [x8, x13, LSL #2]\n"
-    "st1w { z16.s }, p0, [x17, x13, LSL #2]\n"
-    "incw x13\n"
+    "st1w { z18.s }, p0, [x6, x14, LSL #2]\n"
+    "st1w { z17.s }, p0, [x7, x14, LSL #2]\n"
+    "st1w { z16.s }, p0, [x8, x14, LSL #2]\n"
+    "incw x14\n"
     "b.any 1b\n"
     "2:"  // Vector: Tail
     "fadd z17.s, z7.s, z6.s\n"
     "fadd z16.s, z5.s, z4.s\n"
-    "whilelt p0.s, x13, x3\n"
+    "whilelt p0.s, x14, x2\n"
     "fadd z19.s, z17.s, z16.s\n"
     "fadd z18.s, z3.s, z2.s\n"
     "fadd z17.s, z1.s, z31.s\n"
@@ -183,21 +183,21 @@ void sve_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst_impl(
     "fadd z18.s, z25.s, z22.s\n"
     "fadd z17.s, z24.s, z17.s\n"
     "fadd z16.s, z23.s, z22.s\n"
-    "fadd z19.s, z19.s, z21.s\n"
+    "fadd z19.s, z21.s, z19.s\n"
     "fmul z19.s, z19.s, z0.s[0]\n"
-    "st1w { z19.s }, p0, [x6, x13, LSL #2]\n"
-    "fadd z18.s, z18.s, z21.s\n"
+    "st1w { z19.s }, p0, [x5, x14, LSL #2]\n"
+    "fadd z18.s, z21.s, z18.s\n"
     "fadd z17.s, z17.s, z20.s\n"
     "fmul z18.s, z18.s, z0.s[1]\n"
     "fmul z17.s, z17.s, z0.s[2]\n"
     "fadd z16.s, z16.s, z20.s\n"
     "fmul z16.s, z16.s, z0.s[3]\n"
-    "st1w { z18.s }, p0, [x7, x13, LSL #2]\n"
-    "st1w { z17.s }, p0, [x8, x13, LSL #2]\n"
-    "st1w { z16.s }, p0, [x17, x13, LSL #2]\n"
+    "st1w { z18.s }, p0, [x6, x14, LSL #2]\n"
+    "st1w { z17.s }, p0, [x7, x14, LSL #2]\n"
+    "st1w { z16.s }, p0, [x8, x14, LSL #2]\n"
     :
     : [args] "r" (&args), [offsetof_inptrs] "I" (offsetof(KernelArgs, inptrs)), [offsetof_n_channels] "I" (offsetof(KernelArgs, n_channels)), [offsetof_outptrs] "I" (offsetof(KernelArgs, outptrs)), [offsetof_rescale] "I" (offsetof(KernelArgs, rescale_vals))
-    : "cc", "memory", "p0", "p1", "x3", "x4", "x5", "x6", "x7", "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x17", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+    : "cc", "memory", "p0", "p1", "x2", "x3", "x4", "x5", "x6", "x7", "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x17", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
   );
 }
 
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp32_nhwc_avg_generic_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp32_nhwc_avg_generic_depthfirst/generic.cpp
index bb60fe8472..c1a3e5de84 100644
--- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp32_nhwc_avg_generic_depthfirst/generic.cpp
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp32_nhwc_avg_generic_depthfirst/generic.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2021-2022 Arm Limited.
+ * Copyright (c) 2021-2023 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -42,83 +42,83 @@ void sve_fp32_nhwc_avg_generic_depthfirst_impl(
   const auto rescale_value = static_cast<float>(1.0f / static_cast<float>(window_cells));
 
   __asm__ __volatile__(
-    "mov x28, #0x0\n"
-    "cntw x27\n"
-    "cntw x26, ALL, MUL #2\n"
-    "cntw x25, ALL, MUL #3\n"
+    "mov x9, #0x0\n"
+    "cntw x28\n"
+    "cntw x27, ALL, MUL #2\n"
+    "cntw x26, ALL, MUL #3\n"
     "ptrue p0.b\n"
-    "whilelt p3.s, x28, %x[n_channels]\n"
+    "whilelt p3.s, x9, %x[n_channels]\n"
     "ld1rw { z7.s }, p0/Z, [%x[rescale_ptr]]\n"
-    "whilelt p2.s, x27, %x[n_channels]\n"
-    "whilelt p1.s, x26, %x[n_channels]\n"
-    "whilelt p0.s, x25, %x[n_channels]\n"
+    "whilelt p2.s, x28, %x[n_channels]\n"
+    "whilelt p1.s, x27, %x[n_channels]\n"
+    "whilelt p0.s, x26, %x[n_channels]\n"
     "b.none 7f\n"
     "1:"  // 4-vectors of channels
-    "lsr x24, %x[n_valid_cells], #0x2\n"
+    "lsr x25, %x[n_valid_cells], #0x2\n"
     "mov z6.b, #0x0\n"
     "mov z5.b, #0x0\n"
-    "mov x19, %x[inptrs]\n"
+    "mov x20, %x[inptrs]\n"
     "mov z4.b, #0x0\n"
     "mov z3.b, #0x0\n"
-    "cbz x24, 4f\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
-    "subs x24, x24, #0x1\n"
-    "add x19, x19, #0x20\n"
-    "ld1w { z2.s }, p3/Z, [x23, x28, LSL #2]\n"
-    "ld1w { z1.s }, p3/Z, [x22, x28, LSL #2]\n"
-    "ld1w { z0.s }, p3/Z, [x21, x28, LSL #2]\n"
-    "ld1w { z31.s }, p3/Z, [x20, x28, LSL #2]\n"
-    "ld1w { z30.s }, p2/Z, [x23, x27, LSL #2]\n"
-    "ld1w { z22.s }, p2/Z, [x22, x27, LSL #2]\n"
-    "ld1w { z29.s }, p2/Z, [x21, x27, LSL #2]\n"
-    "ld1w { z28.s }, p2/Z, [x20, x27, LSL #2]\n"
-    "ld1w { z27.s }, p1/Z, [x23, x26, LSL #2]\n"
-    "ld1w { z21.s }, p1/Z, [x22, x26, LSL #2]\n"
-    "ld1w { z26.s }, p1/Z, [x21, x26, LSL #2]\n"
-    "ld1w { z17.s }, p1/Z, [x20, x26, LSL #2]\n"
-    "ld1w { z25.s }, p0/Z, [x23, x25, LSL #2]\n"
-    "ld1w { z20.s }, p0/Z, [x22, x25, LSL #2]\n"
-    "ld1w { z24.s }, p0/Z, [x21, x25, LSL #2]\n"
-    "ld1w { z16.s }, p0/Z, [x20, x25, LSL #2]\n"
+    "cbz x25, 4f\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "subs x25, x25, #0x1\n"
+    "add x20, x20, #0x20\n"
+    "ld1w { z2.s }, p3/Z, [x24, x9, LSL #2]\n"
+    "ld1w { z1.s }, p3/Z, [x23, x9, LSL #2]\n"
+    "ld1w { z0.s }, p3/Z, [x22, x9, LSL #2]\n"
+    "ld1w { z31.s }, p3/Z, [x21, x9, LSL #2]\n"
+    "ld1w { z30.s }, p2/Z, [x24, x28, LSL #2]\n"
+    "ld1w { z22.s }, p2/Z, [x23, x28, LSL #2]\n"
+    "ld1w { z29.s }, p2/Z, [x22, x28, LSL #2]\n"
+    "ld1w { z28.s }, p2/Z, [x21, x28, LSL #2]\n"
+    "ld1w { z27.s }, p1/Z, [x24, x27, LSL #2]\n"
+    "ld1w { z21.s }, p1/Z, [x23, x27, LSL #2]\n"
+    "ld1w { z26.s }, p1/Z, [x22, x27, LSL #2]\n"
+    "ld1w { z17.s }, p1/Z, [x21, x27, LSL #2]\n"
+    "ld1w { z25.s }, p0/Z, [x24, x26, LSL #2]\n"
+    "ld1w { z20.s }, p0/Z, [x23, x26, LSL #2]\n"
+    "ld1w { z24.s }, p0/Z, [x22, x26, LSL #2]\n"
+    "ld1w { z16.s }, p0/Z, [x21, x26, LSL #2]\n"
     "beq 3f\n"
     "2:"  // 4-vectors of channels: 4 inputs loop
     "fadd z23.s, z2.s, z1.s\n"
     "fadd z19.s, z0.s, z31.s\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
     "fadd z22.s, z30.s, z22.s\n"
     "fadd z18.s, z29.s, z28.s\n"
-    "subs x24, x24, #0x1\n"
-    "add x19, x19, #0x20\n"
+    "subs x25, x25, #0x1\n"
+    "add x20, x20, #0x20\n"
     "fadd z21.s, z27.s, z21.s\n"
     "fadd z17.s, z26.s, z17.s\n"
-    "ld1w { z2.s }, p3/Z, [x23, x28, LSL #2]\n"
-    "ld1w { z1.s }, p3/Z, [x22, x28, LSL #2]\n"
+    "ld1w { z2.s }, p3/Z, [x24, x9, LSL #2]\n"
+    "ld1w { z1.s }, p3/Z, [x23, x9, LSL #2]\n"
     "fadd z20.s, z25.s, z20.s\n"
     "fadd z16.s, z24.s, z16.s\n"
-    "ld1w { z0.s }, p3/Z, [x21, x28, LSL #2]\n"
-    "ld1w { z31.s }, p3/Z, [x20, x28, LSL #2]\n"
+    "ld1w { z0.s }, p3/Z, [x22, x9, LSL #2]\n"
+    "ld1w { z31.s }, p3/Z, [x21, x9, LSL #2]\n"
     "fadd z19.s, z23.s, z19.s\n"
     "fadd z18.s, z22.s, z18.s\n"
-    "ld1w { z30.s }, p2/Z, [x23, x27, LSL #2]\n"
-    "ld1w { z22.s }, p2/Z, [x22, x27, LSL #2]\n"
+    "ld1w { z30.s }, p2/Z, [x24, x28, LSL #2]\n"
+    "ld1w { z22.s }, p2/Z, [x23, x28, LSL #2]\n"
     "fadd z17.s, z21.s, z17.s\n"
     "fadd z16.s, z20.s, z16.s\n"
-    "ld1w { z29.s }, p2/Z, [x21, x27, LSL #2]\n"
-    "ld1w { z28.s }, p2/Z, [x20, x27, LSL #2]\n"
+    "ld1w { z29.s }, p2/Z, [x22, x28, LSL #2]\n"
+    "ld1w { z28.s }, p2/Z, [x21, x28, LSL #2]\n"
     "fadd z6.s, z6.s, z19.s\n"
     "fadd z5.s, z5.s, z18.s\n"
-    "ld1w { z27.s }, p1/Z, [x23, x26, LSL #2]\n"
-    "ld1w { z21.s }, p1/Z, [x22, x26, LSL #2]\n"
+    "ld1w { z27.s }, p1/Z, [x24, x27, LSL #2]\n"
+    "ld1w { z21.s }, p1/Z, [x23, x27, LSL #2]\n"
     "fadd z4.s, z4.s, z17.s\n"
     "fadd z3.s, z3.s, z16.s\n"
-    "ld1w { z26.s }, p1/Z, [x21, x26, LSL #2]\n"
-    "ld1w { z17.s }, p1/Z, [x20, x26, LSL #2]\n"
-    "ld1w { z25.s }, p0/Z, [x23, x25, LSL #2]\n"
-    "ld1w { z20.s }, p0/Z, [x22, x25, LSL #2]\n"
-    "ld1w { z24.s }, p0/Z, [x21, x25, LSL #2]\n"
-    "ld1w { z16.s }, p0/Z, [x20, x25, LSL #2]\n"
+    "ld1w { z26.s }, p1/Z, [x22, x27, LSL #2]\n"
+    "ld1w { z17.s }, p1/Z, [x21, x27, LSL #2]\n"
+    "ld1w { z25.s }, p0/Z, [x24, x26, LSL #2]\n"
+    "ld1w { z20.s }, p0/Z, [x23, x26, LSL #2]\n"
+    "ld1w { z24.s }, p0/Z, [x22, x26, LSL #2]\n"
+    "ld1w { z16.s }, p0/Z, [x21, x26, LSL #2]\n"
     "bgt 2b\n"
     "3:"  // 4-vectors of channels: 4 inputs tail
     "fadd z23.s, z2.s, z1.s\n"
@@ -138,65 +138,65 @@ void sve_fp32_nhwc_avg_generic_depthfirst_impl(
     "fadd z4.s, z4.s, z17.s\n"
     "fadd z3.s, z3.s, z16.s\n"
     "4:"  // 4-vectors of channels: After loop
-    "ands x20, %x[n_valid_cells], #0x3\n"
+    "ands x21, %x[n_valid_cells], #0x3\n"
     "beq 6f\n"
     "5:"  // 4-vectors of channels: Single input loop
-    "ldr x23, [x19], #0x8\n"
-    "ld1w { z2.s }, p3/Z, [x23, x28, LSL #2]\n"
-    "subs x20, x20, #0x1\n"
+    "ldr x24, [x20], #0x8\n"
+    "ld1w { z2.s }, p3/Z, [x24, x9, LSL #2]\n"
+    "subs x21, x21, #0x1\n"
     "fadd z6.s, z6.s, z2.s\n"
-    "ld1w { z30.s }, p2/Z, [x23, x27, LSL #2]\n"
-    "ld1w { z27.s }, p1/Z, [x23, x26, LSL #2]\n"
+    "ld1w { z30.s }, p2/Z, [x24, x28, LSL #2]\n"
+    "ld1w { z27.s }, p1/Z, [x24, x27, LSL #2]\n"
     "fadd z5.s, z5.s, z30.s\n"
     "fadd z4.s, z4.s, z27.s\n"
-    "ld1w { z25.s }, p0/Z, [x23, x25, LSL #2]\n"
+    "ld1w { z25.s }, p0/Z, [x24, x26, LSL #2]\n"
     "fadd z3.s, z3.s, z25.s\n"
     "bgt 5b\n"
     "6:"  // 4-vectors of channels: Single input loop: End
     "fmul z6.s, z6.s, z7.s\n"
     "fmul z5.s, z5.s, z7.s\n"
-    "st1w { z6.s }, p3, [%x[outptr], x28, LSL #2]\n"
+    "st1w { z6.s }, p3, [%x[outptr], x9, LSL #2]\n"
     "fmul z4.s, z4.s, z7.s\n"
     "fmul z3.s, z3.s, z7.s\n"
-    "st1w { z5.s }, p2, [%x[outptr], x27, LSL #2]\n"
-    "st1w { z4.s }, p1, [%x[outptr], x26, LSL #2]\n"
+    "st1w { z5.s }, p2, [%x[outptr], x28, LSL #2]\n"
+    "st1w { z4.s }, p1, [%x[outptr], x27, LSL #2]\n"
+    "incw x9, ALL, MUL #4\n"
     "incw x28, ALL, MUL #4\n"
-    "incw x27, ALL, MUL #4\n"
-    "st1w { z3.s }, p0, [%x[outptr], x25, LSL #2]\n"
-    "incw x25, ALL, MUL #4\n"
-    "whilelt p0.s, x25, %x[n_channels]\n"
+    "st1w { z3.s }, p0, [%x[outptr], x26, LSL #2]\n"
     "incw x26, ALL, MUL #4\n"
+    "whilelt p0.s, x26, %x[n_channels]\n"
+    "incw x27, ALL, MUL #4\n"
     "b.any 1b\n"
     "7:"  // Single vector of channels
-    "whilelt p3.s, x28, %x[n_channels]\n"
+    "whilelt p3.s, x9, %x[n_channels]\n"
     "b.none 14f\n"
     "8:"  // Single vector of channels: Loop
-    "lsr x24, %x[n_valid_cells], #0x2\n"
+    "lsr x25, %x[n_valid_cells], #0x2\n"
     "mov z6.b, #0x0\n"
-    "mov x19, %x[inptrs]\n"
-    "cbz x24, 11f\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
-    "subs x24, x24, #0x1\n"
-    "add x19, x19, #0x20\n"
-    "ld1w { z2.s }, p3/Z, [x23, x28, LSL #2]\n"
-    "ld1w { z1.s }, p3/Z, [x22, x28, LSL #2]\n"
-    "ld1w { z0.s }, p3/Z, [x21, x28, LSL #2]\n"
-    "ld1w { z31.s }, p3/Z, [x20, x28, LSL #2]\n"
+    "mov x20, %x[inptrs]\n"
+    "cbz x25, 11f\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "subs x25, x25, #0x1\n"
+    "add x20, x20, #0x20\n"
+    "ld1w { z2.s }, p3/Z, [x24, x9, LSL #2]\n"
+    "ld1w { z1.s }, p3/Z, [x23, x9, LSL #2]\n"
+    "ld1w { z0.s }, p3/Z, [x22, x9, LSL #2]\n"
+    "ld1w { z31.s }, p3/Z, [x21, x9, LSL #2]\n"
     "beq 10f\n"
     "9:"  // Single vector of channels: Loop: 4 inputs loop
     "fadd z23.s, z2.s, z1.s\n"
     "fadd z19.s, z0.s, z31.s\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
     "fadd z19.s, z23.s, z19.s\n"
-    "subs x24, x24, #0x1\n"
+    "subs x25, x25, #0x1\n"
     "fadd z6.s, z6.s, z19.s\n"
-    "add x19, x19, #0x20\n"
-    "ld1w { z2.s }, p3/Z, [x23, x28, LSL #2]\n"
-    "ld1w { z1.s }, p3/Z, [x22, x28, LSL #2]\n"
-    "ld1w { z0.s }, p3/Z, [x21, x28, LSL #2]\n"
-    "ld1w { z31.s }, p3/Z, [x20, x28, LSL #2]\n"
+    "add x20, x20, #0x20\n"
+    "ld1w { z2.s }, p3/Z, [x24, x9, LSL #2]\n"
+    "ld1w { z1.s }, p3/Z, [x23, x9, LSL #2]\n"
+    "ld1w { z0.s }, p3/Z, [x22, x9, LSL #2]\n"
+    "ld1w { z31.s }, p3/Z, [x21, x9, LSL #2]\n"
     "bgt 9b\n"
     "10:"  // Single vector of channels: Loop: 4 inputs tail
     "fadd z23.s, z2.s, z1.s\n"
@@ -204,24 +204,24 @@ void sve_fp32_nhwc_avg_generic_depthfirst_impl(
     "fadd z19.s, z23.s, z19.s\n"
     "fadd z6.s, z6.s, z19.s\n"
     "11:"  // Single vector of channels: Loop: After loop
-    "ands x20, %x[n_valid_cells], #0x3\n"
+    "ands x21, %x[n_valid_cells], #0x3\n"
     "beq 13f\n"
     "12:"  // Single vector of channels: Loop: Single input loop
-    "ldr x23, [x19], #0x8\n"
-    "ld1w { z2.s }, p3/Z, [x23, x28, LSL #2]\n"
-    "subs x20, x20, #0x1\n"
+    "ldr x24, [x20], #0x8\n"
+    "ld1w { z2.s }, p3/Z, [x24, x9, LSL #2]\n"
+    "subs x21, x21, #0x1\n"
     "fadd z6.s, z6.s, z2.s\n"
     "bgt 12b\n"
     "13:"  // Single vector of channels: Loop: Single input loop: End
     "fmul z6.s, z6.s, z7.s\n"
-    "st1w { z6.s }, p3, [%x[outptr], x28, LSL #2]\n"
-    "incw x28\n"
-    "whilelt p3.s, x28, %x[n_channels]\n"
+    "st1w { z6.s }, p3, [%x[outptr], x9, LSL #2]\n"
+    "incw x9\n"
+    "whilelt p3.s, x9, %x[n_channels]\n"
     "b.any 8b\n"
     "14:"  // End
     :
     : [inptrs] "r" (inptrs), [n_channels] "r" (n_channels), [n_valid_cells] "r" (n_valid_cells), [outptr] "r" (outptr), [rescale_ptr] "r" (&rescale_value)
-    : "cc", "memory", "p0", "p1", "p2", "p3", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+    : "cc", "memory", "p0", "p1", "p2", "p3", "x9", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
   );
 }
 
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp32_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp32_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp
index 122ee050e8..da0239cea8 100644
--- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp32_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp32_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2021-2022 Arm Limited.
+ * Copyright (c) 2021-2023 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -63,80 +63,80 @@ void sve_fp32_nhwc_max_2x2_s1_output2x2_depthfirst_impl(
                         pad_left, pad_top, pad_right, pad_bottom);
 
   __asm__ __volatile__(
-    "ldr x14, [%x[args], %[offsetof_n_channels]]\n"
-    "ldr x20, [%x[args], %[offsetof_outptrs]]\n"
-    "mov x13, #0x0\n"
-    "whilelt p2.s, x13, x14\n"
-    "ldr x19, [%x[args], %[offsetof_inptrs]]\n"
-    "ldp x12, x11, [x20, #0x0]\n"
+    "ldr x15, [%x[args], %[offsetof_n_channels]]\n"
+    "ldr x21, [%x[args], %[offsetof_outptrs]]\n"
+    "mov x14, #0x0\n"
+    "whilelt p2.s, x14, x15\n"
+    "ldr x20, [%x[args], %[offsetof_inptrs]]\n"
+    "ldp x13, x12, [x21, #0x0]\n"
     "ptrue p1.b\n"
-    "mov x10, #0x0\n"
-    "ldp x9, x28, [x20, #0x10]\n"
-    "ldp x27, x26, [x19, #0x0]\n"
-    "ldp x25, x24, [x19, #0x10]\n"
-    "ldp x23, x22, [x19, #0x20]\n"
-    "ldp x21, x20, [x19, #0x30]\n"
-    "ldr x19, [x19, #0x40]\n"
-    "ld1w { z31.s }, p2/Z, [x26, x13, LSL #2]\n"
-    "ld1w { z30.s }, p2/Z, [x23, x13, LSL #2]\n"
-    "ld1w { z29.s }, p2/Z, [x20, x13, LSL #2]\n"
-    "ld1w { z28.s }, p2/Z, [x24, x13, LSL #2]\n"
-    "ld1w { z27.s }, p2/Z, [x27, x13, LSL #2]\n"
-    "ld1w { z26.s }, p2/Z, [x22, x13, LSL #2]\n"
-    "ld1w { z25.s }, p2/Z, [x25, x13, LSL #2]\n"
-    "ld1w { z24.s }, p2/Z, [x21, x13, LSL #2]\n"
-    "ld1w { z23.s }, p2/Z, [x19, x13, LSL #2]\n"
-    "incw x13\n"
-    "whilelt p2.s, x13, x14\n"
+    "mov x11, #0x0\n"
+    "ldp x10, x9, [x21, #0x10]\n"
+    "ldp x28, x27, [x20, #0x0]\n"
+    "ldp x26, x25, [x20, #0x10]\n"
+    "ldp x24, x23, [x20, #0x20]\n"
+    "ldp x22, x21, [x20, #0x30]\n"
+    "ldr x20, [x20, #0x40]\n"
+    "ld1w { z31.s }, p2/Z, [x27, x14, LSL #2]\n"
+    "ld1w { z30.s }, p2/Z, [x24, x14, LSL #2]\n"
+    "ld1w { z29.s }, p2/Z, [x21, x14, LSL #2]\n"
+    "ld1w { z28.s }, p2/Z, [x25, x14, LSL #2]\n"
+    "ld1w { z27.s }, p2/Z, [x28, x14, LSL #2]\n"
+    "ld1w { z26.s }, p2/Z, [x26, x14, LSL #2]\n"
+    "ld1w { z25.s }, p2/Z, [x23, x14, LSL #2]\n"
+    "ld1w { z24.s }, p2/Z, [x22, x14, LSL #2]\n"
+    "ld1w { z23.s }, p2/Z, [x20, x14, LSL #2]\n"
+    "incw x14\n"
+    "whilelt p2.s, x14, x15\n"
     "b.none 2f\n"
     "1:"  // Vector: Loop
     "movprfx z22, z31\n fmax z22.s, p1/M, z22.s, z30.s\n"
     "movprfx z21, z30\n fmax z21.s, p1/M, z21.s, z29.s\n"
-    "ld1w { z31.s }, p2/Z, [x26, x13, LSL #2]\n"
-    "ld1w { z30.s }, p2/Z, [x23, x13, LSL #2]\n"
+    "ld1w { z31.s }, p2/Z, [x27, x14, LSL #2]\n"
+    "ld1w { z30.s }, p2/Z, [x24, x14, LSL #2]\n"
     "movprfx z20, z28\n fmax z20.s, p1/M, z20.s, z27.s\n"
-    "movprfx z17, z26\n fmax z17.s, p1/M, z17.s, z25.s\n"
-    "ld1w { z29.s }, p2/Z, [x20, x13, LSL #2]\n"
-    "ld1w { z27.s }, p2/Z, [x27, x13, LSL #2]\n"
-    "movprfx z19, z24\n fmax z19.s, p1/M, z19.s, z28.s\n"
-    "movprfx z18, z26\n fmax z18.s, p1/M, z18.s, z23.s\n"
-    "ld1w { z28.s }, p2/Z, [x24, x13, LSL #2]\n"
-    "ld1w { z26.s }, p2/Z, [x22, x13, LSL #2]\n"
-    "ld1w { z25.s }, p2/Z, [x25, x13, LSL #2]\n"
-    "ld1w { z24.s }, p2/Z, [x21, x13, LSL #2]\n"
-    "whilelt p0.s, x10, x14\n"
+    "movprfx z19, z26\n fmax z19.s, p1/M, z19.s, z25.s\n"
+    "ld1w { z29.s }, p2/Z, [x21, x14, LSL #2]\n"
+    "ld1w { z27.s }, p2/Z, [x28, x14, LSL #2]\n"
+    "movprfx z17, z28\n fmax z17.s, p1/M, z17.s, z24.s\n"
+    "movprfx z18, z25\n fmax z18.s, p1/M, z18.s, z23.s\n"
+    "ld1w { z28.s }, p2/Z, [x25, x14, LSL #2]\n"
+    "ld1w { z26.s }, p2/Z, [x26, x14, LSL #2]\n"
+    "ld1w { z25.s }, p2/Z, [x23, x14, LSL #2]\n"
+    "ld1w { z24.s }, p2/Z, [x22, x14, LSL #2]\n"
+    "whilelt p0.s, x11, x15\n"
     "movprfx z16, z22\n fmax z16.s, p1/M, z16.s, z20.s\n"
-    "ld1w { z23.s }, p2/Z, [x19, x13, LSL #2]\n"
-    "incw x13\n"
-    "whilelt p2.s, x13, x14\n"
-    "st1w { z16.s }, p0, [x12, x10, LSL #2]\n"
-    "movprfx z16, z17\n fmax z16.s, p1/M, z16.s, z22.s\n"
-    "movprfx z17, z21\n fmax z17.s, p1/M, z17.s, z19.s\n"
-    "st1w { z16.s }, p0, [x11, x10, LSL #2]\n"
-    "movprfx z16, z21\n fmax z16.s, p1/M, z16.s, z18.s\n"
-    "st1w { z17.s }, p0, [x9, x10, LSL #2]\n"
-    "st1w { z16.s }, p0, [x28, x10, LSL #2]\n"
-    "incw x10\n"
+    "ld1w { z23.s }, p2/Z, [x20, x14, LSL #2]\n"
+    "incw x14\n"
+    "whilelt p2.s, x14, x15\n"
+    "st1w { z16.s }, p0, [x13, x11, LSL #2]\n"
+    "movprfx z16, z19\n fmax z16.s, p1/M, z16.s, z22.s\n"
+    "fmax z17.s, p1/M, z17.s, z21.s\n"
+    "st1w { z16.s }, p0, [x12, x11, LSL #2]\n"
+    "movprfx z16, z18\n fmax z16.s, p1/M, z16.s, z21.s\n"
+    "st1w { z17.s }, p0, [x10, x11, LSL #2]\n"
+    "st1w { z16.s }, p0, [x9, x11, LSL #2]\n"
+    "incw x11\n"
     "b.any 1b\n"
     "2:"  // Vector: Tail
     "movprfx z22, z31\n fmax z22.s, p1/M, z22.s, z30.s\n"
     "movprfx z21, z30\n fmax z21.s, p1/M, z21.s, z29.s\n"
     "movprfx z20, z28\n fmax z20.s, p1/M, z20.s, z27.s\n"
-    "movprfx z17, z26\n fmax z17.s, p1/M, z17.s, z25.s\n"
-    "movprfx z19, z24\n fmax z19.s, p1/M, z19.s, z28.s\n"
-    "movprfx z18, z26\n fmax z18.s, p1/M, z18.s, z23.s\n"
-    "whilelt p0.s, x10, x14\n"
+    "movprfx z19, z26\n fmax z19.s, p1/M, z19.s, z25.s\n"
+    "movprfx z17, z28\n fmax z17.s, p1/M, z17.s, z24.s\n"
+    "movprfx z18, z25\n fmax z18.s, p1/M, z18.s, z23.s\n"
+    "whilelt p0.s, x11, x15\n"
     "movprfx z16, z22\n fmax z16.s, p1/M, z16.s, z20.s\n"
-    "st1w { z16.s }, p0, [x12, x10, LSL #2]\n"
-    "movprfx z16, z17\n fmax z16.s, p1/M, z16.s, z22.s\n"
-    "movprfx z17, z21\n fmax z17.s, p1/M, z17.s, z19.s\n"
-    "st1w { z16.s }, p0, [x11, x10, LSL #2]\n"
-    "movprfx z16, z21\n fmax z16.s, p1/M, z16.s, z18.s\n"
-    "st1w { z17.s }, p0, [x9, x10, LSL #2]\n"
-    "st1w { z16.s }, p0, [x28, x10, LSL #2]\n"
+    "st1w { z16.s }, p0, [x13, x11, LSL #2]\n"
+    "movprfx z16, z19\n fmax z16.s, p1/M, z16.s, z22.s\n"
+    "fmax z17.s, p1/M, z17.s, z21.s\n"
+    "st1w { z16.s }, p0, [x12, x11, LSL #2]\n"
+    "movprfx z16, z18\n fmax z16.s, p1/M, z16.s, z21.s\n"
+    "st1w { z17.s }, p0, [x10, x11, LSL #2]\n"
+    "st1w { z16.s }, p0, [x9, x11, LSL #2]\n"
     :
     : [args] "r" (&args), [offsetof_inptrs] "I" (offsetof(KernelArgs, inptrs)), [offsetof_n_channels] "I" (offsetof(KernelArgs, n_channels)), [offsetof_outptrs] "I" (offsetof(KernelArgs, outptrs))
-    : "cc", "memory", "p0", "p1", "p2", "x9", "x10", "x11", "x12", "x13", "x14", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+    : "cc", "memory", "p0", "p1", "p2", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
   );
 }
 
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp32_nhwc_max_generic_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp32_nhwc_max_generic_depthfirst/generic.cpp
index fefddae9e7..ddce2be62c 100644
--- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp32_nhwc_max_generic_depthfirst/generic.cpp
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp32_nhwc_max_generic_depthfirst/generic.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2021-2022 Arm Limited.
+ * Copyright (c) 2021-2023 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -40,82 +40,82 @@ void sve_fp32_nhwc_max_generic_depthfirst_impl(
 )
 {
   __asm__ __volatile__(
-    "mov x28, #0x0\n"
-    "cntw x27\n"
-    "cntw x26, ALL, MUL #2\n"
-    "cntw x25, ALL, MUL #3\n"
-    "whilelt p4.s, x28, %x[n_channels]\n"
-    "whilelt p3.s, x27, %x[n_channels]\n"
-    "whilelt p2.s, x26, %x[n_channels]\n"
-    "whilelt p1.s, x25, %x[n_channels]\n"
+    "mov x9, #0x0\n"
+    "cntw x28\n"
+    "cntw x27, ALL, MUL #2\n"
+    "cntw x26, ALL, MUL #3\n"
+    "whilelt p4.s, x9, %x[n_channels]\n"
+    "whilelt p3.s, x28, %x[n_channels]\n"
+    "whilelt p2.s, x27, %x[n_channels]\n"
+    "whilelt p1.s, x26, %x[n_channels]\n"
     "ptrue p0.b\n"
     "b.none 7f\n"
     "1:"  // 4-vectors of channels
-    "lsr x24, %x[n_valid_cells], #0x2\n"
+    "lsr x25, %x[n_valid_cells], #0x2\n"
     "mov z8.s, #0xff800000\n"
     "mov z7.s, #0xff800000\n"
-    "mov x19, %x[inptrs]\n"
+    "mov x20, %x[inptrs]\n"
     "mov z6.s, #0xff800000\n"
     "mov z5.s, #0xff800000\n"
-    "cbz x24, 4f\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
-    "subs x24, x24, #0x1\n"
-    "add x19, x19, #0x20\n"
-    "ld1w { z4.s }, p4/Z, [x23, x28, LSL #2]\n"
-    "ld1w { z3.s }, p4/Z, [x22, x28, LSL #2]\n"
-    "ld1w { z2.s }, p4/Z, [x21, x28, LSL #2]\n"
-    "ld1w { z1.s }, p4/Z, [x20, x28, LSL #2]\n"
-    "ld1w { z0.s }, p3/Z, [x23, x27, LSL #2]\n"
-    "ld1w { z31.s }, p3/Z, [x22, x27, LSL #2]\n"
-    "ld1w { z22.s }, p3/Z, [x21, x27, LSL #2]\n"
-    "ld1w { z30.s }, p3/Z, [x20, x27, LSL #2]\n"
-    "ld1w { z29.s }, p2/Z, [x23, x26, LSL #2]\n"
-    "ld1w { z28.s }, p2/Z, [x22, x26, LSL #2]\n"
-    "ld1w { z21.s }, p2/Z, [x21, x26, LSL #2]\n"
-    "ld1w { z27.s }, p2/Z, [x20, x26, LSL #2]\n"
-    "ld1w { z26.s }, p1/Z, [x23, x25, LSL #2]\n"
-    "ld1w { z25.s }, p1/Z, [x22, x25, LSL #2]\n"
-    "ld1w { z20.s }, p1/Z, [x21, x25, LSL #2]\n"
-    "ld1w { z24.s }, p1/Z, [x20, x25, LSL #2]\n"
+    "cbz x25, 4f\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "subs x25, x25, #0x1\n"
+    "add x20, x20, #0x20\n"
+    "ld1w { z4.s }, p4/Z, [x24, x9, LSL #2]\n"
+    "ld1w { z3.s }, p4/Z, [x23, x9, LSL #2]\n"
+    "ld1w { z2.s }, p4/Z, [x22, x9, LSL #2]\n"
+    "ld1w { z1.s }, p4/Z, [x21, x9, LSL #2]\n"
+    "ld1w { z0.s }, p3/Z, [x24, x28, LSL #2]\n"
+    "ld1w { z31.s }, p3/Z, [x23, x28, LSL #2]\n"
+    "ld1w { z22.s }, p3/Z, [x22, x28, LSL #2]\n"
+    "ld1w { z30.s }, p3/Z, [x21, x28, LSL #2]\n"
+    "ld1w { z29.s }, p2/Z, [x24, x27, LSL #2]\n"
+    "ld1w { z28.s }, p2/Z, [x23, x27, LSL #2]\n"
+    "ld1w { z21.s }, p2/Z, [x22, x27, LSL #2]\n"
+    "ld1w { z27.s }, p2/Z, [x21, x27, LSL #2]\n"
+    "ld1w { z26.s }, p1/Z, [x24, x26, LSL #2]\n"
+    "ld1w { z25.s }, p1/Z, [x23, x26, LSL #2]\n"
+    "ld1w { z20.s }, p1/Z, [x22, x26, LSL #2]\n"
+    "ld1w { z24.s }, p1/Z, [x21, x26, LSL #2]\n"
     "beq 3f\n"
     "2:"  // 4-vectors of channels: 4 inputs loop
     "movprfx z19, z4\n fmax z19.s, p0/M, z19.s, z3.s\n"
     "movprfx z23, z2\n fmax z23.s, p0/M, z23.s, z1.s\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
     "movprfx z18, z0\n fmax z18.s, p0/M, z18.s, z31.s\n"
     "fmax z22.s, p0/M, z22.s, z30.s\n"
-    "ld1w { z4.s }, p4/Z, [x23, x28, LSL #2]\n"
-    "ld1w { z3.s }, p4/Z, [x22, x28, LSL #2]\n"
+    "ld1w { z4.s }, p4/Z, [x24, x9, LSL #2]\n"
+    "ld1w { z3.s }, p4/Z, [x23, x9, LSL #2]\n"
     "movprfx z17, z29\n fmax z17.s, p0/M, z17.s, z28.s\n"
     "fmax z21.s, p0/M, z21.s, z27.s\n"
-    "ld1w { z2.s }, p4/Z, [x21, x28, LSL #2]\n"
-    "ld1w { z1.s }, p4/Z, [x20, x28, LSL #2]\n"
+    "ld1w { z2.s }, p4/Z, [x22, x9, LSL #2]\n"
+    "ld1w { z1.s }, p4/Z, [x21, x9, LSL #2]\n"
     "movprfx z16, z26\n fmax z16.s, p0/M, z16.s, z25.s\n"
     "fmax z20.s, p0/M, z20.s, z24.s\n"
-    "ld1w { z0.s }, p3/Z, [x23, x27, LSL #2]\n"
-    "ld1w { z31.s }, p3/Z, [x22, x27, LSL #2]\n"
+    "ld1w { z0.s }, p3/Z, [x24, x28, LSL #2]\n"
+    "ld1w { z31.s }, p3/Z, [x23, x28, LSL #2]\n"
     "fmax z19.s, p0/M, z19.s, z23.s\n"
     "fmax z18.s, p0/M, z18.s, z22.s\n"
-    "ld1w { z22.s }, p3/Z, [x21, x27, LSL #2]\n"
-    "ld1w { z30.s }, p3/Z, [x20, x27, LSL #2]\n"
+    "ld1w { z22.s }, p3/Z, [x22, x28, LSL #2]\n"
+    "ld1w { z30.s }, p3/Z, [x21, x28, LSL #2]\n"
     "fmax z17.s, p0/M, z17.s, z21.s\n"
     "fmax z16.s, p0/M, z16.s, z20.s\n"
-    "ld1w { z29.s }, p2/Z, [x23, x26, LSL #2]\n"
-    "ld1w { z28.s }, p2/Z, [x22, x26, LSL #2]\n"
-    "subs x24, x24, #0x1\n"
+    "ld1w { z29.s }, p2/Z, [x24, x27, LSL #2]\n"
+    "ld1w { z28.s }, p2/Z, [x23, x27, LSL #2]\n"
+    "subs x25, x25, #0x1\n"
     "fmax z8.s, p0/M, z8.s, z19.s\n"
-    "ld1w { z21.s }, p2/Z, [x21, x26, LSL #2]\n"
-    "ld1w { z27.s }, p2/Z, [x20, x26, LSL #2]\n"
+    "ld1w { z21.s }, p2/Z, [x22, x27, LSL #2]\n"
+    "ld1w { z27.s }, p2/Z, [x21, x27, LSL #2]\n"
     "fmax z7.s, p0/M, z7.s, z18.s\n"
     "fmax z6.s, p0/M, z6.s, z17.s\n"
-    "ld1w { z26.s }, p1/Z, [x23, x25, LSL #2]\n"
-    "ld1w { z25.s }, p1/Z, [x22, x25, LSL #2]\n"
+    "ld1w { z26.s }, p1/Z, [x24, x26, LSL #2]\n"
+    "ld1w { z25.s }, p1/Z, [x23, x26, LSL #2]\n"
     "fmax z5.s, p0/M, z5.s, z16.s\n"
-    "add x19, x19, #0x20\n"
-    "ld1w { z20.s }, p1/Z, [x21, x25, LSL #2]\n"
-    "ld1w { z24.s }, p1/Z, [x20, x25, LSL #2]\n"
+    "add x20, x20, #0x20\n"
+    "ld1w { z20.s }, p1/Z, [x22, x26, LSL #2]\n"
+    "ld1w { z24.s }, p1/Z, [x21, x26, LSL #2]\n"
     "bgt 2b\n"
     "3:"  // 4-vectors of channels: 4 inputs tail
     "movprfx z19, z4\n fmax z19.s, p0/M, z19.s, z3.s\n"
@@ -135,61 +135,61 @@ void sve_fp32_nhwc_max_generic_depthfirst_impl(
     "fmax z6.s, p0/M, z6.s, z17.s\n"
     "fmax z5.s, p0/M, z5.s, z16.s\n"
     "4:"  // 4-vectors of channels: After loop
-    "ands x20, %x[n_valid_cells], #0x3\n"
+    "ands x21, %x[n_valid_cells], #0x3\n"
     "beq 6f\n"
     "5:"  // 4-vectors of channels: Single input loop
-    "ldr x23, [x19], #0x8\n"
-    "ld1w { z4.s }, p4/Z, [x23, x28, LSL #2]\n"
-    "subs x20, x20, #0x1\n"
+    "ldr x24, [x20], #0x8\n"
+    "ld1w { z4.s }, p4/Z, [x24, x9, LSL #2]\n"
+    "subs x21, x21, #0x1\n"
     "fmax z8.s, p0/M, z8.s, z4.s\n"
-    "ld1w { z0.s }, p3/Z, [x23, x27, LSL #2]\n"
-    "ld1w { z29.s }, p2/Z, [x23, x26, LSL #2]\n"
+    "ld1w { z0.s }, p3/Z, [x24, x28, LSL #2]\n"
+    "ld1w { z29.s }, p2/Z, [x24, x27, LSL #2]\n"
     "fmax z7.s, p0/M, z7.s, z0.s\n"
     "fmax z6.s, p0/M, z6.s, z29.s\n"
-    "ld1w { z26.s }, p1/Z, [x23, x25, LSL #2]\n"
+    "ld1w { z26.s }, p1/Z, [x24, x26, LSL #2]\n"
     "fmax z5.s, p0/M, z5.s, z26.s\n"
     "bgt 5b\n"
     "6:"  // 4-vectors of channels: Single input loop: End
-    "st1w { z8.s }, p4, [%x[outptr], x28, LSL #2]\n"
+    "st1w { z8.s }, p4, [%x[outptr], x9, LSL #2]\n"
+    "incw x9, ALL, MUL #4\n"
+    "st1w { z7.s }, p3, [%x[outptr], x28, LSL #2]\n"
     "incw x28, ALL, MUL #4\n"
-    "st1w { z7.s }, p3, [%x[outptr], x27, LSL #2]\n"
+    "st1w { z6.s }, p2, [%x[outptr], x27, LSL #2]\n"
     "incw x27, ALL, MUL #4\n"
-    "st1w { z6.s }, p2, [%x[outptr], x26, LSL #2]\n"
+    "st1w { z5.s }, p1, [%x[outptr], x26, LSL #2]\n"
     "incw x26, ALL, MUL #4\n"
-    "st1w { z5.s }, p1, [%x[outptr], x25, LSL #2]\n"
-    "incw x25, ALL, MUL #4\n"
-    "whilelt p1.s, x25, %x[n_channels]\n"
+    "whilelt p1.s, x26, %x[n_channels]\n"
     "b.any 1b\n"
     "7:"  // Single vector of channels
-    "whilelt p4.s, x28, %x[n_channels]\n"
+    "whilelt p4.s, x9, %x[n_channels]\n"
     "b.none 14f\n"
     "8:"  // Single vector of channels: Loop
-    "lsr x24, %x[n_valid_cells], #0x2\n"
+    "lsr x25, %x[n_valid_cells], #0x2\n"
     "mov z8.s, #0xff800000\n"
-    "mov x19, %x[inptrs]\n"
-    "cbz x24, 11f\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
-    "subs x24, x24, #0x1\n"
-    "add x19, x19, #0x20\n"
-    "ld1w { z4.s }, p4/Z, [x23, x28, LSL #2]\n"
-    "ld1w { z3.s }, p4/Z, [x22, x28, LSL #2]\n"
-    "ld1w { z2.s }, p4/Z, [x21, x28, LSL #2]\n"
-    "ld1w { z1.s }, p4/Z, [x20, x28, LSL #2]\n"
+    "mov x20, %x[inptrs]\n"
+    "cbz x25, 11f\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "subs x25, x25, #0x1\n"
+    "add x20, x20, #0x20\n"
+    "ld1w { z4.s }, p4/Z, [x24, x9, LSL #2]\n"
+    "ld1w { z3.s }, p4/Z, [x23, x9, LSL #2]\n"
+    "ld1w { z2.s }, p4/Z, [x22, x9, LSL #2]\n"
+    "ld1w { z1.s }, p4/Z, [x21, x9, LSL #2]\n"
     "beq 10f\n"
     "9:"  // Single vector of channels: Loop: 4 inputs loop
     "movprfx z19, z4\n fmax z19.s, p0/M, z19.s, z3.s\n"
     "movprfx z23, z2\n fmax z23.s, p0/M, z23.s, z1.s\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
     "fmax z19.s, p0/M, z19.s, z23.s\n"
-    "subs x24, x24, #0x1\n"
-    "ld1w { z4.s }, p4/Z, [x23, x28, LSL #2]\n"
-    "ld1w { z3.s }, p4/Z, [x22, x28, LSL #2]\n"
+    "subs x25, x25, #0x1\n"
+    "ld1w { z4.s }, p4/Z, [x24, x9, LSL #2]\n"
+    "ld1w { z3.s }, p4/Z, [x23, x9, LSL #2]\n"
     "fmax z8.s, p0/M, z8.s, z19.s\n"
-    "add x19, x19, #0x20\n"
-    "ld1w { z2.s }, p4/Z, [x21, x28, LSL #2]\n"
-    "ld1w { z1.s }, p4/Z, [x20, x28, LSL #2]\n"
+    "add x20, x20, #0x20\n"
+    "ld1w { z2.s }, p4/Z, [x22, x9, LSL #2]\n"
+    "ld1w { z1.s }, p4/Z, [x21, x9, LSL #2]\n"
     "bgt 9b\n"
     "10:"  // Single vector of channels: Loop: 4 inputs tail
     "movprfx z19, z4\n fmax z19.s, p0/M, z19.s, z3.s\n"
@@ -197,23 +197,23 @@ void sve_fp32_nhwc_max_generic_depthfirst_impl(
     "fmax z19.s, p0/M, z19.s, z23.s\n"
     "fmax z8.s, p0/M, z8.s, z19.s\n"
     "11:"  // Single vector of channels: Loop: After loop
-    "ands x20, %x[n_valid_cells], #0x3\n"
+    "ands x21, %x[n_valid_cells], #0x3\n"
     "beq 13f\n"
     "12:"  // Single vector of channels: Loop: Single input loop
-    "ldr x23, [x19], #0x8\n"
-    "ld1w { z4.s }, p4/Z, [x23, x28, LSL #2]\n"
-    "subs x20, x20, #0x1\n"
+    "ldr x24, [x20], #0x8\n"
+    "ld1w { z4.s }, p4/Z, [x24, x9, LSL #2]\n"
+    "subs x21, x21, #0x1\n"
     "fmax z8.s, p0/M, z8.s, z4.s\n"
     "bgt 12b\n"
     "13:"  // Single vector of channels: Loop: Single input loop: End
-    "st1w { z8.s }, p4, [%x[outptr], x28, LSL #2]\n"
-    "incw x28\n"
-    "whilelt p4.s, x28, %x[n_channels]\n"
+    "st1w { z8.s }, p4, [%x[outptr], x9, LSL #2]\n"
+    "incw x9\n"
+    "whilelt p4.s, x9, %x[n_channels]\n"
     "b.any 8b\n"
     "14:"  // End
     :
     : [inptrs] "r" (inptrs), [n_channels] "r" (n_channels), [n_valid_cells] "r" (n_valid_cells), [outptr] "r" (outptr)
-    : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+    : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "x9", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
   );
 }
 
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_s8_nhwc_avg_generic_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_s8_nhwc_avg_generic_depthfirst/generic.cpp
index dab142f3f4..68bd831d63 100644
--- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_s8_nhwc_avg_generic_depthfirst/generic.cpp
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_s8_nhwc_avg_generic_depthfirst/generic.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2021-2022 Arm Limited.
+ * Copyright (c) 2021-2023 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -95,21 +95,21 @@ void sve_s8_nhwc_avg_generic_depthfirst_impl(
   }
 
   __asm__ __volatile__(
-    "mov x26, #0x0\n"
-    "cntb x25\n"
-    "cntb x24, ALL, MUL #2\n"
-    "cntb x23, ALL, MUL #3\n"
-    "whilelt p4.b, x26, %x[n_channels]\n"
-    "whilelt p3.b, x25, %x[n_channels]\n"
-    "whilelt p2.b, x24, %x[n_channels]\n"
-    "whilelt p1.b, x23, %x[n_channels]\n"
+    "mov x27, #0x0\n"
+    "cntb x26\n"
+    "cntb x25, ALL, MUL #2\n"
+    "cntb x24, ALL, MUL #3\n"
+    "whilelt p4.b, x27, %x[n_channels]\n"
+    "whilelt p3.b, x26, %x[n_channels]\n"
+    "whilelt p2.b, x25, %x[n_channels]\n"
+    "whilelt p1.b, x24, %x[n_channels]\n"
     "ptrue p0.b\n"
     "b.none 7f\n"
     "1:"  // 4-vectors of channels
-    "lsr x22, %x[n_valid_cells], #0x1\n"
+    "lsr x23, %x[n_valid_cells], #0x1\n"
     "mov z15.s, #0x0\n"
     "mov z14.s, #0x0\n"
-    "mov x19, %x[inptrs]\n"
+    "mov x20, %x[inptrs]\n"
     "mov z13.s, #0x0\n"
     "mov z12.s, #0x0\n"
     "mov z11.s, #0x0\n"
@@ -124,43 +124,43 @@ void sve_s8_nhwc_avg_generic_depthfirst_impl(
     "mov z2.s, #0x0\n"
     "mov z1.s, #0x0\n"
     "mov z0.s, #0x0\n"
-    "cbz x22, 4f\n"
-    "ldp x21, x20, [x19, #0x0]\n"
-    "subs x22, x22, #0x1\n"
-    "add x19, x19, #0x10\n"
-    "ld1b { z31.b }, p4/Z, [x21, x26]\n"
-    "ld1b { z30.b }, p4/Z, [x20, x26]\n"
-    "ld1b { z29.b }, p3/Z, [x21, x25]\n"
-    "ld1b { z28.b }, p3/Z, [x20, x25]\n"
-    "ld1b { z27.b }, p2/Z, [x21, x24]\n"
-    "ld1b { z26.b }, p2/Z, [x20, x24]\n"
-    "ld1b { z25.b }, p1/Z, [x21, x23]\n"
-    "ld1b { z24.b }, p1/Z, [x20, x23]\n"
+    "cbz x23, 4f\n"
+    "ldp x22, x21, [x20, #0x0]\n"
+    "subs x23, x23, #0x1\n"
+    "add x20, x20, #0x10\n"
+    "ld1b { z31.b }, p4/Z, [x22, x27]\n"
+    "ld1b { z30.b }, p4/Z, [x21, x27]\n"
+    "ld1b { z29.b }, p3/Z, [x22, x26]\n"
+    "ld1b { z28.b }, p3/Z, [x21, x26]\n"
+    "ld1b { z27.b }, p2/Z, [x22, x25]\n"
+    "ld1b { z26.b }, p2/Z, [x21, x25]\n"
+    "ld1b { z25.b }, p1/Z, [x22, x24]\n"
+    "ld1b { z24.b }, p1/Z, [x21, x24]\n"
     "beq 3f\n"
     "2:"  // 4-vectors of channels: 2 inputs loop
     ".inst 0x455e03f7  // saddlb z23.h, z31.b, z30.b\n"
     ".inst 0x455e07f6  // saddlt z22.h, z31.b, z30.b\n"
-    "ldp x21, x20, [x19, #0x0]\n"
-    "subs x22, x22, #0x1\n"
+    "ldp x22, x21, [x20, #0x0]\n"
+    "subs x23, x23, #0x1\n"
     ".inst 0x455c03b5  // saddlb z21.h, z29.b, z28.b\n"
     ".inst 0x455c07b4  // saddlt z20.h, z29.b, z28.b\n"
-    "add x19, x19, #0x10\n"
-    "ld1b { z31.b }, p4/Z, [x21, x26]\n"
+    "add x20, x20, #0x10\n"
+    "ld1b { z31.b }, p4/Z, [x22, x27]\n"
     ".inst 0x455a0373  // saddlb z19.h, z27.b, z26.b\n"
     ".inst 0x455a0772  // saddlt z18.h, z27.b, z26.b\n"
-    "ld1b { z30.b }, p4/Z, [x20, x26]\n"
-    "ld1b { z29.b }, p3/Z, [x21, x25]\n"
+    "ld1b { z30.b }, p4/Z, [x21, x27]\n"
+    "ld1b { z29.b }, p3/Z, [x22, x26]\n"
     ".inst 0x45580331  // saddlb z17.h, z25.b, z24.b\n"
     ".inst 0x45580730  // saddlt z16.h, z25.b, z24.b\n"
-    "ld1b { z28.b }, p3/Z, [x20, x25]\n"
-    "ld1b { z27.b }, p2/Z, [x21, x24]\n"
+    "ld1b { z28.b }, p3/Z, [x21, x26]\n"
+    "ld1b { z27.b }, p2/Z, [x22, x25]\n"
     ".inst 0x459741ef  // saddwb z15.s, z15.s, z23.h\n"
     ".inst 0x459745ce  // saddwt z14.s, z14.s, z23.h\n"
-    "ld1b { z26.b }, p2/Z, [x20, x24]\n"
-    "ld1b { z25.b }, p1/Z, [x21, x23]\n"
+    "ld1b { z26.b }, p2/Z, [x21, x25]\n"
+    "ld1b { z25.b }, p1/Z, [x22, x24]\n"
     ".inst 0x459641ad  // saddwb z13.s, z13.s, z22.h\n"
     ".inst 0x4596458c  // saddwt z12.s, z12.s, z22.h\n"
-    "ld1b { z24.b }, p1/Z, [x20, x23]\n"
+    "ld1b { z24.b }, p1/Z, [x21, x24]\n"
     ".inst 0x4595416b  // saddwb z11.s, z11.s, z21.h\n"
     ".inst 0x4595454a  // saddwt z10.s, z10.s, z21.h\n"
     ".inst 0x45944129  // saddwb z9.s, z9.s, z20.h\n"
@@ -200,21 +200,21 @@ void sve_s8_nhwc_avg_generic_depthfirst_impl(
     ".inst 0x45904021  // saddwb z1.s, z1.s, z16.h\n"
     ".inst 0x45904400  // saddwt z0.s, z0.s, z16.h\n"
     "4:"  // 4-vectors of channels: After loop
-    "ands x20, %x[n_valid_cells], #0x1\n"
+    "ands x21, %x[n_valid_cells], #0x1\n"
     "beq 6f\n"
     "5:"  // 4-vectors of channels: Single input loop
-    "ldr x21, [x19], #0x8\n"
-    "ld1b { z31.b }, p4/Z, [x21, x26]\n"
+    "ldr x22, [x20], #0x8\n"
+    "ld1b { z31.b }, p4/Z, [x22, x27]\n"
     ".inst 0x4508a3f7  // sshllb z23.h, z31.b, #0x0\n"
     ".inst 0x4508a7f6  // sshllt z22.h, z31.b, #0x0\n"
-    "ld1b { z29.b }, p3/Z, [x21, x25]\n"
-    "ld1b { z27.b }, p2/Z, [x21, x24]\n"
+    "ld1b { z29.b }, p3/Z, [x22, x26]\n"
+    "ld1b { z27.b }, p2/Z, [x22, x25]\n"
     ".inst 0x4508a3b5  // sshllb z21.h, z29.b, #0x0\n"
     ".inst 0x4508a7b4  // sshllt z20.h, z29.b, #0x0\n"
-    "ld1b { z25.b }, p1/Z, [x21, x23]\n"
+    "ld1b { z25.b }, p1/Z, [x22, x24]\n"
     ".inst 0x4508a373  // sshllb z19.h, z27.b, #0x0\n"
     ".inst 0x4508a772  // sshllt z18.h, z27.b, #0x0\n"
-    "subs x20, x20, #0x1\n"
+    "subs x21, x21, #0x1\n"
     ".inst 0x4508a331  // sshllb z17.h, z25.b, #0x0\n"
     ".inst 0x4508a730  // sshllt z16.h, z25.b, #0x0\n"
     ".inst 0x459741ef  // saddwb z15.s, z15.s, z23.h\n"
@@ -298,7 +298,7 @@ void sve_s8_nhwc_avg_generic_depthfirst_impl(
     "smin z10.s, p0/M, z10.s, z18.s\n"
     "smin z9.s, p0/M, z9.s, z18.s\n"
     "trn1 z17.h, z11.h, z10.h\n"
-    "st1b { z16.b }, p4, [%x[outptr], x26]\n"
+    "st1b { z16.b }, p4, [%x[outptr], x27]\n"
     "smin z8.s, p0/M, z8.s, z18.s\n"
     "smin z7.s, p0/M, z7.s, z18.s\n"
     "trn1 z16.h, z9.h, z8.h\n"
@@ -306,7 +306,7 @@ void sve_s8_nhwc_avg_generic_depthfirst_impl(
     "smin z6.s, p0/M, z6.s, z18.s\n"
     "smin z5.s, p0/M, z5.s, z18.s\n"
     "trn1 z17.h, z7.h, z6.h\n"
-    "st1b { z16.b }, p3, [%x[outptr], x25]\n"
+    "st1b { z16.b }, p3, [%x[outptr], x26]\n"
     "smin z4.s, p0/M, z4.s, z18.s\n"
     "smin z3.s, p0/M, z3.s, z18.s\n"
     "trn1 z16.h, z5.h, z4.h\n"
@@ -314,46 +314,46 @@ void sve_s8_nhwc_avg_generic_depthfirst_impl(
     "smin z2.s, p0/M, z2.s, z18.s\n"
     "smin z1.s, p0/M, z1.s, z18.s\n"
     "trn1 z17.h, z3.h, z2.h\n"
-    "st1b { z16.b }, p2, [%x[outptr], x24]\n"
+    "st1b { z16.b }, p2, [%x[outptr], x25]\n"
     "smin z0.s, p0/M, z0.s, z18.s\n"
     "trn1 z16.h, z1.h, z0.h\n"
     "trn1 z16.b, z17.b, z16.b\n"
-    "st1b { z16.b }, p1, [%x[outptr], x23]\n"
-    "incb x23, ALL, MUL #4\n"
-    "whilelt p1.b, x23, %x[n_channels]\n"
+    "st1b { z16.b }, p1, [%x[outptr], x24]\n"
+    "incb x24, ALL, MUL #4\n"
+    "whilelt p1.b, x24, %x[n_channels]\n"
+    "incb x27, ALL, MUL #4\n"
     "incb x26, ALL, MUL #4\n"
     "incb x25, ALL, MUL #4\n"
-    "incb x24, ALL, MUL #4\n"
     "b.any 1b\n"
     "7:"  // Single vector of channels
-    "whilelt p4.b, x26, %x[n_channels]\n"
+    "whilelt p4.b, x27, %x[n_channels]\n"
     "b.none 14f\n"
     "8:"  // Single vector of channels: Loop
-    "lsr x22, %x[n_valid_cells], #0x1\n"
+    "lsr x23, %x[n_valid_cells], #0x1\n"
     "mov z15.s, #0x0\n"
     "mov z14.s, #0x0\n"
-    "mov x19, %x[inptrs]\n"
+    "mov x20, %x[inptrs]\n"
     "mov z13.s, #0x0\n"
     "mov z12.s, #0x0\n"
-    "cbz x22, 11f\n"
-    "ldp x21, x20, [x19, #0x0]\n"
-    "subs x22, x22, #0x1\n"
-    "add x19, x19, #0x10\n"
-    "ld1b { z31.b }, p4/Z, [x21, x26]\n"
-    "ld1b { z30.b }, p4/Z, [x20, x26]\n"
+    "cbz x23, 11f\n"
+    "ldp x22, x21, [x20, #0x0]\n"
+    "subs x23, x23, #0x1\n"
+    "add x20, x20, #0x10\n"
+    "ld1b { z31.b }, p4/Z, [x22, x27]\n"
+    "ld1b { z30.b }, p4/Z, [x21, x27]\n"
     "beq 10f\n"
     "9:"  // Single vector of channels: Loop: 2 inputs loop
     ".inst 0x455e03f7  // saddlb z23.h, z31.b, z30.b\n"
     ".inst 0x455e07f6  // saddlt z22.h, z31.b, z30.b\n"
-    "ldp x21, x20, [x19, #0x0]\n"
-    "subs x22, x22, #0x1\n"
+    "ldp x22, x21, [x20, #0x0]\n"
+    "subs x23, x23, #0x1\n"
     ".inst 0x459741ef  // saddwb z15.s, z15.s, z23.h\n"
     ".inst 0x459745ce  // saddwt z14.s, z14.s, z23.h\n"
-    "add x19, x19, #0x10\n"
-    "ld1b { z31.b }, p4/Z, [x21, x26]\n"
+    "add x20, x20, #0x10\n"
+    "ld1b { z31.b }, p4/Z, [x22, x27]\n"
     ".inst 0x459641ad  // saddwb z13.s, z13.s, z22.h\n"
     ".inst 0x4596458c  // saddwt z12.s, z12.s, z22.h\n"
-    "ld1b { z30.b }, p4/Z, [x20, x26]\n"
+    "ld1b { z30.b }, p4/Z, [x21, x27]\n"
     "bgt 9b\n"
     "10:"  // Single vector of channels: Loop: 2 inputs tail
     ".inst 0x455e03f7  // saddlb z23.h, z31.b, z30.b\n"
@@ -363,14 +363,14 @@ void sve_s8_nhwc_avg_generic_depthfirst_impl(
     ".inst 0x459641ad  // saddwb z13.s, z13.s, z22.h\n"
     ".inst 0x4596458c  // saddwt z12.s, z12.s, z22.h\n"
     "11:"  // Single vector of channels: Loop: After loop
-    "ands x20, %x[n_valid_cells], #0x1\n"
+    "ands x21, %x[n_valid_cells], #0x1\n"
     "beq 13f\n"
     "12:"  // Single vector of channels: Loop: Single input loop
-    "ldr x21, [x19], #0x8\n"
-    "ld1b { z31.b }, p4/Z, [x21, x26]\n"
+    "ldr x22, [x20], #0x8\n"
+    "ld1b { z31.b }, p4/Z, [x22, x27]\n"
     ".inst 0x4508a3f7  // sshllb z23.h, z31.b, #0x0\n"
     ".inst 0x4508a7f6  // sshllt z22.h, z31.b, #0x0\n"
-    "subs x20, x20, #0x1\n"
+    "subs x21, x21, #0x1\n"
     ".inst 0x459741ef  // saddwb z15.s, z15.s, z23.h\n"
     ".inst 0x459745ce  // saddwt z14.s, z14.s, z23.h\n"
     ".inst 0x459641ad  // saddwb z13.s, z13.s, z22.h\n"
@@ -400,14 +400,14 @@ void sve_s8_nhwc_avg_generic_depthfirst_impl(
     "smin z12.s, p0/M, z12.s, z18.s\n"
     "trn1 z16.h, z13.h, z12.h\n"
     "trn1 z16.b, z17.b, z16.b\n"
-    "st1b { z16.b }, p4, [%x[outptr], x26]\n"
-    "incb x26\n"
-    "whilelt p4.b, x26, %x[n_channels]\n"
+    "st1b { z16.b }, p4, [%x[outptr], x27]\n"
+    "incb x27\n"
+    "whilelt p4.b, x27, %x[n_channels]\n"
     "b.any 8b\n"
     "14:"  // End
     :
     : [inptrs] "r" (inptrs), [n_channels] "r" (n_channels), [n_valid_cells] "r" (n_valid_cells), [outptr] "r" (outptr), [rescale_ptr] "r" (&rescale_value), [shift_ptr] "r" (&shift_value)
-    : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+    : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
   );
 }
 
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_s8_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_s8_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp
index 0cf37743d9..96e20c752e 100644
--- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_s8_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_s8_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2021-2022 Arm Limited.
+ * Copyright (c) 2021-2023 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -63,80 +63,80 @@ void sve_s8_nhwc_max_2x2_s1_output2x2_depthfirst_impl(
                         pad_left, pad_top, pad_right, pad_bottom);
 
   __asm__ __volatile__(
-    "ldr x14, [%x[args], %[offsetof_n_channels]]\n"
-    "ldr x20, [%x[args], %[offsetof_outptrs]]\n"
-    "mov x13, #0x0\n"
-    "whilelt p2.b, x13, x14\n"
-    "ldr x19, [%x[args], %[offsetof_inptrs]]\n"
-    "ldp x12, x11, [x20, #0x0]\n"
+    "ldr x15, [%x[args], %[offsetof_n_channels]]\n"
+    "ldr x21, [%x[args], %[offsetof_outptrs]]\n"
+    "mov x14, #0x0\n"
+    "whilelt p2.b, x14, x15\n"
+    "ldr x20, [%x[args], %[offsetof_inptrs]]\n"
+    "ldp x13, x12, [x21, #0x0]\n"
     "ptrue p1.b\n"
-    "mov x10, #0x0\n"
-    "ldp x9, x28, [x20, #0x10]\n"
-    "ldp x27, x26, [x19, #0x0]\n"
-    "ldp x25, x24, [x19, #0x10]\n"
-    "ldp x23, x22, [x19, #0x20]\n"
-    "ldp x21, x20, [x19, #0x30]\n"
-    "ldr x19, [x19, #0x40]\n"
-    "ld1b { z31.b }, p2/Z, [x26, x13]\n"
-    "ld1b { z30.b }, p2/Z, [x23, x13]\n"
-    "ld1b { z29.b }, p2/Z, [x20, x13]\n"
-    "ld1b { z28.b }, p2/Z, [x24, x13]\n"
-    "ld1b { z27.b }, p2/Z, [x27, x13]\n"
-    "ld1b { z26.b }, p2/Z, [x22, x13]\n"
-    "ld1b { z25.b }, p2/Z, [x25, x13]\n"
-    "ld1b { z24.b }, p2/Z, [x21, x13]\n"
-    "ld1b { z23.b }, p2/Z, [x19, x13]\n"
-    "incw x13\n"
-    "whilelt p2.b, x13, x14\n"
+    "mov x11, #0x0\n"
+    "ldp x10, x9, [x21, #0x10]\n"
+    "ldp x28, x27, [x20, #0x0]\n"
+    "ldp x26, x25, [x20, #0x10]\n"
+    "ldp x24, x23, [x20, #0x20]\n"
+    "ldp x22, x21, [x20, #0x30]\n"
+    "ldr x20, [x20, #0x40]\n"
+    "ld1b { z31.b }, p2/Z, [x27, x14]\n"
+    "ld1b { z30.b }, p2/Z, [x24, x14]\n"
+    "ld1b { z29.b }, p2/Z, [x21, x14]\n"
+    "ld1b { z28.b }, p2/Z, [x25, x14]\n"
+    "ld1b { z27.b }, p2/Z, [x28, x14]\n"
+    "ld1b { z26.b }, p2/Z, [x26, x14]\n"
+    "ld1b { z25.b }, p2/Z, [x23, x14]\n"
+    "ld1b { z24.b }, p2/Z, [x22, x14]\n"
+    "ld1b { z23.b }, p2/Z, [x20, x14]\n"
+    "incw x14\n"
+    "whilelt p2.b, x14, x15\n"
     "b.none 2f\n"
     "1:"  // Vector: Loop
     "movprfx z22, z31\n smax z22.b, p1/M, z22.b, z30.b\n"
     "movprfx z21, z30\n smax z21.b, p1/M, z21.b, z29.b\n"
-    "ld1b { z31.b }, p2/Z, [x26, x13]\n"
-    "ld1b { z30.b }, p2/Z, [x23, x13]\n"
+    "ld1b { z31.b }, p2/Z, [x27, x14]\n"
+    "ld1b { z30.b }, p2/Z, [x24, x14]\n"
     "movprfx z20, z28\n smax z20.b, p1/M, z20.b, z27.b\n"
-    "movprfx z17, z26\n smax z17.b, p1/M, z17.b, z25.b\n"
-    "ld1b { z29.b }, p2/Z, [x20, x13]\n"
-    "ld1b { z27.b }, p2/Z, [x27, x13]\n"
-    "movprfx z19, z24\n smax z19.b, p1/M, z19.b, z28.b\n"
-    "movprfx z18, z26\n smax z18.b, p1/M, z18.b, z23.b\n"
-    "ld1b { z28.b }, p2/Z, [x24, x13]\n"
-    "ld1b { z26.b }, p2/Z, [x22, x13]\n"
-    "ld1b { z25.b }, p2/Z, [x25, x13]\n"
-    "ld1b { z24.b }, p2/Z, [x21, x13]\n"
-    "whilelt p0.b, x10, x14\n"
+    "movprfx z19, z26\n smax z19.b, p1/M, z19.b, z25.b\n"
+    "ld1b { z29.b }, p2/Z, [x21, x14]\n"
+    "ld1b { z27.b }, p2/Z, [x28, x14]\n"
+    "movprfx z17, z28\n smax z17.b, p1/M, z17.b, z24.b\n"
+    "movprfx z18, z25\n smax z18.b, p1/M, z18.b, z23.b\n"
+    "ld1b { z28.b }, p2/Z, [x25, x14]\n"
+    "ld1b { z26.b }, p2/Z, [x26, x14]\n"
+    "ld1b { z25.b }, p2/Z, [x23, x14]\n"
+    "ld1b { z24.b }, p2/Z, [x22, x14]\n"
+    "whilelt p0.b, x11, x15\n"
     "movprfx z16, z22\n smax z16.b, p1/M, z16.b, z20.b\n"
-    "ld1b { z23.b }, p2/Z, [x19, x13]\n"
-    "incw x13\n"
-    "whilelt p2.b, x13, x14\n"
-    "st1b { z16.b }, p0, [x12, x10]\n"
-    "movprfx z16, z17\n smax z16.b, p1/M, z16.b, z22.b\n"
-    "movprfx z17, z21\n smax z17.b, p1/M, z17.b, z19.b\n"
-    "st1b { z16.b }, p0, [x11, x10]\n"
-    "movprfx z16, z21\n smax z16.b, p1/M, z16.b, z18.b\n"
-    "st1b { z17.b }, p0, [x9, x10]\n"
-    "st1b { z16.b }, p0, [x28, x10]\n"
-    "incw x10\n"
+    "ld1b { z23.b }, p2/Z, [x20, x14]\n"
+    "incw x14\n"
+    "whilelt p2.b, x14, x15\n"
+    "st1b { z16.b }, p0, [x13, x11]\n"
+    "movprfx z16, z19\n smax z16.b, p1/M, z16.b, z22.b\n"
+    "smax z17.b, p1/M, z17.b, z21.b\n"
+    "st1b { z16.b }, p0, [x12, x11]\n"
+    "movprfx z16, z18\n smax z16.b, p1/M, z16.b, z21.b\n"
+    "st1b { z17.b }, p0, [x10, x11]\n"
+    "st1b { z16.b }, p0, [x9, x11]\n"
+    "incw x11\n"
     "b.any 1b\n"
     "2:"  // Vector: Tail
     "movprfx z22, z31\n smax z22.b, p1/M, z22.b, z30.b\n"
     "movprfx z21, z30\n smax z21.b, p1/M, z21.b, z29.b\n"
     "movprfx z20, z28\n smax z20.b, p1/M, z20.b, z27.b\n"
-    "movprfx z17, z26\n smax z17.b, p1/M, z17.b, z25.b\n"
-    "movprfx z19, z24\n smax z19.b, p1/M, z19.b, z28.b\n"
-    "movprfx z18, z26\n smax z18.b, p1/M, z18.b, z23.b\n"
-    "whilelt p0.b, x10, x14\n"
+    "movprfx z19, z26\n smax z19.b, p1/M, z19.b, z25.b\n"
+    "movprfx z17, z28\n smax z17.b, p1/M, z17.b, z24.b\n"
+    "movprfx z18, z25\n smax z18.b, p1/M, z18.b, z23.b\n"
+    "whilelt p0.b, x11, x15\n"
     "movprfx z16, z22\n smax z16.b, p1/M, z16.b, z20.b\n"
-    "st1b { z16.b }, p0, [x12, x10]\n"
-    "movprfx z16, z17\n smax z16.b, p1/M, z16.b, z22.b\n"
-    "movprfx z17, z21\n smax z17.b, p1/M, z17.b, z19.b\n"
-    "st1b { z16.b }, p0, [x11, x10]\n"
-    "movprfx z16, z21\n smax z16.b, p1/M, z16.b, z18.b\n"
-    "st1b { z17.b }, p0, [x9, x10]\n"
-    "st1b { z16.b }, p0, [x28, x10]\n"
+    "st1b { z16.b }, p0, [x13, x11]\n"
+    "movprfx z16, z19\n smax z16.b, p1/M, z16.b, z22.b\n"
+    "smax z17.b, p1/M, z17.b, z21.b\n"
+    "st1b { z16.b }, p0, [x12, x11]\n"
+    "movprfx z16, z18\n smax z16.b, p1/M, z16.b, z21.b\n"
+    "st1b { z17.b }, p0, [x10, x11]\n"
+    "st1b { z16.b }, p0, [x9, x11]\n"
     :
     : [args] "r" (&args), [offsetof_inptrs] "I" (offsetof(KernelArgs, inptrs)), [offsetof_n_channels] "I" (offsetof(KernelArgs, n_channels)), [offsetof_outptrs] "I" (offsetof(KernelArgs, outptrs))
-    : "cc", "memory", "p0", "p1", "p2", "x9", "x10", "x11", "x12", "x13", "x14", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+    : "cc", "memory", "p0", "p1", "p2", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
   );
 }
 
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_s8_nhwc_max_generic_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_s8_nhwc_max_generic_depthfirst/generic.cpp
index 3fd4828549..7d14edddeb 100644
--- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_s8_nhwc_max_generic_depthfirst/generic.cpp
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_s8_nhwc_max_generic_depthfirst/generic.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2021-2022 Arm Limited.
+ * Copyright (c) 2021-2023 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -40,82 +40,82 @@ void sve_s8_nhwc_max_generic_depthfirst_impl(
 )
 {
   __asm__ __volatile__(
-    "mov x28, #0x0\n"
-    "cntb x27\n"
-    "cntb x26, ALL, MUL #2\n"
-    "cntb x25, ALL, MUL #3\n"
-    "whilelt p4.b, x28, %x[n_channels]\n"
-    "whilelt p3.b, x27, %x[n_channels]\n"
-    "whilelt p2.b, x26, %x[n_channels]\n"
-    "whilelt p1.b, x25, %x[n_channels]\n"
+    "mov x9, #0x0\n"
+    "cntb x28\n"
+    "cntb x27, ALL, MUL #2\n"
+    "cntb x26, ALL, MUL #3\n"
+    "whilelt p4.b, x9, %x[n_channels]\n"
+    "whilelt p3.b, x28, %x[n_channels]\n"
+    "whilelt p2.b, x27, %x[n_channels]\n"
+    "whilelt p1.b, x26, %x[n_channels]\n"
     "ptrue p0.b\n"
     "b.none 7f\n"
     "1:"  // 4-vectors of channels
-    "lsr x24, %x[n_valid_cells], #0x2\n"
+    "lsr x25, %x[n_valid_cells], #0x2\n"
     "mov z8.b, #0x80\n"
     "mov z7.b, #0x80\n"
-    "mov x19, %x[inptrs]\n"
+    "mov x20, %x[inptrs]\n"
     "mov z6.b, #0x80\n"
     "mov z5.b, #0x80\n"
-    "cbz x24, 4f\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
-    "subs x24, x24, #0x1\n"
-    "add x19, x19, #0x20\n"
-    "ld1b { z4.b }, p4/Z, [x23, x28]\n"
-    "ld1b { z3.b }, p4/Z, [x22, x28]\n"
-    "ld1b { z2.b }, p4/Z, [x21, x28]\n"
-    "ld1b { z1.b }, p4/Z, [x20, x28]\n"
-    "ld1b { z0.b }, p3/Z, [x23, x27]\n"
-    "ld1b { z31.b }, p3/Z, [x22, x27]\n"
-    "ld1b { z22.b }, p3/Z, [x21, x27]\n"
-    "ld1b { z30.b }, p3/Z, [x20, x27]\n"
-    "ld1b { z29.b }, p2/Z, [x23, x26]\n"
-    "ld1b { z28.b }, p2/Z, [x22, x26]\n"
-    "ld1b { z21.b }, p2/Z, [x21, x26]\n"
-    "ld1b { z27.b }, p2/Z, [x20, x26]\n"
-    "ld1b { z26.b }, p1/Z, [x23, x25]\n"
-    "ld1b { z25.b }, p1/Z, [x22, x25]\n"
-    "ld1b { z20.b }, p1/Z, [x21, x25]\n"
-    "ld1b { z24.b }, p1/Z, [x20, x25]\n"
+    "cbz x25, 4f\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "subs x25, x25, #0x1\n"
+    "add x20, x20, #0x20\n"
+    "ld1b { z4.b }, p4/Z, [x24, x9]\n"
+    "ld1b { z3.b }, p4/Z, [x23, x9]\n"
+    "ld1b { z2.b }, p4/Z, [x22, x9]\n"
+    "ld1b { z1.b }, p4/Z, [x21, x9]\n"
+    "ld1b { z0.b }, p3/Z, [x24, x28]\n"
+    "ld1b { z31.b }, p3/Z, [x23, x28]\n"
+    "ld1b { z22.b }, p3/Z, [x22, x28]\n"
+    "ld1b { z30.b }, p3/Z, [x21, x28]\n"
+    "ld1b { z29.b }, p2/Z, [x24, x27]\n"
+    "ld1b { z28.b }, p2/Z, [x23, x27]\n"
+    "ld1b { z21.b }, p2/Z, [x22, x27]\n"
+    "ld1b { z27.b }, p2/Z, [x21, x27]\n"
+    "ld1b { z26.b }, p1/Z, [x24, x26]\n"
+    "ld1b { z25.b }, p1/Z, [x23, x26]\n"
+    "ld1b { z20.b }, p1/Z, [x22, x26]\n"
+    "ld1b { z24.b }, p1/Z, [x21, x26]\n"
     "beq 3f\n"
     "2:"  // 4-vectors of channels: 4 inputs loop
     "movprfx z19, z4\n smax z19.b, p0/M, z19.b, z3.b\n"
     "movprfx z23, z2\n smax z23.b, p0/M, z23.b, z1.b\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
     "movprfx z18, z0\n smax z18.b, p0/M, z18.b, z31.b\n"
     "smax z22.b, p0/M, z22.b, z30.b\n"
-    "ld1b { z4.b }, p4/Z, [x23, x28]\n"
-    "ld1b { z3.b }, p4/Z, [x22, x28]\n"
+    "ld1b { z4.b }, p4/Z, [x24, x9]\n"
+    "ld1b { z3.b }, p4/Z, [x23, x9]\n"
     "movprfx z17, z29\n smax z17.b, p0/M, z17.b, z28.b\n"
     "smax z21.b, p0/M, z21.b, z27.b\n"
-    "ld1b { z2.b }, p4/Z, [x21, x28]\n"
-    "ld1b { z1.b }, p4/Z, [x20, x28]\n"
+    "ld1b { z2.b }, p4/Z, [x22, x9]\n"
+    "ld1b { z1.b }, p4/Z, [x21, x9]\n"
     "movprfx z16, z26\n smax z16.b, p0/M, z16.b, z25.b\n"
     "smax z20.b, p0/M, z20.b, z24.b\n"
-    "ld1b { z0.b }, p3/Z, [x23, x27]\n"
-    "ld1b { z31.b }, p3/Z, [x22, x27]\n"
+    "ld1b { z0.b }, p3/Z, [x24, x28]\n"
+    "ld1b { z31.b }, p3/Z, [x23, x28]\n"
     "smax z19.b, p0/M, z19.b, z23.b\n"
     "smax z18.b, p0/M, z18.b, z22.b\n"
-    "ld1b { z22.b }, p3/Z, [x21, x27]\n"
-    "ld1b { z30.b }, p3/Z, [x20, x27]\n"
+    "ld1b { z22.b }, p3/Z, [x22, x28]\n"
+    "ld1b { z30.b }, p3/Z, [x21, x28]\n"
     "smax z17.b, p0/M, z17.b, z21.b\n"
     "smax z16.b, p0/M, z16.b, z20.b\n"
-    "ld1b { z29.b }, p2/Z, [x23, x26]\n"
-    "ld1b { z28.b }, p2/Z, [x22, x26]\n"
-    "subs x24, x24, #0x1\n"
+    "ld1b { z29.b }, p2/Z, [x24, x27]\n"
+    "ld1b { z28.b }, p2/Z, [x23, x27]\n"
+    "subs x25, x25, #0x1\n"
     "smax z8.b, p0/M, z8.b, z19.b\n"
-    "ld1b { z21.b }, p2/Z, [x21, x26]\n"
-    "ld1b { z27.b }, p2/Z, [x20, x26]\n"
+    "ld1b { z21.b }, p2/Z, [x22, x27]\n"
+    "ld1b { z27.b }, p2/Z, [x21, x27]\n"
     "smax z7.b, p0/M, z7.b, z18.b\n"
     "smax z6.b, p0/M, z6.b, z17.b\n"
-    "ld1b { z26.b }, p1/Z, [x23, x25]\n"
-    "ld1b { z25.b }, p1/Z, [x22, x25]\n"
+    "ld1b { z26.b }, p1/Z, [x24, x26]\n"
+    "ld1b { z25.b }, p1/Z, [x23, x26]\n"
     "smax z5.b, p0/M, z5.b, z16.b\n"
-    "add x19, x19, #0x20\n"
-    "ld1b { z20.b }, p1/Z, [x21, x25]\n"
-    "ld1b { z24.b }, p1/Z, [x20, x25]\n"
+    "add x20, x20, #0x20\n"
+    "ld1b { z20.b }, p1/Z, [x22, x26]\n"
+    "ld1b { z24.b }, p1/Z, [x21, x26]\n"
     "bgt 2b\n"
     "3:"  // 4-vectors of channels: 4 inputs tail
     "movprfx z19, z4\n smax z19.b, p0/M, z19.b, z3.b\n"
@@ -135,61 +135,61 @@ void sve_s8_nhwc_max_generic_depthfirst_impl(
     "smax z6.b, p0/M, z6.b, z17.b\n"
     "smax z5.b, p0/M, z5.b, z16.b\n"
     "4:"  // 4-vectors of channels: After loop
-    "ands x20, %x[n_valid_cells], #0x3\n"
+    "ands x21, %x[n_valid_cells], #0x3\n"
     "beq 6f\n"
     "5:"  // 4-vectors of channels: Single input loop
-    "ldr x23, [x19], #0x8\n"
-    "ld1b { z4.b }, p4/Z, [x23, x28]\n"
-    "subs x20, x20, #0x1\n"
+    "ldr x24, [x20], #0x8\n"
+    "ld1b { z4.b }, p4/Z, [x24, x9]\n"
+    "subs x21, x21, #0x1\n"
     "smax z8.b, p0/M, z8.b, z4.b\n"
-    "ld1b { z0.b }, p3/Z, [x23, x27]\n"
-    "ld1b { z29.b }, p2/Z, [x23, x26]\n"
+    "ld1b { z0.b }, p3/Z, [x24, x28]\n"
+    "ld1b { z29.b }, p2/Z, [x24, x27]\n"
     "smax z7.b, p0/M, z7.b, z0.b\n"
     "smax z6.b, p0/M, z6.b, z29.b\n"
-    "ld1b { z26.b }, p1/Z, [x23, x25]\n"
+    "ld1b { z26.b }, p1/Z, [x24, x26]\n"
     "smax z5.b, p0/M, z5.b, z26.b\n"
     "bgt 5b\n"
     "6:"  // 4-vectors of channels: Single input loop: End
-    "st1b { z8.b }, p4, [%x[outptr], x28]\n"
+    "st1b { z8.b }, p4, [%x[outptr], x9]\n"
+    "incb x9, ALL, MUL #4\n"
+    "st1b { z7.b }, p3, [%x[outptr], x28]\n"
     "incb x28, ALL, MUL #4\n"
-    "st1b { z7.b }, p3, [%x[outptr], x27]\n"
+    "st1b { z6.b }, p2, [%x[outptr], x27]\n"
     "incb x27, ALL, MUL #4\n"
-    "st1b { z6.b }, p2, [%x[outptr], x26]\n"
+    "st1b { z5.b }, p1, [%x[outptr], x26]\n"
     "incb x26, ALL, MUL #4\n"
-    "st1b { z5.b }, p1, [%x[outptr], x25]\n"
-    "incb x25, ALL, MUL #4\n"
-    "whilelt p1.b, x25, %x[n_channels]\n"
+    "whilelt p1.b, x26, %x[n_channels]\n"
     "b.any 1b\n"
     "7:"  // Single vector of channels
-    "whilelt p4.b, x28, %x[n_channels]\n"
+    "whilelt p4.b, x9, %x[n_channels]\n"
     "b.none 14f\n"
     "8:"  // Single vector of channels: Loop
-    "lsr x24, %x[n_valid_cells], #0x2\n"
+    "lsr x25, %x[n_valid_cells], #0x2\n"
     "mov z8.b, #0x80\n"
-    "mov x19, %x[inptrs]\n"
-    "cbz x24, 11f\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
-    "subs x24, x24, #0x1\n"
-    "add x19, x19, #0x20\n"
-    "ld1b { z4.b }, p4/Z, [x23, x28]\n"
-    "ld1b { z3.b }, p4/Z, [x22, x28]\n"
-    "ld1b { z2.b }, p4/Z, [x21, x28]\n"
-    "ld1b { z1.b }, p4/Z, [x20, x28]\n"
+    "mov x20, %x[inptrs]\n"
+    "cbz x25, 11f\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "subs x25, x25, #0x1\n"
+    "add x20, x20, #0x20\n"
+    "ld1b { z4.b }, p4/Z, [x24, x9]\n"
+    "ld1b { z3.b }, p4/Z, [x23, x9]\n"
+    "ld1b { z2.b }, p4/Z, [x22, x9]\n"
+    "ld1b { z1.b }, p4/Z, [x21, x9]\n"
     "beq 10f\n"
     "9:"  // Single vector of channels: Loop: 4 inputs loop
     "movprfx z19, z4\n smax z19.b, p0/M, z19.b, z3.b\n"
     "movprfx z23, z2\n smax z23.b, p0/M, z23.b, z1.b\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
     "smax z19.b, p0/M, z19.b, z23.b\n"
-    "subs x24, x24, #0x1\n"
-    "ld1b { z4.b }, p4/Z, [x23, x28]\n"
-    "ld1b { z3.b }, p4/Z, [x22, x28]\n"
+    "subs x25, x25, #0x1\n"
+    "ld1b { z4.b }, p4/Z, [x24, x9]\n"
+    "ld1b { z3.b }, p4/Z, [x23, x9]\n"
     "smax z8.b, p0/M, z8.b, z19.b\n"
-    "add x19, x19, #0x20\n"
-    "ld1b { z2.b }, p4/Z, [x21, x28]\n"
-    "ld1b { z1.b }, p4/Z, [x20, x28]\n"
+    "add x20, x20, #0x20\n"
+    "ld1b { z2.b }, p4/Z, [x22, x9]\n"
+    "ld1b { z1.b }, p4/Z, [x21, x9]\n"
     "bgt 9b\n"
     "10:"  // Single vector of channels: Loop: 4 inputs tail
     "movprfx z19, z4\n smax z19.b, p0/M, z19.b, z3.b\n"
@@ -197,23 +197,23 @@ void sve_s8_nhwc_max_generic_depthfirst_impl(
     "smax z19.b, p0/M, z19.b, z23.b\n"
     "smax z8.b, p0/M, z8.b, z19.b\n"
     "11:"  // Single vector of channels: Loop: After loop
-    "ands x20, %x[n_valid_cells], #0x3\n"
+    "ands x21, %x[n_valid_cells], #0x3\n"
     "beq 13f\n"
     "12:"  // Single vector of channels: Loop: Single input loop
-    "ldr x23, [x19], #0x8\n"
-    "ld1b { z4.b }, p4/Z, [x23, x28]\n"
-    "subs x20, x20, #0x1\n"
+    "ldr x24, [x20], #0x8\n"
+    "ld1b { z4.b }, p4/Z, [x24, x9]\n"
+    "subs x21, x21, #0x1\n"
     "smax z8.b, p0/M, z8.b, z4.b\n"
     "bgt 12b\n"
     "13:"  // Single vector of channels: Loop: Single input loop: End
-    "st1b { z8.b }, p4, [%x[outptr], x28]\n"
-    "incb x28\n"
-    "whilelt p4.b, x28, %x[n_channels]\n"
+    "st1b { z8.b }, p4, [%x[outptr], x9]\n"
+    "incb x9\n"
+    "whilelt p4.b, x9, %x[n_channels]\n"
     "b.any 8b\n"
     "14:"  // End
     :
     : [inptrs] "r" (inptrs), [n_channels] "r" (n_channels), [n_valid_cells] "r" (n_valid_cells), [outptr] "r" (outptr)
-    : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+    : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "x9", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
   );
 }
 
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_s8q_nhwc_avg_generic_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_s8q_nhwc_avg_generic_depthfirst/generic.cpp
index c431fece8f..7161c4f389 100644
--- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_s8q_nhwc_avg_generic_depthfirst/generic.cpp
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_s8q_nhwc_avg_generic_depthfirst/generic.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2021-2022 Arm Limited.
+ * Copyright (c) 2021-2023 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -114,21 +114,21 @@ void sve_s8q_nhwc_avg_generic_depthfirst_impl(
   );
 
   __asm__ __volatile__(
-    "mov x26, #0x0\n"
-    "cntb x25\n"
-    "cntb x24, ALL, MUL #2\n"
-    "cntb x23, ALL, MUL #3\n"
-    "whilelt p4.b, x26, %x[n_channels]\n"
-    "whilelt p3.b, x25, %x[n_channels]\n"
-    "whilelt p2.b, x24, %x[n_channels]\n"
-    "whilelt p1.b, x23, %x[n_channels]\n"
+    "mov x27, #0x0\n"
+    "cntb x26\n"
+    "cntb x25, ALL, MUL #2\n"
+    "cntb x24, ALL, MUL #3\n"
+    "whilelt p4.b, x27, %x[n_channels]\n"
+    "whilelt p3.b, x26, %x[n_channels]\n"
+    "whilelt p2.b, x25, %x[n_channels]\n"
+    "whilelt p1.b, x24, %x[n_channels]\n"
     "ptrue p0.b\n"
     "b.none 7f\n"
     "1:"  // 4-vectors of channels
-    "lsr x22, %x[n_valid_cells], #0x1\n"
+    "lsr x23, %x[n_valid_cells], #0x1\n"
     "mov z15.s, #0x0\n"
     "mov z14.s, #0x0\n"
-    "mov x19, %x[inptrs]\n"
+    "mov x20, %x[inptrs]\n"
     "mov z13.s, #0x0\n"
     "mov z12.s, #0x0\n"
     "mov z11.s, #0x0\n"
@@ -143,43 +143,43 @@ void sve_s8q_nhwc_avg_generic_depthfirst_impl(
     "mov z2.s, #0x0\n"
     "mov z1.s, #0x0\n"
     "mov z0.s, #0x0\n"
-    "cbz x22, 4f\n"
-    "ldp x21, x20, [x19, #0x0]\n"
-    "subs x22, x22, #0x1\n"
-    "add x19, x19, #0x10\n"
-    "ld1b { z31.b }, p4/Z, [x21, x26]\n"
-    "ld1b { z30.b }, p4/Z, [x20, x26]\n"
-    "ld1b { z29.b }, p3/Z, [x21, x25]\n"
-    "ld1b { z28.b }, p3/Z, [x20, x25]\n"
-    "ld1b { z27.b }, p2/Z, [x21, x24]\n"
-    "ld1b { z26.b }, p2/Z, [x20, x24]\n"
-    "ld1b { z25.b }, p1/Z, [x21, x23]\n"
-    "ld1b { z24.b }, p1/Z, [x20, x23]\n"
+    "cbz x23, 4f\n"
+    "ldp x22, x21, [x20, #0x0]\n"
+    "subs x23, x23, #0x1\n"
+    "add x20, x20, #0x10\n"
+    "ld1b { z31.b }, p4/Z, [x22, x27]\n"
+    "ld1b { z30.b }, p4/Z, [x21, x27]\n"
+    "ld1b { z29.b }, p3/Z, [x22, x26]\n"
+    "ld1b { z28.b }, p3/Z, [x21, x26]\n"
+    "ld1b { z27.b }, p2/Z, [x22, x25]\n"
+    "ld1b { z26.b }, p2/Z, [x21, x25]\n"
+    "ld1b { z25.b }, p1/Z, [x22, x24]\n"
+    "ld1b { z24.b }, p1/Z, [x21, x24]\n"
     "beq 3f\n"
     "2:"  // 4-vectors of channels: 2 inputs loop
     ".inst 0x455e03f7  // saddlb z23.h, z31.b, z30.b\n"
     ".inst 0x455e07f6  // saddlt z22.h, z31.b, z30.b\n"
-    "ldp x21, x20, [x19, #0x0]\n"
-    "subs x22, x22, #0x1\n"
+    "ldp x22, x21, [x20, #0x0]\n"
+    "subs x23, x23, #0x1\n"
     ".inst 0x455c03b5  // saddlb z21.h, z29.b, z28.b\n"
     ".inst 0x455c07b4  // saddlt z20.h, z29.b, z28.b\n"
-    "add x19, x19, #0x10\n"
-    "ld1b { z31.b }, p4/Z, [x21, x26]\n"
+    "add x20, x20, #0x10\n"
+    "ld1b { z31.b }, p4/Z, [x22, x27]\n"
     ".inst 0x455a0373  // saddlb z19.h, z27.b, z26.b\n"
     ".inst 0x455a0772  // saddlt z18.h, z27.b, z26.b\n"
-    "ld1b { z30.b }, p4/Z, [x20, x26]\n"
-    "ld1b { z29.b }, p3/Z, [x21, x25]\n"
+    "ld1b { z30.b }, p4/Z, [x21, x27]\n"
+    "ld1b { z29.b }, p3/Z, [x22, x26]\n"
     ".inst 0x45580331  // saddlb z17.h, z25.b, z24.b\n"
     ".inst 0x45580730  // saddlt z16.h, z25.b, z24.b\n"
-    "ld1b { z28.b }, p3/Z, [x20, x25]\n"
-    "ld1b { z27.b }, p2/Z, [x21, x24]\n"
+    "ld1b { z28.b }, p3/Z, [x21, x26]\n"
+    "ld1b { z27.b }, p2/Z, [x22, x25]\n"
     ".inst 0x459741ef  // saddwb z15.s, z15.s, z23.h\n"
     ".inst 0x459745ce  // saddwt z14.s, z14.s, z23.h\n"
-    "ld1b { z26.b }, p2/Z, [x20, x24]\n"
-    "ld1b { z25.b }, p1/Z, [x21, x23]\n"
+    "ld1b { z26.b }, p2/Z, [x21, x25]\n"
+    "ld1b { z25.b }, p1/Z, [x22, x24]\n"
     ".inst 0x459641ad  // saddwb z13.s, z13.s, z22.h\n"
     ".inst 0x4596458c  // saddwt z12.s, z12.s, z22.h\n"
-    "ld1b { z24.b }, p1/Z, [x20, x23]\n"
+    "ld1b { z24.b }, p1/Z, [x21, x24]\n"
     ".inst 0x4595416b  // saddwb z11.s, z11.s, z21.h\n"
     ".inst 0x4595454a  // saddwt z10.s, z10.s, z21.h\n"
     ".inst 0x45944129  // saddwb z9.s, z9.s, z20.h\n"
@@ -219,21 +219,21 @@ void sve_s8q_nhwc_avg_generic_depthfirst_impl(
     ".inst 0x45904021  // saddwb z1.s, z1.s, z16.h\n"
     ".inst 0x45904400  // saddwt z0.s, z0.s, z16.h\n"
     "4:"  // 4-vectors of channels: After loop
-    "ands x20, %x[n_valid_cells], #0x1\n"
+    "ands x21, %x[n_valid_cells], #0x1\n"
     "beq 6f\n"
     "5:"  // 4-vectors of channels: Single input loop
-    "ldr x21, [x19], #0x8\n"
-    "ld1b { z31.b }, p4/Z, [x21, x26]\n"
+    "ldr x22, [x20], #0x8\n"
+    "ld1b { z31.b }, p4/Z, [x22, x27]\n"
     ".inst 0x4508a3f7  // sshllb z23.h, z31.b, #0x0\n"
     ".inst 0x4508a7f6  // sshllt z22.h, z31.b, #0x0\n"
-    "ld1b { z29.b }, p3/Z, [x21, x25]\n"
-    "ld1b { z27.b }, p2/Z, [x21, x24]\n"
+    "ld1b { z29.b }, p3/Z, [x22, x26]\n"
+    "ld1b { z27.b }, p2/Z, [x22, x25]\n"
     ".inst 0x4508a3b5  // sshllb z21.h, z29.b, #0x0\n"
     ".inst 0x4508a7b4  // sshllt z20.h, z29.b, #0x0\n"
-    "ld1b { z25.b }, p1/Z, [x21, x23]\n"
+    "ld1b { z25.b }, p1/Z, [x22, x24]\n"
     ".inst 0x4508a373  // sshllb z19.h, z27.b, #0x0\n"
     ".inst 0x4508a772  // sshllt z18.h, z27.b, #0x0\n"
-    "subs x20, x20, #0x1\n"
+    "subs x21, x21, #0x1\n"
     ".inst 0x4508a331  // sshllb z17.h, z25.b, #0x0\n"
     ".inst 0x4508a730  // sshllt z16.h, z25.b, #0x0\n"
     ".inst 0x459741ef  // saddwb z15.s, z15.s, z23.h\n"
@@ -334,7 +334,7 @@ void sve_s8q_nhwc_avg_generic_depthfirst_impl(
     "smin z10.s, p0/M, z10.s, z18.s\n"
     "smin z9.s, p0/M, z9.s, z18.s\n"
     "trn1 z17.h, z11.h, z10.h\n"
-    "st1b { z16.b }, p4, [%x[outptr], x26]\n"
+    "st1b { z16.b }, p4, [%x[outptr], x27]\n"
     "smin z8.s, p0/M, z8.s, z18.s\n"
     "smin z7.s, p0/M, z7.s, z18.s\n"
     "trn1 z16.h, z9.h, z8.h\n"
@@ -342,7 +342,7 @@ void sve_s8q_nhwc_avg_generic_depthfirst_impl(
     "smin z6.s, p0/M, z6.s, z18.s\n"
     "smin z5.s, p0/M, z5.s, z18.s\n"
     "trn1 z17.h, z7.h, z6.h\n"
-    "st1b { z16.b }, p3, [%x[outptr], x25]\n"
+    "st1b { z16.b }, p3, [%x[outptr], x26]\n"
     "smin z4.s, p0/M, z4.s, z18.s\n"
     "smin z3.s, p0/M, z3.s, z18.s\n"
     "trn1 z16.h, z5.h, z4.h\n"
@@ -350,46 +350,46 @@ void sve_s8q_nhwc_avg_generic_depthfirst_impl(
     "smin z2.s, p0/M, z2.s, z18.s\n"
     "smin z1.s, p0/M, z1.s, z18.s\n"
     "trn1 z17.h, z3.h, z2.h\n"
-    "st1b { z16.b }, p2, [%x[outptr], x24]\n"
+    "st1b { z16.b }, p2, [%x[outptr], x25]\n"
     "smin z0.s, p0/M, z0.s, z18.s\n"
     "trn1 z16.h, z1.h, z0.h\n"
     "trn1 z16.b, z17.b, z16.b\n"
-    "st1b { z16.b }, p1, [%x[outptr], x23]\n"
-    "incb x23, ALL, MUL #4\n"
-    "whilelt p1.b, x23, %x[n_channels]\n"
+    "st1b { z16.b }, p1, [%x[outptr], x24]\n"
+    "incb x24, ALL, MUL #4\n"
+    "whilelt p1.b, x24, %x[n_channels]\n"
+    "incb x27, ALL, MUL #4\n"
     "incb x26, ALL, MUL #4\n"
     "incb x25, ALL, MUL #4\n"
-    "incb x24, ALL, MUL #4\n"
     "b.any 1b\n"
     "7:"  // Single vector of channels
-    "whilelt p4.b, x26, %x[n_channels]\n"
+    "whilelt p4.b, x27, %x[n_channels]\n"
     "b.none 14f\n"
     "8:"  // Single vector of channels: Loop
-    "lsr x22, %x[n_valid_cells], #0x1\n"
+    "lsr x23, %x[n_valid_cells], #0x1\n"
     "mov z15.s, #0x0\n"
     "mov z14.s, #0x0\n"
-    "mov x19, %x[inptrs]\n"
+    "mov x20, %x[inptrs]\n"
     "mov z13.s, #0x0\n"
     "mov z12.s, #0x0\n"
-    "cbz x22, 11f\n"
-    "ldp x21, x20, [x19, #0x0]\n"
-    "subs x22, x22, #0x1\n"
-    "add x19, x19, #0x10\n"
-    "ld1b { z31.b }, p4/Z, [x21, x26]\n"
-    "ld1b { z30.b }, p4/Z, [x20, x26]\n"
+    "cbz x23, 11f\n"
+    "ldp x22, x21, [x20, #0x0]\n"
+    "subs x23, x23, #0x1\n"
+    "add x20, x20, #0x10\n"
+    "ld1b { z31.b }, p4/Z, [x22, x27]\n"
+    "ld1b { z30.b }, p4/Z, [x21, x27]\n"
     "beq 10f\n"
     "9:"  // Single vector of channels: Loop: 2 inputs loop
     ".inst 0x455e03f7  // saddlb z23.h, z31.b, z30.b\n"
     ".inst 0x455e07f6  // saddlt z22.h, z31.b, z30.b\n"
-    "ldp x21, x20, [x19, #0x0]\n"
-    "subs x22, x22, #0x1\n"
+    "ldp x22, x21, [x20, #0x0]\n"
+    "subs x23, x23, #0x1\n"
     ".inst 0x459741ef  // saddwb z15.s, z15.s, z23.h\n"
     ".inst 0x459745ce  // saddwt z14.s, z14.s, z23.h\n"
-    "add x19, x19, #0x10\n"
-    "ld1b { z31.b }, p4/Z, [x21, x26]\n"
+    "add x20, x20, #0x10\n"
+    "ld1b { z31.b }, p4/Z, [x22, x27]\n"
     ".inst 0x459641ad  // saddwb z13.s, z13.s, z22.h\n"
     ".inst 0x4596458c  // saddwt z12.s, z12.s, z22.h\n"
-    "ld1b { z30.b }, p4/Z, [x20, x26]\n"
+    "ld1b { z30.b }, p4/Z, [x21, x27]\n"
     "bgt 9b\n"
     "10:"  // Single vector of channels: Loop: 2 inputs tail
     ".inst 0x455e03f7  // saddlb z23.h, z31.b, z30.b\n"
@@ -399,14 +399,14 @@ void sve_s8q_nhwc_avg_generic_depthfirst_impl(
     ".inst 0x459641ad  // saddwb z13.s, z13.s, z22.h\n"
     ".inst 0x4596458c  // saddwt z12.s, z12.s, z22.h\n"
     "11:"  // Single vector of channels: Loop: After loop
-    "ands x20, %x[n_valid_cells], #0x1\n"
+    "ands x21, %x[n_valid_cells], #0x1\n"
     "beq 13f\n"
     "12:"  // Single vector of channels: Loop: Single input loop
-    "ldr x21, [x19], #0x8\n"
-    "ld1b { z31.b }, p4/Z, [x21, x26]\n"
+    "ldr x22, [x20], #0x8\n"
+    "ld1b { z31.b }, p4/Z, [x22, x27]\n"
     ".inst 0x4508a3f7  // sshllb z23.h, z31.b, #0x0\n"
     ".inst 0x4508a7f6  // sshllt z22.h, z31.b, #0x0\n"
-    "subs x20, x20, #0x1\n"
+    "subs x21, x21, #0x1\n"
     ".inst 0x459741ef  // saddwb z15.s, z15.s, z23.h\n"
     ".inst 0x459745ce  // saddwt z14.s, z14.s, z23.h\n"
     ".inst 0x459641ad  // saddwb z13.s, z13.s, z22.h\n"
@@ -441,14 +441,14 @@ void sve_s8q_nhwc_avg_generic_depthfirst_impl(
     "smin z12.s, p0/M, z12.s, z18.s\n"
     "trn1 z16.h, z13.h, z12.h\n"
     "trn1 z16.b, z17.b, z16.b\n"
-    "st1b { z16.b }, p4, [%x[outptr], x26]\n"
-    "incb x26\n"
-    "whilelt p4.b, x26, %x[n_channels]\n"
+    "st1b { z16.b }, p4, [%x[outptr], x27]\n"
+    "incb x27\n"
+    "whilelt p4.b, x27, %x[n_channels]\n"
     "b.any 8b\n"
     "14:"  // End
     :
     : [combined_rescale_value] "r" (&combined_rescale_value), [inptrs] "r" (inptrs), [left_shift] "r" (&left_shift), [n_channels] "r" (n_channels), [n_valid_cells] "r" (n_valid_cells), [outptr] "r" (outptr), [right_shift] "r" (&right_shift)
-    : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+    : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
   );
 }
 
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_s8q_nhwc_max_generic_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_s8q_nhwc_max_generic_depthfirst/generic.cpp
index 5ef141492f..19209811d8 100644
--- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_s8q_nhwc_max_generic_depthfirst/generic.cpp
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_s8q_nhwc_max_generic_depthfirst/generic.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2021-2022 Arm Limited.
+ * Copyright (c) 2021-2023 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -42,82 +42,82 @@ void sve_s8q_nhwc_max_generic_depthfirst_impl(
 )
 {
   __asm__ __volatile__(
-    "mov x28, #0x0\n"
-    "cntb x27\n"
-    "cntb x26, ALL, MUL #2\n"
-    "cntb x25, ALL, MUL #3\n"
-    "whilelt p4.b, x28, %x[n_channels]\n"
-    "whilelt p3.b, x27, %x[n_channels]\n"
-    "whilelt p2.b, x26, %x[n_channels]\n"
-    "whilelt p1.b, x25, %x[n_channels]\n"
+    "mov x9, #0x0\n"
+    "cntb x28\n"
+    "cntb x27, ALL, MUL #2\n"
+    "cntb x26, ALL, MUL #3\n"
+    "whilelt p4.b, x9, %x[n_channels]\n"
+    "whilelt p3.b, x28, %x[n_channels]\n"
+    "whilelt p2.b, x27, %x[n_channels]\n"
+    "whilelt p1.b, x26, %x[n_channels]\n"
     "ptrue p0.b\n"
     "b.none 7f\n"
     "1:"  // 4-vectors of channels
-    "lsr x24, %x[n_valid_cells], #0x2\n"
+    "lsr x25, %x[n_valid_cells], #0x2\n"
     "mov z8.b, #0x80\n"
     "mov z7.b, #0x80\n"
-    "mov x19, %x[inptrs]\n"
+    "mov x20, %x[inptrs]\n"
     "mov z6.b, #0x80\n"
     "mov z5.b, #0x80\n"
-    "cbz x24, 4f\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
-    "subs x24, x24, #0x1\n"
-    "add x19, x19, #0x20\n"
-    "ld1b { z4.b }, p4/Z, [x23, x28]\n"
-    "ld1b { z3.b }, p4/Z, [x22, x28]\n"
-    "ld1b { z2.b }, p4/Z, [x21, x28]\n"
-    "ld1b { z1.b }, p4/Z, [x20, x28]\n"
-    "ld1b { z0.b }, p3/Z, [x23, x27]\n"
-    "ld1b { z31.b }, p3/Z, [x22, x27]\n"
-    "ld1b { z22.b }, p3/Z, [x21, x27]\n"
-    "ld1b { z30.b }, p3/Z, [x20, x27]\n"
-    "ld1b { z29.b }, p2/Z, [x23, x26]\n"
-    "ld1b { z28.b }, p2/Z, [x22, x26]\n"
-    "ld1b { z21.b }, p2/Z, [x21, x26]\n"
-    "ld1b { z27.b }, p2/Z, [x20, x26]\n"
-    "ld1b { z26.b }, p1/Z, [x23, x25]\n"
-    "ld1b { z25.b }, p1/Z, [x22, x25]\n"
-    "ld1b { z20.b }, p1/Z, [x21, x25]\n"
-    "ld1b { z24.b }, p1/Z, [x20, x25]\n"
+    "cbz x25, 4f\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "subs x25, x25, #0x1\n"
+    "add x20, x20, #0x20\n"
+    "ld1b { z4.b }, p4/Z, [x24, x9]\n"
+    "ld1b { z3.b }, p4/Z, [x23, x9]\n"
+    "ld1b { z2.b }, p4/Z, [x22, x9]\n"
+    "ld1b { z1.b }, p4/Z, [x21, x9]\n"
+    "ld1b { z0.b }, p3/Z, [x24, x28]\n"
+    "ld1b { z31.b }, p3/Z, [x23, x28]\n"
+    "ld1b { z22.b }, p3/Z, [x22, x28]\n"
+    "ld1b { z30.b }, p3/Z, [x21, x28]\n"
+    "ld1b { z29.b }, p2/Z, [x24, x27]\n"
+    "ld1b { z28.b }, p2/Z, [x23, x27]\n"
+    "ld1b { z21.b }, p2/Z, [x22, x27]\n"
+    "ld1b { z27.b }, p2/Z, [x21, x27]\n"
+    "ld1b { z26.b }, p1/Z, [x24, x26]\n"
+    "ld1b { z25.b }, p1/Z, [x23, x26]\n"
+    "ld1b { z20.b }, p1/Z, [x22, x26]\n"
+    "ld1b { z24.b }, p1/Z, [x21, x26]\n"
     "beq 3f\n"
     "2:"  // 4-vectors of channels: 4 inputs loop
     "movprfx z19, z4\n smax z19.b, p0/M, z19.b, z3.b\n"
     "movprfx z23, z2\n smax z23.b, p0/M, z23.b, z1.b\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
     "movprfx z18, z0\n smax z18.b, p0/M, z18.b, z31.b\n"
     "smax z22.b, p0/M, z22.b, z30.b\n"
-    "ld1b { z4.b }, p4/Z, [x23, x28]\n"
-    "ld1b { z3.b }, p4/Z, [x22, x28]\n"
+    "ld1b { z4.b }, p4/Z, [x24, x9]\n"
+    "ld1b { z3.b }, p4/Z, [x23, x9]\n"
     "movprfx z17, z29\n smax z17.b, p0/M, z17.b, z28.b\n"
     "smax z21.b, p0/M, z21.b, z27.b\n"
-    "ld1b { z2.b }, p4/Z, [x21, x28]\n"
-    "ld1b { z1.b }, p4/Z, [x20, x28]\n"
+    "ld1b { z2.b }, p4/Z, [x22, x9]\n"
+    "ld1b { z1.b }, p4/Z, [x21, x9]\n"
     "movprfx z16, z26\n smax z16.b, p0/M, z16.b, z25.b\n"
     "smax z20.b, p0/M, z20.b, z24.b\n"
-    "ld1b { z0.b }, p3/Z, [x23, x27]\n"
-    "ld1b { z31.b }, p3/Z, [x22, x27]\n"
+    "ld1b { z0.b }, p3/Z, [x24, x28]\n"
+    "ld1b { z31.b }, p3/Z, [x23, x28]\n"
     "smax z19.b, p0/M, z19.b, z23.b\n"
     "smax z18.b, p0/M, z18.b, z22.b\n"
-    "ld1b { z22.b }, p3/Z, [x21, x27]\n"
-    "ld1b { z30.b }, p3/Z, [x20, x27]\n"
+    "ld1b { z22.b }, p3/Z, [x22, x28]\n"
+    "ld1b { z30.b }, p3/Z, [x21, x28]\n"
     "smax z17.b, p0/M, z17.b, z21.b\n"
     "smax z16.b, p0/M, z16.b, z20.b\n"
-    "ld1b { z29.b }, p2/Z, [x23, x26]\n"
-    "ld1b { z28.b }, p2/Z, [x22, x26]\n"
-    "subs x24, x24, #0x1\n"
+    "ld1b { z29.b }, p2/Z, [x24, x27]\n"
+    "ld1b { z28.b }, p2/Z, [x23, x27]\n"
+    "subs x25, x25, #0x1\n"
     "smax z8.b, p0/M, z8.b, z19.b\n"
-    "ld1b { z21.b }, p2/Z, [x21, x26]\n"
-    "ld1b { z27.b }, p2/Z, [x20, x26]\n"
+    "ld1b { z21.b }, p2/Z, [x22, x27]\n"
+    "ld1b { z27.b }, p2/Z, [x21, x27]\n"
     "smax z7.b, p0/M, z7.b, z18.b\n"
     "smax z6.b, p0/M, z6.b, z17.b\n"
-    "ld1b { z26.b }, p1/Z, [x23, x25]\n"
-    "ld1b { z25.b }, p1/Z, [x22, x25]\n"
+    "ld1b { z26.b }, p1/Z, [x24, x26]\n"
+    "ld1b { z25.b }, p1/Z, [x23, x26]\n"
     "smax z5.b, p0/M, z5.b, z16.b\n"
-    "add x19, x19, #0x20\n"
-    "ld1b { z20.b }, p1/Z, [x21, x25]\n"
-    "ld1b { z24.b }, p1/Z, [x20, x25]\n"
+    "add x20, x20, #0x20\n"
+    "ld1b { z20.b }, p1/Z, [x22, x26]\n"
+    "ld1b { z24.b }, p1/Z, [x21, x26]\n"
     "bgt 2b\n"
     "3:"  // 4-vectors of channels: 4 inputs tail
     "movprfx z19, z4\n smax z19.b, p0/M, z19.b, z3.b\n"
@@ -137,33 +137,33 @@ void sve_s8q_nhwc_max_generic_depthfirst_impl(
     "smax z6.b, p0/M, z6.b, z17.b\n"
     "smax z5.b, p0/M, z5.b, z16.b\n"
     "4:"  // 4-vectors of channels: After loop
-    "ands x20, %x[n_valid_cells], #0x3\n"
+    "ands x21, %x[n_valid_cells], #0x3\n"
     "beq 6f\n"
     "5:"  // 4-vectors of channels: Single input loop
-    "ldr x23, [x19], #0x8\n"
-    "ld1b { z4.b }, p4/Z, [x23, x28]\n"
-    "subs x20, x20, #0x1\n"
+    "ldr x24, [x20], #0x8\n"
+    "ld1b { z4.b }, p4/Z, [x24, x9]\n"
+    "subs x21, x21, #0x1\n"
     "smax z8.b, p0/M, z8.b, z4.b\n"
-    "ld1b { z0.b }, p3/Z, [x23, x27]\n"
-    "ld1b { z29.b }, p2/Z, [x23, x26]\n"
+    "ld1b { z0.b }, p3/Z, [x24, x28]\n"
+    "ld1b { z29.b }, p2/Z, [x24, x27]\n"
     "smax z7.b, p0/M, z7.b, z0.b\n"
     "smax z6.b, p0/M, z6.b, z29.b\n"
-    "ld1b { z26.b }, p1/Z, [x23, x25]\n"
+    "ld1b { z26.b }, p1/Z, [x24, x26]\n"
     "smax z5.b, p0/M, z5.b, z26.b\n"
     "bgt 5b\n"
     "6:"  // 4-vectors of channels: Single input loop: End
     ".inst 0x4508a111  // sshllb z17.h, z8.b, #0x0\n"
     ".inst 0x4508a517  // sshllt z23.h, z8.b, #0x0\n"
-    "add x19, %x[quant_params], %[offsetof_qp_per_layer_left_shift]\n"
-    "ld1rw { z4.s }, p0/Z, [x19]\n"
+    "add x20, %x[quant_params], %[offsetof_qp_per_layer_left_shift]\n"
+    "ld1rw { z4.s }, p0/Z, [x20]\n"
     ".inst 0x4508a0f6  // sshllb z22.h, z7.b, #0x0\n"
     ".inst 0x4508a4f5  // sshllt z21.h, z7.b, #0x0\n"
-    "add x19, %x[quant_params], %[offsetof_qp_per_layer_mul]\n"
-    "ld1rw { z3.s }, p0/Z, [x19]\n"
+    "add x20, %x[quant_params], %[offsetof_qp_per_layer_mul]\n"
+    "ld1rw { z3.s }, p0/Z, [x20]\n"
     ".inst 0x4508a0d4  // sshllb z20.h, z6.b, #0x0\n"
     ".inst 0x4508a4d3  // sshllt z19.h, z6.b, #0x0\n"
-    "add x19, %x[quant_params], %[offsetof_qp_per_layer_right_shift]\n"
-    "ld1rw { z2.s }, p0/Z, [x19]\n"
+    "add x20, %x[quant_params], %[offsetof_qp_per_layer_right_shift]\n"
+    "ld1rw { z2.s }, p0/Z, [x20]\n"
     ".inst 0x4508a0b2  // sshllb z18.h, z5.b, #0x0\n"
     ".inst 0x4508a4b0  // sshllt z16.h, z5.b, #0x0\n"
     ".inst 0x4510a221  // sshllb z1.s, z17.h, #0x0\n"
@@ -259,7 +259,7 @@ void sve_s8q_nhwc_max_generic_depthfirst_impl(
     "smin z29.s, p0/M, z29.s, z18.s\n"
     "smin z28.s, p0/M, z28.s, z18.s\n"
     "trn1 z17.h, z30.h, z29.h\n"
-    "st1b { z16.b }, p4, [%x[outptr], x28]\n"
+    "st1b { z16.b }, p4, [%x[outptr], x9]\n"
     "smin z27.s, p0/M, z27.s, z18.s\n"
     "smin z26.s, p0/M, z26.s, z18.s\n"
     "trn1 z16.h, z28.h, z27.h\n"
@@ -267,7 +267,7 @@ void sve_s8q_nhwc_max_generic_depthfirst_impl(
     "smin z25.s, p0/M, z25.s, z18.s\n"
     "smin z24.s, p0/M, z24.s, z18.s\n"
     "trn1 z17.h, z26.h, z25.h\n"
-    "st1b { z16.b }, p3, [%x[outptr], x27]\n"
+    "st1b { z16.b }, p3, [%x[outptr], x28]\n"
     "smin z23.s, p0/M, z23.s, z18.s\n"
     "smin z22.s, p0/M, z22.s, z18.s\n"
     "trn1 z16.h, z24.h, z23.h\n"
@@ -275,47 +275,47 @@ void sve_s8q_nhwc_max_generic_depthfirst_impl(
     "smin z21.s, p0/M, z21.s, z18.s\n"
     "smin z20.s, p0/M, z20.s, z18.s\n"
     "trn1 z17.h, z22.h, z21.h\n"
-    "st1b { z16.b }, p2, [%x[outptr], x26]\n"
+    "st1b { z16.b }, p2, [%x[outptr], x27]\n"
     "smin z19.s, p0/M, z19.s, z18.s\n"
     "trn1 z16.h, z20.h, z19.h\n"
     "trn1 z16.b, z17.b, z16.b\n"
-    "st1b { z16.b }, p1, [%x[outptr], x25]\n"
-    "incb x25, ALL, MUL #4\n"
-    "whilelt p1.b, x25, %x[n_channels]\n"
+    "st1b { z16.b }, p1, [%x[outptr], x26]\n"
+    "incb x26, ALL, MUL #4\n"
+    "whilelt p1.b, x26, %x[n_channels]\n"
+    "incb x9, ALL, MUL #4\n"
     "incb x28, ALL, MUL #4\n"
     "incb x27, ALL, MUL #4\n"
-    "incb x26, ALL, MUL #4\n"
     "b.any 1b\n"
     "7:"  // Single vector of channels
-    "whilelt p4.b, x28, %x[n_channels]\n"
+    "whilelt p4.b, x9, %x[n_channels]\n"
     "b.none 14f\n"
     "8:"  // Single vector of channels: Loop
-    "lsr x24, %x[n_valid_cells], #0x2\n"
+    "lsr x25, %x[n_valid_cells], #0x2\n"
     "mov z8.b, #0x80\n"
-    "mov x19, %x[inptrs]\n"
-    "cbz x24, 11f\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
-    "subs x24, x24, #0x1\n"
-    "add x19, x19, #0x20\n"
-    "ld1b { z4.b }, p4/Z, [x23, x28]\n"
-    "ld1b { z3.b }, p4/Z, [x22, x28]\n"
-    "ld1b { z2.b }, p4/Z, [x21, x28]\n"
-    "ld1b { z1.b }, p4/Z, [x20, x28]\n"
+    "mov x20, %x[inptrs]\n"
+    "cbz x25, 11f\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "subs x25, x25, #0x1\n"
+    "add x20, x20, #0x20\n"
+    "ld1b { z4.b }, p4/Z, [x24, x9]\n"
+    "ld1b { z3.b }, p4/Z, [x23, x9]\n"
+    "ld1b { z2.b }, p4/Z, [x22, x9]\n"
+    "ld1b { z1.b }, p4/Z, [x21, x9]\n"
     "beq 10f\n"
     "9:"  // Single vector of channels: Loop: 4 inputs loop
     "movprfx z19, z4\n smax z19.b, p0/M, z19.b, z3.b\n"
     "movprfx z23, z2\n smax z23.b, p0/M, z23.b, z1.b\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
     "smax z19.b, p0/M, z19.b, z23.b\n"
-    "subs x24, x24, #0x1\n"
-    "ld1b { z4.b }, p4/Z, [x23, x28]\n"
-    "ld1b { z3.b }, p4/Z, [x22, x28]\n"
+    "subs x25, x25, #0x1\n"
+    "ld1b { z4.b }, p4/Z, [x24, x9]\n"
+    "ld1b { z3.b }, p4/Z, [x23, x9]\n"
     "smax z8.b, p0/M, z8.b, z19.b\n"
-    "add x19, x19, #0x20\n"
-    "ld1b { z2.b }, p4/Z, [x21, x28]\n"
-    "ld1b { z1.b }, p4/Z, [x20, x28]\n"
+    "add x20, x20, #0x20\n"
+    "ld1b { z2.b }, p4/Z, [x22, x9]\n"
+    "ld1b { z1.b }, p4/Z, [x21, x9]\n"
     "bgt 9b\n"
     "10:"  // Single vector of channels: Loop: 4 inputs tail
     "movprfx z19, z4\n smax z19.b, p0/M, z19.b, z3.b\n"
@@ -323,23 +323,23 @@ void sve_s8q_nhwc_max_generic_depthfirst_impl(
     "smax z19.b, p0/M, z19.b, z23.b\n"
     "smax z8.b, p0/M, z8.b, z19.b\n"
     "11:"  // Single vector of channels: Loop: After loop
-    "ands x20, %x[n_valid_cells], #0x3\n"
+    "ands x21, %x[n_valid_cells], #0x3\n"
     "beq 13f\n"
     "12:"  // Single vector of channels: Loop: Single input loop
-    "ldr x23, [x19], #0x8\n"
-    "ld1b { z4.b }, p4/Z, [x23, x28]\n"
-    "subs x20, x20, #0x1\n"
+    "ldr x24, [x20], #0x8\n"
+    "ld1b { z4.b }, p4/Z, [x24, x9]\n"
+    "subs x21, x21, #0x1\n"
     "smax z8.b, p0/M, z8.b, z4.b\n"
     "bgt 12b\n"
     "13:"  // Single vector of channels: Loop: Single input loop: End
     ".inst 0x4508a111  // sshllb z17.h, z8.b, #0x0\n"
     ".inst 0x4508a517  // sshllt z23.h, z8.b, #0x0\n"
-    "add x19, %x[quant_params], %[offsetof_qp_per_layer_left_shift]\n"
-    "ld1rw { z4.s }, p0/Z, [x19]\n"
+    "add x20, %x[quant_params], %[offsetof_qp_per_layer_left_shift]\n"
+    "ld1rw { z4.s }, p0/Z, [x20]\n"
     ".inst 0x4510a221  // sshllb z1.s, z17.h, #0x0\n"
     ".inst 0x4510a631  // sshllt z17.s, z17.h, #0x0\n"
-    "add x19, %x[quant_params], %[offsetof_qp_per_layer_mul]\n"
-    "ld1rw { z3.s }, p0/Z, [x19]\n"
+    "add x20, %x[quant_params], %[offsetof_qp_per_layer_mul]\n"
+    "ld1rw { z3.s }, p0/Z, [x20]\n"
     ".inst 0x4510a2e0  // sshllb z0.s, z23.h, #0x0\n"
     ".inst 0x4510a6ff  // sshllt z31.s, z23.h, #0x0\n"
     ".inst 0x44828081  // srshl z1.s, p0/M, z1.s, z4.s\n"
@@ -348,8 +348,8 @@ void sve_s8q_nhwc_max_generic_depthfirst_impl(
     ".inst 0x4482809f  // srshl z31.s, p0/M, z31.s, z4.s\n"
     ".inst 0x04a37421  // sqrdmulh z1.s, z1.s, z3.s\n"
     ".inst 0x04a37631  // sqrdmulh z17.s, z17.s, z3.s\n"
-    "add x19, %x[quant_params], %[offsetof_qp_per_layer_right_shift]\n"
-    "ld1rw { z2.s }, p0/Z, [x19]\n"
+    "add x20, %x[quant_params], %[offsetof_qp_per_layer_right_shift]\n"
+    "ld1rw { z2.s }, p0/Z, [x20]\n"
     ".inst 0x04a37400  // sqrdmulh z0.s, z0.s, z3.s\n"
     ".inst 0x04a377ff  // sqrdmulh z31.s, z31.s, z3.s\n"
     "mov z18.s, #0x7f\n"
@@ -369,14 +369,14 @@ void sve_s8q_nhwc_max_generic_depthfirst_impl(
     "smin z31.s, p0/M, z31.s, z18.s\n"
     "trn1 z16.h, z0.h, z31.h\n"
     "trn1 z16.b, z17.b, z16.b\n"
-    "st1b { z16.b }, p4, [%x[outptr], x28]\n"
-    "incb x28\n"
-    "whilelt p4.b, x28, %x[n_channels]\n"
+    "st1b { z16.b }, p4, [%x[outptr], x9]\n"
+    "incb x9\n"
+    "whilelt p4.b, x9, %x[n_channels]\n"
     "b.any 8b\n"
     "14:"  // End
     :
     : [inptrs] "r" (inptrs), [n_channels] "r" (n_channels), [n_valid_cells] "r" (n_valid_cells), [offsetof_qp_per_layer_left_shift] "I" (offsetof(Requantize32, per_layer_left_shift)), [offsetof_qp_per_layer_mul] "I" (offsetof(Requantize32, per_layer_mul)), [offsetof_qp_per_layer_right_shift] "I" (offsetof(Requantize32, per_layer_right_shift)), [outptr] "r" (outptr), [quant_params] "r" (&qp)
-    : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+    : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "x9", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
   );
 }
 
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_u8_nhwc_avg_generic_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_u8_nhwc_avg_generic_depthfirst/generic.cpp
index f853e9de4f..f888038a2a 100644
--- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_u8_nhwc_avg_generic_depthfirst/generic.cpp
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_u8_nhwc_avg_generic_depthfirst/generic.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2021-2022 Arm Limited.
+ * Copyright (c) 2021-2023 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -95,21 +95,21 @@ void sve_u8_nhwc_avg_generic_depthfirst_impl(
   }
 
   __asm__ __volatile__(
-    "mov x26, #0x0\n"
-    "cntb x25\n"
-    "cntb x24, ALL, MUL #2\n"
-    "cntb x23, ALL, MUL #3\n"
-    "whilelt p4.b, x26, %x[n_channels]\n"
-    "whilelt p3.b, x25, %x[n_channels]\n"
-    "whilelt p2.b, x24, %x[n_channels]\n"
-    "whilelt p1.b, x23, %x[n_channels]\n"
+    "mov x27, #0x0\n"
+    "cntb x26\n"
+    "cntb x25, ALL, MUL #2\n"
+    "cntb x24, ALL, MUL #3\n"
+    "whilelt p4.b, x27, %x[n_channels]\n"
+    "whilelt p3.b, x26, %x[n_channels]\n"
+    "whilelt p2.b, x25, %x[n_channels]\n"
+    "whilelt p1.b, x24, %x[n_channels]\n"
     "ptrue p0.b\n"
     "b.none 7f\n"
     "1:"  // 4-vectors of channels
-    "lsr x22, %x[n_valid_cells], #0x1\n"
+    "lsr x23, %x[n_valid_cells], #0x1\n"
     "mov z15.s, #0x0\n"
     "mov z14.s, #0x0\n"
-    "mov x19, %x[inptrs]\n"
+    "mov x20, %x[inptrs]\n"
     "mov z13.s, #0x0\n"
     "mov z12.s, #0x0\n"
     "mov z11.s, #0x0\n"
@@ -124,43 +124,43 @@ void sve_u8_nhwc_avg_generic_depthfirst_impl(
     "mov z2.s, #0x0\n"
     "mov z1.s, #0x0\n"
     "mov z0.s, #0x0\n"
-    "cbz x22, 4f\n"
-    "ldp x21, x20, [x19, #0x0]\n"
-    "subs x22, x22, #0x1\n"
-    "add x19, x19, #0x10\n"
-    "ld1b { z31.b }, p4/Z, [x21, x26]\n"
-    "ld1b { z30.b }, p4/Z, [x20, x26]\n"
-    "ld1b { z29.b }, p3/Z, [x21, x25]\n"
-    "ld1b { z28.b }, p3/Z, [x20, x25]\n"
-    "ld1b { z27.b }, p2/Z, [x21, x24]\n"
-    "ld1b { z26.b }, p2/Z, [x20, x24]\n"
-    "ld1b { z25.b }, p1/Z, [x21, x23]\n"
-    "ld1b { z24.b }, p1/Z, [x20, x23]\n"
+    "cbz x23, 4f\n"
+    "ldp x22, x21, [x20, #0x0]\n"
+    "subs x23, x23, #0x1\n"
+    "add x20, x20, #0x10\n"
+    "ld1b { z31.b }, p4/Z, [x22, x27]\n"
+    "ld1b { z30.b }, p4/Z, [x21, x27]\n"
+    "ld1b { z29.b }, p3/Z, [x22, x26]\n"
+    "ld1b { z28.b }, p3/Z, [x21, x26]\n"
+    "ld1b { z27.b }, p2/Z, [x22, x25]\n"
+    "ld1b { z26.b }, p2/Z, [x21, x25]\n"
+    "ld1b { z25.b }, p1/Z, [x22, x24]\n"
+    "ld1b { z24.b }, p1/Z, [x21, x24]\n"
     "beq 3f\n"
     "2:"  // 4-vectors of channels: 2 inputs loop
     ".inst 0x455e0bf7  // uaddlb z23.h, z31.b, z30.b\n"
     ".inst 0x455e0ff6  // uaddlt z22.h, z31.b, z30.b\n"
-    "ldp x21, x20, [x19, #0x0]\n"
-    "subs x22, x22, #0x1\n"
+    "ldp x22, x21, [x20, #0x0]\n"
+    "subs x23, x23, #0x1\n"
     ".inst 0x455c0bb5  // uaddlb z21.h, z29.b, z28.b\n"
     ".inst 0x455c0fb4  // uaddlt z20.h, z29.b, z28.b\n"
-    "add x19, x19, #0x10\n"
-    "ld1b { z31.b }, p4/Z, [x21, x26]\n"
+    "add x20, x20, #0x10\n"
+    "ld1b { z31.b }, p4/Z, [x22, x27]\n"
     ".inst 0x455a0b73  // uaddlb z19.h, z27.b, z26.b\n"
     ".inst 0x455a0f72  // uaddlt z18.h, z27.b, z26.b\n"
-    "ld1b { z30.b }, p4/Z, [x20, x26]\n"
-    "ld1b { z29.b }, p3/Z, [x21, x25]\n"
+    "ld1b { z30.b }, p4/Z, [x21, x27]\n"
+    "ld1b { z29.b }, p3/Z, [x22, x26]\n"
     ".inst 0x45580b31  // uaddlb z17.h, z25.b, z24.b\n"
     ".inst 0x45580f30  // uaddlt z16.h, z25.b, z24.b\n"
-    "ld1b { z28.b }, p3/Z, [x20, x25]\n"
-    "ld1b { z27.b }, p2/Z, [x21, x24]\n"
+    "ld1b { z28.b }, p3/Z, [x21, x26]\n"
+    "ld1b { z27.b }, p2/Z, [x22, x25]\n"
     ".inst 0x459749ef  // uaddwb z15.s, z15.s, z23.h\n"
     ".inst 0x45974dce  // uaddwt z14.s, z14.s, z23.h\n"
-    "ld1b { z26.b }, p2/Z, [x20, x24]\n"
-    "ld1b { z25.b }, p1/Z, [x21, x23]\n"
+    "ld1b { z26.b }, p2/Z, [x21, x25]\n"
+    "ld1b { z25.b }, p1/Z, [x22, x24]\n"
     ".inst 0x459649ad  // uaddwb z13.s, z13.s, z22.h\n"
     ".inst 0x45964d8c  // uaddwt z12.s, z12.s, z22.h\n"
-    "ld1b { z24.b }, p1/Z, [x20, x23]\n"
+    "ld1b { z24.b }, p1/Z, [x21, x24]\n"
     ".inst 0x4595496b  // uaddwb z11.s, z11.s, z21.h\n"
     ".inst 0x45954d4a  // uaddwt z10.s, z10.s, z21.h\n"
     ".inst 0x45944929  // uaddwb z9.s, z9.s, z20.h\n"
@@ -200,21 +200,21 @@ void sve_u8_nhwc_avg_generic_depthfirst_impl(
     ".inst 0x45904821  // uaddwb z1.s, z1.s, z16.h\n"
     ".inst 0x45904c00  // uaddwt z0.s, z0.s, z16.h\n"
     "4:"  // 4-vectors of channels: After loop
-    "ands x20, %x[n_valid_cells], #0x1\n"
+    "ands x21, %x[n_valid_cells], #0x1\n"
     "beq 6f\n"
     "5:"  // 4-vectors of channels: Single input loop
-    "ldr x21, [x19], #0x8\n"
-    "ld1b { z31.b }, p4/Z, [x21, x26]\n"
+    "ldr x22, [x20], #0x8\n"
+    "ld1b { z31.b }, p4/Z, [x22, x27]\n"
     ".inst 0x4508abf7  // ushllb z23.h, z31.b, #0x0\n"
     ".inst 0x4508aff6  // ushllt z22.h, z31.b, #0x0\n"
-    "ld1b { z29.b }, p3/Z, [x21, x25]\n"
-    "ld1b { z27.b }, p2/Z, [x21, x24]\n"
+    "ld1b { z29.b }, p3/Z, [x22, x26]\n"
+    "ld1b { z27.b }, p2/Z, [x22, x25]\n"
     ".inst 0x4508abb5  // ushllb z21.h, z29.b, #0x0\n"
     ".inst 0x4508afb4  // ushllt z20.h, z29.b, #0x0\n"
-    "ld1b { z25.b }, p1/Z, [x21, x23]\n"
+    "ld1b { z25.b }, p1/Z, [x22, x24]\n"
     ".inst 0x4508ab73  // ushllb z19.h, z27.b, #0x0\n"
     ".inst 0x4508af72  // ushllt z18.h, z27.b, #0x0\n"
-    "subs x20, x20, #0x1\n"
+    "subs x21, x21, #0x1\n"
     ".inst 0x4508ab31  // ushllb z17.h, z25.b, #0x0\n"
     ".inst 0x4508af30  // ushllt z16.h, z25.b, #0x0\n"
     ".inst 0x459749ef  // uaddwb z15.s, z15.s, z23.h\n"
@@ -297,7 +297,7 @@ void sve_u8_nhwc_avg_generic_depthfirst_impl(
     "smin z11.s, p0/M, z11.s, z18.s\n"
     "smin z10.s, p0/M, z10.s, z18.s\n"
     "trn1 z17.h, z11.h, z10.h\n"
-    "st1b { z16.b }, p4, [%x[outptr], x26]\n"
+    "st1b { z16.b }, p4, [%x[outptr], x27]\n"
     "smin z9.s, p0/M, z9.s, z18.s\n"
     "smin z8.s, p0/M, z8.s, z18.s\n"
     "trn1 z16.h, z9.h, z8.h\n"
@@ -305,7 +305,7 @@ void sve_u8_nhwc_avg_generic_depthfirst_impl(
     "smin z7.s, p0/M, z7.s, z18.s\n"
     "smin z6.s, p0/M, z6.s, z18.s\n"
     "trn1 z17.h, z7.h, z6.h\n"
-    "st1b { z16.b }, p3, [%x[outptr], x25]\n"
+    "st1b { z16.b }, p3, [%x[outptr], x26]\n"
     "smin z5.s, p0/M, z5.s, z18.s\n"
     "smin z4.s, p0/M, z4.s, z18.s\n"
     "trn1 z16.h, z5.h, z4.h\n"
@@ -313,47 +313,47 @@ void sve_u8_nhwc_avg_generic_depthfirst_impl(
     "smin z3.s, p0/M, z3.s, z18.s\n"
     "smin z2.s, p0/M, z2.s, z18.s\n"
     "trn1 z17.h, z3.h, z2.h\n"
-    "st1b { z16.b }, p2, [%x[outptr], x24]\n"
+    "st1b { z16.b }, p2, [%x[outptr], x25]\n"
     "smin z1.s, p0/M, z1.s, z18.s\n"
     "smin z0.s, p0/M, z0.s, z18.s\n"
     "trn1 z16.h, z1.h, z0.h\n"
     "trn1 z16.b, z17.b, z16.b\n"
-    "st1b { z16.b }, p1, [%x[outptr], x23]\n"
-    "incb x23, ALL, MUL #4\n"
-    "whilelt p1.b, x23, %x[n_channels]\n"
+    "st1b { z16.b }, p1, [%x[outptr], x24]\n"
+    "incb x24, ALL, MUL #4\n"
+    "whilelt p1.b, x24, %x[n_channels]\n"
+    "incb x27, ALL, MUL #4\n"
     "incb x26, ALL, MUL #4\n"
     "incb x25, ALL, MUL #4\n"
-    "incb x24, ALL, MUL #4\n"
     "b.any 1b\n"
     "7:"  // Single vector of channels
-    "whilelt p4.b, x26, %x[n_channels]\n"
+    "whilelt p4.b, x27, %x[n_channels]\n"
     "b.none 14f\n"
     "8:"  // Single vector of channels: Loop
-    "lsr x22, %x[n_valid_cells], #0x1\n"
+    "lsr x23, %x[n_valid_cells], #0x1\n"
     "mov z15.s, #0x0\n"
     "mov z14.s, #0x0\n"
-    "mov x19, %x[inptrs]\n"
+    "mov x20, %x[inptrs]\n"
     "mov z13.s, #0x0\n"
     "mov z12.s, #0x0\n"
-    "cbz x22, 11f\n"
-    "ldp x21, x20, [x19, #0x0]\n"
-    "subs x22, x22, #0x1\n"
-    "add x19, x19, #0x10\n"
-    "ld1b { z31.b }, p4/Z, [x21, x26]\n"
-    "ld1b { z30.b }, p4/Z, [x20, x26]\n"
+    "cbz x23, 11f\n"
+    "ldp x22, x21, [x20, #0x0]\n"
+    "subs x23, x23, #0x1\n"
+    "add x20, x20, #0x10\n"
+    "ld1b { z31.b }, p4/Z, [x22, x27]\n"
+    "ld1b { z30.b }, p4/Z, [x21, x27]\n"
     "beq 10f\n"
     "9:"  // Single vector of channels: Loop: 2 inputs loop
     ".inst 0x455e0bf7  // uaddlb z23.h, z31.b, z30.b\n"
     ".inst 0x455e0ff6  // uaddlt z22.h, z31.b, z30.b\n"
-    "ldp x21, x20, [x19, #0x0]\n"
-    "subs x22, x22, #0x1\n"
+    "ldp x22, x21, [x20, #0x0]\n"
+    "subs x23, x23, #0x1\n"
     ".inst 0x459749ef  // uaddwb z15.s, z15.s, z23.h\n"
     ".inst 0x45974dce  // uaddwt z14.s, z14.s, z23.h\n"
-    "add x19, x19, #0x10\n"
-    "ld1b { z31.b }, p4/Z, [x21, x26]\n"
+    "add x20, x20, #0x10\n"
+    "ld1b { z31.b }, p4/Z, [x22, x27]\n"
     ".inst 0x459649ad  // uaddwb z13.s, z13.s, z22.h\n"
     ".inst 0x45964d8c  // uaddwt z12.s, z12.s, z22.h\n"
-    "ld1b { z30.b }, p4/Z, [x20, x26]\n"
+    "ld1b { z30.b }, p4/Z, [x21, x27]\n"
     "bgt 9b\n"
     "10:"  // Single vector of channels: Loop: 2 inputs tail
     ".inst 0x455e0bf7  // uaddlb z23.h, z31.b, z30.b\n"
@@ -363,14 +363,14 @@ void sve_u8_nhwc_avg_generic_depthfirst_impl(
     ".inst 0x459649ad  // uaddwb z13.s, z13.s, z22.h\n"
     ".inst 0x45964d8c  // uaddwt z12.s, z12.s, z22.h\n"
     "11:"  // Single vector of channels: Loop: After loop
-    "ands x20, %x[n_valid_cells], #0x1\n"
+    "ands x21, %x[n_valid_cells], #0x1\n"
     "beq 13f\n"
     "12:"  // Single vector of channels: Loop: Single input loop
-    "ldr x21, [x19], #0x8\n"
-    "ld1b { z31.b }, p4/Z, [x21, x26]\n"
+    "ldr x22, [x20], #0x8\n"
+    "ld1b { z31.b }, p4/Z, [x22, x27]\n"
     ".inst 0x4508abf7  // ushllb z23.h, z31.b, #0x0\n"
     ".inst 0x4508aff6  // ushllt z22.h, z31.b, #0x0\n"
-    "subs x20, x20, #0x1\n"
+    "subs x21, x21, #0x1\n"
     ".inst 0x459749ef  // uaddwb z15.s, z15.s, z23.h\n"
     ".inst 0x45974dce  // uaddwt z14.s, z14.s, z23.h\n"
     ".inst 0x459649ad  // uaddwb z13.s, z13.s, z22.h\n"
@@ -400,14 +400,14 @@ void sve_u8_nhwc_avg_generic_depthfirst_impl(
     "smin z12.s, p0/M, z12.s, z18.s\n"
     "trn1 z16.h, z13.h, z12.h\n"
     "trn1 z16.b, z17.b, z16.b\n"
-    "st1b { z16.b }, p4, [%x[outptr], x26]\n"
-    "incb x26\n"
-    "whilelt p4.b, x26, %x[n_channels]\n"
+    "st1b { z16.b }, p4, [%x[outptr], x27]\n"
+    "incb x27\n"
+    "whilelt p4.b, x27, %x[n_channels]\n"
     "b.any 8b\n"
     "14:"  // End
     :
     : [inptrs] "r" (inptrs), [n_channels] "r" (n_channels), [n_valid_cells] "r" (n_valid_cells), [outptr] "r" (outptr), [rescale_ptr] "r" (&rescale_value), [shift_ptr] "r" (&shift_value)
-    : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+    : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
   );
 }
 
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_u8_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_u8_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp
index 2a08610db6..70d308a585 100644
--- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_u8_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_u8_nhwc_max_2x2_s1_output2x2_depthfirst/generic.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2021-2022 Arm Limited.
+ * Copyright (c) 2021-2023 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -63,80 +63,80 @@ void sve_u8_nhwc_max_2x2_s1_output2x2_depthfirst_impl(
                         pad_left, pad_top, pad_right, pad_bottom);
 
   __asm__ __volatile__(
-    "ldr x14, [%x[args], %[offsetof_n_channels]]\n"
-    "ldr x20, [%x[args], %[offsetof_outptrs]]\n"
-    "mov x13, #0x0\n"
-    "whilelt p2.b, x13, x14\n"
-    "ldr x19, [%x[args], %[offsetof_inptrs]]\n"
-    "ldp x12, x11, [x20, #0x0]\n"
+    "ldr x15, [%x[args], %[offsetof_n_channels]]\n"
+    "ldr x21, [%x[args], %[offsetof_outptrs]]\n"
+    "mov x14, #0x0\n"
+    "whilelt p2.b, x14, x15\n"
+    "ldr x20, [%x[args], %[offsetof_inptrs]]\n"
+    "ldp x13, x12, [x21, #0x0]\n"
     "ptrue p1.b\n"
-    "mov x10, #0x0\n"
-    "ldp x9, x28, [x20, #0x10]\n"
-    "ldp x27, x26, [x19, #0x0]\n"
-    "ldp x25, x24, [x19, #0x10]\n"
-    "ldp x23, x22, [x19, #0x20]\n"
-    "ldp x21, x20, [x19, #0x30]\n"
-    "ldr x19, [x19, #0x40]\n"
-    "ld1b { z31.b }, p2/Z, [x26, x13]\n"
-    "ld1b { z30.b }, p2/Z, [x23, x13]\n"
-    "ld1b { z29.b }, p2/Z, [x20, x13]\n"
-    "ld1b { z28.b }, p2/Z, [x24, x13]\n"
-    "ld1b { z27.b }, p2/Z, [x27, x13]\n"
-    "ld1b { z26.b }, p2/Z, [x22, x13]\n"
-    "ld1b { z25.b }, p2/Z, [x25, x13]\n"
-    "ld1b { z24.b }, p2/Z, [x21, x13]\n"
-    "ld1b { z23.b }, p2/Z, [x19, x13]\n"
-    "incw x13\n"
-    "whilelt p2.b, x13, x14\n"
+    "mov x11, #0x0\n"
+    "ldp x10, x9, [x21, #0x10]\n"
+    "ldp x28, x27, [x20, #0x0]\n"
+    "ldp x26, x25, [x20, #0x10]\n"
+    "ldp x24, x23, [x20, #0x20]\n"
+    "ldp x22, x21, [x20, #0x30]\n"
+    "ldr x20, [x20, #0x40]\n"
+    "ld1b { z31.b }, p2/Z, [x27, x14]\n"
+    "ld1b { z30.b }, p2/Z, [x24, x14]\n"
+    "ld1b { z29.b }, p2/Z, [x21, x14]\n"
+    "ld1b { z28.b }, p2/Z, [x25, x14]\n"
+    "ld1b { z27.b }, p2/Z, [x28, x14]\n"
+    "ld1b { z26.b }, p2/Z, [x26, x14]\n"
+    "ld1b { z25.b }, p2/Z, [x23, x14]\n"
+    "ld1b { z24.b }, p2/Z, [x22, x14]\n"
+    "ld1b { z23.b }, p2/Z, [x20, x14]\n"
+    "incw x14\n"
+    "whilelt p2.b, x14, x15\n"
     "b.none 2f\n"
     "1:"  // Vector: Loop
     "movprfx z22, z31\n umax z22.b, p1/M, z22.b, z30.b\n"
     "movprfx z21, z30\n umax z21.b, p1/M, z21.b, z29.b\n"
-    "ld1b { z31.b }, p2/Z, [x26, x13]\n"
-    "ld1b { z30.b }, p2/Z, [x23, x13]\n"
+    "ld1b { z31.b }, p2/Z, [x27, x14]\n"
+    "ld1b { z30.b }, p2/Z, [x24, x14]\n"
     "movprfx z20, z28\n umax z20.b, p1/M, z20.b, z27.b\n"
-    "movprfx z17, z26\n umax z17.b, p1/M, z17.b, z25.b\n"
-    "ld1b { z29.b }, p2/Z, [x20, x13]\n"
-    "ld1b { z27.b }, p2/Z, [x27, x13]\n"
-    "movprfx z19, z24\n umax z19.b, p1/M, z19.b, z28.b\n"
-    "movprfx z18, z26\n umax z18.b, p1/M, z18.b, z23.b\n"
-    "ld1b { z28.b }, p2/Z, [x24, x13]\n"
-    "ld1b { z26.b }, p2/Z, [x22, x13]\n"
-    "ld1b { z25.b }, p2/Z, [x25, x13]\n"
-    "ld1b { z24.b }, p2/Z, [x21, x13]\n"
-    "whilelt p0.b, x10, x14\n"
+    "movprfx z19, z26\n umax z19.b, p1/M, z19.b, z25.b\n"
+    "ld1b { z29.b }, p2/Z, [x21, x14]\n"
+    "ld1b { z27.b }, p2/Z, [x28, x14]\n"
+    "movprfx z17, z28\n umax z17.b, p1/M, z17.b, z24.b\n"
+    "movprfx z18, z25\n umax z18.b, p1/M, z18.b, z23.b\n"
+    "ld1b { z28.b }, p2/Z, [x25, x14]\n"
+    "ld1b { z26.b }, p2/Z, [x26, x14]\n"
+    "ld1b { z25.b }, p2/Z, [x23, x14]\n"
+    "ld1b { z24.b }, p2/Z, [x22, x14]\n"
+    "whilelt p0.b, x11, x15\n"
     "movprfx z16, z22\n umax z16.b, p1/M, z16.b, z20.b\n"
-    "ld1b { z23.b }, p2/Z, [x19, x13]\n"
-    "incw x13\n"
-    "whilelt p2.b, x13, x14\n"
-    "st1b { z16.b }, p0, [x12, x10]\n"
-    "movprfx z16, z17\n umax z16.b, p1/M, z16.b, z22.b\n"
-    "movprfx z17, z21\n umax z17.b, p1/M, z17.b, z19.b\n"
-    "st1b { z16.b }, p0, [x11, x10]\n"
-    "movprfx z16, z21\n umax z16.b, p1/M, z16.b, z18.b\n"
-    "st1b { z17.b }, p0, [x9, x10]\n"
-    "st1b { z16.b }, p0, [x28, x10]\n"
-    "incw x10\n"
+    "ld1b { z23.b }, p2/Z, [x20, x14]\n"
+    "incw x14\n"
+    "whilelt p2.b, x14, x15\n"
+    "st1b { z16.b }, p0, [x13, x11]\n"
+    "movprfx z16, z19\n umax z16.b, p1/M, z16.b, z22.b\n"
+    "umax z17.b, p1/M, z17.b, z21.b\n"
+    "st1b { z16.b }, p0, [x12, x11]\n"
+    "movprfx z16, z18\n umax z16.b, p1/M, z16.b, z21.b\n"
+    "st1b { z17.b }, p0, [x10, x11]\n"
+    "st1b { z16.b }, p0, [x9, x11]\n"
+    "incw x11\n"
     "b.any 1b\n"
     "2:"  // Vector: Tail
     "movprfx z22, z31\n umax z22.b, p1/M, z22.b, z30.b\n"
     "movprfx z21, z30\n umax z21.b, p1/M, z21.b, z29.b\n"
     "movprfx z20, z28\n umax z20.b, p1/M, z20.b, z27.b\n"
-    "movprfx z17, z26\n umax z17.b, p1/M, z17.b, z25.b\n"
-    "movprfx z19, z24\n umax z19.b, p1/M, z19.b, z28.b\n"
-    "movprfx z18, z26\n umax z18.b, p1/M, z18.b, z23.b\n"
-    "whilelt p0.b, x10, x14\n"
+    "movprfx z19, z26\n umax z19.b, p1/M, z19.b, z25.b\n"
+    "movprfx z17, z28\n umax z17.b, p1/M, z17.b, z24.b\n"
+    "movprfx z18, z25\n umax z18.b, p1/M, z18.b, z23.b\n"
+    "whilelt p0.b, x11, x15\n"
     "movprfx z16, z22\n umax z16.b, p1/M, z16.b, z20.b\n"
-    "st1b { z16.b }, p0, [x12, x10]\n"
-    "movprfx z16, z17\n umax z16.b, p1/M, z16.b, z22.b\n"
-    "movprfx z17, z21\n umax z17.b, p1/M, z17.b, z19.b\n"
-    "st1b { z16.b }, p0, [x11, x10]\n"
-    "movprfx z16, z21\n umax z16.b, p1/M, z16.b, z18.b\n"
-    "st1b { z17.b }, p0, [x9, x10]\n"
-    "st1b { z16.b }, p0, [x28, x10]\n"
+    "st1b { z16.b }, p0, [x13, x11]\n"
+    "movprfx z16, z19\n umax z16.b, p1/M, z16.b, z22.b\n"
+    "umax z17.b, p1/M, z17.b, z21.b\n"
+    "st1b { z16.b }, p0, [x12, x11]\n"
+    "movprfx z16, z18\n umax z16.b, p1/M, z16.b, z21.b\n"
+    "st1b { z17.b }, p0, [x10, x11]\n"
+    "st1b { z16.b }, p0, [x9, x11]\n"
     :
     : [args] "r" (&args), [offsetof_inptrs] "I" (offsetof(KernelArgs, inptrs)), [offsetof_n_channels] "I" (offsetof(KernelArgs, n_channels)), [offsetof_outptrs] "I" (offsetof(KernelArgs, outptrs))
-    : "cc", "memory", "p0", "p1", "p2", "x9", "x10", "x11", "x12", "x13", "x14", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+    : "cc", "memory", "p0", "p1", "p2", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
   );
 }
 
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_u8_nhwc_max_generic_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_u8_nhwc_max_generic_depthfirst/generic.cpp
index 0db1ad17f2..34aa5a3dd6 100644
--- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_u8_nhwc_max_generic_depthfirst/generic.cpp
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_u8_nhwc_max_generic_depthfirst/generic.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2021-2022 Arm Limited.
+ * Copyright (c) 2021-2023 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -40,82 +40,82 @@ void sve_u8_nhwc_max_generic_depthfirst_impl(
 )
 {
   __asm__ __volatile__(
-    "mov x28, #0x0\n"
-    "cntb x27\n"
-    "cntb x26, ALL, MUL #2\n"
-    "cntb x25, ALL, MUL #3\n"
-    "whilelt p4.b, x28, %x[n_channels]\n"
-    "whilelt p3.b, x27, %x[n_channels]\n"
-    "whilelt p2.b, x26, %x[n_channels]\n"
-    "whilelt p1.b, x25, %x[n_channels]\n"
+    "mov x9, #0x0\n"
+    "cntb x28\n"
+    "cntb x27, ALL, MUL #2\n"
+    "cntb x26, ALL, MUL #3\n"
+    "whilelt p4.b, x9, %x[n_channels]\n"
+    "whilelt p3.b, x28, %x[n_channels]\n"
+    "whilelt p2.b, x27, %x[n_channels]\n"
+    "whilelt p1.b, x26, %x[n_channels]\n"
     "ptrue p0.b\n"
     "b.none 7f\n"
     "1:"  // 4-vectors of channels
-    "lsr x24, %x[n_valid_cells], #0x2\n"
+    "lsr x25, %x[n_valid_cells], #0x2\n"
     "mov z8.b, #0x0\n"
     "mov z7.b, #0x0\n"
-    "mov x19, %x[inptrs]\n"
+    "mov x20, %x[inptrs]\n"
     "mov z6.b, #0x0\n"
     "mov z5.b, #0x0\n"
-    "cbz x24, 4f\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
-    "subs x24, x24, #0x1\n"
-    "add x19, x19, #0x20\n"
-    "ld1b { z4.b }, p4/Z, [x23, x28]\n"
-    "ld1b { z3.b }, p4/Z, [x22, x28]\n"
-    "ld1b { z2.b }, p4/Z, [x21, x28]\n"
-    "ld1b { z1.b }, p4/Z, [x20, x28]\n"
-    "ld1b { z0.b }, p3/Z, [x23, x27]\n"
-    "ld1b { z31.b }, p3/Z, [x22, x27]\n"
-    "ld1b { z22.b }, p3/Z, [x21, x27]\n"
-    "ld1b { z30.b }, p3/Z, [x20, x27]\n"
-    "ld1b { z29.b }, p2/Z, [x23, x26]\n"
-    "ld1b { z28.b }, p2/Z, [x22, x26]\n"
-    "ld1b { z21.b }, p2/Z, [x21, x26]\n"
-    "ld1b { z27.b }, p2/Z, [x20, x26]\n"
-    "ld1b { z26.b }, p1/Z, [x23, x25]\n"
-    "ld1b { z25.b }, p1/Z, [x22, x25]\n"
-    "ld1b { z20.b }, p1/Z, [x21, x25]\n"
-    "ld1b { z24.b }, p1/Z, [x20, x25]\n"
+    "cbz x25, 4f\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "subs x25, x25, #0x1\n"
+    "add x20, x20, #0x20\n"
+    "ld1b { z4.b }, p4/Z, [x24, x9]\n"
+    "ld1b { z3.b }, p4/Z, [x23, x9]\n"
+    "ld1b { z2.b }, p4/Z, [x22, x9]\n"
+    "ld1b { z1.b }, p4/Z, [x21, x9]\n"
+    "ld1b { z0.b }, p3/Z, [x24, x28]\n"
+    "ld1b { z31.b }, p3/Z, [x23, x28]\n"
+    "ld1b { z22.b }, p3/Z, [x22, x28]\n"
+    "ld1b { z30.b }, p3/Z, [x21, x28]\n"
+    "ld1b { z29.b }, p2/Z, [x24, x27]\n"
+    "ld1b { z28.b }, p2/Z, [x23, x27]\n"
+    "ld1b { z21.b }, p2/Z, [x22, x27]\n"
+    "ld1b { z27.b }, p2/Z, [x21, x27]\n"
+    "ld1b { z26.b }, p1/Z, [x24, x26]\n"
+    "ld1b { z25.b }, p1/Z, [x23, x26]\n"
+    "ld1b { z20.b }, p1/Z, [x22, x26]\n"
+    "ld1b { z24.b }, p1/Z, [x21, x26]\n"
     "beq 3f\n"
     "2:"  // 4-vectors of channels: 4 inputs loop
     "movprfx z19, z4\n umax z19.b, p0/M, z19.b, z3.b\n"
     "movprfx z23, z2\n umax z23.b, p0/M, z23.b, z1.b\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
     "movprfx z18, z0\n umax z18.b, p0/M, z18.b, z31.b\n"
     "umax z22.b, p0/M, z22.b, z30.b\n"
-    "ld1b { z4.b }, p4/Z, [x23, x28]\n"
-    "ld1b { z3.b }, p4/Z, [x22, x28]\n"
+    "ld1b { z4.b }, p4/Z, [x24, x9]\n"
+    "ld1b { z3.b }, p4/Z, [x23, x9]\n"
     "movprfx z17, z29\n umax z17.b, p0/M, z17.b, z28.b\n"
     "umax z21.b, p0/M, z21.b, z27.b\n"
-    "ld1b { z2.b }, p4/Z, [x21, x28]\n"
-    "ld1b { z1.b }, p4/Z, [x20, x28]\n"
+    "ld1b { z2.b }, p4/Z, [x22, x9]\n"
+    "ld1b { z1.b }, p4/Z, [x21, x9]\n"
     "movprfx z16, z26\n umax z16.b, p0/M, z16.b, z25.b\n"
     "umax z20.b, p0/M, z20.b, z24.b\n"
-    "ld1b { z0.b }, p3/Z, [x23, x27]\n"
-    "ld1b { z31.b }, p3/Z, [x22, x27]\n"
+    "ld1b { z0.b }, p3/Z, [x24, x28]\n"
+    "ld1b { z31.b }, p3/Z, [x23, x28]\n"
     "umax z19.b, p0/M, z19.b, z23.b\n"
     "umax z18.b, p0/M, z18.b, z22.b\n"
-    "ld1b { z22.b }, p3/Z, [x21, x27]\n"
-    "ld1b { z30.b }, p3/Z, [x20, x27]\n"
+    "ld1b { z22.b }, p3/Z, [x22, x28]\n"
+    "ld1b { z30.b }, p3/Z, [x21, x28]\n"
     "umax z17.b, p0/M, z17.b, z21.b\n"
     "umax z16.b, p0/M, z16.b, z20.b\n"
-    "ld1b { z29.b }, p2/Z, [x23, x26]\n"
-    "ld1b { z28.b }, p2/Z, [x22, x26]\n"
-    "subs x24, x24, #0x1\n"
+    "ld1b { z29.b }, p2/Z, [x24, x27]\n"
+    "ld1b { z28.b }, p2/Z, [x23, x27]\n"
+    "subs x25, x25, #0x1\n"
     "umax z8.b, p0/M, z8.b, z19.b\n"
-    "ld1b { z21.b }, p2/Z, [x21, x26]\n"
-    "ld1b { z27.b }, p2/Z, [x20, x26]\n"
+    "ld1b { z21.b }, p2/Z, [x22, x27]\n"
+    "ld1b { z27.b }, p2/Z, [x21, x27]\n"
     "umax z7.b, p0/M, z7.b, z18.b\n"
     "umax z6.b, p0/M, z6.b, z17.b\n"
-    "ld1b { z26.b }, p1/Z, [x23, x25]\n"
-    "ld1b { z25.b }, p1/Z, [x22, x25]\n"
+    "ld1b { z26.b }, p1/Z, [x24, x26]\n"
+    "ld1b { z25.b }, p1/Z, [x23, x26]\n"
     "umax z5.b, p0/M, z5.b, z16.b\n"
-    "add x19, x19, #0x20\n"
-    "ld1b { z20.b }, p1/Z, [x21, x25]\n"
-    "ld1b { z24.b }, p1/Z, [x20, x25]\n"
+    "add x20, x20, #0x20\n"
+    "ld1b { z20.b }, p1/Z, [x22, x26]\n"
+    "ld1b { z24.b }, p1/Z, [x21, x26]\n"
     "bgt 2b\n"
     "3:"  // 4-vectors of channels: 4 inputs tail
     "movprfx z19, z4\n umax z19.b, p0/M, z19.b, z3.b\n"
@@ -135,61 +135,61 @@ void sve_u8_nhwc_max_generic_depthfirst_impl(
     "umax z6.b, p0/M, z6.b, z17.b\n"
     "umax z5.b, p0/M, z5.b, z16.b\n"
     "4:"  // 4-vectors of channels: After loop
-    "ands x20, %x[n_valid_cells], #0x3\n"
+    "ands x21, %x[n_valid_cells], #0x3\n"
     "beq 6f\n"
     "5:"  // 4-vectors of channels: Single input loop
-    "ldr x23, [x19], #0x8\n"
-    "ld1b { z4.b }, p4/Z, [x23, x28]\n"
-    "subs x20, x20, #0x1\n"
+    "ldr x24, [x20], #0x8\n"
+    "ld1b { z4.b }, p4/Z, [x24, x9]\n"
+    "subs x21, x21, #0x1\n"
     "umax z8.b, p0/M, z8.b, z4.b\n"
-    "ld1b { z0.b }, p3/Z, [x23, x27]\n"
-    "ld1b { z29.b }, p2/Z, [x23, x26]\n"
+    "ld1b { z0.b }, p3/Z, [x24, x28]\n"
+    "ld1b { z29.b }, p2/Z, [x24, x27]\n"
     "umax z7.b, p0/M, z7.b, z0.b\n"
     "umax z6.b, p0/M, z6.b, z29.b\n"
-    "ld1b { z26.b }, p1/Z, [x23, x25]\n"
+    "ld1b { z26.b }, p1/Z, [x24, x26]\n"
     "umax z5.b, p0/M, z5.b, z26.b\n"
     "bgt 5b\n"
     "6:"  // 4-vectors of channels: Single input loop: End
-    "st1b { z8.b }, p4, [%x[outptr], x28]\n"
+    "st1b { z8.b }, p4, [%x[outptr], x9]\n"
+    "incb x9, ALL, MUL #4\n"
+    "st1b { z7.b }, p3, [%x[outptr], x28]\n"
     "incb x28, ALL, MUL #4\n"
-    "st1b { z7.b }, p3, [%x[outptr], x27]\n"
+    "st1b { z6.b }, p2, [%x[outptr], x27]\n"
     "incb x27, ALL, MUL #4\n"
-    "st1b { z6.b }, p2, [%x[outptr], x26]\n"
+    "st1b { z5.b }, p1, [%x[outptr], x26]\n"
     "incb x26, ALL, MUL #4\n"
-    "st1b { z5.b }, p1, [%x[outptr], x25]\n"
-    "incb x25, ALL, MUL #4\n"
-    "whilelt p1.b, x25, %x[n_channels]\n"
+    "whilelt p1.b, x26, %x[n_channels]\n"
     "b.any 1b\n"
     "7:"  // Single vector of channels
-    "whilelt p4.b, x28, %x[n_channels]\n"
+    "whilelt p4.b, x9, %x[n_channels]\n"
     "b.none 14f\n"
     "8:"  // Single vector of channels: Loop
-    "lsr x24, %x[n_valid_cells], #0x2\n"
+    "lsr x25, %x[n_valid_cells], #0x2\n"
     "mov z8.b, #0x0\n"
-    "mov x19, %x[inptrs]\n"
-    "cbz x24, 11f\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
-    "subs x24, x24, #0x1\n"
-    "add x19, x19, #0x20\n"
-    "ld1b { z4.b }, p4/Z, [x23, x28]\n"
-    "ld1b { z3.b }, p4/Z, [x22, x28]\n"
-    "ld1b { z2.b }, p4/Z, [x21, x28]\n"
-    "ld1b { z1.b }, p4/Z, [x20, x28]\n"
+    "mov x20, %x[inptrs]\n"
+    "cbz x25, 11f\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "subs x25, x25, #0x1\n"
+    "add x20, x20, #0x20\n"
+    "ld1b { z4.b }, p4/Z, [x24, x9]\n"
+    "ld1b { z3.b }, p4/Z, [x23, x9]\n"
+    "ld1b { z2.b }, p4/Z, [x22, x9]\n"
+    "ld1b { z1.b }, p4/Z, [x21, x9]\n"
     "beq 10f\n"
     "9:"  // Single vector of channels: Loop: 4 inputs loop
     "movprfx z19, z4\n umax z19.b, p0/M, z19.b, z3.b\n"
     "movprfx z23, z2\n umax z23.b, p0/M, z23.b, z1.b\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
     "umax z19.b, p0/M, z19.b, z23.b\n"
-    "subs x24, x24, #0x1\n"
-    "ld1b { z4.b }, p4/Z, [x23, x28]\n"
-    "ld1b { z3.b }, p4/Z, [x22, x28]\n"
+    "subs x25, x25, #0x1\n"
+    "ld1b { z4.b }, p4/Z, [x24, x9]\n"
+    "ld1b { z3.b }, p4/Z, [x23, x9]\n"
     "umax z8.b, p0/M, z8.b, z19.b\n"
-    "add x19, x19, #0x20\n"
-    "ld1b { z2.b }, p4/Z, [x21, x28]\n"
-    "ld1b { z1.b }, p4/Z, [x20, x28]\n"
+    "add x20, x20, #0x20\n"
+    "ld1b { z2.b }, p4/Z, [x22, x9]\n"
+    "ld1b { z1.b }, p4/Z, [x21, x9]\n"
     "bgt 9b\n"
     "10:"  // Single vector of channels: Loop: 4 inputs tail
     "movprfx z19, z4\n umax z19.b, p0/M, z19.b, z3.b\n"
@@ -197,23 +197,23 @@ void sve_u8_nhwc_max_generic_depthfirst_impl(
     "umax z19.b, p0/M, z19.b, z23.b\n"
     "umax z8.b, p0/M, z8.b, z19.b\n"
     "11:"  // Single vector of channels: Loop: After loop
-    "ands x20, %x[n_valid_cells], #0x3\n"
+    "ands x21, %x[n_valid_cells], #0x3\n"
     "beq 13f\n"
     "12:"  // Single vector of channels: Loop: Single input loop
-    "ldr x23, [x19], #0x8\n"
-    "ld1b { z4.b }, p4/Z, [x23, x28]\n"
-    "subs x20, x20, #0x1\n"
+    "ldr x24, [x20], #0x8\n"
+    "ld1b { z4.b }, p4/Z, [x24, x9]\n"
+    "subs x21, x21, #0x1\n"
     "umax z8.b, p0/M, z8.b, z4.b\n"
     "bgt 12b\n"
     "13:"  // Single vector of channels: Loop: Single input loop: End
-    "st1b { z8.b }, p4, [%x[outptr], x28]\n"
-    "incb x28\n"
-    "whilelt p4.b, x28, %x[n_channels]\n"
+    "st1b { z8.b }, p4, [%x[outptr], x9]\n"
+    "incb x9\n"
+    "whilelt p4.b, x9, %x[n_channels]\n"
     "b.any 8b\n"
     "14:"  // End
     :
     : [inptrs] "r" (inptrs), [n_channels] "r" (n_channels), [n_valid_cells] "r" (n_valid_cells), [outptr] "r" (outptr)
-    : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+    : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "x9", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
   );
 }
 
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_u8q_nhwc_avg_generic_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_u8q_nhwc_avg_generic_depthfirst/generic.cpp
index 903ada3462..36ac381004 100644
--- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_u8q_nhwc_avg_generic_depthfirst/generic.cpp
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_u8q_nhwc_avg_generic_depthfirst/generic.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2021-2022 Arm Limited.
+ * Copyright (c) 2021-2023 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -119,24 +119,24 @@ void sve_u8q_nhwc_avg_generic_depthfirst_impl(
   );
 
   __asm__ __volatile__(
-    "mov x26, #0x0\n"
-    "cntb x25\n"
-    "cntb x24, ALL, MUL #2\n"
-    "cntb x23, ALL, MUL #3\n"
-    "whilelt p4.b, x26, %x[n_channels]\n"
-    "whilelt p3.b, x25, %x[n_channels]\n"
-    "whilelt p2.b, x24, %x[n_channels]\n"
-    "whilelt p1.b, x23, %x[n_channels]\n"
+    "mov x27, #0x0\n"
+    "cntb x26\n"
+    "cntb x25, ALL, MUL #2\n"
+    "cntb x24, ALL, MUL #3\n"
+    "whilelt p4.b, x27, %x[n_channels]\n"
+    "whilelt p3.b, x26, %x[n_channels]\n"
+    "whilelt p2.b, x25, %x[n_channels]\n"
+    "whilelt p1.b, x24, %x[n_channels]\n"
     "ptrue p0.b\n"
     "b.none 7f\n"
     "1:"  // 4-vectors of channels
     "ld1rw { z15.s }, p0/Z, [%x[accumulator_init]]\n"
-    "lsr x22, %x[n_valid_cells], #0x1\n"
+    "lsr x23, %x[n_valid_cells], #0x1\n"
     "mov z14.d, z15.d\n"
     "mov z13.d, z15.d\n"
     "mov z12.d, z15.d\n"
     "mov z11.d, z15.d\n"
-    "mov x19, %x[inptrs]\n"
+    "mov x20, %x[inptrs]\n"
     "mov z10.d, z15.d\n"
     "mov z9.d, z15.d\n"
     "mov z8.d, z15.d\n"
@@ -148,43 +148,43 @@ void sve_u8q_nhwc_avg_generic_depthfirst_impl(
     "mov z2.d, z15.d\n"
     "mov z1.d, z15.d\n"
     "mov z0.d, z15.d\n"
-    "cbz x22, 4f\n"
-    "ldp x21, x20, [x19, #0x0]\n"
-    "subs x22, x22, #0x1\n"
-    "add x19, x19, #0x10\n"
-    "ld1b { z31.b }, p4/Z, [x21, x26]\n"
-    "ld1b { z30.b }, p4/Z, [x20, x26]\n"
-    "ld1b { z29.b }, p3/Z, [x21, x25]\n"
-    "ld1b { z28.b }, p3/Z, [x20, x25]\n"
-    "ld1b { z27.b }, p2/Z, [x21, x24]\n"
-    "ld1b { z26.b }, p2/Z, [x20, x24]\n"
-    "ld1b { z25.b }, p1/Z, [x21, x23]\n"
-    "ld1b { z24.b }, p1/Z, [x20, x23]\n"
+    "cbz x23, 4f\n"
+    "ldp x22, x21, [x20, #0x0]\n"
+    "subs x23, x23, #0x1\n"
+    "add x20, x20, #0x10\n"
+    "ld1b { z31.b }, p4/Z, [x22, x27]\n"
+    "ld1b { z30.b }, p4/Z, [x21, x27]\n"
+    "ld1b { z29.b }, p3/Z, [x22, x26]\n"
+    "ld1b { z28.b }, p3/Z, [x21, x26]\n"
+    "ld1b { z27.b }, p2/Z, [x22, x25]\n"
+    "ld1b { z26.b }, p2/Z, [x21, x25]\n"
+    "ld1b { z25.b }, p1/Z, [x22, x24]\n"
+    "ld1b { z24.b }, p1/Z, [x21, x24]\n"
     "beq 3f\n"
     "2:"  // 4-vectors of channels: 2 inputs loop
     ".inst 0x455e0bf7  // uaddlb z23.h, z31.b, z30.b\n"
     ".inst 0x455e0ff6  // uaddlt z22.h, z31.b, z30.b\n"
-    "ldp x21, x20, [x19, #0x0]\n"
-    "subs x22, x22, #0x1\n"
+    "ldp x22, x21, [x20, #0x0]\n"
+    "subs x23, x23, #0x1\n"
     ".inst 0x455c0bb5  // uaddlb z21.h, z29.b, z28.b\n"
     ".inst 0x455c0fb4  // uaddlt z20.h, z29.b, z28.b\n"
-    "add x19, x19, #0x10\n"
-    "ld1b { z31.b }, p4/Z, [x21, x26]\n"
+    "add x20, x20, #0x10\n"
+    "ld1b { z31.b }, p4/Z, [x22, x27]\n"
     ".inst 0x455a0b73  // uaddlb z19.h, z27.b, z26.b\n"
     ".inst 0x455a0f72  // uaddlt z18.h, z27.b, z26.b\n"
-    "ld1b { z30.b }, p4/Z, [x20, x26]\n"
-    "ld1b { z29.b }, p3/Z, [x21, x25]\n"
+    "ld1b { z30.b }, p4/Z, [x21, x27]\n"
+    "ld1b { z29.b }, p3/Z, [x22, x26]\n"
     ".inst 0x45580b31  // uaddlb z17.h, z25.b, z24.b\n"
     ".inst 0x45580f30  // uaddlt z16.h, z25.b, z24.b\n"
-    "ld1b { z28.b }, p3/Z, [x20, x25]\n"
-    "ld1b { z27.b }, p2/Z, [x21, x24]\n"
+    "ld1b { z28.b }, p3/Z, [x21, x26]\n"
+    "ld1b { z27.b }, p2/Z, [x22, x25]\n"
     ".inst 0x459749ef  // uaddwb z15.s, z15.s, z23.h\n"
     ".inst 0x45974dce  // uaddwt z14.s, z14.s, z23.h\n"
-    "ld1b { z26.b }, p2/Z, [x20, x24]\n"
-    "ld1b { z25.b }, p1/Z, [x21, x23]\n"
+    "ld1b { z26.b }, p2/Z, [x21, x25]\n"
+    "ld1b { z25.b }, p1/Z, [x22, x24]\n"
     ".inst 0x459649ad  // uaddwb z13.s, z13.s, z22.h\n"
     ".inst 0x45964d8c  // uaddwt z12.s, z12.s, z22.h\n"
-    "ld1b { z24.b }, p1/Z, [x20, x23]\n"
+    "ld1b { z24.b }, p1/Z, [x21, x24]\n"
     ".inst 0x4595496b  // uaddwb z11.s, z11.s, z21.h\n"
     ".inst 0x45954d4a  // uaddwt z10.s, z10.s, z21.h\n"
     ".inst 0x45944929  // uaddwb z9.s, z9.s, z20.h\n"
@@ -224,21 +224,21 @@ void sve_u8q_nhwc_avg_generic_depthfirst_impl(
     ".inst 0x45904821  // uaddwb z1.s, z1.s, z16.h\n"
     ".inst 0x45904c00  // uaddwt z0.s, z0.s, z16.h\n"
     "4:"  // 4-vectors of channels: After loop
-    "ands x20, %x[n_valid_cells], #0x1\n"
+    "ands x21, %x[n_valid_cells], #0x1\n"
     "beq 6f\n"
     "5:"  // 4-vectors of channels: Single input loop
-    "ldr x21, [x19], #0x8\n"
-    "ld1b { z31.b }, p4/Z, [x21, x26]\n"
+    "ldr x22, [x20], #0x8\n"
+    "ld1b { z31.b }, p4/Z, [x22, x27]\n"
     ".inst 0x4508abf7  // ushllb z23.h, z31.b, #0x0\n"
     ".inst 0x4508aff6  // ushllt z22.h, z31.b, #0x0\n"
-    "ld1b { z29.b }, p3/Z, [x21, x25]\n"
-    "ld1b { z27.b }, p2/Z, [x21, x24]\n"
+    "ld1b { z29.b }, p3/Z, [x22, x26]\n"
+    "ld1b { z27.b }, p2/Z, [x22, x25]\n"
     ".inst 0x4508abb5  // ushllb z21.h, z29.b, #0x0\n"
     ".inst 0x4508afb4  // ushllt z20.h, z29.b, #0x0\n"
-    "ld1b { z25.b }, p1/Z, [x21, x23]\n"
+    "ld1b { z25.b }, p1/Z, [x22, x24]\n"
     ".inst 0x4508ab73  // ushllb z19.h, z27.b, #0x0\n"
     ".inst 0x4508af72  // ushllt z18.h, z27.b, #0x0\n"
-    "subs x20, x20, #0x1\n"
+    "subs x21, x21, #0x1\n"
     ".inst 0x4508ab31  // ushllb z17.h, z25.b, #0x0\n"
     ".inst 0x4508af30  // ushllt z16.h, z25.b, #0x0\n"
     ".inst 0x459749ef  // uaddwb z15.s, z15.s, z23.h\n"
@@ -293,12 +293,12 @@ void sve_u8q_nhwc_avg_generic_depthfirst_impl(
     ".inst 0x04b07463  // sqrdmulh z3.s, z3.s, z16.s\n"
     ".inst 0x04b07442  // sqrdmulh z2.s, z2.s, z16.s\n"
     ".inst 0x04b07421  // sqrdmulh z1.s, z1.s, z16.s\n"
-    "add x19, %x[quant_params], %[offsetof_qp_output_offset]\n"
+    "add x20, %x[quant_params], %[offsetof_qp_output_offset]\n"
     ".inst 0x4482822f  // srshl z15.s, p0/M, z15.s, z17.s\n"
     ".inst 0x04b07400  // sqrdmulh z0.s, z0.s, z16.s\n"
     ".inst 0x4482822e  // srshl z14.s, p0/M, z14.s, z17.s\n"
     ".inst 0x4482822d  // srshl z13.s, p0/M, z13.s, z17.s\n"
-    "ld1rw { z16.s }, p0/Z, [x19]\n"
+    "ld1rw { z16.s }, p0/Z, [x20]\n"
     ".inst 0x4482822c  // srshl z12.s, p0/M, z12.s, z17.s\n"
     ".inst 0x4482822b  // srshl z11.s, p0/M, z11.s, z17.s\n"
     "add z15.s, z15.s, z16.s\n"
@@ -356,7 +356,7 @@ void sve_u8q_nhwc_avg_generic_depthfirst_impl(
     "smin z11.s, p0/M, z11.s, z18.s\n"
     "smin z10.s, p0/M, z10.s, z18.s\n"
     "trn1 z17.h, z11.h, z10.h\n"
-    "st1b { z16.b }, p4, [%x[outptr], x26]\n"
+    "st1b { z16.b }, p4, [%x[outptr], x27]\n"
     "smin z9.s, p0/M, z9.s, z18.s\n"
     "smin z8.s, p0/M, z8.s, z18.s\n"
     "trn1 z16.h, z9.h, z8.h\n"
@@ -364,7 +364,7 @@ void sve_u8q_nhwc_avg_generic_depthfirst_impl(
     "smin z7.s, p0/M, z7.s, z18.s\n"
     "smin z6.s, p0/M, z6.s, z18.s\n"
     "trn1 z17.h, z7.h, z6.h\n"
-    "st1b { z16.b }, p3, [%x[outptr], x25]\n"
+    "st1b { z16.b }, p3, [%x[outptr], x26]\n"
     "smin z5.s, p0/M, z5.s, z18.s\n"
     "smin z4.s, p0/M, z4.s, z18.s\n"
     "trn1 z16.h, z5.h, z4.h\n"
@@ -372,47 +372,47 @@ void sve_u8q_nhwc_avg_generic_depthfirst_impl(
     "smin z3.s, p0/M, z3.s, z18.s\n"
     "smin z2.s, p0/M, z2.s, z18.s\n"
     "trn1 z17.h, z3.h, z2.h\n"
-    "st1b { z16.b }, p2, [%x[outptr], x24]\n"
+    "st1b { z16.b }, p2, [%x[outptr], x25]\n"
     "smin z1.s, p0/M, z1.s, z18.s\n"
     "smin z0.s, p0/M, z0.s, z18.s\n"
     "trn1 z16.h, z1.h, z0.h\n"
     "trn1 z16.b, z17.b, z16.b\n"
-    "st1b { z16.b }, p1, [%x[outptr], x23]\n"
-    "incb x23, ALL, MUL #4\n"
-    "whilelt p1.b, x23, %x[n_channels]\n"
+    "st1b { z16.b }, p1, [%x[outptr], x24]\n"
+    "incb x24, ALL, MUL #4\n"
+    "whilelt p1.b, x24, %x[n_channels]\n"
+    "incb x27, ALL, MUL #4\n"
     "incb x26, ALL, MUL #4\n"
     "incb x25, ALL, MUL #4\n"
-    "incb x24, ALL, MUL #4\n"
     "b.any 1b\n"
     "7:"  // Single vector of channels
-    "whilelt p4.b, x26, %x[n_channels]\n"
+    "whilelt p4.b, x27, %x[n_channels]\n"
     "b.none 14f\n"
     "8:"  // Single vector of channels: Loop
     "ld1rw { z15.s }, p0/Z, [%x[accumulator_init]]\n"
-    "lsr x22, %x[n_valid_cells], #0x1\n"
+    "lsr x23, %x[n_valid_cells], #0x1\n"
     "mov z14.d, z15.d\n"
     "mov z13.d, z15.d\n"
     "mov z12.d, z15.d\n"
-    "mov x19, %x[inptrs]\n"
-    "cbz x22, 11f\n"
-    "ldp x21, x20, [x19, #0x0]\n"
-    "subs x22, x22, #0x1\n"
-    "add x19, x19, #0x10\n"
-    "ld1b { z31.b }, p4/Z, [x21, x26]\n"
-    "ld1b { z30.b }, p4/Z, [x20, x26]\n"
+    "mov x20, %x[inptrs]\n"
+    "cbz x23, 11f\n"
+    "ldp x22, x21, [x20, #0x0]\n"
+    "subs x23, x23, #0x1\n"
+    "add x20, x20, #0x10\n"
+    "ld1b { z31.b }, p4/Z, [x22, x27]\n"
+    "ld1b { z30.b }, p4/Z, [x21, x27]\n"
     "beq 10f\n"
     "9:"  // Single vector of channels: Loop: 2 inputs loop
     ".inst 0x455e0bf7  // uaddlb z23.h, z31.b, z30.b\n"
     ".inst 0x455e0ff6  // uaddlt z22.h, z31.b, z30.b\n"
-    "ldp x21, x20, [x19, #0x0]\n"
-    "subs x22, x22, #0x1\n"
+    "ldp x22, x21, [x20, #0x0]\n"
+    "subs x23, x23, #0x1\n"
     ".inst 0x459749ef  // uaddwb z15.s, z15.s, z23.h\n"
     ".inst 0x45974dce  // uaddwt z14.s, z14.s, z23.h\n"
-    "add x19, x19, #0x10\n"
-    "ld1b { z31.b }, p4/Z, [x21, x26]\n"
+    "add x20, x20, #0x10\n"
+    "ld1b { z31.b }, p4/Z, [x22, x27]\n"
     ".inst 0x459649ad  // uaddwb z13.s, z13.s, z22.h\n"
     ".inst 0x45964d8c  // uaddwt z12.s, z12.s, z22.h\n"
-    "ld1b { z30.b }, p4/Z, [x20, x26]\n"
+    "ld1b { z30.b }, p4/Z, [x21, x27]\n"
     "bgt 9b\n"
     "10:"  // Single vector of channels: Loop: 2 inputs tail
     ".inst 0x455e0bf7  // uaddlb z23.h, z31.b, z30.b\n"
@@ -422,14 +422,14 @@ void sve_u8q_nhwc_avg_generic_depthfirst_impl(
     ".inst 0x459649ad  // uaddwb z13.s, z13.s, z22.h\n"
     ".inst 0x45964d8c  // uaddwt z12.s, z12.s, z22.h\n"
     "11:"  // Single vector of channels: Loop: After loop
-    "ands x20, %x[n_valid_cells], #0x1\n"
+    "ands x21, %x[n_valid_cells], #0x1\n"
     "beq 13f\n"
     "12:"  // Single vector of channels: Loop: Single input loop
-    "ldr x21, [x19], #0x8\n"
-    "ld1b { z31.b }, p4/Z, [x21, x26]\n"
+    "ldr x22, [x20], #0x8\n"
+    "ld1b { z31.b }, p4/Z, [x22, x27]\n"
     ".inst 0x4508abf7  // ushllb z23.h, z31.b, #0x0\n"
     ".inst 0x4508aff6  // ushllt z22.h, z31.b, #0x0\n"
-    "subs x20, x20, #0x1\n"
+    "subs x21, x21, #0x1\n"
     ".inst 0x459749ef  // uaddwb z15.s, z15.s, z23.h\n"
     ".inst 0x45974dce  // uaddwt z14.s, z14.s, z23.h\n"
     ".inst 0x459649ad  // uaddwb z13.s, z13.s, z22.h\n"
@@ -446,12 +446,12 @@ void sve_u8q_nhwc_avg_generic_depthfirst_impl(
     ".inst 0x04b075ef  // sqrdmulh z15.s, z15.s, z16.s\n"
     ".inst 0x04b075ce  // sqrdmulh z14.s, z14.s, z16.s\n"
     ".inst 0x04b075ad  // sqrdmulh z13.s, z13.s, z16.s\n"
-    "add x19, %x[quant_params], %[offsetof_qp_output_offset]\n"
+    "add x20, %x[quant_params], %[offsetof_qp_output_offset]\n"
     ".inst 0x4482822f  // srshl z15.s, p0/M, z15.s, z17.s\n"
     ".inst 0x04b0758c  // sqrdmulh z12.s, z12.s, z16.s\n"
     ".inst 0x4482822e  // srshl z14.s, p0/M, z14.s, z17.s\n"
     ".inst 0x4482822d  // srshl z13.s, p0/M, z13.s, z17.s\n"
-    "ld1rw { z16.s }, p0/Z, [x19]\n"
+    "ld1rw { z16.s }, p0/Z, [x20]\n"
     ".inst 0x4482822c  // srshl z12.s, p0/M, z12.s, z17.s\n"
     "add z15.s, z15.s, z16.s\n"
     "add z14.s, z14.s, z16.s\n"
@@ -470,14 +470,14 @@ void sve_u8q_nhwc_avg_generic_depthfirst_impl(
     "smin z12.s, p0/M, z12.s, z18.s\n"
     "trn1 z16.h, z13.h, z12.h\n"
     "trn1 z16.b, z17.b, z16.b\n"
-    "st1b { z16.b }, p4, [%x[outptr], x26]\n"
-    "incb x26\n"
-    "whilelt p4.b, x26, %x[n_channels]\n"
+    "st1b { z16.b }, p4, [%x[outptr], x27]\n"
+    "incb x27\n"
+    "whilelt p4.b, x27, %x[n_channels]\n"
     "b.any 8b\n"
     "14:"  // End
     :
     : [accumulator_init] "r" (&accumulator_init), [combined_rescale_value] "r" (&combined_rescale_value), [inptrs] "r" (inptrs), [left_shift] "r" (&left_shift), [n_channels] "r" (n_channels), [n_valid_cells] "r" (n_valid_cells), [offsetof_qp_output_offset] "I" (offsetof(Requantize32, output_offset)), [outptr] "r" (outptr), [quant_params] "r" (&qp), [right_shift] "r" (&right_shift)
-    : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+    : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z9", "z10", "z11", "z12", "z13", "z14", "z15", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
   );
 }
 
diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_u8q_nhwc_max_generic_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_u8q_nhwc_max_generic_depthfirst/generic.cpp
index 26d2152561..a00cbc59d8 100644
--- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_u8q_nhwc_max_generic_depthfirst/generic.cpp
+++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_u8q_nhwc_max_generic_depthfirst/generic.cpp
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2021-2022 Arm Limited.
+ * Copyright (c) 2021-2023 Arm Limited.
  *
  * SPDX-License-Identifier: MIT
  *
@@ -42,82 +42,82 @@ void sve_u8q_nhwc_max_generic_depthfirst_impl(
 )
 {
   __asm__ __volatile__(
-    "mov x28, #0x0\n"
-    "cntb x27\n"
-    "cntb x26, ALL, MUL #2\n"
-    "cntb x25, ALL, MUL #3\n"
-    "whilelt p4.b, x28, %x[n_channels]\n"
-    "whilelt p3.b, x27, %x[n_channels]\n"
-    "whilelt p2.b, x26, %x[n_channels]\n"
-    "whilelt p1.b, x25, %x[n_channels]\n"
+    "mov x9, #0x0\n"
+    "cntb x28\n"
+    "cntb x27, ALL, MUL #2\n"
+    "cntb x26, ALL, MUL #3\n"
+    "whilelt p4.b, x9, %x[n_channels]\n"
+    "whilelt p3.b, x28, %x[n_channels]\n"
+    "whilelt p2.b, x27, %x[n_channels]\n"
+    "whilelt p1.b, x26, %x[n_channels]\n"
     "ptrue p0.b\n"
     "b.none 7f\n"
     "1:"  // 4-vectors of channels
-    "lsr x24, %x[n_valid_cells], #0x2\n"
+    "lsr x25, %x[n_valid_cells], #0x2\n"
     "mov z8.b, #0x0\n"
     "mov z7.b, #0x0\n"
-    "mov x19, %x[inptrs]\n"
+    "mov x20, %x[inptrs]\n"
     "mov z6.b, #0x0\n"
     "mov z5.b, #0x0\n"
-    "cbz x24, 4f\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
-    "subs x24, x24, #0x1\n"
-    "add x19, x19, #0x20\n"
-    "ld1b { z4.b }, p4/Z, [x23, x28]\n"
-    "ld1b { z3.b }, p4/Z, [x22, x28]\n"
-    "ld1b { z2.b }, p4/Z, [x21, x28]\n"
-    "ld1b { z1.b }, p4/Z, [x20, x28]\n"
-    "ld1b { z0.b }, p3/Z, [x23, x27]\n"
-    "ld1b { z31.b }, p3/Z, [x22, x27]\n"
-    "ld1b { z22.b }, p3/Z, [x21, x27]\n"
-    "ld1b { z30.b }, p3/Z, [x20, x27]\n"
-    "ld1b { z29.b }, p2/Z, [x23, x26]\n"
-    "ld1b { z28.b }, p2/Z, [x22, x26]\n"
-    "ld1b { z21.b }, p2/Z, [x21, x26]\n"
-    "ld1b { z27.b }, p2/Z, [x20, x26]\n"
-    "ld1b { z26.b }, p1/Z, [x23, x25]\n"
-    "ld1b { z25.b }, p1/Z, [x22, x25]\n"
-    "ld1b { z20.b }, p1/Z, [x21, x25]\n"
-    "ld1b { z24.b }, p1/Z, [x20, x25]\n"
+    "cbz x25, 4f\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "subs x25, x25, #0x1\n"
+    "add x20, x20, #0x20\n"
+    "ld1b { z4.b }, p4/Z, [x24, x9]\n"
+    "ld1b { z3.b }, p4/Z, [x23, x9]\n"
+    "ld1b { z2.b }, p4/Z, [x22, x9]\n"
+    "ld1b { z1.b }, p4/Z, [x21, x9]\n"
+    "ld1b { z0.b }, p3/Z, [x24, x28]\n"
+    "ld1b { z31.b }, p3/Z, [x23, x28]\n"
+    "ld1b { z22.b }, p3/Z, [x22, x28]\n"
+    "ld1b { z30.b }, p3/Z, [x21, x28]\n"
+    "ld1b { z29.b }, p2/Z, [x24, x27]\n"
+    "ld1b { z28.b }, p2/Z, [x23, x27]\n"
+    "ld1b { z21.b }, p2/Z, [x22, x27]\n"
+    "ld1b { z27.b }, p2/Z, [x21, x27]\n"
+    "ld1b { z26.b }, p1/Z, [x24, x26]\n"
+    "ld1b { z25.b }, p1/Z, [x23, x26]\n"
+    "ld1b { z20.b }, p1/Z, [x22, x26]\n"
+    "ld1b { z24.b }, p1/Z, [x21, x26]\n"
     "beq 3f\n"
     "2:"  // 4-vectors of channels: 4 inputs loop
     "movprfx z19, z4\n umax z19.b, p0/M, z19.b, z3.b\n"
     "movprfx z23, z2\n umax z23.b, p0/M, z23.b, z1.b\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
     "movprfx z18, z0\n umax z18.b, p0/M, z18.b, z31.b\n"
     "umax z22.b, p0/M, z22.b, z30.b\n"
-    "ld1b { z4.b }, p4/Z, [x23, x28]\n"
-    "ld1b { z3.b }, p4/Z, [x22, x28]\n"
+    "ld1b { z4.b }, p4/Z, [x24, x9]\n"
+    "ld1b { z3.b }, p4/Z, [x23, x9]\n"
     "movprfx z17, z29\n umax z17.b, p0/M, z17.b, z28.b\n"
     "umax z21.b, p0/M, z21.b, z27.b\n"
-    "ld1b { z2.b }, p4/Z, [x21, x28]\n"
-    "ld1b { z1.b }, p4/Z, [x20, x28]\n"
+    "ld1b { z2.b }, p4/Z, [x22, x9]\n"
+    "ld1b { z1.b }, p4/Z, [x21, x9]\n"
     "movprfx z16, z26\n umax z16.b, p0/M, z16.b, z25.b\n"
     "umax z20.b, p0/M, z20.b, z24.b\n"
-    "ld1b { z0.b }, p3/Z, [x23, x27]\n"
-    "ld1b { z31.b }, p3/Z, [x22, x27]\n"
+    "ld1b { z0.b }, p3/Z, [x24, x28]\n"
+    "ld1b { z31.b }, p3/Z, [x23, x28]\n"
     "umax z19.b, p0/M, z19.b, z23.b\n"
     "umax z18.b, p0/M, z18.b, z22.b\n"
-    "ld1b { z22.b }, p3/Z, [x21, x27]\n"
-    "ld1b { z30.b }, p3/Z, [x20, x27]\n"
+    "ld1b { z22.b }, p3/Z, [x22, x28]\n"
+    "ld1b { z30.b }, p3/Z, [x21, x28]\n"
     "umax z17.b, p0/M, z17.b, z21.b\n"
     "umax z16.b, p0/M, z16.b, z20.b\n"
-    "ld1b { z29.b }, p2/Z, [x23, x26]\n"
-    "ld1b { z28.b }, p2/Z, [x22, x26]\n"
-    "subs x24, x24, #0x1\n"
+    "ld1b { z29.b }, p2/Z, [x24, x27]\n"
+    "ld1b { z28.b }, p2/Z, [x23, x27]\n"
+    "subs x25, x25, #0x1\n"
     "umax z8.b, p0/M, z8.b, z19.b\n"
-    "ld1b { z21.b }, p2/Z, [x21, x26]\n"
-    "ld1b { z27.b }, p2/Z, [x20, x26]\n"
+    "ld1b { z21.b }, p2/Z, [x22, x27]\n"
+    "ld1b { z27.b }, p2/Z, [x21, x27]\n"
     "umax z7.b, p0/M, z7.b, z18.b\n"
     "umax z6.b, p0/M, z6.b, z17.b\n"
-    "ld1b { z26.b }, p1/Z, [x23, x25]\n"
-    "ld1b { z25.b }, p1/Z, [x22, x25]\n"
+    "ld1b { z26.b }, p1/Z, [x24, x26]\n"
+    "ld1b { z25.b }, p1/Z, [x23, x26]\n"
     "umax z5.b, p0/M, z5.b, z16.b\n"
-    "add x19, x19, #0x20\n"
-    "ld1b { z20.b }, p1/Z, [x21, x25]\n"
-    "ld1b { z24.b }, p1/Z, [x20, x25]\n"
+    "add x20, x20, #0x20\n"
+    "ld1b { z20.b }, p1/Z, [x22, x26]\n"
+    "ld1b { z24.b }, p1/Z, [x21, x26]\n"
     "bgt 2b\n"
     "3:"  // 4-vectors of channels: 4 inputs tail
     "movprfx z19, z4\n umax z19.b, p0/M, z19.b, z3.b\n"
@@ -137,37 +137,37 @@ void sve_u8q_nhwc_max_generic_depthfirst_impl(
     "umax z6.b, p0/M, z6.b, z17.b\n"
     "umax z5.b, p0/M, z5.b, z16.b\n"
     "4:"  // 4-vectors of channels: After loop
-    "ands x20, %x[n_valid_cells], #0x3\n"
+    "ands x21, %x[n_valid_cells], #0x3\n"
     "beq 6f\n"
     "5:"  // 4-vectors of channels: Single input loop
-    "ldr x23, [x19], #0x8\n"
-    "ld1b { z4.b }, p4/Z, [x23, x28]\n"
-    "subs x20, x20, #0x1\n"
+    "ldr x24, [x20], #0x8\n"
+    "ld1b { z4.b }, p4/Z, [x24, x9]\n"
+    "subs x21, x21, #0x1\n"
     "umax z8.b, p0/M, z8.b, z4.b\n"
-    "ld1b { z0.b }, p3/Z, [x23, x27]\n"
-    "ld1b { z29.b }, p2/Z, [x23, x26]\n"
+    "ld1b { z0.b }, p3/Z, [x24, x28]\n"
+    "ld1b { z29.b }, p2/Z, [x24, x27]\n"
     "umax z7.b, p0/M, z7.b, z0.b\n"
     "umax z6.b, p0/M, z6.b, z29.b\n"
-    "ld1b { z26.b }, p1/Z, [x23, x25]\n"
+    "ld1b { z26.b }, p1/Z, [x24, x26]\n"
     "umax z5.b, p0/M, z5.b, z26.b\n"
     "bgt 5b\n"
     "6:"  // 4-vectors of channels: Single input loop: End
-    "add x19, %x[quant_params], %[offsetof_qp_input_offset]\n"
-    "ld1rw { z4.s }, p0/Z, [x19]\n"
+    "add x20, %x[quant_params], %[offsetof_qp_input_offset]\n"
+    "ld1rw { z4.s }, p0/Z, [x20]\n"
     ".inst 0x4508a918  // ushllb z24.h, z8.b, #0x0\n"
     ".inst 0x4508ad17  // ushllt z23.h, z8.b, #0x0\n"
     ".inst 0x4508a8f6  // ushllb z22.h, z7.b, #0x0\n"
     ".inst 0x4508acf5  // ushllt z21.h, z7.b, #0x0\n"
     "neg z4.s, p0/M, z4.s\n"
-    "add x19, %x[quant_params], %[offsetof_qp_per_layer_left_shift]\n"
+    "add x20, %x[quant_params], %[offsetof_qp_per_layer_left_shift]\n"
     ".inst 0x4508a8d4  // ushllb z20.h, z6.b, #0x0\n"
     ".inst 0x4508acd3  // ushllt z19.h, z6.b, #0x0\n"
-    "ld1rw { z3.s }, p0/Z, [x19]\n"
-    "add x19, %x[quant_params], %[offsetof_qp_per_layer_mul]\n"
+    "ld1rw { z3.s }, p0/Z, [x20]\n"
+    "add x20, %x[quant_params], %[offsetof_qp_per_layer_mul]\n"
     ".inst 0x4508a8b2  // ushllb z18.h, z5.b, #0x0\n"
     ".inst 0x4508acb1  // ushllt z17.h, z5.b, #0x0\n"
-    "ld1rw { z16.s }, p0/Z, [x19]\n"
-    "add x19, %x[quant_params], %[offsetof_qp_per_layer_right_shift]\n"
+    "ld1rw { z16.s }, p0/Z, [x20]\n"
+    "add x20, %x[quant_params], %[offsetof_qp_per_layer_right_shift]\n"
     ".inst 0x45984082  // saddwb z2.s, z4.s, z24.h\n"
     ".inst 0x45984481  // saddwt z1.s, z4.s, z24.h\n"
     ".inst 0x44828062  // srshl z2.s, p0/M, z2.s, z3.s\n"
@@ -200,10 +200,10 @@ void sve_u8q_nhwc_max_generic_depthfirst_impl(
     ".inst 0x45914493  // saddwt z19.s, z4.s, z17.h\n"
     ".inst 0x44828074  // srshl z20.s, p0/M, z20.s, z3.s\n"
     ".inst 0x44828073  // srshl z19.s, p0/M, z19.s, z3.s\n"
-    "ld1rw { z17.s }, p0/Z, [x19]\n"
+    "ld1rw { z17.s }, p0/Z, [x20]\n"
     ".inst 0x04b07442  // sqrdmulh z2.s, z2.s, z16.s\n"
     ".inst 0x04b07421  // sqrdmulh z1.s, z1.s, z16.s\n"
-    "add x19, %x[quant_params], %[offsetof_qp_output_offset]\n"
+    "add x20, %x[quant_params], %[offsetof_qp_output_offset]\n"
     ".inst 0x04b07400  // sqrdmulh z0.s, z0.s, z16.s\n"
     ".inst 0x04b077ff  // sqrdmulh z31.s, z31.s, z16.s\n"
     ".inst 0x44828222  // srshl z2.s, p0/M, z2.s, z17.s\n"
@@ -234,7 +234,7 @@ void sve_u8q_nhwc_max_generic_depthfirst_impl(
     ".inst 0x44828235  // srshl z21.s, p0/M, z21.s, z17.s\n"
     ".inst 0x44828234  // srshl z20.s, p0/M, z20.s, z17.s\n"
     ".inst 0x44828233  // srshl z19.s, p0/M, z19.s, z17.s\n"
-    "ld1rw { z16.s }, p0/Z, [x19]\n"
+    "ld1rw { z16.s }, p0/Z, [x20]\n"
     "add z2.s, z2.s, z16.s\n"
     "add z1.s, z1.s, z16.s\n"
     "add z0.s, z0.s, z16.s\n"
@@ -279,7 +279,7 @@ void sve_u8q_nhwc_max_generic_depthfirst_impl(
     "smin z30.s, p0/M, z30.s, z18.s\n"
     "smin z29.s, p0/M, z29.s, z18.s\n"
     "trn1 z17.h, z30.h, z29.h\n"
-    "st1b { z16.b }, p4, [%x[outptr], x28]\n"
+    "st1b { z16.b }, p4, [%x[outptr], x9]\n"
     "smin z28.s, p0/M, z28.s, z18.s\n"
     "smin z27.s, p0/M, z27.s, z18.s\n"
     "trn1 z16.h, z28.h, z27.h\n"
@@ -287,7 +287,7 @@ void sve_u8q_nhwc_max_generic_depthfirst_impl(
     "smin z26.s, p0/M, z26.s, z18.s\n"
     "smin z25.s, p0/M, z25.s, z18.s\n"
     "trn1 z17.h, z26.h, z25.h\n"
-    "st1b { z16.b }, p3, [%x[outptr], x27]\n"
+    "st1b { z16.b }, p3, [%x[outptr], x28]\n"
     "smin z24.s, p0/M, z24.s, z18.s\n"
     "smin z23.s, p0/M, z23.s, z18.s\n"
     "trn1 z16.h, z24.h, z23.h\n"
@@ -295,48 +295,48 @@ void sve_u8q_nhwc_max_generic_depthfirst_impl(
     "smin z22.s, p0/M, z22.s, z18.s\n"
     "smin z21.s, p0/M, z21.s, z18.s\n"
     "trn1 z17.h, z22.h, z21.h\n"
-    "st1b { z16.b }, p2, [%x[outptr], x26]\n"
+    "st1b { z16.b }, p2, [%x[outptr], x27]\n"
     "smin z20.s, p0/M, z20.s, z18.s\n"
     "smin z19.s, p0/M, z19.s, z18.s\n"
     "trn1 z16.h, z20.h, z19.h\n"
     "trn1 z16.b, z17.b, z16.b\n"
-    "st1b { z16.b }, p1, [%x[outptr], x25]\n"
-    "incb x25, ALL, MUL #4\n"
-    "whilelt p1.b, x25, %x[n_channels]\n"
+    "st1b { z16.b }, p1, [%x[outptr], x26]\n"
+    "incb x26, ALL, MUL #4\n"
+    "whilelt p1.b, x26, %x[n_channels]\n"
+    "incb x9, ALL, MUL #4\n"
     "incb x28, ALL, MUL #4\n"
     "incb x27, ALL, MUL #4\n"
-    "incb x26, ALL, MUL #4\n"
     "b.any 1b\n"
     "7:"  // Single vector of channels
-    "whilelt p4.b, x28, %x[n_channels]\n"
+    "whilelt p4.b, x9, %x[n_channels]\n"
     "b.none 14f\n"
     "8:"  // Single vector of channels: Loop
-    "lsr x24, %x[n_valid_cells], #0x2\n"
+    "lsr x25, %x[n_valid_cells], #0x2\n"
     "mov z8.b, #0x0\n"
-    "mov x19, %x[inptrs]\n"
-    "cbz x24, 11f\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
-    "subs x24, x24, #0x1\n"
-    "add x19, x19, #0x20\n"
-    "ld1b { z4.b }, p4/Z, [x23, x28]\n"
-    "ld1b { z3.b }, p4/Z, [x22, x28]\n"
-    "ld1b { z2.b }, p4/Z, [x21, x28]\n"
-    "ld1b { z1.b }, p4/Z, [x20, x28]\n"
+    "mov x20, %x[inptrs]\n"
+    "cbz x25, 11f\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
+    "subs x25, x25, #0x1\n"
+    "add x20, x20, #0x20\n"
+    "ld1b { z4.b }, p4/Z, [x24, x9]\n"
+    "ld1b { z3.b }, p4/Z, [x23, x9]\n"
+    "ld1b { z2.b }, p4/Z, [x22, x9]\n"
+    "ld1b { z1.b }, p4/Z, [x21, x9]\n"
     "beq 10f\n"
     "9:"  // Single vector of channels: Loop: 4 inputs loop
     "movprfx z19, z4\n umax z19.b, p0/M, z19.b, z3.b\n"
     "movprfx z23, z2\n umax z23.b, p0/M, z23.b, z1.b\n"
-    "ldp x23, x22, [x19, #0x0]\n"
-    "ldp x21, x20, [x19, #0x10]\n"
+    "ldp x24, x23, [x20, #0x0]\n"
+    "ldp x22, x21, [x20, #0x10]\n"
     "umax z19.b, p0/M, z19.b, z23.b\n"
-    "subs x24, x24, #0x1\n"
-    "ld1b { z4.b }, p4/Z, [x23, x28]\n"
-    "ld1b { z3.b }, p4/Z, [x22, x28]\n"
+    "subs x25, x25, #0x1\n"
+    "ld1b { z4.b }, p4/Z, [x24, x9]\n"
+    "ld1b { z3.b }, p4/Z, [x23, x9]\n"
     "umax z8.b, p0/M, z8.b, z19.b\n"
-    "add x19, x19, #0x20\n"
-    "ld1b { z2.b }, p4/Z, [x21, x28]\n"
-    "ld1b { z1.b }, p4/Z, [x20, x28]\n"
+    "add x20, x20, #0x20\n"
+    "ld1b { z2.b }, p4/Z, [x22, x9]\n"
+    "ld1b { z1.b }, p4/Z, [x21, x9]\n"
     "bgt 9b\n"
     "10:"  // Single vector of channels: Loop: 4 inputs tail
     "movprfx z19, z4\n umax z19.b, p0/M, z19.b, z3.b\n"
@@ -344,28 +344,28 @@ void sve_u8q_nhwc_max_generic_depthfirst_impl(
     "umax z19.b, p0/M, z19.b, z23.b\n"
     "umax z8.b, p0/M, z8.b, z19.b\n"
     "11:"  // Single vector of channels: Loop: After loop
-    "ands x20, %x[n_valid_cells], #0x3\n"
+    "ands x21, %x[n_valid_cells], #0x3\n"
     "beq 13f\n"
     "12:"  // Single vector of channels: Loop: Single input loop
-    "ldr x23, [x19], #0x8\n"
-    "ld1b { z4.b }, p4/Z, [x23, x28]\n"
-    "subs x20, x20, #0x1\n"
+    "ldr x24, [x20], #0x8\n"
+    "ld1b { z4.b }, p4/Z, [x24, x9]\n"
+    "subs x21, x21, #0x1\n"
     "umax z8.b, p0/M, z8.b, z4.b\n"
     "bgt 12b\n"
     "13:"  // Single vector of channels: Loop: Single input loop: End
-    "add x19, %x[quant_params], %[offsetof_qp_input_offset]\n"
-    "ld1rw { z4.s }, p0/Z, [x19]\n"
+    "add x20, %x[quant_params], %[offsetof_qp_input_offset]\n"
+    "ld1rw { z4.s }, p0/Z, [x20]\n"
     ".inst 0x4508a918  // ushllb z24.h, z8.b, #0x0\n"
     ".inst 0x4508ad17  // ushllt z23.h, z8.b, #0x0\n"
     "neg z4.s, p0/M, z4.s\n"
-    "add x19, %x[quant_params], %[offsetof_qp_per_layer_left_shift]\n"
+    "add x20, %x[quant_params], %[offsetof_qp_per_layer_left_shift]\n"
     ".inst 0x45984082  // saddwb z2.s, z4.s, z24.h\n"
     ".inst 0x45984481  // saddwt z1.s, z4.s, z24.h\n"
     ".inst 0x45974080  // saddwb z0.s, z4.s, z23.h\n"
     ".inst 0x4597449f  // saddwt z31.s, z4.s, z23.h\n"
-    "ld1rw { z3.s }, p0/Z, [x19]\n"
-    "add x19, %x[quant_params], %[offsetof_qp_per_layer_mul]\n"
-    "ld1rw { z16.s }, p0/Z, [x19]\n"
+    "ld1rw { z3.s }, p0/Z, [x20]\n"
+    "add x20, %x[quant_params], %[offsetof_qp_per_layer_mul]\n"
+    "ld1rw { z16.s }, p0/Z, [x20]\n"
     ".inst 0x44828062  // srshl z2.s, p0/M, z2.s, z3.s\n"
     ".inst 0x44828061  // srshl z1.s, p0/M, z1.s, z3.s\n"
     ".inst 0x04b07442  // sqrdmulh z2.s, z2.s, z16.s\n"
@@ -373,13 +373,13 @@ void sve_u8q_nhwc_max_generic_depthfirst_impl(
     ".inst 0x4482807f  // srshl z31.s, p0/M, z31.s, z3.s\n"
     ".inst 0x04b07421  // sqrdmulh z1.s, z1.s, z16.s\n"
     ".inst 0x04b07400  // sqrdmulh z0.s, z0.s, z16.s\n"
-    "add x19, %x[quant_params], %[offsetof_qp_per_layer_right_shift]\n"
-    "ld1rw { z17.s }, p0/Z, [x19]\n"
+    "add x20, %x[quant_params], %[offsetof_qp_per_layer_right_shift]\n"
+    "ld1rw { z17.s }, p0/Z, [x20]\n"
     ".inst 0x04b077ff  // sqrdmulh z31.s, z31.s, z16.s\n"
-    "add x19, %x[quant_params], %[offsetof_qp_output_offset]\n"
+    "add x20, %x[quant_params], %[offsetof_qp_output_offset]\n"
     ".inst 0x44828222  // srshl z2.s, p0/M, z2.s, z17.s\n"
     ".inst 0x44828221  // srshl z1.s, p0/M, z1.s, z17.s\n"
-    "ld1rw { z16.s }, p0/Z, [x19]\n"
+    "ld1rw { z16.s }, p0/Z, [x20]\n"
     "add z2.s, z2.s, z16.s\n"
     ".inst 0x44828220  // srshl z0.s, p0/M, z0.s, z17.s\n"
     ".inst 0x4482823f  // srshl z31.s, p0/M, z31.s, z17.s\n"
@@ -399,14 +399,14 @@ void sve_u8q_nhwc_max_generic_depthfirst_impl(
     "smin z31.s, p0/M, z31.s, z18.s\n"
     "trn1 z16.h, z0.h, z31.h\n"
     "trn1 z16.b, z17.b, z16.b\n"
-    "st1b { z16.b }, p4, [%x[outptr], x28]\n"
-    "incb x28\n"
-    "whilelt p4.b, x28, %x[n_channels]\n"
+    "st1b { z16.b }, p4, [%x[outptr], x9]\n"
+    "incb x9\n"
+    "whilelt p4.b, x9, %x[n_channels]\n"
     "b.any 8b\n"
     "14:"  // End
     :
     : [inptrs] "r" (inptrs), [n_channels] "r" (n_channels), [n_valid_cells] "r" (n_valid_cells), [offsetof_qp_input_offset] "I" (offsetof(Requantize32, input_offset)), [offsetof_qp_output_offset] "I" (offsetof(Requantize32, output_offset)), [offsetof_qp_per_layer_left_shift] "I" (offsetof(Requantize32, per_layer_left_shift)), [offsetof_qp_per_layer_mul] "I" (offsetof(Requantize32, per_layer_mul)), [offsetof_qp_per_layer_right_shift] "I" (offsetof(Requantize32, per_layer_right_shift)), [outptr] "r" (outptr), [quant_params] "r" (&qp)
-    : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
+    : "cc", "memory", "p0", "p1", "p2", "p3", "p4", "x9", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31"
   );
 }
 
-- 
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