From cf87f509fc23d02c56569f794a3fb59e1b8be277 Mon Sep 17 00:00:00 2001 From: Michele Di Giorgio Date: Tue, 2 Feb 2021 14:59:09 +0000 Subject: Tweak scheduling use of SQDMULH in quantized AVG pooling Resolves COMPMID-4195 Change-Id: Ie5116c1ddddccafba40432fd4b5245bb27890a88 Signed-off-by: Michele Di Giorgio Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4997 Reviewed-by: TeresaARM Reviewed-by: Manuel Bottini Comments-Addressed: Arm Jenkins Tested-by: Arm Jenkins --- .../generic.cpp | 50 +++++++++++----------- 1 file changed, 25 insertions(+), 25 deletions(-) (limited to 'src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst/generic.cpp') diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst/generic.cpp index 03f1736401..50f5da4c3d 100644 --- a/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst/generic.cpp +++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/sve_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst/generic.cpp @@ -86,22 +86,22 @@ void sve_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst_impl( "mov x4, #0x0\n" "ldr x20, [%x[args], %[offsetof_outptrs]]\n" "mov x5, #0x0\n" + "ldr x6, [%x[args], %[offsetof_inptrs]]\n" "mov x19, #0x4\n" - "ldp x6, x7, [x20, #0x0]\n" + "add x7, %x[args], %[offsetof_rescale]\n" + "ldp x8, x17, [x20, #0x0]\n" + "ldp x16, x15, [x20, #0x10]\n" "whilelt p0.s, XZR, x19\n" - "add x8, %x[args], %[offsetof_rescale]\n" - "ldp x17, x16, [x20, #0x10]\n" + "ldp x14, x13, [x6, #0x0]\n" "whilelt p1.s, x4, x3\n" - "ldr x15, [%x[args], %[offsetof_inptrs]]\n" - "ldp x14, x13, [x15, #0x0]\n" - "ldp x12, x11, [x15, #0x10]\n" - "ldp x10, x9, [x15, #0x20]\n" - "ldp x28, x27, [x15, #0x30]\n" - "ldp x26, x25, [x15, #0x40]\n" - "ldp x24, x23, [x15, #0x50]\n" - "ldp x22, x21, [x15, #0x60]\n" - "ldp x20, x19, [x15, #0x70]\n" - "ld1rqw { z7.s }, p0/Z, [x8]\n" + "ldp x12, x11, [x6, #0x10]\n" + "ldp x10, x9, [x6, #0x20]\n" + "ldp x28, x27, [x6, #0x30]\n" + "ldp x26, x25, [x6, #0x40]\n" + "ldp x24, x23, [x6, #0x50]\n" + "ldp x22, x21, [x6, #0x60]\n" + "ldp x20, x19, [x6, #0x70]\n" + "ld1rqw { z7.s }, p0/Z, [x7]\n" "ld1w { z8.s }, p1/Z, [x9, x4, LSL #2]\n" "ld1w { z6.s }, p1/Z, [x28, x4, LSL #2]\n" "ld1w { z5.s }, p1/Z, [x25, x4, LSL #2]\n" @@ -149,9 +149,9 @@ void sve_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst_impl( "ld1w { z28.s }, p1/Z, [x20, x4, LSL #2]\n" "fadd z16.s, z24.s, z22.s\n" "ld1w { z27.s }, p1/Z, [x14, x4, LSL #2]\n" - "fadd z19.s, z19.s, z21.s\n" + "fadd z19.s, z21.s, z19.s\n" "ld1w { z26.s }, p1/Z, [x11, x4, LSL #2]\n" - "fadd z18.s, z18.s, z21.s\n" + "fadd z18.s, z21.s, z18.s\n" "ld1w { z25.s }, p1/Z, [x22, x4, LSL #2]\n" "fadd z17.s, z17.s, z20.s\n" "ld1w { z24.s }, p1/Z, [x19, x4, LSL #2]\n" @@ -159,13 +159,13 @@ void sve_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst_impl( "fadd z16.s, z20.s, z16.s\n" "whilelt p1.s, x4, x3\n" "fmul z19.s, z19.s, z7.s[0]\n" - "st1w { z19.s }, p0, [x6, x5, LSL #2]\n" + "st1w { z19.s }, p0, [x8, x5, LSL #2]\n" "fmul z18.s, z18.s, z7.s[1]\n" "fmul z17.s, z17.s, z7.s[2]\n" - "st1w { z18.s }, p0, [x7, x5, LSL #2]\n" + "st1w { z18.s }, p0, [x17, x5, LSL #2]\n" "fmul z16.s, z16.s, z7.s[3]\n" - "st1w { z17.s }, p0, [x17, x5, LSL #2]\n" - "st1w { z16.s }, p0, [x16, x5, LSL #2]\n" + "st1w { z17.s }, p0, [x16, x5, LSL #2]\n" + "st1w { z16.s }, p0, [x15, x5, LSL #2]\n" "incw x5\n" "b.any 1b\n" "2:" // Vector: Tail @@ -183,18 +183,18 @@ void sve_fp32_nhwc_avg_3x3_s1_output2x2_depthfirst_impl( "fadd z18.s, z26.s, z22.s\n" "fadd z17.s, z25.s, z23.s\n" "fadd z16.s, z24.s, z22.s\n" - "fadd z19.s, z19.s, z21.s\n" - "fadd z18.s, z18.s, z21.s\n" + "fadd z19.s, z21.s, z19.s\n" + "fadd z18.s, z21.s, z18.s\n" "fadd z17.s, z17.s, z20.s\n" "fadd z16.s, z20.s, z16.s\n" "fmul z19.s, z19.s, z7.s[0]\n" - "st1w { z19.s }, p0, [x6, x5, LSL #2]\n" + "st1w { z19.s }, p0, [x8, x5, LSL #2]\n" "fmul z18.s, z18.s, z7.s[1]\n" "fmul z17.s, z17.s, z7.s[2]\n" - "st1w { z18.s }, p0, [x7, x5, LSL #2]\n" + "st1w { z18.s }, p0, [x17, x5, LSL #2]\n" "fmul z16.s, z16.s, z7.s[3]\n" - "st1w { z17.s }, p0, [x17, x5, LSL #2]\n" - "st1w { z16.s }, p0, [x16, x5, LSL #2]\n" + "st1w { z17.s }, p0, [x16, x5, LSL #2]\n" + "st1w { z16.s }, p0, [x15, x5, LSL #2]\n" : : [args] "r" (&args), [offsetof_inptrs] "I" (offsetof(KernelArgs, inptrs)), [offsetof_n_channels] "I" (offsetof(KernelArgs, n_channels)), [offsetof_outptrs] "I" (offsetof(KernelArgs, outptrs)), [offsetof_rescale] "I" (offsetof(KernelArgs, rescale_vals)) : "cc", "memory", "p0", "p1", "x3", "x4", "x5", "x6", "x7", "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x17", "x19", "x20", "x21", "x22", "x23", "x24", "x25", "x26", "x27", "x28", "z0", "z1", "z2", "z3", "z4", "z5", "z6", "z7", "z8", "z16", "z17", "z18", "z19", "z20", "z21", "z22", "z23", "z24", "z25", "z26", "z27", "z28", "z29", "z30", "z31" -- cgit v1.2.1