From cf87f509fc23d02c56569f794a3fb59e1b8be277 Mon Sep 17 00:00:00 2001 From: Michele Di Giorgio Date: Tue, 2 Feb 2021 14:59:09 +0000 Subject: Tweak scheduling use of SQDMULH in quantized AVG pooling Resolves COMPMID-4195 Change-Id: Ie5116c1ddddccafba40432fd4b5245bb27890a88 Signed-off-by: Michele Di Giorgio Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4997 Reviewed-by: TeresaARM Reviewed-by: Manuel Bottini Comments-Addressed: Arm Jenkins Tested-by: Arm Jenkins --- .../generic.cpp | 60 +++++++++++----------- 1 file changed, 30 insertions(+), 30 deletions(-) (limited to 'src/core/NEON/kernels/arm_conv/pooling/kernels/a64_fp16_nhwc_avg_3x3_s1_output2x2_depthfirst/generic.cpp') diff --git a/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_fp16_nhwc_avg_3x3_s1_output2x2_depthfirst/generic.cpp b/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_fp16_nhwc_avg_3x3_s1_output2x2_depthfirst/generic.cpp index f11bb68c24..89dbf5ce02 100644 --- a/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_fp16_nhwc_avg_3x3_s1_output2x2_depthfirst/generic.cpp +++ b/src/core/NEON/kernels/arm_conv/pooling/kernels/a64_fp16_nhwc_avg_3x3_s1_output2x2_depthfirst/generic.cpp @@ -84,13 +84,12 @@ void a64_fp16_nhwc_avg_3x3_s1_output2x2_depthfirst_impl( __asm__ __volatile__( "ldr x4, [%x[args], %[offsetof_n_channels]]\n" "mov x5, #0x0\n" - "ldr x19, [%x[args], %[offsetof_outptrs]]\n" + "ldr x20, [%x[args], %[offsetof_outptrs]]\n" "mov x6, #0x0\n" - "ldr d8, [%x[args], %[offsetof_rescale]]\n" - "ldp x7, x8, [x19, #0x0]\n" - "cmp x4, #0x8\n" - "ldp x17, x16, [x19, #0x10]\n" "ldr x19, [%x[args], %[offsetof_inptrs]]\n" + "cmp x4, #0x8\n" + "ldp x7, x8, [x20, #0x0]\n" + "ldp x17, x16, [x20, #0x10]\n" "ldp x15, x14, [x19, #0x0]\n" "ldp x13, x12, [x19, #0x10]\n" "ldp x11, x10, [x19, #0x20]\n" @@ -99,12 +98,14 @@ void a64_fp16_nhwc_avg_3x3_s1_output2x2_depthfirst_impl( "ldp x25, x24, [x19, #0x50]\n" "ldp x23, x22, [x19, #0x60]\n" "ldp x21, x20, [x19, #0x70]\n" + "ldr d8, [%x[args], %[offsetof_rescale]]\n" "blt 3f\n" - "lsr x19, x4, #0x3\n" - "sub x4, x4, x19, LSL #3\n" "ldr q7, [x10, x5]\n" + "lsr x19, x4, #0x3\n" "ldr q6, [x9, x5]\n" + "sub x4, x4, x19, LSL #3\n" "ldr q5, [x26, x5]\n" + "subs x19, x19, #0x1\n" "ldr q4, [x25, x5]\n" "ldr q3, [x14, x5]\n" "ldr q2, [x13, x5]\n" @@ -119,26 +120,26 @@ void a64_fp16_nhwc_avg_3x3_s1_output2x2_depthfirst_impl( "ldr q25, [x23, x5]\n" "ldr q24, [x20, x5]\n" "add x5, x5, #0x10\n" - "subs x19, x19, #0x1\n" "beq 2f\n" "1:" // Vector: Loop "fadd v17.8h, v7.8h, v6.8h\n" "ldr q7, [x10, x5]\n" + "subs x19, x19, #0x1\n" "fadd v16.8h, v5.8h, v4.8h\n" "ldr q6, [x9, x5]\n" "fadd v18.8h, v3.8h, v2.8h\n" "ldr q5, [x26, x5]\n" "fadd v23.8h, v1.8h, v0.8h\n" "ldr q4, [x25, x5]\n" - "fadd v17.8h, v17.8h, v16.8h\n" - "ldr q3, [x14, x5]\n" "fadd v22.8h, v31.8h, v30.8h\n" + "ldr q3, [x14, x5]\n" + "fadd v17.8h, v17.8h, v16.8h\n" "ldr q2, [x13, x5]\n" "fadd v16.8h, v29.8h, v28.8h\n" "ldr q1, [x11, x5]\n" - "fadd v21.8h, v18.8h, v17.8h\n" - "ldr q0, [x27, x5]\n" "fadd v19.8h, v27.8h, v23.8h\n" + "ldr q0, [x27, x5]\n" + "fadd v21.8h, v18.8h, v17.8h\n" "ldr q31, [x28, x5]\n" "fadd v20.8h, v16.8h, v17.8h\n" "ldr q30, [x24, x5]\n" @@ -148,21 +149,20 @@ void a64_fp16_nhwc_avg_3x3_s1_output2x2_depthfirst_impl( "ldr q28, [x21, x5]\n" "fadd v16.8h, v24.8h, v22.8h\n" "ldr q27, [x15, x5]\n" - "fadd v19.8h, v19.8h, v21.8h\n" + "fadd v19.8h, v21.8h, v19.8h\n" "ldr q26, [x12, x5]\n" "fadd v18.8h, v21.8h, v18.8h\n" "ldr q25, [x23, x5]\n" "fadd v17.8h, v17.8h, v20.8h\n" "ldr q24, [x20, x5]\n" - "fadd v16.8h, v20.8h, v16.8h\n" "add x5, x5, #0x10\n" + "fadd v16.8h, v20.8h, v16.8h\n" "fmul v19.8h, v19.8h, v8.h[0]\n" - "subs x19, x19, #0x1\n" - "fmul v18.8h, v18.8h, v8.h[1]\n" "str q19, [x7, x6]\n" + "fmul v18.8h, v18.8h, v8.h[1]\n" "fmul v17.8h, v17.8h, v8.h[2]\n" - "fmul v16.8h, v16.8h, v8.h[3]\n" "str q18, [x8, x6]\n" + "fmul v16.8h, v16.8h, v8.h[3]\n" "str q17, [x17, x6]\n" "str q16, [x16, x6]\n" "add x6, x6, #0x10\n" @@ -181,7 +181,7 @@ void a64_fp16_nhwc_avg_3x3_s1_output2x2_depthfirst_impl( "fadd v18.8h, v26.8h, v22.8h\n" "fadd v17.8h, v25.8h, v23.8h\n" "fadd v16.8h, v24.8h, v22.8h\n" - "fadd v19.8h, v19.8h, v21.8h\n" + "fadd v19.8h, v21.8h, v19.8h\n" "fadd v18.8h, v21.8h, v18.8h\n" "fadd v17.8h, v17.8h, v20.8h\n" "fadd v16.8h, v20.8h, v16.8h\n" @@ -197,6 +197,7 @@ void a64_fp16_nhwc_avg_3x3_s1_output2x2_depthfirst_impl( "cbz x4, 4f\n" "3:" // Oddments "ldr h7, [x10, x5]\n" + "subs x4, x4, #0x1\n" "ldr h6, [x9, x5]\n" "fadd v17.8h, v7.8h, v6.8h\n" "ldr h5, [x26, x5]\n" @@ -209,33 +210,32 @@ void a64_fp16_nhwc_avg_3x3_s1_output2x2_depthfirst_impl( "ldr h0, [x27, x5]\n" "fadd v18.8h, v3.8h, v2.8h\n" "ldr h31, [x28, x5]\n" - "ldr h30, [x24, x5]\n" "fadd v23.8h, v1.8h, v0.8h\n" - "ldr h29, [x22, x5]\n" + "ldr h30, [x24, x5]\n" "fadd v21.8h, v18.8h, v17.8h\n" + "ldr h29, [x22, x5]\n" "ldr h28, [x21, x5]\n" - "ldr h27, [x15, x5]\n" "fadd v22.8h, v31.8h, v30.8h\n" + "ldr h27, [x15, x5]\n" "ldr h26, [x12, x5]\n" "fadd v16.8h, v29.8h, v28.8h\n" "ldr h25, [x23, x5]\n" - "fadd v19.8h, v27.8h, v23.8h\n" + "fadd v20.8h, v16.8h, v17.8h\n" "ldr h24, [x20, x5]\n" - "fadd v18.8h, v26.8h, v22.8h\n" "add x5, x5, #0x2\n" - "subs x4, x4, #0x1\n" - "fadd v20.8h, v16.8h, v17.8h\n" - "fadd v19.8h, v19.8h, v21.8h\n" - "fadd v18.8h, v21.8h, v18.8h\n" + "fadd v19.8h, v27.8h, v23.8h\n" + "fadd v18.8h, v26.8h, v22.8h\n" "fadd v17.8h, v25.8h, v23.8h\n" "fadd v16.8h, v24.8h, v22.8h\n" - "fmul v19.8h, v19.8h, v8.h[0]\n" - "str h19, [x7, x6]\n" + "fadd v19.8h, v21.8h, v19.8h\n" + "fadd v18.8h, v21.8h, v18.8h\n" "fadd v17.8h, v17.8h, v20.8h\n" "fadd v16.8h, v20.8h, v16.8h\n" + "fmul v19.8h, v19.8h, v8.h[0]\n" + "str h19, [x7, x6]\n" "fmul v18.8h, v18.8h, v8.h[1]\n" - "str h18, [x8, x6]\n" "fmul v17.8h, v17.8h, v8.h[2]\n" + "str h18, [x8, x6]\n" "fmul v16.8h, v16.8h, v8.h[3]\n" "str h17, [x17, x6]\n" "str h16, [x16, x6]\n" -- cgit v1.2.1