From 8a164884dddf769643cf3b9f7f94e43cb4f3c20b Mon Sep 17 00:00:00 2001 From: ramelg01 Date: Thu, 7 Apr 2022 02:42:52 +0100 Subject: =?UTF-8?q?Update=20Neon=E2=84=A2=20depthwise=20kernel?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit - Reduce duplication and simplify overall structure. - Improve multi-threaded performance by sharing more data in lower-level caches. Partially Resolves: COMPMID-5054 Signed-off-by: Ramy Elgammal Change-Id: Iac747f39b21c540122fa75218762631c4d787911 Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/7449 Tested-by: Arm Jenkins Reviewed-by: Andrew Mundy Reviewed-by: Sheri Zhang Comments-Addressed: Arm Jenkins --- ...e_fp16_nhwc_3x3_s2_output2x2_mla_depthfirst.hpp | 76 ++++------------------ 1 file changed, 13 insertions(+), 63 deletions(-) (limited to 'src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp16_nhwc_3x3_s2_output2x2_mla_depthfirst.hpp') diff --git a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp16_nhwc_3x3_s2_output2x2_mla_depthfirst.hpp b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp16_nhwc_3x3_s2_output2x2_mla_depthfirst.hpp index 5968309927..82173ee71f 100644 --- a/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp16_nhwc_3x3_s2_output2x2_mla_depthfirst.hpp +++ b/src/core/NEON/kernels/arm_conv/depthwise/kernels/sve_fp16_nhwc_3x3_s2_output2x2_mla_depthfirst.hpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021 Arm Limited. + * Copyright (c) 2021-2022 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -28,7 +28,7 @@ #pragma once -#if __aarch64__ && defined(ARM_COMPUTE_ENABLE_SVE) && defined(__ARM_FP16_ARGS) +#if defined(__aarch64__) && defined(ARM_COMPUTE_ENABLE_SVE) && defined(__ARM_FP16_ARGS) namespace arm_conv { namespace depthwise { @@ -36,19 +36,16 @@ namespace depthwise { void sve_fp16_nhwc_3x3_s2_output2x2_mla_depthfirst_indirect_impl(const __fp16 *const *const, __fp16 *const *const, const void *, unsigned int, const __fp16, const __fp16); void sve_fp16_nhwc_3x3_s2_output2x2_mla_depthfirst_direct_impl(const unsigned int, const unsigned int, const __fp16 *, int64_t, int64_t, __fp16 *, int64_t, int64_t, const void *, unsigned int, const __fp16, const __fp16); -class sve_fp16_nhwc_3x3_s2_output2x2_mla_depthfirst : public IDepthwiseDepthfirstStrategy +class sve_fp16_nhwc_3x3_s2_output2x2_mla_depthfirst : public DepthwiseDepthfirstStrategy<__fp16, __fp16, __fp16, __fp16> { private: - typedef void (*indirect_kern_type)(const __fp16 *const *const, __fp16 *const *const, const void *, unsigned int, const __fp16, const __fp16); - indirect_kern_type m_indirect_kernel = sve_fp16_nhwc_3x3_s2_output2x2_mla_depthfirst_indirect_impl; - - typedef void (*direct_kern_type)(const unsigned int, const unsigned int, const __fp16 *, int64_t, int64_t, __fp16 *, int64_t, int64_t, const void *, unsigned int, const __fp16, const __fp16); - direct_kern_type m_direct_kernel = sve_fp16_nhwc_3x3_s2_output2x2_mla_depthfirst_direct_impl; + using Parent = DepthwiseDepthfirstStrategy<__fp16, __fp16, __fp16, __fp16>; + Parent::IndirectKernelType m_indirect_kernel = sve_fp16_nhwc_3x3_s2_output2x2_mla_depthfirst_indirect_impl; + Parent::DirectKernelType m_direct_kernel = sve_fp16_nhwc_3x3_s2_output2x2_mla_depthfirst_direct_impl; public: - typedef __fp16 return_type; - - constexpr static arm_gemm::VLType vl_type = arm_gemm::VLType::SVE; + using return_type = __fp16; + constexpr static auto vl_type = arm_gemm::VLType::SVE; constexpr static unsigned int kernel_rows = 3; constexpr static unsigned int kernel_cols = 3; @@ -59,63 +56,16 @@ class sve_fp16_nhwc_3x3_s2_output2x2_mla_depthfirst : public IDepthwiseDepthfirs constexpr static unsigned int output_rows = 2; constexpr static unsigned int output_cols = 2; - constexpr static unsigned int input_rows = 5; - constexpr static unsigned int input_cols = 5; - - sve_fp16_nhwc_3x3_s2_output2x2_mla_depthfirst(const CPUInfo *) {} + sve_fp16_nhwc_3x3_s2_output2x2_mla_depthfirst(const CPUInfo *) + : DepthwiseDepthfirstStrategy<__fp16, __fp16, __fp16, __fp16>(2, 3, 2) {} arm_gemm::VLType get_vl_type(void) const override { return vl_type; } - unsigned int get_kernel_rows(void) const override { return kernel_rows; } - unsigned int get_kernel_cols(void) const override { return kernel_cols; } - - unsigned int get_stride_rows(void) const override { return stride_rows; } - unsigned int get_stride_cols(void) const override { return stride_cols; } - - unsigned int get_output_rows(void) const override { return output_rows; } - unsigned int get_output_cols(void) const override { return output_cols; } - - unsigned int get_input_rows(void) const override { return input_rows; } - unsigned int get_input_cols(void) const override { return input_cols; } - - void indirect_kernel( - const void *const *const input_ptrs, - void *const *const outptrs, - const void *params, - unsigned int n_channels, - const void *activation_min, - const void *activation_max - ) const override - { - m_indirect_kernel( - reinterpret_cast(input_ptrs), - reinterpret_cast<__fp16 *const *>(outptrs), - params, n_channels, - *static_cast(activation_min), - *static_cast(activation_max) - ); - } - - void direct_kernel( - const unsigned int n_tile_rows, const unsigned int n_tile_cols, - const void *inptr, int64_t ld_input_row, int64_t ld_input_col, - void *outptr, int64_t ld_output_row, int64_t ld_output_col, - const void *params, unsigned int n_channels, - const void *activation_min, const void *activation_max - ) const override - { - m_direct_kernel( - n_tile_rows, n_tile_cols, - static_cast(inptr), ld_input_row, ld_input_col, - static_cast<__fp16 *>(outptr), ld_output_row, ld_output_col, - params, n_channels, - *static_cast(activation_min), - *static_cast(activation_max) - ); - } + Parent::IndirectKernelType get_indirect_kernel() const override { return m_indirect_kernel; } + Parent::DirectKernelType get_direct_kernel() const override { return m_direct_kernel; } }; } // namespace depthwise } // namespace arm_conv -#endif // __aarch64__ && defined(ARM_COMPUTE_ENABLE_SVE) && defined(__ARM_FP16_ARGS) +#endif // defined(__aarch64__) && defined(ARM_COMPUTE_ENABLE_SVE) && defined(__ARM_FP16_ARGS) -- cgit v1.2.1