From d02d5edfa15ba6c04a9986a8a362a945cb38ac31 Mon Sep 17 00:00:00 2001 From: Michele Di Giorgio Date: Fri, 22 Jan 2021 09:47:04 +0000 Subject: Integrate improved CPU depthwise convolution kernels * Replace assembly kernels for depthwise convolution with more optimized ones. * Add int8 assembly kernels. * Fix implicit padding on optimized kernels Resolves: COMPMID-3867, COMPMID-4361 Change-Id: I0b0867e05f61be4f368f62190d55e14d0ab3ebf2 Signed-off-by: Michele Di Giorgio Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/5622 Tested-by: Arm Jenkins Reviewed-by: Georgios Pinitas --- .../kernels/arm_conv/depthwise/depthwise_u8q.cpp | 228 +++++++++++++++++++++ 1 file changed, 228 insertions(+) create mode 100644 src/core/NEON/kernels/arm_conv/depthwise/depthwise_u8q.cpp (limited to 'src/core/NEON/kernels/arm_conv/depthwise/depthwise_u8q.cpp') diff --git a/src/core/NEON/kernels/arm_conv/depthwise/depthwise_u8q.cpp b/src/core/NEON/kernels/arm_conv/depthwise/depthwise_u8q.cpp new file mode 100644 index 0000000000..3e190d242a --- /dev/null +++ b/src/core/NEON/kernels/arm_conv/depthwise/depthwise_u8q.cpp @@ -0,0 +1,228 @@ +/* + * Copyright (c) 2021 Arm Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ + +#include "arm_gemm_local.hpp" + +#include "depthwise_implementation.hpp" +#include "depthwise_depthfirst_quantized.hpp" +#include "depthwise_depthfirst_generic_quantized.hpp" +#include "depthwise_depthfirst_multiplier_quantized.hpp" +#include "depthwise_depthfirst_generic_multiplier_quantized.hpp" + +#include "depthwise_implementation_constraints.hpp" + +#if defined(__aarch64__) +#if defined(__ARM_FEATURE_SVE) && defined(SVE2) +#include "kernels/sve_u8q_nhwc_3x3_s1_output2x2_dot_depthfirst.hpp" +#include "kernels/sve_u8q_nhwc_3x3_s1_output2x2_mla_depthfirst.hpp" +#include "kernels/sve_u8q_nhwc_3x3_s2_output2x2_mla_depthfirst.hpp" +#include "kernels/sve_u8q_nhwc_5x5_s1_output2x2_mla_depthfirst.hpp" +#include "kernels/sve_u8q_packed_to_nhwc_3x3_s2_with_multiplier_output2x4_dot_depthfirst.hpp" +#include "kernels/sve_u8q_packed_to_nhwc_5x5_s1_with_multiplier_output4x2_dot_depthfirst.hpp" +#endif // defined(__ARM_FEATURE_SVE) && defined(SVE2) +#include "kernels/a64_u8q_nhwc_3x3_s1_output2x2_dot_depthfirst.hpp" +#include "kernels/a64_u8q_nhwc_3x3_s1_output2x2_mla_depthfirst.hpp" +#include "kernels/a64_u8q_nhwc_3x3_s2_output2x2_mla_depthfirst.hpp" +#include "kernels/a64_u8q_nhwc_5x5_s1_output2x2_mla_depthfirst.hpp" +#include "kernels/a64_u8q_nhwc_generic_output9_mla_depthfirst.hpp" +#include "kernels/a64_u8q_packed_to_nhwc_3x3_s2_with_multiplier_output2x4_dot_depthfirst.hpp" +#include "kernels/a64_u8q_packed_to_nhwc_5x5_s1_with_multiplier_output4x2_dot_depthfirst.hpp" +#include "kernels/a64_u8q_packed_to_nhwc_generic_with_multiplier_output2x8_mla_depthfirst.hpp" +#endif // defined(__aarch64__) + +#include + +using arm_gemm::Requantize32; + +namespace arm_conv { +namespace depthwise { + +static const DepthwiseImplementation depthwise_u8q_methods[] = { +#if defined(__aarch64__) +#if defined(__ARM_FEATURE_SVE) && defined(SVE2) + { + DepthwiseMethod::DEPTHFIRST, + "sve_u8q_nhwc_3x3_s1_output2x2_dot_depthfirst", + constraint(is_supported, + has_no_channel_multiplier, + qp_has_no_left_shift), + nullptr, + [] (const DepthwiseArgs &args, const Requantize32 &qp) -> DepthwiseCommon * { + return new DepthwiseDepthfirstQuantized(args, qp); + }, + }, + { + DepthwiseMethod::DEPTHFIRST, + "sve_u8q_nhwc_3x3_s1_output2x2_mla_depthfirst", + constraint(is_supported, + has_no_channel_multiplier, + qp_has_no_left_shift), + nullptr, + [] (const DepthwiseArgs &args, const Requantize32 &qp) -> DepthwiseCommon * { + return new DepthwiseDepthfirstQuantized(args, qp); + }, + }, + { + DepthwiseMethod::DEPTHFIRST, + "sve_u8q_nhwc_3x3_s2_output2x2_mla_depthfirst", + constraint(is_supported, + has_no_channel_multiplier, + qp_has_no_left_shift), + nullptr, + [] (const DepthwiseArgs &args, const Requantize32 &qp) -> DepthwiseCommon * { + return new DepthwiseDepthfirstQuantized(args, qp); + }, + }, + { + DepthwiseMethod::DEPTHFIRST, + "sve_u8q_nhwc_5x5_s1_output2x2_mla_depthfirst", + constraint(is_supported, + has_no_channel_multiplier, + qp_has_no_left_shift), + nullptr, + [] (const DepthwiseArgs &args, const Requantize32 &qp) -> DepthwiseCommon * { + return new DepthwiseDepthfirstQuantized(args, qp); + }, + }, + { + DepthwiseMethod::DEPTHFIRST, + "sve_u8q_packed_to_nhwc_3x3_s2_with_multiplier_output2x4_dot_depthfirst", + constraint(is_supported, + qp_has_no_left_shift), + nullptr, + [] (const DepthwiseArgs &args, const Requantize32 &qp) -> DepthwiseCommon * { + return new DepthwiseDepthfirstWithMultiplierQuantized(args, qp); + }, + }, + { + DepthwiseMethod::DEPTHFIRST, + "sve_u8q_packed_to_nhwc_5x5_s1_with_multiplier_output4x2_dot_depthfirst", + constraint(is_supported, + qp_has_no_left_shift), + nullptr, + [] (const DepthwiseArgs &args, const Requantize32 &qp) -> DepthwiseCommon * { + return new DepthwiseDepthfirstWithMultiplierQuantized(args, qp); + }, + }, +#endif // defined(__ARM_FEATURE_SVE) && defined(SVE2) + { + DepthwiseMethod::DEPTHFIRST, + "a64_u8q_nhwc_3x3_s1_output2x2_dot_depthfirst", + constraint(is_supported, + cpu_has_dot_product, + has_no_channel_multiplier, + qp_has_no_left_shift), + nullptr, + [] (const DepthwiseArgs &args, const Requantize32 &qp) -> DepthwiseCommon * { + return new DepthwiseDepthfirstQuantized(args, qp); + }, + }, + { + DepthwiseMethod::DEPTHFIRST, + "a64_u8q_nhwc_3x3_s1_output2x2_mla_depthfirst", + constraint(is_supported, + has_no_channel_multiplier, + qp_has_no_left_shift), + nullptr, + [] (const DepthwiseArgs &args, const Requantize32 &qp) -> DepthwiseCommon * { + return new DepthwiseDepthfirstQuantized(args, qp); + }, + }, + { + DepthwiseMethod::DEPTHFIRST, + "a64_u8q_nhwc_3x3_s2_output2x2_mla_depthfirst", + constraint(is_supported, + has_no_channel_multiplier, + qp_has_no_left_shift), + nullptr, + [] (const DepthwiseArgs &args, const Requantize32 &qp) -> DepthwiseCommon * { + return new DepthwiseDepthfirstQuantized(args, qp); + }, + }, + { + DepthwiseMethod::DEPTHFIRST, + "a64_u8q_nhwc_5x5_s1_output2x2_mla_depthfirst", + constraint(is_supported, + has_no_channel_multiplier, + qp_has_no_left_shift), + nullptr, + [] (const DepthwiseArgs &args, const Requantize32 &qp) -> DepthwiseCommon * { + return new DepthwiseDepthfirstQuantized(args, qp); + }, + }, + { + DepthwiseMethod::DEPTHFIRST, + "a64_u8q_nhwc_generic_output3x3_mla_depthfirst", + constraint(has_no_channel_multiplier), + nullptr, + [] (const DepthwiseArgs &args, const Requantize32 &qp) -> DepthwiseCommon * { + return new DepthwiseDepthfirstGenericQuantized(args, qp); + }, + }, + { + DepthwiseMethod::DEPTHFIRST, + "a64_u8q_packed_to_nhwc_3x3_s2_with_multiplier_output2x4_dot_depthfirst", + constraint(is_supported, + cpu_has_dot_product, + qp_has_no_left_shift), + nullptr, + [] (const DepthwiseArgs &args, const Requantize32 &qp) -> DepthwiseCommon * { + return new DepthwiseDepthfirstWithMultiplierQuantized(args, qp); + }, + }, + { + DepthwiseMethod::DEPTHFIRST, + "a64_u8q_packed_to_nhwc_5x5_s1_with_multiplier_output4x2_dot_depthfirst", + constraint(is_supported, + cpu_has_dot_product, + qp_has_no_left_shift), + nullptr, + [] (const DepthwiseArgs &args, const Requantize32 &qp) -> DepthwiseCommon * { + return new DepthwiseDepthfirstWithMultiplierQuantized(args, qp); + }, + }, + { + DepthwiseMethod::DEPTHFIRST, + "a64_u8q_packed_to_nhwc_generic_with_multiplier_output2x8_mla_depthfirst", + nullptr, + nullptr, + [] (const DepthwiseArgs &args, const Requantize32 &qp) -> DepthwiseCommon * { + return new DepthwiseDepthfirstGenericWithMultiplierQuantized(args, qp); + }, + }, +#endif // defined(__aarch64__) + { DepthwiseMethod::DEFAULT, "", nullptr, nullptr, nullptr }, // End of list +}; + +template <> +const DepthwiseImplementation *depthwise_implementation_list() +{ + return depthwise_u8q_methods; +} + +template UniqueDepthwiseCommon depthwise(const DepthwiseArgs &, const Requantize32 &); +template std::vector get_compatible_kernels(const DepthwiseArgs &, const Requantize32 &); + +} // namespace depthwise +} // namespace arm_conv -- cgit v1.2.1