From ac6499a474503dfcf587d95b85823aeb5861103f Mon Sep 17 00:00:00 2001 From: Sheri Zhang Date: Wed, 10 Feb 2021 15:32:38 +0000 Subject: Comply with Trademark rules for use of Neon, Arm and Mali Full trademarks available in README.md Resolves: COMPMID-4257 Signed-off-by: Sheri Zhang Change-Id: Ibfba2adf2eef3449433f467464ebd87d7198474d Signed-off-by: Michele Di Giorgio Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/5116 Reviewed-by: Georgios Pinitas Comments-Addressed: Arm Jenkins Tested-by: Arm Jenkins --- src/core/NEON/kernels/NEDirectConvolutionLayerKernel.cpp | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'src/core/NEON/kernels/NEDirectConvolutionLayerKernel.cpp') diff --git a/src/core/NEON/kernels/NEDirectConvolutionLayerKernel.cpp b/src/core/NEON/kernels/NEDirectConvolutionLayerKernel.cpp index 87b9fb1bf1..77742163fa 100644 --- a/src/core/NEON/kernels/NEDirectConvolutionLayerKernel.cpp +++ b/src/core/NEON/kernels/NEDirectConvolutionLayerKernel.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017-2020 Arm Limited. + * Copyright (c) 2017-2021 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -149,7 +149,7 @@ inline bool run_optim_small_tensor(const ITensor *t) // Optimized convolver for 1x1 kernels used only where input width and height are both <= 8 // For big Z as in Input=7x7x832, this implementation is faster than the general code becuase it doesn't need to -// store intermidiate results in memory. Temporary results are stored in NEON registers directly and then written to the output buffer. +// store intermidiate results in memory. Temporary results are stored in Neon registers directly and then written to the output buffer. template class convolver_w1x1_i8x8_f32 { @@ -1381,4 +1381,4 @@ void NEDirectConvolutionLayerKernel::run(const Window &window, const ThreadInfo } } } -} // namespace arm_compute \ No newline at end of file +} // namespace arm_compute -- cgit v1.2.1