From 23ac91b6ba235e67847802d4b49e494fa5bedbb6 Mon Sep 17 00:00:00 2001 From: "ASIAPAC\\steli01" Date: Tue, 7 Nov 2017 16:14:44 +0800 Subject: APPBROWSER-290: DC5x5 optimization for FP16 Change-Id: I0833437d8353515a29aad69c15c99c7b0fd65156 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/111631 Tested-by: BSG Visual Compute Jenkins server to access repositories on http://mpd-gerrit.cambridge.arm.com Reviewed-by: Joel Liang Reviewed-by: Anthony Barbier --- src/core/GLES_COMPUTE/kernels/GCDirectConvolutionLayerKernel.cpp | 1 + 1 file changed, 1 insertion(+) (limited to 'src/core/GLES_COMPUTE/kernels/GCDirectConvolutionLayerKernel.cpp') diff --git a/src/core/GLES_COMPUTE/kernels/GCDirectConvolutionLayerKernel.cpp b/src/core/GLES_COMPUTE/kernels/GCDirectConvolutionLayerKernel.cpp index 962f044214..b032bc5668 100644 --- a/src/core/GLES_COMPUTE/kernels/GCDirectConvolutionLayerKernel.cpp +++ b/src/core/GLES_COMPUTE/kernels/GCDirectConvolutionLayerKernel.cpp @@ -211,6 +211,7 @@ void GCDirectConvolutionLayerKernel::configure(const IGCTensor *inp switch(input->info()->data_type()) { case DataType::F16: + options.emplace("#define PROCESS_4X_1Y_1Z"); num_elems_read_per_iteration_x = 8; num_elems_written_per_iteration_x = 4; -- cgit v1.2.1