From 5ae8d804d67f57fbfa793800ddcc21a5aff954dd Mon Sep 17 00:00:00 2001 From: Giorgio Arena Date: Thu, 18 Nov 2021 18:02:13 +0000 Subject: Enable kernel selection testing (Phase #1) Change-Id: I1d65fb9d3a7583cf8d4163ca7c0fbee27dc52633 Signed-off-by: Yair Schwarzbaum Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/6767 Reviewed-by: Giorgio Arena Tested-by: Arm Jenkins Comments-Addressed: Arm Jenkins --- src/core/CPP/CPPTypes.cpp | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) (limited to 'src/core/CPP') diff --git a/src/core/CPP/CPPTypes.cpp b/src/core/CPP/CPPTypes.cpp index 44cd000ada..c197932a13 100644 --- a/src/core/CPP/CPPTypes.cpp +++ b/src/core/CPP/CPPTypes.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018-2021 Arm Limited. + * Copyright (c) 2018-2022 Arm Limited. * * SPDX-License-Identifier: MIT * @@ -26,6 +26,7 @@ #include "arm_compute/core/Error.h" #include "src/common/cpuinfo/CpuInfo.h" +#include "src/common/cpuinfo/CpuIsaInfo.h" namespace arm_compute { @@ -110,6 +111,11 @@ CPUModel CPUInfo::get_cpu_model(unsigned int cpuid) const return _impl->info.cpu_model(cpuid); } +cpuinfo::CpuIsaInfo CPUInfo::get_isa() const +{ + return _impl->info.isa(); +} + unsigned int CPUInfo::get_L1_cache_size() const { return _impl->L1_cache_size; -- cgit v1.2.1