From 12f2b8c316155660f1e612fe7e8fab7861decc03 Mon Sep 17 00:00:00 2001 From: Gian Marco Iodice Date: Thu, 13 Feb 2020 12:27:37 +0000 Subject: COMPMID-3202: Add support for Valhall architecture in GEMM Change-Id: I2cd0b5ee0ae2e3c65a04c7be70478b0452e55132 Signed-off-by: Gian Marco Iodice Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/2730 Tested-by: Arm Jenkins Reviewed-by: Georgios Pinitas Comments-Addressed: Arm Jenkins --- .../CLGEMMNativeKernelConfigurationBifrost.cpp | 6 +- .../CLGEMMNativeKernelConfigurationValhall.cpp | 177 +++++++++++++++++++++ .../CLGEMMReshapedKernelConfigurationBifrost.cpp | 12 +- .../CLGEMMReshapedKernelConfigurationValhall.cpp | 115 +++++++++++++ ...MMReshapedOnlyRHSKernelConfigurationBifrost.cpp | 19 +-- ...MMReshapedOnlyRHSKernelConfigurationValhall.cpp | 125 +++++++++++++++ 6 files changed, 436 insertions(+), 18 deletions(-) create mode 100644 src/core/CL/gemm/native/CLGEMMNativeKernelConfigurationValhall.cpp create mode 100644 src/core/CL/gemm/reshaped/CLGEMMReshapedKernelConfigurationValhall.cpp create mode 100644 src/core/CL/gemm/reshaped_only_rhs/CLGEMMReshapedOnlyRHSKernelConfigurationValhall.cpp (limited to 'src/core/CL/gemm') diff --git a/src/core/CL/gemm/native/CLGEMMNativeKernelConfigurationBifrost.cpp b/src/core/CL/gemm/native/CLGEMMNativeKernelConfigurationBifrost.cpp index e6423175a5..c4a9ccd703 100644 --- a/src/core/CL/gemm/native/CLGEMMNativeKernelConfigurationBifrost.cpp +++ b/src/core/CL/gemm/native/CLGEMMNativeKernelConfigurationBifrost.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019 ARM Limited. + * Copyright (c) 2019-2020 ARM Limited. * * SPDX-License-Identifier: MIT * @@ -35,8 +35,8 @@ namespace arm_compute { namespace cl_gemm { -CLGEMMNativeKernelConfigurationBifrost::CLGEMMNativeKernelConfigurationBifrost(GPUTarget arch) - : ICLGEMMKernelConfiguration(arch) +CLGEMMNativeKernelConfigurationBifrost::CLGEMMNativeKernelConfigurationBifrost(GPUTarget gpu) + : ICLGEMMKernelConfiguration(gpu) { } diff --git a/src/core/CL/gemm/native/CLGEMMNativeKernelConfigurationValhall.cpp b/src/core/CL/gemm/native/CLGEMMNativeKernelConfigurationValhall.cpp new file mode 100644 index 0000000000..7cf0f0e1a8 --- /dev/null +++ b/src/core/CL/gemm/native/CLGEMMNativeKernelConfigurationValhall.cpp @@ -0,0 +1,177 @@ +/* + * Copyright (c) 2020 ARM Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#include "arm_compute/core/CL/gemm/native/CLGEMMNativeKernelConfigurationValhall.h" + +#include "arm_compute/core/CL/CLHelpers.h" +#include "arm_compute/core/CL/CLKernelLibrary.h" +#include "arm_compute/core/CL/gemm/CLGEMMHelpers.h" +#include "arm_compute/core/GPUTarget.h" + +#include +#include + +namespace arm_compute +{ +namespace cl_gemm +{ +CLGEMMNativeKernelConfigurationValhall::CLGEMMNativeKernelConfigurationValhall(GPUTarget gpu) + : ICLGEMMKernelConfiguration(gpu) +{ +} + +std::pair CLGEMMNativeKernelConfigurationValhall::configure(unsigned int m, unsigned int n, unsigned int k, unsigned int b, DataType data_type) +{ + using ConfigurationFunctionExecutorPtr = std::pair (CLGEMMNativeKernelConfigurationValhall::*)(unsigned int m, unsigned int n, unsigned int k, + unsigned int b); + + // Configurations for Mali-G71 + static std::map gemm_configs_G77 = + { + { DataType::F32, &CLGEMMNativeKernelConfigurationValhall::configure_G77_f32 }, + { DataType::F16, &CLGEMMNativeKernelConfigurationValhall::configure_G77_f16 }, + { DataType::QASYMM8, &CLGEMMNativeKernelConfigurationValhall::configure_G77_u8 } + }; + + switch(_target) + { + case GPUTarget::G77: + default: + if(gemm_configs_G77.find(data_type) != gemm_configs_G77.end()) + { + return (this->*gemm_configs_G77[data_type])(m, n, k, b); + } + else + { + ARM_COMPUTE_ERROR("Not supported data type"); + } + } +} + +std::pair CLGEMMNativeKernelConfigurationValhall::configure_G77_f32(unsigned int m, unsigned int n, unsigned int k, unsigned int b) +{ + ARM_COMPUTE_UNUSED(k); + ARM_COMPUTE_UNUSED(b); + + if(m == 1) + { + if(n < 2048) + { + return configure_lhs_rhs_info(m, n, 1, 2, 4, 1, 1, false, false, false, false); + } + else if(n >= 2048 && n < 8192) + { + return configure_lhs_rhs_info(m, n, 1, 4, 4, 1, 1, false, false, false, false); + } + else + { + return configure_lhs_rhs_info(m, n, 1, 8, 4, 1, 1, false, false, false, false); + } + } + else + { + return configure_lhs_rhs_info(m, n, 5, 4, 2, 1, 1, false, false, false, false); + } +} + +std::pair CLGEMMNativeKernelConfigurationValhall::configure_G77_f16(unsigned int m, unsigned int n, unsigned int k, unsigned int b) +{ + ARM_COMPUTE_UNUSED(k); + ARM_COMPUTE_UNUSED(b); + + if(m == 1) + { + if(n < 2048) + { + return configure_lhs_rhs_info(m, n, 1, 2, 4, 1, 1, false, false, false, false); + } + else if(n >= 2048 && n < 8192) + { + return configure_lhs_rhs_info(m, n, 1, 4, 4, 1, 1, false, false, false, false); + } + else + { + return configure_lhs_rhs_info(m, n, 1, 8, 4, 1, 1, false, false, false, false); + } + } + else + { + return configure_lhs_rhs_info(m, n, 4, 8, 2, 1, 1, false, false, false, false); + } +} + +std::pair CLGEMMNativeKernelConfigurationValhall::configure_G77_u8(unsigned int m, unsigned int n, unsigned int k, unsigned int b) +{ + ARM_COMPUTE_UNUSED(k); + ARM_COMPUTE_UNUSED(b); + + if(dot8_supported(CLKernelLibrary::get().get_device())) + { + if(m == 1) + { + if(n < 2048) + { + return configure_lhs_rhs_info(m, n, 1, 2, 16, 1, 1, false, false, false, false); + } + else if(n >= 2048 && n < 16384) + { + return configure_lhs_rhs_info(m, n, 1, 4, 16, 1, 1, false, false, false, false); + } + else + { + return configure_lhs_rhs_info(m, n, 1, 8, 16, 1, 1, false, false, false, false); + } + } + else + { + if(m < 64) + { + return configure_lhs_rhs_info(m, n, 2, 2, 16, 1, 1, false, false, false, false); + } + else + { + return configure_lhs_rhs_info(m, n, 5, 2, 16, 1, 1, false, false, false, false); + } + } + } + else + { + if(m == 1) + { + if(n < 8192) + { + return configure_lhs_rhs_info(m, n, 1, 4, 16, 1, 1, false, false, false, false); + } + else + { + return configure_lhs_rhs_info(m, n, 1, 8, 16, 1, 1, false, false, false, false); + } + } + else + { + return configure_lhs_rhs_info(m, n, 2, 8, 16, 1, 1, false, false, false, false); + } + } +} +} // namespace cl_gemm +} // namespace arm_compute \ No newline at end of file diff --git a/src/core/CL/gemm/reshaped/CLGEMMReshapedKernelConfigurationBifrost.cpp b/src/core/CL/gemm/reshaped/CLGEMMReshapedKernelConfigurationBifrost.cpp index 0ffbe78449..144c23a798 100644 --- a/src/core/CL/gemm/reshaped/CLGEMMReshapedKernelConfigurationBifrost.cpp +++ b/src/core/CL/gemm/reshaped/CLGEMMReshapedKernelConfigurationBifrost.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019 ARM Limited. + * Copyright (c) 2019-2020 ARM Limited. * * SPDX-License-Identifier: MIT * @@ -35,8 +35,8 @@ namespace arm_compute { namespace cl_gemm { -CLGEMMReshapedKernelConfigurationBifrost::CLGEMMReshapedKernelConfigurationBifrost(GPUTarget arch) - : ICLGEMMKernelConfiguration(arch) +CLGEMMReshapedKernelConfigurationBifrost::CLGEMMReshapedKernelConfigurationBifrost(GPUTarget gpu) + : ICLGEMMKernelConfiguration(gpu) { } @@ -63,7 +63,7 @@ std::pair CLGEMMReshapedKernelConfiguratio switch(_target) { case GPUTarget::G76: - if (gemm_configs_G76.find(data_type) != gemm_configs_G76.end()) + if(gemm_configs_G76.find(data_type) != gemm_configs_G76.end()) { return (this->*gemm_configs_G76[data_type])(m, n, k, b); } @@ -72,7 +72,7 @@ std::pair CLGEMMReshapedKernelConfiguratio ARM_COMPUTE_ERROR("Not supported data type"); } default: - if (gemm_configs_G7x.find(data_type) != gemm_configs_G7x.end()) + if(gemm_configs_G7x.find(data_type) != gemm_configs_G7x.end()) { return (this->*gemm_configs_G7x[data_type])(m, n, k, b); } @@ -187,4 +187,4 @@ std::pair CLGEMMReshapedKernelConfiguratio } } } // namespace cl_gemm -} // namespace arm_compute \ No newline at end of file +} // namespace arm_compute diff --git a/src/core/CL/gemm/reshaped/CLGEMMReshapedKernelConfigurationValhall.cpp b/src/core/CL/gemm/reshaped/CLGEMMReshapedKernelConfigurationValhall.cpp new file mode 100644 index 0000000000..20fa3d65bf --- /dev/null +++ b/src/core/CL/gemm/reshaped/CLGEMMReshapedKernelConfigurationValhall.cpp @@ -0,0 +1,115 @@ +/* + * Copyright (c) 2020 ARM Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#include "arm_compute/core/CL/gemm/reshaped/CLGEMMReshapedKernelConfigurationValhall.h" + +#include "arm_compute/core/CL/CLHelpers.h" +#include "arm_compute/core/CL/CLKernelLibrary.h" +#include "arm_compute/core/CL/gemm/CLGEMMHelpers.h" +#include "arm_compute/core/GPUTarget.h" + +#include +#include + +namespace arm_compute +{ +namespace cl_gemm +{ +CLGEMMReshapedKernelConfigurationValhall::CLGEMMReshapedKernelConfigurationValhall(GPUTarget gpu) + : ICLGEMMKernelConfiguration(gpu) +{ +} + +std::pair CLGEMMReshapedKernelConfigurationValhall::configure(unsigned int m, unsigned int n, unsigned int k, unsigned int b, DataType data_type) +{ + using ConfigurationFunctionExecutorPtr = std::pair (CLGEMMReshapedKernelConfigurationValhall::*)(unsigned int m, unsigned int n, unsigned int k, unsigned int b); + + // Configurations for Mali-G77 + static std::map gemm_configs_G77 = + { + { DataType::F32, &CLGEMMReshapedKernelConfigurationValhall::configure_G77_f32 }, + { DataType::F16, &CLGEMMReshapedKernelConfigurationValhall::configure_G77_f16 }, + { DataType::QASYMM8, &CLGEMMReshapedKernelConfigurationValhall::configure_G77_u8 } + }; + + switch(_target) + { + case GPUTarget::G77: + default: + if(gemm_configs_G77.find(data_type) != gemm_configs_G77.end()) + { + return (this->*gemm_configs_G77[data_type])(m, n, k, b); + } + else + { + ARM_COMPUTE_ERROR("Not supported data type"); + } + } +} + +std::pair CLGEMMReshapedKernelConfigurationValhall::configure_G77_f32(unsigned int m, unsigned int n, unsigned int k, unsigned int b) +{ + ARM_COMPUTE_UNUSED(k); + ARM_COMPUTE_UNUSED(b); + + if(n <= 4) + { + return configure_lhs_rhs_info(m, n, 4, 2, 8, 16, 16, true, false, false, true); + } + else + { + return configure_lhs_rhs_info(m, n, 5, 4, 4, 2, 16, false, true, false, true); + } +} + +std::pair CLGEMMReshapedKernelConfigurationValhall::configure_G77_f16(unsigned int m, unsigned int n, unsigned int k, unsigned int b) +{ + ARM_COMPUTE_UNUSED(k); + ARM_COMPUTE_UNUSED(b); + + if(n <= 4) + { + return configure_lhs_rhs_info(m, n, 4, 2, 8, 8, 2, true, true, true, false); + } + else + { + return configure_lhs_rhs_info(m, n, 4, 8, 4, 4, 2, true, true, true, false); + } +} + +std::pair CLGEMMReshapedKernelConfigurationValhall::configure_G77_u8(unsigned int m, unsigned int n, unsigned int k, unsigned int b) +{ + ARM_COMPUTE_UNUSED(k); + ARM_COMPUTE_UNUSED(b); + + if(n <= 4) + { + return configure_lhs_rhs_info(m, n, 4, 2, 16, 4, 1, false, false, false, true); + } + else + { + return configure_lhs_rhs_info(m, n, 4, 4, 16, 2, 2, false, true, false, true); + } +} +} // namespace cl_gemm +} // namespace arm_compute diff --git a/src/core/CL/gemm/reshaped_only_rhs/CLGEMMReshapedOnlyRHSKernelConfigurationBifrost.cpp b/src/core/CL/gemm/reshaped_only_rhs/CLGEMMReshapedOnlyRHSKernelConfigurationBifrost.cpp index 5955bac384..8e798116bf 100644 --- a/src/core/CL/gemm/reshaped_only_rhs/CLGEMMReshapedOnlyRHSKernelConfigurationBifrost.cpp +++ b/src/core/CL/gemm/reshaped_only_rhs/CLGEMMReshapedOnlyRHSKernelConfigurationBifrost.cpp @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019 ARM Limited. + * Copyright (c) 2019-2020 ARM Limited. * * SPDX-License-Identifier: MIT * @@ -35,8 +35,8 @@ namespace arm_compute { namespace cl_gemm { -CLGEMMReshapedOnlyRHSKernelConfigurationBifrost::CLGEMMReshapedOnlyRHSKernelConfigurationBifrost(GPUTarget arch) - : ICLGEMMKernelConfiguration(arch) +CLGEMMReshapedOnlyRHSKernelConfigurationBifrost::CLGEMMReshapedOnlyRHSKernelConfigurationBifrost(GPUTarget gpu) + : ICLGEMMKernelConfiguration(gpu) { } @@ -72,7 +72,7 @@ std::pair CLGEMMReshapedOnlyRHSKernelConfi switch(_target) { case GPUTarget::G76: - if (gemm_configs_G76.find(data_type) != gemm_configs_G76.end()) + if(gemm_configs_G76.find(data_type) != gemm_configs_G76.end()) { return (this->*gemm_configs_G76[data_type])(m, n, k, b); } @@ -81,7 +81,7 @@ std::pair CLGEMMReshapedOnlyRHSKernelConfi ARM_COMPUTE_ERROR("Not supported data type"); } case GPUTarget::G51: - if (gemm_configs_G51.find(data_type) != gemm_configs_G51.end()) + if(gemm_configs_G51.find(data_type) != gemm_configs_G51.end()) { return (this->*gemm_configs_G51[data_type])(m, n, k, b); } @@ -90,7 +90,7 @@ std::pair CLGEMMReshapedOnlyRHSKernelConfi ARM_COMPUTE_ERROR("Not supported data type"); } default: - if (gemm_configs_G7x.find(data_type) != gemm_configs_G7x.end()) + if(gemm_configs_G7x.find(data_type) != gemm_configs_G7x.end()) { return (this->*gemm_configs_G7x[data_type])(m, n, k, b); } @@ -148,7 +148,7 @@ std::pair CLGEMMReshapedOnlyRHSKernelConfi if(m == 1) { - const unsigned int n0 = n < 1280? 2 : 4; + const unsigned int n0 = n < 1280 ? 2 : 4; const unsigned int h0 = std::max(n / n0, 1U); return configure_lhs_rhs_info(m, n, 1, n0, 4, 1, h0, false, true, false, true); } @@ -205,7 +205,7 @@ std::pair CLGEMMReshapedOnlyRHSKernelConfi if(m == 1) { - const unsigned int n0 = n < 1280? 2 : 4; + const unsigned int n0 = n < 1280 ? 2 : 4; const unsigned int h0 = std::max(n / n0, 1U); return configure_lhs_rhs_info(m, n, 1, n0, 8, 1, h0, false, true, false, true); } @@ -280,5 +280,6 @@ std::pair CLGEMMReshapedOnlyRHSKernelConfi return configure_lhs_rhs_info(m, n, 4, 2, 16, 1, h0, false, true, false, true); } } + } // namespace cl_gemm -} // namespace arm_compute \ No newline at end of file +} // namespace arm_compute diff --git a/src/core/CL/gemm/reshaped_only_rhs/CLGEMMReshapedOnlyRHSKernelConfigurationValhall.cpp b/src/core/CL/gemm/reshaped_only_rhs/CLGEMMReshapedOnlyRHSKernelConfigurationValhall.cpp new file mode 100644 index 0000000000..b44b297722 --- /dev/null +++ b/src/core/CL/gemm/reshaped_only_rhs/CLGEMMReshapedOnlyRHSKernelConfigurationValhall.cpp @@ -0,0 +1,125 @@ +/* + * Copyright (c) 2020 ARM Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#include "arm_compute/core/CL/gemm/reshaped_only_rhs/CLGEMMReshapedOnlyRHSKernelConfigurationValhall.h" + +#include "arm_compute/core/CL/CLHelpers.h" +#include "arm_compute/core/CL/CLKernelLibrary.h" +#include "arm_compute/core/CL/gemm/CLGEMMHelpers.h" +#include "arm_compute/core/GPUTarget.h" + +#include +#include + +namespace arm_compute +{ +namespace cl_gemm +{ +CLGEMMReshapedOnlyRHSKernelConfigurationValhall::CLGEMMReshapedOnlyRHSKernelConfigurationValhall(GPUTarget gpu) + : ICLGEMMKernelConfiguration(gpu) +{ +} + +std::pair CLGEMMReshapedOnlyRHSKernelConfigurationValhall::configure(unsigned int m, unsigned int n, unsigned int k, unsigned int b, DataType data_type) +{ + using ConfigurationFunctionExecutorPtr = std::pair (CLGEMMReshapedOnlyRHSKernelConfigurationValhall::*)(unsigned int m, unsigned int n, unsigned int k, + unsigned int b); + + // Configurations for Mali-G77 + static std::map gemm_configs_G77 = + { + { DataType::F32, &CLGEMMReshapedOnlyRHSKernelConfigurationValhall::configure_G77_f32 }, + { DataType::F16, &CLGEMMReshapedOnlyRHSKernelConfigurationValhall::configure_G77_f16 }, + { DataType::QASYMM8, &CLGEMMReshapedOnlyRHSKernelConfigurationValhall::configure_G77_u8 } + }; + + switch(_target) + { + case GPUTarget::G77: + default: + if(gemm_configs_G77.find(data_type) != gemm_configs_G77.end()) + { + return (this->*gemm_configs_G77[data_type])(m, n, k, b); + } + else + { + ARM_COMPUTE_ERROR("Not supported data type"); + } + } +} + +std::pair CLGEMMReshapedOnlyRHSKernelConfigurationValhall::configure_G77_f32(unsigned int m, unsigned int n, unsigned int k, unsigned int b) +{ + ARM_COMPUTE_UNUSED(k); + ARM_COMPUTE_UNUSED(b); + + if(m == 1) + { + return configure_lhs_rhs_info(m, n, 1, 4, 8, 1, 8, false, true, false, true); + } + else + { + if(m % 5) + { + return configure_lhs_rhs_info(m, n, 4, 4, 4, 1, 8, false, true, false, true); + } + else + { + return configure_lhs_rhs_info(m, n, 5, 4, 4, 1, 8, false, true, false, true); + } + } +} + +std::pair CLGEMMReshapedOnlyRHSKernelConfigurationValhall::configure_G77_f16(unsigned int m, unsigned int n, unsigned int k, unsigned int b) +{ + ARM_COMPUTE_UNUSED(k); + ARM_COMPUTE_UNUSED(b); + + if(m == 1) + { + const unsigned int h0 = std::max(n / 2, 1U); + return configure_lhs_rhs_info(m, n, 1, 4, 8, 1, h0, false, true, false, true); + } + else + { + return configure_lhs_rhs_info(m, n, 4, 8, 8, 1, 4, false, true, false, true); + } +} + +std::pair CLGEMMReshapedOnlyRHSKernelConfigurationValhall::configure_G77_u8(unsigned int m, unsigned int n, unsigned int k, unsigned int b) +{ + ARM_COMPUTE_UNUSED(k); + ARM_COMPUTE_UNUSED(b); + + if(m == 1) + { + const unsigned int h0 = std::max(n / 2, 1U); + return configure_lhs_rhs_info(m, n, 1, 4, 16, 1, h0, false, true, false, true); + } + else + { + return configure_lhs_rhs_info(m, n, 4, 4, 16, 1, 4, false, true, false, true); + } +} +} // namespace cl_gemm +} // namespace arm_compute -- cgit v1.2.1