From fda901f0485371e8b6a807c8dd9614560a924793 Mon Sep 17 00:00:00 2001 From: Giorgio Arena Date: Mon, 23 Apr 2018 12:01:33 +0100 Subject: COMPMID-1078 Fix CL DepthwiseConvolutionLayer QASYMM8 failing validation Change-Id: Id540490e5faf11c466ff039a20880eeedd6e5ec7 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/128612 Tested-by: Jenkins Reviewed-by: Michalis Spyrou Reviewed-by: Isabella Gottardi --- src/core/CL/cl_kernels/depthwise_convolution_quantized.cl | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) (limited to 'src/core/CL/cl_kernels/depthwise_convolution_quantized.cl') diff --git a/src/core/CL/cl_kernels/depthwise_convolution_quantized.cl b/src/core/CL/cl_kernels/depthwise_convolution_quantized.cl index 635bc9d50b..a0c0a8b1fb 100644 --- a/src/core/CL/cl_kernels/depthwise_convolution_quantized.cl +++ b/src/core/CL/cl_kernels/depthwise_convolution_quantized.cl @@ -333,7 +333,7 @@ __kernel void depthwise_convolution_3x3_quantized_nhwc_stride1( const int src_offs2 = src_offs1 + src_stride_z; const int cond_top = z - CONV_PAD_TOP < 0; - const int cond_bottom = z * (src_step_z / src_stride_z) + 2 >= SRC_DEPTH; + const int cond_bottom = z * (src_step_z / src_stride_z) + 2 > SRC_DEPTH; __global uchar *src_addr0 = first_elem + select(src_offs0, pad_offs, cond_top); __global uchar *src_addr1 = first_elem + src_offs1; @@ -580,8 +580,7 @@ __kernel void depthwise_convolution_3x3_quantized_nhwc_stride2( const int src_offs2 = src_offs1 + src_stride_z; const int cond_top = z - CONV_PAD_TOP < 0; - const int cond_bottom = z * (src_step_z / src_stride_z) + 2 >= SRC_DEPTH; - ; + const int cond_bottom = z * (src_step_z / src_stride_z) + 2 > SRC_DEPTH; __global uchar *src_addr0 = first_elem + select(src_offs0, pad_offs, cond_top); __global uchar *src_addr1 = first_elem + src_offs1; -- cgit v1.2.1