From d88590f4022bfb6eda3bad4fa599727bab723667 Mon Sep 17 00:00:00 2001 From: George Wort Date: Wed, 12 Dec 2018 17:39:58 +0000 Subject: COMPMID-1753: NEON: Implement Less, Greater, GreaterEqual, Equal, Not Equal Change-Id: I6fa95badcdecb826ac5bd9113f118603d5ac2e82 Reviewed-on: https://review.mlplatform.org/393 Tested-by: Arm Jenkins Reviewed-by: Georgios Pinitas --- .../NEON/kernels/NEElementwiseOperationKernel.h | 77 ++++++++++++++------ arm_compute/core/NEON/wrapper/intrinsics/cge.h | 64 +++++++++++++++++ .../core/NEON/wrapper/intrinsics/intrinsics.h | 2 + arm_compute/core/NEON/wrapper/intrinsics/not.h | 64 +++++++++++++++++ .../NEON/functions/NEElementwiseOperations.h | 82 ++++++++++++++++++++-- 5 files changed, 259 insertions(+), 30 deletions(-) create mode 100644 arm_compute/core/NEON/wrapper/intrinsics/cge.h create mode 100644 arm_compute/core/NEON/wrapper/intrinsics/not.h (limited to 'arm_compute') diff --git a/arm_compute/core/NEON/kernels/NEElementwiseOperationKernel.h b/arm_compute/core/NEON/kernels/NEElementwiseOperationKernel.h index 93ad437322..f02f71b50e 100644 --- a/arm_compute/core/NEON/kernels/NEElementwiseOperationKernel.h +++ b/arm_compute/core/NEON/kernels/NEElementwiseOperationKernel.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018 ARM Limited. + * Copyright (c) 2018-2019 ARM Limited. * * SPDX-License-Identifier: MIT * @@ -14,9 +14,9 @@ * copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INNEUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY NEAIM, DAMAGES OR OTHER + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. @@ -60,37 +60,35 @@ public: // Inherited methods overridden: void run(const Window &window, const ThreadInfo &info) override; + /** Common signature for all the specialised arithmetic functions + * + * @param[in] input1 First tensor input. Data types supported: QASYMM8/S16/F16/S32/F32. + * @param[in] input2 Second tensor input. Data types supported: Same as @p input1. + * @param[in] output Output tensor. Data types supported: Dependent on subclass. + * @param[in] window Region on which to execute the kernel. + */ + using ElementwiseFunction = void(const ITensor *input1, const ITensor *input2, ITensor *output, const Window &window); + protected: /** Validate the argument passed to the kernel * - * @param[in] input1 First tensor input. Data types supported: S16/F16/S32/F32. + * @param[in] input1 First tensor input. Data types supported: QASYMM8/S16/F16/S32/F32. * @param[in] input2 Second tensor input. Data types supported: Same as @p input1. - * @param[in] output Output tensor. Data types supported: Same as @p input1. + * @param[in] output Output tensor. Data types supported: Dependent on subclass. */ - virtual Status validate_arguments(const ITensorInfo &input1, const ITensorInfo &input2, const ITensorInfo &output) = 0; + static Status validate_arguments_common(const ITensorInfo &input1, const ITensorInfo &input2, const ITensorInfo &output); /** Commmon configure function for element-wise operators with no additional options (e.g. Min, Max, SquaredDiff) * */ - template void configure_common(const ITensor *input1, const ITensor *input2, ITensor *output); - ArithmeticOperation _op; // Code of the operation to execute + /** Function to use for the particular tensor types passed to configure() */ + std::function _function; -private: - /** Common signature for all the specialised add functions - * - * @param[in] input1 An input tensor. Data types supported: S16/F16/S32/F32 - * @param[in] input2 An input tensor. Data types supported: S16/F16/S32/F32 - * @param[out] output The output tensor. Data types supported: S16/F16/S32/F32 - * @param[in] window Region on which to execute the kernel. - */ - using ElementwiseFunction = void(const ITensor *input1, const ITensor *input2, ITensor *output, const Window &window); - /** Add function to use for the particular tensor types passed to configure() */ - ElementwiseFunction *_func; - const ITensor *_input1; - const ITensor *_input2; - ITensor *_output; + const ITensor *_input1; + const ITensor *_input2; + ITensor *_output; }; class NEArithmeticOperationKernel : public NEElementwiseOperationKernel @@ -125,7 +123,40 @@ public: protected: // Inherited methods overridden: - Status validate_arguments(const ITensorInfo &input1, const ITensorInfo &input2, const ITensorInfo &output) override; + static Status validate_arguments(const ITensorInfo &input1, const ITensorInfo &input2, const ITensorInfo &output); +}; + +class NEComparisonOperationKernel : public NEElementwiseOperationKernel +{ +public: + NEComparisonOperationKernel() + : NEElementwiseOperationKernel() + { + } + + /** Static function to check if given info will lead to a valid configuration of @ref NEComparisonOperationKernel + * + * @param[in] op Comparison operation to be executed. + * @param[in] input1 First tensor input. Data types supported: QASYMM8/S16/F16/S32/F32. + * @param[in] input2 Second tensor input. Data types supported: Same as @p input1. + * @param[in] output Output tensor. Data types supported: U16/U32. + */ + void configure(ComparisonOperation op, const ITensor *input1, const ITensor *input2, ITensor *output); + + /** Static function to check if given info will lead to a valid configuration of @ref NEComparisonOperationKernel + * + * @param[in] op Comparison operation to be executed. + * @param[in] input1 First tensor input info. Data types supported: QASYMM8/S16/F16/S32/F32. + * @param[in] input2 Second tensor input info. Data types supported: Same as @p input1. + * @param[in] output Output tensor info. Data types supported: U16/U32. + * + * @return a Status + */ + static Status validate(ComparisonOperation op, const ITensorInfo *input1, const ITensorInfo *input2, const ITensorInfo *output); + +protected: + // Inherited methods overridden: + static Status validate_arguments(const ITensorInfo &input1, const ITensorInfo &input2, const ITensorInfo &output); }; } // namespace arm_compute #endif /* __ARM_COMPUTE_NEELEMENTWISEOPERATIONKERNEL_H__ */ diff --git a/arm_compute/core/NEON/wrapper/intrinsics/cge.h b/arm_compute/core/NEON/wrapper/intrinsics/cge.h new file mode 100644 index 0000000000..168a6f597d --- /dev/null +++ b/arm_compute/core/NEON/wrapper/intrinsics/cge.h @@ -0,0 +1,64 @@ +/* + * Copyright (c) 2019 ARM Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#ifndef __ARM_COMPUTE_WRAPPER_CGE_H__ +#define __ARM_COMPUTE_WRAPPER_CGE_H__ + +#include + +namespace arm_compute +{ +namespace wrapper +{ +#define VCGE_IMPL(stype, vtype, rtype, prefix, postfix) \ + inline rtype vcge(const vtype &a, const vtype &b) \ + { \ + return prefix##_##postfix(a, b); \ + } + +VCGE_IMPL(uint8_t, uint8x8_t, uint8x8_t, vcge, u8) +VCGE_IMPL(int8_t, int8x8_t, uint8x8_t, vcge, s8) +VCGE_IMPL(uint16_t, uint16x4_t, uint16x4_t, vcge, u16) +VCGE_IMPL(int16_t, int16x4_t, uint16x4_t, vcge, s16) +VCGE_IMPL(uint32_t, uint32x2_t, uint32x2_t, vcge, u32) +VCGE_IMPL(int32_t, int32x2_t, uint32x2_t, vcge, s32) +VCGE_IMPL(float32x2_t, float32x2_t, uint32x2_t, vcge, f32) +#ifdef __ARM_FEATURE_FP16_VECTOR_ARITHMETIC +VCGE_IMPL(float16x4_t, float16x4_t, uint16x4_t, vcge, f16) +#endif // __ARM_FEATURE_FP16_VECTOR_ARITHMETIC + +VCGE_IMPL(uint8_t, uint8x16_t, uint8x16_t, vcgeq, u8) +VCGE_IMPL(int8_t, int8x16_t, uint8x16_t, vcgeq, s8) +VCGE_IMPL(uint16_t, uint16x8_t, uint16x8_t, vcgeq, u16) +VCGE_IMPL(int16_t, int16x8_t, uint16x8_t, vcgeq, s16) +VCGE_IMPL(uint32_t, uint32x4_t, uint32x4_t, vcgeq, u32) +VCGE_IMPL(int32_t, int32x4_t, uint32x4_t, vcgeq, s32) +VCGE_IMPL(float32x4_t, float32x4_t, uint32x4_t, vcgeq, f32) +#ifdef __ARM_FEATURE_FP16_VECTOR_ARITHMETIC +VCGE_IMPL(float16x8_t, float16x8_t, uint16x8_t, vcgeq, f16) +#endif // __ARM_FEATURE_FP16_VECTOR_ARITHMETIC + +#undef VCGE_IMPL +} // namespace wrapper +} // namespace arm_compute +#endif /* __ARM_COMPUTE_WRAPPER_CGE_H__ */ diff --git a/arm_compute/core/NEON/wrapper/intrinsics/intrinsics.h b/arm_compute/core/NEON/wrapper/intrinsics/intrinsics.h index a0193ee3d2..c8f4a6e041 100644 --- a/arm_compute/core/NEON/wrapper/intrinsics/intrinsics.h +++ b/arm_compute/core/NEON/wrapper/intrinsics/intrinsics.h @@ -29,6 +29,7 @@ #include "arm_compute/core/NEON/wrapper/intrinsics/and.h" #include "arm_compute/core/NEON/wrapper/intrinsics/bsl.h" #include "arm_compute/core/NEON/wrapper/intrinsics/ceq.h" +#include "arm_compute/core/NEON/wrapper/intrinsics/cge.h" #include "arm_compute/core/NEON/wrapper/intrinsics/cgt.h" #include "arm_compute/core/NEON/wrapper/intrinsics/clt.h" #include "arm_compute/core/NEON/wrapper/intrinsics/combine.h" @@ -48,6 +49,7 @@ #include "arm_compute/core/NEON/wrapper/intrinsics/movn.h" #include "arm_compute/core/NEON/wrapper/intrinsics/mul.h" #include "arm_compute/core/NEON/wrapper/intrinsics/neg.h" +#include "arm_compute/core/NEON/wrapper/intrinsics/not.h" #include "arm_compute/core/NEON/wrapper/intrinsics/orr.h" #include "arm_compute/core/NEON/wrapper/intrinsics/padd.h" #include "arm_compute/core/NEON/wrapper/intrinsics/pmax.h" diff --git a/arm_compute/core/NEON/wrapper/intrinsics/not.h b/arm_compute/core/NEON/wrapper/intrinsics/not.h new file mode 100644 index 0000000000..33ac6b5634 --- /dev/null +++ b/arm_compute/core/NEON/wrapper/intrinsics/not.h @@ -0,0 +1,64 @@ +/* + * Copyright (c) 2019 ARM Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#ifndef __ARM_COMPUTE_WRAPPER_NOT_H__ +#define __ARM_COMPUTE_WRAPPER_NOT_H__ + +#include + +namespace arm_compute +{ +namespace wrapper +{ +#define VNOT_IMPL(stype, vtype, prefix, postfix) \ + inline vtype vnot(const vtype &a) \ + { \ + return prefix##_##postfix(a); \ + } + +VNOT_IMPL(uint8_t, uint8x8_t, vmvn, u8) +VNOT_IMPL(int8_t, int8x8_t, vmvn, s8) +VNOT_IMPL(uint16_t, uint16x4_t, vmvn, u16) +VNOT_IMPL(int16_t, int16x4_t, vmvn, s16) +VNOT_IMPL(uint32_t, uint32x2_t, vmvn, u32) +VNOT_IMPL(int32_t, int32x2_t, vmvn, s32) +VNOT_IMPL(float32x2_t, float32x2_t, vinv, f32) +#ifdef __ARM_FEATURE_FP16_VECTOR_ARITHMETIC +VNOT_IMPL(float16x4_t, float16x4_t, vinv, f16) +#endif // __ARM_FEATURE_FP16_VECTOR_ARITHMETIC + +VNOT_IMPL(uint8_t, uint8x16_t, vmvnq, u8) +VNOT_IMPL(int8_t, int8x16_t, vmvnq, s8) +VNOT_IMPL(uint16_t, uint16x8_t, vmvnq, u16) +VNOT_IMPL(int16_t, int16x8_t, vmvnq, s16) +VNOT_IMPL(uint32_t, uint32x4_t, vmvnq, u32) +VNOT_IMPL(int32_t, int32x4_t, vmvnq, s32) +VNOT_IMPL(float32x4_t, float32x4_t, vinvq, f32) +#ifdef __ARM_FEATURE_FP16_VECTOR_ARITHMETIC +VNOT_IMPL(float16x8_t, float16x8_t, vinvq, f16) +#endif // __ARM_FEATURE_FP16_VECTOR_ARITHMETIC + +#undef VNOT_IMPL +} // namespace wrapper +} // namespace arm_compute +#endif /* __ARM_COMPUTE_WRAPPER_NOT_H__ */ diff --git a/arm_compute/runtime/NEON/functions/NEElementwiseOperations.h b/arm_compute/runtime/NEON/functions/NEElementwiseOperations.h index 5cbf1237e4..cd9ed24bee 100644 --- a/arm_compute/runtime/NEON/functions/NEElementwiseOperations.h +++ b/arm_compute/runtime/NEON/functions/NEElementwiseOperations.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018 ARM Limited. + * Copyright (c) 2018-2019 ARM Limited. * * SPDX-License-Identifier: MIT * @@ -14,10 +14,10 @@ * copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INNEUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY NEAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARI SING FROM, + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ @@ -33,7 +33,7 @@ class ITensor; /** Basic function to run @ref NEArithmeticOperationKernel for max * - * @note The tensor data type for the inputs must be S16/F16/S32/F32. + * @note The tensor data type for the inputs must be QASYMM8/S16/F16/S32/F32. * @note The function performs a max operation between two tensors. */ class NEElementwiseMax : public INESimpleFunction @@ -59,7 +59,7 @@ public: /** Basic function to run @ref NEArithmeticOperationKernel for min * - * @note The tensor data type for the inputs must be S16/F16/S32/F32. + * @note The tensor data type for the inputs must be QASYMM8/S16/F16/S32/F32. * @note The function performs a max operation between two tensors. */ class NEElementwiseMin : public INESimpleFunction @@ -85,7 +85,7 @@ public: /** Basic function to run @ref NEArithmeticOperationKernel for squared difference * - * @note The tensor data type for the inputs must be S16/F16/S32/F32. + * @note The tensor data type for the inputs must be QASYMM8/S16/F16/S32/F32. * @note The function performs a squared different operation between two tensors (i.e., out[i] = (in1[i] - in2[i])^2 */ class NEElementwiseSquaredDiff : public INESimpleFunction @@ -108,5 +108,73 @@ public: */ static Status validate(const ITensorInfo *input1, const ITensorInfo *input2, const ITensorInfo *output); }; + +/** Basic function to run @ref NEComparisonOperationKernel + * + * @note The tensor data type for the inputs must be QASYMM8/S16/F16/S32/F32. + * @note The function performs a comparison operation between two tensors. + */ +class NEElementwiseComparison : public INESimpleFunction +{ +public: + /** Initialise the kernel's inputs, output and conversion policy. + * + * @param[in, out] input1 First tensor input. Data types supported: QASYMM8/S16/F16/S32/F32. + * @param[in, out] input2 Second tensor input. Data types supported: Same as @p input1. + * @param[out] output Output tensor. Data types supported: U16/U32. + * @param[in] op Comparison Operation to be performed. + */ + void configure(ITensor *input1, ITensor *input2, ITensor *output, ComparisonOperation op); + /** Static function to check if given info will lead to a valid configuration of @ref NEComparisonOperationKernel + * + * @param[in] input1 First tensor input info. Data types supported: QASYMM8/S16/F16/S32/F32. + * @param[in] input2 Second tensor input info. Data types supported: Same as @p input1. + * @param[in] output Output tensor info. Data types supported: U16/U32. + * @param[in] op Comparison Operation to be performed. + * + * @return a status + */ + static Status validate(const ITensorInfo *input1, const ITensorInfo *input2, const ITensorInfo *output, ComparisonOperation op); +}; + +/** Basic function to run @ref NEComparisonOperationKernel + * + * @note The tensor data type for the inputs must be QASYMM8/S16/F16/S32/F32. + * @note The function performs a comparison operation between two tensors. + */ +template +class NEElementwiseComparisonStatic : public INESimpleFunction +{ +public: + /** Initialise the kernel's inputs, output and conversion policy. + * + * @param[in, out] input1 First tensor input. Data types supported: QASYMM8/S16/F16/S32/F32. + * @param[in, out] input2 Second tensor input. Data types supported: Same as @p input1. + * @param[out] output Output tensor. Data types supported: U16/U32. + */ + void configure(ITensor *input1, ITensor *input2, ITensor *output); + /** Static function to check if given info will lead to a valid configuration of @ref NEComparisonOperationKernel + * + * @param[in] input1 First tensor input info. Data types supported: QASYMM8/S16/F16/S32/F32. + * @param[in] input2 Second tensor input info. Data types supported: Same as @p input1. + * @param[in] output Output tensor info. Data types supported: U16/U32. + * + * @return a status + */ + static Status validate(const ITensorInfo *input1, const ITensorInfo *input2, const ITensorInfo *output); +}; + +/** Basic function to run equal comparison. */ +using NEEqual = NEElementwiseComparisonStatic; +/** Basic function to run not equal comparison. */ +using NENotEqual = NEElementwiseComparisonStatic; +/** Basic function to run greater comparison. */ +using NEGreater = NEElementwiseComparisonStatic; +/** Basic function to run greater-equal comparison. */ +using NEGreaterEqual = NEElementwiseComparisonStatic; +/** Basic function to run less comparison. */ +using NELess = NEElementwiseComparisonStatic; +/** Basic function to run less-equal comparison. */ +using NELessEqual = NEElementwiseComparisonStatic; } // namespace arm_compute #endif /* __ARM_COMPUTE_NEELEMENTWISEOPERATIONS_H__ */ -- cgit v1.2.1