From 6d9d6f49aa05ad033676a219c1a98150fb8401f4 Mon Sep 17 00:00:00 2001 From: Georgios Pinitas Date: Mon, 24 Dec 2018 16:10:47 +0000 Subject: COMPMID-1769: Add support for NEON StridedSlice,Split,Slice,Unstack Change-Id: I7d3c5e6858fed090410720f76947327e39bc72f8 Reviewed-on: https://review.mlplatform.org/450 Reviewed-by: Giuseppe Rossini Tested-by: Arm Jenkins Reviewed-by: Michalis Spyrou Reviewed-by: VidhyaSudhan Loganathan --- arm_compute/core/NEON/NEKernels.h | 3 +- .../core/NEON/kernels/NEStridedSliceKernel.h | 104 +++++++++++++++++++++ arm_compute/runtime/NEON/NEFunctions.h | 6 +- arm_compute/runtime/NEON/functions/NESlice.h | 69 ++++++++++++++ arm_compute/runtime/NEON/functions/NESplit.h | 76 +++++++++++++++ .../runtime/NEON/functions/NEStridedSlice.h | 75 +++++++++++++++ arm_compute/runtime/NEON/functions/NEUnstack.h | 75 +++++++++++++++ 7 files changed, 406 insertions(+), 2 deletions(-) create mode 100644 arm_compute/core/NEON/kernels/NEStridedSliceKernel.h create mode 100644 arm_compute/runtime/NEON/functions/NESlice.h create mode 100644 arm_compute/runtime/NEON/functions/NESplit.h create mode 100644 arm_compute/runtime/NEON/functions/NEStridedSlice.h create mode 100644 arm_compute/runtime/NEON/functions/NEUnstack.h (limited to 'arm_compute') diff --git a/arm_compute/core/NEON/NEKernels.h b/arm_compute/core/NEON/NEKernels.h index e859519d94..95a3e0555b 100644 --- a/arm_compute/core/NEON/NEKernels.h +++ b/arm_compute/core/NEON/NEKernels.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016-2018 ARM Limited. + * Copyright (c) 2016-2019 ARM Limited. * * SPDX-License-Identifier: MIT * @@ -115,6 +115,7 @@ #include "arm_compute/core/NEON/kernels/NESobel5x5Kernel.h" #include "arm_compute/core/NEON/kernels/NESobel7x7Kernel.h" #include "arm_compute/core/NEON/kernels/NESoftmaxLayerKernel.h" +#include "arm_compute/core/NEON/kernels/NEStridedSliceKernel.h" #include "arm_compute/core/NEON/kernels/NETableLookupKernel.h" #include "arm_compute/core/NEON/kernels/NEThresholdKernel.h" #include "arm_compute/core/NEON/kernels/NETileKernel.h" diff --git a/arm_compute/core/NEON/kernels/NEStridedSliceKernel.h b/arm_compute/core/NEON/kernels/NEStridedSliceKernel.h new file mode 100644 index 0000000000..a272a8118b --- /dev/null +++ b/arm_compute/core/NEON/kernels/NEStridedSliceKernel.h @@ -0,0 +1,104 @@ +/* + * Copyright (c) 2018-2019 ARM Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#ifndef __ARM_COMPUTE_NE_STRIDED_SLICE_KERNEL_H__ +#define __ARM_COMPUTE_NE_STRIDED_SLICE_KERNEL_H__ + +#include "arm_compute/core/NEON/INEKernel.h" +#include "arm_compute/core/Types.h" + +#include + +namespace arm_compute +{ +// Forward declarations +class ITensor; + +/** Interface for the kernel to perform tensor strided slicing */ +class NEStridedSliceKernel : public INEKernel +{ +public: + const char *name() const override + { + return "NEStridedSliceKernel"; + } + /** Default constructor */ + NEStridedSliceKernel(); + /** Prevent instances of this class from being copied (As this class contains pointers) */ + NEStridedSliceKernel(const NEStridedSliceKernel &) = delete; + /** Prevent instances of this class from being copied (As this class contains pointers) */ + NEStridedSliceKernel &operator=(const NEStridedSliceKernel &) = delete; + /** Allow instances of this class to be moved */ + NEStridedSliceKernel(NEStridedSliceKernel &&) = default; + /** Allow instances of this class to be moved */ + NEStridedSliceKernel &operator=(NEStridedSliceKernel &&) = default; + /** Default destructor */ + ~NEStridedSliceKernel() = default; + /** Configure kernel + * + * @note Supported tensor rank: up to 4 + * + * @param[in] input Source tensor. Data type supported: U8/S8/QASYMM8/U16/S16/U32/S32/F16/F32 + * @param[out] output Destination tensor. Data type supported: Same as @p input + * @param[in] starts The starts of the dimensions of the input tensor to be sliced. The length must be of rank(input). + * @param[in] ends The ends of the dimensions of the input tensor to be sliced. The length must be of rank(input). + * @param[in] strides The strides of the dimensions of the input tensor to be sliced. The length must be of rank(input). + * @param[in] begin_mask If the ith bit of begin_mask is set, starts[i] is ignored and the fullest possible range in that dimension is used instead. + * @param[in] end_mask If the ith bit of end_mask is set, ends[i] is ignored and the fullest possible range in that dimension is used instead. + * @param[in] shrink_axis_mask If the ith bit of shrink_axis_mask is set, it implies that the ith specification shrinks the dimensionality by 1. + * A slice of size 1 starting from starts[i] in the dimension must be preserved. + */ + void configure(const ITensor *input, ITensor *output, + const Coordinates &starts, const Coordinates &ends, const BiStrides &strides, + int32_t begin_mask, int32_t end_mask, int32_t shrink_axis_mask); + + /** Static function to check if given info will lead to a valid configuration of @ref CLStridedSliceKernel + * + * @note Supported tensor rank: up to 4 + * + * @param[in] input Source tensor info. Data type supported: U8/S8/QASYMM8/U16/S16/U32/S32/F16/F32 + * @param[in] output Destination tensor info. Data type supported: Same as @p input + * @param[in] starts The starts of the dimensions of the input tensor to be sliced. The length must be of rank(input). + * @param[in] ends The ends of the dimensions of the input tensor to be sliced. The length must be of rank(input). + * @param[in] strides The strides of the dimensions of the input tensor to be sliced. The length must be of rank(input). + * @param[in] begin_mask If the ith bit of begin_mask is set, starts[i] is ignored and the fullest possible range in that dimension is used instead. + * @param[in] end_mask If the ith bit of end_mask is set, ends[i] is ignored and the fullest possible range in that dimension is used instead. + * @param[in] shrink_axis_mask If the ith bit of shrink_axis_mask is set, it implies that the ith specification shrinks the dimensionality by 1. + * A slice of size 1 starting from starts[i] in the dimension must be preserved. + */ + static Status validate(const ITensorInfo *input, const ITensorInfo *output, + const Coordinates &starts, const Coordinates &ends, const BiStrides &strides, + int32_t begin_mask, int32_t end_mask, int32_t shrink_axis_mask); + + // Inherited methods overridden: + void run(const Window &window, const ThreadInfo &info) override; + +private: + const ITensor *_input; /**< Source tensor */ + ITensor *_output; /**< Destination tensor */ + Coordinates _starts_abs; /**< Absolute start coordinates */ + Coordinates _final_strides; /**< Final strides */ + int32_t _shrink_mask; /**< Shrink axis mask */ +}; +} // namespace arm_compute +#endif /*__ARM_COMPUTE_NE_STRIDED_SLICE_KERNEL_H__ */ diff --git a/arm_compute/runtime/NEON/NEFunctions.h b/arm_compute/runtime/NEON/NEFunctions.h index bfecbcf65e..53afb985f5 100644 --- a/arm_compute/runtime/NEON/NEFunctions.h +++ b/arm_compute/runtime/NEON/NEFunctions.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016-2018 ARM Limited. + * Copyright (c) 2016-2019 ARM Limited. * * SPDX-License-Identifier: MIT * @@ -114,14 +114,18 @@ #include "arm_compute/runtime/NEON/functions/NEScharr3x3.h" #include "arm_compute/runtime/NEON/functions/NESelect.h" #include "arm_compute/runtime/NEON/functions/NESimpleAssemblyFunction.h" +#include "arm_compute/runtime/NEON/functions/NESlice.h" #include "arm_compute/runtime/NEON/functions/NESobel3x3.h" #include "arm_compute/runtime/NEON/functions/NESobel5x5.h" #include "arm_compute/runtime/NEON/functions/NESobel7x7.h" #include "arm_compute/runtime/NEON/functions/NESoftmaxLayer.h" +#include "arm_compute/runtime/NEON/functions/NESplit.h" +#include "arm_compute/runtime/NEON/functions/NEStridedSlice.h" #include "arm_compute/runtime/NEON/functions/NETableLookup.h" #include "arm_compute/runtime/NEON/functions/NEThreshold.h" #include "arm_compute/runtime/NEON/functions/NETile.h" #include "arm_compute/runtime/NEON/functions/NETranspose.h" +#include "arm_compute/runtime/NEON/functions/NEUnstack.h" #include "arm_compute/runtime/NEON/functions/NEUpsampleLayer.h" #include "arm_compute/runtime/NEON/functions/NEWarpAffine.h" #include "arm_compute/runtime/NEON/functions/NEWarpPerspective.h" diff --git a/arm_compute/runtime/NEON/functions/NESlice.h b/arm_compute/runtime/NEON/functions/NESlice.h new file mode 100644 index 0000000000..cc95584048 --- /dev/null +++ b/arm_compute/runtime/NEON/functions/NESlice.h @@ -0,0 +1,69 @@ +/* + * Copyright (c) 2018-2019 ARM Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#ifndef __ARM_COMPUTE_NE_SLICE_H__ +#define __ARM_COMPUTE_NE_SLICE_H__ + +#include "arm_compute/runtime/NEON/INESimpleFunctionNoBorder.h" + +namespace arm_compute +{ +// Forward Declarations +class ITensor; + +/** Basic function to perform tensor slicing */ +class NESlice : public INESimpleFunctionNoBorder +{ +public: + /** Configure kernel + * + * @note Supported tensor rank: up to 4 + * @note Start indices must be non-negative. 0 <= starts[i] + * @note End coordinates can be negative, which represents the number of elements before the end of that dimension. + * @note End indices are not inclusive unless negative. + * + * @param[in] input Source tensor. Data type supported: U8/S8/QASYMM8/U16/S16/U32/S32/F16/F32 + * @param[out] output Destination tensor. Data type supported: Same as @p input + * @param[in] starts The starts of the dimensions of the input tensor to be sliced. The length must be of rank(input). + * @param[in] ends The ends of the dimensions of the input tensor to be sliced. The length must be of rank(input). + */ + void configure(const ITensor *input, ITensor *output, const Coordinates &starts, const Coordinates &ends); + + /** Static function to check if given info will lead to a valid configuration of @ref NESlice + * + * @note Supported tensor rank: up to 4 + * @note Start indices must be non-negative. 0 <= starts[i] + * @note End coordinates can be negative, which represents the number of elements before the end of that dimension. + * @note End indices are not inclusive unless negative. + * + * @param[in] input Source tensor info. Data type supported: U8/S8/QASYMM8/U16/S16/U32/S32/F16/F32 + * @param[in] output Destination tensor info. Data type supported: Same as @p input + * @param[in] starts The starts of the dimensions of the input tensor to be sliced. The length must be of rank(input). + * @param[in] ends The ends of the dimensions of the input tensor to be sliced. The length must be of rank(input). + * + * @return A status + */ + static Status validate(const ITensorInfo *input, const ITensorInfo *output, const Coordinates &starts, const Coordinates &ends); +}; +} // namespace arm_compute +#endif /* __ARM_COMPUTE_NE_SLICE_H__ */ diff --git a/arm_compute/runtime/NEON/functions/NESplit.h b/arm_compute/runtime/NEON/functions/NESplit.h new file mode 100644 index 0000000000..9f8aea41eb --- /dev/null +++ b/arm_compute/runtime/NEON/functions/NESplit.h @@ -0,0 +1,76 @@ +/* + * Copyright (c) 2018-2019 ARM Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#ifndef __ARM_COMPUTE_NESPLIT_H__ +#define __ARM_COMPUTE_NESPLIT_H__ + +#include "arm_compute/core/Types.h" + +#include "arm_compute/runtime/IFunction.h" +#include "arm_compute/runtime/NEON/functions/NESlice.h" + +#include +#include + +namespace arm_compute +{ +// Forward declarations +class ITensor; + +/** Basic function to split a tensor along a given axis */ +class NESplit : public IFunction +{ +public: + /** Default constructor */ + NESplit(); + /** Initialise the kernel's input and outputs. + * + * @param[in] input The input tensor. Data types supported: U8/S8/QASYMM8/U16/S16/U32/S32/F16/F32. + * @param[out] outputs A vector containing the output tensors. Data types supported: Same as @p input. + * The output tensors should match the input tensor dimensions for all shape dimensions apart + * from the split dimension. + * @param[in] axis Axis on which to split the input. + */ + void configure(const ITensor *input, const std::vector &outputs, unsigned int axis); + /** Static function to check if given info will lead to a valid configuration of @ref NESplit + * + * @param[in] input The input tensor info. Data types supported: U8/S8/QASYMM8/U16/S16/U32/S32/F16/F32. + * @param[in] outputs A vector containing the output tensors' info. Data types supported: Same as @p input. + * The output tensors should match the input tensor dimensions for all shape dimensions apart + * from the split dimension + * @param[in] axis Axis on which to split the input. + * + * @return a status + */ + static Status validate(const ITensorInfo *input, const std::vector &outputs, unsigned int axis); + + // Inherited methods overridden: + void run() override; + +private: + std::vector _outputs_vector; + std::unique_ptr _slice_functions; + unsigned int _num_outputs; +}; +} // namespace arm_compute +#endif /* __ARM_COMPUTE_NESPLIT_H__ */ diff --git a/arm_compute/runtime/NEON/functions/NEStridedSlice.h b/arm_compute/runtime/NEON/functions/NEStridedSlice.h new file mode 100644 index 0000000000..209c1ab812 --- /dev/null +++ b/arm_compute/runtime/NEON/functions/NEStridedSlice.h @@ -0,0 +1,75 @@ +/* + * Copyright (c) 2018-2019 ARM Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#ifndef __ARM_COMPUTE_NE_STRIDED_SLICE_H__ +#define __ARM_COMPUTE_NE_STRIDED_SLICE_H__ + +#include "arm_compute/runtime/NEON/INESimpleFunction.h" + +namespace arm_compute +{ +// Forward Declarations +class ITensor; + +/** Basic function to run @ref NEStridedSliceKernel */ +class NEStridedSlice : public INESimpleFunction +{ +public: + /** Configure kernel + * + * @note Supported tensor rank: up to 4 + * + * @param[in] input Source tensor. Data type supported: U8/S8/QASYMM8/U16/S16/U32/S32/F16/F32 + * @param[out] output Destination tensor. Data type supported: Same as @p input + * @param[in] starts The starts of the dimensions of the input tensor to be sliced. The length must be of rank(input). + * @param[in] ends The ends of the dimensions of the input tensor to be sliced. The length must be of rank(input). + * @param[in] strides The strides of the dimensions of the input tensor to be sliced. The length must be of rank(input). + * @param[in] begin_mask (Optional) If the ith bit of begin_mask is set, starts[i] is ignored and the fullest possible range in that dimension is used instead. + * @param[in] end_mask (Optional) If the ith bit of end_mask is set, ends[i] is ignored and the fullest possible range in that dimension is used instead. + * @param[in] shrink_axis_mask (Optional) If the ith bit of shrink_axis_mask is set, it implies that the ith specification shrinks the dimensionality by 1. + * A slice of size 1 starting from starts[i] in the dimension must be preserved. + */ + void configure(const ITensor *input, ITensor *output, + const Coordinates &starts, const Coordinates &ends, const BiStrides &strides, + int32_t begin_mask = 0, int32_t end_mask = 0, int32_t shrink_axis_mask = 0); + + /** Static function to check if given info will lead to a valid configuration of @ref NEStridedSlice + * + * @note Supported tensor rank: up to 4 + * + * @param[in] input Source tensor info. Data type supported: U8/S8/QASYMM8/U16/S16/U32/S32/F16/F32 + * @param[in] output Destination tensor info. Data type supported: Same as @p input + * @param[in] starts The starts of the dimensions of the input tensor to be sliced. The length must be of rank(input). + * @param[in] ends The ends of the dimensions of the input tensor to be sliced. The length must be of rank(input). + * @param[in] strides The strides of the dimensions of the input tensor to be sliced. The length must be of rank(input). + * @param[in] begin_mask (Optional) If the ith bit of begin_mask is set, starts[i] is ignored and the fullest possible range in that dimension is used instead. + * @param[in] end_mask (Optional) If the ith bit of end_mask is set, ends[i] is ignored and the fullest possible range in that dimension is used instead. + * @param[in] shrink_axis_mask (Optional) If the ith bit of shrink_axis_mask is set, it implies that the ith specification shrinks the dimensionality by 1. + * A slice of size 1 starting from starts[i] in the dimension must be preserved. + */ + static Status validate(const ITensorInfo *input, const ITensorInfo *output, + const Coordinates &starts, const Coordinates &ends, const BiStrides &strides, + int32_t begin_mask = 0, int32_t end_mask = 0, int32_t shrink_axis_mask = 0); +}; +} // namespace arm_compute +#endif /* __ARM_COMPUTE_NE_STRIDED_SLICE_H__ */ diff --git a/arm_compute/runtime/NEON/functions/NEUnstack.h b/arm_compute/runtime/NEON/functions/NEUnstack.h new file mode 100644 index 0000000000..7210afa914 --- /dev/null +++ b/arm_compute/runtime/NEON/functions/NEUnstack.h @@ -0,0 +1,75 @@ +/* + * Copyright (c) 2018-2019 ARM Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#ifndef __ARM_COMPUTE_NEUNSTACK_H__ +#define __ARM_COMPUTE_NEUNSTACK_H__ + +#include "arm_compute/core/Types.h" +#include "arm_compute/runtime/IFunction.h" + +#include "arm_compute/runtime/NEON/functions/NEStridedSlice.h" + +#include + +namespace arm_compute +{ +// Forward declarations +class ITensor; + +/** Basic function to unpack a rank-R tensor into rank-(R-1) tensors. This function calls the following functions: + * + * -# @ref NEStridedSlice + */ +class NEUnstack : public IFunction +{ +public: + /** Default constructor */ + NEUnstack(); + /** Set the input, output and unstacking axis. + * + * @param[in] input A tensor to be unstacked. Data type supported: U8/S8/QASYMM8/U16/S16/U32/S32/F16/F32. + * @param[in,out] output_vector A vector of tensors. Data types supported: Same as @p input. + * Note: The number of elements of the vector will be used as the number of slices to be taken from the axis. + * @param[in] axis The axis to unstack along. Valid values are [-R,R) where R is the input's rank. Negative values wrap around. + * + */ + void configure(const ITensor *input, const std::vector &output_vector, int axis); + /** Static function to check if given info will lead to a valid configuration of @ref NEUnstack + * + * @param[in] input Input tensor info. Data type supported: U8/S8/QASYMM8/U16/S16/U32/S32/F16/F32 + * @param[in] output_vector Vector of output tensors' info. Data types supported: Same as @p input. + * @param[in] axis The axis to unstack along. Valid values are [-R,R) where R is the input's rank. Negative values wrap around. + * + * @return a status + */ + static Status validate(const ITensorInfo *input, const std::vector &output_vector, int axis); + + // Inherited methods overridden: + void run() override; + +private: + unsigned int _num_slices; + std::unique_ptr _strided_slice_vector; +}; +} // namespace arm_compute +#endif /* __ARM_COMPUTE_NEUNSTACK_H__ */ -- cgit v1.2.1