From 5a4fe19c23729f1e58e947ed15e865dc33c35ff6 Mon Sep 17 00:00:00 2001 From: Gian Marco Iodice Date: Mon, 16 Mar 2020 12:22:37 +0000 Subject: COMPMID-3112: Reworking heuristic for CLGEMM - part1 The new heuristic only affects the floating point execution Change-Id: Ia6edc14ab1bdda4cee31b7afb096d0305d99b809 Signed-off-by: Gian Marco Iodice Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/2942 Reviewed-by: Georgios Pinitas Tested-by: Arm Jenkins Comments-Addressed: Arm Jenkins --- arm_compute/runtime/CL/CLTypes.h | 58 +++++++++++++++++++ arm_compute/runtime/CL/ICLGEMMKernelSelection.h | 66 ++++++++++++++++++++++ arm_compute/runtime/CL/functions/CLGEMM.h | 32 ++++------- .../runtime/CL/gemm/CLGEMMKernelSelection.h | 65 +++++++++++++++++++++ .../runtime/CL/gemm/CLGEMMKernelSelectionBifrost.h | 53 +++++++++++++++++ .../runtime/CL/gemm/CLGEMMKernelSelectionMidgard.h | 53 +++++++++++++++++ .../runtime/CL/gemm/CLGEMMKernelSelectionValhall.h | 53 +++++++++++++++++ 7 files changed, 360 insertions(+), 20 deletions(-) create mode 100644 arm_compute/runtime/CL/CLTypes.h create mode 100644 arm_compute/runtime/CL/ICLGEMMKernelSelection.h create mode 100644 arm_compute/runtime/CL/gemm/CLGEMMKernelSelection.h create mode 100644 arm_compute/runtime/CL/gemm/CLGEMMKernelSelectionBifrost.h create mode 100644 arm_compute/runtime/CL/gemm/CLGEMMKernelSelectionMidgard.h create mode 100644 arm_compute/runtime/CL/gemm/CLGEMMKernelSelectionValhall.h (limited to 'arm_compute') diff --git a/arm_compute/runtime/CL/CLTypes.h b/arm_compute/runtime/CL/CLTypes.h new file mode 100644 index 0000000000..f7b4ebd9b4 --- /dev/null +++ b/arm_compute/runtime/CL/CLTypes.h @@ -0,0 +1,58 @@ +/* + * Copyright (c) 2020 ARM Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#ifndef ARM_COMPUTE_RUNTIME_CLTYPES_H +#define ARM_COMPUTE_RUNTIME_CLTYPES_H + +namespace arm_compute +{ +/** OpenCL GEMM kernel types */ +enum class CLGEMMKernelType +{ + /** Native GEMM kernel with fixed block size. + * @note Temporary variant to keep compatibility with the old implementation. + * @note This variant will be deprecated in favor of a new and configurable NATIVE variant + */ + NATIVE_V1, + /** Reshaped GEMM kernel where both lhs and rhs matrices are reshaped. Fixed block size fixed. + * @note Temporary variant to keep compatibility with the old implementation. + * @note This variant will be deprecated in favor of RESHAPED + */ + RESHAPED_V1, + /** Reshaped GEMM kernel where both lhs and rhs matrices are reshaped. Configurable reshape and block size */ + RESHAPED, + /** Reshaped GEMM kernel where only the rhs matrix is reshaped. Configurable reshape and block size */ + RESHAPED_ONLY_RHS +}; + +/** OpenCL GEMM kernel selection parameters. These information are retrieved to select the GEMM kernel on OpenCL */ +struct CLGEMMKernelSelectionParams +{ + unsigned int m{ 0 }; /**< Number of rows for the lhs matrix. Lhs matrix NOT transposed */ + unsigned int n{ 0 }; /**< Number of columns for the rhs matrix. Rhs matrix NOT transposed */ + unsigned int k{ 0 }; /**< Number of rows for the rhs matrix. Rhs matrix NOT transposed */ + bool is_rhs_constant{ false }; /**< True if the content of the rhs matrix is constant */ + DataType data_type{DataType::UNKNOWN}; /**< Data type */ +}; +} // namespace arm_compute +#endif /* ARM_COMPUTE_RUNTIME_CLTYPES_H */ diff --git a/arm_compute/runtime/CL/ICLGEMMKernelSelection.h b/arm_compute/runtime/CL/ICLGEMMKernelSelection.h new file mode 100644 index 0000000000..69b941109d --- /dev/null +++ b/arm_compute/runtime/CL/ICLGEMMKernelSelection.h @@ -0,0 +1,66 @@ +/* + * Copyright (c) 2020 ARM Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#ifndef ARM_COMPUTE_ICLGEMMKERNELSELECTION_H +#define ARM_COMPUTE_ICLGEMMKERNELSELECTION_H + +#include "arm_compute/core/GPUTarget.h" +#include "arm_compute/core/Types.h" +#include "arm_compute/runtime/CL/CLTypes.h" + +namespace arm_compute +{ +namespace cl_gemm +{ +/** Basic interface for the GEMM kernel selection */ +class ICLGEMMKernelSelection +{ +public: + /** Constructor + * + * @param[in] arch GPU target + */ + ICLGEMMKernelSelection(GPUTarget arch) + : _target(arch) + { + } + /** Default Move Constructor. */ + ICLGEMMKernelSelection(ICLGEMMKernelSelection &&) = default; + /** Default move assignment operator */ + ICLGEMMKernelSelection &operator=(ICLGEMMKernelSelection &&) = default; + /** Virtual destructor */ + virtual ~ICLGEMMKernelSelection() = default; + /** Given the input parameters passed through @ref CLGEMMKernelSelectionParams, this method returns the @ref CLGEMMKernelType to use + * + * @param[in] params Input parameters used by the function to return the OpenCL GEMM's kernel + * + * @return @ref CLGEMMKernelType + */ + virtual CLGEMMKernelType select_kernel(const CLGEMMKernelSelectionParams ¶ms) = 0; + +protected: + GPUTarget _target; /**< GPU target could be used to call a dedicated heuristic for each GPU IP for a given GPU architecture */ +}; +} // namespace cl_gemm +} // namespace arm_compute +#endif /*ARM_COMPUTE_ICLGEMMKERNELSELECTION_H */ diff --git a/arm_compute/runtime/CL/functions/CLGEMM.h b/arm_compute/runtime/CL/functions/CLGEMM.h index bb620eb6f7..7a4f12043e 100644 --- a/arm_compute/runtime/CL/functions/CLGEMM.h +++ b/arm_compute/runtime/CL/functions/CLGEMM.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016-2019 ARM Limited. + * Copyright (c) 2016-2020 ARM Limited. * * SPDX-License-Identifier: MIT * @@ -30,6 +30,7 @@ #include "arm_compute/core/CL/kernels/CLGEMMReshapeLHSMatrixKernel.h" #include "arm_compute/core/CL/kernels/CLGEMMReshapeRHSMatrixKernel.h" #include "arm_compute/runtime/CL/CLTensor.h" +#include "arm_compute/runtime/CL/CLTypes.h" #include "arm_compute/runtime/IFunction.h" #include "arm_compute/runtime/IMemoryManager.h" #include "arm_compute/runtime/IWeightsManager.h" @@ -91,10 +92,10 @@ private: /** Basic function to execute GEMM on OpenCL. This function calls the following OpenCL kernels: * * -# @ref CLGEMMReshapeLHSMatrixKernel (only if the RESHAPED_V1 is selected by the heuristic model) - * -# @ref CLGEMMReshapeRHSMatrixKernel (only if either the RESHAPED_V1 or RESHAPED_ONLY_RHS is selected by the select_gemm_type method()) - * -# @ref CLGEMMMatrixMultiplyKernel (only if either the NATIVE or RESHAPED_V1 is selected by the select_gemm_type method()) - * -# @ref CLGEMMMatrixMultiplyReshapedKernel (only if RESHAPED_V1 is selected by the select_gemm_type method()) - * -# @ref CLGEMMMatrixMultiplyReshapedOnlyRHSKernel (only if RESHAPED_ONLY_RHS is selected by the select_gemm_type method()) + * -# @ref CLGEMMReshapeRHSMatrixKernel (only if either the RESHAPED_V1 or RESHAPED_ONLY_RHS is selected by the select_gemm_kernel method()) + * -# @ref CLGEMMMatrixMultiplyKernel (only if either the NATIVE or RESHAPED_V1 is selected by the select_gemm_kernel method()) + * -# @ref CLGEMMMatrixMultiplyReshapedKernel (only if RESHAPED_V1 is selected by the select_gemm_kernel method()) + * -# @ref CLGEMMMatrixMultiplyReshapedOnlyRHSKernel (only if RESHAPED_ONLY_RHS is selected by the select_gemm_kernel method()) * */ class CLGEMM : public IFunction @@ -153,25 +154,16 @@ public: void prepare() override; private: - enum class GEMMType - { - NATIVE, - RESHAPED_V1, - RESHAPED_V2, - RESHAPED_ONLY_RHS - }; - - // TODO (COMPMID-2095) - static GEMMType select_gemm_type(unsigned int m, unsigned int n, unsigned int k, DataType data_type, bool reshape_b_only_on_first_run, GPUTarget gpu_target); + static CLGEMMKernelType select_gemm_kernel(unsigned int m, unsigned int n, unsigned int k, DataType data_type, bool reshape_b_only_on_first_run); - void configure_native(const ICLTensor *a, const ICLTensor *b, const ICLTensor *c, ICLTensor *output, float alpha, float beta, const GEMMInfo &gemm_info); + void configure_native_v1(const ICLTensor *a, const ICLTensor *b, const ICLTensor *c, ICLTensor *output, float alpha, float beta, const GEMMInfo &gemm_info); void configure_reshaped_v1(const ICLTensor *a, const ICLTensor *b, const ICLTensor *c, ICLTensor *output, float alpha, float beta, const GEMMInfo &gemm_info); - void configure_reshaped_v2(const ICLTensor *a, const ICLTensor *b, const ICLTensor *c, ICLTensor *output, float alpha, float beta, const GEMMInfo &gemm_info); + void configure_reshaped(const ICLTensor *a, const ICLTensor *b, const ICLTensor *c, ICLTensor *output, float alpha, float beta, const GEMMInfo &gemm_info); void configure_reshaped_only_rhs(const ICLTensor *a, const ICLTensor *b, const ICLTensor *c, ICLTensor *output, float alpha, float beta, const GEMMInfo &gemm_info); - static Status validate_native(const ITensorInfo *a, const ITensorInfo *b, const ITensorInfo *c, const ITensorInfo *output, float alpha, float beta, const GEMMInfo &gemm_info); + static Status validate_native_v1(const ITensorInfo *a, const ITensorInfo *b, const ITensorInfo *c, const ITensorInfo *output, float alpha, float beta, const GEMMInfo &gemm_info); static Status validate_reshaped_v1(const ITensorInfo *a, const ITensorInfo *b, const ITensorInfo *c, const ITensorInfo *output, float alpha, float beta, const GEMMInfo &gemm_info); - static Status validate_reshaped_v2(const ITensorInfo *a, const ITensorInfo *b, const ITensorInfo *c, const ITensorInfo *output, float alpha, float beta, const GEMMInfo &gemm_info); + static Status validate_reshaped(const ITensorInfo *a, const ITensorInfo *b, const ITensorInfo *c, const ITensorInfo *output, float alpha, float beta, const GEMMInfo &gemm_info); static Status validate_reshaped_only_rhs(const ITensorInfo *a, const ITensorInfo *b, const ITensorInfo *c, const ITensorInfo *output, float alpha, float beta, const GEMMInfo &gemm_info); MemoryGroup _memory_group; @@ -187,7 +179,7 @@ private: const ICLTensor *_original_b; bool _reshape_b_only_on_first_run; bool _is_prepared; - GEMMType _gemm_type; + CLGEMMKernelType _gemm_kernel_type; }; } // namespace arm_compute diff --git a/arm_compute/runtime/CL/gemm/CLGEMMKernelSelection.h b/arm_compute/runtime/CL/gemm/CLGEMMKernelSelection.h new file mode 100644 index 0000000000..47d787445e --- /dev/null +++ b/arm_compute/runtime/CL/gemm/CLGEMMKernelSelection.h @@ -0,0 +1,65 @@ +/* + * Copyright (c) 2020 ARM Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#ifndef ARM_COMPUTE_CLGEMMKERNELSELECTION_H +#define ARM_COMPUTE_CLGEMMKERNELSELECTION_H + +#include "arm_compute/runtime/CL/ICLGEMMKernelSelection.h" +#include "arm_compute/runtime/CL/gemm/CLGEMMKernelSelectionBifrost.h" +#include "arm_compute/runtime/CL/gemm/CLGEMMKernelSelectionMidgard.h" +#include "arm_compute/runtime/CL/gemm/CLGEMMKernelSelectionValhall.h" + +#include + +namespace arm_compute +{ +namespace cl_gemm +{ +/** CLGEMMKernelSelection factory class */ +class CLGEMMKernelSelectionFactory final +{ +public: + /** Static method to select the GEMM kernel accordingly with the GPU target and GEMM's dimensionality + * + * @param[in] gpu GPU target + * + * @return CLGEMMKernelSelection class + */ + static std::unique_ptr create(GPUTarget gpu) + { + switch(get_arch_from_target(gpu)) + { + case GPUTarget::MIDGARD: + return support::cpp14::make_unique(gpu); + case GPUTarget::BIFROST: + return support::cpp14::make_unique(gpu); + case GPUTarget::VALHALL: + return support::cpp14::make_unique(gpu); + default: + ARM_COMPUTE_ERROR("Not supported GPU target"); + } + } +}; +} // namespace cl_gemm +} // namespace arm_compute +#endif /*ARM_COMPUTE_CLGEMMKERNELSELECTION_H */ diff --git a/arm_compute/runtime/CL/gemm/CLGEMMKernelSelectionBifrost.h b/arm_compute/runtime/CL/gemm/CLGEMMKernelSelectionBifrost.h new file mode 100644 index 0000000000..94311fb3aa --- /dev/null +++ b/arm_compute/runtime/CL/gemm/CLGEMMKernelSelectionBifrost.h @@ -0,0 +1,53 @@ +/* + * Copyright (c) 2020 ARM Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#ifndef ARM_COMPUTE_CLGEMMKERNELSELECTIONBIFROST_H +#define ARM_COMPUTE_CLGEMMKERNELSELECTIONBIFROST_H + +#include "arm_compute/runtime/CL/ICLGEMMKernelSelection.h" + +namespace arm_compute +{ +namespace cl_gemm +{ +/** Bifrost based OpenCL GEMMKernel selection */ +class CLGEMMKernelSelectionBifrost final : public ICLGEMMKernelSelection +{ +public: + /** Constructor + * + * @param[in] gpu GPU target + */ + CLGEMMKernelSelectionBifrost(GPUTarget gpu); + + // Inherited overridden method + CLGEMMKernelType select_kernel(const CLGEMMKernelSelectionParams ¶ms) override; + +private: + CLGEMMKernelType default_f32(unsigned int m, unsigned int n, unsigned int k, bool is_rhs_constant); + CLGEMMKernelType default_f16(unsigned int m, unsigned int n, unsigned int k, bool is_rhs_constant); + CLGEMMKernelType default_q8(unsigned int m, unsigned int n, unsigned int k, bool is_rhs_constant); +}; +} // namespace cl_gemm +} // namespace arm_compute +#endif /*ARM_COMPUTE_CLGEMMKERNELSELECTIONBIFROST_H */ diff --git a/arm_compute/runtime/CL/gemm/CLGEMMKernelSelectionMidgard.h b/arm_compute/runtime/CL/gemm/CLGEMMKernelSelectionMidgard.h new file mode 100644 index 0000000000..c0bc4fc507 --- /dev/null +++ b/arm_compute/runtime/CL/gemm/CLGEMMKernelSelectionMidgard.h @@ -0,0 +1,53 @@ +/* + * Copyright (c) 2020 ARM Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#ifndef ARM_COMPUTE_CLGEMMKERNELSELECTIONMIDGARD_H +#define ARM_COMPUTE_CLGEMMKERNELSELECTIONMIDGARD_H + +#include "arm_compute/runtime/CL/ICLGEMMKernelSelection.h" + +namespace arm_compute +{ +namespace cl_gemm +{ +/** Midgard based OpenCL GEMMKernel selection */ +class CLGEMMKernelSelectionMidgard final : public ICLGEMMKernelSelection +{ +public: + /** Constructor + * + * @param[in] gpu GPU target + */ + CLGEMMKernelSelectionMidgard(GPUTarget gpu); + + // Inherited overridden method + CLGEMMKernelType select_kernel(const CLGEMMKernelSelectionParams ¶ms) override; + +private: + CLGEMMKernelType default_f32(unsigned int m, unsigned int n, unsigned int k, bool is_rhs_constant); + CLGEMMKernelType default_f16(unsigned int m, unsigned int n, unsigned int k, bool is_rhs_constant); + CLGEMMKernelType default_q8(unsigned int m, unsigned int n, unsigned int k, bool is_rhs_constant); +}; +} // namespace cl_gemm +} // namespace arm_compute +#endif /*ARM_COMPUTE_CLGEMMKERNELSELECTIONMIDGARD_H */ diff --git a/arm_compute/runtime/CL/gemm/CLGEMMKernelSelectionValhall.h b/arm_compute/runtime/CL/gemm/CLGEMMKernelSelectionValhall.h new file mode 100644 index 0000000000..d9006e78f1 --- /dev/null +++ b/arm_compute/runtime/CL/gemm/CLGEMMKernelSelectionValhall.h @@ -0,0 +1,53 @@ +/* + * Copyright (c) 2020 ARM Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#ifndef ARM_COMPUTE_CLGEMMKERNELSELECTIONVALHALL_H +#define ARM_COMPUTE_CLGEMMKERNELSELECTIONVALHALL_H + +#include "arm_compute/runtime/CL/ICLGEMMKernelSelection.h" + +namespace arm_compute +{ +namespace cl_gemm +{ +/** Valhall based OpenCL GEMMKernel selection */ +class CLGEMMKernelSelectionValhall final : public ICLGEMMKernelSelection +{ +public: + /** Constructor + * + * @param[in] gpu GPU target + */ + CLGEMMKernelSelectionValhall(GPUTarget gpu); + + // Inherited overridden method + CLGEMMKernelType select_kernel(const CLGEMMKernelSelectionParams ¶ms) override; + +private: + CLGEMMKernelType default_f32(unsigned int m, unsigned int n, unsigned int k, bool is_rhs_constant); + CLGEMMKernelType default_f16(unsigned int m, unsigned int n, unsigned int k, bool is_rhs_constant); + CLGEMMKernelType default_q8(unsigned int m, unsigned int n, unsigned int k, bool is_rhs_constant); +}; +} // namespace cl_gemm +} // namespace arm_compute +#endif /*ARM_COMPUTE_CLGEMMKERNELSELECTIONVALHALL_H */ -- cgit v1.2.1