From 6d109965f3641056bb8164dc8450a7327e76e939 Mon Sep 17 00:00:00 2001 From: giuros01 Date: Mon, 7 Jan 2019 17:47:19 +0000 Subject: COMPMID-1691: Optimize CLDepthwiseConvolutionKernel (QASYMM8/NHWC) for 3x3 kernels (stride=1 and stride=2) Change-Id: I7d0d2dc350feeb40d253d17f9ffd5051a8fb42ef Reviewed-on: https://review.mlplatform.org/511 Reviewed-by: Gian Marco Iodice Tested-by: Arm Jenkins --- arm_compute/core/Types.h | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'arm_compute/core/Types.h') diff --git a/arm_compute/core/Types.h b/arm_compute/core/Types.h index 317c8990fa..9fbd0ef9fb 100644 --- a/arm_compute/core/Types.h +++ b/arm_compute/core/Types.h @@ -1745,6 +1745,12 @@ private: const bool _reinterpret_input_as_3d; }; +struct DepthwiseConvolutionReshapeInfo +{ + unsigned int c0{ 1 }; /**< Number of channels processed by the depth-wise convolution */ + bool transpose{ false }; /**< True if the block MxC0 (where M is the area of the filter i.e. KwxKh) has to be transposed */ +}; + /** GEMMLowp output stage type */ enum class GEMMLowpOutputStageType { -- cgit v1.2.1