From 5801a5508aecc91df7d669f086d6977d70059c65 Mon Sep 17 00:00:00 2001 From: George Wort Date: Thu, 13 Dec 2018 17:50:26 +0000 Subject: COMPMID-1767: NEON: Implement Where/Select Change-Id: If8a1ab6d6a029a5c547b726e0692eecef9a2e97d Reviewed-on: https://review.mlplatform.org/415 Tested-by: Arm Jenkins Reviewed-by: Georgios Pinitas --- arm_compute/core/NEON/NEKernels.h | 1 + arm_compute/core/NEON/kernels/NESelectKernel.h | 102 +++++++++++++++++++++ .../core/NEON/wrapper/intrinsics/bitselect.h | 64 +++++++++++++ .../core/NEON/wrapper/intrinsics/greaterthan.h | 64 +++++++++++++ .../core/NEON/wrapper/intrinsics/intrinsics.h | 2 + 5 files changed, 233 insertions(+) create mode 100644 arm_compute/core/NEON/kernels/NESelectKernel.h create mode 100644 arm_compute/core/NEON/wrapper/intrinsics/bitselect.h create mode 100644 arm_compute/core/NEON/wrapper/intrinsics/greaterthan.h (limited to 'arm_compute/core/NEON') diff --git a/arm_compute/core/NEON/NEKernels.h b/arm_compute/core/NEON/NEKernels.h index 57a1d4d52c..e859519d94 100644 --- a/arm_compute/core/NEON/NEKernels.h +++ b/arm_compute/core/NEON/NEKernels.h @@ -110,6 +110,7 @@ #include "arm_compute/core/NEON/kernels/NEReshapeLayerKernel.h" #include "arm_compute/core/NEON/kernels/NEScaleKernel.h" #include "arm_compute/core/NEON/kernels/NEScharr3x3Kernel.h" +#include "arm_compute/core/NEON/kernels/NESelectKernel.h" #include "arm_compute/core/NEON/kernels/NESobel3x3Kernel.h" #include "arm_compute/core/NEON/kernels/NESobel5x5Kernel.h" #include "arm_compute/core/NEON/kernels/NESobel7x7Kernel.h" diff --git a/arm_compute/core/NEON/kernels/NESelectKernel.h b/arm_compute/core/NEON/kernels/NESelectKernel.h new file mode 100644 index 0000000000..215dc2f5ee --- /dev/null +++ b/arm_compute/core/NEON/kernels/NESelectKernel.h @@ -0,0 +1,102 @@ +/* + * Copyright (c) 2018 ARM Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INNEUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY NEAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#ifndef __ARM_COMPUTE_NESELECTKERNEL_H__ +#define __ARM_COMPUTE_NESELECTKERNEL_H__ + +#include "arm_compute/core/NEON/INEKernel.h" +#include "arm_compute/core/Types.h" + +namespace arm_compute +{ +class ITensor; + +/** Interface for the select kernel + * + * Select is computed by: + * @f[ output(i) = condition(i) ? x(i) : y(i) @f] + * + */ +class NESelectKernel : public INEKernel +{ +public: + const char *name() const override + { + return "NESelectKernel"; + } + /** Default constructor */ + NESelectKernel(); + /** Prevent instances of this class from being copied (As this class contains pointers) */ + NESelectKernel(const NESelectKernel &) = delete; + /** Prevent instances of this class from being copied (As this class contains pointers) */ + NESelectKernel &operator=(const NESelectKernel &) = delete; + /** Allow instances of this class to be moved */ + NESelectKernel(NESelectKernel &&) = default; + /** Allow instances of this class to be moved */ + NESelectKernel &operator=(NESelectKernel &&) = default; + /** Default destructor */ + ~NESelectKernel() = default; + + /** Common signature for all the specialised elementwise functions + * + * @param[in] c Condition input tensor. Data types supported: U8. + * @param[in] x First input tensor. Data types supported: U8/S8/U16/S16/U32/S32/F16/F32. + * @param[out] y Second input tensor. Data types supported: Same as @p x + * @param[in] output Output tensor. Data types supported: Same as @p x + */ + void configure(const ITensor *c, const ITensor *x, const ITensor *y, ITensor *output); + + /** Validate the argument passed to the kernel + * + * @param[in] c Condition input tensor. Data types supported: U8. + * @param[in] x First input tensor. Data types supported: U8/S8/U16/S16/U32/S32/F16/F32. + * @param[in] y Second input tensor. Data types supported: Same as @p x + * @param[in] output Output tensor. Data types supported: Same as @p x. + * + * @return a status + */ + static Status validate(const ITensorInfo *c, const ITensorInfo *x, const ITensorInfo *y, const ITensorInfo *output); + + // Inherited methods overridden: + void run(const Window &window, const ThreadInfo &info) override; + +private: + /** Common signature for all the specialised select functions + * + * @param[in] c Condition input tensor. Data types supported: U8. + * @param[in] x First input tensor. Data types supported: U8/S8/U16/S16/U32/S32/F16/F32. + * @param[in] y Second input tensor. Data types supported: Same as @p x + * @param[in] output Output tensor. Data types supported: Same as @p x. + */ + using SelectFunction = void(const ITensor *c, const ITensor *x, const ITensor *y, ITensor *output, const Window &window); + + /** Select function to use for the particular tensor types passed to configure() */ + SelectFunction *_function; + const ITensor *_c; /**< Condition tensor */ + const ITensor *_x; /**< Source tensor 1 */ + const ITensor *_y; /**< Source tensor 2 */ + ITensor *_output; /**< Destination tensor */ + bool _has_same_rank; /**< Flag that indicates if condition tensor and other inputs have the same rank */ +}; +} // namespace arm_compute +#endif /* __ARM_COMPUTE_NESELECTKERNEL_H__ */ diff --git a/arm_compute/core/NEON/wrapper/intrinsics/bitselect.h b/arm_compute/core/NEON/wrapper/intrinsics/bitselect.h new file mode 100644 index 0000000000..8223f6d463 --- /dev/null +++ b/arm_compute/core/NEON/wrapper/intrinsics/bitselect.h @@ -0,0 +1,64 @@ +/* + * Copyright (c) 2018 ARM Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT SELECT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#ifndef __ARM_COMPUTE_WRAPPER_BITSELECT_H__ +#define __ARM_COMPUTE_WRAPPER_BITSELECT_H__ + +#include + +namespace arm_compute +{ +namespace wrapper +{ +#define VBITSELECT_IMPL(stype, vtype, ctype, prefix, postfix) \ + inline vtype vbitselect(const ctype &a, const vtype &b, const vtype &c) \ + { \ + return prefix##_##postfix(a, b, c); \ + } + +VBITSELECT_IMPL(uint8_t, uint8x8_t, uint8x8_t, vbsl, u8) +VBITSELECT_IMPL(int8_t, int8x8_t, uint8x8_t, vbsl, s8) +VBITSELECT_IMPL(uint16_t, uint16x4_t, uint16x4_t, vbsl, u16) +VBITSELECT_IMPL(int16_t, int16x4_t, uint16x4_t, vbsl, s16) +VBITSELECT_IMPL(uint32_t, uint32x2_t, uint32x2_t, vbsl, u32) +VBITSELECT_IMPL(int32_t, int32x2_t, uint32x2_t, vbsl, s32) +VBITSELECT_IMPL(float32x2_t, float32x2_t, uint32x2_t, vbsl, f32) +#ifdef __ARM_FEATURE_FP16_VECTOR_ARITHMETIC +VBITSELECT_IMPL(float16x4_t, float16x4_t, uint16x4_t, vbsl, f16) +#endif // __ARM_FEATURE_FP16_VECTOR_ARITHMETIC + +VBITSELECT_IMPL(uint8_t, uint8x16_t, uint8x16_t, vbslq, u8) +VBITSELECT_IMPL(int8_t, int8x16_t, uint8x16_t, vbslq, s8) +VBITSELECT_IMPL(uint16_t, uint16x8_t, uint16x8_t, vbslq, u16) +VBITSELECT_IMPL(int16_t, int16x8_t, uint16x8_t, vbslq, s16) +VBITSELECT_IMPL(uint32_t, uint32x4_t, uint32x4_t, vbslq, u32) +VBITSELECT_IMPL(int32_t, int32x4_t, uint32x4_t, vbslq, s32) +VBITSELECT_IMPL(float32x4_t, float32x4_t, uint32x4_t, vbslq, f32) +#ifdef __ARM_FEATURE_FP16_VECTOR_ARITHMETIC +VBITSELECT_IMPL(float16x8_t, float16x8_t, uint16x8_t, vbslq, f16) +#endif // __ARM_FEATURE_FP16_VECTOR_ARITHMETIC + +#undef VBITSELECT_IMPL +} // namespace wrapper +} // namespace arm_compute +#endif /* __ARM_COMPUTE_WRAPPER_BITSELECT_H__ */ diff --git a/arm_compute/core/NEON/wrapper/intrinsics/greaterthan.h b/arm_compute/core/NEON/wrapper/intrinsics/greaterthan.h new file mode 100644 index 0000000000..5ee7516a4e --- /dev/null +++ b/arm_compute/core/NEON/wrapper/intrinsics/greaterthan.h @@ -0,0 +1,64 @@ +/* + * Copyright (c) 2018 ARM Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#ifndef __ARM_COMPUTE_WRAPPER_CGT_H__ +#define __ARM_COMPUTE_WRAPPER_CGT_H__ + +#include + +namespace arm_compute +{ +namespace wrapper +{ +#define VCGT_IMPL(stype, vtype, rtype, prefix, postfix) \ + inline rtype vgreaterthan(const vtype &a, const vtype &b) \ + { \ + return prefix##_##postfix(a, b); \ + } + +VCGT_IMPL(uint8_t, uint8x8_t, uint8x8_t, vcgt, u8) +VCGT_IMPL(int8_t, int8x8_t, uint8x8_t, vcgt, s8) +VCGT_IMPL(uint16_t, uint16x4_t, uint16x4_t, vcgt, u16) +VCGT_IMPL(int16_t, int16x4_t, uint16x4_t, vcgt, s16) +VCGT_IMPL(uint32_t, uint32x2_t, uint32x2_t, vcgt, u32) +VCGT_IMPL(int32_t, int32x2_t, uint32x2_t, vcgt, s32) +VCGT_IMPL(float32x2_t, float32x2_t, uint32x2_t, vcgt, f32) +#ifdef __ARM_FEATURE_FP16_VECTOR_ARITHMETIC +VCGT_IMPL(float16x4_t, float16x4_t, uint16x4_t, vcgt, f16) +#endif // __ARM_FEATURE_FP16_VECTOR_ARITHMETIC + +VCGT_IMPL(uint8_t, uint8x16_t, uint8x16_t, vcgtq, u8) +VCGT_IMPL(int8_t, int8x16_t, uint8x16_t, vcgtq, s8) +VCGT_IMPL(uint16_t, uint16x8_t, uint16x8_t, vcgtq, u16) +VCGT_IMPL(int16_t, int16x8_t, uint16x8_t, vcgtq, s16) +VCGT_IMPL(uint32_t, uint32x4_t, uint32x4_t, vcgtq, u32) +VCGT_IMPL(int32_t, int32x4_t, uint32x4_t, vcgtq, s32) +VCGT_IMPL(float32x4_t, float32x4_t, uint32x4_t, vcgtq, f32) +#ifdef __ARM_FEATURE_FP16_VECTOR_ARITHMETIC +VCGT_IMPL(float16x8_t, float16x8_t, uint16x8_t, vcgtq, f16) +#endif // __ARM_FEATURE_FP16_VECTOR_ARITHMETIC + +#undef VCGT_IMPL +} // namespace wrapper +} // namespace arm_compute +#endif /* __ARM_COMPUTE_WRAPPER_CGT_H__ */ diff --git a/arm_compute/core/NEON/wrapper/intrinsics/intrinsics.h b/arm_compute/core/NEON/wrapper/intrinsics/intrinsics.h index 46c8937adc..f65ce85021 100644 --- a/arm_compute/core/NEON/wrapper/intrinsics/intrinsics.h +++ b/arm_compute/core/NEON/wrapper/intrinsics/intrinsics.h @@ -26,11 +26,13 @@ #include "arm_compute/core/NEON/wrapper/intrinsics/add.h" #include "arm_compute/core/NEON/wrapper/intrinsics/and.h" +#include "arm_compute/core/NEON/wrapper/intrinsics/bitselect.h" #include "arm_compute/core/NEON/wrapper/intrinsics/dup_n.h" #include "arm_compute/core/NEON/wrapper/intrinsics/exp.h" #include "arm_compute/core/NEON/wrapper/intrinsics/gethigh.h" #include "arm_compute/core/NEON/wrapper/intrinsics/getlane.h" #include "arm_compute/core/NEON/wrapper/intrinsics/getlow.h" +#include "arm_compute/core/NEON/wrapper/intrinsics/greaterthan.h" #include "arm_compute/core/NEON/wrapper/intrinsics/inv.h" #include "arm_compute/core/NEON/wrapper/intrinsics/invsqrt.h" #include "arm_compute/core/NEON/wrapper/intrinsics/load.h" -- cgit v1.2.1