From 80373f607cb12693824411510c39e367a4dfbdb5 Mon Sep 17 00:00:00 2001 From: Moritz Pflanzer Date: Fri, 15 Sep 2017 10:42:58 +0100 Subject: COMPMID-481: Add AArch32 GEMM Change-Id: Idba0b30bfb27866a46a22388014ab81432ea28dc Reviewed-on: http://mpd-gerrit.cambridge.arm.com/86196 Reviewed-by: Anthony Barbier Tested-by: Kaizen --- .../kernels/assembly/kernels/a32_sgemm_8x6.hpp | 68 ++++++++++++++++++++++ 1 file changed, 68 insertions(+) create mode 100644 arm_compute/core/NEON/kernels/assembly/kernels/a32_sgemm_8x6.hpp (limited to 'arm_compute/core/NEON/kernels/assembly/kernels/a32_sgemm_8x6.hpp') diff --git a/arm_compute/core/NEON/kernels/assembly/kernels/a32_sgemm_8x6.hpp b/arm_compute/core/NEON/kernels/assembly/kernels/a32_sgemm_8x6.hpp new file mode 100644 index 0000000000..c49633666f --- /dev/null +++ b/arm_compute/core/NEON/kernels/assembly/kernels/a32_sgemm_8x6.hpp @@ -0,0 +1,68 @@ +/* + * Copyright (c) 2017 ARM Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#pragma once + +#ifdef __arm__ + +// Actual kernel implementations +#include "a32_sgemm_8x6/generic.hpp" + +// 8x6 SGEMM "strategy" class. +// +// This describes the characteristics of a family of kernels, in terms of +// the required interleave properties and the output block size. +// +// All kernels in the family must share these characteristics. The actual +// kernel to be used can be chosen at runtime, based on the CPU_type +// structure. +class sgemm_8x6 { +public: + typedef float operand_type; + typedef float result_type; + + typedef void (*kern_type)(const float *, const float *, float *, int, int, int); + + /* Describes the data layout for A input */ + static const int A_interleave = 6; + static const int A_block = 1; + static const int A_transpose = 0; + + /* Same for B input */ + static const int B_interleave = 8; + static const int B_block = 1; + static const int B_transpose = 1; + + /* Kernel blocking parameters */ + static const int out_width = 8; + static const int out_height = 6; + static const int k_unroll = 1; + + kern_type kernel = nullptr; + + sgemm_8x6(const CPUInfo *ci) { + kernel = a32_sgemm_8x6; + } +}; + +#endif // __aarch64__ -- cgit v1.2.1