From de5a1cc7e5c929b19fb1d3ed7d0d8783b9ac6860 Mon Sep 17 00:00:00 2001 From: Georgios Pinitas Date: Fri, 2 Feb 2018 12:52:07 +0000 Subject: COMPMID-856: CL Depthwise Convolution QASYMM8 support Change-Id: Ic6097e7cf160e8b829fb521b7b99d9a57d9799d3 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/118774 Tested-by: Jenkins Reviewed-by: Anthony Barbier --- arm_compute/core/NEON/kernels/NEGEMMMatrixVectorMultiplyKernel.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arm_compute/core/NEON/kernels/NEGEMMMatrixVectorMultiplyKernel.h') diff --git a/arm_compute/core/NEON/kernels/NEGEMMMatrixVectorMultiplyKernel.h b/arm_compute/core/NEON/kernels/NEGEMMMatrixVectorMultiplyKernel.h index 95fe916a3c..286be1acc9 100644 --- a/arm_compute/core/NEON/kernels/NEGEMMMatrixVectorMultiplyKernel.h +++ b/arm_compute/core/NEON/kernels/NEGEMMMatrixVectorMultiplyKernel.h @@ -51,7 +51,7 @@ public: * * @param[in] input0 First Input tensor. Data types supported: QASYMM8/F32 * @param[in] input1 Second Input tensor. Data types supported: same as @p input. - * @param[out] output Output tensor which stores the interleaved matrix. Data type supported: same as @p input. + * @param[out] output Output tensor which stores the interleaved matrix. Data type supported: same as @p input, S32 for QASYMM8 input. */ void configure(const ITensor *input0, const ITensor *input1, ITensor *output); -- cgit v1.2.1