From e855c237a5b61c4ed5a5ab79dd4af27385cf72f5 Mon Sep 17 00:00:00 2001 From: Stephen Li Date: Thu, 4 Jan 2018 14:13:22 +0800 Subject: APPBROWSER-377: GCConvoutionLayer support for FP16 Change-Id: I801b5e393a16a9f92c062826e6fcfd5982ca7bb3 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/116584 Tested-by: Jenkins Reviewed-by: Anthony Barbier --- arm_compute/core/GLES_COMPUTE/GCKernels.h | 3 +- arm_compute/core/GLES_COMPUTE/IGCKernel.h | 2 +- .../core/GLES_COMPUTE/kernels/GCCol2ImKernel.h | 4 +- .../kernels/GCGEMMInterleave4x4Kernel.h | 4 +- .../kernels/GCGEMMTranspose1xWKernel.h | 4 +- .../core/GLES_COMPUTE/kernels/GCIm2ColKernel.h | 23 +++++++- .../GLES_COMPUTE/kernels/GCWeightsReshapeKernel.h | 67 ++++++++++++++++++++++ 7 files changed, 96 insertions(+), 11 deletions(-) create mode 100644 arm_compute/core/GLES_COMPUTE/kernels/GCWeightsReshapeKernel.h (limited to 'arm_compute/core/GLES_COMPUTE') diff --git a/arm_compute/core/GLES_COMPUTE/GCKernels.h b/arm_compute/core/GLES_COMPUTE/GCKernels.h index 5be44984b2..a1f3c278c4 100644 --- a/arm_compute/core/GLES_COMPUTE/GCKernels.h +++ b/arm_compute/core/GLES_COMPUTE/GCKernels.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017 ARM Limited. + * Copyright (c) 2017-2018 ARM Limited. * * SPDX-License-Identifier: MIT * @@ -48,5 +48,6 @@ #include "arm_compute/core/GLES_COMPUTE/kernels/GCScaleKernel.h" #include "arm_compute/core/GLES_COMPUTE/kernels/GCSoftmaxLayerKernel.h" #include "arm_compute/core/GLES_COMPUTE/kernels/GCTransposeKernel.h" +#include "arm_compute/core/GLES_COMPUTE/kernels/GCWeightsReshapeKernel.h" #endif /* __ARM_COMPUTE_GCKERNELS_H__ */ diff --git a/arm_compute/core/GLES_COMPUTE/IGCKernel.h b/arm_compute/core/GLES_COMPUTE/IGCKernel.h index ce7717e8ea..3b987330da 100644 --- a/arm_compute/core/GLES_COMPUTE/IGCKernel.h +++ b/arm_compute/core/GLES_COMPUTE/IGCKernel.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017, 2018 ARM Limited. + * Copyright (c) 2017-2018 ARM Limited. * * SPDX-License-Identifier: MIT * diff --git a/arm_compute/core/GLES_COMPUTE/kernels/GCCol2ImKernel.h b/arm_compute/core/GLES_COMPUTE/kernels/GCCol2ImKernel.h index 257ab0eca0..da7c27f1d7 100644 --- a/arm_compute/core/GLES_COMPUTE/kernels/GCCol2ImKernel.h +++ b/arm_compute/core/GLES_COMPUTE/kernels/GCCol2ImKernel.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017 ARM Limited. + * Copyright (c) 2017-2018 ARM Limited. * * SPDX-License-Identifier: MIT * @@ -72,7 +72,7 @@ public: /** Set the input and output of the kernel. * - * @param[in] input The input tensor to convert. Data types supported: F32 + * @param[in] input The input tensor to convert. Data types supported: F16/F32 * @param[out] output The output tensor. 3 lower dimensions represent a single output [width, height, OFM], * while the rest represent batch of outputs. Data types supported: Same as @p input * @param[in] convolved_dims Output convolved dimensions. diff --git a/arm_compute/core/GLES_COMPUTE/kernels/GCGEMMInterleave4x4Kernel.h b/arm_compute/core/GLES_COMPUTE/kernels/GCGEMMInterleave4x4Kernel.h index b2369a6ad1..6711115c77 100644 --- a/arm_compute/core/GLES_COMPUTE/kernels/GCGEMMInterleave4x4Kernel.h +++ b/arm_compute/core/GLES_COMPUTE/kernels/GCGEMMInterleave4x4Kernel.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017 ARM Limited. + * Copyright (c) 2017-2018 ARM Limited. * * SPDX-License-Identifier: MIT * @@ -64,7 +64,7 @@ public: GCGEMMInterleave4x4Kernel &operator=(GCGEMMInterleave4x4Kernel &&) = default; /** Initialise the kernel's input and output. * - * @param[in] input Input tensor. Data types supported: F32 + * @param[in] input Input tensor. Data types supported: F16, F32 * @param[out] output Output tensor. Data type supported: same as @p input */ void configure(const IGCTensor *input, IGCTensor *output); diff --git a/arm_compute/core/GLES_COMPUTE/kernels/GCGEMMTranspose1xWKernel.h b/arm_compute/core/GLES_COMPUTE/kernels/GCGEMMTranspose1xWKernel.h index 4223556ac4..48e7a620b8 100644 --- a/arm_compute/core/GLES_COMPUTE/kernels/GCGEMMTranspose1xWKernel.h +++ b/arm_compute/core/GLES_COMPUTE/kernels/GCGEMMTranspose1xWKernel.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017 ARM Limited. + * Copyright (c) 2017-2018 ARM Limited. * * SPDX-License-Identifier: MIT * @@ -55,7 +55,7 @@ class GCGEMMTranspose1xWKernel : public IGCSimple2DKernel public: /** Initialise the kernel's input and output. * - * @param[in] input Input tensor. Data types supported: F32 + * @param[in] input Input tensor. Data types supported: F16, F32 * @param[out] output Output tensor. Data type supported: same as @p input */ void configure(const IGCTensor *input, IGCTensor *output); diff --git a/arm_compute/core/GLES_COMPUTE/kernels/GCIm2ColKernel.h b/arm_compute/core/GLES_COMPUTE/kernels/GCIm2ColKernel.h index e1b35607ff..c376a3d17b 100644 --- a/arm_compute/core/GLES_COMPUTE/kernels/GCIm2ColKernel.h +++ b/arm_compute/core/GLES_COMPUTE/kernels/GCIm2ColKernel.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017 ARM Limited. + * Copyright (c) 2017-2018 ARM Limited. * * SPDX-License-Identifier: MIT * @@ -21,6 +21,7 @@ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ + #ifndef __ARM_COMPUTE_GCIM2COLKERNEL_H__ #define __ARM_COMPUTE_GCIM2COLKERNEL_H__ @@ -29,6 +30,7 @@ namespace arm_compute { class IGCTensor; +class Size2D; /** Interface for the im2col reshape kernel. * @@ -68,18 +70,32 @@ public: /** Set the input and output of the kernel. * * @param[in] input The input tensor to convert. 3 lower dimensions represent a single input [width, height, IFM], - * while every optional dimension from 4 and above represent a batch of inputs. Data types supported: F32 + * while every optional dimension from 4 and above represent a batch of inputs. Data types supported: F16/F32 * @param[out] output The output tensor. First 2 lower dimensions represent a transform of each 3D input, * while every dimension above represents a batch. Data types supported: Same as @p input * @param[in] kernel_dims The kernel dimensions (width and height). * @param[in] conv_info Contains padding and stride information described in @ref PadStrideInfo. * @param[in] has_bias In case biases are provided expands the matrix with 1. */ - void configure(const IGCTensor *input, IGCTensor *output, std::pair kernel_dims, const PadStrideInfo &conv_info, bool has_bias); + void configure(const IGCTensor *input, IGCTensor *output, const Size2D &kernel_dims, const PadStrideInfo &conv_info, bool has_bias); // Inherited methods overridden: void run(const Window &window) override; + /** Static function to check if given info will lead to a valid configuration of @ref CLIm2ColKernel + * + * @param[in] input The input tensor to convert. 3 lower dimensions represent a single input [width, height, IFM], + * while every optional dimension from 4 and above represent a batch of inputs. Data types supported: F16/F32 + * @param[in] output The output tensor. First 2 lower dimensions represent a transform of each 3D input, + * while every dimension above represents a batch. Data types supported: Same as @p input + * @param[in] kernel_dims The kernel dimensions (width and height). + * @param[in] conv_info Contains padding and stride information described in @ref PadStrideInfo. + * @param[in] has_bias In case biases are provided expands the matrix with 1. + * + * @return a status + */ + static Status validate(const ITensorInfo *input, const ITensorInfo *output, const Size2D &kernel_dims, const PadStrideInfo &conv_info, bool has_bias); + private: /** Run the reshape kernel optimised for the special case (stride is 1, padding is 0 and kernel's low 3 dimensions are same as input) * @@ -101,6 +117,7 @@ private: const IGCTensor *_input; IGCTensor *_output; std::pair _convolved_dims; + std::pair _kernel_dims; unsigned int _num_elems_processed_per_iteration; Im2ColFunction _run_func; }; diff --git a/arm_compute/core/GLES_COMPUTE/kernels/GCWeightsReshapeKernel.h b/arm_compute/core/GLES_COMPUTE/kernels/GCWeightsReshapeKernel.h new file mode 100644 index 0000000000..bf315a2f15 --- /dev/null +++ b/arm_compute/core/GLES_COMPUTE/kernels/GCWeightsReshapeKernel.h @@ -0,0 +1,67 @@ +/* + * Copyright (c) 2017-2018 ARM Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#ifndef __ARM_COMPUTE_GCWEIGHTSRESHAPEKERNEL_H__ +#define __ARM_COMPUTE_GCWEIGHTSRESHAPEKERNEL_H__ + +#include "arm_compute/core/GLES_COMPUTE/IGCKernel.h" + +namespace arm_compute +{ +class GCWeightsReshapeKernel : public IGCKernel +{ +public: + /** Constructor.*/ + GCWeightsReshapeKernel(); + /** Prevent instances of this class from being copied (As this class contains pointers) */ + GCWeightsReshapeKernel(const GCWeightsReshapeKernel &) = delete; + /** Prevent instances of this class from being copied (As this class contains pointers) */ + GCWeightsReshapeKernel &operator=(const GCWeightsReshapeKernel &) = delete; + /** Allow instances of this class to be moved */ + GCWeightsReshapeKernel(GCWeightsReshapeKernel &&) = default; + /** Allow instances of this class to be moved */ + GCWeightsReshapeKernel &operator=(GCWeightsReshapeKernel &&) = default; + /** Default destructor */ + ~GCWeightsReshapeKernel() = default; + + /** Set the input and output of the kernel. + * + * @param[in] input The input tensor to convert. Weights are 4D tensor with dimensions [kernel_x, kernel_y, IFM, OFM] if shared, + * and 5D tensor with dimensions [kernel_x, kernel_y, IFM, OFM, batches] if unshared. Data types supported: F16, F32 + * @param[in] biases The shared biases tensor to append. Bias is 1D tensor with dimensions [OFM] if shared and 2D tensor with + * dimensions [OFM, batches] if unshared. Data types supported: Same as @p input + * @warning Appending biases to weights reshaped matrix is not supported for quantized asymmetric types. + * @param[out] output The output tensor. Should be a 2D Tensor. Data types supported: Same as @p input + */ + void configure(const IGCTensor *input, const IGCTensor *biases, IGCTensor *output); + + // Inherited methods overridden: + void run(const Window &window) override; + +private: + const IGCTensor *_input; + const IGCTensor *_biases; + IGCTensor *_output; +}; +} // namespace arm_compute +#endif /*__ARM_COMPUTE_GCWEIGHTSRESHAPEKERNEL_H__ */ \ No newline at end of file -- cgit v1.2.1