From c357c47be8a3f210f9eee9a05cc13f1051b036d3 Mon Sep 17 00:00:00 2001 From: Alex Gilday Date: Wed, 21 Mar 2018 13:54:09 +0000 Subject: COMPMID-1008: Fix Doxygen issues Change-Id: Ie73d8771f85d1f5b059f3a56f1bbd73c98e94a38 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/124723 Reviewed-by: Michalis Spyrou Tested-by: Jenkins --- arm_compute/core/CPP/CPPTypes.h | 16 +++++++++------- arm_compute/core/CPP/ICPPSimpleKernel.h | 4 ++-- arm_compute/core/CPP/kernels/CPPCornerCandidatesKernel.h | 1 + .../CPPDetectionWindowNonMaximaSuppressionKernel.h | 2 +- 4 files changed, 13 insertions(+), 10 deletions(-) (limited to 'arm_compute/core/CPP') diff --git a/arm_compute/core/CPP/CPPTypes.h b/arm_compute/core/CPP/CPPTypes.h index cff49db0ac..3abc0a2e88 100644 --- a/arm_compute/core/CPP/CPPTypes.h +++ b/arm_compute/core/CPP/CPPTypes.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017 ARM Limited. + * Copyright (c) 2017-2018 ARM Limited. * * SPDX-License-Identifier: MIT * @@ -48,18 +48,20 @@ enum class CPUTarget A75_DOT = (A75 | DOT), }; +/** Information about a CPU. */ struct CPUInfo { - CPUTarget CPU{ CPUTarget::INTRINSICS }; - int L1_size{ 0 }; - int L2_size{ 0 }; + CPUTarget CPU{ CPUTarget::INTRINSICS }; /**< CPU target. */ + int L1_size{ 0 }; /**< Size of L1 cache. */ + int L2_size{ 0 }; /**< Size of L2 cache. */ }; +/** Information about executing thread and CPU. */ struct ThreadInfo { - int thread_id{ 0 }; - int num_threads{ 1 }; - CPUInfo cpu_info{}; + int thread_id{ 0 }; /**< Executing thread. */ + int num_threads{ 1 }; /**< Number of CPU threads. */ + CPUInfo cpu_info{}; /**< CPU information. */ }; } // namespace arm_compute #endif /* __ARM_COMPUTE_CPP_TYPES_H__ */ diff --git a/arm_compute/core/CPP/ICPPSimpleKernel.h b/arm_compute/core/CPP/ICPPSimpleKernel.h index 0580b19ba1..d8cdc794ef 100644 --- a/arm_compute/core/CPP/ICPPSimpleKernel.h +++ b/arm_compute/core/CPP/ICPPSimpleKernel.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017 ARM Limited. + * Copyright (c) 2017-2018 ARM Limited. * * SPDX-License-Identifier: MIT * @@ -30,7 +30,7 @@ namespace arm_compute { class ITensor; -/** Interface for simple NEON kernels having 1 tensor input and 1 tensor output */ +/** Interface for simple C++ kernels having 1 tensor input and 1 tensor output */ class ICPPSimpleKernel : public ICPPKernel { public: diff --git a/arm_compute/core/CPP/kernels/CPPCornerCandidatesKernel.h b/arm_compute/core/CPP/kernels/CPPCornerCandidatesKernel.h index b89816ef15..27ac7f03cf 100644 --- a/arm_compute/core/CPP/kernels/CPPCornerCandidatesKernel.h +++ b/arm_compute/core/CPP/kernels/CPPCornerCandidatesKernel.h @@ -33,6 +33,7 @@ namespace arm_compute { class ITensor; +/** Interface for CPP Images. */ using IImage = ITensor; /** CPP kernel to perform corner candidates diff --git a/arm_compute/core/CPP/kernels/CPPDetectionWindowNonMaximaSuppressionKernel.h b/arm_compute/core/CPP/kernels/CPPDetectionWindowNonMaximaSuppressionKernel.h index 87766a7a56..512d2d8327 100644 --- a/arm_compute/core/CPP/kernels/CPPDetectionWindowNonMaximaSuppressionKernel.h +++ b/arm_compute/core/CPP/kernels/CPPDetectionWindowNonMaximaSuppressionKernel.h @@ -55,7 +55,7 @@ public: CPPDetectionWindowNonMaximaSuppressionKernel &operator=(CPPDetectionWindowNonMaximaSuppressionKernel &&) = default; /** Initialise the kernel's input, output and the euclidean minimum distance * - * @attention: If @ref CLDetectionWindowArray is passed to the kernel, the map() and unmap() methods @ref CLDetectionWindowArray must be called respectively before and after + * @attention: If @ref IDetectionWindowArray is passed to the kernel, the map() and unmap() methods @ref IDetectionWindowArray must be called respectively before and after * the run() method of @ref CPPDetectionWindowNonMaximaSuppressionKernel * * @param[in, out] input_output Input/Output array of @ref DetectionWindow -- cgit v1.2.1