From cb29283e0d65297f4756e202df07eac1107841e6 Mon Sep 17 00:00:00 2001 From: Gian Marco Iodice Date: Wed, 2 Aug 2017 13:19:48 +0100 Subject: COMPMID-477 - Optimizing Pooling 3x3 with stride_x <= 3 on OpenCL Change-Id: Ie000166307cdb5bfae00ebf84d35e49a6bfb9dbd Reviewed-on: http://mpd-gerrit.cambridge.arm.com/83372 Tested-by: Kaizen Reviewed-by: Pablo Tello Reviewed-by: Anthony Barbier --- arm_compute/core/CL/kernels/CLPoolingLayerKernel.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'arm_compute/core/CL') diff --git a/arm_compute/core/CL/kernels/CLPoolingLayerKernel.h b/arm_compute/core/CL/kernels/CLPoolingLayerKernel.h index 6c5091ff9e..971e1506af 100644 --- a/arm_compute/core/CL/kernels/CLPoolingLayerKernel.h +++ b/arm_compute/core/CL/kernels/CLPoolingLayerKernel.h @@ -49,7 +49,7 @@ public: /** Set the input and output tensors. * - * @param[in] input Source tensor. Data types supported: F16, F32. + * @param[in] input Source tensor. Data types supported: F16/F32. * @param[out] output Destination tensor. Data types supported: Same as @p input. * @param[in] pool_info Contains pooling operation information described in @ref PoolingLayerInfo. * Supported pooling sizes : 2, 3 and 7 @@ -65,6 +65,7 @@ private: ICLTensor *_output; PoolingLayerInfo _pool_info; BorderSize _border_size; + unsigned int _num_elems_processed_per_iteration; }; } #endif /*__ARM_COMPUTE_CLPOOLINGLAYERKERNEL_H__ */ -- cgit v1.2.1