From da0e5139cbd76a7077ee553abc34b09b655d00a9 Mon Sep 17 00:00:00 2001
From: Pablo Tello <pablo.tello@arm.com>
Date: Wed, 27 Feb 2019 13:32:51 +0000
Subject: COMPMID-1882: Improve memory coalescence when reshaping the weights
 for CLDepthwiseConvolution

Change-Id: Ib226fd3e7d2715847594eb5bafa46c938672cf9b
Signed-off-by: giuros01 <giuseppe.rossini@arm.com>
Reviewed-on: https://review.mlplatform.org/c/839
Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
---
 src/core/CL/kernels/CLDepthwiseConvolutionLayer3x3NCHWKernel.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/core/CL/kernels/CLDepthwiseConvolutionLayer3x3NCHWKernel.cpp b/src/core/CL/kernels/CLDepthwiseConvolutionLayer3x3NCHWKernel.cpp
index 770740d180..83fac16d88 100644
--- a/src/core/CL/kernels/CLDepthwiseConvolutionLayer3x3NCHWKernel.cpp
+++ b/src/core/CL/kernels/CLDepthwiseConvolutionLayer3x3NCHWKernel.cpp
@@ -173,7 +173,7 @@ std::pair<Status, Window> validate_and_configure_window(ITensorInfo *input, ITen
 
         kernel_name = is_qasymm ? "dwc_3x3_native_qasymm8" : "depthwise_convolution_3x3";
         kernel_name += (is_qasymm && is_dot8_supported ? "_dot8" : "");
-        kernel_name += "_nchw";
+        kernel_name += (is_qasymm ? "_nchw" : "");
 
         num_elems_written_per_iteration_x = 8 / data_size_from_type(input->data_type());
         num_elems_written_per_iteration_y = (is_qasymm && conv_stride_y == 1) ? 2 : 1;
-- 
cgit v1.2.1