From aa6a04a56f21ab8de23b24c5f9ee7cafeaef8320 Mon Sep 17 00:00:00 2001 From: Georgios Pinitas Date: Wed, 29 Aug 2018 12:53:41 +0100 Subject: COMPMID-1528: Add ReorgLayer on NEON Change-Id: I44369b4a716767163e2233b7d87bff300c523383 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/146314 Reviewed-by: Pablo Tello Tested-by: Jenkins --- arm_compute/core/NEON/NEKernels.h | 1 + arm_compute/core/NEON/kernels/NEReorgLayerKernel.h | 96 ++++++++++++ arm_compute/core/utils/misc/ShapeCalculator.h | 16 ++ arm_compute/runtime/NEON/NEFunctions.h | 1 + arm_compute/runtime/NEON/functions/NEReorgLayer.h | 58 +++++++ src/core/NEON/kernels/NEReorgLayerKernel.cpp | 166 ++++++++++++++++++++ src/runtime/NEON/functions/NEReorgLayer.cpp | 42 +++++ tests/validation/NEON/ReorgLayer.cpp | 170 +++++++++++++++++++++ tests/validation/fixtures/ReorgLayerFixture.h | 115 ++++++++++++++ tests/validation/reference/ReorgLayer.cpp | 97 ++++++++++++ tests/validation/reference/ReorgLayer.h | 43 ++++++ 11 files changed, 805 insertions(+) create mode 100644 arm_compute/core/NEON/kernels/NEReorgLayerKernel.h create mode 100644 arm_compute/runtime/NEON/functions/NEReorgLayer.h create mode 100644 src/core/NEON/kernels/NEReorgLayerKernel.cpp create mode 100644 src/runtime/NEON/functions/NEReorgLayer.cpp create mode 100644 tests/validation/NEON/ReorgLayer.cpp create mode 100644 tests/validation/fixtures/ReorgLayerFixture.h create mode 100644 tests/validation/reference/ReorgLayer.cpp create mode 100644 tests/validation/reference/ReorgLayer.h diff --git a/arm_compute/core/NEON/NEKernels.h b/arm_compute/core/NEON/NEKernels.h index 8664c7732c..bbeb604140 100644 --- a/arm_compute/core/NEON/NEKernels.h +++ b/arm_compute/core/NEON/NEKernels.h @@ -102,6 +102,7 @@ #include "arm_compute/core/NEON/kernels/NEROIPoolingLayerKernel.h" #include "arm_compute/core/NEON/kernels/NEReductionOperationKernel.h" #include "arm_compute/core/NEON/kernels/NERemapKernel.h" +#include "arm_compute/core/NEON/kernels/NEReorgLayerKernel.h" #include "arm_compute/core/NEON/kernels/NEReshapeLayerKernel.h" #include "arm_compute/core/NEON/kernels/NEScaleKernel.h" #include "arm_compute/core/NEON/kernels/NEScharr3x3Kernel.h" diff --git a/arm_compute/core/NEON/kernels/NEReorgLayerKernel.h b/arm_compute/core/NEON/kernels/NEReorgLayerKernel.h new file mode 100644 index 0000000000..323ab342b2 --- /dev/null +++ b/arm_compute/core/NEON/kernels/NEReorgLayerKernel.h @@ -0,0 +1,96 @@ +/* + * Copyright (c) 2018 ARM Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#ifndef __ARM_COMPUTE_NEREORGLAYERKERNEL_H__ +#define __ARM_COMPUTE_NEREORGLAYERKERNEL_H__ + +#include "arm_compute/core/NEON/INEKernel.h" + +namespace arm_compute +{ +// Forward declarations +class ITensor; + +/** Interface for the kernel to perform tensor re-organization */ +class NEReorgLayerKernel : public INEKernel +{ +public: + const char *name() const override + { + return "NEReorgLayerKernel"; + } + /** Default constructor */ + NEReorgLayerKernel(); + /** Prevent instances of this class from being copied (As this class contains pointers) */ + NEReorgLayerKernel(const NEReorgLayerKernel &) = delete; + /** Prevent instances of this class from being copied (As this class contains pointers) */ + NEReorgLayerKernel &operator=(const NEReorgLayerKernel &) = delete; + /** Default Move Constructor. */ + NEReorgLayerKernel(NEReorgLayerKernel &&) = default; + /** Default move assignment operator */ + NEReorgLayerKernel &operator=(NEReorgLayerKernel &&) = default; + /** Default destructor */ + ~NEReorgLayerKernel() = default; + /** Set the input and output of the kernel + * + * @param[in] input Source tensor. Data type supported: U8/S8/U16/S16/QASYMM8/U32/S32/F16/F32 + * @param[out] output Destination tensor. Data type supported: Same as @p input + * @param[in] stride Stride to be used during data re-organization + */ + void configure(const ITensor *input, ITensor *output, int32_t stride); + + /** Static function to check if given info will lead to a valid configuration of @ref NEReshapeLayerKernel + * + * @param[in] input Source tensor info. Data type supported: U8/S8/U16/S16/QASYMM8/U32/S32/F16/F32 + * @param[in] output Destination tensor info. Data type supported: Same as @p input + * @param[in] stride Stride to be used during data re-organization + * + * @return a status + */ + static Status validate(const ITensorInfo *input, const ITensorInfo *output, int32_t stride); + + // Inherited methods overridden: + void run(const Window &window, const ThreadInfo &info) override; + +private: + /** Template function to run the reorg + * + * @param[in] window Region on which to execute the kernel. (Must be a valid region of the window returned by window()). + */ + template + void run_reorg(const Window &window); + + /** Common signature for all the specialised reorg functions + * + * @param[in] window Region on which to execute the kernel. + */ + using ReorgFunctionPtr = void (NEReorgLayerKernel::*)(const Window &window); + +private: + ReorgFunctionPtr _func; + const ITensor *_input; + ITensor *_output; + int32_t _stride; +}; +} // namespace arm_compute +#endif /*__ARM_COMPUTE_NEREORGLAYERKERNEL_H__ */ diff --git a/arm_compute/core/utils/misc/ShapeCalculator.h b/arm_compute/core/utils/misc/ShapeCalculator.h index 1a86d27727..9c7cfecd4c 100644 --- a/arm_compute/core/utils/misc/ShapeCalculator.h +++ b/arm_compute/core/utils/misc/ShapeCalculator.h @@ -57,6 +57,22 @@ inline TensorShape compute_permutation_output_shape(const ITensorInfo &input, co permute(output_shape, perm); return output_shape; } +inline TensorShape compute_reorg_output_shape(const ITensorInfo &input, int32_t stride) +{ + ARM_COMPUTE_ERROR_ON(stride <= 0); + + const DataLayout data_layout = input.data_layout(); + const unsigned int width_idx = get_data_layout_dimension_index(data_layout, DataLayoutDimension::WIDTH); + const unsigned int height_idx = get_data_layout_dimension_index(data_layout, DataLayoutDimension::HEIGHT); + const unsigned int channel_idx = get_data_layout_dimension_index(data_layout, DataLayoutDimension::CHANNEL); + + TensorShape output_shape{ input.tensor_shape() }; + output_shape.set(width_idx, input.tensor_shape()[width_idx] / stride); + output_shape.set(height_idx, input.tensor_shape()[height_idx] / stride); + output_shape.set(channel_idx, input.tensor_shape()[channel_idx] * stride * stride); + + return output_shape; +} inline TensorShape compute_weights_reshaped_shape(const ITensorInfo &weights, bool has_bias = false, unsigned int num_groups = 1) { // Number of groups greater than one are only supported for NCHW data layout, and the number of weights must be a multiple of it. diff --git a/arm_compute/runtime/NEON/NEFunctions.h b/arm_compute/runtime/NEON/NEFunctions.h index dabd78c256..89a5c4aaaf 100644 --- a/arm_compute/runtime/NEON/NEFunctions.h +++ b/arm_compute/runtime/NEON/NEFunctions.h @@ -103,6 +103,7 @@ #include "arm_compute/runtime/NEON/functions/NEROIPoolingLayer.h" #include "arm_compute/runtime/NEON/functions/NEReductionOperation.h" #include "arm_compute/runtime/NEON/functions/NERemap.h" +#include "arm_compute/runtime/NEON/functions/NEReorgLayer.h" #include "arm_compute/runtime/NEON/functions/NEReshapeLayer.h" #include "arm_compute/runtime/NEON/functions/NEScale.h" #include "arm_compute/runtime/NEON/functions/NEScharr3x3.h" diff --git a/arm_compute/runtime/NEON/functions/NEReorgLayer.h b/arm_compute/runtime/NEON/functions/NEReorgLayer.h new file mode 100644 index 0000000000..f29b2f1964 --- /dev/null +++ b/arm_compute/runtime/NEON/functions/NEReorgLayer.h @@ -0,0 +1,58 @@ +/* + * Copyright (c) 2018 ARM Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#ifndef __ARM_COMPUTE_NEREORGLAYER_H__ +#define __ARM_COMPUTE_NEREORGLAYER_H__ + +#include "arm_compute/core/Types.h" +#include "arm_compute/runtime/NEON/INESimpleFunction.h" + +namespace arm_compute +{ +// Forward declarations +class ITensor; + +/** Basic function to run @ref NEReorgLayerKernel */ +class NEReorgLayer : public INESimpleFunction +{ +public: + /** Initialise the kernel's inputs and outputs + * + * @param[in] input First tensor input. Data type supported: U8/S8/QASYMM8//U16/S16/U32/S32/F16/F32 + * @param[out] output Output tensor. Data type supported: Same as @p input + * @param[in] stride Stride to be used during data re-organization + */ + void configure(const ITensor *input, ITensor *output, int32_t stride); + + /** Static function to check if given info will lead to a valid configuration of @ref NEReorgLayer + * + * @param[in] input First tensor info. Data type supported: U8/S8/QASYMM8//U16/S16/U32/S32/F16/F32 + * @param[in] output Output tensor info. Data type supported: Same as @p input + * @param[in] stride Stride to be used during data re-organization + * + * @return a status + */ + static Status validate(const ITensorInfo *input, const ITensorInfo *output, int32_t stride); +}; +} // namespace arm_compute +#endif /*__ARM_COMPUTE_NEREORGLAYER_H__ */ diff --git a/src/core/NEON/kernels/NEReorgLayerKernel.cpp b/src/core/NEON/kernels/NEReorgLayerKernel.cpp new file mode 100644 index 0000000000..1b2ec92cba --- /dev/null +++ b/src/core/NEON/kernels/NEReorgLayerKernel.cpp @@ -0,0 +1,166 @@ +/* + * Copyright (c) 2018 ARM Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#include "arm_compute/core/NEON/kernels/NEReorgLayerKernel.h" + +#include "arm_compute/core/Error.h" +#include "arm_compute/core/Helpers.h" +#include "arm_compute/core/ITensor.h" +#include "arm_compute/core/TensorInfo.h" +#include "arm_compute/core/Types.h" +#include "arm_compute/core/Validate.h" +#include "arm_compute/core/utils/misc/ShapeCalculator.h" + +#include +#include + +namespace arm_compute +{ +namespace +{ +Status validate_arguments(const ITensorInfo *input, const ITensorInfo *output, int32_t stride) +{ + //Note: ARM_COMPUTE_RETURN_ERROR_ON_CPU_F16_UNSUPPORTED(input) is not needed here as this kernel doesn't use NEON FP16 instructions. + ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(input, 1, + DataType::U8, DataType::S8, DataType::QASYMM8, + DataType::U16, DataType::S16, + DataType::U32, DataType::S32, + DataType::F16, DataType::F32); + ARM_COMPUTE_RETURN_ERROR_ON_MSG(stride <= 0, "Stride should be a positive number"); + + const TensorShape output_shape = misc::shape_calculator::compute_reorg_output_shape(*input, stride); + + // Validate configured output + if(output->total_size() != 0) + { + ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_DIMENSIONS(output->tensor_shape(), output_shape); + ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_DATA_TYPES(input, output); + } + + return Status{}; +} +} // namespace + +template +void NEReorgLayerKernel::run_reorg(const Window &window) +{ + const DataLayout data_layout = _input->info()->data_layout(); + const size_t idx_w = get_data_layout_dimension_index(data_layout, DataLayoutDimension::WIDTH); + const size_t idx_h = get_data_layout_dimension_index(data_layout, DataLayoutDimension::HEIGHT); + const size_t idx_c = get_data_layout_dimension_index(data_layout, DataLayoutDimension::CHANNEL); + + const unsigned int stride = _stride; + const unsigned int out_c = _output->info()->tensor_shape()[idx_c] / (stride * stride); + const uint8_t *in_ptr = _input->buffer(); + + // Collapse + Window collapsed_window = window.collapse_if_possible(window, 4); + + // Create Iterator + Iterator out(_output, collapsed_window); + + // Perform reorg + execute_window_loop(collapsed_window, [&](const Coordinates & id) + { + // Get spatial coords and channels + const unsigned int w = id[idx_w]; + const unsigned int h = id[idx_h]; + const unsigned int c = id[idx_c]; + + // Calculate mapping + const unsigned int offset = c / out_c; + Coordinates map_coords = id; + map_coords.set(idx_w, w * stride + offset % stride); + map_coords.set(idx_h, h * stride + offset / stride); + map_coords.set(idx_c, c % out_c); + + // Perform mapping + *(reinterpret_cast(out.ptr())) = *(reinterpret_cast(in_ptr + _input->info()->offset_element_in_bytes(map_coords))); + }, + out); +} + +NEReorgLayerKernel::NEReorgLayerKernel() + : _func(nullptr), _input(nullptr), _output(nullptr), _stride(1) +{ +} + +void NEReorgLayerKernel::configure(const ITensor *input, ITensor *output, int32_t stride) +{ + ARM_COMPUTE_ERROR_ON_NULLPTR(input, output); + + // Output auto inizialitation if not yet initialized + const TensorShape output_shape = misc::shape_calculator::compute_reorg_output_shape(*input->info(), stride); + auto_init_if_empty(*output->info(), input->info()->clone()->set_tensor_shape(output_shape)); + + // Perform validation step + ARM_COMPUTE_ERROR_THROW_ON(validate_arguments(input->info(), output->info(), stride)); + + _func = nullptr; + _input = input; + _output = output; + _stride = stride; + + switch(input->info()->element_size()) + { + case 1: + _func = &NEReorgLayerKernel::run_reorg; + break; + case 2: + _func = &NEReorgLayerKernel::run_reorg; + break; + case 4: + _func = &NEReorgLayerKernel::run_reorg; + break; + default: + ARM_COMPUTE_ERROR("Element size not supported"); + break; + } + + // The NEReorgLayerKernel doesn't need padding so update_window_and_padding() can be skipped + output->info()->set_valid_region(ValidRegion(Coordinates(), output->info()->tensor_shape())); + + // Configure kernel window + Window win = calculate_max_window(*output->info(), Steps()); + + ICPPKernel::configure(win); +} + +Status NEReorgLayerKernel::validate(const ITensorInfo *input, const ITensorInfo *output, int32_t stride) +{ + ARM_COMPUTE_RETURN_ON_ERROR(validate_arguments(input, output, stride)); + return Status{}; +} + +void NEReorgLayerKernel::run(const Window &window, const ThreadInfo &info) +{ + ARM_COMPUTE_UNUSED(info); + ARM_COMPUTE_ERROR_ON_UNCONFIGURED_KERNEL(this); + ARM_COMPUTE_ERROR_ON_INVALID_SUBWINDOW(ICPPKernel::window(), window); + + if(_func != nullptr) + { + (this->*_func)(window); + } +} +} // namespace arm_compute diff --git a/src/runtime/NEON/functions/NEReorgLayer.cpp b/src/runtime/NEON/functions/NEReorgLayer.cpp new file mode 100644 index 0000000000..4ad032bb32 --- /dev/null +++ b/src/runtime/NEON/functions/NEReorgLayer.cpp @@ -0,0 +1,42 @@ +/* + * Copyright (c) 2018 ARM Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#include "arm_compute/runtime/NEON/functions/NEReorgLayer.h" + +#include "arm_compute/core/NEON/kernels/NEReorgLayerKernel.h" +#include "support/ToolchainSupport.h" + +namespace arm_compute +{ +void NEReorgLayer::configure(const ITensor *input, ITensor *output, int32_t stride) +{ + auto k = arm_compute::support::cpp14::make_unique(); + k->configure(input, output, stride); + _kernel = std::move(k); +} + +Status NEReorgLayer::validate(const ITensorInfo *input, const ITensorInfo *output, int32_t stride) +{ + return NEReorgLayerKernel::validate(input, output, stride); +} +} // namespace arm_compute diff --git a/tests/validation/NEON/ReorgLayer.cpp b/tests/validation/NEON/ReorgLayer.cpp new file mode 100644 index 0000000000..6489b6529f --- /dev/null +++ b/tests/validation/NEON/ReorgLayer.cpp @@ -0,0 +1,170 @@ +/* + * Copyright (c) 2018 ARM Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#include "arm_compute/core/Types.h" +#include "arm_compute/runtime/NEON/functions/NEReorgLayer.h" +#include "arm_compute/runtime/Tensor.h" +#include "arm_compute/runtime/TensorAllocator.h" + +#include "tests/NEON/Accessor.h" +#include "tests/PaddingCalculator.h" +#include "tests/datasets/ShapeDatasets.h" +#include "tests/framework/Asserts.h" +#include "tests/framework/Macros.h" +#include "tests/framework/datasets/Datasets.h" +#include "tests/validation/Validation.h" +#include "tests/validation/fixtures/ReorgLayerFixture.h" + +namespace arm_compute +{ +namespace test +{ +namespace validation +{ +TEST_SUITE(NEON) +TEST_SUITE(ReorgLayer) + +DATA_TEST_CASE(Configuration, + framework::DatasetMode::ALL, + combine(combine(combine(concat(datasets::SmallShapes(), datasets::LargeShapes()), + framework::dataset::make("Stride", { 2, 3 })), + framework::dataset::make("DataType", { DataType::QASYMM8, DataType::F16, DataType::F32 })), + framework::dataset::make("DataLayout", { DataLayout::NCHW, DataLayout::NHWC })), + shape, stride, data_type, data_layout) +{ + // Create tensors + Tensor ref_src = create_tensor(shape, data_type, 1, QuantizationInfo(), data_layout); + Tensor dst; + + // Create and Configure function + NEReorgLayer reorg_func; + reorg_func.configure(&ref_src, &dst, stride); + + // Validate valid region + const ValidRegion valid_region = shape_to_valid_region(dst.info()->tensor_shape()); + validate(dst.info()->valid_region(), valid_region); +} + +// *INDENT-OFF* +// clang-format off +DATA_TEST_CASE(Validate, framework::DatasetMode::ALL, zip(zip(zip( + framework::dataset::make("InputInfo",{ + TensorInfo(TensorShape(8U, 8U, 5U, 3U), 1, DataType::U16), // Invalid stride + TensorInfo(TensorShape(8U, 8U, 5U, 3U), 1, DataType::U16), // Invalid output shape + TensorInfo(TensorShape(8U, 8U, 5U, 3U), 1, DataType::U16), // valid + }), + framework::dataset::make("OutputInfo", { + TensorInfo(TensorShape(4U, 4U, 20U, 3U), 1, DataType::U16), + TensorInfo(TensorShape(4U, 4U, 10U, 3U), 1, DataType::U16), + TensorInfo(TensorShape(4U, 4U, 20U, 3U), 1, DataType::U16), + })), + framework::dataset::make("Stride", { -1, 2, 2 })), + framework::dataset::make("Expected", { false, false, true })), + input_info, output_info, stride, expected) +{ + Status status = NEReorgLayer::validate(&input_info.clone()->set_is_resizable(false), &output_info.clone()->set_is_resizable(false), stride); + ARM_COMPUTE_EXPECT(bool(status) == expected, framework::LogLevel::ERRORS); +} +// clang-format on +// *INDENT-ON* + +template +using NEReorgLayerFixture = ReorgLayerValidationFixture; + +TEST_SUITE(U8) +FIXTURE_DATA_TEST_CASE(RunSmall, + NEReorgLayerFixture, + framework::DatasetMode::PRECOMMIT, + combine(combine(combine(datasets::SmallShapes(), framework::dataset::make("Stride", { 2, 3 })), + framework::dataset::make("DataType", DataType::U8)), + framework::dataset::make("DataLayout", { DataLayout::NCHW, DataLayout::NHWC }))) +{ + // Validate output + validate(Accessor(_target), _reference); +} + +FIXTURE_DATA_TEST_CASE(RunLarge, + NEReorgLayerFixture, + framework::DatasetMode::NIGHTLY, + combine(combine(combine(datasets::LargeShapes(), framework::dataset::make("Stride", { 2, 3 })), + framework::dataset::make("DataType", DataType::U8)), + framework::dataset::make("DataLayout", { DataLayout::NCHW, DataLayout::NHWC }))) +{ + // Validate output + validate(Accessor(_target), _reference); +} +TEST_SUITE_END() // U8 + +TEST_SUITE(U16) +FIXTURE_DATA_TEST_CASE(RunSmall, + NEReorgLayerFixture, + framework::DatasetMode::PRECOMMIT, + combine(combine(combine(datasets::SmallShapes(), framework::dataset::make("Stride", { 2, 3 })), + framework::dataset::make("DataType", DataType::U16)), + framework::dataset::make("DataLayout", { DataLayout::NCHW, DataLayout::NHWC }))) +{ + // Validate output + validate(Accessor(_target), _reference); +} + +FIXTURE_DATA_TEST_CASE(RunLarge, + NEReorgLayerFixture, + framework::DatasetMode::NIGHTLY, + combine(combine(combine(datasets::LargeShapes(), framework::dataset::make("Stride", { 2, 3 })), + framework::dataset::make("DataType", DataType::U16)), + framework::dataset::make("DataLayout", { DataLayout::NCHW, DataLayout::NHWC }))) +{ + // Validate output + validate(Accessor(_target), _reference); +} +TEST_SUITE_END() // U16 + +TEST_SUITE(U32) +FIXTURE_DATA_TEST_CASE(RunSmall, + NEReorgLayerFixture, + framework::DatasetMode::PRECOMMIT, + combine(combine(combine(datasets::SmallShapes(), framework::dataset::make("Stride", { 2, 3 })), + framework::dataset::make("DataType", DataType::U32)), + framework::dataset::make("DataLayout", { DataLayout::NCHW, DataLayout::NHWC }))) +{ + // Validate output + validate(Accessor(_target), _reference); +} + +FIXTURE_DATA_TEST_CASE(RunLarge, + NEReorgLayerFixture, + framework::DatasetMode::NIGHTLY, + combine(combine(combine(datasets::LargeShapes(), framework::dataset::make("Stride", { 2, 3 })), + framework::dataset::make("DataType", DataType::U32)), + framework::dataset::make("DataLayout", { DataLayout::NCHW, DataLayout::NHWC }))) +{ + // Validate output + validate(Accessor(_target), _reference); +} +TEST_SUITE_END() // U32 + +TEST_SUITE_END() // ReorgLayer +TEST_SUITE_END() // NEON +} // namespace validation +} // namespace test +} // namespace arm_compute diff --git a/tests/validation/fixtures/ReorgLayerFixture.h b/tests/validation/fixtures/ReorgLayerFixture.h new file mode 100644 index 0000000000..2bc5a6fb8c --- /dev/null +++ b/tests/validation/fixtures/ReorgLayerFixture.h @@ -0,0 +1,115 @@ +/* + * Copyright (c) 2018 ARM Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#ifndef ARM_COMPUTE_TEST_REORG_LAYER_FIXTURE +#define ARM_COMPUTE_TEST_REORG_LAYER_FIXTURE + +#include "arm_compute/core/TensorShape.h" +#include "arm_compute/core/Types.h" +#include "tests/AssetsLibrary.h" +#include "tests/Globals.h" +#include "tests/IAccessor.h" +#include "tests/framework/Asserts.h" +#include "tests/framework/Fixture.h" +#include "tests/validation/reference/ReorgLayer.h" + +namespace arm_compute +{ +namespace test +{ +namespace validation +{ +template +class ReorgLayerValidationFixture : public framework::Fixture +{ +public: + template + void setup(TensorShape input_shape, int32_t stride, DataType data_type, DataLayout data_layout) + { + _target = compute_target(input_shape, stride, data_type, data_layout); + _reference = compute_reference(input_shape, stride, data_type); + } + +protected: + template + void fill(U &&tensor, int i) + { + library->fill_tensor_uniform(tensor, i); + } + + TensorType compute_target(TensorShape input_shape, int32_t stride, DataType data_type, DataLayout data_layout) + { + // Check if indeed the input shape can be reshape to the output one + ARM_COMPUTE_EXPECT(stride >= 0, framework::LogLevel::ERRORS); + + if(data_layout == DataLayout::NHWC) + { + permute(input_shape, PermutationVector(2U, 0U, 1U)); + } + + // Create tensors + TensorType src = create_tensor(input_shape, data_type, 1, QuantizationInfo(), data_layout); + TensorType dst; + + // Create and configure function + FunctionType reorg; + + reorg.configure(&src, &dst, stride); + + ARM_COMPUTE_EXPECT(src.info()->is_resizable(), framework::LogLevel::ERRORS); + ARM_COMPUTE_EXPECT(dst.info()->is_resizable(), framework::LogLevel::ERRORS); + + // Allocate tensors + src.allocator()->allocate(); + dst.allocator()->allocate(); + + ARM_COMPUTE_EXPECT(!src.info()->is_resizable(), framework::LogLevel::ERRORS); + ARM_COMPUTE_EXPECT(!dst.info()->is_resizable(), framework::LogLevel::ERRORS); + + // Fill tensors + fill(AccessorType(src), 0); + + // Compute function + reorg.run(); + + return dst; + } + + SimpleTensor compute_reference(const TensorShape &input_shape, int32_t stride, DataType data_type) + { + // Create reference + SimpleTensor src{ input_shape, data_type }; + + // Fill reference + fill(src, 0); + + return reference::reorg_layer(src, stride); + } + + TensorType _target{}; + SimpleTensor _reference{}; +}; +} // namespace validation +} // namespace test +} // namespace arm_compute +#endif /* ARM_COMPUTE_TEST_REORG_LAYER_FIXTURE */ diff --git a/tests/validation/reference/ReorgLayer.cpp b/tests/validation/reference/ReorgLayer.cpp new file mode 100644 index 0000000000..cb13a737e0 --- /dev/null +++ b/tests/validation/reference/ReorgLayer.cpp @@ -0,0 +1,97 @@ +/* + * Copyright (c) 2018 ARM Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#include "ReorgLayer.h" + +#include "arm_compute/core/Types.h" + +namespace arm_compute +{ +namespace test +{ +namespace validation +{ +namespace reference +{ +namespace +{ +TensorShape compute_reorg_shape(const TensorShape &src_shape, int32_t stride) +{ + ARM_COMPUTE_ERROR_ON(stride <= 0); + + TensorShape dst_shape = src_shape; + dst_shape.set(0, src_shape.x() / stride); + dst_shape.set(1, src_shape.y() / stride); + dst_shape.set(2, src_shape.z() * stride * stride); + + return dst_shape; +} +} // namespace + +template +SimpleTensor reorg_layer(const SimpleTensor &src, int32_t stride) +{ + // Calculate output shape + const TensorShape dst_shape = compute_reorg_shape(src.shape(), stride); + + // Create destination tensor + SimpleTensor dst{ dst_shape, src.data_type() }; + + const unsigned int W = dst.shape().x(); + const unsigned int H = dst.shape().y(); + const unsigned int C = dst.shape().z(); + const unsigned int out_c = C / (stride * stride); + const unsigned int outer_dims = dst.shape().total_size() / (W * H * C); + + // Calculate layer reorg in NCHW + Coordinates map_coords; + for(unsigned int b = 0; b < outer_dims; ++b) + { + map_coords.set(3, b); + for(unsigned int c = 0; c < C; ++c) + { + map_coords.set(2, c % out_c); + const unsigned int offset = c / out_c; + for(unsigned int h = 0; h < H; ++h) + { + map_coords.set(1, h * stride + offset / stride); + for(unsigned int w = 0; w < W; ++w) + { + const unsigned int dst_idx = w + W * (h + H * (c + C * b)); + map_coords.set(0, w * stride + offset % stride); + dst[dst_idx] = *reinterpret_cast(src(map_coords)); + } + } + } + } + + return dst; +} + +template SimpleTensor reorg_layer(const SimpleTensor &src, int32_t stride); +template SimpleTensor reorg_layer(const SimpleTensor &src, int32_t stride); +template SimpleTensor reorg_layer(const SimpleTensor &src, int32_t stride); +} // namespace reference +} // namespace validation +} // namespace test +} // namespace arm_compute diff --git a/tests/validation/reference/ReorgLayer.h b/tests/validation/reference/ReorgLayer.h new file mode 100644 index 0000000000..c3f42f4aa0 --- /dev/null +++ b/tests/validation/reference/ReorgLayer.h @@ -0,0 +1,43 @@ +/* + * Copyright (c) 2018 ARM Limited. + * + * SPDX-License-Identifier: MIT + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + */ +#ifndef __ARM_COMPUTE_TEST_REORG_LAYER_H__ +#define __ARM_COMPUTE_TEST_REORG_LAYER_H__ + +#include "tests/SimpleTensor.h" + +namespace arm_compute +{ +namespace test +{ +namespace validation +{ +namespace reference +{ +template +SimpleTensor reorg_layer(const SimpleTensor &src, int32_t stride); +} // namespace reference +} // namespace validation +} // namespace test +} // namespace arm_compute +#endif /* __ARM_COMPUTE_TEST_REORG_LAYER_H__ */ -- cgit v1.2.1