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2018-11-02COMPMID-1413 - Improve the performance of GEMMLowp with 8 bit dot product on ↵Gian Marco Iodice
OpenCL COMPMID-1424 - Add dot product support for CLDepthwise QASYMM8 3x3 NHWC non-unit stride With this patch we are able to improve the performance of MobileNet v1-qasymm8 by 37 % Tried to use the dot product instruction in CLDepthwise QASYMM8 3x3 NHWC non-unit stride but I have not seen any benefit (maybe because we have few arithemtic operation and we do not have more load instructions). However Depthwise convolution has been improved by 30% Change-Id: Id768a99c2e53a04276707e427af5d0ec93419ada Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/155082 Tested-by: bsgcomp <bsgcomp@arm.com> Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
2018-11-02COMPMID-1695: (Nightly) bad_alloc in CLIm2ColGeorgios Pinitas
Clear CLContext in a more regular basis to make the driver release memory back to the system. Change-Id: I0df847766f57719433bbaeada45fe630e38c9541 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/155435 Reviewed-by: Giuseppe Rossini <giuseppe.rossini@arm.com> Tested-by: bsgcomp <bsgcomp@arm.com>
2018-11-02COMPMID-1696: (Nighlty) CLDepthwiseConvolution FP16 mismatchesGeorgios Pinitas
Increases relative tolerance slightly as error was quite small. Change-Id: I4789c5e3eeb4f2d3aaf2b4c76966474f045af4c1 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/155418 Reviewed-by: Michalis Spyrou <michalis.spyrou@arm.com> Tested-by: bsgcomp <bsgcomp@arm.com>
2018-11-02COMPMID-1451: Fix CL/NEPermuteKernel PermuteVection checkIsabella Gottardi
COMPMID-1690: Add tests for NEPermute with PermutationVector dimension > 3 Change-Id: I4bfc6ff88cd46863c2e39975b5663c624db1a63d Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/155316 Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com> Tested-by: bsgcomp <bsgcomp@arm.com>
2018-11-02COMPMID-1685: Allow build_dir to be an absolute pathAnthony Barbier
Change-Id: I875ffe0ccec3aa4f53bfb68d82e2a7292ab83358 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/155348 Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com> Tested-by: bsgcomp <bsgcomp@arm.com>
2018-11-02COMPMID-1451: FP16 L2Normalization failuresMichalis Spyrou
Set input range to [-1, 1] in order to avoid inf values when calculating sqrt. Change-Id: I18f1e427baa7830fdc587bedf27a92d78c72f49b Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/155397 Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com> Tested-by: bsgcomp <bsgcomp@arm.com>
2018-11-02COMPMID-711: add GEMMInterleave4X4 benchmarking tests.Pablo Tello
Change-Id: I7a32becd78fc231d11d50c6ff58892f4acb0ccda Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/155224 Tested-by: bsgcomp <bsgcomp@arm.com> Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
2018-11-02COMPMID-1680: (Nighlty) CLBBoxTransform mismatchesgiuros01
Instead of changing the tolerances I increased the sizes of the input. In this way, for a single mismatch, as it was the case, we are below the 1% tolerance set. Change-Id: I787261a1d1adb559c1687b7bd1e0317a72594130 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/155168 Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com> Tested-by: bsgcomp <bsgcomp@arm.com>
2018-11-02COMPMID-1682 Nightly NEON Reduction operation mismatchesMichalis Spyrou
Increase tolerance for fp32 and added absolute tolerance Change-Id: Iff828457b514d6301ed2c8e04b66ce86867f72b6 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/155086 Tested-by: bsgcomp <bsgcomp@arm.com> Reviewed-by: Isabella Gottardi <isabella.gottardi@arm.com>
2018-11-02COMPMID-1681: (Nightly) NEWidthConcatenateLayer failsMichele Di Giorgio
NEWidthConcatenateLayerKernel works with 4D tensors too, hence the check has been removed and tests have been added. Change-Id: I73814cabe5fae975a44cc1a03b092c552497e57d Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/155070 Tested-by: bsgcomp <bsgcomp@arm.com> Reviewed-by: Isabella Gottardi <isabella.gottardi@arm.com>
2018-11-02COMPMID-1451 Properly remove dimensions in CLReduceMeanMichalis Spyrou
Change-Id: I7bd4a8ce81483ba56686b765ca3caabebe42882d Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/155000 Tested-by: bsgcomp <bsgcomp@arm.com> Reviewed-by: Michele DiGiorgio <michele.digiorgio@arm.com>
2018-11-02COMPMID-1673: Collapse window in CLArithmeticAddition when one operand is a ↵Michele Di Giorgio
vector When one of the operands is a vector, the kernel does a broadcast addition and the window is not collapsed. This represent an issue because it leads to a lot of enqueues that increases the time taken by the OpenCL driver. This patch allows to collapse the window when one of the two operands is a vector. Furthermore, it adds LWS tuner to the kernel. It also changes the number of elements processed per iteration to 8 to make better usage of the cache. Change-Id: I5f09ab0ddcffb3b7f9326a987c79a997b2d7fa8c Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/155003 Reviewed-by: Giuseppe Rossini <giuseppe.rossini@arm.com> Tested-by: bsgcomp <bsgcomp@arm.com>
2018-11-02COMPMID-1451: Perform CLOutputStage using floats.Georgios Pinitas
Change-Id: Ic8312a5b6790aa7cd4468d42f08d557ad40e9441 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/154570 Tested-by: bsgcomp <bsgcomp@arm.com> Reviewed-by: Gian Marco Iodice <gianmarco.iodice@arm.com>
2018-11-02COMPMID-1327: Add support for BBoxTransform operator in CLgiuros01
Change-Id: I91865506166951b3bf7f06a0b2d4cde925cfefb6 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/153447 Tested-by: bsgcomp <bsgcomp@arm.com> Reviewed-by: Pablo Tello <pablo.tello@arm.com>
2018-11-02COMPMID-1632 Add CLL2NormalizationLayer for NHWC and FP32Michalis Spyrou
Change-Id: Iae22554d5fe893fd22a000eab5bfd8275ea06eb3 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/154102 Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com> Tested-by: bsgcomp <bsgcomp@arm.com>
2018-11-02COMPMID-1523: Fuse BN node with convolution.Georgios Pinitas
Change-Id: I146936c9e98b343496a4b61cdbadf0eaa38e885a Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/154008 Reviewed-by: Michele DiGiorgio <michele.digiorgio@arm.com> Reviewed-by: Giuseppe Rossini <giuseppe.rossini@arm.com> Tested-by: bsgcomp <bsgcomp@arm.com>
2018-11-02COMPMID-1667: Add 4D tensors support to CLWidthConcatenateLayerKernelMichele Di Giorgio
Change-Id: Ibc0b1242804c2fdb183825406e3c78bd0d1d3564 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/154368 Reviewed-by: Pablo Tello <pablo.tello@arm.com> Tested-by: bsgcomp <bsgcomp@arm.com>
2018-11-02COMPMID-1580 Implement ReduceMean in NEONMichalis Spyrou
Change-Id: Id974efad304c2513b8824a6561ad45ee60b9e7fb Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/153763 Reviewed-by: Giuseppe Rossini <giuseppe.rossini@arm.com> Reviewed-by: Isabella Gottardi <isabella.gottardi@arm.com> Tested-by: bsgcomp <bsgcomp@arm.com>
2018-11-02COMPMID-1661 Nightly - CLReductionOperation FP16 failuresMichalis Spyrou
Change-Id: If496709958bf29589601eac62a268819736a4fd2 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/154173 Reviewed-by: Pablo Tello <pablo.tello@arm.com> Tested-by: bsgcomp <bsgcomp@arm.com>
2018-11-02COMPMID-1586: Add support for NHWC CLDeconvolutionLayerMichele Di Giorgio
COMPMID-1651: Fix QASYMM8 CLDeconvolutionLayer This patch also extends the range of values used for testing Convolution and Deconvolution to cover quantized [-1.0f, 1.0f]. Change-Id: I8b280669db67bb3ec25bf5d411c8f5954f5b0dab Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/149869 Reviewed-by: Michalis Spyrou <michalis.spyrou@arm.com> Tested-by: bsgcomp <bsgcomp@arm.com>
2018-11-02COMPMID-1574 Implement ReduceMean in OpenCLMichalis Spyrou
Change-Id: Id331199f569f52a37280a9ada5bf84694580b93c Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/152843 Tested-by: bsgcomp <bsgcomp@arm.com> Reviewed-by: Michele DiGiorgio <michele.digiorgio@arm.com>
2018-11-02COMPMID-1657 - Fix CPU info in the json file outputGian Marco Iodice
Change-Id: I05a1b871746a32ccc1c3ecec97b8266767c9d0a7 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/153715 Reviewed-by: Pablo Tello <pablo.tello@arm.com> Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com> Tested-by: bsgcomp <bsgcomp@arm.com>
2018-11-02COMPMID-1631: Fixed test framework memory corruption.Pablo Tello
Change-Id: I2c4dcedcd3b56e41174eebbbacd47be4e968d34d Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/152767 Tested-by: bsgcomp <bsgcomp@arm.com> Reviewed-by: Vidhya Sudhan Loganathan <vidhyasudhan.loganathan@arm.com> Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
2018-11-02COMPMID-1451: Fix NormalizationLayer accross width normalization.Georgios Pinitas
NEON and CL normalization layer was generating invalida results for radius > 4. Change-Id: I15d846405e6b3492fe44920bbf8cadceb4e5258f Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/153161 Tested-by: bsgcomp <bsgcomp@arm.com> Reviewed-by: Matteo Martincigh <matteo.martincigh@arm.com> Reviewed-by: Pablo Tello <pablo.tello@arm.com>
2018-11-02COMPMID-1621 Deconvolution wrong output calculationMichalis Spyrou
Change-Id: Ida71312bcf6dbd854f2ab1efc65f74910c79e152 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/151510 Tested-by: bsgcomp <bsgcomp@arm.com> Reviewed-by: Michele DiGiorgio <michele.digiorgio@arm.com>
2018-11-02COMPMID-1628: NEWinograd mismatches in the nightly.Pablo Tello
Since this is floating point arithmetic the Winograd results will not be exactly the same as direct convolution. Changed to use relative tolerance for the nightly tests. Change-Id: I45c6d60a097c2d4fb53650a2a33eb29a3e51d7ec Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/152324 Tested-by: bsgcomp <bsgcomp@arm.com> Reviewed-by: Michele DiGiorgio <michele.digiorgio@arm.com>
2018-11-02COMPMID-1622 : (Nightly) Seg fault on androidVidhya Sudhan Loganathan
call to print_cpu_info moved to main Change-Id: I6d82649964542df4e944bc79e4c16f0813976295 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/152695 Tested-by: bsgcomp <bsgcomp@arm.com> Reviewed-by: Pablo Tello <pablo.tello@arm.com>
2018-11-02COMPMID-1622 : (Nightly) Seg fault on androidVidhya Sudhan Loganathan
conditionally compile the std::cout that was causing the fault Change-Id: I7f50151ab88f19ed6eec1be11ca975614653e359 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/151762 Reviewed-by: Pablo Tello <pablo.tello@arm.com> Tested-by: bsgcomp <bsgcomp@arm.com>
2018-11-02COMPMID-1627: (nightly) ROIAlign failuregiuros01
Change-Id: I062e7673f26d5267ed113eae7edd361d05d6de73 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/151968 Reviewed-by: Isabella Gottardi <isabella.gottardi@arm.com> Tested-by: bsgcomp <bsgcomp@arm.com>
2018-11-02COMPMID-1610: Fixed CLDirectConvolution mismatchesPablo Tello
Kernel size 5x5 layout NHWC. Change-Id: Ia82ff211d1c954df228962b5c2c5ad8df7112449 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/151740 Reviewed-by: Michalis Spyrou <michalis.spyrou@arm.com> Tested-by: bsgcomp <bsgcomp@arm.com>
2018-11-02COMPMID-1559 : (Nightly) CLWinograd FP16 SIGABORT and mismatchesVidhya Sudhan Loganathan
Current implementation of winograd fp16 is not accurate enough for large runs. disabling its use and reopening ticket(COMPMID-1266) to fix it. The sigbus error that was originally reported against COMPMID-1559 is being tracked as COMPMID-1606 Change-Id: I45129aa366d5710402bc54b623c5fbfb865b3cd5 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/151543 Tested-by: bsgcomp <bsgcomp@arm.com> Reviewed-by: Isabella Gottardi <isabella.gottardi@arm.com>
2018-11-02[COMPMID-1331] Add support for RoIAlign operator in CLgiuros01
Change-Id: Ie215daacd10477309dbf8af1bb2b05b7a0a8f203 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/150773 Tested-by: bsgcomp <bsgcomp@arm.com> Reviewed-by: Isabella Gottardi <isabella.gottardi@arm.com> Reviewed-by: Pablo Tello <pablo.tello@arm.com>
2018-11-02COMPMID-162: output cpus list and capabilities in validation suite.Pablo Tello
Change-Id: I6f71f2da851454e8fbbdfc9223592dea9ad03bac Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/151014 Tested-by: bsgcomp <bsgcomp@arm.com> Reviewed-by: Giuseppe Rossini <giuseppe.rossini@arm.com> Reviewed-by: Isabella Gottardi <isabella.gottardi@arm.com>
2018-11-02COMPMID-286: CL colour convert to U8Manuel Bottini
Change-Id: I62bbf510cc106a90ed2884be3c9c0c127da25898 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/150681 Reviewed-by: Giuseppe Rossini <giuseppe.rossini@arm.com> Tested-by: bsgcomp <bsgcomp@arm.com>
2018-11-02COMPMID-1599: (Nightly) CL/NormalizePlanarYUVLayer/Quantized/QASYMM8 mismatchesMichele Di Giorgio
Fixing bounds of random values for Normalize Planar YUV tests when using QASYMM8. Furthermore, since 70d252d8b4 a QASYMM8 implementation of Batch Normalization would have been tested with tensors filled with all 1s. This patch removes that as QASYMM8 Batch Normalization is not supported. Change-Id: Ieab83ed36b2d7af760ceb19a07d1eedcc991957f Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/150492 Reviewed-by: Isabella Gottardi <isabella.gottardi@arm.com> Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com> Tested-by: bsgcomp <bsgcomp@arm.com>
2018-11-02COMPMID-287: NEON colour convert to U8Manuel Bottini
Change-Id: I47033fa70881fd32b13266adb6ccbf10c202aabc Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/150344 Tested-by: bsgcomp <bsgcomp@arm.com> Reviewed-by: Pablo Tello <pablo.tello@arm.com>
2018-11-02COMPMID-1596 Create UpsampleLayer for NEONMichalis Spyrou
Change-Id: I82d95c4f1c5fed13b213a2591cc2b4e0d0e02a54 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/149676 Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com> Reviewed-by: Pablo Tello <pablo.tello@arm.com> Tested-by: bsgcomp <bsgcomp@arm.com>
2018-11-02COMPMID-1518: Add support for GEMM3D in CLGEMMLowpMatrixMultiplyCoreGeorgios Pinitas
Change-Id: Ib14ac821ee5d4aff80bd602cd3e76e7018abb5e6 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/150268 Tested-by: bsgcomp <bsgcomp@arm.com> Reviewed-by: Isabella Gottardi <isabella.gottardi@arm.com> Reviewed-by: Michele DiGiorgio <michele.digiorgio@arm.com>
2018-11-02COMPMID-1602: Added Winograd tests for kernel 7x1 and 1x7.Pablo Tello
Change-Id: I9250b2e8020fe87c6ed4de582bbc7460bbd8e94b Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/150287 Tested-by: bsgcomp <bsgcomp@arm.com> Reviewed-by: Isabella Gottardi <isabella.gottardi@arm.com>
2018-11-02COMPMID-1590: Memory corruption in arm_compute_validation.Pablo Tello
RSH code only support padding SAME|VALID, this means we cannot call it with padx=1 for kernel size 5x5. The supporting padding values are 2 and 0. Fixed the problem by modifying the test shapes and added some asserts in NEWinogradConvolutionLayer. Change-Id: I4b73fa9d13c2200a47002965dc3b471d0f2cafba Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/149883 Tested-by: bsgcomp <bsgcomp@arm.com> Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
2018-11-02COMPMID-1540 Implement YOLOLayer on NEONMichalis Spyrou
Change-Id: Ice28996959dc666fff5e8ae486c1ff8093db083f Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/148367 Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com> Tested-by: bsgcomp <bsgcomp@arm.com>
2018-11-02COMPMID-1588 Create UpsampleKernel for YOLOLayerMichalis Spyrou
Change-Id: Ic1f9e85306a0a0b1459c9f9aa35bd629deea1710 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/148797 Tested-by: bsgcomp <bsgcomp@arm.com> Reviewed-by: Anthony Barbier <anthony.barbier@arm.com> Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
2018-11-02[COMPMID-1593] CLPad failinggiuros01
Change-Id: Id1604fbf3b8fc98d5b45fa8266dd8182cf0ce204 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/149137 Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com> Tested-by: bsgcomp <bsgcomp@arm.com>
2018-11-02COMPMID-1581: Collapse windowsGeorgios Pinitas
Change-Id: Iec56c9a96d9736a63f13b65efa33311950f20661 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/148572 Reviewed-by: Anthony Barbier <anthony.barbier@arm.com> Tested-by: bsgcomp <bsgcomp@arm.com>
2018-11-02COMPMID-1591: Fix NEPoolingLayer for NHWCGeorgios Pinitas
Restore window step across width to 4 for FP32 instead of the whole row as the kernel code was inconsistent with this decision. Change-Id: I7c4dcdf960b8cbc970a36fa1df39df2c6f000c86 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/148908 Reviewed-by: Michalis Spyrou <michalis.spyrou@arm.com> Reviewed-by: Anthony Barbier <anthony.barbier@arm.com> Tested-by: bsgcomp <bsgcomp@arm.com>
2018-11-02COMPMID-1564: Add QASYMM8 on CLPixelwiseMultiplicationGeorgios Pinitas
Change-Id: I5f719f5b2915c18cd0ca6271db401152112863a6 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/148982 Tested-by: bsgcomp <bsgcomp@arm.com> Reviewed-by: Isabella Gottardi <isabella.gottardi@arm.com> Reviewed-by: Anthony Barbier <anthony.barbier@arm.com> Reviewed-by: Giuseppe Rossini <giuseppe.rossini@arm.com>
2018-11-02COMPMID-1554 Implementing Space to Batch on OpenCL - NHWCMichalis Spyrou
Change-Id: Ifa37a6758f79d0a6ca771dcfb4c55a5d96b452d0 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/148892 Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com> Tested-by: bsgcomp <bsgcomp@arm.com>
2018-11-02COMPMID-1564: Add NEDepthwiseConvolution3x3 for QASYMM8Georgios Pinitas
Change-Id: I1f55508af6f220e5f41df7b56daffb4761ed0591 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/148253 Tested-by: bsgcomp <bsgcomp@arm.com> Reviewed-by: Isabella Gottardi <isabella.gottardi@arm.com>
2018-11-02COMPMID-1568: Add support for QASYMM8 to CLNormalizePlanarYUVMichele Di Giorgio
Change-Id: Id7ea6e7f57179478e5ba0e9231274e98fa089590 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/148028 Tested-by: bsgcomp <bsgcomp@arm.com> Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
2018-11-02COMPMID-1532: Add DepthwiseConvolution3x3 FP16 on NEONGeorgios Pinitas
Change-Id: I780970f317b979b3230e2b471ac01df7fda9ee14 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/148168 Tested-by: bsgcomp <bsgcomp@arm.com> Reviewed-by: Anthony Barbier <anthony.barbier@arm.com>
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