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2018-12-05COMPMID-1298: Fuse ReLu activation in CLWinogradOutputTransformManuel Bottini
Change-Id: I9e6e43a5839d04c2e4b4552c05446efb0a5074cf Reviewed-on: https://review.mlplatform.org/232 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
2018-12-05COMPMID-1073: CLDepthwiseConvolutionLayer uses the optimised pathPablo Tello
Change-Id: Ibdb7d875f8ff89bc210c63d389abef1ea1fd51d5 Reviewed-on: https://review.mlplatform.org/330 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com> Reviewed-by: Anthony Barbier <Anthony.barbier@arm.com>
2018-12-05COMPMID-1757: NEON: Implement Tilegiuros01
Change-Id: Ic6a1f55f14d53896725afe426bc2e2acb1546589 Reviewed-on: https://review.mlplatform.org/343 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
2018-12-05COMPMID-1725: Implement PackGian Marco Iodice
Change-Id: I13f6e4c600f39355f69e015409bf30dafdc5e3aa Reviewed-on: https://review.mlplatform.org/332 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Michele Di Giorgio <michele.digiorgio@arm.com>
2018-12-04COMPMID-1820: (Nightly) NEON/DepthConvertLayer/F16_to_F32 failsGeorgios Pinitas
-Removes shift from depth conversion tests. -Changes Cast tolerance between float conversions to zero Change-Id: I6c456f7d910eb3c02069f1e4d5df7b257d6d784e Reviewed-on: https://review.mlplatform.org/341 Reviewed-by: Anthony Barbier <Anthony.barbier@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com>
2018-11-30COMPMID-1717: CL: Implement Maximum, Minimum, SquaredDifferencegiuros01
Change-Id: Ice653e48211053bd3cd20a693bd76de6b4efc370 Reviewed-on: https://review.mlplatform.org/270 Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com>
2018-11-30COMPMID-1728 CL: Implement ArgMax/ArgMinMichalis Spyrou
Change-Id: I7eae2e55cc0b0b7bbebb7617299daaca6f75f40c Reviewed-on: https://review.mlplatform.org/292 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
2018-11-28COMPMID-1716: CL Comparison operationsGeorgios Pinitas
Adds support for Equal,NotEqual,Less,LessEqual,Greater,GreaterEqual Change-Id: If0cdf4aae7f95c94709b195eee485f6663f45909
2018-11-27COMPMID-1720: CL: Implement Tilegiuros01
Change-Id: I2a18f0acea382960a8bc71a8f56928a5998f0dd6
2018-11-23COMPMID-1647 NENormalizationLayer IN_MAP_2D support for NHWC for FP32/FP16Michalis Spyrou
Change-Id: Id74cc7ba8e5cabee6acd3798d4779f88b1f00a9b
2018-11-23COMPMID-1734: Implement CLSelectGeorgios Pinitas
Change-Id: I49b2e8b4200c9ed654736d9451e4ab9c073b4b10
2018-11-22COMPMID-1645 NEL2Normalization for FP32/FP16 & NHWCMichalis Spyrou
Change-Id: I29e35024e29781a6b943b568abec9c73649215e6
2018-11-22COMPMID-1718: Extend DepthConvert to support CastGeorgios Pinitas
Change-Id: I6ee2c0b670727fc808fa636c53ddfaec3a0036c9
2018-11-22COMPMID-1648: CLNormalizationLayer IN_MAP_2D support for NHWC for FP32/FP16Michele Di Giorgio
Change-Id: I49f1d865f5e7562f1d80db849353a89ef77e6a9e
2018-11-21COMPMID-1451 Change PriorBox output to NCHwMichalis Spyrou
Output of Priorbox should be independent of the input data layout and should always be in NCHW format Change-Id: Ie80cd4e51c78945b158c0db1af1923bdf8d7ea7b
2018-11-21COMPMID-1800: (Nightly) Mismatches in SC9863 board for NEON FP16Michele Di Giorgio
Fixes for: - ReduceMean, reduction on the X axis for FP16 with 8 elements was performed only up to a certain point. The fix now takes into account the number of elements of the vector and does as many reductions as necessary. - YOLOLayer, activation for FP16 has to be performed on 32 bits until the FP16 approximations is fixed. Change-Id: I75373f4edd37de476e6fe1a56de3ef386b65c619
2018-11-21COMPMID-1451 (Nightly) L2Normalization sigkillMichalis Spyrou
NHWC reduction on 0 axis requires a lot of memory. Testing only axis 1 and 2 for now. Change-Id: I82e16a27b6dfc6b426e6294cde63c3d88cb41a09
2018-11-21COMPMID-1088: Use IMemoryRegion in interfaces where possibleGeorgios Pinitas
-Simplifies import memory interface -Changes the used of void** handles with appropriate interfaces. Change-Id: I5918c855c11f46352058864623336b352162a4b7
2018-11-20COMPMID-1646: NEResizeBilinearLayer NHWCGeorgios Pinitas
-Adds NHWC support for FP16 Change-Id: I61addf8efecf511ac8cd5f8aa9afc3e09c476aaf
2018-11-20COMPMID-1799 (Nightly) CLL2NormalizeLayer mismatchesMichalis Spyrou
Changed random distribution to [1, 2] as values close to zero generate mismatches. Change-Id: I4a00fc4f445b123dea624dd8459efce945f06126
2018-11-20COMPMID-1451: Fix CLBatchToSpace static validation methodMichalis Spyrou
Change-Id: I770b044b67d93510ef65e556905135b34be7ea0a
2018-11-19COMPMID-1644: NEDepthwiseConvolution for FP16 NHWCGeorgios Pinitas
Change-Id: I6e7dee8bd615a5eff01c523f208a218574ee5eab
2018-11-19COMPMID-1065 : Create documentation explaining how to add new functions / ↵Vidhya Sudhan Loganathan
kernels Change-Id: I98183f95814442b6f3dbb67a1bdae99df05b9b01
2018-11-16COMPMID-1451: Fixes for BoundingBoxTransformgiuros01
- Fixing a bug for which we did not scale the boxes before transforming them - Adding the correct_transform_coords option to BoundingBoxTransformInfo Change-Id: I40281254bcf87e7c8583c119e99562414fe59822
2018-11-16COMPMID-1451: (3RDPARTY_UPDATE) Fixes for GenerateProposals graph node and ↵Michele Di Giorgio
BoxWithNMSLimitKernel COMPMID-1792: Accuracy issue in CLGenerateProposals This patch does the following: - Some fixes for GenerateProposals function and tests - Adapting BoxWithNMSLimitKernel to only accept U32 tensors as keeps_size - Update 3rdparty - Adds a small tolerance for a GenerateProposals test Change-Id: Ia8ec1cdfe941fe05003645e86deb9ea6a6044d74
2018-11-16COMPMID-1266 : Add support for FP16 in CLWinogradConvolutionLayer: 5x5 kernelsVidhya Sudhan Loganathan
Introduced F32 accumulation for F16 winograd gemm and output transform WinogradConvolution will be available for F16 only if fast math flag is enabled Change-Id: I215593c205236a0f9669218437bb40b184ec6a4f
2018-11-16COMPMID-1793 CLL2Normalization mismatchesMichalis Spyrou
Increase tolerance for FP16 Change-Id: I88f95da5471bbceb7449f453e2e33cf0bc4da23e
2018-11-16COMPMID-1461 SSD support: Create NEON PriorBoxMichalis Spyrou
Change-Id: I99e1c3939cfea4b9cb0ddfa313706f31b213ca89
2018-11-15COMPMID-1676: Change CLROIAlign interface to accept ROIs as tensorsManuel Bottini
Change-Id: I69e995973597ba3927d29e4f6ed5438560e53d77
2018-11-15COMPMID-1451: Fix the shape of scratch_buffer in case of CIFGGeorgios Pinitas
In case of CIFG optimisation scratch buffer should have a size of [batch_size, num_units * 3] else [batch_size, num_units * 4]. Change-Id: I43e46f7b52e791472f1196f36e9142240ba76c5c
2018-11-15COMPMID-1708: Improve GEMM test coverage.Pablo Tello
Added test cases to exercise the code path where the reshaping of B is performed on the fly. Change-Id: Ifa4348e1054dc0019be3927f482adf64b18fd554
2018-11-15COMPMID-1329: Add support for GenerateProposals operator in CLgiuros01
Change-Id: Ib0798cc17496b7817f5b5769b25d98913a33a69d
2018-11-14COMPMID-1462 SSD support: Create CL PriorBoxMichalis Spyrou
Change-Id: I5bf5d751ec7c02d96c26a769f49d03ea23a248b7
2018-11-14COMPMID-1781 Add channel support in CLL2NormalizationMichalis Spyrou
Change-Id: Ibab049f09413258c99335b7da6b151530a1bd136
2018-11-13COMPMID-1707: Create 3 special CLWidthConcatenate kernel to concatenate 2/4 ↵Michele Di Giorgio
and 8 tensors (Part 1) Creating special cases for concatening 2 and 4 tensors. Change-Id: I6a739a494ae45011acb65369e353f9ef96970b90
2018-11-08COMPMID-1736: Fixed out-of-bound write in CLIm2ColGian Marco Iodice
The issue was related to CLIm2Col when the number of input channels was less than the number of elements processed by each thread. The bug has been fixed in the validate_and_configure_window() function setting the correct number of elements accessed in the output tensor. Also fixed an issue GEMM3D when we have a single output channel Change-Id: I094292d0c7662599c4a4c3916ec5f5821df5faef
2018-11-08COMPMID-1579: Add support for ChannelShuffle operator in NEONGeorgios Pinitas
Change-Id: I6d5f91579850906e1eb973ff6c5612195255e631
2018-11-08COMPMID-1776: Revert QuantizeDownStage to use fixed-pointGeorgios Pinitas
Change-Id: I807ef84dbf893bd401dcac5c0fa3a4ee49aabc66
2018-11-06COMPMID-1451: Fix order of allocations in CLLSTMLayerMichele Di Giorgio
ArmNN reported an issue with padding in CLLSTMLayer. This was due to the fact that some tensors were allocated before they were passed to some configure functions which attempted to change the padding requirement on already allocated memory. Also, increase tolerance on number of mismatches for CLBBoxTransform FP16. Change-Id: Iad75b012be895693d0e553f3ab85f1ca7144e882
2018-11-02COMPMID-1743: Removed tabs from compare_keypoints' outputAnthony Barbier
The tab characters were corrupting the output JSON file of arm_compute_validation Change-Id: I8792fd0e02393aef60341552b428111e969a3927
2018-11-02COMPMID-1451 Reduce precommit testsMichalis Spyrou
Reduce the amount of precommit tests run in DirectConvolution, Deconvolution and Pooling. Proper investigation scheduled for later. Change-Id: Idc2510cf6877e7a605cead84f384852b609e3216 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/156466 Tested-by: bsgcomp <bsgcomp@arm.com> Reviewed-by: Vidhya Sudhan Loganathan <vidhyasudhan.loganathan@arm.com>
2018-11-02COMPMID-1712 CLPoolingLayer wrong results in QASYMM8Michalis Spyrou
Also added the test case reported by ArmNN. Change-Id: I9fe9a1b4f74267a3346529f3a597b37486593c4a Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/155914 Tested-by: bsgcomp <bsgcomp@arm.com> Reviewed-by: Gian Marco Iodice <gianmarco.iodice@arm.com>
2018-11-02COMPMID-1605: API alignment for the MemoryManager with ARMNNGeorgios Pinitas
Change-Id: Iac6a95ba7f388e65b7f1c8865c3e9bf289b233ea Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/155490 Reviewed-by: Anthony Barbier <anthony.barbier@arm.com> Tested-by: bsgcomp <bsgcomp@arm.com>
2018-11-02COMPMID-1413 - Improve the performance of GEMMLowp with 8 bit dot product on ↵Gian Marco Iodice
OpenCL COMPMID-1424 - Add dot product support for CLDepthwise QASYMM8 3x3 NHWC non-unit stride With this patch we are able to improve the performance of MobileNet v1-qasymm8 by 37 % Tried to use the dot product instruction in CLDepthwise QASYMM8 3x3 NHWC non-unit stride but I have not seen any benefit (maybe because we have few arithemtic operation and we do not have more load instructions). However Depthwise convolution has been improved by 30% Change-Id: Id768a99c2e53a04276707e427af5d0ec93419ada Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/155082 Tested-by: bsgcomp <bsgcomp@arm.com> Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
2018-11-02COMPMID-1696: (Nighlty) CLDepthwiseConvolution FP16 mismatchesGeorgios Pinitas
Increases relative tolerance slightly as error was quite small. Change-Id: I4789c5e3eeb4f2d3aaf2b4c76966474f045af4c1 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/155418 Reviewed-by: Michalis Spyrou <michalis.spyrou@arm.com> Tested-by: bsgcomp <bsgcomp@arm.com>
2018-11-02COMPMID-1451: Fix CL/NEPermuteKernel PermuteVection checkIsabella Gottardi
COMPMID-1690: Add tests for NEPermute with PermutationVector dimension > 3 Change-Id: I4bfc6ff88cd46863c2e39975b5663c624db1a63d Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/155316 Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com> Tested-by: bsgcomp <bsgcomp@arm.com>
2018-11-02COMPMID-1451: FP16 L2Normalization failuresMichalis Spyrou
Set input range to [-1, 1] in order to avoid inf values when calculating sqrt. Change-Id: I18f1e427baa7830fdc587bedf27a92d78c72f49b Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/155397 Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com> Tested-by: bsgcomp <bsgcomp@arm.com>
2018-11-02COMPMID-1680: (Nighlty) CLBBoxTransform mismatchesgiuros01
Instead of changing the tolerances I increased the sizes of the input. In this way, for a single mismatch, as it was the case, we are below the 1% tolerance set. Change-Id: I787261a1d1adb559c1687b7bd1e0317a72594130 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/155168 Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com> Tested-by: bsgcomp <bsgcomp@arm.com>
2018-11-02COMPMID-1682 Nightly NEON Reduction operation mismatchesMichalis Spyrou
Increase tolerance for fp32 and added absolute tolerance Change-Id: Iff828457b514d6301ed2c8e04b66ce86867f72b6 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/155086 Tested-by: bsgcomp <bsgcomp@arm.com> Reviewed-by: Isabella Gottardi <isabella.gottardi@arm.com>
2018-11-02COMPMID-1681: (Nightly) NEWidthConcatenateLayer failsMichele Di Giorgio
NEWidthConcatenateLayerKernel works with 4D tensors too, hence the check has been removed and tests have been added. Change-Id: I73814cabe5fae975a44cc1a03b092c552497e57d Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/155070 Tested-by: bsgcomp <bsgcomp@arm.com> Reviewed-by: Isabella Gottardi <isabella.gottardi@arm.com>
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