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2018-12-05COMPMID-1725: Implement PackGian Marco Iodice
Change-Id: I13f6e4c600f39355f69e015409bf30dafdc5e3aa Reviewed-on: https://review.mlplatform.org/332 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Michele Di Giorgio <michele.digiorgio@arm.com>
2018-11-30COMPMID-1717: CL: Implement Maximum, Minimum, SquaredDifferencegiuros01
Change-Id: Ice653e48211053bd3cd20a693bd76de6b4efc370 Reviewed-on: https://review.mlplatform.org/270 Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com>
2018-11-30COMPMID-1728 CL: Implement ArgMax/ArgMinMichalis Spyrou
Change-Id: I7eae2e55cc0b0b7bbebb7617299daaca6f75f40c Reviewed-on: https://review.mlplatform.org/292 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
2018-11-28COMPMID-1716: CL Comparison operationsGeorgios Pinitas
Adds support for Equal,NotEqual,Less,LessEqual,Greater,GreaterEqual Change-Id: If0cdf4aae7f95c94709b195eee485f6663f45909
2018-11-27COMPMID-1720: CL: Implement Tilegiuros01
Change-Id: I2a18f0acea382960a8bc71a8f56928a5998f0dd6
2018-11-23COMPMID-1734: Implement CLSelectGeorgios Pinitas
Change-Id: I49b2e8b4200c9ed654736d9451e4ab9c073b4b10
2018-11-22COMPMID-1718: Extend DepthConvert to support CastGeorgios Pinitas
Change-Id: I6ee2c0b670727fc808fa636c53ddfaec3a0036c9
2018-11-22COMPMID-1648: CLNormalizationLayer IN_MAP_2D support for NHWC for FP32/FP16Michele Di Giorgio
Change-Id: I49f1d865f5e7562f1d80db849353a89ef77e6a9e
2018-11-21COMPMID-1451 Change PriorBox output to NCHwMichalis Spyrou
Output of Priorbox should be independent of the input data layout and should always be in NCHW format Change-Id: Ie80cd4e51c78945b158c0db1af1923bdf8d7ea7b
2018-11-20COMPMID-1799 (Nightly) CLL2NormalizeLayer mismatchesMichalis Spyrou
Changed random distribution to [1, 2] as values close to zero generate mismatches. Change-Id: I4a00fc4f445b123dea624dd8459efce945f06126
2018-11-19COMPMID-1065 : Create documentation explaining how to add new functions / ↵Vidhya Sudhan Loganathan
kernels Change-Id: I98183f95814442b6f3dbb67a1bdae99df05b9b01
2018-11-16COMPMID-1266 : Add support for FP16 in CLWinogradConvolutionLayer: 5x5 kernelsVidhya Sudhan Loganathan
Introduced F32 accumulation for F16 winograd gemm and output transform WinogradConvolution will be available for F16 only if fast math flag is enabled Change-Id: I215593c205236a0f9669218437bb40b184ec6a4f
2018-11-15COMPMID-1676: Change CLROIAlign interface to accept ROIs as tensorsManuel Bottini
Change-Id: I69e995973597ba3927d29e4f6ed5438560e53d77
2018-11-15COMPMID-1451: Fix the shape of scratch_buffer in case of CIFGGeorgios Pinitas
In case of CIFG optimisation scratch buffer should have a size of [batch_size, num_units * 3] else [batch_size, num_units * 4]. Change-Id: I43e46f7b52e791472f1196f36e9142240ba76c5c
2018-11-15COMPMID-1708: Improve GEMM test coverage.Pablo Tello
Added test cases to exercise the code path where the reshaping of B is performed on the fly. Change-Id: Ifa4348e1054dc0019be3927f482adf64b18fd554
2018-11-15COMPMID-1329: Add support for GenerateProposals operator in CLgiuros01
Change-Id: Ib0798cc17496b7817f5b5769b25d98913a33a69d
2018-11-14COMPMID-1462 SSD support: Create CL PriorBoxMichalis Spyrou
Change-Id: I5bf5d751ec7c02d96c26a769f49d03ea23a248b7
2018-11-13COMPMID-1707: Create 3 special CLWidthConcatenate kernel to concatenate 2/4 ↵Michele Di Giorgio
and 8 tensors (Part 1) Creating special cases for concatening 2 and 4 tensors. Change-Id: I6a739a494ae45011acb65369e353f9ef96970b90
2018-11-08COMPMID-1736: Fixed out-of-bound write in CLIm2ColGian Marco Iodice
The issue was related to CLIm2Col when the number of input channels was less than the number of elements processed by each thread. The bug has been fixed in the validate_and_configure_window() function setting the correct number of elements accessed in the output tensor. Also fixed an issue GEMM3D when we have a single output channel Change-Id: I094292d0c7662599c4a4c3916ec5f5821df5faef
2018-11-02COMPMID-1605: API alignment for the MemoryManager with ARMNNGeorgios Pinitas
Change-Id: Iac6a95ba7f388e65b7f1c8865c3e9bf289b233ea Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/155490 Reviewed-by: Anthony Barbier <anthony.barbier@arm.com> Tested-by: bsgcomp <bsgcomp@arm.com>
2018-11-02COMPMID-1413 - Improve the performance of GEMMLowp with 8 bit dot product on ↵Gian Marco Iodice
OpenCL COMPMID-1424 - Add dot product support for CLDepthwise QASYMM8 3x3 NHWC non-unit stride With this patch we are able to improve the performance of MobileNet v1-qasymm8 by 37 % Tried to use the dot product instruction in CLDepthwise QASYMM8 3x3 NHWC non-unit stride but I have not seen any benefit (maybe because we have few arithemtic operation and we do not have more load instructions). However Depthwise convolution has been improved by 30% Change-Id: Id768a99c2e53a04276707e427af5d0ec93419ada Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/155082 Tested-by: bsgcomp <bsgcomp@arm.com> Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
2018-11-02COMPMID-1451: FP16 L2Normalization failuresMichalis Spyrou
Set input range to [-1, 1] in order to avoid inf values when calculating sqrt. Change-Id: I18f1e427baa7830fdc587bedf27a92d78c72f49b Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/155397 Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com> Tested-by: bsgcomp <bsgcomp@arm.com>
2018-11-02COMPMID-1451 Properly remove dimensions in CLReduceMeanMichalis Spyrou
Change-Id: I7bd4a8ce81483ba56686b765ca3caabebe42882d Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/155000 Tested-by: bsgcomp <bsgcomp@arm.com> Reviewed-by: Michele DiGiorgio <michele.digiorgio@arm.com>
2018-11-02COMPMID-1327: Add support for BBoxTransform operator in CLgiuros01
Change-Id: I91865506166951b3bf7f06a0b2d4cde925cfefb6 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/153447 Tested-by: bsgcomp <bsgcomp@arm.com> Reviewed-by: Pablo Tello <pablo.tello@arm.com>
2018-11-02COMPMID-1632 Add CLL2NormalizationLayer for NHWC and FP32Michalis Spyrou
Change-Id: Iae22554d5fe893fd22a000eab5bfd8275ea06eb3 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/154102 Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com> Tested-by: bsgcomp <bsgcomp@arm.com>
2018-11-02COMPMID-1523: Fuse BN node with convolution.Georgios Pinitas
Change-Id: I146936c9e98b343496a4b61cdbadf0eaa38e885a Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/154008 Reviewed-by: Michele DiGiorgio <michele.digiorgio@arm.com> Reviewed-by: Giuseppe Rossini <giuseppe.rossini@arm.com> Tested-by: bsgcomp <bsgcomp@arm.com>
2018-11-02COMPMID-1580 Implement ReduceMean in NEONMichalis Spyrou
Change-Id: Id974efad304c2513b8824a6561ad45ee60b9e7fb Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/153763 Reviewed-by: Giuseppe Rossini <giuseppe.rossini@arm.com> Reviewed-by: Isabella Gottardi <isabella.gottardi@arm.com> Tested-by: bsgcomp <bsgcomp@arm.com>
2018-11-02COMPMID-1586: Add support for NHWC CLDeconvolutionLayerMichele Di Giorgio
COMPMID-1651: Fix QASYMM8 CLDeconvolutionLayer This patch also extends the range of values used for testing Convolution and Deconvolution to cover quantized [-1.0f, 1.0f]. Change-Id: I8b280669db67bb3ec25bf5d411c8f5954f5b0dab Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/149869 Reviewed-by: Michalis Spyrou <michalis.spyrou@arm.com> Tested-by: bsgcomp <bsgcomp@arm.com>
2018-11-02COMPMID-1574 Implement ReduceMean in OpenCLMichalis Spyrou
Change-Id: Id331199f569f52a37280a9ada5bf84694580b93c Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/152843 Tested-by: bsgcomp <bsgcomp@arm.com> Reviewed-by: Michele DiGiorgio <michele.digiorgio@arm.com>
2018-11-02COMPMID-1621 Deconvolution wrong output calculationMichalis Spyrou
Change-Id: Ida71312bcf6dbd854f2ab1efc65f74910c79e152 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/151510 Tested-by: bsgcomp <bsgcomp@arm.com> Reviewed-by: Michele DiGiorgio <michele.digiorgio@arm.com>
2018-11-02[COMPMID-1331] Add support for RoIAlign operator in CLgiuros01
Change-Id: Ie215daacd10477309dbf8af1bb2b05b7a0a8f203 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/150773 Tested-by: bsgcomp <bsgcomp@arm.com> Reviewed-by: Isabella Gottardi <isabella.gottardi@arm.com> Reviewed-by: Pablo Tello <pablo.tello@arm.com>
2018-11-02COMPMID-1599: (Nightly) CL/NormalizePlanarYUVLayer/Quantized/QASYMM8 mismatchesMichele Di Giorgio
Fixing bounds of random values for Normalize Planar YUV tests when using QASYMM8. Furthermore, since 70d252d8b4 a QASYMM8 implementation of Batch Normalization would have been tested with tensors filled with all 1s. This patch removes that as QASYMM8 Batch Normalization is not supported. Change-Id: Ieab83ed36b2d7af760ceb19a07d1eedcc991957f Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/150492 Reviewed-by: Isabella Gottardi <isabella.gottardi@arm.com> Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com> Tested-by: bsgcomp <bsgcomp@arm.com>
2018-11-02COMPMID-1596 Create UpsampleLayer for NEONMichalis Spyrou
Change-Id: I82d95c4f1c5fed13b213a2591cc2b4e0d0e02a54 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/149676 Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com> Reviewed-by: Pablo Tello <pablo.tello@arm.com> Tested-by: bsgcomp <bsgcomp@arm.com>
2018-11-02COMPMID-1518: Add support for GEMM3D in CLGEMMLowpMatrixMultiplyCoreGeorgios Pinitas
Change-Id: Ib14ac821ee5d4aff80bd602cd3e76e7018abb5e6 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/150268 Tested-by: bsgcomp <bsgcomp@arm.com> Reviewed-by: Isabella Gottardi <isabella.gottardi@arm.com> Reviewed-by: Michele DiGiorgio <michele.digiorgio@arm.com>
2018-11-02COMPMID-1602: Added Winograd tests for kernel 7x1 and 1x7.Pablo Tello
Change-Id: I9250b2e8020fe87c6ed4de582bbc7460bbd8e94b Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/150287 Tested-by: bsgcomp <bsgcomp@arm.com> Reviewed-by: Isabella Gottardi <isabella.gottardi@arm.com>
2018-11-02COMPMID-1588 Create UpsampleKernel for YOLOLayerMichalis Spyrou
Change-Id: Ic1f9e85306a0a0b1459c9f9aa35bd629deea1710 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/148797 Tested-by: bsgcomp <bsgcomp@arm.com> Reviewed-by: Anthony Barbier <anthony.barbier@arm.com> Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
2018-11-02COMPMID-1564: Add QASYMM8 on CLPixelwiseMultiplicationGeorgios Pinitas
Change-Id: I5f719f5b2915c18cd0ca6271db401152112863a6 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/148982 Tested-by: bsgcomp <bsgcomp@arm.com> Reviewed-by: Isabella Gottardi <isabella.gottardi@arm.com> Reviewed-by: Anthony Barbier <anthony.barbier@arm.com> Reviewed-by: Giuseppe Rossini <giuseppe.rossini@arm.com>
2018-11-02COMPMID-1554 Implementing Space to Batch on OpenCL - NHWCMichalis Spyrou
Change-Id: Ifa37a6758f79d0a6ca771dcfb4c55a5d96b452d0 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/148892 Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com> Tested-by: bsgcomp <bsgcomp@arm.com>
2018-11-02COMPMID-1568: Add support for QASYMM8 to CLNormalizePlanarYUVMichele Di Giorgio
Change-Id: Id7ea6e7f57179478e5ba0e9231274e98fa089590 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/148028 Tested-by: bsgcomp <bsgcomp@arm.com> Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
2018-11-02COMPMID-1566: Add broadcast to CLArithmeticSubtractionGeorgios Pinitas
Change-Id: I05d21f9a92013ecfd1128d12cf1561cfd6e5c5e9 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/147983 Tested-by: bsgcomp <bsgcomp@arm.com> Reviewed-by: Anthony Barbier <anthony.barbier@arm.com>
2018-11-02[COMPMID-1229] Implementing Pad on OpenCL -FP32/FP16Giuseppe Rossini
Change-Id: Ideead99410e5e0bda1035030af1bbcd0a65ea15e Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/144792 Tested-by: bsgcomp <bsgcomp@arm.com> Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
2018-11-02COMPMID-1507 Add support for QASYMM8 in CLScaleKernelMichalis Spyrou
Change-Id: I4a32e47e6d9152633668cf0e14db88fc8c26f7ea Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/148167 Tested-by: bsgcomp <bsgcomp@arm.com> Reviewed-by: Michele DiGiorgio <michele.digiorgio@arm.com>
2018-11-02COMPMID-1549 Implementing Batch to Space on OpenCL - NHWCMichalis Spyrou
Change-Id: If7ae0a8b6255a10711365068d9fb153c71f09818 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/147751 Tested-by: bsgcomp <bsgcomp@arm.com> Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
2018-11-02COMPMID-1584 - Collapse batch size in CLChannelShuffleLayerKernelGian Marco Iodice
COMPMID-1589 - Add support for NHWC to CLChannelShuffleLayerKernel Change-Id: I13936a5cd1659d01fdb10b346e90f0d72d79f1f1 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/148475 Tested-by: bsgcomp <bsgcomp@arm.com> Reviewed-by: Michele DiGiorgio <michele.digiorgio@arm.com>
2018-11-02COMPMID-1227 Implementing Space to Batch on OpenCLMichalis Spyrou
Change-Id: I6fd83d6584c56a4fd2470948f1987e23237c16d3 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/145577 Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com> Tested-by: bsgcomp <bsgcomp@arm.com>
2018-11-02COMPMID-1539 Implement YOLOLayer on CLGiorgio Arena
Change-Id: I332c0703e1399fca0c5b724529b54a28f49c88da Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/146842 Tested-by: Jenkins <bsgcomp@arm.com> Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
2018-11-02[COMPMID-386] Github: Support SoftmaxLayer on different number of dimensions?giuros01
Change-Id: I7422b977538ff29930a90f078badc2edee78af93 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/146638 Tested-by: Jenkins <bsgcomp@arm.com> Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
2018-11-02COMPMID-1527 - Implementing ReorgLayer on OpenCLGian Marco Iodice
Also extended tests on NEON Change-Id: Icb0eced534e904ef807972dd3a31988f501bb02e Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/147095 Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com> Tested-by: Jenkins <bsgcomp@arm.com>
2018-11-02COMPMID-1333: Add CLSplitGeorgios Pinitas
Change-Id: I0f31e68dc0a1d6ddec5cd32602b6a3aa62070fe1 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/146778 Tested-by: Jenkins <bsgcomp@arm.com> Reviewed-by: Michele DiGiorgio <michele.digiorgio@arm.com>
2018-11-02COMPMID-1548: NEON FP16 mismatches on CannyEdge and HarrisCorners.Georgios Pinitas
Removes FP16 from HarrisCorners and CannyEdge. Change-Id: I5e4f9205fdbe4de85f04f55ecf1568c837e56cc0 Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/146247 Tested-by: Jenkins <bsgcomp@arm.com> Reviewed-by: Michele DiGiorgio <michele.digiorgio@arm.com>
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