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Change-Id: I02a4ea0270e1776daf8ac1084f28dd054257be4a
Reviewed-on: https://review.mlplatform.org/309
Reviewed-by: Pablo Marquez <pablo.tello@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
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Adds support for Equal,NotEqual,Less,LessEqual,Greater,GreaterEqual
Change-Id: If0cdf4aae7f95c94709b195eee485f6663f45909
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kernels
Change-Id: I98183f95814442b6f3dbb67a1bdae99df05b9b01
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Change-Id: I99e1c3939cfea4b9cb0ddfa313706f31b213ca89
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Change-Id: I69e995973597ba3927d29e4f6ed5438560e53d77
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Change-Id: I5bf5d751ec7c02d96c26a769f49d03ea23a248b7
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The issue was related to CLIm2Col when the number of input channels was less than
the number of elements processed by each thread.
The bug has been fixed in the validate_and_configure_window() function setting the correct number of elements accessed
in the output tensor.
Also fixed an issue GEMM3D when we have a single output channel
Change-Id: I094292d0c7662599c4a4c3916ec5f5821df5faef
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Change-Id: I3c3e96a743614af4c2c2391780d5de2db6191b0f
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/155318
Tested-by: bsgcomp <bsgcomp@arm.com>
Reviewed-by: Anthony Barbier <anthony.barbier@arm.com>
Reviewed-by: Pablo Tello <pablo.tello@arm.com>
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Change-Id: Ibc0b1242804c2fdb183825406e3c78bd0d1d3564
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/154368
Reviewed-by: Pablo Tello <pablo.tello@arm.com>
Tested-by: bsgcomp <bsgcomp@arm.com>
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COMPMID-1651: Fix QASYMM8 CLDeconvolutionLayer
This patch also extends the range of values used for testing Convolution and
Deconvolution to cover quantized [-1.0f, 1.0f].
Change-Id: I8b280669db67bb3ec25bf5d411c8f5954f5b0dab
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/149869
Reviewed-by: Michalis Spyrou <michalis.spyrou@arm.com>
Tested-by: bsgcomp <bsgcomp@arm.com>
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Change-Id: Id331199f569f52a37280a9ada5bf84694580b93c
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/152843
Tested-by: bsgcomp <bsgcomp@arm.com>
Reviewed-by: Michele DiGiorgio <michele.digiorgio@arm.com>
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Change-Id: Ie215daacd10477309dbf8af1bb2b05b7a0a8f203
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/150773
Tested-by: bsgcomp <bsgcomp@arm.com>
Reviewed-by: Isabella Gottardi <isabella.gottardi@arm.com>
Reviewed-by: Pablo Tello <pablo.tello@arm.com>
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Change-Id: Ib14ac821ee5d4aff80bd602cd3e76e7018abb5e6
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/150268
Tested-by: bsgcomp <bsgcomp@arm.com>
Reviewed-by: Isabella Gottardi <isabella.gottardi@arm.com>
Reviewed-by: Michele DiGiorgio <michele.digiorgio@arm.com>
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Change-Id: I9250b2e8020fe87c6ed4de582bbc7460bbd8e94b
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/150287
Tested-by: bsgcomp <bsgcomp@arm.com>
Reviewed-by: Isabella Gottardi <isabella.gottardi@arm.com>
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RSH code only support padding SAME|VALID, this means we cannot
call it with padx=1 for kernel size 5x5. The supporting padding
values are 2 and 0.
Fixed the problem by modifying the test shapes and added some
asserts in NEWinogradConvolutionLayer.
Change-Id: I4b73fa9d13c2200a47002965dc3b471d0f2cafba
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/149883
Tested-by: bsgcomp <bsgcomp@arm.com>
Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
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Change-Id: Iec56c9a96d9736a63f13b65efa33311950f20661
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/148572
Reviewed-by: Anthony Barbier <anthony.barbier@arm.com>
Tested-by: bsgcomp <bsgcomp@arm.com>
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Restore window step across width to 4 for FP32 instead of the whole row
as the kernel code was inconsistent with this decision.
Change-Id: I7c4dcdf960b8cbc970a36fa1df39df2c6f000c86
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/148908
Reviewed-by: Michalis Spyrou <michalis.spyrou@arm.com>
Reviewed-by: Anthony Barbier <anthony.barbier@arm.com>
Tested-by: bsgcomp <bsgcomp@arm.com>
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Change-Id: I1f55508af6f220e5f41df7b56daffb4761ed0591
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/148253
Tested-by: bsgcomp <bsgcomp@arm.com>
Reviewed-by: Isabella Gottardi <isabella.gottardi@arm.com>
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Change-Id: I97c5ccdc33c16eaf0d90ac0a1ec6a066fc550842
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/148320
Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
Tested-by: bsgcomp <bsgcomp@arm.com>
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Change-Id: I6fd83d6584c56a4fd2470948f1987e23237c16d3
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/145577
Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
Tested-by: bsgcomp <bsgcomp@arm.com>
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Change-Id: I332c0703e1399fca0c5b724529b54a28f49c88da
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/146842
Tested-by: Jenkins <bsgcomp@arm.com>
Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
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Also extended tests on NEON
Change-Id: Icb0eced534e904ef807972dd3a31988f501bb02e
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/147095
Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
Tested-by: Jenkins <bsgcomp@arm.com>
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Change-Id: I0f31e68dc0a1d6ddec5cd32602b6a3aa62070fe1
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/146778
Tested-by: Jenkins <bsgcomp@arm.com>
Reviewed-by: Michele DiGiorgio <michele.digiorgio@arm.com>
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Change-Id: Id0754b9e2bc3ef7ff2c4c21c3b89709588c41bd3
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/146637
Tested-by: Jenkins <bsgcomp@arm.com>
Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
Reviewed-by: Giorgio Arena <giorgio.arena@arm.com>
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Change-Id: I0dbc4fd7f640d31daa1970eb3da0e941cb771f2b
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/146145
Tested-by: Jenkins <bsgcomp@arm.com>
Reviewed-by: Giorgio Arena <giorgio.arena@arm.com>
Reviewed-by: Michalis Spyrou <michalis.spyrou@arm.com>
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Change-Id: I12ba4c0c35f086ea3f395970b85af5bf8f94850b
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/145052
Reviewed-by: Pablo Tello <pablo.tello@arm.com>
Tested-by: Jenkins <bsgcomp@arm.com>
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Change-Id: I4342d4240fe5b1aab234c015684a1216c3990a5f
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/145631
Tested-by: Jenkins <bsgcomp@arm.com>
Reviewed-by: Anthony Barbier <anthony.barbier@arm.com>
Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
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Change-Id: I68f65b6dea7889d71b4a10021f59e6f0ab82903b
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/145590
Tested-by: Jenkins <bsgcomp@arm.com>
Reviewed-by: Anthony Barbier <anthony.barbier@arm.com>
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Change-Id: If2b44da31fae528c76be742b4b3a21fb0eb06b49
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/145284
Reviewed-by: Giuseppe Rossini <giuseppe.rossini@arm.com>
Tested-by: Jenkins <bsgcomp@arm.com>
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Change-Id: I428a11ed2242a8fa992a2cebb4168a5e13e2f1e3
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/144877
Reviewed-by: Anthony Barbier <anthony.barbier@arm.com>
Tested-by: Jenkins <bsgcomp@arm.com>
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Change-Id: I04c11c3b8e215e5f116f188453cfa9211277be4a
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/145712
Reviewed-by: Michele DiGiorgio <michele.digiorgio@arm.com>
Tested-by: Jenkins <bsgcomp@arm.com>
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Switches default activation layer to the respective datasets to RELU from LOGISTIC
Change-Id: I09f1ad09922ccdd6e1dc33c28a594f7ffbfe40f4
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/145436
Reviewed-by: Anthony Barbier <anthony.barbier@arm.com>
Tested-by: Jenkins <bsgcomp@arm.com>
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Change-Id: I15c7df21773145b03f42b6f78bd7ad2e5b8a5219
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/144126
Tested-by: Jenkins <bsgcomp@arm.com>
Reviewed-by: Giorgio Arena <giorgio.arena@arm.com>
Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
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Decrease large sizes as it leads to std::bad_alloc for some shapes
Change-Id: I274ceb65411c0ddef87f11135d7fdddfc89c7651
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/143877
Reviewed-by: Michele DiGiorgio <michele.digiorgio@arm.com>
Tested-by: Jenkins <bsgcomp@arm.com>
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Change-Id: I5188a2163e7341f1915d98c21464fea13a9a7faf
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/143330
Tested-by: Jenkins <bsgcomp@arm.com>
Reviewed-by: Anthony Barbier <anthony.barbier@arm.com>
Reviewed-by: Giorgio Arena <giorgio.arena@arm.com>
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Change-Id: I4afb19751520a90fee27fb49b775cd10e92a94f5
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/140476
Reviewed-by: Gian Marco Iodice <gianmarco.iodice@arm.com>
Tested-by: Jenkins <bsgcomp@arm.com>
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This patch includes:
- Im2Col optimizations for NHWC using a new data layout
- Refactoring of CLIm2ColKernel adding validation method and auto-init
- Removed im2col_reduced from CLIm2ColKernel and created a new kernel CLFlattenLayerKernel
Change-Id: I1620640b6796baa268324b33ae92cdd8de53e27c
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/141241
Tested-by: Jenkins <bsgcomp@arm.com>
Reviewed-by: Giorgio Arena <giorgio.arena@arm.com>
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Change-Id: Idde333308db71087ec234b3fd1eb4e36a44db46c
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/143049
Reviewed-by: Gian Marco Iodice <gianmarco.iodice@arm.com>
Tested-by: Jenkins <bsgcomp@arm.com>
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The previous implementation of GEMM3D degradated the performance when the
input had to be reinterpreted as 3D. However if both input and output have to be
reinterpreted as 3D, we can skip the offset calculation for that specific case
and run the multi GEMM approach
Change-Id: I0d5d48add2c6ccdebfbb268ea199dd181101f3aa
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/142872
Tested-by: Jenkins <bsgcomp@arm.com>
Reviewed-by: Anthony Barbier <anthony.barbier@arm.com>
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Skipped im2col in CLGEMMConvolutionLayer for 1x1 convolutions with NHWC data layout
Change-Id: I894e6b952ed8605e8f3ffc0ffc25c24730d4664c
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/141909
Tested-by: Jenkins <bsgcomp@arm.com>
Reviewed-by: Anthony Barbier <anthony.barbier@arm.com>
Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
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Change-Id: Iee92ccce6422368c19173174e6f58e7aada12233
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/140143
Tested-by: Jenkins <bsgcomp@arm.com>
Reviewed-by: Anthony Barbier <anthony.barbier@arm.com>
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Change-Id: Id5e0795238f77c049df9c109dafc5ef878c1897d
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/139234
Tested-by: Jenkins <bsgcomp@arm.com>
Reviewed-by: Giorgio Arena <giorgio.arena@arm.com>
Reviewed-by: Anthony Barbier <anthony.barbier@arm.com>
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OpenCL NHWC
Change-Id: Ia07e0dfcbcd07366c4bcb956e298369fb12a0369
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/138759
Tested-by: Jenkins <bsgcomp@arm.com>
Reviewed-by: Gian Marco Iodice <gianmarco.iodice@arm.com>
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on OpenCL NCHW
Change-Id: Ia293cd89651146a0e27e5f7c74ca9c924807e83c
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/138707
Tested-by: Jenkins <bsgcomp@arm.com>
Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
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Change-Id: Ia8afabb36e644895d321ded51a6a0676347443e1
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/138387
Reviewed-by: Gian Marco Iodice <gianmarco.iodice@arm.com>
Tested-by: Jenkins <bsgcomp@arm.com>
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Change-Id: I574f7945f0be009c638d860028bce8b52b4120fd
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/136484
Tested-by: Jenkins <bsgcomp@arm.com>
Reviewed-by: Gian Marco Iodice <gianmarco.iodice@arm.com>
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on OpenCL
Change-Id: I39667bab49daa4da009694163274a59fd3574c73
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/137595
Tested-by: Jenkins <bsgcomp@arm.com>
Reviewed-by: Giorgio Arena <giorgio.arena@arm.com>
Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
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Change-Id: Id6dece059b521e50ef546c3ee2883acedf8e3b1c
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/134760
Reviewed-by: Gian Marco Iodice <gianmarco.iodice@arm.com>
Tested-by: Jenkins <bsgcomp@arm.com>
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Change-Id: I440df2b2af512fd874651baf28428caa6f8e0b41
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/134433
Tested-by: Jenkins <bsgcomp@arm.com>
Reviewed-by: Anthony Barbier <anthony.barbier@arm.com>
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https://confluence.arm.com/display/MLENG/Winograd+Input+Transform%3A+NCHW+vs+NHWC+on+OpenCL
Change-Id: Iac35a54389266701b7d8f5434a7a37df85b7b187
Reviewed-on: https://eu-gerrit-1.euhpc.arm.com/133315
Reviewed-by: Gian Marco Iodice <gianmarco.iodice@arm.com>
Tested-by: Jenkins <bsgcomp@arm.com>
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