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2021-01-27Add broadcasting support in NEPixelWiseMultiplicationKernel for FP16Pablo Marquez Tello
* FP16 kernel missed the broadcast path * Resolves: COMPMID-4113 Change-Id: I8fd79030f2ae9c268dfeed672a57c6d0f64f58f4 Signed-off-by: Pablo Marquez Tello <pablo.tello@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4926 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Sheri Zhang <sheri.zhang@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
2021-01-27Force early exit of threads when output_height=1 and channels=1 in assembly ↵Michele Di Giorgio
pooling Resolves COMPMID-4156, COMPMID-4125 Change-Id: I408e51e9759448e6190490975ccab2c1bc07a813 Signed-off-by: Michele Di Giorgio <michele.digiorgio@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4927 Reviewed-by: TeresaARM <teresa.charlinreyes@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com>
2021-01-27Make Gpu Elementwise Operations kernels and functions state-lessMichele Di Giorgio
Partially resolves COMPMID-4004 Change-Id: Ie99b6c676af5be4c2a67affc06fec378f3dff8ec Signed-off-by: Michele Di Giorgio <michele.digiorgio@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4918 Reviewed-by: Gian Marco Iodice <gianmarco.iodice@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com>
2021-01-27Fix NEON/CL CustomConvolution failuresManuel Bottini
Properly handle UNDEFINED border mode as done in the reference Change-Id: I23b117be3ee5cd0e566f6161681d38493627fc9b Resolves: COMPMID-4133 Signed-off-by: Manuel Bottini <manuel.bottini@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4919 Reviewed-by: Michele Di Giorgio <michele.digiorgio@arm.com> Reviewed-by: Giorgio Arena <giorgio.arena@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com>
2021-01-26Make CLArithmeticSubtraction kernel and function state-lessMichele Di Giorgio
Resolves COMPMID-4008 Change-Id: Ic5f40610e771f31e6d301dfae976c81e9c79fa8b Signed-off-by: Michele Di Giorgio <michele.digiorgio@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4917 Reviewed-by: Michalis Spyrou <michalis.spyrou@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com>
2021-01-26Remove iostream header file when not neededGian Marco Iodice
Change-Id: Ic6b3e94fc252c2d6fe17e6bc32900d11c68ae399 Signed-off-by: Gian Marco Iodice <gianmarco.iodice@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4916 Reviewed-by: Michele Di Giorgio <michele.digiorgio@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com>
2021-01-26Make CLArithmeticAddition kernel and function state-lessMichele Di Giorgio
Resolves COMPMID-4006 Change-Id: Iddc32b0b250142aac9a4a7b9dc0eef462d196025 Signed-off-by: Michele Di Giorgio <michele.digiorgio@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4913 Tested-by: Arm Jenkins <bsgcomp@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Sang-Hoon Park <sang-hoon.park@arm.com>
2021-01-26Rename functions/classes for elementwise unary operationsSang-Hoon Park
* Create CpuElementwiseUnary operator * Rename kernel classes * Make the kernels stateless Partially implements: COMPMID-4003 Change-Id: Ie0440cd01d4924847d6991b4df7ccaf311439297 Signed-off-by: Sang-Hoon Park <sang-hoon.park@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4912 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Michele Di Giorgio <michele.digiorgio@arm.com> Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
2021-01-25CTS Failures in Android CpuAcc in AddTeresa Charlin
* Fusing the activation into Addition is not supported in CpuAcc. Armnn uses this validate function to decide if fusion is supported. Resolves COMPMID-4121 Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com> Change-Id: I78cec326057eada32c2bf7d0e8d64a4af5854cd9 Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4911 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Sang-Hoon Park <sang-hoon.park@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
2021-01-22Rename functions/classes for elementwise operationsSang-Hoon Park
* Create CpuElementwise operator * Rename kernel classes * Make the kernels stateless Partially implements: COMPMID-4003 Change-Id: I4ef9c61a3acc3ac5dbe46463d62dcb88a5face21 Signed-off-by: Sang-Hoon Park <sang-hoon.park@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4881 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Sheri Zhang <sheri.zhang@arm.com> Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
2021-01-22Fix Scale CTS failuresSheri Zhang
- Move back to use template for NEON implementaion to be more mantainable Resolves: COMPMID-4112 Signed-off-by: Sheri Zhang <sheri.zhang@arm.com> Change-Id: I27b60674d743e3d7ec5bb065898cb75cb40bcf0e Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4900 Tested-by: Arm Jenkins <bsgcomp@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Giorgio Arena <giorgio.arena@arm.com> Reviewed-by: Manuel Bottini <manuel.bottini@arm.com>
2021-01-22Check for unsupported armv7a optimized pooling kernelsMichele Di Giorgio
Resolves COMPMID-4136 Change-Id: I3c1f9e615cb2d2c48464ac5b7dbf0a26dc435889 Signed-off-by: Michele Di Giorgio <michele.digiorgio@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4906 Reviewed-by: Giorgio Arena <giorgio.arena@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com>
2021-01-22Fixed segfault NEDeconvLayer due to overflow.Pablo Marquez Tello
* The CTS test TestRandomGraph/RandomGraphTest#SmallGraph_TENSOR_FLOAT16_Rank4/43 segfaulted when running on CpuAcc + 8-2a. * Added a guard against overflow in DeconvLayer::validate * Resolves: COMPMID-4115 Change-Id: I6687b67dbde3921a2795224e8107a9add9d358ff Signed-off-by: Pablo Marquez Tello <pablo.tello@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4890 Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Giorgio Arena <giorgio.arena@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com>
2021-01-22Update Fp16 heuristic for Mali-G76 and Mali-G77Gian Marco Iodice
Change-Id: I199c10574d0d84737adbc73829f60a220c7088b4 Signed-off-by: Gian Marco Iodice <gianmarco.iodice@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4897 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Giorgio Arena <giorgio.arena@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
2021-01-22CTS failures in Android R and Q in GpuAcc in ArgMinMaxGiorgio Arena
- Fix ambiguosity with select in OpenCL - Define a new macro for signed integer data type of the same input data type's size. This is needed because some ops (e.g. logical operators) in OpenCL work in this way Resolves: COMPMID-4116, COMPMID-4110 Signed-off-by: Giorgio Arena <giorgio.arena@arm.com> Change-Id: I560eda63fce24abd03d061f78f2f2ca951053fd0 Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4898 Reviewed-by: Michele Di Giorgio <michele.digiorgio@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
2021-01-21Add window parameter to schedulerSang-Hoon Park
To support window configured outside of kernels, the parameter is added to scheduler. The existing operators pass window from kernels to preserve the current behavior. Partial Implements: COMPMID-4003 Change-Id: I4514e12fb5b0c60e4adfc1a51e53a8a5de356a0d Signed-off-by: Sang-Hoon Park <sang-hoon.park@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4892 Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
2021-01-21Make CLFloor and CLActivation kernels and functions state-lessGeorgios Pinitas
Signed-off-by: Georgios Pinitas <georgios.pinitas@arm.com> Change-Id: Icbe4e6a7c6732a59bdda0136af44c4852452dfd1 Signed-off-by: Michele Di Giorgio <michele.digiorgio@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4891 Tested-by: Arm Jenkins <bsgcomp@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
2021-01-21Check for FP16 CPU support in optimized pooling kernelsMichele Di Giorgio
Resolves COMPMID-4123 Change-Id: I0c3c852c9d887cffc0d2e65142f75204ab5e3ff4 Signed-off-by: Michele Di Giorgio <michele.digiorgio@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4894 Reviewed-by: TeresaARM <teresa.charlinreyes@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com>
2021-01-21Fix softmax SVE compiling failure without SVE2 supportSheri Zhang
Resolves partially: COMPMID-3891 Signed-off-by: Sheri Zhang <sheri.zhang@arm.com> Change-Id: I1f08746c44146f4d6ad3e48bcc3d1d2470fd156e Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4893 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Michele Di Giorgio <michele.digiorgio@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
2021-01-21Make Sub kernel and operator statelessSheri Zhang
- Rename NEArithmeticSubstractionKernel to CpuSubKernel and move files appropriately - Add CpuSub under src/runtime/cpu/operators Partially resolves: COMPMID-4007 Signed-off-by: Sheri Zhang <sheri.zhang@arm.com> Change-Id: I4754ca9101d82dccacca744be6d069764a9c6b55 Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4868 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Pablo Marquez Tello <pablo.tello@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
2021-01-20Integrate improved pooling layer on NEONMichele Di Giorgio
Resolves COMPMID-4035 Change-Id: I559f8c4208fba9193dfe5012f03ddaf26c746215 Signed-off-by: Michele Di Giorgio <michele.digiorgio@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4855 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
2021-01-20Make all CL Concatenate kernels and functions state-lessMichele Di Giorgio
Resolves COMPMID-3995 Change-Id: I84172bed20924f1d9ae3b4d14d7b321e9494296e Signed-off-by: Michele Di Giorgio <michele.digiorgio@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4887 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
2021-01-20Direct convolution fix for quantized data typeGian Marco Iodice
- Pass the quantized zero value to the opencl kernel Fixes COMPMID-3908 Change-Id: I6454c2e49f5b150a99178f2d72e0afa0a2990b54 Signed-off-by: Gian Marco Iodice <gianmarco.iodice@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4884 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Giorgio Arena <giorgio.arena@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
2021-01-19Fix doxygen references to new kernelsMichele Di Giorgio
Resolves COMPMID-4117 Change-Id: I9945a92402e34b9cfe0ba9ef2a961b168bf62721 Signed-off-by: Michele Di Giorgio <michele.digiorgio@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4883 Reviewed-by: Pablo Marquez Tello <pablo.tello@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com>
2021-01-19Make memset/copy functions state-lessGeorgios Pinitas
Port following functions: - NECopy - NEFill - NEPermute - NEReshapeLayer Signed-off-by: Georgios Pinitas <georgios.pinitas@arm.com> Change-Id: I75f3f837012abab79c7dde9a20a34f64f75571d8 Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4800 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Michele Di Giorgio <michele.digiorgio@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
2021-01-19Remove padding from direct convolution - OpenCLGian Marco Iodice
- Refactor direct convolution for NHWC - Remove old kernels for NHWC - Change the heuristic in CLConvolutionLayer.cpp. The new direct convolution implementation is faster than FFT Resolves COMPMID-3908 Change-Id: Iee15ce7b04e21847b6eaae5c6d3c1b18180e7efc Signed-off-by: Gian Marco Iodice <gianmarco.iodice@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4876 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
2021-01-19Make Add kernel and operator statelessSheri Zhang
- Rename NEArithmeticAdditionKernel to CpuAddKernel Cpu and move files appropriately - Add CpuAdd under src/runtime/cpu/operators Partially resolves: COMPMID-4005 Signed-off-by: Sheri Zhang <sheri.zhang@arm.com> Change-Id: I1d8d406df9773fea198899f50327407d7125c38d Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4867 Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Gian Marco Iodice <gianmarco.iodice@arm.com> Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com>
2021-01-19LOGICAL_NOT failTeresa Charlin
Explicitly cast scalar to vector for LOGICAL_NOT Related with COMPUTE-12536 and IVGCVSW-5617 Change-Id: I03accce000f8889fc4fb88c42c3c87845acb4f42 Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4874 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Giorgio Arena <giorgio.arena@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
2021-01-18Make Concatenate kernels and operator statelessGeorgios Pinitas
- Rename all concatenate kernels to use the Cpu prefix and move appropriately Change-Id: If647173e84969936ebd211d4d5ae6d1e73150bdc Signed-off-by: Georgios Pinitas <georgios.pinitas@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4799 Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Sang-Hoon Park <sang-hoon.park@arm.com> Reviewed-by: Giorgio Arena <giorgio.arena@arm.com>
2021-01-18Add SVE for SoftmaxMichalis Spyrou
Implements COMPMID-3875 Change-Id: I38991eed3f4966db125862af066bfedff5994a25 Signed-off-by: Michalis Spyrou <michalis.spyrou@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4854 Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com>
2021-01-18Decouple data types of elementwise kernelsSang-Hoon Park
Partially implements: COMPMID-4003 Change-Id: Ie51e43e24fb9a6b5b96d13cdc3d72fbda027a68b Signed-off-by: Sang-Hoon Park <sang-hoon.park@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4873 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
2021-01-18Cycle estimate-based kernel selection for dot product quantized s8/u8 kernelsGeorgios Pinitas
Resolves: COMPMID-3990 Signed-off-by: Georgios Pinitas <georgios.pinitas@arm.com> Change-Id: If840c79209940535450f4ea1cbf6b0ec646a168e Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4866 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Michele Di Giorgio <michele.digiorgio@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
2021-01-18Add explicit cast to fix gcc10 build errorSang-Hoon Park
With v8.6 arch flags, gcc10 fails to build due to type of the argument doesn't match to its template argument. This is fixed by adding explicit casting. Resolves: COMPMID-4096 Change-Id: Ifc86c4b9afeb43594ea3b758de417dbdc1394880 Signed-off-by: Sang-Hoon Park <sang-hoon.park@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4872 Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com>
2021-01-17Add missing std headersSang-Hoon Park
Missing std headers - limits, algorithm, cstddef - are added where they have to be. Partially implements: COMPMID-3808 Change-Id: Ia31f75370f8440dcb753e5ac6eb2eac18e9c63f3 Signed-off-by: Sang-Hoon Park <sang-hoon.park@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4861 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
2021-01-15Introduce threshold for NEON floating-point SOFT_RELU activationMichele Di Giorgio
Large inputs produce incorrect results of Soft ReLu activations where the output saturates at around 88.72283. This is due to the approximation algorithm used for the logarithm. For this reason, we introduce a threshold such that with x > threshold, Soft ReLu activation will return the value x itself. SVE does not seem to suffer from the same issue, hence NEON kernels only are modified. Resolves COMPMID-4091 Change-Id: I357883deed4e4aba571a1d3163267772096c0412 Signed-off-by: Michele Di Giorgio <michele.digiorgio@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4865 Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Giorgio Arena <giorgio.arena@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com>
2021-01-15Release winograd transformed weights if not needed on NEONGeorgios Pinitas
GEMM function used within NEWinogradLayer re-transforms the weights after the original winograd transformation leading to double allocation of the weights. Release appropriately and retain only one copy of the weights, the last transformed one. Signed-off-by: Georgios Pinitas <georgios.pinitas@arm.com> Change-Id: I60459bfe370bff453150dfe9536cd9e7a5b56def Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4862 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Michele Di Giorgio <michele.digiorgio@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
2021-01-15[Nightly Failure] Fix DeconvolutionLayer OpenCL kernel compilationGiorgio Arena
- Add case for VEC_SIZE == 3 in the TRANSPOSED_U macro Resolves: COMPMID-4094 Change-Id: I31870e589e66d895f9bf65c87aa04f32038365c0 Signed-off-by: Giorgio Arena <giorgio.arena@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4864 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Georgios Pinitas <georgios.pinitas@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
2021-01-14Remove OpenCL padding CLTransposeKernelManuel Bottini
By handling more general NxM blocks (where M and N can be 1,2,4,8,16) instead of only 4x4, 8x8, 16x16 and managing corner left values with partial stores Resolves: COMPMID-3923 Change-Id: I49b1a560c8325e00e061bd04edcf55034d04dcd8 Signed-off-by: Manuel Bottini <manuel.bottini@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4780 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Michele Di Giorgio <michele.digiorgio@arm.com> Reviewed-by: Giorgio Arena <giorgio.arena@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
2021-01-13Add support for macOSGeorgios Pinitas
* Add 'macos' as an additional OS build option * Guard unsupported paths like thread scheduling control and hwcaps checking with the __APPLE__ macro * Map linker options to respective Mach-O linker options Change-Id: I67bd9fa3c20831427b218ca7d3b4b9d454ab4fec Signed-off-by: Georgios Pinitas <georgios.pinitas@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4788 Reviewed-by: Sang-Hoon Park <sang-hoon.park@arm.com> Reviewed-by: Giorgio Arena <giorgio.arena@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com>
2021-01-13Remove padding for CLArgMinMaxLayerKernel and fix CLRange mismatchesGiorgio Arena
- Cast the destination pointer to (__global DATA_TYPE*) when VEC_SIZE == 1 in range.cl Resolves: COMPMID-3906, COMPMID-4093 Signed-off-by: Giorgio Arena <giorgio.arena@arm.com> Change-Id: Ic0a334d98785ea434ed81f89dbe34e7674991f82 Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4792 Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Michele Di Giorgio <michele.digiorgio@arm.com>
2021-01-13Add SVE2 kernels for quantized elementwise operationsSang-Hoon Park
Partially implements: COMPMID-3872 Change-Id: I76d81f2b8aa343f9d830298bc931e410c7c901bc Signed-off-by: Sang-Hoon Park <sang-hoon.park@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4842 Tested-by: Arm Jenkins <bsgcomp@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Michele Di Giorgio <michele.digiorgio@arm.com>
2021-01-13[Nightly Failure] Fix CLDepthwiseConvolutionLayer 3x3 QASYMM8 on MidgardGiorgio Arena
- Add checks for pad top/bottom bigger than (kernel size / 2) Resolves: COMPMID-4088 Signed-off-by: Giorgio Arena <giorgio.arena@arm.com> Change-Id: Ifc5ea2154847d447bc5643d7607e7256aeddfcbf Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4840 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Michele Di Giorgio <michele.digiorgio@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
2021-01-13Remove OpenCL padding CLFloorKernelManuel Bottini
Use of proper vector size with boundary checking loads and stores Resolves: COMPMID-3922 Change-Id: Ib631d499603b860fcfdbe3da903b866a125359a8 Signed-off-by: Manuel Bottini <manuel.bottini@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4789 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Michele Di Giorgio <michele.digiorgio@arm.com> Reviewed-by: Gian Marco Iodice <gianmarco.iodice@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
2021-01-12Add SVE support for non-quantized elementwise operationsSang-Hoon Park
SVE kernels are added to all previously supported arithmetic and comparison operations with exception of S16 arithmetic operations due to complexity of widening and narrowing of integer vectors. Partially implements: COMPMID-3872 Change-Id: Ic433eb7227dfcfd0d1429f18acebec2d934ca8bd Signed-off-by: Sang-Hoon Park <sang-hoon.park@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4778 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Michele Di Giorgio <michele.digiorgio@arm.com> Reviewed-by: Michalis Spyrou <michalis.spyrou@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
2021-01-12Add SVE support and decouple data type for NEScaleKernelSheri Zhang
- Decouple data type for NEON NHWC implementation, supported data types are: fp32, fp16, u8, s16, qasymm8, qasymm8_signed. - Add SVE support for NHWC and all six data types showed above. Resolves: COMPMID-3873 Change-Id: I097de119f4667b28b025a78cadf7185afa5f15f0 Signed-off-by: Sheri Zhang <sheri.zhang@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4766 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Pablo Marquez Tello <pablo.tello@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
2021-01-12Add meta-data to express dynamic shapes in ITensorInfoGeorgios Pinitas
Add `get_tensor_shape_state` and `set_tensor_shape_state` to inject shape dynamism. The state is represented by an array of integers which index maps to the respective shape dimension index. If -1 is passed as a dimension state then the corresponding dimension is dynamic. Signed-off-by: Georgios Pinitas <georgios.pinitas@arm.com> Change-Id: I3a8a5ad109b90d4df8545b460a9f8dfcc13dfa0f Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4784 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Michele Di Giorgio <michele.digiorgio@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
2021-01-11Make CpuActivation statelessGeorgios Pinitas
- Rename NEActivationLayer to CpuActivation - Add member function to generate execution window Partially Resolves: COMPMID-3992 Signed-off-by: Georgios Pinitas <georgios.pinitas@arm.com> Change-Id: I4e1ae15cf456b860d3080b2fedc4dbcce7d1bb79 Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4791 Tested-by: Arm Jenkins <bsgcomp@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Michalis Spyrou <michalis.spyrou@arm.com>
2021-01-11Remove OpenCL padding: CLROIAlignLayerKernelManuel Bottini
Add padding checks in configure Resolves: COMPMID-3914 Change-Id: Ia5be67283402d8811ceb3007be3a666ab502d775 Signed-off-by: Manuel Bottini <manuel.bottini@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4787 Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Michele Di Giorgio <michele.digiorgio@arm.com> Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
2021-01-08Make CpuFloorKernel kernel statelessGeorgios Pinitas
- Rename NEFloorKernel to CpuFloorKernel to accomodate new ISA implementations - Remove state and instead pass tensors to operate during run - Add member function to generate an execution window given an input and output tensor description Signed-off-by: Georgios Pinitas <georgios.pinitas@arm.com> Change-Id: I9240b8ec534589c0f15c354f771f1ac5d7010c3b Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4773 Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Michalis Spyrou <michalis.spyrou@arm.com>
2021-01-08[Nightly Failure] Fix OpenCL kernel compilation for CLRangeGiorgio Arena
- Change raw pointers in OpenCL kernel to __global uchar* Resolves: COMPMID-4079 Change-Id: Ieeb99ced565bef59583216fd274958b29c7b2758 Signed-off-by: Giorgio Arena <giorgio.arena@arm.com> Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/4774 Comments-Addressed: Arm Jenkins <bsgcomp@arm.com> Reviewed-by: Pablo Marquez Tello <pablo.tello@arm.com> Tested-by: Arm Jenkins <bsgcomp@arm.com>
generated by cgit v1.2.1 (git 2.23.0) at 2024-06-01 19:10:23 +0000