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The SVE implementation of ElementwiseDiv does not require s32
specialization and can use generic implementation.
Resolves: COMPMID-7159
Change-Id: I4a36831dc714f2d26b83f58b3e56d0d4038e0113
Signed-off-by: Yevgen Pronenko <yevgen.pronenko@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/11776
Benchmark: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Gunes Bayir <gunes.bayir@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
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Resolves COMPMID-7172
Change-Id: I0acac5e4cb24056a88b4356d9239b33721d65d13
Signed-off-by: Michael Tyler <michael.tyler@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/11762
Benchmark: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Suhail M <MohammedSuhail.Munshi@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
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Partially Resolves: COMPMID-6926
Signed-off-by: Ramy Elgammal <ramy.elgammal@arm.com>
Change-Id: I9d13c4319042f639a8c5be385b63857d77fefff2
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/11768
Reviewed-by: Michael Tyler <michael.tyler@arm.com>
Reviewed-by: Gunes Bayir <gunes.bayir@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
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This wrapper allows us to utilize the functionality of CpuGemm
without directly exposing the source code.
Change-Id: I408630f52acd610c912e5c5fa02bfee5f884471e
Signed-off-by: Ryo Suzuki <ryo.suzuki@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/11607
Reviewed-by: Gunes Bayir <gunes.bayir@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
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- Add support for mixed sign quantized convolution.
- Add support for mixed sign dequantized GEMM.
- Add SME FP16 GEMV kernel.
- Change SME vector length function to use RDSVL instead of static variable.
- Add GEMM dilation support internally (not exposed yet).
- Remove unused "get_default_activation_values" functions.
- Add SVE fixed format interleaved BF16 DOT kernel.
- Updates and optimizations to assembly kernels.
Resolves COMPMID-6926
Change-Id: I227f502502611d4cc4111c89e30c53ce94079544
Signed-off-by: Michael Tyler <michael.tyler@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/11570
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Gunes Bayir <gunes.bayir@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
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* Non-optimized FP16 GeMM kernel has out-of-bound memory write.
- This doesn't affect optimized assembly kernels.
- This bug writes 1 extra FP16 value to the destination tensor.
Resolves: COMPMID-6904
Signed-off-by: Viet-Hoa Do <viet-hoa.do@arm.com>
Change-Id: I26b8ebcd15680b25c97c4b7e331996f397692447
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/11706
Reviewed-by: Jakub Sujak <jakub.sujak@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
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* Enable FP16 kernels in
NEROIAlignLayerKernel
NEComputeAllAnchorsKernel
NEBoundingBoxTransformKernel
NEInstanceNormalizationLayerKernel
NEBatchNormalizationLayerKernel
* The FP16 kernels were disabled due to the use of __ARM_FEATURE_FP16_VECTOR_ARITHMETIC
* Resolves MLCE-1305
Change-Id: Ib8dd3cad631667018b25db4ba76007dbfb4bf5a5
Signed-off-by: Pablo Marquez Tello <pablo.tello@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/11677
Reviewed-by: Viet-Hoa Do <viet-hoa.do@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
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* The softmax kernel is using SME2 instructions on non SME2 devices
* Resolves MLCE-1304
Change-Id: I9d7d94443e7c9df4e7c1a05eeef6838f530b357b
Signed-off-by: Pablo Marquez Tello <pablo.tello@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/11676
Benchmark: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Viet-Hoa Do <viet-hoa.do@arm.com>
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Resolves ONCPUML-1648 and ONCPUML-1539
Signed-off-by: Hamza Butt <hamza.butt@arm.com>
Change-Id: Ib70a4f8cef61c2979dfd265c0755c541930ee563
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/11575
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Pablo Marquez Tello <pablo.tello@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
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Resolves: COMPMID-6901
Change-Id: Idcd3f5f5d90f4073aaf116c0586e46013fbd64f7
Signed-off-by: Gunes Bayir <gunes.bayir@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/11605
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Viet-Hoa Do <viet-hoa.do@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
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1. Remove unnecessary restriction to the exclusion only running on systems with little mid and big cores.
2. Allow override of the suggested number of threads in case the user sets the number of threads to a lower value.
Resolves [COMPMID-7014]
Signed-off-by: Omar Al Khatib <omar.alkhatib@arm.com>
Change-Id: Ifb76ef4454f38dd2e3e5781b5dfea07c044aeb74
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/11604
Benchmark: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Pablo Marquez Tello <pablo.tello@arm.com>
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On systems with BIG/MID/LITTLE cores, we need to exclude the LITTLE cores.
This is make changes to CPUInfo to detect number of LITTLE cores and set the num_threads to TOTAL_CORES-NUM_LITTLE cores
Resolves [COMPMID-7014]
Signed-off-by: Omar Al Khatib <omar.alkhatib@arm.com>
Change-Id: I3e1772e5b64d1c45304860be43233b7e5dd8dba1
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/11565
Reviewed-by: Pablo Marquez Tello <pablo.tello@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
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Resolves: COMPMID-7063
Signed-off-by: Ramy Elgammal <ramy.elgammal@arm.com>
Change-Id: Ife4d9f0b2644a649da45544b8789c51c15c9aebf
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/11574
Reviewed-by: Pablo Marquez Tello <pablo.tello@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
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Signed-off-by: Ramy Elgammal <ramy.elgammal@arm.com>
COMPMID-7058
Change-Id: I9c6d18a8fddaf335bcd1e8dd562fa3838c1ca4b2
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/11561
Benchmark: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Pablo Marquez Tello <pablo.tello@arm.com>
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* Resolves COMPMID-7059
Change-Id: If77e579199720b7234298d2dc844d88c05989bf9
Signed-off-by: Pablo Marquez Tello <pablo.tello@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/11556
Benchmark: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Viet-Hoa Do <viet-hoa.do@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
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Resolves: COMPMID-7054
Signed-off-by: Ramy Elgammal <ramy.elgammal@arm.com>
Change-Id: I68d125b81ad7f74b2594ccda8d6ec08beef1ebd7
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/11555
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Pablo Marquez Tello <pablo.tello@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
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* Resolves MLCE-1285
Change-Id: I22a37972aefe1c0f04accbc798baa18358ed8959
Signed-off-by: Pablo Marquez Tello <pablo.tello@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/11552
Reviewed-by: Viet-Hoa Do <viet-hoa.do@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
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- Enable FP16 code when building multi_isa for armv8a architecture in
order to run on higher architectures e.g. 8.2, 8.6.
- When running this build on v8 the validation will stop it flagging
that the arch does not support FP16.
Resolves: COMPMID-7013
Signed-off-by: Ramy Elgammal <ramy.elgammal@arm.com>
Change-Id: I0d445e2fade31c1156d7a6e142edf2a7f84d3622
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/11544
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Pablo Marquez Tello <pablo.tello@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
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Resolves: COMPMID-7021
Signed-off-by: Viet-Hoa Do <viet-hoa.do@arm.com>
Change-Id: I809bc6ecd2845dfe6ee5de20a902aea4d07f15a5
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/11540
Benchmark: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Ramy Elgammal <ramy.elgammal@arm.com>
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- Padding with batched scalar cases is unsupported, adds checks.
- Adds tests for scalar cases, without padding.
Resolves: [COMPMID-7015]
Change-Id: Ib9cf5db990420ff4b442d003ef9424e365bee86d
Signed-off-by: Mohammed Suhail Munshi <MohammedSuhail.Munshi@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/11536
Reviewed-by: Gunes Bayir <gunes.bayir@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
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In NEQuantizeLayer for QASYMM8_SIGNED, the rounding was inconsistent
between the unrolled loop and the leftover loop, which meant identical
values (e.g. 0.5) at different indices of a Tensor could round to
different values (0 or 1 in this case). We have changed vcvtaq to
vcvtnq to round to the nearest, with ties to even. This matches the
default fegetround setting, so it is a sensible default.
Relates-to: COMPMID-6994
Signed-off-by: Jonathan Deakin <jonathan.deakin@arm.com>
Change-Id: I8e7ecb1b8dbdd3e887697a92046af99ed33fc78f
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/11532
Reviewed-by: Gunes Bayir <gunes.bayir@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
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Resolves: [COMPMID-6917]
Change-Id: Id8b96efd29f6c61dd43a371341c6e1fe087953e9
Signed-off-by: Omar Al Khatib <omar.alkhatib@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/11509
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Gunes Bayir <gunes.bayir@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
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Resolves: [COMPMID-6897]
Signed-off-by: Mohammed Suhail Munshi <MohammedSuhail.Munshi@arm.com>
Change-Id: I70b1c3c5f0de8484fcb6c3b0cc0d0d8c059b0f58
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/11525
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Gunes Bayir <gunes.bayir@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
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SVE BF16 kernels need to check for svebf16(), not just bf16().
Change-Id: I89494aac40166eba59719bed9822194a48ac282d
Signed-off-by: David Mansell <David.Mansell@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/11520
Reviewed-by: Pablo Marquez Tello <pablo.tello@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
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As the reorder kernel is called with WeightFormat OHWIo8
for hardware that does not support it e.g. vector length 128,
adapt the test case and add kernel implementation for this edge case.
This fixes the mismatching values that appear when OHWIo8 fixture
was run with 128 vector length.
Resolves: ONCPUML-1523, COMPMID-6281
Signed-off-by: Radu Salavat <radu.salavat@arm.com>
Change-Id: Iaa1a3b486d1725a2d6031051aa544082c1bbe913
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/11421
Reviewed-by: Gunes Bayir <gunes.bayir@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
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Change-Id: I69aa973e61df950060807a31230a1edd91add498
Signed-off-by: David Mansell <David.Mansell@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/11514
Reviewed-by: Gunes Bayir <gunes.bayir@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
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Resolves: COMPMID-6899
Change-Id: I3743f2c9e5c21e1ec9f4c81d08c148666afad33a
Signed-off-by: Gunes Bayir <gunes.bayir@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/11505
Benchmark: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Jakub Sujak <jakub.sujak@arm.com>
Reviewed-by: Sang Won Ha <sangwon.ha@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
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accumulated
Similar to https://review.mlplatform.org/c/ml/ComputeLibrary/+/11500, s8f32 kernels do not support accumulate mode. This patch modifies the kernel selection and also adds more tests to stress these test cases better.
Partially Resolves: COMPMID-6995
Change-Id: I40e19446c012eb7334e4511e254cce0d635aa234
Signed-off-by: Gunes Bayir <gunes.bayir@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/11503
Benchmark: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Radu Salavat <radu.salavat@arm.com>
Reviewed-by: Jakub Sujak <jakub.sujak@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
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SME2 kernels use a different accumulation buffer and destination tensor is not copied to this buffer as initial value, thus causing mismatches. This patch modifies the kernel selection algorithm such that it does not select SME2 kernels if accumulation is required.
Resolves: COMPMID-6995
Change-Id: I82da3cba41729f938a046f26b41b63ff5716c02d
Signed-off-by: Gunes Bayir <gunes.bayir@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/11500
Reviewed-by: Jakub Sujak <jakub.sujak@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
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Resolves: COMPMID-6894, COMPMID-6896
Change-Id: I9d29fd3701a7e0f28d83f81a6c42a7234c2587c3
Signed-off-by: Gunes Bayir <gunes.bayir@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/11477
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Ramy Elgammal <ramy.elgammal@arm.com>
Dynamic-Fusion: Ramy Elgammal <ramy.elgammal@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
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* All per-channel requantizing hybrid assembly kernels require
these buffers to be padded.
* Resolves MLCE-1255
Change-Id: I892b8ee9b31e079189ec72f3fc6da4ce5efda974
Signed-off-by: Pablo Marquez Tello <pablo.tello@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/11491
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Gunes Bayir <gunes.bayir@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
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Resolves: [COMPMID-6891, COMPMID-6892]
Change-Id: I5b094fff1bff4c4c59cc44f7d6beab0e40133d8e
Signed-off-by: Mohammed Suhail Munshi <MohammedSuhail.Munshi@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/11394
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Gunes Bayir <gunes.bayir@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
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Signed-off-by: Sunita Nadampalli <nadampal@amazon.com>
Change-Id: I21eca31d97d6e2ca8279adb9db65f11540e72689
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/11396
Benchmark: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Pablo Marquez Tello <pablo.tello@arm.com>
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- Add support for QASYMM_SIGNED*QASYMM8_SIGNED->F32 in
CpuGemmLowpMatrixMultiplyCore
- Add s8f32 kernel using existing s8->s32 kernels with a new
DequantizeFloat OutputStage, the structure is similar to Requantize32
but the opposite way around.
- Add SME s8f32 kernels with integrated support for DequantizeFloat.
- Add scale to CpuGemmLowpOffsetContributionKernel.
- Add virtual dequantize scale to gemm_common, only implemented for
gemm_interleaved.
- Update year to 2024 in generate_build_files.
- Add dynamic flag to QuantizationInfo which signals to operators that
it can change after configuration
- Add support for dynamic quantization in NEGEMMLowpMatrixMultiplyCore
- Add dynamic quantization fixture by extending
GEMMLowpGenericMatrixMultiplyCoreValidationFixture
- Add GEMMLowpDequantizedMatrixMultiplyValidationFixture
- Store k (number of cols of A) rather than k_offset in the offset
contribution kernels so that we can recompute it when the other
offsets change
relates to: ONCPUML-1444 MLINFSW-439
Co-authored-by: Milos Puzovic <Milos.Puzovic@arm.com>
Co-authored-by: David Mansell <David.Mansell@arm.com>
Change-Id: I58a3acf2c09289a303e52eea6b336a696a5bc8da
Signed-off-by: Jonathan Deakin <jonathan.deakin@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/11022
Reviewed-by: Gunes Bayir <gunes.bayir@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
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aarch32. This patch guards the relevant tests.
Partially Resolves: ONCPUML-1442
Signed-off-by: Radu Salavat <radu.salavat@arm.com>
Change-Id: I8eed80db4b522185c3c50c13f0f701aa48961057
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/11410
Reviewed-by: Gunes Bayir <gunes.bayir@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
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In addition to the softmax kernel, this patch fixes minor issues in the fp32 implementation.
Resolves: COMPMID-6920
Change-Id: Ibbd9f0af5f2a93fba0e92d72ba437279c34149d3
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/11402
Benchmark: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Viet-Hoa Do <viet-hoa.do@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
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Instead of dispatching the sum postop for GEMM kernels to a
separate kernel + add, that requires an extra destination sized
allocation, plus 3 extra load/stores per element,
just do it in the GEMM kernel.
Resolves: ONCPUML-1442
Signed-off-by: Radu Salavat <radu.salavat@arm.com>
Co-authored-by: Milos Puzovic <milos.puzovic@arm.com>
Change-Id: I7a1f2da3300875fa1ac88b705a34390969518077
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/11298
Reviewed-by: Gunes Bayir <gunes.bayir@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
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* This fixes the GCC 12 compiler error:
Assuming signed overflow does not occur when simplifying
conditional to constant [-Werror=strict-overflow]
* Resolves ARMCL-1130
Change-Id: I01e10ebca2dbfcd166c1f4128921953e31016038
Signed-off-by: Pablo Marquez Tello <pablo.tello@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/11381
Reviewed-by: Gunes Bayir <gunes.bayir@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
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Signed-off-by: Milos Puzovic <milos.puzovic@arm.com>
Change-Id: I362f3f4a42e218424fca917bed22003ec9d5609c
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/11363
Benchmark: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Gunes Bayir <gunes.bayir@arm.com>
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Signed-off-by: Viet-Hoa Do <viet-hoa.do@arm.com>
Change-Id: I8a63610cfb9ccff89dec6045d023439fc19b027a
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/11357
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Gunes Bayir <gunes.bayir@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
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of 6 for accumulation and updated heuristics
Change-Id: Ib52ea6825e164f4a8b8422eab7991b50af0b0d7c
Signed-off-by: Milos Puzovic <milos.puzovic@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/11354
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Jakub Sujak <jakub.sujak@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
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Resolves: [COMPMID-6890]
Change-Id: Ie4a8db24fc6387afa9ddf42b3607e040cdf8df67
Signed-off-by: Mohammed Suhail Munshi <MohammedSuhail.Munshi@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/11339
Reviewed-by: Gunes Bayir <gunes.bayir@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
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- Adds dataset for tests
- Adds skeleton for function, operator, reference and tests
Resolves: [COMPMID-6889]
Signed-off-by: Mohammed Suhail Munshi <MohammedSuhail.Munshi@arm.com>
Change-Id: I7e57e8b4577fef6aa7421e672894c249cad6c5fa
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/11234
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Gunes Bayir <gunes.bayir@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
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PyTorch® autocast() function
The full range of tests must be added with [MLINFSW-482] epic due to the lack of reordering kernels implemented in Acl.
Co-Authored-By: David Mansell <David.Mansell@arm.com>
Change-Id: I820d316295a1ec94fdc89c37e4144a268f914c36
Signed-off-by: Renato Arantes <renato.arantes@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/11169
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Gunes Bayir <gunes.bayir@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
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- Neon(TM) implementation converts integers to float and performs the division because there is no vector integer division instructions. However, leftover loop still uses integer division, which makes results inconsistent depending on where we are in the tensor.
- SVE path does it in integer domain.
- OpenCL(TM) does it similar to Neon(TM) vector path.
- Reference implementation does it in integer domain.
These differences cause intermittent mismatches. This patch ensures all follow the same logic.
On the other hand, the provided Neon(TM) implementation is faster than the Fp32 converted version.
Resolves: COMPMID-6925
Change-Id: Ia12606d57f40a7d331b9b698f87fd4321496b275
Signed-off-by: Gunes Bayir <gunes.bayir@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/11316
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Pablo Marquez Tello <pablo.tello@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
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* Perform final sum in fp32 to avoid overflow
* Resolves ARMCL-1128
Change-Id: I89799baf81045697f7bc44017fcb6a440635caff
Signed-off-by: Pablo Marquez Tello <pablo.tello@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/11311
Reviewed-by: Gunes Bayir <gunes.bayir@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
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arm_gemm fuses the actual bias addition with the output stage in quantized gemm.
The output stage, in its very basic form, is:
A_offset * B_offset - sum(A_row_i) * B_offset - sum(B_col_j) * A_offset
Matrix B is usually constant (e.g. weight matrix in convolutions). Therefore, except the middle term above, the expression is constant across the same output row because the column sums of matrix B are pre-calculated.
The bias is also usually constant. When it is, it makes sense to add the bias vector to the above sum and just perform a single addition on top of the output tensor.
For this to happen, the column sum computation of B tensor must account for the bias. This is ensured by set_quantized_bias() method in the interface. This function passes the bias pointer and strides to arm_gemm.
Gemv_pretransposed does not implement set_quantized_bias() and uses the parent function, which does nothing. Therefore, the bias is not added to the output. This causes tests to fail.
Resolves: COMPMID-6928
Change-Id: Iba24fabc65fdc47edb12db6abff2fb47784c0743
Signed-off-by: Gunes Bayir <gunes.bayir@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/11310
Benchmark: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Jakub Sujak <jakub.sujak@arm.com>
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Resolves: COMPMID-6927
Signed-off-by: David Mansell <David.Mansell@arm.com>
Change-Id: Ib426fdc11ddbdbd0028d64547f3eaf312ca5fcce
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/11301
Benchmark: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Gunes Bayir <gunes.bayir@arm.com>
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* Validate output shape in CpuPool2dAssemblyWrapperKernel
* Resolves ARMCL-625
Change-Id: I4fd91c1b15ecb17efc39fd3e82a92210e4f182b2
Signed-off-by: Pablo Marquez Tello <pablo.tello@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/11290
Reviewed-by: Gunes Bayir <gunes.bayir@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
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Resolves: COMPMID-6501
Signed-off-by: Omar Al Khatib <omar.alkhatib@arm.com>
Change-Id: I0abd3cbb5f861301f407c443988fb7efaa205b5d
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/11056
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Gunes Bayir <gunes.bayir@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
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