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kernels.
Change-Id: I81b71ecc0d2e776d132091e074798a79b3141bec
Signed-off-by: David Mansell <David.Mansell@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/11085
Reviewed-by: Jakub Sujak <jakub.sujak@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
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CpuGemmLowpMatrixBReductionKernel::run_internal randomly segfaults
because it reads out of bounds with vloadq. This doesn't trigger with
the unit tests because the read isn't out of bounds for the process, but
it can be seen clearly by running the following in debug mode
./examples/neon_gemm_qasymm8 1 1 1
The vloadq at src/cpu/kernels/CpuGemmLowpMatrixReductionKernel.cpp:353
accesses a quadword even though the input is a single byte.
relates to: ONCPUML-1444 MLINFSW-439 COMPMID-6844
Change-Id: I2ae5260c9f38d6d8149a6bcd5dc146b911209784
Signed-off-by: Jonathan Deakin <jonathan.deakin@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/10966
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Jakub Sujak <jakub.sujak@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
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- Refactor all kernels to work with the CKW stable API
- Add support for sub-tile in the op_load/op_store CKW operator
- Fix mismatch in resize
- Add comments in all kernels written with CKW to help developers
understand the structure of the code
- Add texture image support in depthwise convolution written with CKW
- Add support for different block sizes in depthwise convolution
- Remove the use of the dynamic fusion helper functions.
- Add support for floor in the op_unary() of CKW
Resolves: COMPMID-6708, COMPMID-6743, COMPMID-6530
Signed-off-by: Gian Marco Iodice <gianmarco.iodice@arm.com>
Signed-off-by: Gunes Bayir <gunes.bayir@arm.com>
Signed-off-by: Viet-Hoa Do <viet-hoa.do@arm.com>
Signed-off-by: Jakub Sujak <jakub.sujak@arm.com>
Change-Id: I8104ce4d04a3138a1aeb0b84940e1f1c89e76069
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/10914
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Jakub Sujak <jakub.sujak@arm.com>
Reviewed-by: Gunes Bayir <gunes.bayir@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
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The code in convolver.hpp generates pointers into either the
appropriate point in the input activation tensor or the padding buffer
for each kernel point of each output point of the convolution. This is
done at runtime interspersed with the data transform and matrix
multiplication steps. As such, it can have a significant impact on
performance, particularly for low input channel counts.
This change improves the performance of this code by streamlining the
checks for out of range input points (which must be directed to the
padding buffer). The previous implementation checked all four borders
for every point. The revised code does the checks one at a time, and
for any failing check applies the result to as many output points as
possible without repeating the other checks.
Signed-off-by: David Mansell <David.Mansell@arm.com>
Change-Id: I36a4fa114b425c1bcba2be40acf36718522519f5
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/11004
Benchmark: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Gunes Bayir <gunes.bayir@arm.com>
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Resolves: COMPMID-6746
Signed-off-by: Anitha Raj <anitha.raj@arm.com>
Change-Id: I96c158820469af3e54dca0c5909c888106eb1940
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/11005
Reviewed-by: Gunes Bayir <gunes.bayir@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
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Resolves: COMPMID-6753
Signed-off-by: Anitha Raj <anitha.raj@arm.com>
Change-Id: I80df0479eb4c7cc2c5380df708844cc9ffdd2aed
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/11001
Reviewed-by: Gunes Bayir <gunes.bayir@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
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* The tensor info objects created by calling create_tensor_info
is now solely owned by the context object. The user only receives
pointers to those objects.
- Internally pointers to tensor info objects are used in various
places. It's safer for dynamic fusion to manage these objects
directly rather than relying on the users.
- The validation test is updated to use the modified API.
* Make various changes in dynamic fusion API to make it more
friendly (e.g. making some of the objects moveable).
Partially resolves: COMPMID-6707
Signed-off-by: Viet-Hoa Do <viet-hoa.do@arm.com>
Change-Id: Ifee70e53c05f8e7b72bf9ef123701ff291c5ee80
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/10990
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Jakub Sujak <jakub.sujak@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
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* CONVERT_TO_TENSOR4D_STRUCT_NO_STEP is implemented and used
in some CL kernels in the way that causes divide-by-zero issue.
- Since the steps are all zeros, the issue might have been
ignored by the compiler.
Resolves: COMPMID-6795
Signed-off-by: Viet-Hoa Do <viet-hoa.do@arm.com>
Change-Id: I0fb38fc62d63671b8abefa39b3d9b3ca6f49c7fe
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/10967
Reviewed-by: Gunes Bayir <gunes.bayir@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
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Resolves: [COMPMID-6799]
Signed-off-by: Mohammed Suhail Munshi <MohammedSuhail.Munshi@arm.com>
Change-Id: I47baeeea75f1d03609d1fa1e9a10d2f53d5694f7
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/10969
Benchmark: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Viet-Hoa Do <viet-hoa.do@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
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- Locks pointer before checking for validity to prevent race condition
Signed-off-by: Mohammed Suhail Munshi <MohammedSuhail.Munshi@arm.com>
Change-Id: I6872b10d058ee7f3707ba641f44bb6116e26880a
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/10960
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Viet-Hoa Do <viet-hoa.do@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
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The reorders supported at the moment are:
ab->BA4b4a
ab->BA8b4a
Co-Authored-By: David Mansell <David.Mansell@arm.com>
Change-Id: Ic466465629ce3bcdcee0089e251485b79b60e1f3
Signed-off-by: Renato Arantes <renato.arantes@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/10775
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Jakub Sujak <jakub.sujak@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
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Suppress a false positive compiler warning caused by a bug in GCC https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104165
This issue is known to be reproducible in some versions of GCC 11, 12 and 13.
Remove a redundant std::move flagged by -Werror=redundant-move
Resolves: COMPMID-6777
Change-Id: I782e87b5e3df4c09195e67a37f49d122dc918224
Signed-off-by: Jakub Sujak <jakub.sujak@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/10950
Benchmark: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: <felixjohnny.thomasmathibalan@arm.com>
Comments-Addressed: <felixjohnny.thomasmathibalan@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
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- Enables FP16 lut for logistic activation
- Adds LUTManager to re-use lut where appropriate.
Signed-off-by: Mohammed Suhail Munshi <MohammedSuhail.Munshi@arm.com>
Change-Id: I94667b63b452a8e58a1eb59cb0b5866178954523
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/10864
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Gunes Bayir <gunes.bayir@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
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- For quantized RELU activation, de-quantization and re-quantization
is not required since comparison against the quantization bias is
only required.
Resolves: COMPMID-6340
Change-Id: I574bd220f3d0d893b7f7c4819a883e2a131f61f4
Signed-off-by: Sangwon Ha <sangwon.ha@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/10916
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Jakub Sujak <jakub.sujak@arm.com>
Reviewed-by: <felixjohnny.thomasmathibalan@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
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The issue appears when this kernel is used by convolution operators because the stride calculations consider only simple matrix multiplication.
In conv2d triggered runs, Rhs does not have the same dimension as Lhs and Dst. Also, cases where Lhs and Dst are interpreted as 3d, where their X and Y dimensions (in convolution sense) are collapsed into one.
Resolves: COMPMID-6764
Change-Id: If443e6eb8f7a5cca1acc58b37c598122a013e69b
Signed-off-by: Gunes Bayir <gunes.bayir@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/10913
Benchmark: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Jakub Sujak <jakub.sujak@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
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This patch adds adds the latest Gpus as Gpu Target and sets up kernel selection heuristics for MatMul to address some nightly issues.
Resolves: COMPMID-6766
Change-Id: I29dbb08c5ecfb3fcd63230b0b1675ab557074aca
Signed-off-by: Gunes Bayir <gunes.bayir@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/10902
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Jakub Sujak <jakub.sujak@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
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While writing this gemm kernel, code pieces, including validations were adapted from ClGemmMatrixMultiplyReshapedOnlyRhsKernel, and this validation should be about reinterpret_input_as_3d. This reveals a test gap for this kernel. There are currently no tests stressing this condition; but this is not going to be addressed as part of the bug ticket.
The corresponding snippet in ClGemmMatrixMultiplyReshapedOnlyRhsKernel is
if (gemm_info.reinterpret_input_as_3d)
{
ARM_COMPUTE_RETURN_ERROR_ON(src0->dimension(1) * src0->dimension(2) != m);
}
else
{
ARM_COMPUTE_RETURN_ERROR_ON(src0->dimension(1) != m);
}
Resolves: COMPMID-6757
Signed-off-by: Gunes Bayir <gunes.bayir@arm.com>
Change-Id: I4363effcaf2b43ff3674a3443058384338fb9714
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/10891
Benchmark: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Gian Marco Iodice <gianmarco.iodice@arm.com>
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This reverts commit 270576a9fbeeda5210483931388e62f9a1059dd9.
Signed-off-by: Gunes Bayir <gunes.bayir@arm.com>
Change-Id: Ia4e965156af46a9afd78819e90fd2a033a97fc2b
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/10888
Reviewed-by: Jakub Sujak <jakub.sujak@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
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This fix modifies some of the conversions done in the generate proposals kernel that causes DDK issues while compiling the kernel.
The issues are mostly related to conversion from i64 to fp16, and it doesn't affect fp32. Firstly, type identifier size_t is converted into unsigned int. But, this alone was compiling but causing mismatches, even in older devices, where it was passing before. Therefore, the fp16 conversion delayed until vector construction where the integers are now converted to fp32, and then fp16. This, although may not be ideal, seems like the best solution.
Resolves: COMPMID-6756
Signed-off-by: Gunes Bayir <gunes.bayir@arm.com>
Change-Id: Iee61216c908fe51431985b80c3653fc32add4741
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/10879
Benchmark: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Jakub Sujak <jakub.sujak@arm.com>
Reviewed-by: Pablo Marquez Tello <pablo.tello@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
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While writing this gemm kernel, code pieces, including validations were adapted from ClGemmMatrixMultiplyReshapedOnlyRhsKernel, and this validation should be about reinterpret_input_as_3d, which is not dealt with in this kernel. The mmul kernel only deals with reinterpret_output_as_3d, which is equivalent to depth_output_gemm3d != 0. This reveals a test gap for this kernel. There are currently no tests stressing this condition; but this is not going to be addressed as part of the bug ticket.
The corresponding snippet in ClGemmMatrixMultiplyReshapedOnlyRhsKernel is
if (gemm_info.reinterpret_input_as_3d)
{
ARM_COMPUTE_RETURN_ERROR_ON(src0->dimension(1) * src0->dimension(2) != m);
}
else
{
ARM_COMPUTE_RETURN_ERROR_ON(src0->dimension(1) != m);
}
Resolves: COMPMID-6757
Change-Id: I73b203594b22098a5374c1fac6969ee769969901
Signed-off-by: Gunes Bayir <gunes.bayir@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/10874
Benchmark: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Jakub Sujak <jakub.sujak@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
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* Changes in filelist.json: moved fp16 code from common to fp16
* Replaced the guard __ARM_FEATURE_FP16_VECTOR_ARITHMETIC
with ENABLE_FP16_KERNELS.
* Resolves COMPMID-6755
Change-Id: I4da1c53d3f9e4734e5e67125265ab4e3fc0dcbe4
Signed-off-by: Pablo Marquez Tello <pablo.tello@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/10865
Benchmark: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Jakub Sujak <jakub.sujak@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
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The graph example has fixed quantization information given for certain layers, and some of the offsets exceed the 8-bit range for Int8 data type.
This shouldn't have been the case and the offsets should respect the 8-bit quantization specification laid out here: https://www.tensorflow.org/lite/performance/quantization_spec
However, the mechanism added in the helper function introduces robustness in case of such irregularities with little/no cost; and therefore added as a fix.
Resolves: COMPMID-6748
Change-Id: If39bf323382f109fa100ee2b87ce63cc7bc89759
Signed-off-by: Gunes Bayir <gunes.bayir@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/10858
Reviewed-by: SiCong Li <sicong.li@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
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The function pointer for clImportMemoryARM should be loaded in a portable way as recommended by Khronos® as outlined here:
https://registry.khronos.org/OpenCL/specs/3.0-unified/html/OpenCL_Ext.html#getting-opencl-api-extension-function-pointers
using clGetExtensionFunctionAddressForPlatform() call.
All extensions should ideally be loaded using the above mentioned function.
Resolves: COMPMID-6732
Signed-off-by: Gunes Bayir <gunes.bayir@arm.com>
Change-Id: I482b6bde721267d5e8c08301e5780d28a9c5ba85
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/10852
Benchmark: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Jakub Sujak <jakub.sujak@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
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Resolves: COMPMID-6622
Signed-off-by: Viet-Hoa Do <viet-hoa.do@arm.com>
Change-Id: Ibac276618bdda125dcbb9c851c547f12739b15b4
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/10749
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Gunes Bayir <gunes.bayir@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
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This reverts commit ded5b182675e3166e947a8eb637b5b1e925816ab.
Resolves COMPMID-6735
Signed-off-by: Pablo Marquez Tello <pablo.tello@arm.com>
Change-Id: I9b69ca1ec80a671171d3f52081c4b8c61a676617
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/10838
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: <felixjohnny.thomasmathibalan@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
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Implement a single kernel instead of having two consecutive ones. In the previous setup, one kernel was calculating the maximum value in the axis, and this maximum was being subtracted from each data while calculating the softmax, i.e.
softmax(x_i) = exp(x_i - max) / sum_i( exp(x_i - max) )
This patch integrates these two stages into a single kernel for Neon™ for all data types. This will save some memory because we don't need to hold the max values in a separate auxiliary tensor.
It also introduces some other optimizations that will ease memory pressure when the data type is float/half, by using the dst tensor as temporary storage for already exponentiated inputs.
It removes the references to SVE and SVE2 implementations, and most of the associated files; but, it leaves the implementations as these may be used in the future.
Resolves: COMPMID-6500
Signed-off-by: Gunes Bayir <gunes.bayir@arm.com>
Change-Id: Icff9976d1214c4c6cbe15a62ca60b8a77d3784cc
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/10688
Reviewed-by: SiCong Li <sicong.li@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
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* This is the initial patch to start working on enabling fp16 in all
multi_isa builds. More changes are required in the way we register
the kernels using the macro REGISTER_FP16_NEON.
* In this patch we add the capability to build the fp16 files in listed in
filelist.json with the correct arch option to enable FP16
* This patch is required towards building an universal multi_isa binary
where fp16 is enable.
* Enable REGISTER_FP16_NEON macro for all builds by removing
__ARM_FEATURE_FP16_VECTOR_ARITHMETIC guard from the macro definition.
The macro has to be used across all types of builds.
Change-Id: I99f4c273f6ee04cad3c097e5e374200f48568fa9
Signed-off-by: Pablo Marquez Tello <pablo.tello@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/10682
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Jakub Sujak <jakub.sujak@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
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* Moved NCHW kernels fp16 and fp32 to their corresponding files
src/cpu/kernels/fuse_batch_normalization/nchw/neon/fp16.cpp and
src/cpu/kernels/fuse_batch_normalization/nchw/neon/fp32.cpp
* Changes in filelist.json to include the new fp16 and fp32 files
* Moved the template batch_normalization_nchw to impl.h as we
need to instantiate it from fp16.cpp and fp32.cpp
* Pooling layer: removed the guard __ARM_FEATURE_FP16_VECTOR_ARITHMETIC that
prevented the FP16 kernel execution.
* Partially resolves MLCE-1102
Change-Id: Ia8c85e9ffb76c9e387f9ae2685e5df5e52c8dc27
Signed-off-by: Pablo Marquez Tello <pablo.tello@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/10777
Reviewed-by: Viet-Hoa Do <viet-hoa.do@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
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* Moved fp16 and fp32 to their corresponding files
src/cpu/kernels/mul/generic/neon/fp16.cpp and
src/cpu/kernels/mul/generic/neon/fp32.cpp
* Changes in filelist.json: added a new fp16.cpp file for the float16_t kernels
* Partially resolves MLCE-1102
Change-Id: I88f24cf034c11b55ff84644b182ba76c7cb94296
Signed-off-by: Pablo Marquez Tello <pablo.tello@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/10778
Benchmark: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Viet-Hoa Do <viet-hoa.do@arm.com>
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Resolves ONCPUML-1331
This patch adds an option to make _custom_scheduler thread_local to
support usage of multiple schedulers handled outside of ACL.
It also adds num_threads() function to Scheduler which reverts to
querying CPUInfo if no scheduler has been set.
Change-Id: Iff706165d8d091895331a5bb3a76f6cabe048912
Signed-off-by: David Svantesson-Yeung <david.svantesson-yeung@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/10748
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: SiCong Li <sicong.li@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
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* Moved the template arm_compute::normalize_float to impl.h because
we need to instantiate it from both NENormalizationLayerKernel.cpp
and src/cpu/kernels/norm_layer/generic/neon/fp16.cpp
* Changes in filelist.json: added a new fp16.cpp file for the float16_t kernels
* Replaced the guard __ARM_FEATURE_FP16_VECTOR_ARITHMETIC in
NENormalizationLayerKernel by ARM_COMPUTE_ENABLE_FP16 so that
the fp16 kernels can be compiled in for multi_isa builds
* Moved fp32 kernels to the corresponding file
src/cpu/kernels/norm_layer/generic/neon/fp32.cpp
* Partially resolves MLCE-1102
Change-Id: I3f2eb2ed0b6c7f68092b17872b85082fbb5f39e2
Signed-off-by: Pablo Marquez Tello <pablo.tello@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/10739
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Viet-Hoa Do <viet-hoa.do@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
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Resolves COMPMID-6677
Signed-off-by: SiCong Li <sicong.li@arm.com>
Change-Id: I99bf2385f6edc0836faacb31f5c66ed4fb051e40
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/10729
Benchmark: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Viet-Hoa Do <viet-hoa.do@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
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* Performing the second pass in reverse order doesn't seem to work
reliably in some specific devices. This patch introduces
another approach to workaround the device issue.
Resolves: COMPMID-6669
Signed-off-by: Viet-Hoa Do <viet-hoa.do@arm.com>
Change-Id: I591f05ff06f8439ebe4d32093441ae871a292f4c
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/10730
Benchmark: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: SiCong Li <sicong.li@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
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Resolved COMPMID-6367
Signed-off-by: Anitha Raj <anitha.raj@arm.com>
Change-Id: I96f244811a81a4e278f0c5e47d5014229cad3a25
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/10727
Benchmark: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: SiCong Li <sicong.li@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
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Bypass importation of memory of the original weights into the
reinterpreted_weights auxiliary tensor if other weight transformation
path is selected (which would've freed the original weights and its
tensor info)
Resolves COMPMID-6635
Signed-off-by: SiCong Li <sicong.li@arm.com>
Change-Id: Ib8a345c3ac542bc3745d6a67db822b55df37e827
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/10698
Benchmark: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Anitha Raj <Anitha.Raj@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
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Change-Id: Ie68b0a19040cc6b5bf47fca406989f39aa8d7b81
Signed-off-by: David Mansell <David.Mansell@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/10687
Reviewed-by: Viet-Hoa Do <viet-hoa.do@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
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* Changes in filelist.json moving fp16 file from common to fp16 attribute
* Changes in kernel CpuPool2dAssemblyWrapperKernel, replaced
__ARM_FEATURE_FP16_VECTOR_ARITHMETIC by ENABLE_FP16_KERNELS to
make sure the fp16 kernels are compiled in for multi_isa=1
* Partially resolves MLCE-1102
Change-Id: I327154ec5b1ddfb9f54d9096f00c35b3e05c678a
Signed-off-by: Pablo Marquez Tello <pablo.tello@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/10662
Benchmark: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Gunes Bayir <gunes.bayir@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
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* Changes in filelist.json moving fp16 file from common to fp16 attribute
* Removed the guard __ARM_FEATURE_FP16_VECTOR_ARITHMETIC in
CpuDepthwiseConv2dAssemblyWrapperKernel to always create the assembly
kernel
* Partially resolves MLCE-1102
Change-Id: I2f88d5e54a94042cfb3cb4ea0386338a7c444866
Signed-off-by: Pablo Marquez Tello <pablo.tello@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/10626
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Viet-Hoa Do <viet-hoa.do@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
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When weight has no holes, we can replace CpuWeightsReshapeKernel with:
- Collapse by reinterpreting weight's 3 spatial dimensions
- Perform CpuTranspose
For more details see the documentation in
src/cpu/operators/CpuGemmConv2d.cpp
This is one optimization since the CpuTranspose is better performing
than CpuWeightsReshapeKernel
A second optimization is to fuse this transpose with other weight
transformations (e.g. pretranspose_B_array in CpuGemmAssemblyDispatch)
However this second optimization depends on how the underlying gemm
methods (the fall back path: CpuGemmMatrixMultiplyKernel or the assembly
path: CpuGemmAssemblyDispatch) chooses to fuse the transpose.
Therefore, this patch moves the transpose down from CpuGemmConv2d, to
the individual gemm operators where the fusion decision needs to be
made, by passing an extra "transpose_b" flag to CpuGemm
New transpose_b flag in different scopes (they are all the same, but
with different names because pretranspose_b has a different meaning in
GemmAssemblyDispatch):
GEMMInfo::pretranspose_B -> AsmGemmInfo::transpose_b
New auxilliary tensors holding the transposed b result:
- CpuGemm optimized path: CpuGemmAssemblyDispatch::PrePretransposedB
- CpuGemm fallback path: CpuGemm::PreTransposedRHS
Note that this patch does not yet have the second optimization
(COMPMID-6595), but it prepares for it.
Relates to COMPMID-6595
Resolves COMPMID-6499
Change-Id: I999a2da9da4b2b15369a3cc06d7872c86e0190ea
Signed-off-by: SiCong Li <sicong.li@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/10526
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Anitha Raj <Anitha.Raj@arm.com>
Reviewed-by: Gunes Bayir <gunes.bayir@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
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Resolves COMPMID-6479
Signed-off-by: Gian Marco Iodice <gianmarco.iodice@arm.com>
Change-Id: I13aa0ef944a75ba8b5e4df183d52df57b9aba90f
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/10659
Reviewed-by: SiCong Li <sicong.li@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
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Resolves: COMPMID-6599
Signed-off-by: Viet-Hoa Do <viet-hoa.do@arm.com>
Change-Id: Id91185871f0dc30c08c7c38379acd5a3c1056473
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/10575
Reviewed-by: Jakub Sujak <jakub.sujak@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
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* Fix SVE header being included in non-SVE file.
Resolves: COMPMID-6613
Signed-off-by: Viet-Hoa Do <viet-hoa.do@arm.com>
Change-Id: Ic7f662a239b761b83e67e11b6cc03f7d5f5cd051
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/10573
Reviewed-by: Jakub Sujak <jakub.sujak@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
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- Adds option to use negative axis and inverted axis.
- Adds validation tests for the above.
Resolves COMPMID-6459
Change-Id: I88afd845d078f92c82ec8529ce7241fccd4c417e
Signed-off-by: Adnan AlSinan <adnan.alsinan@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/10523
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Viet-Hoa Do <viet-hoa.do@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
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- Add the kernel variant: (nt_t) to GpuCKWMatMul.
- Extend CKW MatMul validation test with nt_t.
- Fixes a bug in CKW where z-dim = 1.
Resolves: COMPMID-6435
Signed-off-by: Adnan AlSinan <adnan.alsinan@arm.com>
Change-Id: I4c5e8791e55f21ffff3c11eca7802c51a4259977
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/10525
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Gian Marco Iodice <gianmarco.iodice@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
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Resolves: COMPMID-6493
Signed-off-by: Viet-Hoa Do <viet-hoa.do@arm.com>
Change-Id: I038d91ba266e1e8bf124336bcd272ec77e92038c
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/10490
Benchmark: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Anitha Raj <Anitha.Raj@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
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* The new softmax implementation consists of only a single kernel.
- There are 2 versions of softmax, one for the x dimension
and one for any other dimensions.
- Softmax kernel handles both native and quantized data type.
Resolves: COMPMID-6447
Signed-off-by: Viet-Hoa Do <viet-hoa.do@arm.com>
Change-Id: I4a9ae5bc63f78aebeaa85ee48a0d102c9c245eda
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/10489
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: SiCong Li <sicong.li@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
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* FP16 kernels must be instantiated in fp16.cpp.
* Partially resolves MLCE-1102
Change-Id: Iab9c29dbfd89358f2f663862ff5010c88aeccf8c
Signed-off-by: Pablo Marquez Tello <pablo.tello@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/10496
Reviewed-by: Anitha Raj <Anitha.Raj@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
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Resolves: COMPMID-6397
Signed-off-by: Mohammed Suhail Munshi <MohammedSuhail.Munshi@arm.com>
Change-Id: Id4404f75dae03fd529db1adac5ab9ca48d08ec46
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/10498
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Gian Marco Iodice <gianmarco.iodice@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
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* FP16 kernels must be instantiated in fp16.cpp.
* Partially resolves MLCE-1102
Change-Id: Ie652203876a0ac12b025e96d20990b6efb21e772
Signed-off-by: Pablo Marquez Tello <pablo.tello@arm.com>
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/10477
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Benchmark: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Jakub Sujak <jakub.sujak@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
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Signed-off-by: David Mansell <David.Mansell@arm.com>
Change-Id: If02f7809f9b6e84979121698c5e7a62cbb41e2c3
Reviewed-on: https://review.mlplatform.org/c/ml/ComputeLibrary/+/10487
Benchmark: Arm Jenkins <bsgcomp@arm.com>
Tested-by: Arm Jenkins <bsgcomp@arm.com>
Reviewed-by: Viet-Hoa Do <viet-hoa.do@arm.com>
Comments-Addressed: Arm Jenkins <bsgcomp@arm.com>
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